Showing error 737

User: Jiri Slaby
Error type: Reachable Error Location
Error type description: A specified error location is reachable in some program path
File location: ldv-linux-3.4/32_7_cilled_unsafe_const_ok_linux-32_1-drivers--gpu--drm--vmwgfx--vmwgfx.ko-ldv_main3_sequence_infinite_withcheck_stateful.cil.out.c
Line in file: 14600
Project: SV-COMP 2013
Project version: 2.6.28
Tools: Manual Work
Entered: 2013-01-17 16:57:54 UTC


Source:

    1/* Generated by CIL v. 1.3.7 */
    2/* print_CIL_Input is true */
    3
    4#line 19 "include/asm-generic/int-ll64.h"
    5typedef signed char __s8;
    6#line 20 "include/asm-generic/int-ll64.h"
    7typedef unsigned char __u8;
    8#line 22 "include/asm-generic/int-ll64.h"
    9typedef short __s16;
   10#line 23 "include/asm-generic/int-ll64.h"
   11typedef unsigned short __u16;
   12#line 25 "include/asm-generic/int-ll64.h"
   13typedef int __s32;
   14#line 26 "include/asm-generic/int-ll64.h"
   15typedef unsigned int __u32;
   16#line 29 "include/asm-generic/int-ll64.h"
   17typedef long long __s64;
   18#line 30 "include/asm-generic/int-ll64.h"
   19typedef unsigned long long __u64;
   20#line 43 "include/asm-generic/int-ll64.h"
   21typedef unsigned char u8;
   22#line 46 "include/asm-generic/int-ll64.h"
   23typedef unsigned short u16;
   24#line 48 "include/asm-generic/int-ll64.h"
   25typedef int s32;
   26#line 49 "include/asm-generic/int-ll64.h"
   27typedef unsigned int u32;
   28#line 51 "include/asm-generic/int-ll64.h"
   29typedef long long s64;
   30#line 52 "include/asm-generic/int-ll64.h"
   31typedef unsigned long long u64;
   32#line 14 "include/asm-generic/posix_types.h"
   33typedef long __kernel_long_t;
   34#line 15 "include/asm-generic/posix_types.h"
   35typedef unsigned long __kernel_ulong_t;
   36#line 27 "include/asm-generic/posix_types.h"
   37typedef __kernel_ulong_t __kernel_nlink_t;
   38#line 31 "include/asm-generic/posix_types.h"
   39typedef int __kernel_pid_t;
   40#line 44 "include/asm-generic/posix_types.h"
   41typedef __kernel_long_t __kernel_suseconds_t;
   42#line 52 "include/asm-generic/posix_types.h"
   43typedef unsigned int __kernel_uid32_t;
   44#line 53 "include/asm-generic/posix_types.h"
   45typedef unsigned int __kernel_gid32_t;
   46#line 75 "include/asm-generic/posix_types.h"
   47typedef __kernel_ulong_t __kernel_size_t;
   48#line 76 "include/asm-generic/posix_types.h"
   49typedef __kernel_long_t __kernel_ssize_t;
   50#line 90 "include/asm-generic/posix_types.h"
   51typedef __kernel_long_t __kernel_off_t;
   52#line 91 "include/asm-generic/posix_types.h"
   53typedef long long __kernel_loff_t;
   54#line 92 "include/asm-generic/posix_types.h"
   55typedef __kernel_long_t __kernel_time_t;
   56#line 93 "include/asm-generic/posix_types.h"
   57typedef __kernel_long_t __kernel_clock_t;
   58#line 94 "include/asm-generic/posix_types.h"
   59typedef int __kernel_timer_t;
   60#line 95 "include/asm-generic/posix_types.h"
   61typedef int __kernel_clockid_t;
   62#line 21 "include/linux/types.h"
   63typedef __u32 __kernel_dev_t;
   64#line 24 "include/linux/types.h"
   65typedef __kernel_dev_t dev_t;
   66#line 27 "include/linux/types.h"
   67typedef unsigned short umode_t;
   68#line 28 "include/linux/types.h"
   69typedef __kernel_nlink_t nlink_t;
   70#line 29 "include/linux/types.h"
   71typedef __kernel_off_t off_t;
   72#line 30 "include/linux/types.h"
   73typedef __kernel_pid_t pid_t;
   74#line 35 "include/linux/types.h"
   75typedef __kernel_clockid_t clockid_t;
   76#line 38 "include/linux/types.h"
   77typedef _Bool bool;
   78#line 40 "include/linux/types.h"
   79typedef __kernel_uid32_t uid_t;
   80#line 41 "include/linux/types.h"
   81typedef __kernel_gid32_t gid_t;
   82#line 54 "include/linux/types.h"
   83typedef __kernel_loff_t loff_t;
   84#line 63 "include/linux/types.h"
   85typedef __kernel_size_t size_t;
   86#line 68 "include/linux/types.h"
   87typedef __kernel_ssize_t ssize_t;
   88#line 78 "include/linux/types.h"
   89typedef __kernel_time_t time_t;
   90#line 111 "include/linux/types.h"
   91typedef __s32 int32_t;
   92#line 115 "include/linux/types.h"
   93typedef __u8 uint8_t;
   94#line 116 "include/linux/types.h"
   95typedef __u16 uint16_t;
   96#line 117 "include/linux/types.h"
   97typedef __u32 uint32_t;
   98#line 120 "include/linux/types.h"
   99typedef __u64 uint64_t;
  100#line 142 "include/linux/types.h"
  101typedef unsigned long sector_t;
  102#line 143 "include/linux/types.h"
  103typedef unsigned long blkcnt_t;
  104#line 155 "include/linux/types.h"
  105typedef u64 dma_addr_t;
  106#line 180 "include/linux/types.h"
  107typedef __u32 __le32;
  108#line 202 "include/linux/types.h"
  109typedef unsigned int gfp_t;
  110#line 203 "include/linux/types.h"
  111typedef unsigned int fmode_t;
  112#line 206 "include/linux/types.h"
  113typedef u64 phys_addr_t;
  114#line 211 "include/linux/types.h"
  115typedef phys_addr_t resource_size_t;
  116#line 219 "include/linux/types.h"
  117struct __anonstruct_atomic_t_7 {
  118   int counter ;
  119};
  120#line 219 "include/linux/types.h"
  121typedef struct __anonstruct_atomic_t_7 atomic_t;
  122#line 224 "include/linux/types.h"
  123struct __anonstruct_atomic64_t_8 {
  124   long counter ;
  125};
  126#line 224 "include/linux/types.h"
  127typedef struct __anonstruct_atomic64_t_8 atomic64_t;
  128#line 229 "include/linux/types.h"
  129struct list_head {
  130   struct list_head *next ;
  131   struct list_head *prev ;
  132};
  133#line 233
  134struct hlist_node;
  135#line 233 "include/linux/types.h"
  136struct hlist_head {
  137   struct hlist_node *first ;
  138};
  139#line 237 "include/linux/types.h"
  140struct hlist_node {
  141   struct hlist_node *next ;
  142   struct hlist_node **pprev ;
  143};
  144#line 253 "include/linux/types.h"
  145struct rcu_head {
  146   struct rcu_head *next ;
  147   void (*func)(struct rcu_head *head ) ;
  148};
  149#line 40 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_types.h"
  150typedef uint32_t uint32;
  151#line 42 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_types.h"
  152typedef int32_t int32;
  153#line 287 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  154struct SVGAGuestPtr {
  155   uint32 gmrId ;
  156   uint32 offset ;
  157};
  158#line 287 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  159typedef struct SVGAGuestPtr SVGAGuestPtr;
  160#line 314 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  161struct __anonstruct____missing_field_name_11 {
  162   uint32 bitsPerPixel : 8 ;
  163   uint32 colorDepth : 8 ;
  164   uint32 reserved : 16 ;
  165};
  166#line 314 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  167union __anonunion____missing_field_name_10 {
  168   struct __anonstruct____missing_field_name_11 __annonCompField4 ;
  169   uint32 value ;
  170};
  171#line 314 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  172struct SVGAGMRImageFormat {
  173   union __anonunion____missing_field_name_10 __annonCompField5 ;
  174};
  175#line 314 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  176typedef struct SVGAGMRImageFormat SVGAGMRImageFormat;
  177#line 385 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  178struct SVGASignedRect {
  179   int32 left ;
  180   int32 top ;
  181   int32 right ;
  182   int32 bottom ;
  183};
  184#line 385 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  185typedef struct SVGASignedRect SVGASignedRect;
  186#line 393 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  187struct SVGASignedPoint {
  188   int32 x ;
  189   int32 y ;
  190};
  191#line 393 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  192typedef struct SVGASignedPoint SVGASignedPoint;
  193#line 1060 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  194struct SVGAFifoCmdUpdate {
  195   uint32 x ;
  196   uint32 y ;
  197   uint32 width ;
  198   uint32 height ;
  199};
  200#line 1060 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  201typedef struct SVGAFifoCmdUpdate SVGAFifoCmdUpdate;
  202#line 1326 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  203struct __anonstruct_SVGAFifoCmdDefineGMRFB_22 {
  204   SVGAGuestPtr ptr ;
  205   uint32 bytesPerLine ;
  206   SVGAGMRImageFormat format ;
  207};
  208#line 1326 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  209typedef struct __anonstruct_SVGAFifoCmdDefineGMRFB_22 SVGAFifoCmdDefineGMRFB;
  210#line 1363 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  211struct __anonstruct_SVGAFifoCmdBlitGMRFBToScreen_23 {
  212   SVGASignedPoint srcOrigin ;
  213   SVGASignedRect destRect ;
  214   uint32 destScreenId ;
  215};
  216#line 1363 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
  217typedef struct __anonstruct_SVGAFifoCmdBlitGMRFBToScreen_23 SVGAFifoCmdBlitGMRFBToScreen;
  218#line 613 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  219enum __anonenum_SVGA3dRenderTargetType_54 {
  220    SVGA3D_RT_DEPTH = 0,
  221    SVGA3D_RT_STENCIL = 1,
  222    SVGA3D_RT_COLOR0 = 2,
  223    SVGA3D_RT_COLOR1 = 3,
  224    SVGA3D_RT_COLOR2 = 4,
  225    SVGA3D_RT_COLOR3 = 5,
  226    SVGA3D_RT_COLOR4 = 6,
  227    SVGA3D_RT_COLOR5 = 7,
  228    SVGA3D_RT_COLOR6 = 8,
  229    SVGA3D_RT_COLOR7 = 9,
  230    SVGA3D_RT_MAX = 10,
  231    SVGA3D_RT_INVALID = 4294967295U
  232} ;
  233#line 613 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  234typedef enum __anonenum_SVGA3dRenderTargetType_54 SVGA3dRenderTargetType;
  235#line 661
  236enum __anonenum_SVGA3dTextureStateName_59 {
  237    SVGA3D_TS_INVALID = 0,
  238    SVGA3D_TS_BIND_TEXTURE = 1,
  239    SVGA3D_TS_COLOROP = 2,
  240    SVGA3D_TS_COLORARG1 = 3,
  241    SVGA3D_TS_COLORARG2 = 4,
  242    SVGA3D_TS_ALPHAOP = 5,
  243    SVGA3D_TS_ALPHAARG1 = 6,
  244    SVGA3D_TS_ALPHAARG2 = 7,
  245    SVGA3D_TS_ADDRESSU = 8,
  246    SVGA3D_TS_ADDRESSV = 9,
  247    SVGA3D_TS_MIPFILTER = 10,
  248    SVGA3D_TS_MAGFILTER = 11,
  249    SVGA3D_TS_MINFILTER = 12,
  250    SVGA3D_TS_BORDERCOLOR = 13,
  251    SVGA3D_TS_TEXCOORDINDEX = 14,
  252    SVGA3D_TS_TEXTURETRANSFORMFLAGS = 15,
  253    SVGA3D_TS_TEXCOORDGEN = 16,
  254    SVGA3D_TS_BUMPENVMAT00 = 17,
  255    SVGA3D_TS_BUMPENVMAT01 = 18,
  256    SVGA3D_TS_BUMPENVMAT10 = 19,
  257    SVGA3D_TS_BUMPENVMAT11 = 20,
  258    SVGA3D_TS_TEXTURE_MIPMAP_LEVEL = 21,
  259    SVGA3D_TS_TEXTURE_LOD_BIAS = 22,
  260    SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL = 23,
  261    SVGA3D_TS_ADDRESSW = 24,
  262    SVGA3D_TS_GAMMA = 25,
  263    SVGA3D_TS_BUMPENVLSCALE = 26,
  264    SVGA3D_TS_BUMPENVLOFFSET = 27,
  265    SVGA3D_TS_COLORARG0 = 28,
  266    SVGA3D_TS_ALPHAARG0 = 29,
  267    SVGA3D_TS_MAX = 30
  268} ;
  269#line 661 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  270typedef enum __anonenum_SVGA3dTextureStateName_59 SVGA3dTextureStateName;
  271#line 827
  272enum __anonenum_SVGA3dDeclUsage_67 {
  273    SVGA3D_DECLUSAGE_POSITION = 0,
  274    SVGA3D_DECLUSAGE_BLENDWEIGHT = 1,
  275    SVGA3D_DECLUSAGE_BLENDINDICES = 2,
  276    SVGA3D_DECLUSAGE_NORMAL = 3,
  277    SVGA3D_DECLUSAGE_PSIZE = 4,
  278    SVGA3D_DECLUSAGE_TEXCOORD = 5,
  279    SVGA3D_DECLUSAGE_TANGENT = 6,
  280    SVGA3D_DECLUSAGE_BINORMAL = 7,
  281    SVGA3D_DECLUSAGE_TESSFACTOR = 8,
  282    SVGA3D_DECLUSAGE_POSITIONT = 9,
  283    SVGA3D_DECLUSAGE_COLOR = 10,
  284    SVGA3D_DECLUSAGE_FOG = 11,
  285    SVGA3D_DECLUSAGE_DEPTH = 12,
  286    SVGA3D_DECLUSAGE_SAMPLE = 13,
  287    SVGA3D_DECLUSAGE_MAX = 14
  288} ;
  289#line 827 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  290typedef enum __anonenum_SVGA3dDeclUsage_67 SVGA3dDeclUsage;
  291#line 845
  292enum __anonenum_SVGA3dDeclMethod_68 {
  293    SVGA3D_DECLMETHOD_DEFAULT = 0,
  294    SVGA3D_DECLMETHOD_PARTIALU = 1,
  295    SVGA3D_DECLMETHOD_PARTIALV = 2,
  296    SVGA3D_DECLMETHOD_CROSSUV = 3,
  297    SVGA3D_DECLMETHOD_UV = 4,
  298    SVGA3D_DECLMETHOD_LOOKUP = 5,
  299    SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED = 6
  300} ;
  301#line 845 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  302typedef enum __anonenum_SVGA3dDeclMethod_68 SVGA3dDeclMethod;
  303#line 855
  304enum __anonenum_SVGA3dDeclType_69 {
  305    SVGA3D_DECLTYPE_FLOAT1 = 0,
  306    SVGA3D_DECLTYPE_FLOAT2 = 1,
  307    SVGA3D_DECLTYPE_FLOAT3 = 2,
  308    SVGA3D_DECLTYPE_FLOAT4 = 3,
  309    SVGA3D_DECLTYPE_D3DCOLOR = 4,
  310    SVGA3D_DECLTYPE_UBYTE4 = 5,
  311    SVGA3D_DECLTYPE_SHORT2 = 6,
  312    SVGA3D_DECLTYPE_SHORT4 = 7,
  313    SVGA3D_DECLTYPE_UBYTE4N = 8,
  314    SVGA3D_DECLTYPE_SHORT2N = 9,
  315    SVGA3D_DECLTYPE_SHORT4N = 10,
  316    SVGA3D_DECLTYPE_USHORT2N = 11,
  317    SVGA3D_DECLTYPE_USHORT4N = 12,
  318    SVGA3D_DECLTYPE_UDEC3 = 13,
  319    SVGA3D_DECLTYPE_DEC3N = 14,
  320    SVGA3D_DECLTYPE_FLOAT16_2 = 15,
  321    SVGA3D_DECLTYPE_FLOAT16_4 = 16,
  322    SVGA3D_DECLTYPE_MAX = 17
  323} ;
  324#line 855 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  325typedef enum __anonenum_SVGA3dDeclType_69 SVGA3dDeclType;
  326#line 904
  327enum __anonenum_SVGA3dPrimitiveType_72 {
  328    SVGA3D_PRIMITIVE_INVALID = 0,
  329    SVGA3D_PRIMITIVE_TRIANGLELIST = 1,
  330    SVGA3D_PRIMITIVE_POINTLIST = 2,
  331    SVGA3D_PRIMITIVE_LINELIST = 3,
  332    SVGA3D_PRIMITIVE_LINESTRIP = 4,
  333    SVGA3D_PRIMITIVE_TRIANGLESTRIP = 5,
  334    SVGA3D_PRIMITIVE_TRIANGLEFAN = 6,
  335    SVGA3D_PRIMITIVE_MAX = 7
  336} ;
  337#line 904 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  338typedef enum __anonenum_SVGA3dPrimitiveType_72 SVGA3dPrimitiveType;
  339#line 973
  340enum __anonenum_SVGA3dStretchBltMode_79 {
  341    SVGA3D_STRETCH_BLT_POINT = 0,
  342    SVGA3D_STRETCH_BLT_LINEAR = 1,
  343    SVGA3D_STRETCH_BLT_MAX = 2
  344} ;
  345#line 973 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  346typedef enum __anonenum_SVGA3dStretchBltMode_79 SVGA3dStretchBltMode;
  347#line 979
  348enum __anonenum_SVGA3dQueryType_80 {
  349    SVGA3D_QUERYTYPE_OCCLUSION = 0,
  350    SVGA3D_QUERYTYPE_MAX = 1
  351} ;
  352#line 979 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  353typedef enum __anonenum_SVGA3dQueryType_80 SVGA3dQueryType;
  354#line 991
  355enum __anonenum_SVGA3dTransferType_82 {
  356    SVGA3D_WRITE_HOST_VRAM = 1,
  357    SVGA3D_READ_HOST_VRAM = 2
  358} ;
  359#line 991 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  360typedef enum __anonenum_SVGA3dTransferType_82 SVGA3dTransferType;
  361#line 1083 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  362struct SVGA3dSurfaceImageId {
  363   uint32 sid ;
  364   uint32 face ;
  365   uint32 mipmap ;
  366};
  367#line 1083 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  368typedef struct SVGA3dSurfaceImageId SVGA3dSurfaceImageId;
  369#line 1090 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  370struct SVGA3dGuestImage {
  371   SVGAGuestPtr ptr ;
  372   uint32 pitch ;
  373};
  374#line 1090 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  375typedef struct SVGA3dGuestImage SVGA3dGuestImage;
  376#line 1120 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  377struct __anonstruct_SVGA3dCmdHeader_86 {
  378   uint32 id ;
  379   uint32 size ;
  380};
  381#line 1120 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  382typedef struct __anonstruct_SVGA3dCmdHeader_86 SVGA3dCmdHeader;
  383#line 1261 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  384struct __anonstruct_SVGA3dBox_97 {
  385   uint32 x ;
  386   uint32 y ;
  387   uint32 z ;
  388   uint32 w ;
  389   uint32 h ;
  390   uint32 d ;
  391};
  392#line 1261 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  393typedef struct __anonstruct_SVGA3dBox_97 SVGA3dBox;
  394#line 1296 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  395struct __anonstruct_SVGA3dCmdPresent_100 {
  396   uint32 sid ;
  397};
  398#line 1296 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  399typedef struct __anonstruct_SVGA3dCmdPresent_100 SVGA3dCmdPresent;
  400#line 1317 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  401struct __anonstruct_SVGA3dCmdSetRenderTarget_104 {
  402   uint32 cid ;
  403   SVGA3dRenderTargetType type ;
  404   SVGA3dSurfaceImageId target ;
  405};
  406#line 1317 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  407typedef struct __anonstruct_SVGA3dCmdSetRenderTarget_104 SVGA3dCmdSetRenderTarget;
  408#line 1324 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  409struct __anonstruct_SVGA3dCmdSurfaceCopy_105 {
  410   SVGA3dSurfaceImageId src ;
  411   SVGA3dSurfaceImageId dest ;
  412};
  413#line 1324 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  414typedef struct __anonstruct_SVGA3dCmdSurfaceCopy_105 SVGA3dCmdSurfaceCopy;
  415#line 1331 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  416struct __anonstruct_SVGA3dCmdSurfaceStretchBlt_106 {
  417   SVGA3dSurfaceImageId src ;
  418   SVGA3dSurfaceImageId dest ;
  419   SVGA3dBox boxSrc ;
  420   SVGA3dBox boxDest ;
  421   SVGA3dStretchBltMode mode ;
  422};
  423#line 1331 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  424typedef struct __anonstruct_SVGA3dCmdSurfaceStretchBlt_106 SVGA3dCmdSurfaceStretchBlt;
  425#line 1362 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  426struct __anonstruct_SVGA3dCmdSurfaceDMA_108 {
  427   SVGA3dGuestImage guest ;
  428   SVGA3dSurfaceImageId host ;
  429   SVGA3dTransferType transfer ;
  430};
  431#line 1362 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  432typedef struct __anonstruct_SVGA3dCmdSurfaceDMA_108 SVGA3dCmdSurfaceDMA;
  433#line 1431 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  434struct __anonstruct_SVGA3dArrayRangeHint_110 {
  435   uint32 first ;
  436   uint32 last ;
  437};
  438#line 1431 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  439typedef struct __anonstruct_SVGA3dArrayRangeHint_110 SVGA3dArrayRangeHint;
  440#line 1446 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  441struct __anonstruct_SVGA3dArray_111 {
  442   uint32 surfaceId ;
  443   uint32 offset ;
  444   uint32 stride ;
  445};
  446#line 1446 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  447typedef struct __anonstruct_SVGA3dArray_111 SVGA3dArray;
  448#line 1464 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  449struct __anonstruct_SVGA3dVertexArrayIdentity_112 {
  450   SVGA3dDeclType type ;
  451   SVGA3dDeclMethod method ;
  452   SVGA3dDeclUsage usage ;
  453   uint32 usageIndex ;
  454};
  455#line 1464 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  456typedef struct __anonstruct_SVGA3dVertexArrayIdentity_112 SVGA3dVertexArrayIdentity;
  457#line 1478 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  458struct __anonstruct_SVGA3dVertexDecl_113 {
  459   SVGA3dVertexArrayIdentity identity ;
  460   SVGA3dArray array ;
  461   SVGA3dArrayRangeHint rangeHint ;
  462};
  463#line 1478 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  464typedef struct __anonstruct_SVGA3dVertexDecl_113 SVGA3dVertexDecl;
  465#line 1485 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  466struct __anonstruct_SVGA3dPrimitiveRange_114 {
  467   SVGA3dPrimitiveType primType ;
  468   uint32 primitiveCount ;
  469   SVGA3dArray indexArray ;
  470   uint32 indexWidth ;
  471   int32 indexBias ;
  472};
  473#line 1485 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  474typedef struct __anonstruct_SVGA3dPrimitiveRange_114 SVGA3dPrimitiveRange;
  475#line 1535 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  476struct __anonstruct_SVGA3dCmdDrawPrimitives_115 {
  477   uint32 cid ;
  478   uint32 numVertexDecls ;
  479   uint32 numRanges ;
  480};
  481#line 1535 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  482typedef struct __anonstruct_SVGA3dCmdDrawPrimitives_115 SVGA3dCmdDrawPrimitives;
  483#line 1555 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  484union __anonunion____missing_field_name_117 {
  485   uint32 value ;
  486   float floatValue ;
  487};
  488#line 1555 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  489struct __anonstruct_SVGA3dTextureState_116 {
  490   uint32 stage ;
  491   SVGA3dTextureStateName name ;
  492   union __anonunion____missing_field_name_117 __annonCompField16 ;
  493};
  494#line 1555 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  495typedef struct __anonstruct_SVGA3dTextureState_116 SVGA3dTextureState;
  496#line 1565 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  497struct __anonstruct_SVGA3dCmdSetTextureState_118 {
  498   uint32 cid ;
  499};
  500#line 1565 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  501typedef struct __anonstruct_SVGA3dCmdSetTextureState_118 SVGA3dCmdSetTextureState;
  502#line 1676 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  503struct __anonstruct_SVGA3dCmdEndQuery_134 {
  504   uint32 cid ;
  505   SVGA3dQueryType type ;
  506   SVGAGuestPtr guestResult ;
  507};
  508#line 1676 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  509typedef struct __anonstruct_SVGA3dCmdEndQuery_134 SVGA3dCmdEndQuery;
  510#line 1683 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  511struct __anonstruct_SVGA3dCmdWaitForQuery_135 {
  512   uint32 cid ;
  513   SVGA3dQueryType type ;
  514   SVGAGuestPtr guestResult ;
  515};
  516#line 1683 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  517typedef struct __anonstruct_SVGA3dCmdWaitForQuery_135 SVGA3dCmdWaitForQuery;
  518#line 1736 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  519struct __anonstruct_SVGA3dCmdBlitSurfaceToScreen_138 {
  520   SVGA3dSurfaceImageId srcImage ;
  521   SVGASignedRect srcRect ;
  522   uint32 destScreenId ;
  523   SVGASignedRect destRect ;
  524};
  525#line 1736 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
  526typedef struct __anonstruct_SVGA3dCmdBlitSurfaceToScreen_138 SVGA3dCmdBlitSurfaceToScreen;
  527#line 56 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/alternative.h"
  528struct module;
  529#line 47 "include/linux/dynamic_debug.h"
  530struct device;
  531#line 135 "include/linux/kernel.h"
  532struct completion;
  533#line 136
  534struct pt_regs;
  535#line 349
  536struct pid;
  537#line 50 "include/linux/miscdevice.h"
  538struct file_operations;
  539#line 15 "include/linux/blk_types.h"
  540struct page;
  541#line 16
  542struct block_device;
  543#line 12 "include/linux/thread_info.h"
  544struct timespec;
  545#line 20 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/thread_info.h"
  546struct task_struct;
  547#line 8 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  548struct mm_struct;
  549#line 99 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/ptrace.h"
  550struct pt_regs {
  551   unsigned long r15 ;
  552   unsigned long r14 ;
  553   unsigned long r13 ;
  554   unsigned long r12 ;
  555   unsigned long bp ;
  556   unsigned long bx ;
  557   unsigned long r11 ;
  558   unsigned long r10 ;
  559   unsigned long r9 ;
  560   unsigned long r8 ;
  561   unsigned long ax ;
  562   unsigned long cx ;
  563   unsigned long dx ;
  564   unsigned long si ;
  565   unsigned long di ;
  566   unsigned long orig_ax ;
  567   unsigned long ip ;
  568   unsigned long cs ;
  569   unsigned long flags ;
  570   unsigned long sp ;
  571   unsigned long ss ;
  572};
  573#line 22 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/desc_defs.h"
  574struct __anonstruct____missing_field_name_148 {
  575   unsigned int a ;
  576   unsigned int b ;
  577};
  578#line 22 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/desc_defs.h"
  579struct __anonstruct____missing_field_name_149 {
  580   u16 limit0 ;
  581   u16 base0 ;
  582   unsigned int base1 : 8 ;
  583   unsigned int type : 4 ;
  584   unsigned int s : 1 ;
  585   unsigned int dpl : 2 ;
  586   unsigned int p : 1 ;
  587   unsigned int limit : 4 ;
  588   unsigned int avl : 1 ;
  589   unsigned int l : 1 ;
  590   unsigned int d : 1 ;
  591   unsigned int g : 1 ;
  592   unsigned int base2 : 8 ;
  593};
  594#line 22 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/desc_defs.h"
  595union __anonunion____missing_field_name_147 {
  596   struct __anonstruct____missing_field_name_148 __annonCompField19 ;
  597   struct __anonstruct____missing_field_name_149 __annonCompField20 ;
  598};
  599#line 22 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/desc_defs.h"
  600struct desc_struct {
  601   union __anonunion____missing_field_name_147 __annonCompField21 ;
  602} __attribute__((__packed__)) ;
  603#line 13 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_64_types.h"
  604typedef unsigned long pgdval_t;
  605#line 14 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_64_types.h"
  606typedef unsigned long pgprotval_t;
  607#line 192 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_types.h"
  608struct pgprot {
  609   pgprotval_t pgprot ;
  610};
  611#line 192 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_types.h"
  612typedef struct pgprot pgprot_t;
  613#line 194 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_types.h"
  614struct __anonstruct_pgd_t_153 {
  615   pgdval_t pgd ;
  616};
  617#line 194 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_types.h"
  618typedef struct __anonstruct_pgd_t_153 pgd_t;
  619#line 282 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/pgtable_types.h"
  620typedef struct page *pgtable_t;
  621#line 295
  622struct file;
  623#line 313
  624struct seq_file;
  625#line 47 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/paravirt_types.h"
  626struct thread_struct;
  627#line 53
  628struct cpumask;
  629#line 329
  630struct arch_spinlock;
  631#line 141 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/vm86.h"
  632struct kernel_vm86_regs {
  633   struct pt_regs pt ;
  634   unsigned short es ;
  635   unsigned short __esh ;
  636   unsigned short ds ;
  637   unsigned short __dsh ;
  638   unsigned short fs ;
  639   unsigned short __fsh ;
  640   unsigned short gs ;
  641   unsigned short __gsh ;
  642};
  643#line 11 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/math_emu.h"
  644union __anonunion____missing_field_name_157 {
  645   struct pt_regs *regs ;
  646   struct kernel_vm86_regs *vm86 ;
  647};
  648#line 11 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/math_emu.h"
  649struct math_emu_info {
  650   long ___orig_eip ;
  651   union __anonunion____missing_field_name_157 __annonCompField22 ;
  652};
  653#line 10 "include/asm-generic/bug.h"
  654struct bug_entry {
  655   int bug_addr_disp ;
  656   int file_disp ;
  657   unsigned short line ;
  658   unsigned short flags ;
  659};
  660#line 14 "include/linux/cpumask.h"
  661struct cpumask {
  662   unsigned long bits[((4096UL + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
  663};
  664#line 14 "include/linux/cpumask.h"
  665typedef struct cpumask cpumask_t;
  666#line 637 "include/linux/cpumask.h"
  667typedef struct cpumask *cpumask_var_t;
  668#line 153 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  669struct seq_operations;
  670#line 290 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  671struct i387_fsave_struct {
  672   u32 cwd ;
  673   u32 swd ;
  674   u32 twd ;
  675   u32 fip ;
  676   u32 fcs ;
  677   u32 foo ;
  678   u32 fos ;
  679   u32 st_space[20] ;
  680   u32 status ;
  681};
  682#line 306 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  683struct __anonstruct____missing_field_name_164 {
  684   u64 rip ;
  685   u64 rdp ;
  686};
  687#line 306 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  688struct __anonstruct____missing_field_name_165 {
  689   u32 fip ;
  690   u32 fcs ;
  691   u32 foo ;
  692   u32 fos ;
  693};
  694#line 306 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  695union __anonunion____missing_field_name_163 {
  696   struct __anonstruct____missing_field_name_164 __annonCompField26 ;
  697   struct __anonstruct____missing_field_name_165 __annonCompField27 ;
  698};
  699#line 306 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  700union __anonunion____missing_field_name_166 {
  701   u32 padding1[12] ;
  702   u32 sw_reserved[12] ;
  703};
  704#line 306 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  705struct i387_fxsave_struct {
  706   u16 cwd ;
  707   u16 swd ;
  708   u16 twd ;
  709   u16 fop ;
  710   union __anonunion____missing_field_name_163 __annonCompField28 ;
  711   u32 mxcsr ;
  712   u32 mxcsr_mask ;
  713   u32 st_space[32] ;
  714   u32 xmm_space[64] ;
  715   u32 padding[12] ;
  716   union __anonunion____missing_field_name_166 __annonCompField29 ;
  717} __attribute__((__aligned__(16))) ;
  718#line 341 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  719struct i387_soft_struct {
  720   u32 cwd ;
  721   u32 swd ;
  722   u32 twd ;
  723   u32 fip ;
  724   u32 fcs ;
  725   u32 foo ;
  726   u32 fos ;
  727   u32 st_space[20] ;
  728   u8 ftop ;
  729   u8 changed ;
  730   u8 lookahead ;
  731   u8 no_update ;
  732   u8 rm ;
  733   u8 alimit ;
  734   struct math_emu_info *info ;
  735   u32 entry_eip ;
  736};
  737#line 361 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  738struct ymmh_struct {
  739   u32 ymmh_space[64] ;
  740};
  741#line 366 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  742struct xsave_hdr_struct {
  743   u64 xstate_bv ;
  744   u64 reserved1[2] ;
  745   u64 reserved2[5] ;
  746} __attribute__((__packed__)) ;
  747#line 372 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  748struct xsave_struct {
  749   struct i387_fxsave_struct i387 ;
  750   struct xsave_hdr_struct xsave_hdr ;
  751   struct ymmh_struct ymmh ;
  752} __attribute__((__packed__, __aligned__(64))) ;
  753#line 379 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  754union thread_xstate {
  755   struct i387_fsave_struct fsave ;
  756   struct i387_fxsave_struct fxsave ;
  757   struct i387_soft_struct soft ;
  758   struct xsave_struct xsave ;
  759};
  760#line 386 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  761struct fpu {
  762   unsigned int last_cpu ;
  763   unsigned int has_fpu ;
  764   union thread_xstate *state ;
  765};
  766#line 433
  767struct kmem_cache;
  768#line 435
  769struct perf_event;
  770#line 437 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
  771struct thread_struct {
  772   struct desc_struct tls_array[3] ;
  773   unsigned long sp0 ;
  774   unsigned long sp ;
  775   unsigned long usersp ;
  776   unsigned short es ;
  777   unsigned short ds ;
  778   unsigned short fsindex ;
  779   unsigned short gsindex ;
  780   unsigned long fs ;
  781   unsigned long gs ;
  782   struct perf_event *ptrace_bps[4] ;
  783   unsigned long debugreg6 ;
  784   unsigned long ptrace_dr7 ;
  785   unsigned long cr2 ;
  786   unsigned long trap_nr ;
  787   unsigned long error_code ;
  788   struct fpu fpu ;
  789   unsigned long *io_bitmap_ptr ;
  790   unsigned long iopl ;
  791   unsigned int io_bitmap_max ;
  792};
  793#line 23 "include/asm-generic/atomic-long.h"
  794typedef atomic64_t atomic_long_t;
  795#line 14 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  796typedef u16 __ticket_t;
  797#line 15 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  798typedef u32 __ticketpair_t;
  799#line 20 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  800struct __raw_tickets {
  801   __ticket_t head ;
  802   __ticket_t tail ;
  803};
  804#line 20 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  805union __anonunion____missing_field_name_169 {
  806   __ticketpair_t head_tail ;
  807   struct __raw_tickets tickets ;
  808};
  809#line 20 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  810struct arch_spinlock {
  811   union __anonunion____missing_field_name_169 __annonCompField31 ;
  812};
  813#line 20 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/spinlock_types.h"
  814typedef struct arch_spinlock arch_spinlock_t;
  815#line 27 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/rwlock.h"
  816struct __anonstruct____missing_field_name_171 {
  817   u32 read ;
  818   s32 write ;
  819};
  820#line 27 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/rwlock.h"
  821union __anonunion_arch_rwlock_t_170 {
  822   s64 lock ;
  823   struct __anonstruct____missing_field_name_171 __annonCompField32 ;
  824};
  825#line 27 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/rwlock.h"
  826typedef union __anonunion_arch_rwlock_t_170 arch_rwlock_t;
  827#line 391 "include/linux/lockdep.h"
  828struct lock_class_key {
  829
  830};
  831#line 20 "include/linux/spinlock_types.h"
  832struct raw_spinlock {
  833   arch_spinlock_t raw_lock ;
  834   unsigned int magic ;
  835   unsigned int owner_cpu ;
  836   void *owner ;
  837};
  838#line 20 "include/linux/spinlock_types.h"
  839typedef struct raw_spinlock raw_spinlock_t;
  840#line 64 "include/linux/spinlock_types.h"
  841union __anonunion____missing_field_name_172 {
  842   struct raw_spinlock rlock ;
  843};
  844#line 64 "include/linux/spinlock_types.h"
  845struct spinlock {
  846   union __anonunion____missing_field_name_172 __annonCompField33 ;
  847};
  848#line 64 "include/linux/spinlock_types.h"
  849typedef struct spinlock spinlock_t;
  850#line 11 "include/linux/rwlock_types.h"
  851struct __anonstruct_rwlock_t_173 {
  852   arch_rwlock_t raw_lock ;
  853   unsigned int magic ;
  854   unsigned int owner_cpu ;
  855   void *owner ;
  856};
  857#line 11 "include/linux/rwlock_types.h"
  858typedef struct __anonstruct_rwlock_t_173 rwlock_t;
  859#line 49 "include/linux/wait.h"
  860struct __wait_queue_head {
  861   spinlock_t lock ;
  862   struct list_head task_list ;
  863};
  864#line 53 "include/linux/wait.h"
  865typedef struct __wait_queue_head wait_queue_head_t;
  866#line 119 "include/linux/seqlock.h"
  867struct seqcount {
  868   unsigned int sequence ;
  869};
  870#line 119 "include/linux/seqlock.h"
  871typedef struct seqcount seqcount_t;
  872#line 25 "include/linux/completion.h"
  873struct completion {
  874   unsigned int done ;
  875   wait_queue_head_t wait ;
  876};
  877#line 188 "include/linux/rcupdate.h"
  878struct notifier_block;
  879#line 33 "include/linux/list_bl.h"
  880struct hlist_bl_node;
  881#line 33 "include/linux/list_bl.h"
  882struct hlist_bl_head {
  883   struct hlist_bl_node *first ;
  884};
  885#line 37 "include/linux/list_bl.h"
  886struct hlist_bl_node {
  887   struct hlist_bl_node *next ;
  888   struct hlist_bl_node **pprev ;
  889};
  890#line 13 "include/linux/dcache.h"
  891struct nameidata;
  892#line 14
  893struct path;
  894#line 15
  895struct vfsmount;
  896#line 35 "include/linux/dcache.h"
  897struct qstr {
  898   unsigned int hash ;
  899   unsigned int len ;
  900   unsigned char    *name ;
  901};
  902#line 88
  903struct inode;
  904#line 88
  905struct dentry_operations;
  906#line 88
  907struct super_block;
  908#line 88 "include/linux/dcache.h"
  909union __anonunion_d_u_175 {
  910   struct list_head d_child ;
  911   struct rcu_head d_rcu ;
  912};
  913#line 88 "include/linux/dcache.h"
  914struct dentry {
  915   unsigned int d_flags ;
  916   seqcount_t d_seq ;
  917   struct hlist_bl_node d_hash ;
  918   struct dentry *d_parent ;
  919   struct qstr d_name ;
  920   struct inode *d_inode ;
  921   unsigned char d_iname[32] ;
  922   unsigned int d_count ;
  923   spinlock_t d_lock ;
  924   struct dentry_operations    *d_op ;
  925   struct super_block *d_sb ;
  926   unsigned long d_time ;
  927   void *d_fsdata ;
  928   struct list_head d_lru ;
  929   union __anonunion_d_u_175 d_u ;
  930   struct list_head d_subdirs ;
  931   struct list_head d_alias ;
  932};
  933#line 131 "include/linux/dcache.h"
  934struct dentry_operations {
  935   int (*d_revalidate)(struct dentry * , struct nameidata * ) ;
  936   int (*d_hash)(struct dentry    * , struct inode    * , struct qstr * ) ;
  937   int (*d_compare)(struct dentry    * , struct inode    * , struct dentry  const  * ,
  938                    struct inode    * , unsigned int  , char    * , struct qstr  const  * ) ;
  939   int (*d_delete)(struct dentry    * ) ;
  940   void (*d_release)(struct dentry * ) ;
  941   void (*d_prune)(struct dentry * ) ;
  942   void (*d_iput)(struct dentry * , struct inode * ) ;
  943   char *(*d_dname)(struct dentry * , char * , int  ) ;
  944   struct vfsmount *(*d_automount)(struct path * ) ;
  945   int (*d_manage)(struct dentry * , bool  ) ;
  946} __attribute__((__aligned__((1) <<  (6) ))) ;
  947#line 7 "include/linux/path.h"
  948struct path {
  949   struct vfsmount *mnt ;
  950   struct dentry *dentry ;
  951};
  952#line 14 "include/linux/time.h"
  953struct timespec {
  954   __kernel_time_t tv_sec ;
  955   long tv_nsec ;
  956};
  957#line 20 "include/linux/time.h"
  958struct timeval {
  959   __kernel_time_t tv_sec ;
  960   __kernel_suseconds_t tv_usec ;
  961};
  962#line 62 "include/linux/stat.h"
  963struct kstat {
  964   u64 ino ;
  965   dev_t dev ;
  966   umode_t mode ;
  967   unsigned int nlink ;
  968   uid_t uid ;
  969   gid_t gid ;
  970   dev_t rdev ;
  971   loff_t size ;
  972   struct timespec atime ;
  973   struct timespec mtime ;
  974   struct timespec ctime ;
  975   unsigned long blksize ;
  976   unsigned long long blocks ;
  977};
  978#line 64 "include/linux/radix-tree.h"
  979struct radix_tree_node;
  980#line 64 "include/linux/radix-tree.h"
  981struct radix_tree_root {
  982   unsigned int height ;
  983   gfp_t gfp_mask ;
  984   struct radix_tree_node *rnode ;
  985};
  986#line 14 "include/linux/prio_tree.h"
  987struct prio_tree_node;
  988#line 14 "include/linux/prio_tree.h"
  989struct raw_prio_tree_node {
  990   struct prio_tree_node *left ;
  991   struct prio_tree_node *right ;
  992   struct prio_tree_node *parent ;
  993};
  994#line 20 "include/linux/prio_tree.h"
  995struct prio_tree_node {
  996   struct prio_tree_node *left ;
  997   struct prio_tree_node *right ;
  998   struct prio_tree_node *parent ;
  999   unsigned long start ;
 1000   unsigned long last ;
 1001};
 1002#line 28 "include/linux/prio_tree.h"
 1003struct prio_tree_root {
 1004   struct prio_tree_node *prio_tree_node ;
 1005   unsigned short index_bits ;
 1006   unsigned short raw ;
 1007};
 1008#line 6 "include/linux/pid.h"
 1009enum pid_type {
 1010    PIDTYPE_PID = 0,
 1011    PIDTYPE_PGID = 1,
 1012    PIDTYPE_SID = 2,
 1013    PIDTYPE_MAX = 3
 1014} ;
 1015#line 50
 1016struct pid_namespace;
 1017#line 50 "include/linux/pid.h"
 1018struct upid {
 1019   int nr ;
 1020   struct pid_namespace *ns ;
 1021   struct hlist_node pid_chain ;
 1022};
 1023#line 57 "include/linux/pid.h"
 1024struct pid {
 1025   atomic_t count ;
 1026   unsigned int level ;
 1027   struct hlist_head tasks[3] ;
 1028   struct rcu_head rcu ;
 1029   struct upid numbers[1] ;
 1030};
 1031#line 69 "include/linux/pid.h"
 1032struct pid_link {
 1033   struct hlist_node node ;
 1034   struct pid *pid ;
 1035};
 1036#line 48 "include/linux/mutex.h"
 1037struct mutex {
 1038   atomic_t count ;
 1039   spinlock_t wait_lock ;
 1040   struct list_head wait_list ;
 1041   struct task_struct *owner ;
 1042   char    *name ;
 1043   void *magic ;
 1044};
 1045#line 69 "include/linux/mutex.h"
 1046struct mutex_waiter {
 1047   struct list_head list ;
 1048   struct task_struct *task ;
 1049   void *magic ;
 1050};
 1051#line 94 "include/linux/capability.h"
 1052struct kernel_cap_struct {
 1053   __u32 cap[2] ;
 1054};
 1055#line 94 "include/linux/capability.h"
 1056typedef struct kernel_cap_struct kernel_cap_t;
 1057#line 378
 1058struct user_namespace;
 1059#line 16 "include/linux/fiemap.h"
 1060struct fiemap_extent {
 1061   __u64 fe_logical ;
 1062   __u64 fe_physical ;
 1063   __u64 fe_length ;
 1064   __u64 fe_reserved64[2] ;
 1065   __u32 fe_flags ;
 1066   __u32 fe_reserved[3] ;
 1067};
 1068#line 8 "include/linux/shrinker.h"
 1069struct shrink_control {
 1070   gfp_t gfp_mask ;
 1071   unsigned long nr_to_scan ;
 1072};
 1073#line 31 "include/linux/shrinker.h"
 1074struct shrinker {
 1075   int (*shrink)(struct shrinker * , struct shrink_control *sc ) ;
 1076   int seeks ;
 1077   long batch ;
 1078   struct list_head list ;
 1079   atomic_long_t nr_in_batch ;
 1080};
 1081#line 10 "include/linux/migrate_mode.h"
 1082enum migrate_mode {
 1083    MIGRATE_ASYNC = 0,
 1084    MIGRATE_SYNC_LIGHT = 1,
 1085    MIGRATE_SYNC = 2
 1086} ;
 1087#line 408 "include/linux/fs.h"
 1088struct export_operations;
 1089#line 410
 1090struct iovec;
 1091#line 412
 1092struct kiocb;
 1093#line 413
 1094struct kobject;
 1095#line 414
 1096struct pipe_inode_info;
 1097#line 415
 1098struct poll_table_struct;
 1099#line 416
 1100struct kstatfs;
 1101#line 417
 1102struct vm_area_struct;
 1103#line 419
 1104struct cred;
 1105#line 469 "include/linux/fs.h"
 1106struct iattr {
 1107   unsigned int ia_valid ;
 1108   umode_t ia_mode ;
 1109   uid_t ia_uid ;
 1110   gid_t ia_gid ;
 1111   loff_t ia_size ;
 1112   struct timespec ia_atime ;
 1113   struct timespec ia_mtime ;
 1114   struct timespec ia_ctime ;
 1115   struct file *ia_file ;
 1116};
 1117#line 129 "include/linux/quota.h"
 1118struct if_dqinfo {
 1119   __u64 dqi_bgrace ;
 1120   __u64 dqi_igrace ;
 1121   __u32 dqi_flags ;
 1122   __u32 dqi_valid ;
 1123};
 1124#line 19 "include/linux/rwsem.h"
 1125struct rw_semaphore;
 1126#line 25 "include/linux/rwsem.h"
 1127struct rw_semaphore {
 1128   long count ;
 1129   raw_spinlock_t wait_lock ;
 1130   struct list_head wait_list ;
 1131};
 1132#line 18 "include/linux/ioport.h"
 1133struct resource {
 1134   resource_size_t start ;
 1135   resource_size_t end ;
 1136   char    *name ;
 1137   unsigned long flags ;
 1138   struct resource *parent ;
 1139   struct resource *sibling ;
 1140   struct resource *child ;
 1141};
 1142#line 182 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/x86_init.h"
 1143struct pci_dev;
 1144#line 15 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/tsc.h"
 1145typedef unsigned long long cycles_t;
 1146#line 46 "include/linux/ktime.h"
 1147union ktime {
 1148   s64 tv64 ;
 1149};
 1150#line 59 "include/linux/ktime.h"
 1151typedef union ktime ktime_t;
 1152#line 10 "include/linux/timer.h"
 1153struct tvec_base;
 1154#line 12 "include/linux/timer.h"
 1155struct timer_list {
 1156   struct list_head entry ;
 1157   unsigned long expires ;
 1158   struct tvec_base *base ;
 1159   void (*function)(unsigned long  ) ;
 1160   unsigned long data ;
 1161   int slack ;
 1162   int start_pid ;
 1163   void *start_site ;
 1164   char start_comm[16] ;
 1165};
 1166#line 289
 1167struct hrtimer;
 1168#line 290
 1169enum hrtimer_restart;
 1170#line 15 "include/linux/workqueue.h"
 1171struct workqueue_struct;
 1172#line 17
 1173struct work_struct;
 1174#line 79 "include/linux/workqueue.h"
 1175struct work_struct {
 1176   atomic_long_t data ;
 1177   struct list_head entry ;
 1178   void (*func)(struct work_struct *work ) ;
 1179};
 1180#line 92 "include/linux/workqueue.h"
 1181struct delayed_work {
 1182   struct work_struct work ;
 1183   struct timer_list timer ;
 1184};
 1185#line 50 "include/linux/pm.h"
 1186struct pm_message {
 1187   int event ;
 1188};
 1189#line 50 "include/linux/pm.h"
 1190typedef struct pm_message pm_message_t;
 1191#line 264 "include/linux/pm.h"
 1192struct dev_pm_ops {
 1193   int (*prepare)(struct device *dev ) ;
 1194   void (*complete)(struct device *dev ) ;
 1195   int (*suspend)(struct device *dev ) ;
 1196   int (*resume)(struct device *dev ) ;
 1197   int (*freeze)(struct device *dev ) ;
 1198   int (*thaw)(struct device *dev ) ;
 1199   int (*poweroff)(struct device *dev ) ;
 1200   int (*restore)(struct device *dev ) ;
 1201   int (*suspend_late)(struct device *dev ) ;
 1202   int (*resume_early)(struct device *dev ) ;
 1203   int (*freeze_late)(struct device *dev ) ;
 1204   int (*thaw_early)(struct device *dev ) ;
 1205   int (*poweroff_late)(struct device *dev ) ;
 1206   int (*restore_early)(struct device *dev ) ;
 1207   int (*suspend_noirq)(struct device *dev ) ;
 1208   int (*resume_noirq)(struct device *dev ) ;
 1209   int (*freeze_noirq)(struct device *dev ) ;
 1210   int (*thaw_noirq)(struct device *dev ) ;
 1211   int (*poweroff_noirq)(struct device *dev ) ;
 1212   int (*restore_noirq)(struct device *dev ) ;
 1213   int (*runtime_suspend)(struct device *dev ) ;
 1214   int (*runtime_resume)(struct device *dev ) ;
 1215   int (*runtime_idle)(struct device *dev ) ;
 1216};
 1217#line 458
 1218enum rpm_status {
 1219    RPM_ACTIVE = 0,
 1220    RPM_RESUMING = 1,
 1221    RPM_SUSPENDED = 2,
 1222    RPM_SUSPENDING = 3
 1223} ;
 1224#line 480
 1225enum rpm_request {
 1226    RPM_REQ_NONE = 0,
 1227    RPM_REQ_IDLE = 1,
 1228    RPM_REQ_SUSPEND = 2,
 1229    RPM_REQ_AUTOSUSPEND = 3,
 1230    RPM_REQ_RESUME = 4
 1231} ;
 1232#line 488
 1233struct wakeup_source;
 1234#line 495 "include/linux/pm.h"
 1235struct pm_subsys_data {
 1236   spinlock_t lock ;
 1237   unsigned int refcount ;
 1238};
 1239#line 506
 1240struct dev_pm_qos_request;
 1241#line 506
 1242struct pm_qos_raints;
 1243#line 506 "include/linux/pm.h"
 1244struct dev_pm_info {
 1245   pm_message_t power_state ;
 1246   unsigned int can_wakeup : 1 ;
 1247   unsigned int async_suspend : 1 ;
 1248   bool is_prepared : 1 ;
 1249   bool is_suspended : 1 ;
 1250   bool ignore_children : 1 ;
 1251   spinlock_t lock ;
 1252   struct list_head entry ;
 1253   struct completion completion ;
 1254   struct wakeup_source *wakeup ;
 1255   bool wakeup_path : 1 ;
 1256   struct timer_list suspend_timer ;
 1257   unsigned long timer_expires ;
 1258   struct work_struct work ;
 1259   wait_queue_head_t wait_queue ;
 1260   atomic_t usage_count ;
 1261   atomic_t child_count ;
 1262   unsigned int disable_depth : 3 ;
 1263   unsigned int idle_notification : 1 ;
 1264   unsigned int request_pending : 1 ;
 1265   unsigned int deferred_resume : 1 ;
 1266   unsigned int run_wake : 1 ;
 1267   unsigned int runtime_auto : 1 ;
 1268   unsigned int no_callbacks : 1 ;
 1269   unsigned int irq_safe : 1 ;
 1270   unsigned int use_autosuspend : 1 ;
 1271   unsigned int timer_autosuspends : 1 ;
 1272   enum rpm_request request ;
 1273   enum rpm_status runtime_status ;
 1274   int runtime_error ;
 1275   int autosuspend_delay ;
 1276   unsigned long last_busy ;
 1277   unsigned long active_jiffies ;
 1278   unsigned long suspended_jiffies ;
 1279   unsigned long accounting_timestamp ;
 1280   ktime_t suspend_time ;
 1281   s64 max_time_suspended_ns ;
 1282   struct dev_pm_qos_request *pq_req ;
 1283   struct pm_subsys_data *subsys_data ;
 1284   struct pm_qos_raints *raints ;
 1285};
 1286#line 564 "include/linux/pm.h"
 1287struct dev_pm_domain {
 1288   struct dev_pm_ops ops ;
 1289};
 1290#line 98 "include/linux/nodemask.h"
 1291struct __anonstruct_nodemask_t_247 {
 1292   unsigned long bits[(((unsigned long )(1 << 10) + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
 1293};
 1294#line 98 "include/linux/nodemask.h"
 1295typedef struct __anonstruct_nodemask_t_247 nodemask_t;
 1296#line 174 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/topology.h"
 1297struct pci_bus;
 1298#line 11 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/mmu.h"
 1299struct __anonstruct_mm_context_t_248 {
 1300   void *ldt ;
 1301   int size ;
 1302   unsigned short ia32_compat ;
 1303   struct mutex lock ;
 1304   void *vdso ;
 1305};
 1306#line 11 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/mmu.h"
 1307typedef struct __anonstruct_mm_context_t_248 mm_context_t;
 1308#line 50 "include/linux/dqblk_xfs.h"
 1309struct fs_disk_quota {
 1310   __s8 d_version ;
 1311   __s8 d_flags ;
 1312   __u16 d_fieldmask ;
 1313   __u32 d_id ;
 1314   __u64 d_blk_hardlimit ;
 1315   __u64 d_blk_softlimit ;
 1316   __u64 d_ino_hardlimit ;
 1317   __u64 d_ino_softlimit ;
 1318   __u64 d_bcount ;
 1319   __u64 d_icount ;
 1320   __s32 d_itimer ;
 1321   __s32 d_btimer ;
 1322   __u16 d_iwarns ;
 1323   __u16 d_bwarns ;
 1324   __s32 d_padding2 ;
 1325   __u64 d_rtb_hardlimit ;
 1326   __u64 d_rtb_softlimit ;
 1327   __u64 d_rtbcount ;
 1328   __s32 d_rtbtimer ;
 1329   __u16 d_rtbwarns ;
 1330   __s16 d_padding3 ;
 1331   char d_padding4[8] ;
 1332};
 1333#line 146 "include/linux/dqblk_xfs.h"
 1334struct fs_qfilestat {
 1335   __u64 qfs_ino ;
 1336   __u64 qfs_nblks ;
 1337   __u32 qfs_nextents ;
 1338};
 1339#line 146 "include/linux/dqblk_xfs.h"
 1340typedef struct fs_qfilestat fs_qfilestat_t;
 1341#line 152 "include/linux/dqblk_xfs.h"
 1342struct fs_quota_stat {
 1343   __s8 qs_version ;
 1344   __u16 qs_flags ;
 1345   __s8 qs_pad ;
 1346   fs_qfilestat_t qs_uquota ;
 1347   fs_qfilestat_t qs_gquota ;
 1348   __u32 qs_incoredqs ;
 1349   __s32 qs_btimelimit ;
 1350   __s32 qs_itimelimit ;
 1351   __s32 qs_rtbtimelimit ;
 1352   __u16 qs_bwarnlimit ;
 1353   __u16 qs_iwarnlimit ;
 1354};
 1355#line 17 "include/linux/dqblk_qtree.h"
 1356struct dquot;
 1357#line 185 "include/linux/quota.h"
 1358typedef __kernel_uid32_t qid_t;
 1359#line 186 "include/linux/quota.h"
 1360typedef long long qsize_t;
 1361#line 200 "include/linux/quota.h"
 1362struct mem_dqblk {
 1363   qsize_t dqb_bhardlimit ;
 1364   qsize_t dqb_bsoftlimit ;
 1365   qsize_t dqb_curspace ;
 1366   qsize_t dqb_rsvspace ;
 1367   qsize_t dqb_ihardlimit ;
 1368   qsize_t dqb_isoftlimit ;
 1369   qsize_t dqb_curinodes ;
 1370   time_t dqb_btime ;
 1371   time_t dqb_itime ;
 1372};
 1373#line 215
 1374struct quota_format_type;
 1375#line 217 "include/linux/quota.h"
 1376struct mem_dqinfo {
 1377   struct quota_format_type *dqi_format ;
 1378   int dqi_fmt_id ;
 1379   struct list_head dqi_dirty_list ;
 1380   unsigned long dqi_flags ;
 1381   unsigned int dqi_bgrace ;
 1382   unsigned int dqi_igrace ;
 1383   qsize_t dqi_maxblimit ;
 1384   qsize_t dqi_maxilimit ;
 1385   void *dqi_priv ;
 1386};
 1387#line 288 "include/linux/quota.h"
 1388struct dquot {
 1389   struct hlist_node dq_hash ;
 1390   struct list_head dq_inuse ;
 1391   struct list_head dq_free ;
 1392   struct list_head dq_dirty ;
 1393   struct mutex dq_lock ;
 1394   atomic_t dq_count ;
 1395   wait_queue_head_t dq_wait_unused ;
 1396   struct super_block *dq_sb ;
 1397   unsigned int dq_id ;
 1398   loff_t dq_off ;
 1399   unsigned long dq_flags ;
 1400   short dq_type ;
 1401   struct mem_dqblk dq_dqb ;
 1402};
 1403#line 305 "include/linux/quota.h"
 1404struct quota_format_ops {
 1405   int (*check_quota_file)(struct super_block *sb , int type ) ;
 1406   int (*read_file_info)(struct super_block *sb , int type ) ;
 1407   int (*write_file_info)(struct super_block *sb , int type ) ;
 1408   int (*free_file_info)(struct super_block *sb , int type ) ;
 1409   int (*read_dqblk)(struct dquot *dquot ) ;
 1410   int (*commit_dqblk)(struct dquot *dquot ) ;
 1411   int (*release_dqblk)(struct dquot *dquot ) ;
 1412};
 1413#line 316 "include/linux/quota.h"
 1414struct dquot_operations {
 1415   int (*write_dquot)(struct dquot * ) ;
 1416   struct dquot *(*alloc_dquot)(struct super_block * , int  ) ;
 1417   void (*destroy_dquot)(struct dquot * ) ;
 1418   int (*acquire_dquot)(struct dquot * ) ;
 1419   int (*release_dquot)(struct dquot * ) ;
 1420   int (*mark_dirty)(struct dquot * ) ;
 1421   int (*write_info)(struct super_block * , int  ) ;
 1422   qsize_t *(*get_reserved_space)(struct inode * ) ;
 1423};
 1424#line 332 "include/linux/quota.h"
 1425struct quotactl_ops {
 1426   int (*quota_on)(struct super_block * , int  , int  , struct path * ) ;
 1427   int (*quota_on_meta)(struct super_block * , int  , int  ) ;
 1428   int (*quota_off)(struct super_block * , int  ) ;
 1429   int (*quota_sync)(struct super_block * , int  , int  ) ;
 1430   int (*get_info)(struct super_block * , int  , struct if_dqinfo * ) ;
 1431   int (*set_info)(struct super_block * , int  , struct if_dqinfo * ) ;
 1432   int (*get_dqblk)(struct super_block * , int  , qid_t  , struct fs_disk_quota * ) ;
 1433   int (*set_dqblk)(struct super_block * , int  , qid_t  , struct fs_disk_quota * ) ;
 1434   int (*get_xstate)(struct super_block * , struct fs_quota_stat * ) ;
 1435   int (*set_xstate)(struct super_block * , unsigned int  , int  ) ;
 1436};
 1437#line 345 "include/linux/quota.h"
 1438struct quota_format_type {
 1439   int qf_fmt_id ;
 1440   struct quota_format_ops    *qf_ops ;
 1441   struct module *qf_owner ;
 1442   struct quota_format_type *qf_next ;
 1443};
 1444#line 399 "include/linux/quota.h"
 1445struct quota_info {
 1446   unsigned int flags ;
 1447   struct mutex dqio_mutex ;
 1448   struct mutex dqonoff_mutex ;
 1449   struct rw_semaphore dqptr_sem ;
 1450   struct inode *files[2] ;
 1451   struct mem_dqinfo info[2] ;
 1452   struct quota_format_ops    *ops[2] ;
 1453};
 1454#line 533 "include/linux/fs.h"
 1455struct address_space;
 1456#line 534
 1457struct writeback_control;
 1458#line 577 "include/linux/fs.h"
 1459union __anonunion_arg_278 {
 1460   char *buf ;
 1461   void *data ;
 1462};
 1463#line 577 "include/linux/fs.h"
 1464struct __anonstruct_read_descriptor_t_277 {
 1465   size_t written ;
 1466   size_t count ;
 1467   union __anonunion_arg_278 arg ;
 1468   int error ;
 1469};
 1470#line 577 "include/linux/fs.h"
 1471typedef struct __anonstruct_read_descriptor_t_277 read_descriptor_t;
 1472#line 590 "include/linux/fs.h"
 1473struct address_space_operations {
 1474   int (*writepage)(struct page *page , struct writeback_control *wbc ) ;
 1475   int (*readpage)(struct file * , struct page * ) ;
 1476   int (*writepages)(struct address_space * , struct writeback_control * ) ;
 1477   int (*set_page_dirty)(struct page *page ) ;
 1478   int (*readpages)(struct file *filp , struct address_space *mapping , struct list_head *pages ,
 1479                    unsigned int nr_pages ) ;
 1480   int (*write_begin)(struct file * , struct address_space *mapping , loff_t pos ,
 1481                      unsigned int len , unsigned int flags , struct page **pagep ,
 1482                      void **fsdata ) ;
 1483   int (*write_end)(struct file * , struct address_space *mapping , loff_t pos , unsigned int len ,
 1484                    unsigned int copied , struct page *page , void *fsdata ) ;
 1485   sector_t (*bmap)(struct address_space * , sector_t  ) ;
 1486   void (*invalidatepage)(struct page * , unsigned long  ) ;
 1487   int (*releasepage)(struct page * , gfp_t  ) ;
 1488   void (*freepage)(struct page * ) ;
 1489   ssize_t (*direct_IO)(int  , struct kiocb * , struct iovec    *iov , loff_t offset ,
 1490                        unsigned long nr_segs ) ;
 1491   int (*get_xip_mem)(struct address_space * , unsigned long  , int  , void ** , unsigned long * ) ;
 1492   int (*migratepage)(struct address_space * , struct page * , struct page * , enum migrate_mode  ) ;
 1493   int (*launder_page)(struct page * ) ;
 1494   int (*is_partially_uptodate)(struct page * , read_descriptor_t * , unsigned long  ) ;
 1495   int (*error_remove_page)(struct address_space * , struct page * ) ;
 1496};
 1497#line 645
 1498struct backing_dev_info;
 1499#line 646 "include/linux/fs.h"
 1500struct address_space {
 1501   struct inode *host ;
 1502   struct radix_tree_root page_tree ;
 1503   spinlock_t tree_lock ;
 1504   unsigned int i_mmap_writable ;
 1505   struct prio_tree_root i_mmap ;
 1506   struct list_head i_mmap_nonlinear ;
 1507   struct mutex i_mmap_mutex ;
 1508   unsigned long nrpages ;
 1509   unsigned long writeback_index ;
 1510   struct address_space_operations    *a_ops ;
 1511   unsigned long flags ;
 1512   struct backing_dev_info *backing_dev_info ;
 1513   spinlock_t private_lock ;
 1514   struct list_head private_list ;
 1515   struct address_space *assoc_mapping ;
 1516} __attribute__((__aligned__(sizeof(long )))) ;
 1517#line 669
 1518struct request_queue;
 1519#line 671
 1520struct hd_struct;
 1521#line 671
 1522struct gendisk;
 1523#line 671 "include/linux/fs.h"
 1524struct block_device {
 1525   dev_t bd_dev ;
 1526   int bd_openers ;
 1527   struct inode *bd_inode ;
 1528   struct super_block *bd_super ;
 1529   struct mutex bd_mutex ;
 1530   struct list_head bd_inodes ;
 1531   void *bd_claiming ;
 1532   void *bd_holder ;
 1533   int bd_holders ;
 1534   bool bd_write_holder ;
 1535   struct list_head bd_holder_disks ;
 1536   struct block_device *bd_contains ;
 1537   unsigned int bd_block_size ;
 1538   struct hd_struct *bd_part ;
 1539   unsigned int bd_part_count ;
 1540   int bd_invalidated ;
 1541   struct gendisk *bd_disk ;
 1542   struct request_queue *bd_queue ;
 1543   struct list_head bd_list ;
 1544   unsigned long bd_private ;
 1545   int bd_fsfreeze_count ;
 1546   struct mutex bd_fsfreeze_mutex ;
 1547};
 1548#line 749
 1549struct posix_acl;
 1550#line 761
 1551struct inode_operations;
 1552#line 761 "include/linux/fs.h"
 1553union __anonunion____missing_field_name_279 {
 1554   unsigned int    i_nlink ;
 1555   unsigned int __i_nlink ;
 1556};
 1557#line 761 "include/linux/fs.h"
 1558union __anonunion____missing_field_name_280 {
 1559   struct list_head i_dentry ;
 1560   struct rcu_head i_rcu ;
 1561};
 1562#line 761
 1563struct file_lock;
 1564#line 761
 1565struct cdev;
 1566#line 761 "include/linux/fs.h"
 1567union __anonunion____missing_field_name_281 {
 1568   struct pipe_inode_info *i_pipe ;
 1569   struct block_device *i_bdev ;
 1570   struct cdev *i_cdev ;
 1571};
 1572#line 761 "include/linux/fs.h"
 1573struct inode {
 1574   umode_t i_mode ;
 1575   unsigned short i_opflags ;
 1576   uid_t i_uid ;
 1577   gid_t i_gid ;
 1578   unsigned int i_flags ;
 1579   struct posix_acl *i_acl ;
 1580   struct posix_acl *i_default_acl ;
 1581   struct inode_operations    *i_op ;
 1582   struct super_block *i_sb ;
 1583   struct address_space *i_mapping ;
 1584   void *i_security ;
 1585   unsigned long i_ino ;
 1586   union __anonunion____missing_field_name_279 __annonCompField44 ;
 1587   dev_t i_rdev ;
 1588   struct timespec i_atime ;
 1589   struct timespec i_mtime ;
 1590   struct timespec i_ctime ;
 1591   spinlock_t i_lock ;
 1592   unsigned short i_bytes ;
 1593   blkcnt_t i_blocks ;
 1594   loff_t i_size ;
 1595   unsigned long i_state ;
 1596   struct mutex i_mutex ;
 1597   unsigned long dirtied_when ;
 1598   struct hlist_node i_hash ;
 1599   struct list_head i_wb_list ;
 1600   struct list_head i_lru ;
 1601   struct list_head i_sb_list ;
 1602   union __anonunion____missing_field_name_280 __annonCompField45 ;
 1603   atomic_t i_count ;
 1604   unsigned int i_blkbits ;
 1605   u64 i_version ;
 1606   atomic_t i_dio_count ;
 1607   atomic_t i_writecount ;
 1608   struct file_operations    *i_fop ;
 1609   struct file_lock *i_flock ;
 1610   struct address_space i_data ;
 1611   struct dquot *i_dquot[2] ;
 1612   struct list_head i_devices ;
 1613   union __anonunion____missing_field_name_281 __annonCompField46 ;
 1614   __u32 i_generation ;
 1615   __u32 i_fsnotify_mask ;
 1616   struct hlist_head i_fsnotify_marks ;
 1617   atomic_t i_readcount ;
 1618   void *i_private ;
 1619};
 1620#line 942 "include/linux/fs.h"
 1621struct fown_struct {
 1622   rwlock_t lock ;
 1623   struct pid *pid ;
 1624   enum pid_type pid_type ;
 1625   uid_t uid ;
 1626   uid_t euid ;
 1627   int signum ;
 1628};
 1629#line 953 "include/linux/fs.h"
 1630struct file_ra_state {
 1631   unsigned long start ;
 1632   unsigned int size ;
 1633   unsigned int async_size ;
 1634   unsigned int ra_pages ;
 1635   unsigned int mmap_miss ;
 1636   loff_t prev_pos ;
 1637};
 1638#line 976 "include/linux/fs.h"
 1639union __anonunion_f_u_282 {
 1640   struct list_head fu_list ;
 1641   struct rcu_head fu_rcuhead ;
 1642};
 1643#line 976 "include/linux/fs.h"
 1644struct file {
 1645   union __anonunion_f_u_282 f_u ;
 1646   struct path f_path ;
 1647   struct file_operations    *f_op ;
 1648   spinlock_t f_lock ;
 1649   int f_sb_list_cpu ;
 1650   atomic_long_t f_count ;
 1651   unsigned int f_flags ;
 1652   fmode_t f_mode ;
 1653   loff_t f_pos ;
 1654   struct fown_struct f_owner ;
 1655   struct cred    *f_cred ;
 1656   struct file_ra_state f_ra ;
 1657   u64 f_version ;
 1658   void *f_security ;
 1659   void *private_data ;
 1660   struct list_head f_ep_links ;
 1661   struct list_head f_tfile_llink ;
 1662   struct address_space *f_mapping ;
 1663   unsigned long f_mnt_write_state ;
 1664};
 1665#line 1111
 1666struct files_struct;
 1667#line 1111 "include/linux/fs.h"
 1668typedef struct files_struct *fl_owner_t;
 1669#line 1113 "include/linux/fs.h"
 1670struct file_lock_operations {
 1671   void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
 1672   void (*fl_release_private)(struct file_lock * ) ;
 1673};
 1674#line 1118 "include/linux/fs.h"
 1675struct lock_manager_operations {
 1676   int (*lm_compare_owner)(struct file_lock * , struct file_lock * ) ;
 1677   void (*lm_notify)(struct file_lock * ) ;
 1678   int (*lm_grant)(struct file_lock * , struct file_lock * , int  ) ;
 1679   void (*lm_release_private)(struct file_lock * ) ;
 1680   void (*lm_break)(struct file_lock * ) ;
 1681   int (*lm_change)(struct file_lock ** , int  ) ;
 1682};
 1683#line 4 "include/linux/nfs_fs_i.h"
 1684struct nlm_lockowner;
 1685#line 9 "include/linux/nfs_fs_i.h"
 1686struct nfs_lock_info {
 1687   u32 state ;
 1688   struct nlm_lockowner *owner ;
 1689   struct list_head list ;
 1690};
 1691#line 15
 1692struct nfs4_lock_state;
 1693#line 16 "include/linux/nfs_fs_i.h"
 1694struct nfs4_lock_info {
 1695   struct nfs4_lock_state *owner ;
 1696};
 1697#line 1138 "include/linux/fs.h"
 1698struct fasync_struct;
 1699#line 1138 "include/linux/fs.h"
 1700struct __anonstruct_afs_284 {
 1701   struct list_head link ;
 1702   int state ;
 1703};
 1704#line 1138 "include/linux/fs.h"
 1705union __anonunion_fl_u_283 {
 1706   struct nfs_lock_info nfs_fl ;
 1707   struct nfs4_lock_info nfs4_fl ;
 1708   struct __anonstruct_afs_284 afs ;
 1709};
 1710#line 1138 "include/linux/fs.h"
 1711struct file_lock {
 1712   struct file_lock *fl_next ;
 1713   struct list_head fl_link ;
 1714   struct list_head fl_block ;
 1715   fl_owner_t fl_owner ;
 1716   unsigned int fl_flags ;
 1717   unsigned char fl_type ;
 1718   unsigned int fl_pid ;
 1719   struct pid *fl_nspid ;
 1720   wait_queue_head_t fl_wait ;
 1721   struct file *fl_file ;
 1722   loff_t fl_start ;
 1723   loff_t fl_end ;
 1724   struct fasync_struct *fl_fasync ;
 1725   unsigned long fl_break_time ;
 1726   unsigned long fl_downgrade_time ;
 1727   struct file_lock_operations    *fl_ops ;
 1728   struct lock_manager_operations    *fl_lmops ;
 1729   union __anonunion_fl_u_283 fl_u ;
 1730};
 1731#line 1378 "include/linux/fs.h"
 1732struct fasync_struct {
 1733   spinlock_t fa_lock ;
 1734   int magic ;
 1735   int fa_fd ;
 1736   struct fasync_struct *fa_next ;
 1737   struct file *fa_file ;
 1738   struct rcu_head fa_rcu ;
 1739};
 1740#line 1418
 1741struct file_system_type;
 1742#line 1418
 1743struct super_operations;
 1744#line 1418
 1745struct xattr_handler;
 1746#line 1418
 1747struct mtd_info;
 1748#line 1418 "include/linux/fs.h"
 1749struct super_block {
 1750   struct list_head s_list ;
 1751   dev_t s_dev ;
 1752   unsigned char s_dirt ;
 1753   unsigned char s_blocksize_bits ;
 1754   unsigned long s_blocksize ;
 1755   loff_t s_maxbytes ;
 1756   struct file_system_type *s_type ;
 1757   struct super_operations    *s_op ;
 1758   struct dquot_operations    *dq_op ;
 1759   struct quotactl_ops    *s_qcop ;
 1760   struct export_operations    *s_export_op ;
 1761   unsigned long s_flags ;
 1762   unsigned long s_magic ;
 1763   struct dentry *s_root ;
 1764   struct rw_semaphore s_umount ;
 1765   struct mutex s_lock ;
 1766   int s_count ;
 1767   atomic_t s_active ;
 1768   void *s_security ;
 1769   struct xattr_handler    **s_xattr ;
 1770   struct list_head s_inodes ;
 1771   struct hlist_bl_head s_anon ;
 1772   struct list_head *s_files ;
 1773   struct list_head s_mounts ;
 1774   struct list_head s_dentry_lru ;
 1775   int s_nr_dentry_unused ;
 1776   spinlock_t s_inode_lru_lock  __attribute__((__aligned__((1) <<  (6) ))) ;
 1777   struct list_head s_inode_lru ;
 1778   int s_nr_inodes_unused ;
 1779   struct block_device *s_bdev ;
 1780   struct backing_dev_info *s_bdi ;
 1781   struct mtd_info *s_mtd ;
 1782   struct hlist_node s_instances ;
 1783   struct quota_info s_dquot ;
 1784   int s_frozen ;
 1785   wait_queue_head_t s_wait_unfrozen ;
 1786   char s_id[32] ;
 1787   u8 s_uuid[16] ;
 1788   void *s_fs_info ;
 1789   unsigned int s_max_links ;
 1790   fmode_t s_mode ;
 1791   u32 s_time_gran ;
 1792   struct mutex s_vfs_rename_mutex ;
 1793   char *s_subtype ;
 1794   char *s_options ;
 1795   struct dentry_operations    *s_d_op ;
 1796   int cleancache_poolid ;
 1797   struct shrinker s_shrink ;
 1798   atomic_long_t s_remove_count ;
 1799   int s_readonly_remount ;
 1800};
 1801#line 1567 "include/linux/fs.h"
 1802struct fiemap_extent_info {
 1803   unsigned int fi_flags ;
 1804   unsigned int fi_extents_mapped ;
 1805   unsigned int fi_extents_max ;
 1806   struct fiemap_extent *fi_extents_start ;
 1807};
 1808#line 1609 "include/linux/fs.h"
 1809struct file_operations {
 1810   struct module *owner ;
 1811   loff_t (*llseek)(struct file * , loff_t  , int  ) ;
 1812   ssize_t (*read)(struct file * , char * , size_t  , loff_t * ) ;
 1813   ssize_t (*write)(struct file * , char    * , size_t  , loff_t * ) ;
 1814   ssize_t (*aio_read)(struct kiocb * , struct iovec    * , unsigned long  ,
 1815                       loff_t  ) ;
 1816   ssize_t (*aio_write)(struct kiocb * , struct iovec    * , unsigned long  ,
 1817                        loff_t  ) ;
 1818   int (*readdir)(struct file * , void * , int (*)(void * , char    * , int  ,
 1819                                                   loff_t  , u64  , unsigned int  ) ) ;
 1820   unsigned int (*poll)(struct file * , struct poll_table_struct * ) ;
 1821   long (*unlocked_ioctl)(struct file * , unsigned int  , unsigned long  ) ;
 1822   long (*compat_ioctl)(struct file * , unsigned int  , unsigned long  ) ;
 1823   int (*mmap)(struct file * , struct vm_area_struct * ) ;
 1824   int (*open)(struct inode * , struct file * ) ;
 1825   int (*flush)(struct file * , fl_owner_t id ) ;
 1826   int (*release)(struct inode * , struct file * ) ;
 1827   int (*fsync)(struct file * , loff_t  , loff_t  , int datasync ) ;
 1828   int (*aio_fsync)(struct kiocb * , int datasync ) ;
 1829   int (*fasync)(int  , struct file * , int  ) ;
 1830   int (*lock)(struct file * , int  , struct file_lock * ) ;
 1831   ssize_t (*sendpage)(struct file * , struct page * , int  , size_t  , loff_t * ,
 1832                       int  ) ;
 1833   unsigned long (*get_unmapped_area)(struct file * , unsigned long  , unsigned long  ,
 1834                                      unsigned long  , unsigned long  ) ;
 1835   int (*check_flags)(int  ) ;
 1836   int (*flock)(struct file * , int  , struct file_lock * ) ;
 1837   ssize_t (*splice_write)(struct pipe_inode_info * , struct file * , loff_t * , size_t  ,
 1838                           unsigned int  ) ;
 1839   ssize_t (*splice_read)(struct file * , loff_t * , struct pipe_inode_info * , size_t  ,
 1840                          unsigned int  ) ;
 1841   int (*setlease)(struct file * , long  , struct file_lock ** ) ;
 1842   long (*fallocate)(struct file *file , int mode , loff_t offset , loff_t len ) ;
 1843};
 1844#line 1639 "include/linux/fs.h"
 1845struct inode_operations {
 1846   struct dentry *(*lookup)(struct inode * , struct dentry * , struct nameidata * ) ;
 1847   void *(*follow_link)(struct dentry * , struct nameidata * ) ;
 1848   int (*permission)(struct inode * , int  ) ;
 1849   struct posix_acl *(*get_acl)(struct inode * , int  ) ;
 1850   int (*readlink)(struct dentry * , char * , int  ) ;
 1851   void (*put_link)(struct dentry * , struct nameidata * , void * ) ;
 1852   int (*create)(struct inode * , struct dentry * , umode_t  , struct nameidata * ) ;
 1853   int (*link)(struct dentry * , struct inode * , struct dentry * ) ;
 1854   int (*unlink)(struct inode * , struct dentry * ) ;
 1855   int (*symlink)(struct inode * , struct dentry * , char    * ) ;
 1856   int (*mkdir)(struct inode * , struct dentry * , umode_t  ) ;
 1857   int (*rmdir)(struct inode * , struct dentry * ) ;
 1858   int (*mknod)(struct inode * , struct dentry * , umode_t  , dev_t  ) ;
 1859   int (*rename)(struct inode * , struct dentry * , struct inode * , struct dentry * ) ;
 1860   void (*truncate)(struct inode * ) ;
 1861   int (*setattr)(struct dentry * , struct iattr * ) ;
 1862   int (*getattr)(struct vfsmount *mnt , struct dentry * , struct kstat * ) ;
 1863   int (*setxattr)(struct dentry * , char    * , void    * , size_t  , int  ) ;
 1864   ssize_t (*getxattr)(struct dentry * , char    * , void * , size_t  ) ;
 1865   ssize_t (*listxattr)(struct dentry * , char * , size_t  ) ;
 1866   int (*removexattr)(struct dentry * , char    * ) ;
 1867   void (*truncate_range)(struct inode * , loff_t  , loff_t  ) ;
 1868   int (*fiemap)(struct inode * , struct fiemap_extent_info * , u64 start , u64 len ) ;
 1869} __attribute__((__aligned__((1) <<  (6) ))) ;
 1870#line 1684 "include/linux/fs.h"
 1871struct super_operations {
 1872   struct inode *(*alloc_inode)(struct super_block *sb ) ;
 1873   void (*destroy_inode)(struct inode * ) ;
 1874   void (*dirty_inode)(struct inode * , int flags ) ;
 1875   int (*write_inode)(struct inode * , struct writeback_control *wbc ) ;
 1876   int (*drop_inode)(struct inode * ) ;
 1877   void (*evict_inode)(struct inode * ) ;
 1878   void (*put_super)(struct super_block * ) ;
 1879   void (*write_super)(struct super_block * ) ;
 1880   int (*sync_fs)(struct super_block *sb , int wait ) ;
 1881   int (*freeze_fs)(struct super_block * ) ;
 1882   int (*unfreeze_fs)(struct super_block * ) ;
 1883   int (*statfs)(struct dentry * , struct kstatfs * ) ;
 1884   int (*remount_fs)(struct super_block * , int * , char * ) ;
 1885   void (*umount_begin)(struct super_block * ) ;
 1886   int (*show_options)(struct seq_file * , struct dentry * ) ;
 1887   int (*show_devname)(struct seq_file * , struct dentry * ) ;
 1888   int (*show_path)(struct seq_file * , struct dentry * ) ;
 1889   int (*show_stats)(struct seq_file * , struct dentry * ) ;
 1890   ssize_t (*quota_read)(struct super_block * , int  , char * , size_t  , loff_t  ) ;
 1891   ssize_t (*quota_write)(struct super_block * , int  , char    * , size_t  ,
 1892                          loff_t  ) ;
 1893   int (*bdev_try_to_free_page)(struct super_block * , struct page * , gfp_t  ) ;
 1894   int (*nr_cached_objects)(struct super_block * ) ;
 1895   void (*free_cached_objects)(struct super_block * , int  ) ;
 1896};
 1897#line 1835 "include/linux/fs.h"
 1898struct file_system_type {
 1899   char    *name ;
 1900   int fs_flags ;
 1901   struct dentry *(*mount)(struct file_system_type * , int  , char    * , void * ) ;
 1902   void (*kill_sb)(struct super_block * ) ;
 1903   struct module *owner ;
 1904   struct file_system_type *next ;
 1905   struct hlist_head fs_supers ;
 1906   struct lock_class_key s_lock_key ;
 1907   struct lock_class_key s_umount_key ;
 1908   struct lock_class_key s_vfs_rename_key ;
 1909   struct lock_class_key i_lock_key ;
 1910   struct lock_class_key i_mutex_key ;
 1911   struct lock_class_key i_mutex_dir_key ;
 1912};
 1913#line 50 "include/linux/notifier.h"
 1914struct notifier_block {
 1915   int (*notifier_call)(struct notifier_block * , unsigned long  , void * ) ;
 1916   struct notifier_block *next ;
 1917   int priority ;
 1918};
 1919#line 20 "include/linux/kobject_ns.h"
 1920struct sock;
 1921#line 27
 1922enum kobj_ns_type {
 1923    KOBJ_NS_TYPE_NONE = 0,
 1924    KOBJ_NS_TYPE_NET = 1,
 1925    KOBJ_NS_TYPES = 2
 1926} ;
 1927#line 40 "include/linux/kobject_ns.h"
 1928struct kobj_ns_type_operations {
 1929   enum kobj_ns_type type ;
 1930   void *(*grab_current_ns)(void) ;
 1931   void    *(*netlink_ns)(struct sock *sk ) ;
 1932   void    *(*initial_ns)(void) ;
 1933   void (*drop_ns)(void * ) ;
 1934};
 1935#line 24 "include/linux/sysfs.h"
 1936enum kobj_ns_type;
 1937#line 26 "include/linux/sysfs.h"
 1938struct attribute {
 1939   char    *name ;
 1940   umode_t mode ;
 1941};
 1942#line 56 "include/linux/sysfs.h"
 1943struct attribute_group {
 1944   char    *name ;
 1945   umode_t (*is_visible)(struct kobject * , struct attribute * , int  ) ;
 1946   struct attribute **attrs ;
 1947};
 1948#line 88 "include/linux/sysfs.h"
 1949struct bin_attribute {
 1950   struct attribute attr ;
 1951   size_t size ;
 1952   void *private ;
 1953   ssize_t (*read)(struct file * , struct kobject * , struct bin_attribute * , char * ,
 1954                   loff_t  , size_t  ) ;
 1955   ssize_t (*write)(struct file * , struct kobject * , struct bin_attribute * , char * ,
 1956                    loff_t  , size_t  ) ;
 1957   int (*mmap)(struct file * , struct kobject * , struct bin_attribute *attr , struct vm_area_struct *vma ) ;
 1958};
 1959#line 112 "include/linux/sysfs.h"
 1960struct sysfs_ops {
 1961   ssize_t (*show)(struct kobject * , struct attribute * , char * ) ;
 1962   ssize_t (*store)(struct kobject * , struct attribute * , char    * , size_t  ) ;
 1963   void    *(*namespace)(struct kobject * , struct attribute    * ) ;
 1964};
 1965#line 118
 1966struct sysfs_dirent;
 1967#line 22 "include/linux/kref.h"
 1968struct kref {
 1969   atomic_t refcount ;
 1970};
 1971#line 60 "include/linux/kobject.h"
 1972struct kset;
 1973#line 60
 1974struct kobj_type;
 1975#line 60 "include/linux/kobject.h"
 1976struct kobject {
 1977   char    *name ;
 1978   struct list_head entry ;
 1979   struct kobject *parent ;
 1980   struct kset *kset ;
 1981   struct kobj_type *ktype ;
 1982   struct sysfs_dirent *sd ;
 1983   struct kref kref ;
 1984   unsigned int state_initialized : 1 ;
 1985   unsigned int state_in_sysfs : 1 ;
 1986   unsigned int state_add_uevent_sent : 1 ;
 1987   unsigned int state_remove_uevent_sent : 1 ;
 1988   unsigned int uevent_suppress : 1 ;
 1989};
 1990#line 108 "include/linux/kobject.h"
 1991struct kobj_type {
 1992   void (*release)(struct kobject *kobj ) ;
 1993   struct sysfs_ops    *sysfs_ops ;
 1994   struct attribute **default_attrs ;
 1995   struct kobj_ns_type_operations    *(*child_ns_type)(struct kobject *kobj ) ;
 1996   void    *(*namespace)(struct kobject *kobj ) ;
 1997};
 1998#line 116 "include/linux/kobject.h"
 1999struct kobj_uevent_env {
 2000   char *envp[32] ;
 2001   int envp_idx ;
 2002   char buf[2048] ;
 2003   int buflen ;
 2004};
 2005#line 123 "include/linux/kobject.h"
 2006struct kset_uevent_ops {
 2007   int (*   filter)(struct kset *kset , struct kobject *kobj ) ;
 2008   char    *(*   name)(struct kset *kset , struct kobject *kobj ) ;
 2009   int (*   uevent)(struct kset *kset , struct kobject *kobj , struct kobj_uevent_env *env ) ;
 2010};
 2011#line 159 "include/linux/kobject.h"
 2012struct kset {
 2013   struct list_head list ;
 2014   spinlock_t list_lock ;
 2015   struct kobject kobj ;
 2016   struct kset_uevent_ops    *uevent_ops ;
 2017};
 2018#line 46 "include/linux/slub_def.h"
 2019struct kmem_cache_cpu {
 2020   void **freelist ;
 2021   unsigned long tid ;
 2022   struct page *page ;
 2023   struct page *partial ;
 2024   int node ;
 2025   unsigned int stat[26] ;
 2026};
 2027#line 57 "include/linux/slub_def.h"
 2028struct kmem_cache_node {
 2029   spinlock_t list_lock ;
 2030   unsigned long nr_partial ;
 2031   struct list_head partial ;
 2032   atomic_long_t nr_slabs ;
 2033   atomic_long_t total_objects ;
 2034   struct list_head full ;
 2035};
 2036#line 73 "include/linux/slub_def.h"
 2037struct kmem_cache_order_objects {
 2038   unsigned long x ;
 2039};
 2040#line 80 "include/linux/slub_def.h"
 2041struct kmem_cache {
 2042   struct kmem_cache_cpu *cpu_slab ;
 2043   unsigned long flags ;
 2044   unsigned long min_partial ;
 2045   int size ;
 2046   int objsize ;
 2047   int offset ;
 2048   int cpu_partial ;
 2049   struct kmem_cache_order_objects oo ;
 2050   struct kmem_cache_order_objects max ;
 2051   struct kmem_cache_order_objects min ;
 2052   gfp_t allocflags ;
 2053   int refcount ;
 2054   void (*ctor)(void * ) ;
 2055   int inuse ;
 2056   int align ;
 2057   int reserved ;
 2058   char    *name ;
 2059   struct list_head list ;
 2060   struct kobject kobj ;
 2061   int remote_node_defrag_ratio ;
 2062   struct kmem_cache_node *node[1 << 10] ;
 2063};
 2064#line 46 "include/linux/proc_fs.h"
 2065typedef int read_proc_t(char *page , char **start , off_t off , int count , int *eof ,
 2066                        void *data );
 2067#line 48 "include/linux/proc_fs.h"
 2068typedef int write_proc_t(struct file *file , char    *buffer , unsigned long count ,
 2069                         void *data );
 2070#line 51 "include/linux/proc_fs.h"
 2071struct proc_dir_entry {
 2072   unsigned int low_ino ;
 2073   umode_t mode ;
 2074   nlink_t nlink ;
 2075   uid_t uid ;
 2076   gid_t gid ;
 2077   loff_t size ;
 2078   struct inode_operations    *proc_iops ;
 2079   struct file_operations    *proc_fops ;
 2080   struct proc_dir_entry *next ;
 2081   struct proc_dir_entry *parent ;
 2082   struct proc_dir_entry *subdir ;
 2083   void *data ;
 2084   read_proc_t *read_proc ;
 2085   write_proc_t *write_proc ;
 2086   atomic_t count ;
 2087   int pde_users ;
 2088   struct completion *pde_unload_completion ;
 2089   struct list_head pde_openers ;
 2090   spinlock_t pde_unload_lock ;
 2091   u8 namelen ;
 2092   char name[] ;
 2093};
 2094#line 125
 2095struct tty_driver;
 2096#line 243
 2097struct nsproxy;
 2098#line 19 "include/linux/klist.h"
 2099struct klist_node;
 2100#line 39 "include/linux/klist.h"
 2101struct klist_node {
 2102   void *n_klist ;
 2103   struct list_head n_node ;
 2104   struct kref n_ref ;
 2105};
 2106#line 4 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/device.h"
 2107struct dma_map_ops;
 2108#line 4 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/device.h"
 2109struct dev_archdata {
 2110   void *acpi_handle ;
 2111   struct dma_map_ops *dma_ops ;
 2112   void *iommu ;
 2113};
 2114#line 16 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/device.h"
 2115struct pdev_archdata {
 2116
 2117};
 2118#line 29 "include/linux/device.h"
 2119struct device_private;
 2120#line 30
 2121struct device_driver;
 2122#line 31
 2123struct driver_private;
 2124#line 33
 2125struct class;
 2126#line 34
 2127struct subsys_private;
 2128#line 35
 2129struct bus_type;
 2130#line 36
 2131struct device_node;
 2132#line 37
 2133struct iommu_ops;
 2134#line 39 "include/linux/device.h"
 2135struct bus_attribute {
 2136   struct attribute attr ;
 2137   ssize_t (*show)(struct bus_type *bus , char *buf ) ;
 2138   ssize_t (*store)(struct bus_type *bus , char    *buf , size_t count ) ;
 2139};
 2140#line 89
 2141struct device_attribute;
 2142#line 89
 2143struct driver_attribute;
 2144#line 89 "include/linux/device.h"
 2145struct bus_type {
 2146   char    *name ;
 2147   char    *dev_name ;
 2148   struct device *dev_root ;
 2149   struct bus_attribute *bus_attrs ;
 2150   struct device_attribute *dev_attrs ;
 2151   struct driver_attribute *drv_attrs ;
 2152   int (*match)(struct device *dev , struct device_driver *drv ) ;
 2153   int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
 2154   int (*probe)(struct device *dev ) ;
 2155   int (*remove)(struct device *dev ) ;
 2156   void (*shutdown)(struct device *dev ) ;
 2157   int (*suspend)(struct device *dev , pm_message_t state ) ;
 2158   int (*resume)(struct device *dev ) ;
 2159   struct dev_pm_ops    *pm ;
 2160   struct iommu_ops *iommu_ops ;
 2161   struct subsys_private *p ;
 2162};
 2163#line 127
 2164struct device_type;
 2165#line 214
 2166struct of_device_id;
 2167#line 214 "include/linux/device.h"
 2168struct device_driver {
 2169   char    *name ;
 2170   struct bus_type *bus ;
 2171   struct module *owner ;
 2172   char    *mod_name ;
 2173   bool suppress_bind_attrs ;
 2174   struct of_device_id    *of_match_table ;
 2175   int (*probe)(struct device *dev ) ;
 2176   int (*remove)(struct device *dev ) ;
 2177   void (*shutdown)(struct device *dev ) ;
 2178   int (*suspend)(struct device *dev , pm_message_t state ) ;
 2179   int (*resume)(struct device *dev ) ;
 2180   struct attribute_group    **groups ;
 2181   struct dev_pm_ops    *pm ;
 2182   struct driver_private *p ;
 2183};
 2184#line 249 "include/linux/device.h"
 2185struct driver_attribute {
 2186   struct attribute attr ;
 2187   ssize_t (*show)(struct device_driver *driver , char *buf ) ;
 2188   ssize_t (*store)(struct device_driver *driver , char    *buf , size_t count ) ;
 2189};
 2190#line 330
 2191struct class_attribute;
 2192#line 330 "include/linux/device.h"
 2193struct class {
 2194   char    *name ;
 2195   struct module *owner ;
 2196   struct class_attribute *class_attrs ;
 2197   struct device_attribute *dev_attrs ;
 2198   struct bin_attribute *dev_bin_attrs ;
 2199   struct kobject *dev_kobj ;
 2200   int (*dev_uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
 2201   char *(*devnode)(struct device *dev , umode_t *mode ) ;
 2202   void (*class_release)(struct class *class ) ;
 2203   void (*dev_release)(struct device *dev ) ;
 2204   int (*suspend)(struct device *dev , pm_message_t state ) ;
 2205   int (*resume)(struct device *dev ) ;
 2206   struct kobj_ns_type_operations    *ns_type ;
 2207   void    *(*namespace)(struct device *dev ) ;
 2208   struct dev_pm_ops    *pm ;
 2209   struct subsys_private *p ;
 2210};
 2211#line 397 "include/linux/device.h"
 2212struct class_attribute {
 2213   struct attribute attr ;
 2214   ssize_t (*show)(struct class *class , struct class_attribute *attr , char *buf ) ;
 2215   ssize_t (*store)(struct class *class , struct class_attribute *attr , char    *buf ,
 2216                    size_t count ) ;
 2217   void    *(*namespace)(struct class *class , struct class_attribute    *attr ) ;
 2218};
 2219#line 465 "include/linux/device.h"
 2220struct device_type {
 2221   char    *name ;
 2222   struct attribute_group    **groups ;
 2223   int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
 2224   char *(*devnode)(struct device *dev , umode_t *mode ) ;
 2225   void (*release)(struct device *dev ) ;
 2226   struct dev_pm_ops    *pm ;
 2227};
 2228#line 476 "include/linux/device.h"
 2229struct device_attribute {
 2230   struct attribute attr ;
 2231   ssize_t (*show)(struct device *dev , struct device_attribute *attr , char *buf ) ;
 2232   ssize_t (*store)(struct device *dev , struct device_attribute *attr , char    *buf ,
 2233                    size_t count ) ;
 2234};
 2235#line 559 "include/linux/device.h"
 2236struct device_dma_parameters {
 2237   unsigned int max_segment_size ;
 2238   unsigned long segment_boundary_mask ;
 2239};
 2240#line 627
 2241struct dma_coherent_mem;
 2242#line 627 "include/linux/device.h"
 2243struct device {
 2244   struct device *parent ;
 2245   struct device_private *p ;
 2246   struct kobject kobj ;
 2247   char    *init_name ;
 2248   struct device_type    *type ;
 2249   struct mutex mutex ;
 2250   struct bus_type *bus ;
 2251   struct device_driver *driver ;
 2252   void *platform_data ;
 2253   struct dev_pm_info power ;
 2254   struct dev_pm_domain *pm_domain ;
 2255   int numa_node ;
 2256   u64 *dma_mask ;
 2257   u64 coherent_dma_mask ;
 2258   struct device_dma_parameters *dma_parms ;
 2259   struct list_head dma_pools ;
 2260   struct dma_coherent_mem *dma_mem ;
 2261   struct dev_archdata archdata ;
 2262   struct device_node *of_node ;
 2263   dev_t devt ;
 2264   u32 id ;
 2265   spinlock_t devres_lock ;
 2266   struct list_head devres_head ;
 2267   struct klist_node knode_class ;
 2268   struct class *class ;
 2269   struct attribute_group    **groups ;
 2270   void (*release)(struct device *dev ) ;
 2271};
 2272#line 43 "include/linux/pm_wakeup.h"
 2273struct wakeup_source {
 2274   char    *name ;
 2275   struct list_head entry ;
 2276   spinlock_t lock ;
 2277   struct timer_list timer ;
 2278   unsigned long timer_expires ;
 2279   ktime_t total_time ;
 2280   ktime_t max_time ;
 2281   ktime_t last_time ;
 2282   unsigned long event_count ;
 2283   unsigned long active_count ;
 2284   unsigned long relax_count ;
 2285   unsigned long hit_count ;
 2286   unsigned int active : 1 ;
 2287};
 2288#line 12 "include/linux/mod_devicetable.h"
 2289typedef unsigned long kernel_ulong_t;
 2290#line 17 "include/linux/mod_devicetable.h"
 2291struct pci_device_id {
 2292   __u32 vendor ;
 2293   __u32 device ;
 2294   __u32 subvendor ;
 2295   __u32 subdevice ;
 2296   __u32 class ;
 2297   __u32 class_mask ;
 2298   kernel_ulong_t driver_data ;
 2299};
 2300#line 219 "include/linux/mod_devicetable.h"
 2301struct of_device_id {
 2302   char name[32] ;
 2303   char type[32] ;
 2304   char compatible[128] ;
 2305   void *data ;
 2306};
 2307#line 506 "include/linux/mod_devicetable.h"
 2308struct platform_device_id {
 2309   char name[20] ;
 2310   kernel_ulong_t driver_data  __attribute__((__aligned__(sizeof(kernel_ulong_t )))) ;
 2311};
 2312#line 17 "include/linux/platform_device.h"
 2313struct mfd_cell;
 2314#line 19 "include/linux/platform_device.h"
 2315struct platform_device {
 2316   char    *name ;
 2317   int id ;
 2318   struct device dev ;
 2319   u32 num_resources ;
 2320   struct resource *resource ;
 2321   struct platform_device_id    *id_entry ;
 2322   struct mfd_cell *mfd_cell ;
 2323   struct pdev_archdata archdata ;
 2324};
 2325#line 10 "include/linux/irqreturn.h"
 2326enum irqreturn {
 2327    IRQ_NONE = 0,
 2328    IRQ_HANDLED = 1,
 2329    IRQ_WAKE_THREAD = 2
 2330} ;
 2331#line 16 "include/linux/irqreturn.h"
 2332typedef enum irqreturn irqreturn_t;
 2333#line 61 "include/linux/pci.h"
 2334struct hotplug_slot;
 2335#line 61 "include/linux/pci.h"
 2336struct pci_slot {
 2337   struct pci_bus *bus ;
 2338   struct list_head list ;
 2339   struct hotplug_slot *hotplug ;
 2340   unsigned char number ;
 2341   struct kobject kobj ;
 2342};
 2343#line 117 "include/linux/pci.h"
 2344typedef int pci_power_t;
 2345#line 143 "include/linux/pci.h"
 2346typedef unsigned int pci_channel_state_t;
 2347#line 145
 2348enum pci_channel_state {
 2349    pci_channel_io_normal = 1,
 2350    pci_channel_io_frozen = 2,
 2351    pci_channel_io_perm_failure = 3
 2352} ;
 2353#line 169 "include/linux/pci.h"
 2354typedef unsigned short pci_dev_flags_t;
 2355#line 186 "include/linux/pci.h"
 2356typedef unsigned short pci_bus_flags_t;
 2357#line 230
 2358struct pcie_link_state;
 2359#line 231
 2360struct pci_vpd;
 2361#line 232
 2362struct pci_sriov;
 2363#line 233
 2364struct pci_ats;
 2365#line 238
 2366struct pci_driver;
 2367#line 238 "include/linux/pci.h"
 2368union __anonunion____missing_field_name_292 {
 2369   struct pci_sriov *sriov ;
 2370   struct pci_dev *physfn ;
 2371};
 2372#line 238 "include/linux/pci.h"
 2373struct pci_dev {
 2374   struct list_head bus_list ;
 2375   struct pci_bus *bus ;
 2376   struct pci_bus *subordinate ;
 2377   void *sysdata ;
 2378   struct proc_dir_entry *procent ;
 2379   struct pci_slot *slot ;
 2380   unsigned int devfn ;
 2381   unsigned short vendor ;
 2382   unsigned short device ;
 2383   unsigned short subsystem_vendor ;
 2384   unsigned short subsystem_device ;
 2385   unsigned int class ;
 2386   u8 revision ;
 2387   u8 hdr_type ;
 2388   u8 pcie_cap ;
 2389   u8 pcie_type : 4 ;
 2390   u8 pcie_mpss : 3 ;
 2391   u8 rom_base_reg ;
 2392   u8 pin ;
 2393   struct pci_driver *driver ;
 2394   u64 dma_mask ;
 2395   struct device_dma_parameters dma_parms ;
 2396   pci_power_t current_state ;
 2397   int pm_cap ;
 2398   unsigned int pme_support : 5 ;
 2399   unsigned int pme_interrupt : 1 ;
 2400   unsigned int pme_poll : 1 ;
 2401   unsigned int d1_support : 1 ;
 2402   unsigned int d2_support : 1 ;
 2403   unsigned int no_d1d2 : 1 ;
 2404   unsigned int mmio_always_on : 1 ;
 2405   unsigned int wakeup_prepared : 1 ;
 2406   unsigned int d3_delay ;
 2407   struct pcie_link_state *link_state ;
 2408   pci_channel_state_t error_state ;
 2409   struct device dev ;
 2410   int cfg_size ;
 2411   unsigned int irq ;
 2412   struct resource resource[17] ;
 2413   unsigned int transparent : 1 ;
 2414   unsigned int multifunction : 1 ;
 2415   unsigned int is_added : 1 ;
 2416   unsigned int is_busmaster : 1 ;
 2417   unsigned int no_msi : 1 ;
 2418   unsigned int block_cfg_access : 1 ;
 2419   unsigned int broken_parity_status : 1 ;
 2420   unsigned int irq_reroute_variant : 2 ;
 2421   unsigned int msi_enabled : 1 ;
 2422   unsigned int msix_enabled : 1 ;
 2423   unsigned int ari_enabled : 1 ;
 2424   unsigned int is_managed : 1 ;
 2425   unsigned int is_pcie : 1 ;
 2426   unsigned int needs_freset : 1 ;
 2427   unsigned int state_saved : 1 ;
 2428   unsigned int is_physfn : 1 ;
 2429   unsigned int is_virtfn : 1 ;
 2430   unsigned int reset_fn : 1 ;
 2431   unsigned int is_hotplug_bridge : 1 ;
 2432   unsigned int __aer_firmware_first_valid : 1 ;
 2433   unsigned int __aer_firmware_first : 1 ;
 2434   pci_dev_flags_t dev_flags ;
 2435   atomic_t enable_cnt ;
 2436   u32 saved_config_space[16] ;
 2437   struct hlist_head saved_cap_space ;
 2438   struct bin_attribute *rom_attr ;
 2439   int rom_attr_enabled ;
 2440   struct bin_attribute *res_attr[17] ;
 2441   struct bin_attribute *res_attr_wc[17] ;
 2442   struct list_head msi_list ;
 2443   struct kset *msi_kset ;
 2444   struct pci_vpd *vpd ;
 2445   union __anonunion____missing_field_name_292 __annonCompField47 ;
 2446   struct pci_ats *ats ;
 2447};
 2448#line 406
 2449struct pci_ops;
 2450#line 406 "include/linux/pci.h"
 2451struct pci_bus {
 2452   struct list_head node ;
 2453   struct pci_bus *parent ;
 2454   struct list_head children ;
 2455   struct list_head devices ;
 2456   struct pci_dev *self ;
 2457   struct list_head slots ;
 2458   struct resource *resource[4] ;
 2459   struct list_head resources ;
 2460   struct pci_ops *ops ;
 2461   void *sysdata ;
 2462   struct proc_dir_entry *procdir ;
 2463   unsigned char number ;
 2464   unsigned char primary ;
 2465   unsigned char secondary ;
 2466   unsigned char subordinate ;
 2467   unsigned char max_bus_speed ;
 2468   unsigned char cur_bus_speed ;
 2469   char name[48] ;
 2470   unsigned short bridge_ctl ;
 2471   pci_bus_flags_t bus_flags ;
 2472   struct device *bridge ;
 2473   struct device dev ;
 2474   struct bin_attribute *legacy_io ;
 2475   struct bin_attribute *legacy_mem ;
 2476   unsigned int is_added : 1 ;
 2477};
 2478#line 472 "include/linux/pci.h"
 2479struct pci_ops {
 2480   int (*read)(struct pci_bus *bus , unsigned int devfn , int where , int size , u32 *val ) ;
 2481   int (*write)(struct pci_bus *bus , unsigned int devfn , int where , int size ,
 2482                u32 val ) ;
 2483};
 2484#line 491 "include/linux/pci.h"
 2485struct pci_dynids {
 2486   spinlock_t lock ;
 2487   struct list_head list ;
 2488};
 2489#line 503 "include/linux/pci.h"
 2490typedef unsigned int pci_ers_result_t;
 2491#line 523 "include/linux/pci.h"
 2492struct pci_error_handlers {
 2493   pci_ers_result_t (*error_detected)(struct pci_dev *dev , enum pci_channel_state error ) ;
 2494   pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev ) ;
 2495   pci_ers_result_t (*link_reset)(struct pci_dev *dev ) ;
 2496   pci_ers_result_t (*slot_reset)(struct pci_dev *dev ) ;
 2497   void (*resume)(struct pci_dev *dev ) ;
 2498};
 2499#line 544 "include/linux/pci.h"
 2500struct pci_driver {
 2501   struct list_head node ;
 2502   char    *name ;
 2503   struct pci_device_id    *id_table ;
 2504   int (*probe)(struct pci_dev *dev , struct pci_device_id    *id ) ;
 2505   void (*remove)(struct pci_dev *dev ) ;
 2506   int (*suspend)(struct pci_dev *dev , pm_message_t state ) ;
 2507   int (*suspend_late)(struct pci_dev *dev , pm_message_t state ) ;
 2508   int (*resume_early)(struct pci_dev *dev ) ;
 2509   int (*resume)(struct pci_dev *dev ) ;
 2510   void (*shutdown)(struct pci_dev *dev ) ;
 2511   struct pci_error_handlers *err_handler ;
 2512   struct device_driver driver ;
 2513   struct pci_dynids dynids ;
 2514};
 2515#line 6 "include/asm-generic/scatterlist.h"
 2516struct scatterlist {
 2517   unsigned long sg_magic ;
 2518   unsigned long page_link ;
 2519   unsigned int offset ;
 2520   unsigned int length ;
 2521   dma_addr_t dma_address ;
 2522   unsigned int dma_length ;
 2523};
 2524#line 100 "include/linux/rbtree.h"
 2525struct rb_node {
 2526   unsigned long rb_parent_color ;
 2527   struct rb_node *rb_right ;
 2528   struct rb_node *rb_left ;
 2529} __attribute__((__aligned__(sizeof(long )))) ;
 2530#line 110 "include/linux/rbtree.h"
 2531struct rb_root {
 2532   struct rb_node *rb_node ;
 2533};
 2534#line 40 "include/linux/mm_types.h"
 2535union __anonunion____missing_field_name_294 {
 2536   unsigned long index ;
 2537   void *freelist ;
 2538};
 2539#line 40 "include/linux/mm_types.h"
 2540struct __anonstruct____missing_field_name_298 {
 2541   unsigned int inuse : 16 ;
 2542   unsigned int objects : 15 ;
 2543   unsigned int frozen : 1 ;
 2544};
 2545#line 40 "include/linux/mm_types.h"
 2546union __anonunion____missing_field_name_297 {
 2547   atomic_t _mapcount ;
 2548   struct __anonstruct____missing_field_name_298 __annonCompField49 ;
 2549};
 2550#line 40 "include/linux/mm_types.h"
 2551struct __anonstruct____missing_field_name_296 {
 2552   union __anonunion____missing_field_name_297 __annonCompField50 ;
 2553   atomic_t _count ;
 2554};
 2555#line 40 "include/linux/mm_types.h"
 2556union __anonunion____missing_field_name_295 {
 2557   unsigned long counters ;
 2558   struct __anonstruct____missing_field_name_296 __annonCompField51 ;
 2559};
 2560#line 40 "include/linux/mm_types.h"
 2561struct __anonstruct____missing_field_name_293 {
 2562   union __anonunion____missing_field_name_294 __annonCompField48 ;
 2563   union __anonunion____missing_field_name_295 __annonCompField52 ;
 2564};
 2565#line 40 "include/linux/mm_types.h"
 2566struct __anonstruct____missing_field_name_300 {
 2567   struct page *next ;
 2568   int pages ;
 2569   int pobjects ;
 2570};
 2571#line 40 "include/linux/mm_types.h"
 2572union __anonunion____missing_field_name_299 {
 2573   struct list_head lru ;
 2574   struct __anonstruct____missing_field_name_300 __annonCompField54 ;
 2575};
 2576#line 40 "include/linux/mm_types.h"
 2577union __anonunion____missing_field_name_301 {
 2578   unsigned long private ;
 2579   struct kmem_cache *slab ;
 2580   struct page *first_page ;
 2581};
 2582#line 40 "include/linux/mm_types.h"
 2583struct page {
 2584   unsigned long flags ;
 2585   struct address_space *mapping ;
 2586   struct __anonstruct____missing_field_name_293 __annonCompField53 ;
 2587   union __anonunion____missing_field_name_299 __annonCompField55 ;
 2588   union __anonunion____missing_field_name_301 __annonCompField56 ;
 2589   unsigned long debug_flags ;
 2590} __attribute__((__aligned__((2) *  (sizeof(unsigned long )) ))) ;
 2591#line 200 "include/linux/mm_types.h"
 2592struct __anonstruct_vm_set_303 {
 2593   struct list_head list ;
 2594   void *parent ;
 2595   struct vm_area_struct *head ;
 2596};
 2597#line 200 "include/linux/mm_types.h"
 2598union __anonunion_shared_302 {
 2599   struct __anonstruct_vm_set_303 vm_set ;
 2600   struct raw_prio_tree_node prio_tree_node ;
 2601};
 2602#line 200
 2603struct anon_vma;
 2604#line 200
 2605struct vm_operations_struct;
 2606#line 200
 2607struct mempolicy;
 2608#line 200 "include/linux/mm_types.h"
 2609struct vm_area_struct {
 2610   struct mm_struct *vm_mm ;
 2611   unsigned long vm_start ;
 2612   unsigned long vm_end ;
 2613   struct vm_area_struct *vm_next ;
 2614   struct vm_area_struct *vm_prev ;
 2615   pgprot_t vm_page_prot ;
 2616   unsigned long vm_flags ;
 2617   struct rb_node vm_rb ;
 2618   union __anonunion_shared_302 shared ;
 2619   struct list_head anon_vma_chain ;
 2620   struct anon_vma *anon_vma ;
 2621   struct vm_operations_struct    *vm_ops ;
 2622   unsigned long vm_pgoff ;
 2623   struct file *vm_file ;
 2624   void *vm_private_data ;
 2625   struct mempolicy *vm_policy ;
 2626};
 2627#line 257 "include/linux/mm_types.h"
 2628struct core_thread {
 2629   struct task_struct *task ;
 2630   struct core_thread *next ;
 2631};
 2632#line 262 "include/linux/mm_types.h"
 2633struct core_state {
 2634   atomic_t nr_threads ;
 2635   struct core_thread dumper ;
 2636   struct completion startup ;
 2637};
 2638#line 284 "include/linux/mm_types.h"
 2639struct mm_rss_stat {
 2640   atomic_long_t count[3] ;
 2641};
 2642#line 288
 2643struct linux_binfmt;
 2644#line 288
 2645struct mmu_notifier_mm;
 2646#line 288 "include/linux/mm_types.h"
 2647struct mm_struct {
 2648   struct vm_area_struct *mmap ;
 2649   struct rb_root mm_rb ;
 2650   struct vm_area_struct *mmap_cache ;
 2651   unsigned long (*get_unmapped_area)(struct file *filp , unsigned long addr , unsigned long len ,
 2652                                      unsigned long pgoff , unsigned long flags ) ;
 2653   void (*unmap_area)(struct mm_struct *mm , unsigned long addr ) ;
 2654   unsigned long mmap_base ;
 2655   unsigned long task_size ;
 2656   unsigned long cached_hole_size ;
 2657   unsigned long free_area_cache ;
 2658   pgd_t *pgd ;
 2659   atomic_t mm_users ;
 2660   atomic_t mm_count ;
 2661   int map_count ;
 2662   spinlock_t page_table_lock ;
 2663   struct rw_semaphore mmap_sem ;
 2664   struct list_head mmlist ;
 2665   unsigned long hiwater_rss ;
 2666   unsigned long hiwater_vm ;
 2667   unsigned long total_vm ;
 2668   unsigned long locked_vm ;
 2669   unsigned long pinned_vm ;
 2670   unsigned long shared_vm ;
 2671   unsigned long exec_vm ;
 2672   unsigned long stack_vm ;
 2673   unsigned long reserved_vm ;
 2674   unsigned long def_flags ;
 2675   unsigned long nr_ptes ;
 2676   unsigned long start_code ;
 2677   unsigned long end_code ;
 2678   unsigned long start_data ;
 2679   unsigned long end_data ;
 2680   unsigned long start_brk ;
 2681   unsigned long brk ;
 2682   unsigned long start_stack ;
 2683   unsigned long arg_start ;
 2684   unsigned long arg_end ;
 2685   unsigned long env_start ;
 2686   unsigned long env_end ;
 2687   unsigned long saved_auxv[44] ;
 2688   struct mm_rss_stat rss_stat ;
 2689   struct linux_binfmt *binfmt ;
 2690   cpumask_var_t cpu_vm_mask_var ;
 2691   mm_context_t context ;
 2692   unsigned int faultstamp ;
 2693   unsigned int token_priority ;
 2694   unsigned int last_interval ;
 2695   unsigned long flags ;
 2696   struct core_state *core_state ;
 2697   spinlock_t ioctx_lock ;
 2698   struct hlist_head ioctx_list ;
 2699   struct task_struct *owner ;
 2700   struct file *exe_file ;
 2701   unsigned long num_exe_file_vmas ;
 2702   struct mmu_notifier_mm *mmu_notifier_mm ;
 2703   pgtable_t pmd_huge_pte ;
 2704   struct cpumask cpumask_allocation ;
 2705};
 2706#line 25 "include/linux/mm.h"
 2707struct user_struct;
 2708#line 188 "include/linux/mm.h"
 2709struct vm_fault {
 2710   unsigned int flags ;
 2711   unsigned long pgoff ;
 2712   void *virtual_address ;
 2713   struct page *page ;
 2714};
 2715#line 205 "include/linux/mm.h"
 2716struct vm_operations_struct {
 2717   void (*open)(struct vm_area_struct *area ) ;
 2718   void (*close)(struct vm_area_struct *area ) ;
 2719   int (*fault)(struct vm_area_struct *vma , struct vm_fault *vmf ) ;
 2720   int (*page_mkwrite)(struct vm_area_struct *vma , struct vm_fault *vmf ) ;
 2721   int (*access)(struct vm_area_struct *vma , unsigned long addr , void *buf , int len ,
 2722                 int write ) ;
 2723   int (*set_policy)(struct vm_area_struct *vma , struct mempolicy *new ) ;
 2724   struct mempolicy *(*get_policy)(struct vm_area_struct *vma , unsigned long addr ) ;
 2725   int (*migrate)(struct vm_area_struct *vma , nodemask_t    *from , nodemask_t    *to ,
 2726                  unsigned long flags ) ;
 2727};
 2728#line 27 "include/linux/dma-attrs.h"
 2729struct dma_attrs {
 2730   unsigned long flags[((4UL + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
 2731};
 2732#line 7 "include/linux/dma-direction.h"
 2733enum dma_data_direction {
 2734    DMA_BIDIRECTIONAL = 0,
 2735    DMA_TO_DEVICE = 1,
 2736    DMA_FROM_DEVICE = 2,
 2737    DMA_NONE = 3
 2738} ;
 2739#line 11 "include/linux/dma-mapping.h"
 2740struct dma_map_ops {
 2741   void *(*alloc)(struct device *dev , size_t size , dma_addr_t *dma_handle , gfp_t gfp ,
 2742                  struct dma_attrs *attrs ) ;
 2743   void (*free)(struct device *dev , size_t size , void *vaddr , dma_addr_t dma_handle ,
 2744                struct dma_attrs *attrs ) ;
 2745   int (*mmap)(struct device * , struct vm_area_struct * , void * , dma_addr_t  ,
 2746               size_t  , struct dma_attrs *attrs ) ;
 2747   dma_addr_t (*map_page)(struct device *dev , struct page *page , unsigned long offset ,
 2748                          size_t size , enum dma_data_direction dir , struct dma_attrs *attrs ) ;
 2749   void (*unmap_page)(struct device *dev , dma_addr_t dma_handle , size_t size , enum dma_data_direction dir ,
 2750                      struct dma_attrs *attrs ) ;
 2751   int (*map_sg)(struct device *dev , struct scatterlist *sg , int nents , enum dma_data_direction dir ,
 2752                 struct dma_attrs *attrs ) ;
 2753   void (*unmap_sg)(struct device *dev , struct scatterlist *sg , int nents , enum dma_data_direction dir ,
 2754                    struct dma_attrs *attrs ) ;
 2755   void (*sync_single_for_cpu)(struct device *dev , dma_addr_t dma_handle , size_t size ,
 2756                               enum dma_data_direction dir ) ;
 2757   void (*sync_single_for_device)(struct device *dev , dma_addr_t dma_handle , size_t size ,
 2758                                  enum dma_data_direction dir ) ;
 2759   void (*sync_sg_for_cpu)(struct device *dev , struct scatterlist *sg , int nents ,
 2760                           enum dma_data_direction dir ) ;
 2761   void (*sync_sg_for_device)(struct device *dev , struct scatterlist *sg , int nents ,
 2762                              enum dma_data_direction dir ) ;
 2763   int (*mapping_error)(struct device *dev , dma_addr_t dma_addr ) ;
 2764   int (*dma_supported)(struct device *dev , u64 mask ) ;
 2765   int (*set_dma_mask)(struct device *dev , u64 mask ) ;
 2766   int is_phys ;
 2767};
 2768#line 12 "include/linux/cdev.h"
 2769struct cdev {
 2770   struct kobject kobj ;
 2771   struct module *owner ;
 2772   struct file_operations    *ops ;
 2773   struct list_head list ;
 2774   dev_t dev ;
 2775   unsigned int count ;
 2776};
 2777#line 101 "include/linux/sem.h"
 2778struct sem_undo_list;
 2779#line 101 "include/linux/sem.h"
 2780struct sysv_sem {
 2781   struct sem_undo_list *undo_list ;
 2782};
 2783#line 16 "include/linux/uio.h"
 2784struct iovec {
 2785   void *iov_base ;
 2786   __kernel_size_t iov_len ;
 2787};
 2788#line 58 "include/linux/aio_abi.h"
 2789struct io_event {
 2790   __u64 data ;
 2791   __u64 obj ;
 2792   __s64 res ;
 2793   __s64 res2 ;
 2794};
 2795#line 7 "include/asm-generic/cputime.h"
 2796typedef unsigned long cputime_t;
 2797#line 10 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/signal.h"
 2798struct siginfo;
 2799#line 30 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/signal.h"
 2800struct __anonstruct_sigset_t_319 {
 2801   unsigned long sig[1] ;
 2802};
 2803#line 30 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/signal.h"
 2804typedef struct __anonstruct_sigset_t_319 sigset_t;
 2805#line 17 "include/asm-generic/signal-defs.h"
 2806typedef void __signalfn_t(int  );
 2807#line 18 "include/asm-generic/signal-defs.h"
 2808typedef __signalfn_t *__sighandler_t;
 2809#line 20 "include/asm-generic/signal-defs.h"
 2810typedef void __restorefn_t(void);
 2811#line 21 "include/asm-generic/signal-defs.h"
 2812typedef __restorefn_t *__sigrestore_t;
 2813#line 167 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/signal.h"
 2814struct sigaction {
 2815   __sighandler_t sa_handler ;
 2816   unsigned long sa_flags ;
 2817   __sigrestore_t sa_restorer ;
 2818   sigset_t sa_mask ;
 2819};
 2820#line 174 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/signal.h"
 2821struct k_sigaction {
 2822   struct sigaction sa ;
 2823};
 2824#line 7 "include/asm-generic/siginfo.h"
 2825union sigval {
 2826   int sival_int ;
 2827   void *sival_ptr ;
 2828};
 2829#line 7 "include/asm-generic/siginfo.h"
 2830typedef union sigval sigval_t;
 2831#line 48 "include/asm-generic/siginfo.h"
 2832struct __anonstruct__kill_321 {
 2833   __kernel_pid_t _pid ;
 2834   __kernel_uid32_t _uid ;
 2835};
 2836#line 48 "include/asm-generic/siginfo.h"
 2837struct __anonstruct__timer_322 {
 2838   __kernel_timer_t _tid ;
 2839   int _overrun ;
 2840   char _pad[sizeof(__kernel_uid32_t ) - sizeof(int )] ;
 2841   sigval_t _sigval ;
 2842   int _sys_private ;
 2843};
 2844#line 48 "include/asm-generic/siginfo.h"
 2845struct __anonstruct__rt_323 {
 2846   __kernel_pid_t _pid ;
 2847   __kernel_uid32_t _uid ;
 2848   sigval_t _sigval ;
 2849};
 2850#line 48 "include/asm-generic/siginfo.h"
 2851struct __anonstruct__sigchld_324 {
 2852   __kernel_pid_t _pid ;
 2853   __kernel_uid32_t _uid ;
 2854   int _status ;
 2855   __kernel_clock_t _utime ;
 2856   __kernel_clock_t _stime ;
 2857};
 2858#line 48 "include/asm-generic/siginfo.h"
 2859struct __anonstruct__sigfault_325 {
 2860   void *_addr ;
 2861   short _addr_lsb ;
 2862};
 2863#line 48 "include/asm-generic/siginfo.h"
 2864struct __anonstruct__sigpoll_326 {
 2865   long _band ;
 2866   int _fd ;
 2867};
 2868#line 48 "include/asm-generic/siginfo.h"
 2869union __anonunion__sifields_320 {
 2870   int _pad[(128UL - 4UL * sizeof(int )) / sizeof(int )] ;
 2871   struct __anonstruct__kill_321 _kill ;
 2872   struct __anonstruct__timer_322 _timer ;
 2873   struct __anonstruct__rt_323 _rt ;
 2874   struct __anonstruct__sigchld_324 _sigchld ;
 2875   struct __anonstruct__sigfault_325 _sigfault ;
 2876   struct __anonstruct__sigpoll_326 _sigpoll ;
 2877};
 2878#line 48 "include/asm-generic/siginfo.h"
 2879struct siginfo {
 2880   int si_signo ;
 2881   int si_errno ;
 2882   int si_code ;
 2883   union __anonunion__sifields_320 _sifields ;
 2884};
 2885#line 48 "include/asm-generic/siginfo.h"
 2886typedef struct siginfo siginfo_t;
 2887#line 28 "include/linux/signal.h"
 2888struct sigpending {
 2889   struct list_head list ;
 2890   sigset_t signal ;
 2891};
 2892#line 10 "include/linux/seccomp.h"
 2893struct __anonstruct_seccomp_t_329 {
 2894   int mode ;
 2895};
 2896#line 10 "include/linux/seccomp.h"
 2897typedef struct __anonstruct_seccomp_t_329 seccomp_t;
 2898#line 81 "include/linux/plist.h"
 2899struct plist_head {
 2900   struct list_head node_list ;
 2901};
 2902#line 85 "include/linux/plist.h"
 2903struct plist_node {
 2904   int prio ;
 2905   struct list_head prio_list ;
 2906   struct list_head node_list ;
 2907};
 2908#line 40 "include/linux/rtmutex.h"
 2909struct rt_mutex_waiter;
 2910#line 42 "include/linux/resource.h"
 2911struct rlimit {
 2912   unsigned long rlim_cur ;
 2913   unsigned long rlim_max ;
 2914};
 2915#line 8 "include/linux/timerqueue.h"
 2916struct timerqueue_node {
 2917   struct rb_node node ;
 2918   ktime_t expires ;
 2919};
 2920#line 13 "include/linux/timerqueue.h"
 2921struct timerqueue_head {
 2922   struct rb_root head ;
 2923   struct timerqueue_node *next ;
 2924};
 2925#line 27 "include/linux/hrtimer.h"
 2926struct hrtimer_clock_base;
 2927#line 28
 2928struct hrtimer_cpu_base;
 2929#line 44
 2930enum hrtimer_restart {
 2931    HRTIMER_NORESTART = 0,
 2932    HRTIMER_RESTART = 1
 2933} ;
 2934#line 108 "include/linux/hrtimer.h"
 2935struct hrtimer {
 2936   struct timerqueue_node node ;
 2937   ktime_t _softexpires ;
 2938   enum hrtimer_restart (*function)(struct hrtimer * ) ;
 2939   struct hrtimer_clock_base *base ;
 2940   unsigned long state ;
 2941   int start_pid ;
 2942   void *start_site ;
 2943   char start_comm[16] ;
 2944};
 2945#line 145 "include/linux/hrtimer.h"
 2946struct hrtimer_clock_base {
 2947   struct hrtimer_cpu_base *cpu_base ;
 2948   int index ;
 2949   clockid_t clockid ;
 2950   struct timerqueue_head active ;
 2951   ktime_t resolution ;
 2952   ktime_t (*get_time)(void) ;
 2953   ktime_t softirq_time ;
 2954   ktime_t offset ;
 2955};
 2956#line 178 "include/linux/hrtimer.h"
 2957struct hrtimer_cpu_base {
 2958   raw_spinlock_t lock ;
 2959   unsigned long active_bases ;
 2960   ktime_t expires_next ;
 2961   int hres_active ;
 2962   int hang_detected ;
 2963   unsigned long nr_events ;
 2964   unsigned long nr_retries ;
 2965   unsigned long nr_hangs ;
 2966   ktime_t max_hang_time ;
 2967   struct hrtimer_clock_base clock_base[3] ;
 2968};
 2969#line 11 "include/linux/task_io_accounting.h"
 2970struct task_io_accounting {
 2971   u64 rchar ;
 2972   u64 wchar ;
 2973   u64 syscr ;
 2974   u64 syscw ;
 2975   u64 read_bytes ;
 2976   u64 write_bytes ;
 2977   u64 cancelled_write_bytes ;
 2978};
 2979#line 20 "include/linux/latencytop.h"
 2980struct latency_record {
 2981   unsigned long backtrace[12] ;
 2982   unsigned int count ;
 2983   unsigned long time ;
 2984   unsigned long max ;
 2985};
 2986#line 29 "include/linux/key.h"
 2987typedef int32_t key_serial_t;
 2988#line 32 "include/linux/key.h"
 2989typedef uint32_t key_perm_t;
 2990#line 34
 2991struct key;
 2992#line 76
 2993struct signal_struct;
 2994#line 79
 2995struct key_type;
 2996#line 81
 2997struct keyring_list;
 2998#line 124
 2999struct key_user;
 3000#line 124 "include/linux/key.h"
 3001union __anonunion____missing_field_name_386 {
 3002   time_t expiry ;
 3003   time_t revoked_at ;
 3004};
 3005#line 124 "include/linux/key.h"
 3006union __anonunion_type_data_387 {
 3007   struct list_head link ;
 3008   unsigned long x[2] ;
 3009   void *p[2] ;
 3010   int reject_error ;
 3011};
 3012#line 124 "include/linux/key.h"
 3013union __anonunion_payload_388 {
 3014   unsigned long value ;
 3015   void *rcudata ;
 3016   void *data ;
 3017   struct keyring_list *subscriptions ;
 3018};
 3019#line 124 "include/linux/key.h"
 3020struct key {
 3021   atomic_t usage ;
 3022   key_serial_t serial ;
 3023   struct rb_node serial_node ;
 3024   struct key_type *type ;
 3025   struct rw_semaphore sem ;
 3026   struct key_user *user ;
 3027   void *security ;
 3028   union __anonunion____missing_field_name_386 __annonCompField59 ;
 3029   uid_t uid ;
 3030   gid_t gid ;
 3031   key_perm_t perm ;
 3032   unsigned short quotalen ;
 3033   unsigned short datalen ;
 3034   unsigned long flags ;
 3035   char *description ;
 3036   union __anonunion_type_data_387 type_data ;
 3037   union __anonunion_payload_388 payload ;
 3038};
 3039#line 18 "include/linux/selinux.h"
 3040struct audit_context;
 3041#line 31 "include/linux/cred.h"
 3042struct group_info {
 3043   atomic_t usage ;
 3044   int ngroups ;
 3045   int nblocks ;
 3046   gid_t small_block[32] ;
 3047   gid_t *blocks[0] ;
 3048};
 3049#line 83 "include/linux/cred.h"
 3050struct thread_group_cred {
 3051   atomic_t usage ;
 3052   pid_t tgid ;
 3053   spinlock_t lock ;
 3054   struct key *session_keyring ;
 3055   struct key *process_keyring ;
 3056   struct rcu_head rcu ;
 3057};
 3058#line 116 "include/linux/cred.h"
 3059struct cred {
 3060   atomic_t usage ;
 3061   atomic_t subscribers ;
 3062   void *put_addr ;
 3063   unsigned int magic ;
 3064   uid_t uid ;
 3065   gid_t gid ;
 3066   uid_t suid ;
 3067   gid_t sgid ;
 3068   uid_t euid ;
 3069   gid_t egid ;
 3070   uid_t fsuid ;
 3071   gid_t fsgid ;
 3072   unsigned int securebits ;
 3073   kernel_cap_t cap_inheritable ;
 3074   kernel_cap_t cap_permitted ;
 3075   kernel_cap_t cap_effective ;
 3076   kernel_cap_t cap_bset ;
 3077   unsigned char jit_keyring ;
 3078   struct key *thread_keyring ;
 3079   struct key *request_key_auth ;
 3080   struct thread_group_cred *tgcred ;
 3081   void *security ;
 3082   struct user_struct *user ;
 3083   struct user_namespace *user_ns ;
 3084   struct group_info *group_info ;
 3085   struct rcu_head rcu ;
 3086};
 3087#line 61 "include/linux/llist.h"
 3088struct llist_node;
 3089#line 65 "include/linux/llist.h"
 3090struct llist_node {
 3091   struct llist_node *next ;
 3092};
 3093#line 97 "include/linux/sched.h"
 3094struct futex_pi_state;
 3095#line 98
 3096struct robust_list_head;
 3097#line 99
 3098struct bio_list;
 3099#line 100
 3100struct fs_struct;
 3101#line 101
 3102struct perf_event_context;
 3103#line 102
 3104struct blk_plug;
 3105#line 151
 3106struct cfs_rq;
 3107#line 15 "include/linux/aio.h"
 3108struct kioctx;
 3109#line 87 "include/linux/aio.h"
 3110union __anonunion_ki_obj_389 {
 3111   void *user ;
 3112   struct task_struct *tsk ;
 3113};
 3114#line 87
 3115struct eventfd_ctx;
 3116#line 87 "include/linux/aio.h"
 3117struct kiocb {
 3118   struct list_head ki_run_list ;
 3119   unsigned long ki_flags ;
 3120   int ki_users ;
 3121   unsigned int ki_key ;
 3122   struct file *ki_filp ;
 3123   struct kioctx *ki_ctx ;
 3124   int (*ki_cancel)(struct kiocb * , struct io_event * ) ;
 3125   ssize_t (*ki_retry)(struct kiocb * ) ;
 3126   void (*ki_dtor)(struct kiocb * ) ;
 3127   union __anonunion_ki_obj_389 ki_obj ;
 3128   __u64 ki_user_data ;
 3129   loff_t ki_pos ;
 3130   void *private ;
 3131   unsigned short ki_opcode ;
 3132   size_t ki_nbytes ;
 3133   char *ki_buf ;
 3134   size_t ki_left ;
 3135   struct iovec ki_inline_vec ;
 3136   struct iovec *ki_iovec ;
 3137   unsigned long ki_nr_segs ;
 3138   unsigned long ki_cur_seg ;
 3139   struct list_head ki_list ;
 3140   struct list_head ki_batch ;
 3141   struct eventfd_ctx *ki_eventfd ;
 3142};
 3143#line 166 "include/linux/aio.h"
 3144struct aio_ring_info {
 3145   unsigned long mmap_base ;
 3146   unsigned long mmap_size ;
 3147   struct page **ring_pages ;
 3148   spinlock_t ring_lock ;
 3149   long nr_pages ;
 3150   unsigned int nr ;
 3151   unsigned int tail ;
 3152   struct page *internal_pages[8] ;
 3153};
 3154#line 179 "include/linux/aio.h"
 3155struct kioctx {
 3156   atomic_t users ;
 3157   int dead ;
 3158   struct mm_struct *mm ;
 3159   unsigned long user_id ;
 3160   struct hlist_node list ;
 3161   wait_queue_head_t wait ;
 3162   spinlock_t ctx_lock ;
 3163   int reqs_active ;
 3164   struct list_head active_reqs ;
 3165   struct list_head run_list ;
 3166   unsigned int max_reqs ;
 3167   struct aio_ring_info ring_info ;
 3168   struct delayed_work wq ;
 3169   struct rcu_head rcu_head ;
 3170};
 3171#line 443 "include/linux/sched.h"
 3172struct sighand_struct {
 3173   atomic_t count ;
 3174   struct k_sigaction action[64] ;
 3175   spinlock_t siglock ;
 3176   wait_queue_head_t signalfd_wqh ;
 3177};
 3178#line 450 "include/linux/sched.h"
 3179struct pacct_struct {
 3180   int ac_flag ;
 3181   long ac_exitcode ;
 3182   unsigned long ac_mem ;
 3183   cputime_t ac_utime ;
 3184   cputime_t ac_stime ;
 3185   unsigned long ac_minflt ;
 3186   unsigned long ac_majflt ;
 3187};
 3188#line 458 "include/linux/sched.h"
 3189struct cpu_itimer {
 3190   cputime_t expires ;
 3191   cputime_t incr ;
 3192   u32 error ;
 3193   u32 incr_error ;
 3194};
 3195#line 476 "include/linux/sched.h"
 3196struct task_cputime {
 3197   cputime_t utime ;
 3198   cputime_t stime ;
 3199   unsigned long long sum_exec_runtime ;
 3200};
 3201#line 512 "include/linux/sched.h"
 3202struct thread_group_cputimer {
 3203   struct task_cputime cputime ;
 3204   int running ;
 3205   raw_spinlock_t lock ;
 3206};
 3207#line 519
 3208struct autogroup;
 3209#line 528
 3210struct tty_struct;
 3211#line 528
 3212struct taskstats;
 3213#line 528
 3214struct tty_audit_buf;
 3215#line 528 "include/linux/sched.h"
 3216struct signal_struct {
 3217   atomic_t sigcnt ;
 3218   atomic_t live ;
 3219   int nr_threads ;
 3220   wait_queue_head_t wait_chldexit ;
 3221   struct task_struct *curr_target ;
 3222   struct sigpending shared_pending ;
 3223   int group_exit_code ;
 3224   int notify_count ;
 3225   struct task_struct *group_exit_task ;
 3226   int group_stop_count ;
 3227   unsigned int flags ;
 3228   unsigned int is_child_subreaper : 1 ;
 3229   unsigned int has_child_subreaper : 1 ;
 3230   struct list_head posix_timers ;
 3231   struct hrtimer real_timer ;
 3232   struct pid *leader_pid ;
 3233   ktime_t it_real_incr ;
 3234   struct cpu_itimer it[2] ;
 3235   struct thread_group_cputimer cputimer ;
 3236   struct task_cputime cputime_expires ;
 3237   struct list_head cpu_timers[3] ;
 3238   struct pid *tty_old_pgrp ;
 3239   int leader ;
 3240   struct tty_struct *tty ;
 3241   struct autogroup *autogroup ;
 3242   cputime_t utime ;
 3243   cputime_t stime ;
 3244   cputime_t cutime ;
 3245   cputime_t cstime ;
 3246   cputime_t gtime ;
 3247   cputime_t cgtime ;
 3248   cputime_t prev_utime ;
 3249   cputime_t prev_stime ;
 3250   unsigned long nvcsw ;
 3251   unsigned long nivcsw ;
 3252   unsigned long cnvcsw ;
 3253   unsigned long cnivcsw ;
 3254   unsigned long min_flt ;
 3255   unsigned long maj_flt ;
 3256   unsigned long cmin_flt ;
 3257   unsigned long cmaj_flt ;
 3258   unsigned long inblock ;
 3259   unsigned long oublock ;
 3260   unsigned long cinblock ;
 3261   unsigned long coublock ;
 3262   unsigned long maxrss ;
 3263   unsigned long cmaxrss ;
 3264   struct task_io_accounting ioac ;
 3265   unsigned long long sum_sched_runtime ;
 3266   struct rlimit rlim[16] ;
 3267   struct pacct_struct pacct ;
 3268   struct taskstats *stats ;
 3269   unsigned int audit_tty ;
 3270   struct tty_audit_buf *tty_audit_buf ;
 3271   struct rw_semaphore group_rwsem ;
 3272   int oom_adj ;
 3273   int oom_score_adj ;
 3274   int oom_score_adj_min ;
 3275   struct mutex cred_guard_mutex ;
 3276};
 3277#line 703 "include/linux/sched.h"
 3278struct user_struct {
 3279   atomic_t __count ;
 3280   atomic_t processes ;
 3281   atomic_t files ;
 3282   atomic_t sigpending ;
 3283   atomic_t inotify_watches ;
 3284   atomic_t inotify_devs ;
 3285   atomic_t fanotify_listeners ;
 3286   atomic_long_t epoll_watches ;
 3287   unsigned long mq_bytes ;
 3288   unsigned long locked_shm ;
 3289   struct key *uid_keyring ;
 3290   struct key *session_keyring ;
 3291   struct hlist_node uidhash_node ;
 3292   uid_t uid ;
 3293   struct user_namespace *user_ns ;
 3294   atomic_long_t locked_vm ;
 3295};
 3296#line 748
 3297struct reclaim_state;
 3298#line 751 "include/linux/sched.h"
 3299struct sched_info {
 3300   unsigned long pcount ;
 3301   unsigned long long run_delay ;
 3302   unsigned long long last_arrival ;
 3303   unsigned long long last_queued ;
 3304};
 3305#line 763 "include/linux/sched.h"
 3306struct task_delay_info {
 3307   spinlock_t lock ;
 3308   unsigned int flags ;
 3309   struct timespec blkio_start ;
 3310   struct timespec blkio_end ;
 3311   u64 blkio_delay ;
 3312   u64 swapin_delay ;
 3313   u32 blkio_count ;
 3314   u32 swapin_count ;
 3315   struct timespec freepages_start ;
 3316   struct timespec freepages_end ;
 3317   u64 freepages_delay ;
 3318   u32 freepages_count ;
 3319};
 3320#line 1088
 3321struct io_context;
 3322#line 1102
 3323struct rq;
 3324#line 1122 "include/linux/sched.h"
 3325struct sched_class {
 3326   struct sched_class    *next ;
 3327   void (*enqueue_task)(struct rq *rq , struct task_struct *p , int flags ) ;
 3328   void (*dequeue_task)(struct rq *rq , struct task_struct *p , int flags ) ;
 3329   void (*yield_task)(struct rq *rq ) ;
 3330   bool (*yield_to_task)(struct rq *rq , struct task_struct *p , bool preempt ) ;
 3331   void (*check_preempt_curr)(struct rq *rq , struct task_struct *p , int flags ) ;
 3332   struct task_struct *(*pick_next_task)(struct rq *rq ) ;
 3333   void (*put_prev_task)(struct rq *rq , struct task_struct *p ) ;
 3334   int (*select_task_rq)(struct task_struct *p , int sd_flag , int flags ) ;
 3335   void (*pre_schedule)(struct rq *this_rq , struct task_struct *task ) ;
 3336   void (*post_schedule)(struct rq *this_rq ) ;
 3337   void (*task_waking)(struct task_struct *task ) ;
 3338   void (*task_woken)(struct rq *this_rq , struct task_struct *task ) ;
 3339   void (*set_cpus_allowed)(struct task_struct *p , struct cpumask    *newmask ) ;
 3340   void (*rq_online)(struct rq *rq ) ;
 3341   void (*rq_offline)(struct rq *rq ) ;
 3342   void (*set_curr_task)(struct rq *rq ) ;
 3343   void (*task_tick)(struct rq *rq , struct task_struct *p , int queued ) ;
 3344   void (*task_fork)(struct task_struct *p ) ;
 3345   void (*switched_from)(struct rq *this_rq , struct task_struct *task ) ;
 3346   void (*switched_to)(struct rq *this_rq , struct task_struct *task ) ;
 3347   void (*prio_changed)(struct rq *this_rq , struct task_struct *task , int oldprio ) ;
 3348   unsigned int (*get_rr_interval)(struct rq *rq , struct task_struct *task ) ;
 3349   void (*task_move_group)(struct task_struct *p , int on_rq ) ;
 3350};
 3351#line 1167 "include/linux/sched.h"
 3352struct load_weight {
 3353   unsigned long weight ;
 3354   unsigned long inv_weight ;
 3355};
 3356#line 1172 "include/linux/sched.h"
 3357struct sched_statistics {
 3358   u64 wait_start ;
 3359   u64 wait_max ;
 3360   u64 wait_count ;
 3361   u64 wait_sum ;
 3362   u64 iowait_count ;
 3363   u64 iowait_sum ;
 3364   u64 sleep_start ;
 3365   u64 sleep_max ;
 3366   s64 sum_sleep_runtime ;
 3367   u64 block_start ;
 3368   u64 block_max ;
 3369   u64 exec_max ;
 3370   u64 slice_max ;
 3371   u64 nr_migrations_cold ;
 3372   u64 nr_failed_migrations_affine ;
 3373   u64 nr_failed_migrations_running ;
 3374   u64 nr_failed_migrations_hot ;
 3375   u64 nr_forced_migrations ;
 3376   u64 nr_wakeups ;
 3377   u64 nr_wakeups_sync ;
 3378   u64 nr_wakeups_migrate ;
 3379   u64 nr_wakeups_local ;
 3380   u64 nr_wakeups_remote ;
 3381   u64 nr_wakeups_affine ;
 3382   u64 nr_wakeups_affine_attempts ;
 3383   u64 nr_wakeups_passive ;
 3384   u64 nr_wakeups_idle ;
 3385};
 3386#line 1207 "include/linux/sched.h"
 3387struct sched_entity {
 3388   struct load_weight load ;
 3389   struct rb_node run_node ;
 3390   struct list_head group_node ;
 3391   unsigned int on_rq ;
 3392   u64 exec_start ;
 3393   u64 sum_exec_runtime ;
 3394   u64 vruntime ;
 3395   u64 prev_sum_exec_runtime ;
 3396   u64 nr_migrations ;
 3397   struct sched_statistics statistics ;
 3398   struct sched_entity *parent ;
 3399   struct cfs_rq *cfs_rq ;
 3400   struct cfs_rq *my_q ;
 3401};
 3402#line 1233
 3403struct rt_rq;
 3404#line 1233 "include/linux/sched.h"
 3405struct sched_rt_entity {
 3406   struct list_head run_list ;
 3407   unsigned long timeout ;
 3408   unsigned int time_slice ;
 3409   int nr_cpus_allowed ;
 3410   struct sched_rt_entity *back ;
 3411   struct sched_rt_entity *parent ;
 3412   struct rt_rq *rt_rq ;
 3413   struct rt_rq *my_q ;
 3414};
 3415#line 1264
 3416struct css_set;
 3417#line 1264
 3418struct compat_robust_list_head;
 3419#line 1264
 3420struct mem_cgroup;
 3421#line 1264 "include/linux/sched.h"
 3422struct memcg_batch_info {
 3423   int do_batch ;
 3424   struct mem_cgroup *memcg ;
 3425   unsigned long nr_pages ;
 3426   unsigned long memsw_nr_pages ;
 3427};
 3428#line 1264 "include/linux/sched.h"
 3429struct task_struct {
 3430   long volatile   state ;
 3431   void *stack ;
 3432   atomic_t usage ;
 3433   unsigned int flags ;
 3434   unsigned int ptrace ;
 3435   struct llist_node wake_entry ;
 3436   int on_cpu ;
 3437   int on_rq ;
 3438   int prio ;
 3439   int static_prio ;
 3440   int normal_prio ;
 3441   unsigned int rt_priority ;
 3442   struct sched_class    *sched_class ;
 3443   struct sched_entity se ;
 3444   struct sched_rt_entity rt ;
 3445   struct hlist_head preempt_notifiers ;
 3446   unsigned char fpu_counter ;
 3447   unsigned int policy ;
 3448   cpumask_t cpus_allowed ;
 3449   struct sched_info sched_info ;
 3450   struct list_head tasks ;
 3451   struct plist_node pushable_tasks ;
 3452   struct mm_struct *mm ;
 3453   struct mm_struct *active_mm ;
 3454   unsigned int brk_randomized : 1 ;
 3455   int exit_state ;
 3456   int exit_code ;
 3457   int exit_signal ;
 3458   int pdeath_signal ;
 3459   unsigned int jobctl ;
 3460   unsigned int personality ;
 3461   unsigned int did_exec : 1 ;
 3462   unsigned int in_execve : 1 ;
 3463   unsigned int in_iowait : 1 ;
 3464   unsigned int sched_reset_on_fork : 1 ;
 3465   unsigned int sched_contributes_to_load : 1 ;
 3466   unsigned int irq_thread : 1 ;
 3467   pid_t pid ;
 3468   pid_t tgid ;
 3469   unsigned long stack_canary ;
 3470   struct task_struct *real_parent ;
 3471   struct task_struct *parent ;
 3472   struct list_head children ;
 3473   struct list_head sibling ;
 3474   struct task_struct *group_leader ;
 3475   struct list_head ptraced ;
 3476   struct list_head ptrace_entry ;
 3477   struct pid_link pids[3] ;
 3478   struct list_head thread_group ;
 3479   struct completion *vfork_done ;
 3480   int *set_child_tid ;
 3481   int *clear_child_tid ;
 3482   cputime_t utime ;
 3483   cputime_t stime ;
 3484   cputime_t utimescaled ;
 3485   cputime_t stimescaled ;
 3486   cputime_t gtime ;
 3487   cputime_t prev_utime ;
 3488   cputime_t prev_stime ;
 3489   unsigned long nvcsw ;
 3490   unsigned long nivcsw ;
 3491   struct timespec start_time ;
 3492   struct timespec real_start_time ;
 3493   unsigned long min_flt ;
 3494   unsigned long maj_flt ;
 3495   struct task_cputime cputime_expires ;
 3496   struct list_head cpu_timers[3] ;
 3497   struct cred    *real_cred ;
 3498   struct cred    *cred ;
 3499   struct cred *replacement_session_keyring ;
 3500   char comm[16] ;
 3501   int link_count ;
 3502   int total_link_count ;
 3503   struct sysv_sem sysvsem ;
 3504   unsigned long last_switch_count ;
 3505   struct thread_struct thread ;
 3506   struct fs_struct *fs ;
 3507   struct files_struct *files ;
 3508   struct nsproxy *nsproxy ;
 3509   struct signal_struct *signal ;
 3510   struct sighand_struct *sighand ;
 3511   sigset_t blocked ;
 3512   sigset_t real_blocked ;
 3513   sigset_t saved_sigmask ;
 3514   struct sigpending pending ;
 3515   unsigned long sas_ss_sp ;
 3516   size_t sas_ss_size ;
 3517   int (*notifier)(void *priv ) ;
 3518   void *notifier_data ;
 3519   sigset_t *notifier_mask ;
 3520   struct audit_context *audit_context ;
 3521   uid_t loginuid ;
 3522   unsigned int sessionid ;
 3523   seccomp_t seccomp ;
 3524   u32 parent_exec_id ;
 3525   u32 self_exec_id ;
 3526   spinlock_t alloc_lock ;
 3527   raw_spinlock_t pi_lock ;
 3528   struct plist_head pi_waiters ;
 3529   struct rt_mutex_waiter *pi_blocked_on ;
 3530   struct mutex_waiter *blocked_on ;
 3531   unsigned int irq_events ;
 3532   unsigned long hardirq_enable_ip ;
 3533   unsigned long hardirq_disable_ip ;
 3534   unsigned int hardirq_enable_event ;
 3535   unsigned int hardirq_disable_event ;
 3536   int hardirqs_enabled ;
 3537   int hardirq_context ;
 3538   unsigned long softirq_disable_ip ;
 3539   unsigned long softirq_enable_ip ;
 3540   unsigned int softirq_disable_event ;
 3541   unsigned int softirq_enable_event ;
 3542   int softirqs_enabled ;
 3543   int softirq_context ;
 3544   void *journal_info ;
 3545   struct bio_list *bio_list ;
 3546   struct blk_plug *plug ;
 3547   struct reclaim_state *reclaim_state ;
 3548   struct backing_dev_info *backing_dev_info ;
 3549   struct io_context *io_context ;
 3550   unsigned long ptrace_message ;
 3551   siginfo_t *last_siginfo ;
 3552   struct task_io_accounting ioac ;
 3553   u64 acct_rss_mem1 ;
 3554   u64 acct_vm_mem1 ;
 3555   cputime_t acct_timexpd ;
 3556   nodemask_t mems_allowed ;
 3557   seqcount_t mems_allowed_seq ;
 3558   int cpuset_mem_spread_rotor ;
 3559   int cpuset_slab_spread_rotor ;
 3560   struct css_set *cgroups ;
 3561   struct list_head cg_list ;
 3562   struct robust_list_head *robust_list ;
 3563   struct compat_robust_list_head *compat_robust_list ;
 3564   struct list_head pi_state_list ;
 3565   struct futex_pi_state *pi_state_cache ;
 3566   struct perf_event_context *perf_event_ctxp[2] ;
 3567   struct mutex perf_event_mutex ;
 3568   struct list_head perf_event_list ;
 3569   struct mempolicy *mempolicy ;
 3570   short il_next ;
 3571   short pref_node_fork ;
 3572   struct rcu_head rcu ;
 3573   struct pipe_inode_info *splice_pipe ;
 3574   struct task_delay_info *delays ;
 3575   int make_it_fail ;
 3576   int nr_dirtied ;
 3577   int nr_dirtied_pause ;
 3578   unsigned long dirty_paused_when ;
 3579   int latency_record_count ;
 3580   struct latency_record latency_record[32] ;
 3581   unsigned long timer_slack_ns ;
 3582   unsigned long default_timer_slack_ns ;
 3583   struct list_head *scm_work_list ;
 3584   unsigned long trace ;
 3585   unsigned long trace_recursion ;
 3586   struct memcg_batch_info memcg_batch ;
 3587   atomic_t ptrace_bp_refcnt ;
 3588};
 3589#line 39 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/compat.h"
 3590typedef s32 compat_long_t;
 3591#line 212 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/compat.h"
 3592typedef u32 compat_uptr_t;
 3593#line 226 "include/linux/compat.h"
 3594struct compat_robust_list {
 3595   compat_uptr_t next ;
 3596};
 3597#line 230 "include/linux/compat.h"
 3598struct compat_robust_list_head {
 3599   struct compat_robust_list list ;
 3600   compat_long_t futex_offset ;
 3601   compat_uptr_t list_op_pending ;
 3602};
 3603#line 35 "include/linux/agp_backend.h"
 3604enum chipset_type {
 3605    NOT_SUPPORTED = 0,
 3606    SUPPORTED = 1
 3607} ;
 3608#line 40 "include/linux/agp_backend.h"
 3609struct agp_version {
 3610   u16 major ;
 3611   u16 minor ;
 3612};
 3613#line 45 "include/linux/agp_backend.h"
 3614struct agp_kern_info {
 3615   struct agp_version version ;
 3616   struct pci_dev *device ;
 3617   enum chipset_type chipset ;
 3618   unsigned long mode ;
 3619   unsigned long aper_base ;
 3620   size_t aper_size ;
 3621   int max_memory ;
 3622   int current_memory ;
 3623   bool cant_use_aperture ;
 3624   unsigned long page_mask ;
 3625   struct vm_operations_struct    *vm_ops ;
 3626};
 3627#line 67
 3628struct agp_bridge_data;
 3629#line 39 "include/linux/poll.h"
 3630struct poll_table_struct {
 3631   void (*_qproc)(struct file * , wait_queue_head_t * , struct poll_table_struct * ) ;
 3632   unsigned long _key ;
 3633};
 3634#line 74 "include/drm/drm.h"
 3635typedef unsigned int drm_magic_t;
 3636#line 85 "include/drm/drm.h"
 3637struct drm_clip_rect {
 3638   unsigned short x1 ;
 3639   unsigned short y1 ;
 3640   unsigned short x2 ;
 3641   unsigned short y2 ;
 3642};
 3643#line 118 "include/drm/drm.h"
 3644struct drm_hw_lock {
 3645   unsigned int volatile   lock ;
 3646   char padding[60] ;
 3647};
 3648#line 145 "include/drm/drm.h"
 3649struct drm_unique {
 3650   size_t unique_len ;
 3651   char *unique ;
 3652};
 3653#line 177
 3654enum drm_map_type {
 3655    _DRM_FRAME_BUFFER = 0,
 3656    _DRM_REGISTERS = 1,
 3657    _DRM_SHM = 2,
 3658    _DRM_AGP = 3,
 3659    _DRM_SCATTER_GATHER = 4,
 3660    _DRM_CONSISTENT = 5,
 3661    _DRM_GEM = 6
 3662} ;
 3663#line 190
 3664enum drm_map_flags {
 3665    _DRM_RESTRICTED = 1,
 3666    _DRM_READ_ONLY = 2,
 3667    _DRM_LOCKED = 4,
 3668    _DRM_KERNEL = 8,
 3669    _DRM_WRITE_COMBINING = 16,
 3670    _DRM_CONTAINS_LOCK = 32,
 3671    _DRM_REMOVABLE = 64,
 3672    _DRM_DRIVER = 128
 3673} ;
 3674#line 235
 3675enum drm_stat_type {
 3676    _DRM_STAT_LOCK = 0,
 3677    _DRM_STAT_OPENS = 1,
 3678    _DRM_STAT_CLOSES = 2,
 3679    _DRM_STAT_IOCTLS = 3,
 3680    _DRM_STAT_LOCKS = 4,
 3681    _DRM_STAT_UNLOCKS = 5,
 3682    _DRM_STAT_VALUE = 6,
 3683    _DRM_STAT_BYTE = 7,
 3684    _DRM_STAT_COUNT = 8,
 3685    _DRM_STAT_IRQ = 9,
 3686    _DRM_STAT_PRIMARY = 10,
 3687    _DRM_STAT_SECONDARY = 11,
 3688    _DRM_STAT_DMA = 12,
 3689    _DRM_STAT_SPECIAL = 13,
 3690    _DRM_STAT_MISSED = 14
 3691} ;
 3692#line 400
 3693enum drm_ctx_flags {
 3694    _DRM_CONTEXT_PRESERVED = 1,
 3695    _DRM_CONTEXT_2DONLY = 2
 3696} ;
 3697#line 456 "include/drm/drm.h"
 3698struct drm_irq_busid {
 3699   int irq ;
 3700   int busnum ;
 3701   int devnum ;
 3702   int funcnum ;
 3703};
 3704#line 579 "include/drm/drm.h"
 3705struct drm_set_version {
 3706   int drm_di_major ;
 3707   int drm_di_minor ;
 3708   int drm_dd_major ;
 3709   int drm_dd_minor ;
 3710};
 3711#line 275 "include/drm/drm_mode.h"
 3712struct drm_mode_fb_cmd2 {
 3713   __u32 fb_id ;
 3714   __u32 width ;
 3715   __u32 height ;
 3716   __u32 pixel_format ;
 3717   __u32 flags ;
 3718   __u32 handles[4] ;
 3719   __u32 pitches[4] ;
 3720   __u32 offsets[4] ;
 3721};
 3722#line 418 "include/drm/drm_mode.h"
 3723struct drm_mode_create_dumb {
 3724   uint32_t height ;
 3725   uint32_t width ;
 3726   uint32_t bpp ;
 3727   uint32_t flags ;
 3728   uint32_t handle ;
 3729   uint32_t pitch ;
 3730   uint64_t size ;
 3731};
 3732#line 757 "include/drm/drm.h"
 3733struct drm_event {
 3734   __u32 type ;
 3735   __u32 length ;
 3736};
 3737#line 765 "include/drm/drm.h"
 3738struct drm_event_vblank {
 3739   struct drm_event base ;
 3740   __u64 user_data ;
 3741   __u32 tv_sec ;
 3742   __u32 tv_usec ;
 3743   __u32 sequence ;
 3744   __u32 reserved ;
 3745};
 3746#line 51 "include/linux/idr.h"
 3747struct idr_layer {
 3748   unsigned long bitmap ;
 3749   struct idr_layer *ary[1 << 6] ;
 3750   int count ;
 3751   int layer ;
 3752   struct rcu_head rcu_head ;
 3753};
 3754#line 59 "include/linux/idr.h"
 3755struct idr {
 3756   struct idr_layer *top ;
 3757   struct idr_layer *id_free ;
 3758   int layers ;
 3759   int id_free_cnt ;
 3760   spinlock_t lock ;
 3761};
 3762#line 129 "include/linux/idr.h"
 3763struct ida_bitmap {
 3764   long nr_busy ;
 3765   unsigned long bitmap[128UL / sizeof(long ) - 1UL] ;
 3766};
 3767#line 134 "include/linux/idr.h"
 3768struct ida {
 3769   struct idr idr ;
 3770   struct ida_bitmap *free_bitmap ;
 3771};
 3772#line 84 "include/drm/drmP.h"
 3773struct drm_file;
 3774#line 85
 3775struct drm_device;
 3776#line 42 "include/drm/drm_hashtab.h"
 3777struct drm_hash_item {
 3778   struct hlist_node head ;
 3779   unsigned long key ;
 3780};
 3781#line 47 "include/drm/drm_hashtab.h"
 3782struct drm_open_hash {
 3783   struct hlist_head *table ;
 3784   u8 order ;
 3785};
 3786#line 17 "include/linux/seq_file.h"
 3787struct seq_file {
 3788   char *buf ;
 3789   size_t size ;
 3790   size_t from ;
 3791   size_t count ;
 3792   loff_t index ;
 3793   loff_t read_pos ;
 3794   u64 version ;
 3795   struct mutex lock ;
 3796   struct seq_operations    *op ;
 3797   int poll_event ;
 3798   void *private ;
 3799};
 3800#line 31 "include/linux/seq_file.h"
 3801struct seq_operations {
 3802   void *(*start)(struct seq_file *m , loff_t *pos ) ;
 3803   void (*stop)(struct seq_file *m , void *v ) ;
 3804   void *(*next)(struct seq_file *m , void *v , loff_t *pos ) ;
 3805   int (*show)(struct seq_file *m , void *v ) ;
 3806};
 3807#line 44 "include/drm/drm_mm.h"
 3808struct drm_mm;
 3809#line 44 "include/drm/drm_mm.h"
 3810struct drm_mm_node {
 3811   struct list_head node_list ;
 3812   struct list_head hole_stack ;
 3813   unsigned int hole_follows : 1 ;
 3814   unsigned int scanned_block : 1 ;
 3815   unsigned int scanned_prev_free : 1 ;
 3816   unsigned int scanned_next_free : 1 ;
 3817   unsigned int scanned_preceeds_hole : 1 ;
 3818   unsigned int allocated : 1 ;
 3819   unsigned long start ;
 3820   unsigned long size ;
 3821   struct drm_mm *mm ;
 3822};
 3823#line 58 "include/drm/drm_mm.h"
 3824struct drm_mm {
 3825   struct list_head hole_stack ;
 3826   struct drm_mm_node head_node ;
 3827   struct list_head unused_nodes ;
 3828   int num_unused ;
 3829   spinlock_t unused_lock ;
 3830   unsigned int scan_check_range : 1 ;
 3831   unsigned int scan_alignment ;
 3832   unsigned long scan_size ;
 3833   unsigned long scan_hit_start ;
 3834   unsigned int scan_hit_size ;
 3835   unsigned int scanned_blocks ;
 3836   unsigned long scan_start ;
 3837   unsigned long scan_end ;
 3838   struct drm_mm_node *prev_scanned_node ;
 3839};
 3840#line 295 "include/drm/drmP.h"
 3841typedef int drm_ioctl_t(struct drm_device *dev , void *data , struct drm_file *file_priv );
 3842#line 310 "include/drm/drmP.h"
 3843struct drm_ioctl_desc {
 3844   unsigned int cmd ;
 3845   int flags ;
 3846   drm_ioctl_t *func ;
 3847   unsigned int cmd_drv ;
 3848};
 3849#line 340
 3850enum __anonenum_list_409 {
 3851    DRM_LIST_NONE = 0,
 3852    DRM_LIST_FREE = 1,
 3853    DRM_LIST_WAIT = 2,
 3854    DRM_LIST_PEND = 3,
 3855    DRM_LIST_PRIO = 4,
 3856    DRM_LIST_RECLAIM = 5
 3857} ;
 3858#line 340 "include/drm/drmP.h"
 3859struct drm_buf {
 3860   int idx ;
 3861   int total ;
 3862   int order ;
 3863   int used ;
 3864   unsigned long offset ;
 3865   void *address ;
 3866   unsigned long bus_address ;
 3867   struct drm_buf *next ;
 3868   int volatile   waiting ;
 3869   int volatile   pending ;
 3870   wait_queue_head_t dma_wait ;
 3871   struct drm_file *file_priv ;
 3872   int context ;
 3873   int while_locked ;
 3874   enum __anonenum_list_409 list ;
 3875   int dev_priv_size ;
 3876   void *dev_private ;
 3877};
 3878#line 369 "include/drm/drmP.h"
 3879struct drm_waitlist {
 3880   int count ;
 3881   struct drm_buf **bufs ;
 3882   struct drm_buf **rp ;
 3883   struct drm_buf **wp ;
 3884   struct drm_buf **end ;
 3885   spinlock_t read_lock ;
 3886   spinlock_t write_lock ;
 3887};
 3888#line 379 "include/drm/drmP.h"
 3889struct drm_freelist {
 3890   int initialized ;
 3891   atomic_t count ;
 3892   struct drm_buf *next ;
 3893   wait_queue_head_t waiting ;
 3894   int low_mark ;
 3895   int high_mark ;
 3896   atomic_t wfh ;
 3897   spinlock_t lock ;
 3898};
 3899#line 391 "include/drm/drmP.h"
 3900struct drm_dma_handle {
 3901   dma_addr_t busaddr ;
 3902   void *vaddr ;
 3903   size_t size ;
 3904};
 3905#line 400 "include/drm/drmP.h"
 3906struct drm_buf_entry {
 3907   int buf_size ;
 3908   int buf_count ;
 3909   struct drm_buf *buflist ;
 3910   int seg_count ;
 3911   int page_order ;
 3912   struct drm_dma_handle **seglist ;
 3913   struct drm_freelist freelist ;
 3914};
 3915#line 412 "include/drm/drmP.h"
 3916struct drm_pending_event {
 3917   struct drm_event *event ;
 3918   struct list_head link ;
 3919   struct drm_file *file_priv ;
 3920   pid_t pid ;
 3921   void (*destroy)(struct drm_pending_event *event ) ;
 3922};
 3923#line 422 "include/drm/drmP.h"
 3924struct drm_prime_file_private {
 3925   struct list_head head ;
 3926   struct mutex lock ;
 3927};
 3928#line 428
 3929struct drm_minor;
 3930#line 428
 3931struct drm_master;
 3932#line 428 "include/drm/drmP.h"
 3933struct drm_file {
 3934   int authenticated ;
 3935   pid_t pid ;
 3936   uid_t uid ;
 3937   drm_magic_t magic ;
 3938   unsigned long ioctl_count ;
 3939   struct list_head lhead ;
 3940   struct drm_minor *minor ;
 3941   unsigned long lock_count ;
 3942   struct idr object_idr ;
 3943   spinlock_t table_lock ;
 3944   struct file *filp ;
 3945   void *driver_priv ;
 3946   int is_master ;
 3947   struct drm_master *master ;
 3948   struct list_head fbs ;
 3949   wait_queue_head_t event_wait ;
 3950   struct list_head event_list ;
 3951   int event_space ;
 3952   struct drm_prime_file_private prime ;
 3953};
 3954#line 459 "include/drm/drmP.h"
 3955struct drm_queue {
 3956   atomic_t use_count ;
 3957   atomic_t finalization ;
 3958   atomic_t block_count ;
 3959   atomic_t block_read ;
 3960   wait_queue_head_t read_queue ;
 3961   atomic_t block_write ;
 3962   wait_queue_head_t write_queue ;
 3963   atomic_t total_queued ;
 3964   atomic_t total_flushed ;
 3965   atomic_t total_locks ;
 3966   enum drm_ctx_flags flags ;
 3967   struct drm_waitlist waitlist ;
 3968   wait_queue_head_t flush_queue ;
 3969};
 3970#line 478 "include/drm/drmP.h"
 3971struct drm_lock_data {
 3972   struct drm_hw_lock *hw_lock ;
 3973   struct drm_file *file_priv ;
 3974   wait_queue_head_t lock_queue ;
 3975   unsigned long lock_time ;
 3976   spinlock_t spinlock ;
 3977   uint32_t kernel_waiters ;
 3978   uint32_t user_waiters ;
 3979   int idle_has_lock ;
 3980};
 3981#line 493
 3982enum __anonenum_flags_410 {
 3983    _DRM_DMA_USE_AGP = 1,
 3984    _DRM_DMA_USE_SG = 2,
 3985    _DRM_DMA_USE_FB = 4,
 3986    _DRM_DMA_USE_PCI_RO = 8
 3987} ;
 3988#line 493 "include/drm/drmP.h"
 3989struct drm_device_dma {
 3990   struct drm_buf_entry bufs[23] ;
 3991   int buf_count ;
 3992   struct drm_buf **buflist ;
 3993   int seg_count ;
 3994   int page_count ;
 3995   unsigned long *pagelist ;
 3996   unsigned long byte_count ;
 3997   enum __anonenum_flags_410 flags ;
 3998};
 3999#line 527 "include/drm/drmP.h"
 4000struct drm_agp_head {
 4001   struct agp_kern_info agp_info ;
 4002   struct list_head memory ;
 4003   unsigned long mode ;
 4004   struct agp_bridge_data *bridge ;
 4005   int enabled ;
 4006   int acquired ;
 4007   unsigned long base ;
 4008   int agp_mtrr ;
 4009   int cant_use_aperture ;
 4010   unsigned long page_mask ;
 4011};
 4012#line 543 "include/drm/drmP.h"
 4013struct drm_sg_mem {
 4014   unsigned long handle ;
 4015   void *virtual ;
 4016   int pages ;
 4017   struct page **pagelist ;
 4018   dma_addr_t *busaddr ;
 4019};
 4020#line 551 "include/drm/drmP.h"
 4021struct drm_sigdata {
 4022   int context ;
 4023   struct drm_hw_lock *lock ;
 4024};
 4025#line 560 "include/drm/drmP.h"
 4026struct drm_local_map {
 4027   resource_size_t offset ;
 4028   unsigned long size ;
 4029   enum drm_map_type type ;
 4030   enum drm_map_flags flags ;
 4031   void *handle ;
 4032   int mtrr ;
 4033};
 4034#line 575 "include/drm/drmP.h"
 4035struct drm_map_list {
 4036   struct list_head head ;
 4037   struct drm_hash_item hash ;
 4038   struct drm_local_map *map ;
 4039   uint64_t user_token ;
 4040   struct drm_master *master ;
 4041   struct drm_mm_node *file_offset_node ;
 4042};
 4043#line 624
 4044struct dma_buf;
 4045#line 624
 4046struct dma_buf_attachment;
 4047#line 624 "include/drm/drmP.h"
 4048struct drm_gem_object {
 4049   struct kref refcount ;
 4050   atomic_t handle_count ;
 4051   struct drm_device *dev ;
 4052   struct file *filp ;
 4053   struct drm_map_list map_list ;
 4054   size_t size ;
 4055   int name ;
 4056   uint32_t read_domains ;
 4057   uint32_t write_domain ;
 4058   uint32_t pending_read_domains ;
 4059   uint32_t pending_write_domain ;
 4060   void *driver_private ;
 4061   struct dma_buf *export_dma_buf ;
 4062   struct dma_buf_attachment *import_attach ;
 4063};
 4064#line 28 "include/linux/of.h"
 4065typedef u32 phandle;
 4066#line 31 "include/linux/of.h"
 4067struct property {
 4068   char *name ;
 4069   int length ;
 4070   void *value ;
 4071   struct property *next ;
 4072   unsigned long _flags ;
 4073   unsigned int unique_id ;
 4074};
 4075#line 44 "include/linux/of.h"
 4076struct device_node {
 4077   char    *name ;
 4078   char    *type ;
 4079   phandle phandle ;
 4080   char *full_name ;
 4081   struct property *properties ;
 4082   struct property *deadprops ;
 4083   struct device_node *parent ;
 4084   struct device_node *child ;
 4085   struct device_node *sibling ;
 4086   struct device_node *next ;
 4087   struct device_node *allnext ;
 4088   struct proc_dir_entry *pde ;
 4089   struct kref kref ;
 4090   unsigned long _flags ;
 4091   void *data ;
 4092};
 4093#line 193 "include/linux/serial.h"
 4094struct serial_icounter_struct {
 4095   int cts ;
 4096   int dsr ;
 4097   int rng ;
 4098   int dcd ;
 4099   int rx ;
 4100   int tx ;
 4101   int frame ;
 4102   int overrun ;
 4103   int parity ;
 4104   int brk ;
 4105   int buf_overrun ;
 4106   int reserved[9] ;
 4107};
 4108#line 6 "include/asm-generic/termbits.h"
 4109typedef unsigned char cc_t;
 4110#line 7 "include/asm-generic/termbits.h"
 4111typedef unsigned int speed_t;
 4112#line 8 "include/asm-generic/termbits.h"
 4113typedef unsigned int tcflag_t;
 4114#line 31 "include/asm-generic/termbits.h"
 4115struct ktermios {
 4116   tcflag_t c_iflag ;
 4117   tcflag_t c_oflag ;
 4118   tcflag_t c_cflag ;
 4119   tcflag_t c_lflag ;
 4120   cc_t c_line ;
 4121   cc_t c_cc[19] ;
 4122   speed_t c_ispeed ;
 4123   speed_t c_ospeed ;
 4124};
 4125#line 14 "include/asm-generic/termios.h"
 4126struct winsize {
 4127   unsigned short ws_row ;
 4128   unsigned short ws_col ;
 4129   unsigned short ws_xpixel ;
 4130   unsigned short ws_ypixel ;
 4131};
 4132#line 9 "include/linux/termios.h"
 4133struct termiox {
 4134   __u16 x_hflag ;
 4135   __u16 x_cflag ;
 4136   __u16 x_rflag[5] ;
 4137   __u16 x_sflag ;
 4138};
 4139#line 249 "include/linux/tty_driver.h"
 4140struct tty_operations {
 4141   struct tty_struct *(*lookup)(struct tty_driver *driver , struct inode *inode ,
 4142                                int idx ) ;
 4143   int (*install)(struct tty_driver *driver , struct tty_struct *tty ) ;
 4144   void (*remove)(struct tty_driver *driver , struct tty_struct *tty ) ;
 4145   int (*open)(struct tty_struct *tty , struct file *filp ) ;
 4146   void (*close)(struct tty_struct *tty , struct file *filp ) ;
 4147   void (*shutdown)(struct tty_struct *tty ) ;
 4148   void (*cleanup)(struct tty_struct *tty ) ;
 4149   int (*write)(struct tty_struct *tty , unsigned char    *buf , int count ) ;
 4150   int (*put_char)(struct tty_struct *tty , unsigned char ch ) ;
 4151   void (*flush_chars)(struct tty_struct *tty ) ;
 4152   int (*write_room)(struct tty_struct *tty ) ;
 4153   int (*chars_in_buffer)(struct tty_struct *tty ) ;
 4154   int (*ioctl)(struct tty_struct *tty , unsigned int cmd , unsigned long arg ) ;
 4155   long (*compat_ioctl)(struct tty_struct *tty , unsigned int cmd , unsigned long arg ) ;
 4156   void (*set_termios)(struct tty_struct *tty , struct ktermios *old ) ;
 4157   void (*throttle)(struct tty_struct *tty ) ;
 4158   void (*unthrottle)(struct tty_struct *tty ) ;
 4159   void (*stop)(struct tty_struct *tty ) ;
 4160   void (*start)(struct tty_struct *tty ) ;
 4161   void (*hangup)(struct tty_struct *tty ) ;
 4162   int (*break_ctl)(struct tty_struct *tty , int state ) ;
 4163   void (*flush_buffer)(struct tty_struct *tty ) ;
 4164   void (*set_ldisc)(struct tty_struct *tty ) ;
 4165   void (*wait_until_sent)(struct tty_struct *tty , int timeout ) ;
 4166   void (*send_xchar)(struct tty_struct *tty , char ch ) ;
 4167   int (*tiocmget)(struct tty_struct *tty ) ;
 4168   int (*tiocmset)(struct tty_struct *tty , unsigned int set , unsigned int clear ) ;
 4169   int (*resize)(struct tty_struct *tty , struct winsize *ws ) ;
 4170   int (*set_termiox)(struct tty_struct *tty , struct termiox *tnew ) ;
 4171   int (*get_icount)(struct tty_struct *tty , struct serial_icounter_struct *icount ) ;
 4172   int (*poll_init)(struct tty_driver *driver , int line , char *options ) ;
 4173   int (*poll_get_char)(struct tty_driver *driver , int line ) ;
 4174   void (*poll_put_char)(struct tty_driver *driver , int line , char ch ) ;
 4175   struct file_operations    *proc_fops ;
 4176};
 4177#line 294 "include/linux/tty_driver.h"
 4178struct tty_driver {
 4179   int magic ;
 4180   struct kref kref ;
 4181   struct cdev cdev ;
 4182   struct module *owner ;
 4183   char    *driver_name ;
 4184   char    *name ;
 4185   int name_base ;
 4186   int major ;
 4187   int minor_start ;
 4188   int num ;
 4189   short type ;
 4190   short subtype ;
 4191   struct ktermios init_termios ;
 4192   int flags ;
 4193   struct proc_dir_entry *proc_entry ;
 4194   struct tty_driver *other ;
 4195   struct tty_struct **ttys ;
 4196   struct ktermios **termios ;
 4197   void *driver_state ;
 4198   struct tty_operations    *ops ;
 4199   struct list_head tty_drivers ;
 4200};
 4201#line 49 "include/linux/pps_kernel.h"
 4202struct pps_event_time {
 4203   struct timespec ts_real ;
 4204};
 4205#line 114 "include/linux/tty_ldisc.h"
 4206struct tty_ldisc_ops {
 4207   int magic ;
 4208   char *name ;
 4209   int num ;
 4210   int flags ;
 4211   int (*open)(struct tty_struct * ) ;
 4212   void (*close)(struct tty_struct * ) ;
 4213   void (*flush_buffer)(struct tty_struct *tty ) ;
 4214   ssize_t (*chars_in_buffer)(struct tty_struct *tty ) ;
 4215   ssize_t (*read)(struct tty_struct *tty , struct file *file , unsigned char *buf ,
 4216                   size_t nr ) ;
 4217   ssize_t (*write)(struct tty_struct *tty , struct file *file , unsigned char    *buf ,
 4218                    size_t nr ) ;
 4219   int (*ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd , unsigned long arg ) ;
 4220   long (*compat_ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd ,
 4221                        unsigned long arg ) ;
 4222   void (*set_termios)(struct tty_struct *tty , struct ktermios *old ) ;
 4223   unsigned int (*poll)(struct tty_struct * , struct file * , struct poll_table_struct * ) ;
 4224   int (*hangup)(struct tty_struct *tty ) ;
 4225   void (*receive_buf)(struct tty_struct * , unsigned char    *cp , char *fp ,
 4226                       int count ) ;
 4227   void (*write_wakeup)(struct tty_struct * ) ;
 4228   void (*dcd_change)(struct tty_struct * , unsigned int  , struct pps_event_time * ) ;
 4229   struct module *owner ;
 4230   int refcount ;
 4231};
 4232#line 154 "include/linux/tty_ldisc.h"
 4233struct tty_ldisc {
 4234   struct tty_ldisc_ops *ops ;
 4235   atomic_t users ;
 4236};
 4237#line 64 "include/linux/tty.h"
 4238struct tty_buffer {
 4239   struct tty_buffer *next ;
 4240   char *char_buf_ptr ;
 4241   unsigned char *flag_buf_ptr ;
 4242   int used ;
 4243   int size ;
 4244   int commit ;
 4245   int read ;
 4246   unsigned long data[0] ;
 4247};
 4248#line 87 "include/linux/tty.h"
 4249struct tty_bufhead {
 4250   struct work_struct work ;
 4251   spinlock_t lock ;
 4252   struct tty_buffer *head ;
 4253   struct tty_buffer *tail ;
 4254   struct tty_buffer *free ;
 4255   int memory_used ;
 4256};
 4257#line 202
 4258struct tty_port;
 4259#line 204 "include/linux/tty.h"
 4260struct tty_port_operations {
 4261   int (*carrier_raised)(struct tty_port *port ) ;
 4262   void (*dtr_rts)(struct tty_port *port , int raise ) ;
 4263   void (*shutdown)(struct tty_port *port ) ;
 4264   void (*drop)(struct tty_port *port ) ;
 4265   int (*activate)(struct tty_port *port , struct tty_struct *tty ) ;
 4266   void (*destruct)(struct tty_port *port ) ;
 4267};
 4268#line 223 "include/linux/tty.h"
 4269struct tty_port {
 4270   struct tty_struct *tty ;
 4271   struct tty_port_operations    *ops ;
 4272   spinlock_t lock ;
 4273   int blocked_open ;
 4274   int count ;
 4275   wait_queue_head_t open_wait ;
 4276   wait_queue_head_t close_wait ;
 4277   wait_queue_head_t delta_msr_wait ;
 4278   unsigned long flags ;
 4279   unsigned char console : 1 ;
 4280   struct mutex mutex ;
 4281   struct mutex buf_mutex ;
 4282   unsigned char *xmit_buf ;
 4283   unsigned int close_delay ;
 4284   unsigned int closing_wait ;
 4285   int drain_delay ;
 4286   struct kref kref ;
 4287};
 4288#line 259 "include/linux/tty.h"
 4289struct tty_struct {
 4290   int magic ;
 4291   struct kref kref ;
 4292   struct device *dev ;
 4293   struct tty_driver *driver ;
 4294   struct tty_operations    *ops ;
 4295   int index ;
 4296   struct mutex ldisc_mutex ;
 4297   struct tty_ldisc *ldisc ;
 4298   struct mutex termios_mutex ;
 4299   spinlock_t ctrl_lock ;
 4300   struct ktermios *termios ;
 4301   struct ktermios *termios_locked ;
 4302   struct termiox *termiox ;
 4303   char name[64] ;
 4304   struct pid *pgrp ;
 4305   struct pid *session ;
 4306   unsigned long flags ;
 4307   int count ;
 4308   struct winsize winsize ;
 4309   unsigned char stopped : 1 ;
 4310   unsigned char hw_stopped : 1 ;
 4311   unsigned char flow_stopped : 1 ;
 4312   unsigned char packet : 1 ;
 4313   unsigned char low_latency : 1 ;
 4314   unsigned char warned : 1 ;
 4315   unsigned char ctrl_status ;
 4316   unsigned int receive_room ;
 4317   struct tty_struct *link ;
 4318   struct fasync_struct *fasync ;
 4319   struct tty_bufhead buf ;
 4320   int alt_speed ;
 4321   wait_queue_head_t write_wait ;
 4322   wait_queue_head_t read_wait ;
 4323   struct work_struct hangup_work ;
 4324   void *disc_data ;
 4325   void *driver_data ;
 4326   struct list_head tty_files ;
 4327   unsigned int column ;
 4328   unsigned char lnext : 1 ;
 4329   unsigned char erasing : 1 ;
 4330   unsigned char raw : 1 ;
 4331   unsigned char real_raw : 1 ;
 4332   unsigned char icanon : 1 ;
 4333   unsigned char closing : 1 ;
 4334   unsigned char echo_overrun : 1 ;
 4335   unsigned short minimum_to_wake ;
 4336   unsigned long overrun_time ;
 4337   int num_overrun ;
 4338   unsigned long process_char_map[256UL / (8UL * sizeof(unsigned long ))] ;
 4339   char *read_buf ;
 4340   int read_head ;
 4341   int read_tail ;
 4342   int read_cnt ;
 4343   unsigned long read_flags[4096UL / (8UL * sizeof(unsigned long ))] ;
 4344   unsigned char *echo_buf ;
 4345   unsigned int echo_pos ;
 4346   unsigned int echo_cnt ;
 4347   int canon_data ;
 4348   unsigned long canon_head ;
 4349   unsigned int canon_column ;
 4350   struct mutex atomic_read_lock ;
 4351   struct mutex atomic_write_lock ;
 4352   struct mutex output_lock ;
 4353   struct mutex echo_lock ;
 4354   unsigned char *write_buf ;
 4355   int write_cnt ;
 4356   spinlock_t read_lock ;
 4357   struct work_struct SAK_work ;
 4358   struct tty_port *port ;
 4359};
 4360#line 37 "include/drm/drm_crtc.h"
 4361struct drm_mode_set;
 4362#line 38
 4363struct drm_framebuffer;
 4364#line 50 "include/drm/drm_crtc.h"
 4365struct drm_mode_object {
 4366   uint32_t id ;
 4367   uint32_t type ;
 4368};
 4369#line 63
 4370enum drm_mode_status {
 4371    MODE_OK = 0,
 4372    MODE_HSYNC = 1,
 4373    MODE_VSYNC = 2,
 4374    MODE_H_ILLEGAL = 3,
 4375    MODE_V_ILLEGAL = 4,
 4376    MODE_BAD_WIDTH = 5,
 4377    MODE_NOMODE = 6,
 4378    MODE_NO_INTERLACE = 7,
 4379    MODE_NO_DBLESCAN = 8,
 4380    MODE_NO_VSCAN = 9,
 4381    MODE_MEM = 10,
 4382    MODE_VIRTUAL_X = 11,
 4383    MODE_VIRTUAL_Y = 12,
 4384    MODE_MEM_VIRT = 13,
 4385    MODE_NOCLOCK = 14,
 4386    MODE_CLOCK_HIGH = 15,
 4387    MODE_CLOCK_LOW = 16,
 4388    MODE_CLOCK_RANGE = 17,
 4389    MODE_BAD_HVALUE = 18,
 4390    MODE_BAD_VVALUE = 19,
 4391    MODE_BAD_VSCAN = 20,
 4392    MODE_HSYNC_NARROW = 21,
 4393    MODE_HSYNC_WIDE = 22,
 4394    MODE_HBLANK_NARROW = 23,
 4395    MODE_HBLANK_WIDE = 24,
 4396    MODE_VSYNC_NARROW = 25,
 4397    MODE_VSYNC_WIDE = 26,
 4398    MODE_VBLANK_NARROW = 27,
 4399    MODE_VBLANK_WIDE = 28,
 4400    MODE_PANEL = 29,
 4401    MODE_INTERLACE_WIDTH = 30,
 4402    MODE_ONE_WIDTH = 31,
 4403    MODE_ONE_HEIGHT = 32,
 4404    MODE_ONE_SIZE = 33,
 4405    MODE_NO_REDUCED = 34,
 4406    MODE_UNVERIFIED = -3,
 4407    MODE_BAD = -2,
 4408    MODE_ERROR = -1
 4409} ;
 4410#line 116 "include/drm/drm_crtc.h"
 4411struct drm_display_mode {
 4412   struct list_head head ;
 4413   struct drm_mode_object base ;
 4414   char name[32] ;
 4415   enum drm_mode_status status ;
 4416   unsigned int type ;
 4417   int clock ;
 4418   int hdisplay ;
 4419   int hsync_start ;
 4420   int hsync_end ;
 4421   int htotal ;
 4422   int hskew ;
 4423   int vdisplay ;
 4424   int vsync_start ;
 4425   int vsync_end ;
 4426   int vtotal ;
 4427   int vscan ;
 4428   unsigned int flags ;
 4429   int width_mm ;
 4430   int height_mm ;
 4431   int clock_index ;
 4432   int synth_clock ;
 4433   int crtc_hdisplay ;
 4434   int crtc_hblank_start ;
 4435   int crtc_hblank_end ;
 4436   int crtc_hsync_start ;
 4437   int crtc_hsync_end ;
 4438   int crtc_htotal ;
 4439   int crtc_hskew ;
 4440   int crtc_vdisplay ;
 4441   int crtc_vblank_start ;
 4442   int crtc_vblank_end ;
 4443   int crtc_vsync_start ;
 4444   int crtc_vsync_end ;
 4445   int crtc_vtotal ;
 4446   int crtc_hadjusted ;
 4447   int crtc_vadjusted ;
 4448   int private_size ;
 4449   int *private ;
 4450   int private_flags ;
 4451   int vrefresh ;
 4452   int hsync ;
 4453};
 4454#line 172
 4455enum drm_connector_status {
 4456    connector_status_connected = 1,
 4457    connector_status_disconnected = 2,
 4458    connector_status_unknown = 3
 4459} ;
 4460#line 178
 4461enum subpixel_order {
 4462    SubPixelUnknown = 0,
 4463    SubPixelHorizontalRGB = 1,
 4464    SubPixelHorizontalBGR = 2,
 4465    SubPixelVerticalRGB = 3,
 4466    SubPixelVerticalBGR = 4,
 4467    SubPixelNone = 5
 4468} ;
 4469#line 193 "include/drm/drm_crtc.h"
 4470struct drm_display_info {
 4471   char name[32] ;
 4472   unsigned int width_mm ;
 4473   unsigned int height_mm ;
 4474   unsigned int min_vfreq ;
 4475   unsigned int max_vfreq ;
 4476   unsigned int min_hfreq ;
 4477   unsigned int max_hfreq ;
 4478   unsigned int pixel_clock ;
 4479   unsigned int bpc ;
 4480   enum subpixel_order subpixel_order ;
 4481   u32 color_formats ;
 4482   u8 cea_rev ;
 4483   char *raw_edid ;
 4484};
 4485#line 214 "include/drm/drm_crtc.h"
 4486struct drm_framebuffer_funcs {
 4487   void (*destroy)(struct drm_framebuffer *framebuffer ) ;
 4488   int (*create_handle)(struct drm_framebuffer *fb , struct drm_file *file_priv ,
 4489                        unsigned int *handle ) ;
 4490   int (*dirty)(struct drm_framebuffer *framebuffer , struct drm_file *file_priv ,
 4491                unsigned int flags , unsigned int color , struct drm_clip_rect *clips ,
 4492                unsigned int num_clips ) ;
 4493};
 4494#line 237 "include/drm/drm_crtc.h"
 4495struct drm_framebuffer {
 4496   struct drm_device *dev ;
 4497   struct list_head head ;
 4498   struct drm_mode_object base ;
 4499   struct drm_framebuffer_funcs    *funcs ;
 4500   unsigned int pitches[4] ;
 4501   unsigned int offsets[4] ;
 4502   unsigned int width ;
 4503   unsigned int height ;
 4504   unsigned int depth ;
 4505   int bits_per_pixel ;
 4506   int flags ;
 4507   uint32_t pixel_format ;
 4508   struct list_head filp_head ;
 4509   void *helper_private ;
 4510};
 4511#line 256 "include/drm/drm_crtc.h"
 4512struct drm_property_blob {
 4513   struct drm_mode_object base ;
 4514   struct list_head head ;
 4515   unsigned int length ;
 4516   unsigned char data[] ;
 4517};
 4518#line 269 "include/drm/drm_crtc.h"
 4519struct drm_property {
 4520   struct list_head head ;
 4521   struct drm_mode_object base ;
 4522   uint32_t flags ;
 4523   char name[32] ;
 4524   uint32_t num_values ;
 4525   uint64_t *values ;
 4526   struct list_head enum_blob_list ;
 4527};
 4528#line 280
 4529struct drm_crtc;
 4530#line 281
 4531struct drm_connector;
 4532#line 282
 4533struct drm_encoder;
 4534#line 283
 4535struct drm_pending_vblank_event;
 4536#line 311 "include/drm/drm_crtc.h"
 4537struct drm_crtc_funcs {
 4538   void (*save)(struct drm_crtc *crtc ) ;
 4539   void (*restore)(struct drm_crtc *crtc ) ;
 4540   void (*reset)(struct drm_crtc *crtc ) ;
 4541   int (*cursor_set)(struct drm_crtc *crtc , struct drm_file *file_priv , uint32_t handle ,
 4542                     uint32_t width , uint32_t height ) ;
 4543   int (*cursor_move)(struct drm_crtc *crtc , int x , int y ) ;
 4544   void (*gamma_set)(struct drm_crtc *crtc , u16 *r , u16 *g , u16 *b , uint32_t start ,
 4545                     uint32_t size ) ;
 4546   void (*destroy)(struct drm_crtc *crtc ) ;
 4547   int (*set_config)(struct drm_mode_set *set ) ;
 4548   int (*page_flip)(struct drm_crtc *crtc , struct drm_framebuffer *fb , struct drm_pending_vblank_event *event ) ;
 4549};
 4550#line 367 "include/drm/drm_crtc.h"
 4551struct drm_crtc {
 4552   struct drm_device *dev ;
 4553   struct list_head head ;
 4554   struct drm_mode_object base ;
 4555   struct drm_framebuffer *fb ;
 4556   bool enabled ;
 4557   struct drm_display_mode mode ;
 4558   struct drm_display_mode hwmode ;
 4559   int x ;
 4560   int y ;
 4561   struct drm_crtc_funcs    *funcs ;
 4562   uint32_t gamma_size ;
 4563   uint16_t *gamma_store ;
 4564   s64 framedur_ns ;
 4565   s64 linedur_ns ;
 4566   s64 pixeldur_ns ;
 4567   void *helper_private ;
 4568};
 4569#line 420 "include/drm/drm_crtc.h"
 4570struct drm_connector_funcs {
 4571   void (*dpms)(struct drm_connector *connector , int mode ) ;
 4572   void (*save)(struct drm_connector *connector ) ;
 4573   void (*restore)(struct drm_connector *connector ) ;
 4574   void (*reset)(struct drm_connector *connector ) ;
 4575   enum drm_connector_status (*detect)(struct drm_connector *connector , bool force ) ;
 4576   int (*fill_modes)(struct drm_connector *connector , uint32_t max_width , uint32_t max_height ) ;
 4577   int (*set_property)(struct drm_connector *connector , struct drm_property *property ,
 4578                       uint64_t val ) ;
 4579   void (*destroy)(struct drm_connector *connector ) ;
 4580   void (*force)(struct drm_connector *connector ) ;
 4581};
 4582#line 448 "include/drm/drm_crtc.h"
 4583struct drm_encoder_funcs {
 4584   void (*reset)(struct drm_encoder *encoder ) ;
 4585   void (*destroy)(struct drm_encoder *encoder ) ;
 4586};
 4587#line 473 "include/drm/drm_crtc.h"
 4588struct drm_encoder {
 4589   struct drm_device *dev ;
 4590   struct list_head head ;
 4591   struct drm_mode_object base ;
 4592   int encoder_type ;
 4593   uint32_t possible_crtcs ;
 4594   uint32_t possible_clones ;
 4595   struct drm_crtc *crtc ;
 4596   struct drm_encoder_funcs    *funcs ;
 4597   void *helper_private ;
 4598};
 4599#line 487
 4600enum drm_connector_force {
 4601    DRM_FORCE_UNSPECIFIED = 0,
 4602    DRM_FORCE_OFF = 1,
 4603    DRM_FORCE_ON = 2,
 4604    DRM_FORCE_ON_DIGITAL = 3
 4605} ;
 4606#line 544 "include/drm/drm_crtc.h"
 4607struct drm_connector {
 4608   struct drm_device *dev ;
 4609   struct device kdev ;
 4610   struct device_attribute *attr ;
 4611   struct list_head head ;
 4612   struct drm_mode_object base ;
 4613   int connector_type ;
 4614   int connector_type_id ;
 4615   bool interlace_allowed ;
 4616   bool doublescan_allowed ;
 4617   struct list_head modes ;
 4618   enum drm_connector_status status ;
 4619   struct list_head probed_modes ;
 4620   struct drm_display_info display_info ;
 4621   struct drm_connector_funcs    *funcs ;
 4622   struct list_head user_modes ;
 4623   struct drm_property_blob *edid_blob_ptr ;
 4624   u32 property_ids[16] ;
 4625   uint64_t property_values[16] ;
 4626   uint8_t polled ;
 4627   int dpms ;
 4628   void *helper_private ;
 4629   enum drm_connector_force force ;
 4630   uint32_t encoder_ids[3] ;
 4631   struct drm_encoder *encoder ;
 4632   uint8_t eld[128] ;
 4633   bool dvi_dual ;
 4634   int max_tmds_clock ;
 4635   bool latency_present[2] ;
 4636   int video_latency[2] ;
 4637   int audio_latency[2] ;
 4638   int null_edid_counter ;
 4639};
 4640#line 665 "include/drm/drm_crtc.h"
 4641struct drm_mode_set {
 4642   struct list_head head ;
 4643   struct drm_framebuffer *fb ;
 4644   struct drm_crtc *crtc ;
 4645   struct drm_display_mode *mode ;
 4646   uint32_t x ;
 4647   uint32_t y ;
 4648   struct drm_connector **connectors ;
 4649   size_t num_connectors ;
 4650};
 4651#line 687 "include/drm/drm_crtc.h"
 4652struct drm_mode_config_funcs {
 4653   struct drm_framebuffer *(*fb_create)(struct drm_device *dev , struct drm_file *file_priv ,
 4654                                        struct drm_mode_fb_cmd2 *mode_cmd ) ;
 4655   void (*output_poll_changed)(struct drm_device *dev ) ;
 4656};
 4657#line 707 "include/drm/drm_crtc.h"
 4658struct drm_mode_group {
 4659   uint32_t num_crtcs ;
 4660   uint32_t num_encoders ;
 4661   uint32_t num_connectors ;
 4662   uint32_t *id_list ;
 4663};
 4664#line 743 "include/drm/drm_crtc.h"
 4665struct drm_mode_config {
 4666   struct mutex mutex ;
 4667   struct mutex idr_mutex ;
 4668   struct idr crtc_idr ;
 4669   int num_fb ;
 4670   struct list_head fb_list ;
 4671   int num_connector ;
 4672   struct list_head connector_list ;
 4673   int num_encoder ;
 4674   struct list_head encoder_list ;
 4675   int num_plane ;
 4676   struct list_head plane_list ;
 4677   int num_crtc ;
 4678   struct list_head crtc_list ;
 4679   struct list_head property_list ;
 4680   int min_width ;
 4681   int min_height ;
 4682   int max_width ;
 4683   int max_height ;
 4684   struct drm_mode_config_funcs *funcs ;
 4685   resource_size_t fb_base ;
 4686   bool poll_enabled ;
 4687   struct delayed_work output_poll_work ;
 4688   struct list_head property_blob_list ;
 4689   struct drm_property *edid_property ;
 4690   struct drm_property *dpms_property ;
 4691   struct drm_property *dvi_i_subconnector_property ;
 4692   struct drm_property *dvi_i_select_subconnector_property ;
 4693   struct drm_property *tv_subconnector_property ;
 4694   struct drm_property *tv_select_subconnector_property ;
 4695   struct drm_property *tv_mode_property ;
 4696   struct drm_property *tv_left_margin_property ;
 4697   struct drm_property *tv_right_margin_property ;
 4698   struct drm_property *tv_top_margin_property ;
 4699   struct drm_property *tv_bottom_margin_property ;
 4700   struct drm_property *tv_brightness_property ;
 4701   struct drm_property *tv_contrast_property ;
 4702   struct drm_property *tv_flicker_reduction_property ;
 4703   struct drm_property *tv_overscan_property ;
 4704   struct drm_property *tv_saturation_property ;
 4705   struct drm_property *tv_hue_property ;
 4706   struct drm_property *scaling_mode_property ;
 4707   struct drm_property *dithering_mode_property ;
 4708   struct drm_property *dirty_info_property ;
 4709   uint32_t preferred_depth ;
 4710   uint32_t prefer_shadow ;
 4711};
 4712#line 682 "include/drm/drmP.h"
 4713struct drm_master {
 4714   struct kref refcount ;
 4715   struct list_head head ;
 4716   struct drm_minor *minor ;
 4717   char *unique ;
 4718   int unique_len ;
 4719   int unique_size ;
 4720   int blocked ;
 4721   struct drm_open_hash magiclist ;
 4722   struct list_head magicfree ;
 4723   struct drm_lock_data lock ;
 4724   void *driver_priv ;
 4725};
 4726#line 721 "include/drm/drmP.h"
 4727struct drm_bus {
 4728   int bus_type ;
 4729   int (*get_irq)(struct drm_device *dev ) ;
 4730   char    *(*get_name)(struct drm_device *dev ) ;
 4731   int (*set_busid)(struct drm_device *dev , struct drm_master *master ) ;
 4732   int (*set_unique)(struct drm_device *dev , struct drm_master *master , struct drm_unique *unique ) ;
 4733   int (*irq_by_busid)(struct drm_device *dev , struct drm_irq_busid *p ) ;
 4734   int (*agp_init)(struct drm_device *dev ) ;
 4735};
 4736#line 739
 4737struct usb_driver;
 4738#line 739 "include/drm/drmP.h"
 4739union __anonunion_kdriver_413 {
 4740   struct pci_driver *pci ;
 4741   struct platform_device *platform_device ;
 4742   struct usb_driver *usb ;
 4743};
 4744#line 739 "include/drm/drmP.h"
 4745struct drm_driver {
 4746   int (*load)(struct drm_device * , unsigned long flags ) ;
 4747   int (*firstopen)(struct drm_device * ) ;
 4748   int (*open)(struct drm_device * , struct drm_file * ) ;
 4749   void (*preclose)(struct drm_device * , struct drm_file *file_priv ) ;
 4750   void (*postclose)(struct drm_device * , struct drm_file * ) ;
 4751   void (*lastclose)(struct drm_device * ) ;
 4752   int (*unload)(struct drm_device * ) ;
 4753   int (*suspend)(struct drm_device * , pm_message_t state ) ;
 4754   int (*resume)(struct drm_device * ) ;
 4755   int (*dma_ioctl)(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
 4756   int (*dma_quiescent)(struct drm_device * ) ;
 4757   int (*context_dtor)(struct drm_device *dev , int context ) ;
 4758   u32 (*get_vblank_counter)(struct drm_device *dev , int crtc ) ;
 4759   int (*enable_vblank)(struct drm_device *dev , int crtc ) ;
 4760   void (*disable_vblank)(struct drm_device *dev , int crtc ) ;
 4761   int (*device_is_agp)(struct drm_device *dev ) ;
 4762   int (*get_scanout_position)(struct drm_device *dev , int crtc , int *vpos , int *hpos ) ;
 4763   int (*get_vblank_timestamp)(struct drm_device *dev , int crtc , int *max_error ,
 4764                               struct timeval *vblank_time , unsigned int flags ) ;
 4765   irqreturn_t (*irq_handler)(int irq , void *arg ) ;
 4766   void (*irq_preinstall)(struct drm_device *dev ) ;
 4767   int (*irq_postinstall)(struct drm_device *dev ) ;
 4768   void (*irq_uninstall)(struct drm_device *dev ) ;
 4769   void (*reclaim_buffers)(struct drm_device *dev , struct drm_file *file_priv ) ;
 4770   void (*reclaim_buffers_locked)(struct drm_device *dev , struct drm_file *file_priv ) ;
 4771   void (*reclaim_buffers_idlelocked)(struct drm_device *dev , struct drm_file *file_priv ) ;
 4772   void (*set_version)(struct drm_device *dev , struct drm_set_version *sv ) ;
 4773   int (*master_create)(struct drm_device *dev , struct drm_master *master ) ;
 4774   void (*master_destroy)(struct drm_device *dev , struct drm_master *master ) ;
 4775   int (*master_set)(struct drm_device *dev , struct drm_file *file_priv , bool from_open ) ;
 4776   void (*master_drop)(struct drm_device *dev , struct drm_file *file_priv , bool from_release ) ;
 4777   int (*debugfs_init)(struct drm_minor *minor ) ;
 4778   void (*debugfs_cleanup)(struct drm_minor *minor ) ;
 4779   int (*gem_init_object)(struct drm_gem_object *obj ) ;
 4780   void (*gem_free_object)(struct drm_gem_object *obj ) ;
 4781   int (*gem_open_object)(struct drm_gem_object * , struct drm_file * ) ;
 4782   void (*gem_close_object)(struct drm_gem_object * , struct drm_file * ) ;
 4783   int (*prime_handle_to_fd)(struct drm_device *dev , struct drm_file *file_priv ,
 4784                             uint32_t handle , uint32_t flags , int *prime_fd ) ;
 4785   int (*prime_fd_to_handle)(struct drm_device *dev , struct drm_file *file_priv ,
 4786                             int prime_fd , uint32_t *handle ) ;
 4787   struct dma_buf *(*gem_prime_export)(struct drm_device *dev , struct drm_gem_object *obj ,
 4788                                       int flags ) ;
 4789   struct drm_gem_object *(*gem_prime_import)(struct drm_device *dev , struct dma_buf *dma_buf ) ;
 4790   void (*vgaarb_irq)(struct drm_device *dev , bool state ) ;
 4791   int (*dumb_create)(struct drm_file *file_priv , struct drm_device *dev , struct drm_mode_create_dumb *args ) ;
 4792   int (*dumb_map_offset)(struct drm_file *file_priv , struct drm_device *dev , uint32_t handle ,
 4793                          uint64_t *offset ) ;
 4794   int (*dumb_destroy)(struct drm_file *file_priv , struct drm_device *dev , uint32_t handle ) ;
 4795   struct vm_operations_struct *gem_vm_ops ;
 4796   int major ;
 4797   int minor ;
 4798   int patchlevel ;
 4799   char *name ;
 4800   char *desc ;
 4801   char *date ;
 4802   u32 driver_features ;
 4803   int dev_priv_size ;
 4804   struct drm_ioctl_desc *ioctls ;
 4805   int num_ioctls ;
 4806   struct file_operations    *fops ;
 4807   union __anonunion_kdriver_413 kdriver ;
 4808   struct drm_bus *bus ;
 4809   struct list_head device_list ;
 4810};
 4811#line 999 "include/drm/drmP.h"
 4812struct drm_info_list {
 4813   char    *name ;
 4814   int (*show)(struct seq_file * , void * ) ;
 4815   u32 driver_features ;
 4816   void *data ;
 4817};
 4818#line 1009 "include/drm/drmP.h"
 4819struct drm_info_node {
 4820   struct list_head list ;
 4821   struct drm_minor *minor ;
 4822   struct drm_info_list *info_ent ;
 4823   struct dentry *dent ;
 4824};
 4825#line 1019 "include/drm/drmP.h"
 4826struct drm_minor {
 4827   int index ;
 4828   int type ;
 4829   dev_t device ;
 4830   struct device kdev ;
 4831   struct drm_device *dev ;
 4832   struct proc_dir_entry *proc_root ;
 4833   struct drm_info_node proc_nodes ;
 4834   struct dentry *debugfs_root ;
 4835   struct list_head debugfs_list ;
 4836   struct mutex debugfs_lock ;
 4837   struct drm_master *master ;
 4838   struct list_head master_list ;
 4839   struct drm_mode_group mode_group ;
 4840};
 4841#line 1054 "include/drm/drmP.h"
 4842struct drm_pending_vblank_event {
 4843   struct drm_pending_event base ;
 4844   int pipe ;
 4845   struct drm_event_vblank event ;
 4846};
 4847#line 1064
 4848struct usb_device;
 4849#line 1064 "include/drm/drmP.h"
 4850struct drm_device {
 4851   struct list_head driver_item ;
 4852   char *devname ;
 4853   int if_version ;
 4854   spinlock_t count_lock ;
 4855   struct mutex struct_mutex ;
 4856   int open_count ;
 4857   atomic_t ioctl_count ;
 4858   atomic_t vma_count ;
 4859   int buf_use ;
 4860   atomic_t buf_alloc ;
 4861   unsigned long counters ;
 4862   enum drm_stat_type types[15] ;
 4863   atomic_t counts[15] ;
 4864   struct list_head filelist ;
 4865   struct list_head maplist ;
 4866   int map_count ;
 4867   struct drm_open_hash map_hash ;
 4868   struct list_head ctxlist ;
 4869   int ctx_count ;
 4870   struct mutex ctxlist_mutex ;
 4871   struct idr ctx_idr ;
 4872   struct list_head vmalist ;
 4873   int queue_count ;
 4874   int queue_reserved ;
 4875   int queue_slots ;
 4876   struct drm_queue **queuelist ;
 4877   struct drm_device_dma *dma ;
 4878   int irq_enabled ;
 4879   long volatile   context_flag ;
 4880   long volatile   interrupt_flag ;
 4881   long volatile   dma_flag ;
 4882   wait_queue_head_t context_wait ;
 4883   int last_checked ;
 4884   int last_context ;
 4885   unsigned long last_switch ;
 4886   struct work_struct work ;
 4887   int vblank_disable_allowed ;
 4888   wait_queue_head_t *vbl_queue ;
 4889   atomic_t *_vblank_count ;
 4890   struct timeval *_vblank_time ;
 4891   spinlock_t vblank_time_lock ;
 4892   spinlock_t vbl_lock ;
 4893   atomic_t *vblank_refcount ;
 4894   u32 *last_vblank ;
 4895   int *vblank_enabled ;
 4896   int *vblank_inmodeset ;
 4897   u32 *last_vblank_wait ;
 4898   struct timer_list vblank_disable_timer ;
 4899   u32 max_vblank_count ;
 4900   struct list_head vblank_event_list ;
 4901   spinlock_t event_lock ;
 4902   cycles_t ctx_start ;
 4903   cycles_t lck_start ;
 4904   struct fasync_struct *buf_async ;
 4905   wait_queue_head_t buf_readers ;
 4906   wait_queue_head_t buf_writers ;
 4907   struct drm_agp_head *agp ;
 4908   struct device *dev ;
 4909   struct pci_dev *pdev ;
 4910   int pci_vendor ;
 4911   int pci_device ;
 4912   struct platform_device *platformdev ;
 4913   struct usb_device *usbdev ;
 4914   struct drm_sg_mem *sg ;
 4915   unsigned int num_crtcs ;
 4916   void *dev_private ;
 4917   void *mm_private ;
 4918   struct address_space *dev_mapping ;
 4919   struct drm_sigdata sigdata ;
 4920   sigset_t sigmask ;
 4921   struct drm_driver *driver ;
 4922   struct drm_local_map *agp_buffer_map ;
 4923   unsigned int agp_buffer_token ;
 4924   struct drm_minor *control ;
 4925   struct drm_minor *primary ;
 4926   struct drm_mode_config mode_config ;
 4927   spinlock_t object_name_lock ;
 4928   struct idr object_name_idr ;
 4929   int switch_power_state ;
 4930   atomic_t unplugged ;
 4931};
 4932#line 33 "include/drm/drm_global.h"
 4933enum drm_global_types {
 4934    DRM_GLOBAL_TTM_MEM = 0,
 4935    DRM_GLOBAL_TTM_BO = 1,
 4936    DRM_GLOBAL_TTM_OBJECT = 2,
 4937    DRM_GLOBAL_NUM = 3
 4938} ;
 4939#line 40 "include/drm/drm_global.h"
 4940struct drm_global_reference {
 4941   enum drm_global_types global_type ;
 4942   size_t size ;
 4943   void *object ;
 4944   int (*init)(struct drm_global_reference * ) ;
 4945   void (*release)(struct drm_global_reference * ) ;
 4946};
 4947#line 189 "include/drm/vmwgfx_drm.h"
 4948struct drm_vmw_size {
 4949   uint32_t width ;
 4950   uint32_t height ;
 4951   uint32_t depth ;
 4952   uint32_t pad64 ;
 4953};
 4954#line 278 "include/drm/vmwgfx_drm.h"
 4955struct drm_vmw_execbuf_arg {
 4956   uint64_t commands ;
 4957   uint32_t command_size ;
 4958   uint32_t throttle_us ;
 4959   uint64_t fence_rep ;
 4960   uint32_t version ;
 4961   uint32_t flags ;
 4962};
 4963#line 312 "include/drm/vmwgfx_drm.h"
 4964struct drm_vmw_fence_rep {
 4965   uint32_t handle ;
 4966   uint32_t mask ;
 4967   uint32_t seqno ;
 4968   uint32_t passed_seqno ;
 4969   uint32_t pad64 ;
 4970   int32_t error ;
 4971};
 4972#line 40 "include/linux/taskstats.h"
 4973struct taskstats {
 4974   __u16 version ;
 4975   __u32 ac_exitcode ;
 4976   __u8 ac_flag ;
 4977   __u8 ac_nice ;
 4978   __u64 cpu_count  __attribute__((__aligned__(8))) ;
 4979   __u64 cpu_delay_total ;
 4980   __u64 blkio_count ;
 4981   __u64 blkio_delay_total ;
 4982   __u64 swapin_count ;
 4983   __u64 swapin_delay_total ;
 4984   __u64 cpu_run_real_total ;
 4985   __u64 cpu_run_virtual_total ;
 4986   char ac_comm[32] ;
 4987   __u8 ac_sched  __attribute__((__aligned__(8))) ;
 4988   __u8 ac_pad[3] ;
 4989   __u32 ac_uid  __attribute__((__aligned__(8))) ;
 4990   __u32 ac_gid ;
 4991   __u32 ac_pid ;
 4992   __u32 ac_ppid ;
 4993   __u32 ac_btime ;
 4994   __u64 ac_etime  __attribute__((__aligned__(8))) ;
 4995   __u64 ac_utime ;
 4996   __u64 ac_stime ;
 4997   __u64 ac_minflt ;
 4998   __u64 ac_majflt ;
 4999   __u64 coremem ;
 5000   __u64 virtmem ;
 5001   __u64 hiwater_rss ;
 5002   __u64 hiwater_vm ;
 5003   __u64 read_char ;
 5004   __u64 write_char ;
 5005   __u64 read_syscalls ;
 5006   __u64 write_syscalls ;
 5007   __u64 read_bytes ;
 5008   __u64 write_bytes ;
 5009   __u64 cancelled_write_bytes ;
 5010   __u64 nvcsw ;
 5011   __u64 nivcsw ;
 5012   __u64 ac_utimescaled ;
 5013   __u64 ac_stimescaled ;
 5014   __u64 cpu_scaled_run_real_total ;
 5015   __u64 freepages_count ;
 5016   __u64 freepages_delay_total ;
 5017};
 5018#line 22 "include/linux/cgroup.h"
 5019struct cgroupfs_root;
 5020#line 25
 5021struct cgroup;
 5022#line 26
 5023struct css_id;
 5024#line 60 "include/linux/cgroup.h"
 5025struct cgroup_subsys_state {
 5026   struct cgroup *cgroup ;
 5027   atomic_t refcnt ;
 5028   unsigned long flags ;
 5029   struct css_id *id ;
 5030};
 5031#line 163 "include/linux/cgroup.h"
 5032struct cgroup {
 5033   unsigned long flags ;
 5034   atomic_t count ;
 5035   struct list_head sibling ;
 5036   struct list_head children ;
 5037   struct cgroup *parent ;
 5038   struct dentry *dentry ;
 5039   struct cgroup_subsys_state *subsys[8UL * sizeof(unsigned long )] ;
 5040   struct cgroupfs_root *root ;
 5041   struct cgroup *top_cgroup ;
 5042   struct list_head css_sets ;
 5043   struct list_head release_list ;
 5044   struct list_head pidlists ;
 5045   struct mutex pidlist_mutex ;
 5046   struct rcu_head rcu_head ;
 5047   struct list_head event_list ;
 5048   spinlock_t event_list_lock ;
 5049};
 5050#line 224 "include/linux/cgroup.h"
 5051struct css_set {
 5052   atomic_t refcount ;
 5053   struct hlist_node hlist ;
 5054   struct list_head tasks ;
 5055   struct list_head cg_links ;
 5056   struct cgroup_subsys_state *subsys[8UL * sizeof(unsigned long )] ;
 5057   struct rcu_head rcu_head ;
 5058};
 5059#line 113 "include/linux/swap.h"
 5060struct reclaim_state {
 5061   unsigned long reclaimed_slab ;
 5062};
 5063#line 43 "include/drm/ttm/ttm_bo_api.h"
 5064struct ttm_bo_device;
 5065#line 60 "include/drm/ttm/ttm_bo_api.h"
 5066struct ttm_placement {
 5067   unsigned int fpfn ;
 5068   unsigned int lpfn ;
 5069   unsigned int num_placement ;
 5070   uint32_t    *placement ;
 5071   unsigned int num_busy_placement ;
 5072   uint32_t    *busy_placement ;
 5073};
 5074#line 82 "include/drm/ttm/ttm_bo_api.h"
 5075struct ttm_bus_placement {
 5076   void *addr ;
 5077   unsigned long base ;
 5078   unsigned long size ;
 5079   unsigned long offset ;
 5080   bool is_iomem ;
 5081   bool io_reserved_vm ;
 5082   uint64_t io_reserved_count ;
 5083};
 5084#line 107 "include/drm/ttm/ttm_bo_api.h"
 5085struct ttm_mem_reg {
 5086   void *mm_node ;
 5087   unsigned long start ;
 5088   unsigned long size ;
 5089   unsigned long num_pages ;
 5090   uint32_t page_alignment ;
 5091   uint32_t mem_type ;
 5092   uint32_t placement ;
 5093   struct ttm_bus_placement bus ;
 5094};
 5095#line 129
 5096enum ttm_bo_type {
 5097    ttm_bo_type_device = 0,
 5098    ttm_bo_type_kernel = 1
 5099} ;
 5100#line 134
 5101struct ttm_tt;
 5102#line 192
 5103struct ttm_bo_global;
 5104#line 192 "include/drm/ttm/ttm_bo_api.h"
 5105struct ttm_buffer_object {
 5106   struct ttm_bo_global *glob ;
 5107   struct ttm_bo_device *bdev ;
 5108   unsigned long buffer_start ;
 5109   enum ttm_bo_type type ;
 5110   void (*destroy)(struct ttm_buffer_object * ) ;
 5111   unsigned long num_pages ;
 5112   uint64_t addr_space_offset ;
 5113   size_t acc_size ;
 5114   struct kref kref ;
 5115   struct kref list_kref ;
 5116   wait_queue_head_t event_queue ;
 5117   struct ttm_mem_reg mem ;
 5118   struct file *persistent_swap_storage ;
 5119   struct ttm_tt *ttm ;
 5120   bool evicted ;
 5121   atomic_t cpu_writers ;
 5122   struct list_head lru ;
 5123   struct list_head ddestroy ;
 5124   struct list_head swap ;
 5125   struct list_head io_reserve_lru ;
 5126   uint32_t val_seq ;
 5127   bool seq_valid ;
 5128   atomic_t reserved ;
 5129   void *sync_obj_arg ;
 5130   void *sync_obj ;
 5131   unsigned long priv_flags ;
 5132   struct rb_node vm_rb ;
 5133   struct drm_mm_node *vm_node ;
 5134   unsigned long offset ;
 5135   uint32_t cur_placement ;
 5136};
 5137#line 49 "include/drm/ttm/ttm_memory.h"
 5138struct ttm_mem_shrink {
 5139   int (*do_shrink)(struct ttm_mem_shrink * ) ;
 5140};
 5141#line 77
 5142struct ttm_mem_zone;
 5143#line 78 "include/drm/ttm/ttm_memory.h"
 5144struct ttm_mem_global {
 5145   struct kobject kobj ;
 5146   struct ttm_mem_shrink *shrink ;
 5147   struct workqueue_struct *swap_queue ;
 5148   struct work_struct work ;
 5149   wait_queue_head_t queue ;
 5150   spinlock_t lock ;
 5151   struct ttm_mem_zone *zones[2] ;
 5152   unsigned int num_zones ;
 5153   struct ttm_mem_zone *zone_kernel ;
 5154   struct ttm_mem_zone *zone_dma32 ;
 5155};
 5156#line 42 "include/drm/ttm/ttm_bo_driver.h"
 5157struct ttm_backend;
 5158#line 44 "include/drm/ttm/ttm_bo_driver.h"
 5159struct ttm_backend_func {
 5160   int (*bind)(struct ttm_tt *ttm , struct ttm_mem_reg *bo_mem ) ;
 5161   int (*unbind)(struct ttm_tt *ttm ) ;
 5162   void (*destroy)(struct ttm_tt *ttm ) ;
 5163};
 5164#line 85
 5165enum ttm_caching_state {
 5166    tt_uncached = 0,
 5167    tt_wc = 1,
 5168    tt_cached = 2
 5169} ;
 5170#line 112
 5171enum __anonenum_state_428 {
 5172    tt_bound = 0,
 5173    tt_unbound = 1,
 5174    tt_unpopulated = 2
 5175} ;
 5176#line 112 "include/drm/ttm/ttm_bo_driver.h"
 5177struct ttm_tt {
 5178   struct ttm_bo_device *bdev ;
 5179   struct ttm_backend_func *func ;
 5180   struct page *dummy_read_page ;
 5181   struct page **pages ;
 5182   uint32_t page_flags ;
 5183   unsigned long num_pages ;
 5184   struct ttm_bo_global *glob ;
 5185   struct ttm_backend *be ;
 5186   struct file *swap_storage ;
 5187   enum ttm_caching_state caching_state ;
 5188   enum __anonenum_state_428 state ;
 5189};
 5190#line 151
 5191struct ttm_mem_type_manager;
 5192#line 153 "include/drm/ttm/ttm_bo_driver.h"
 5193struct ttm_mem_type_manager_func {
 5194   int (*init)(struct ttm_mem_type_manager *man , unsigned long p_size ) ;
 5195   int (*takedown)(struct ttm_mem_type_manager *man ) ;
 5196   int (*get_node)(struct ttm_mem_type_manager *man , struct ttm_buffer_object *bo ,
 5197                   struct ttm_placement *placement , struct ttm_mem_reg *mem ) ;
 5198   void (*put_node)(struct ttm_mem_type_manager *man , struct ttm_mem_reg *mem ) ;
 5199   void (*debug)(struct ttm_mem_type_manager *man , char    *prefix ) ;
 5200};
 5201#line 265 "include/drm/ttm/ttm_bo_driver.h"
 5202struct ttm_mem_type_manager {
 5203   struct ttm_bo_device *bdev ;
 5204   bool has_type ;
 5205   bool use_type ;
 5206   uint32_t flags ;
 5207   unsigned long gpu_offset ;
 5208   uint64_t size ;
 5209   uint32_t available_caching ;
 5210   uint32_t default_caching ;
 5211   struct ttm_mem_type_manager_func    *func ;
 5212   void *priv ;
 5213   struct mutex io_reserve_mutex ;
 5214   bool use_io_reserve_lru ;
 5215   bool io_reserve_fastpath ;
 5216   struct list_head io_reserve_lru ;
 5217   struct list_head lru ;
 5218};
 5219#line 317 "include/drm/ttm/ttm_bo_driver.h"
 5220struct ttm_bo_driver {
 5221   struct ttm_tt *(*ttm_tt_create)(struct ttm_bo_device *bdev , unsigned long size ,
 5222                                   uint32_t page_flags , struct page *dummy_read_page ) ;
 5223   int (*ttm_tt_populate)(struct ttm_tt *ttm ) ;
 5224   void (*ttm_tt_unpopulate)(struct ttm_tt *ttm ) ;
 5225   int (*invalidate_caches)(struct ttm_bo_device *bdev , uint32_t flags ) ;
 5226   int (*init_mem_type)(struct ttm_bo_device *bdev , uint32_t type , struct ttm_mem_type_manager *man ) ;
 5227   void (*evict_flags)(struct ttm_buffer_object *bo , struct ttm_placement *placement ) ;
 5228   int (*move)(struct ttm_buffer_object *bo , bool evict , bool interruptible , bool no_wait_reserve ,
 5229               bool no_wait_gpu , struct ttm_mem_reg *new_mem ) ;
 5230   int (*verify_access)(struct ttm_buffer_object *bo , struct file *filp ) ;
 5231   bool (*sync_obj_signaled)(void *sync_obj , void *sync_arg ) ;
 5232   int (*sync_obj_wait)(void *sync_obj , void *sync_arg , bool lazy , bool interruptible ) ;
 5233   int (*sync_obj_flush)(void *sync_obj , void *sync_arg ) ;
 5234   void (*sync_obj_unref)(void **sync_obj ) ;
 5235   void *(*sync_obj_ref)(void *sync_obj ) ;
 5236   void (*move_notify)(struct ttm_buffer_object *bo , struct ttm_mem_reg *new_mem ) ;
 5237   int (*fault_reserve_notify)(struct ttm_buffer_object *bo ) ;
 5238   void (*swap_notify)(struct ttm_buffer_object *bo ) ;
 5239   int (*io_mem_reserve)(struct ttm_bo_device *bdev , struct ttm_mem_reg *mem ) ;
 5240   void (*io_mem_free)(struct ttm_bo_device *bdev , struct ttm_mem_reg *mem ) ;
 5241};
 5242#line 460 "include/drm/ttm/ttm_bo_driver.h"
 5243struct ttm_bo_global_ref {
 5244   struct drm_global_reference ref ;
 5245   struct ttm_mem_global *mem_glob ;
 5246};
 5247#line 479 "include/drm/ttm/ttm_bo_driver.h"
 5248struct ttm_bo_global {
 5249   struct kobject kobj ;
 5250   struct ttm_mem_global *mem_glob ;
 5251   struct page *dummy_read_page ;
 5252   struct ttm_mem_shrink shrink ;
 5253   struct mutex device_list_mutex ;
 5254   spinlock_t lru_lock ;
 5255   struct list_head device_list ;
 5256   struct list_head swap_lru ;
 5257   atomic_t bo_count ;
 5258};
 5259#line 533 "include/drm/ttm/ttm_bo_driver.h"
 5260struct ttm_bo_device {
 5261   struct list_head device_list ;
 5262   struct ttm_bo_global *glob ;
 5263   struct ttm_bo_driver *driver ;
 5264   rwlock_t vm_lock ;
 5265   struct ttm_mem_type_manager man[8] ;
 5266   spinlock_t fence_lock ;
 5267   struct rb_root addr_space_rb ;
 5268   struct drm_mm addr_space_mm ;
 5269   struct list_head ddestroy ;
 5270   uint32_t val_seq ;
 5271   bool nice_mode ;
 5272   struct address_space *dev_mapping ;
 5273   struct delayed_work wq ;
 5274   bool need_dma32 ;
 5275};
 5276#line 60 "include/drm/ttm/ttm_object.h"
 5277enum ttm_ref_type {
 5278    TTM_REF_USAGE = 0,
 5279    TTM_REF_SYNCCPU_READ = 1,
 5280    TTM_REF_SYNCCPU_WRITE = 2,
 5281    TTM_REF_NUM = 3
 5282} ;
 5283#line 75
 5284enum ttm_object_type {
 5285    ttm_fence_type = 0,
 5286    ttm_buffer_type = 1,
 5287    ttm_lock_type = 2,
 5288    ttm_driver_type0 = 256,
 5289    ttm_driver_type1 = 257,
 5290    ttm_driver_type2 = 258,
 5291    ttm_driver_type3 = 259,
 5292    ttm_driver_type4 = 260,
 5293    ttm_driver_type5 = 261
 5294} ;
 5295#line 87
 5296struct ttm_object_file;
 5297#line 88
 5298struct ttm_object_device;
 5299#line 122 "include/drm/ttm/ttm_object.h"
 5300struct ttm_base_object {
 5301   struct drm_hash_item hash ;
 5302   enum ttm_object_type object_type ;
 5303   bool shareable ;
 5304   struct ttm_object_file *tfile ;
 5305   struct kref refcount ;
 5306   void (*refcount_release)(struct ttm_base_object **base ) ;
 5307   void (*ref_obj_release)(struct ttm_base_object *base , enum ttm_ref_type ref_type ) ;
 5308};
 5309#line 69 "include/drm/ttm/ttm_lock.h"
 5310struct ttm_lock {
 5311   struct ttm_base_object base ;
 5312   wait_queue_head_t queue ;
 5313   spinlock_t lock ;
 5314   int32_t rw ;
 5315   uint32_t flags ;
 5316   bool kill_takers ;
 5317   int signal ;
 5318   struct ttm_object_file *vt_holder ;
 5319};
 5320#line 50 "include/drm/ttm/ttm_execbuf_util.h"
 5321struct ttm_validate_buffer {
 5322   struct list_head head ;
 5323   struct ttm_buffer_object *bo ;
 5324   void *new_sync_obj_arg ;
 5325   bool reserved ;
 5326   bool removed ;
 5327   int put_count ;
 5328   void *old_sync_obj ;
 5329};
 5330#line 32 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
 5331struct vmw_private;
 5332#line 34
 5333struct vmw_fence_manager;
 5334#line 52 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
 5335struct vmw_fence_obj {
 5336   struct kref kref ;
 5337   u32 seqno ;
 5338   struct vmw_fence_manager *fman ;
 5339   struct list_head head ;
 5340   uint32_t signaled ;
 5341   uint32_t signal_mask ;
 5342   struct list_head seq_passed_actions ;
 5343   void (*destroy)(struct vmw_fence_obj *fence ) ;
 5344   wait_queue_head_t queue ;
 5345};
 5346#line 62 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5347struct vmw_fpriv {
 5348   struct drm_master *locked_master ;
 5349   struct ttm_object_file *tfile ;
 5350   struct list_head fence_events ;
 5351};
 5352#line 68 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5353struct vmw_dma_buffer {
 5354   struct ttm_buffer_object base ;
 5355   struct list_head validate_list ;
 5356   bool gmr_bound ;
 5357   uint32_t cur_validate_node ;
 5358   bool on_validate_list ;
 5359};
 5360#line 76 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5361struct vmw_resource {
 5362   struct kref kref ;
 5363   struct vmw_private *dev_priv ;
 5364   struct idr *idr ;
 5365   int id ;
 5366   enum ttm_object_type res_type ;
 5367   bool avail ;
 5368   void (*remove_from_lists)(struct vmw_resource *res ) ;
 5369   void (*hw_destroy)(struct vmw_resource *res ) ;
 5370   void (*res_free)(struct vmw_resource *res ) ;
 5371   struct list_head validate_head ;
 5372   struct list_head query_head ;
 5373};
 5374#line 97 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5375struct vmw_cursor_snooper {
 5376   struct drm_crtc *crtc ;
 5377   size_t age ;
 5378   uint32_t *image ;
 5379};
 5380#line 104
 5381struct vmw_surface_offset;
 5382#line 106 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5383struct vmw_surface {
 5384   struct vmw_resource res ;
 5385   struct list_head lru_head ;
 5386   uint32_t flags ;
 5387   uint32_t format ;
 5388   uint32_t mip_levels[6] ;
 5389   struct drm_vmw_size *sizes ;
 5390   uint32_t num_sizes ;
 5391   bool scanout ;
 5392   struct vmw_cursor_snooper snooper ;
 5393   struct ttm_buffer_object *backup ;
 5394   struct vmw_surface_offset *offsets ;
 5395   uint32_t backup_size ;
 5396};
 5397#line 124 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5398struct vmw_marker_queue {
 5399   struct list_head head ;
 5400   struct timespec lag ;
 5401   struct timespec lag_time ;
 5402   spinlock_t lock ;
 5403};
 5404#line 131 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5405struct vmw_fifo_state {
 5406   unsigned long reserved_size ;
 5407   __le32 *dynamic_buffer ;
 5408   __le32 *static_buffer ;
 5409   unsigned long static_buffer_size ;
 5410   bool using_bounce_buffer ;
 5411   uint32_t capabilities ;
 5412   struct mutex fifo_mutex ;
 5413   struct rw_semaphore rwsem ;
 5414   struct vmw_marker_queue marker_queue ;
 5415};
 5416#line 143 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5417struct vmw_relocation {
 5418   SVGAGuestPtr *location ;
 5419   uint32_t index ;
 5420};
 5421#line 148 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5422struct vmw_sw_context {
 5423   struct ida bo_list ;
 5424   uint32_t last_cid ;
 5425   bool cid_valid ;
 5426   bool kernel ;
 5427   struct vmw_resource *cur_ctx ;
 5428   uint32_t last_sid ;
 5429   uint32_t sid_translation ;
 5430   bool sid_valid ;
 5431   struct ttm_object_file *tfile ;
 5432   struct list_head validate_nodes ;
 5433   struct vmw_relocation relocs[2048] ;
 5434   uint32_t cur_reloc ;
 5435   struct ttm_validate_buffer val_bufs[2048] ;
 5436   uint32_t cur_val_buf ;
 5437   uint32_t *cmd_bounce ;
 5438   uint32_t cmd_bounce_size ;
 5439   struct list_head resource_list ;
 5440   uint32_t fence_flags ;
 5441   struct list_head query_list ;
 5442   struct ttm_buffer_object *cur_query_bo ;
 5443   uint32_t cur_query_cid ;
 5444   bool query_cid_valid ;
 5445};
 5446#line 173
 5447struct vmw_legacy_display;
 5448#line 174
 5449struct vmw_overlay;
 5450#line 176 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5451struct vmw_master {
 5452   struct ttm_lock lock ;
 5453   struct mutex fb_surf_mutex ;
 5454   struct list_head fb_surf ;
 5455};
 5456#line 182 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5457struct vmw_vga_topology_state {
 5458   uint32_t width ;
 5459   uint32_t height ;
 5460   uint32_t primary ;
 5461   uint32_t pos_x ;
 5462   uint32_t pos_y ;
 5463};
 5464#line 190
 5465struct vmw_screen_object_display;
 5466#line 190 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5467struct vmw_private {
 5468   struct ttm_bo_device bdev ;
 5469   struct ttm_bo_global_ref bo_global_ref ;
 5470   struct drm_global_reference mem_global_ref ;
 5471   struct vmw_fifo_state fifo ;
 5472   struct drm_device *dev ;
 5473   unsigned long vmw_chipset ;
 5474   unsigned int io_start ;
 5475   uint32_t vram_start ;
 5476   uint32_t vram_size ;
 5477   uint32_t mmio_start ;
 5478   uint32_t mmio_size ;
 5479   uint32_t fb_max_width ;
 5480   uint32_t fb_max_height ;
 5481   uint32_t initial_width ;
 5482   uint32_t initial_height ;
 5483   __le32 *mmio_virt ;
 5484   int mmio_mtrr ;
 5485   uint32_t capabilities ;
 5486   uint32_t max_gmr_descriptors ;
 5487   uint32_t max_gmr_ids ;
 5488   uint32_t max_gmr_pages ;
 5489   uint32_t memory_size ;
 5490   bool has_gmr ;
 5491   struct mutex hw_mutex ;
 5492   struct vmw_vga_topology_state vga_save[16] ;
 5493   uint32_t vga_width ;
 5494   uint32_t vga_height ;
 5495   uint32_t vga_bpp ;
 5496   uint32_t vga_bpl ;
 5497   uint32_t vga_pitchlock ;
 5498   uint32_t num_displays ;
 5499   void *fb_info ;
 5500   struct vmw_legacy_display *ldu_priv ;
 5501   struct vmw_screen_object_display *sou_priv ;
 5502   struct vmw_overlay *overlay_priv ;
 5503   rwlock_t resource_lock ;
 5504   struct idr context_idr ;
 5505   struct idr surface_idr ;
 5506   struct idr stream_idr ;
 5507   struct mutex init_mutex ;
 5508   struct ttm_object_device *tdev ;
 5509   atomic_t marker_seq ;
 5510   wait_queue_head_t fence_queue ;
 5511   wait_queue_head_t fifo_queue ;
 5512   int fence_queue_waiters ;
 5513   int goal_queue_waiters ;
 5514   atomic_t fifo_queue_waiters ;
 5515   uint32_t last_read_seqno ;
 5516   spinlock_t irq_lock ;
 5517   struct vmw_fence_manager *fman ;
 5518   uint32_t irq_mask ;
 5519   uint32_t traces_state ;
 5520   uint32_t enable_state ;
 5521   uint32_t config_done_state ;
 5522   struct vmw_sw_context ctx ;
 5523   struct mutex cmdbuf_mutex ;
 5524   bool stealth ;
 5525   bool is_opened ;
 5526   bool enable_fb ;
 5527   struct vmw_master *active_master ;
 5528   struct vmw_master fbdev_master ;
 5529   struct notifier_block pm_nb ;
 5530   bool suspended ;
 5531   struct mutex release_mutex ;
 5532   uint32_t num_3d_resources ;
 5533   struct ttm_buffer_object *dummy_query_bo ;
 5534   struct ttm_buffer_object *pinned_bo ;
 5535   uint32_t query_cid ;
 5536   bool dummy_query_bo_pinned ;
 5537   struct list_head surface_lru ;
 5538   uint32_t used_memory_size ;
 5539};
 5540#line 112 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5541struct vmw_cid_cmd {
 5542   SVGA3dCmdHeader header ;
 5543   __le32 cid ;
 5544};
 5545#line 190 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5546struct vmw_sid_cmd {
 5547   SVGA3dCmdHeader header ;
 5548   SVGA3dCmdSetRenderTarget body ;
 5549};
 5550#line 209 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5551struct vmw_sid_cmd___0 {
 5552   SVGA3dCmdHeader header ;
 5553   SVGA3dCmdSurfaceCopy body ;
 5554};
 5555#line 226 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5556struct vmw_sid_cmd___1 {
 5557   SVGA3dCmdHeader header ;
 5558   SVGA3dCmdSurfaceStretchBlt body ;
 5559};
 5560#line 243 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5561struct vmw_sid_cmd___2 {
 5562   SVGA3dCmdHeader header ;
 5563   SVGA3dCmdBlitSurfaceToScreen body ;
 5564};
 5565#line 262 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5566struct vmw_sid_cmd___3 {
 5567   SVGA3dCmdHeader header ;
 5568   SVGA3dCmdPresent body ;
 5569};
 5570#line 487 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5571struct vmw_query_cmd {
 5572   SVGA3dCmdHeader header ;
 5573   SVGA3dCmdEndQuery q ;
 5574};
 5575#line 516 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5576struct vmw_query_cmd___0 {
 5577   SVGA3dCmdHeader header ;
 5578   SVGA3dCmdWaitForQuery q ;
 5579};
 5580#line 555 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5581struct vmw_dma_cmd {
 5582   SVGA3dCmdHeader header ;
 5583   SVGA3dCmdSurfaceDMA dma ;
 5584};
 5585#line 608 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5586struct vmw_draw_cmd {
 5587   SVGA3dCmdHeader header ;
 5588   SVGA3dCmdDrawPrimitives body ;
 5589};
 5590#line 660 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5591struct vmw_tex_state_cmd {
 5592   SVGA3dCmdHeader header ;
 5593   SVGA3dCmdSetTextureState state ;
 5594};
 5595#line 695 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5596struct __anonstruct_cmd_429 {
 5597   uint32_t header ;
 5598   SVGAFifoCmdDefineGMRFB body ;
 5599};
 5600#line 754 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 5601typedef int (*vmw_cmd_func)(struct vmw_private * , struct vmw_sw_context * , SVGA3dCmdHeader * );
 5602#line 41 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h"
 5603struct svga_guest_mem_descriptor {
 5604   __le32 ppn ;
 5605   __le32 num_pages ;
 5606};
 5607#line 1494 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5608struct __anonstruct_SVGAFifoCmdDefineGMR2_27 {
 5609   uint32 gmrId ;
 5610   uint32 numPages ;
 5611};
 5612#line 1494 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5613typedef struct __anonstruct_SVGAFifoCmdDefineGMR2_27 SVGAFifoCmdDefineGMR2;
 5614#line 1529
 5615enum __anonenum_SVGARemapGMR2Flags_28 {
 5616    SVGA_REMAP_GMR2_PPN32 = 0,
 5617    SVGA_REMAP_GMR2_VIA_GMR = 1,
 5618    SVGA_REMAP_GMR2_PPN64 = 2,
 5619    SVGA_REMAP_GMR2_SINGLE_PPN = 4
 5620} ;
 5621#line 1529 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5622typedef enum __anonenum_SVGARemapGMR2Flags_28 SVGARemapGMR2Flags;
 5623#line 1536 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5624struct __anonstruct_SVGAFifoCmdRemapGMR2_29 {
 5625   uint32 gmrId ;
 5626   SVGARemapGMR2Flags flags ;
 5627   uint32 offsetPages ;
 5628   uint32 numPages ;
 5629};
 5630#line 1536 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5631typedef struct __anonstruct_SVGAFifoCmdRemapGMR2_29 SVGAFifoCmdRemapGMR2;
 5632#line 13 "include/linux/thread_info.h"
 5633struct compat_timespec;
 5634#line 18 "include/linux/thread_info.h"
 5635struct __anonstruct_futex_144 {
 5636   u32 *uaddr ;
 5637   u32 val ;
 5638   u32 flags ;
 5639   u32 bitset ;
 5640   u64 time ;
 5641   u32 *uaddr2 ;
 5642};
 5643#line 18 "include/linux/thread_info.h"
 5644struct __anonstruct_nanosleep_145 {
 5645   clockid_t clockid ;
 5646   struct timespec *rmtp ;
 5647   struct compat_timespec *compat_rmtp ;
 5648   u64 expires ;
 5649};
 5650#line 18
 5651struct pollfd;
 5652#line 18 "include/linux/thread_info.h"
 5653struct __anonstruct_poll_146 {
 5654   struct pollfd *ufds ;
 5655   int nfds ;
 5656   int has_timeout ;
 5657   unsigned long tv_sec ;
 5658   unsigned long tv_nsec ;
 5659};
 5660#line 18 "include/linux/thread_info.h"
 5661union __anonunion____missing_field_name_143 {
 5662   struct __anonstruct_futex_144 futex ;
 5663   struct __anonstruct_nanosleep_145 nanosleep ;
 5664   struct __anonstruct_poll_146 poll ;
 5665};
 5666#line 18 "include/linux/thread_info.h"
 5667struct restart_block {
 5668   long (*fn)(struct restart_block * ) ;
 5669   union __anonunion____missing_field_name_143 __annonCompField18 ;
 5670};
 5671#line 21 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/thread_info.h"
 5672struct exec_domain;
 5673#line 92 "include/linux/personality.h"
 5674struct map_segment;
 5675#line 92 "include/linux/personality.h"
 5676struct exec_domain {
 5677   char    *name ;
 5678   void (*handler)(int  , struct pt_regs * ) ;
 5679   unsigned char pers_low ;
 5680   unsigned char pers_high ;
 5681   unsigned long *signal_map ;
 5682   unsigned long *signal_invmap ;
 5683   struct map_segment *err_map ;
 5684   struct map_segment *socktype_map ;
 5685   struct map_segment *sockopt_map ;
 5686   struct map_segment *af_map ;
 5687   struct module *module ;
 5688   struct exec_domain *next ;
 5689};
 5690#line 569 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
 5691struct __anonstruct_mm_segment_t_168 {
 5692   unsigned long seg ;
 5693};
 5694#line 569 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/processor.h"
 5695typedef struct __anonstruct_mm_segment_t_168 mm_segment_t;
 5696#line 26 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/thread_info.h"
 5697struct thread_info {
 5698   struct task_struct *task ;
 5699   struct exec_domain *exec_domain ;
 5700   __u32 flags ;
 5701   __u32 status ;
 5702   __u32 cpu ;
 5703   int preempt_count ;
 5704   mm_segment_t addr_limit ;
 5705   struct restart_block restart_block ;
 5706   void *sysenter_return ;
 5707   unsigned int sig_on_uaccess_error : 1 ;
 5708   unsigned int uaccess_err : 1 ;
 5709};
 5710#line 290 "include/linux/timer.h"
 5711enum hrtimer_restart;
 5712#line 24 "include/linux/sysfs.h"
 5713enum kobj_ns_type;
 5714#line 18 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/compat.h"
 5715typedef s32 compat_time_t;
 5716#line 45 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/compat.h"
 5717struct compat_timespec {
 5718   compat_time_t tv_sec ;
 5719   s32 tv_nsec ;
 5720};
 5721#line 33 "include/asm-generic/poll.h"
 5722struct pollfd {
 5723   int fd ;
 5724   short events ;
 5725   short revents ;
 5726};
 5727#line 290 "include/linux/timer.h"
 5728enum hrtimer_restart;
 5729#line 24 "include/linux/sysfs.h"
 5730enum kobj_ns_type;
 5731#line 263 "include/drm/drm_mode.h"
 5732struct drm_mode_fb_cmd {
 5733   __u32 fb_id ;
 5734   __u32 width ;
 5735   __u32 height ;
 5736   __u32 pitch ;
 5737   __u32 bpp ;
 5738   __u32 depth ;
 5739   __u32 handle ;
 5740};
 5741#line 1132 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5742struct SVGAFifoCmdDefineAlphaCursor {
 5743   uint32 id ;
 5744   uint32 hotspotX ;
 5745   uint32 hotspotY ;
 5746   uint32 width ;
 5747   uint32 height ;
 5748};
 5749#line 1132 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5750typedef struct SVGAFifoCmdDefineAlphaCursor SVGAFifoCmdDefineAlphaCursor;
 5751#line 1411 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5752struct __anonstruct_SVGAFifoCmdBlitScreenToGMRFB_296 {
 5753   SVGASignedPoint destOrigin ;
 5754   SVGASignedRect srcRect ;
 5755   uint32 srcScreenId ;
 5756};
 5757#line 1411 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 5758typedef struct __anonstruct_SVGAFifoCmdBlitScreenToGMRFB_296 SVGAFifoCmdBlitScreenToGMRFB;
 5759#line 83 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 5760enum SVGA3dSurfaceFormat {
 5761    SVGA3D_FORMAT_INVALID = 0,
 5762    SVGA3D_X8R8G8B8 = 1,
 5763    SVGA3D_A8R8G8B8 = 2,
 5764    SVGA3D_R5G6B5 = 3,
 5765    SVGA3D_X1R5G5B5 = 4,
 5766    SVGA3D_A1R5G5B5 = 5,
 5767    SVGA3D_A4R4G4B4 = 6,
 5768    SVGA3D_Z_D32 = 7,
 5769    SVGA3D_Z_D16 = 8,
 5770    SVGA3D_Z_D24S8 = 9,
 5771    SVGA3D_Z_D15S1 = 10,
 5772    SVGA3D_LUMINANCE8 = 11,
 5773    SVGA3D_LUMINANCE4_ALPHA4 = 12,
 5774    SVGA3D_LUMINANCE16 = 13,
 5775    SVGA3D_LUMINANCE8_ALPHA8 = 14,
 5776    SVGA3D_DXT1 = 15,
 5777    SVGA3D_DXT2 = 16,
 5778    SVGA3D_DXT3 = 17,
 5779    SVGA3D_DXT4 = 18,
 5780    SVGA3D_DXT5 = 19,
 5781    SVGA3D_BUMPU8V8 = 20,
 5782    SVGA3D_BUMPL6V5U5 = 21,
 5783    SVGA3D_BUMPX8L8V8U8 = 22,
 5784    SVGA3D_BUMPL8V8U8 = 23,
 5785    SVGA3D_ARGB_S10E5 = 24,
 5786    SVGA3D_ARGB_S23E8 = 25,
 5787    SVGA3D_A2R10G10B10 = 26,
 5788    SVGA3D_V8U8 = 27,
 5789    SVGA3D_Q8W8V8U8 = 28,
 5790    SVGA3D_CxV8U8 = 29,
 5791    SVGA3D_X8L8V8U8 = 30,
 5792    SVGA3D_A2W10V10U10 = 31,
 5793    SVGA3D_ALPHA8 = 32,
 5794    SVGA3D_R_S10E5 = 33,
 5795    SVGA3D_R_S23E8 = 34,
 5796    SVGA3D_RG_S10E5 = 35,
 5797    SVGA3D_RG_S23E8 = 36,
 5798    SVGA3D_BUFFER = 37,
 5799    SVGA3D_Z_D24X8 = 38,
 5800    SVGA3D_V16U16 = 39,
 5801    SVGA3D_G16R16 = 40,
 5802    SVGA3D_A16B16G16R16 = 41,
 5803    SVGA3D_UYVY = 42,
 5804    SVGA3D_YUY2 = 43,
 5805    SVGA3D_NV12 = 44,
 5806    SVGA3D_AYUV = 45,
 5807    SVGA3D_BC4_UNORM = 108,
 5808    SVGA3D_BC5_UNORM = 111,
 5809    SVGA3D_Z_DF16 = 118,
 5810    SVGA3D_Z_DF24 = 119,
 5811    SVGA3D_Z_D24S8_INT = 120,
 5812    SVGA3D_FORMAT_MAX = 121
 5813} ;
 5814#line 1240 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 5815struct SVGA3dCopyBox {
 5816   uint32 x ;
 5817   uint32 y ;
 5818   uint32 z ;
 5819   uint32 w ;
 5820   uint32 h ;
 5821   uint32 d ;
 5822   uint32 srcx ;
 5823   uint32 srcy ;
 5824   uint32 srcz ;
 5825};
 5826#line 1240 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 5827typedef struct SVGA3dCopyBox SVGA3dCopyBox;
 5828#line 426 "include/drm/vmwgfx_drm.h"
 5829struct drm_vmw_rect {
 5830   int32_t x ;
 5831   int32_t y ;
 5832   uint32_t w ;
 5833   uint32_t h ;
 5834};
 5835#line 493 "include/drm/vmwgfx_drm.h"
 5836struct drm_vmw_cursor_bypass_arg {
 5837   uint32_t flags ;
 5838   uint32_t crtc_id ;
 5839   int32_t xpos ;
 5840   int32_t ypos ;
 5841   int32_t xhot ;
 5842   int32_t yhot ;
 5843};
 5844#line 784 "include/drm/vmwgfx_drm.h"
 5845struct drm_vmw_update_layout_arg {
 5846   uint32_t num_outputs ;
 5847   uint32_t pad64 ;
 5848   uint64_t rects ;
 5849};
 5850#line 290 "include/drm/ttm/ttm_bo_api.h"
 5851enum __anonenum_bo_kmap_type_427 {
 5852    ttm_bo_map_iomap = 129,
 5853    ttm_bo_map_vmap = 2,
 5854    ttm_bo_map_kmap = 3,
 5855    ttm_bo_map_premapped = 132
 5856} ;
 5857#line 290 "include/drm/ttm/ttm_bo_api.h"
 5858struct ttm_bo_kmap_obj {
 5859   void *virtual ;
 5860   struct page *page ;
 5861   enum __anonenum_bo_kmap_type_427 bo_kmap_type ;
 5862   struct ttm_buffer_object *bo ;
 5863};
 5864#line 103 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 5865struct vmw_framebuffer;
 5866#line 47 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h"
 5867struct vmw_framebuffer {
 5868   struct drm_framebuffer base ;
 5869   int (*pin)(struct vmw_framebuffer *fb ) ;
 5870   int (*unpin)(struct vmw_framebuffer *fb ) ;
 5871   bool dmabuf ;
 5872   struct ttm_base_object *user_obj ;
 5873   uint32_t user_handle ;
 5874};
 5875#line 81 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h"
 5876struct vmw_display_unit {
 5877   struct drm_crtc crtc ;
 5878   struct drm_encoder encoder ;
 5879   struct drm_connector connector ;
 5880   struct vmw_surface *cursor_surface ;
 5881   struct vmw_dma_buffer *cursor_dmabuf ;
 5882   size_t cursor_age ;
 5883   int cursor_x ;
 5884   int cursor_y ;
 5885   int hotspot_x ;
 5886   int hotspot_y ;
 5887   unsigned int unit ;
 5888   unsigned int pref_width ;
 5889   unsigned int pref_height ;
 5890   bool pref_active ;
 5891   struct drm_display_mode *pref_mode ;
 5892   int gui_x ;
 5893   int gui_y ;
 5894   bool is_implicit ;
 5895};
 5896#line 36 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5897struct vmw_clip_rect {
 5898   int x1 ;
 5899   int x2 ;
 5900   int y1 ;
 5901   int y2 ;
 5902};
 5903#line 92 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5904struct __anonstruct_cmd_429___0 {
 5905   u32 cmd ;
 5906   SVGAFifoCmdDefineAlphaCursor cursor ;
 5907};
 5908#line 394 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5909struct vmw_framebuffer_surface {
 5910   struct vmw_framebuffer base ;
 5911   struct vmw_surface *surface ;
 5912   struct vmw_dma_buffer *buffer ;
 5913   struct list_head head ;
 5914   struct drm_master *master ;
 5915};
 5916#line 438 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5917struct __anonstruct_cmd_430 {
 5918   SVGA3dCmdHeader header ;
 5919   SVGA3dCmdBlitSurfaceToScreen body ;
 5920};
 5921#line 729 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5922struct vmw_framebuffer_dmabuf {
 5923   struct vmw_framebuffer base ;
 5924   struct vmw_dma_buffer *buffer ;
 5925};
 5926#line 755 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5927struct __anonstruct_cmd_431 {
 5928   uint32_t header ;
 5929   SVGAFifoCmdUpdate body ;
 5930};
 5931#line 788 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5932struct __anonstruct_cmd_432 {
 5933   uint32_t header ;
 5934   SVGAFifoCmdDefineGMRFB body ;
 5935};
 5936#line 838 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5937struct __anonstruct_blits_433 {
 5938   uint32_t header ;
 5939   SVGAFifoCmdBlitGMRFBToScreen body ;
 5940};
 5941#line 1203 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5942struct __anonstruct_cmd_434 {
 5943   SVGA3dCmdHeader header ;
 5944   SVGA3dCmdBlitSurfaceToScreen body ;
 5945};
 5946#line 1337 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5947struct __anonstruct_cmd_435 {
 5948   uint32_t header ;
 5949   SVGAFifoCmdDefineGMRFB body ;
 5950};
 5951#line 1341 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
 5952struct __anonstruct_blits_436 {
 5953   uint32_t header ;
 5954   SVGAFifoCmdBlitScreenToGMRFB body ;
 5955};
 5956#line 45 "include/asm-generic/int-ll64.h"
 5957typedef short s16;
 5958#line 146 "include/linux/init.h"
 5959typedef void (*ctor_fn_t)(void);
 5960#line 234 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/paravirt.h"
 5961struct static_key;
 5962#line 290 "include/linux/timer.h"
 5963enum hrtimer_restart;
 5964#line 18 "include/linux/elf.h"
 5965typedef __u64 Elf64_Addr;
 5966#line 19 "include/linux/elf.h"
 5967typedef __u16 Elf64_Half;
 5968#line 23 "include/linux/elf.h"
 5969typedef __u32 Elf64_Word;
 5970#line 24 "include/linux/elf.h"
 5971typedef __u64 Elf64_Xword;
 5972#line 194 "include/linux/elf.h"
 5973struct elf64_sym {
 5974   Elf64_Word st_name ;
 5975   unsigned char st_info ;
 5976   unsigned char st_other ;
 5977   Elf64_Half st_shndx ;
 5978   Elf64_Addr st_value ;
 5979   Elf64_Xword st_size ;
 5980};
 5981#line 194 "include/linux/elf.h"
 5982typedef struct elf64_sym Elf64_Sym;
 5983#line 24 "include/linux/sysfs.h"
 5984enum kobj_ns_type;
 5985#line 39 "include/linux/moduleparam.h"
 5986struct kernel_param;
 5987#line 41 "include/linux/moduleparam.h"
 5988struct kernel_param_ops {
 5989   int (*set)(char    *val , struct kernel_param    *kp ) ;
 5990   int (*get)(char *buffer , struct kernel_param    *kp ) ;
 5991   void (*free)(void *arg ) ;
 5992};
 5993#line 50
 5994struct kparam_string;
 5995#line 50
 5996struct kparam_array;
 5997#line 50 "include/linux/moduleparam.h"
 5998union __anonunion____missing_field_name_199 {
 5999   void *arg ;
 6000   struct kparam_string    *str ;
 6001   struct kparam_array    *arr ;
 6002};
 6003#line 50 "include/linux/moduleparam.h"
 6004struct kernel_param {
 6005   char    *name ;
 6006   struct kernel_param_ops    *ops ;
 6007   u16 perm ;
 6008   s16 level ;
 6009   union __anonunion____missing_field_name_199 __annonCompField32 ;
 6010};
 6011#line 63 "include/linux/moduleparam.h"
 6012struct kparam_string {
 6013   unsigned int maxlen ;
 6014   char *string ;
 6015};
 6016#line 69 "include/linux/moduleparam.h"
 6017struct kparam_array {
 6018   unsigned int max ;
 6019   unsigned int elemsize ;
 6020   unsigned int *num ;
 6021   struct kernel_param_ops    *ops ;
 6022   void *elem ;
 6023};
 6024#line 143 "include/linux/jump_label.h"
 6025struct static_key {
 6026   atomic_t enabled ;
 6027};
 6028#line 23 "include/linux/tracepoint.h"
 6029struct tracepoint;
 6030#line 25 "include/linux/tracepoint.h"
 6031struct tracepoint_func {
 6032   void *func ;
 6033   void *data ;
 6034};
 6035#line 30 "include/linux/tracepoint.h"
 6036struct tracepoint {
 6037   char    *name ;
 6038   struct static_key key ;
 6039   void (*regfunc)(void) ;
 6040   void (*unregfunc)(void) ;
 6041   struct tracepoint_func *funcs ;
 6042};
 6043#line 19 "include/linux/export.h"
 6044struct kernel_symbol {
 6045   unsigned long value ;
 6046   char    *name ;
 6047};
 6048#line 8 "include/asm-generic/module.h"
 6049struct mod_arch_specific {
 6050
 6051};
 6052#line 37 "include/linux/module.h"
 6053struct module_param_attrs;
 6054#line 37 "include/linux/module.h"
 6055struct module_kobject {
 6056   struct kobject kobj ;
 6057   struct module *mod ;
 6058   struct kobject *drivers_dir ;
 6059   struct module_param_attrs *mp ;
 6060};
 6061#line 44 "include/linux/module.h"
 6062struct module_attribute {
 6063   struct attribute attr ;
 6064   ssize_t (*show)(struct module_attribute * , struct module_kobject * , char * ) ;
 6065   ssize_t (*store)(struct module_attribute * , struct module_kobject * , char    * ,
 6066                    size_t count ) ;
 6067   void (*setup)(struct module * , char    * ) ;
 6068   int (*test)(struct module * ) ;
 6069   void (*free)(struct module * ) ;
 6070};
 6071#line 71
 6072struct exception_table_entry;
 6073#line 199
 6074enum module_state {
 6075    MODULE_STATE_LIVE = 0,
 6076    MODULE_STATE_COMING = 1,
 6077    MODULE_STATE_GOING = 2
 6078} ;
 6079#line 215 "include/linux/module.h"
 6080struct module_ref {
 6081   unsigned long incs ;
 6082   unsigned long decs ;
 6083} __attribute__((__aligned__((2) *  (sizeof(unsigned long )) ))) ;
 6084#line 220
 6085struct module_sect_attrs;
 6086#line 220
 6087struct module_notes_attrs;
 6088#line 220
 6089struct ftrace_event_call;
 6090#line 220 "include/linux/module.h"
 6091struct module {
 6092   enum module_state state ;
 6093   struct list_head list ;
 6094   char name[64UL - sizeof(unsigned long )] ;
 6095   struct module_kobject mkobj ;
 6096   struct module_attribute *modinfo_attrs ;
 6097   char    *version ;
 6098   char    *srcversion ;
 6099   struct kobject *holders_dir ;
 6100   struct kernel_symbol    *syms ;
 6101   unsigned long    *crcs ;
 6102   unsigned int num_syms ;
 6103   struct kernel_param *kp ;
 6104   unsigned int num_kp ;
 6105   unsigned int num_gpl_syms ;
 6106   struct kernel_symbol    *gpl_syms ;
 6107   unsigned long    *gpl_crcs ;
 6108   struct kernel_symbol    *unused_syms ;
 6109   unsigned long    *unused_crcs ;
 6110   unsigned int num_unused_syms ;
 6111   unsigned int num_unused_gpl_syms ;
 6112   struct kernel_symbol    *unused_gpl_syms ;
 6113   unsigned long    *unused_gpl_crcs ;
 6114   struct kernel_symbol    *gpl_future_syms ;
 6115   unsigned long    *gpl_future_crcs ;
 6116   unsigned int num_gpl_future_syms ;
 6117   unsigned int num_exentries ;
 6118   struct exception_table_entry *extable ;
 6119   int (*init)(void) ;
 6120   void *module_init ;
 6121   void *module_core ;
 6122   unsigned int init_size ;
 6123   unsigned int core_size ;
 6124   unsigned int init_text_size ;
 6125   unsigned int core_text_size ;
 6126   unsigned int init_ro_size ;
 6127   unsigned int core_ro_size ;
 6128   struct mod_arch_specific arch ;
 6129   unsigned int taints ;
 6130   unsigned int num_bugs ;
 6131   struct list_head bug_list ;
 6132   struct bug_entry *bug_table ;
 6133   Elf64_Sym *symtab ;
 6134   Elf64_Sym *core_symtab ;
 6135   unsigned int num_symtab ;
 6136   unsigned int core_num_syms ;
 6137   char *strtab ;
 6138   char *core_strtab ;
 6139   struct module_sect_attrs *sect_attrs ;
 6140   struct module_notes_attrs *notes_attrs ;
 6141   char *args ;
 6142   void *percpu ;
 6143   unsigned int percpu_size ;
 6144   unsigned int num_tracepoints ;
 6145   struct tracepoint *   *tracepoints_ptrs ;
 6146   unsigned int num_trace_bprintk_fmt ;
 6147   char    **trace_bprintk_fmt_start ;
 6148   struct ftrace_event_call **trace_events ;
 6149   unsigned int num_trace_events ;
 6150   struct list_head source_list ;
 6151   struct list_head target_list ;
 6152   struct task_struct *waiter ;
 6153   void (*exit)(void) ;
 6154   struct module_ref *refptr ;
 6155   ctor_fn_t *ctors ;
 6156   unsigned int num_ctors ;
 6157};
 6158#line 94 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/uaccess.h"
 6159struct exception_table_entry {
 6160   unsigned long insn ;
 6161   unsigned long fixup ;
 6162};
 6163#line 984 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6164enum __anonenum_SVGA3dQueryState_359 {
 6165    SVGA3D_QUERYSTATE_PENDING = 0,
 6166    SVGA3D_QUERYSTATE_SUCCEEDED = 1,
 6167    SVGA3D_QUERYSTATE_FAILED = 2,
 6168    SVGA3D_QUERYSTATE_NEW = 3
 6169} ;
 6170#line 984 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6171typedef enum __anonenum_SVGA3dQueryState_359 SVGA3dQueryState;
 6172#line 1690 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6173union __anonunion____missing_field_name_415 {
 6174   uint32 result32 ;
 6175};
 6176#line 1690 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6177struct __anonstruct_SVGA3dQueryResult_414 {
 6178   uint32 totalSize ;
 6179   SVGA3dQueryState state ;
 6180   union __anonunion____missing_field_name_415 __annonCompField61 ;
 6181};
 6182#line 1690 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6183typedef struct __anonstruct_SVGA3dQueryResult_414 SVGA3dQueryResult;
 6184#line 88 "include/drm/vmwgfx_drm.h"
 6185struct drm_vmw_getparam_arg {
 6186   uint64_t value ;
 6187   uint32_t param ;
 6188   uint32_t pad64 ;
 6189};
 6190#line 111 "include/drm/vmwgfx_drm.h"
 6191struct drm_vmw_context_arg {
 6192   int32_t cid ;
 6193   uint32_t pad64 ;
 6194};
 6195#line 154 "include/drm/vmwgfx_drm.h"
 6196struct drm_vmw_surface_create_req {
 6197   uint32_t flags ;
 6198   uint32_t format ;
 6199   uint32_t mip_levels[6] ;
 6200   uint64_t size_addr ;
 6201   int32_t shareable ;
 6202   int32_t scanout ;
 6203};
 6204#line 173 "include/drm/vmwgfx_drm.h"
 6205struct drm_vmw_surface_arg {
 6206   int32_t sid ;
 6207   uint32_t pad64 ;
 6208};
 6209#line 205 "include/drm/vmwgfx_drm.h"
 6210union drm_vmw_surface_create_arg {
 6211   struct drm_vmw_surface_arg rep ;
 6212   struct drm_vmw_surface_create_req req ;
 6213};
 6214#line 233 "include/drm/vmwgfx_drm.h"
 6215union drm_vmw_surface_reference_arg {
 6216   struct drm_vmw_surface_create_req rep ;
 6217   struct drm_vmw_surface_arg req ;
 6218};
 6219#line 347 "include/drm/vmwgfx_drm.h"
 6220struct drm_vmw_alloc_dmabuf_req {
 6221   uint32_t size ;
 6222   uint32_t pad64 ;
 6223};
 6224#line 365 "include/drm/vmwgfx_drm.h"
 6225struct drm_vmw_dmabuf_rep {
 6226   uint64_t map_handle ;
 6227   uint32_t handle ;
 6228   uint32_t cur_gmr_id ;
 6229   uint32_t cur_gmr_offset ;
 6230   uint32_t pad64 ;
 6231};
 6232#line 382 "include/drm/vmwgfx_drm.h"
 6233union drm_vmw_alloc_dmabuf_arg {
 6234   struct drm_vmw_alloc_dmabuf_req req ;
 6235   struct drm_vmw_dmabuf_rep rep ;
 6236};
 6237#line 402 "include/drm/vmwgfx_drm.h"
 6238struct drm_vmw_unref_dmabuf_arg {
 6239   uint32_t handle ;
 6240   uint32_t pad64 ;
 6241};
 6242#line 451 "include/drm/vmwgfx_drm.h"
 6243struct drm_vmw_control_stream_arg {
 6244   uint32_t stream_id ;
 6245   uint32_t enabled ;
 6246   uint32_t flags ;
 6247   uint32_t color_key ;
 6248   uint32_t handle ;
 6249   uint32_t offset ;
 6250   int32_t format ;
 6251   uint32_t size ;
 6252   uint32_t width ;
 6253   uint32_t height ;
 6254   uint32_t pitch[3] ;
 6255   uint32_t pad64 ;
 6256   struct drm_vmw_rect src ;
 6257   struct drm_vmw_rect dst ;
 6258};
 6259#line 516 "include/drm/vmwgfx_drm.h"
 6260struct drm_vmw_stream_arg {
 6261   uint32_t stream_id ;
 6262   uint32_t pad64 ;
 6263};
 6264#line 547 "include/drm/vmwgfx_drm.h"
 6265struct drm_vmw_get_3d_cap_arg {
 6266   uint64_t buffer ;
 6267   uint32_t max_size ;
 6268   uint32_t pad64 ;
 6269};
 6270#line 598 "include/drm/vmwgfx_drm.h"
 6271struct drm_vmw_fence_wait_arg {
 6272   uint32_t handle ;
 6273   int32_t cookie_valid ;
 6274   uint64_t kernel_cookie ;
 6275   uint64_t timeout_us ;
 6276   int32_t lazy ;
 6277   int32_t flags ;
 6278   int32_t wait_options ;
 6279   int32_t pad64 ;
 6280};
 6281#line 629 "include/drm/vmwgfx_drm.h"
 6282struct drm_vmw_fence_signaled_arg {
 6283   uint32_t handle ;
 6284   uint32_t flags ;
 6285   int32_t signaled ;
 6286   uint32_t passed_seqno ;
 6287   uint32_t signaled_flags ;
 6288   uint32_t pad64 ;
 6289};
 6290#line 655 "include/drm/vmwgfx_drm.h"
 6291struct drm_vmw_fence_arg {
 6292   uint32_t handle ;
 6293   uint32_t pad64 ;
 6294};
 6295#line 698 "include/drm/vmwgfx_drm.h"
 6296struct drm_vmw_fence_event_arg {
 6297   uint64_t fence_rep ;
 6298   uint64_t user_data ;
 6299   uint32_t handle ;
 6300   uint32_t flags ;
 6301};
 6302#line 730 "include/drm/vmwgfx_drm.h"
 6303struct drm_vmw_present_arg {
 6304   uint32_t fb_id ;
 6305   uint32_t sid ;
 6306   int32_t dest_x ;
 6307   int32_t dest_y ;
 6308   uint64_t clips_ptr ;
 6309   uint32_t num_clips ;
 6310   uint32_t pad64 ;
 6311};
 6312#line 760 "include/drm/vmwgfx_drm.h"
 6313struct drm_vmw_present_readback_arg {
 6314   uint32_t fb_id ;
 6315   uint32_t num_clips ;
 6316   uint64_t clips_ptr ;
 6317   uint64_t fence_rep ;
 6318};
 6319#line 1137 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
 6320struct __anonstruct_437 {
 6321   int  : 0 ;
 6322};
 6323#line 290 "include/linux/timer.h"
 6324enum hrtimer_restart;
 6325#line 24 "include/linux/sysfs.h"
 6326enum kobj_ns_type;
 6327#line 161 "include/linux/fb.h"
 6328struct fb_fix_screeninfo {
 6329   char id[16] ;
 6330   unsigned long smem_start ;
 6331   __u32 smem_len ;
 6332   __u32 type ;
 6333   __u32 type_aux ;
 6334   __u32 visual ;
 6335   __u16 xpanstep ;
 6336   __u16 ypanstep ;
 6337   __u16 ywrapstep ;
 6338   __u32 line_length ;
 6339   unsigned long mmio_start ;
 6340   __u32 mmio_len ;
 6341   __u32 accel ;
 6342   __u16 capabilities ;
 6343   __u16 reserved[2] ;
 6344};
 6345#line 192 "include/linux/fb.h"
 6346struct fb_bitfield {
 6347   __u32 offset ;
 6348   __u32 length ;
 6349   __u32 msb_right ;
 6350};
 6351#line 245 "include/linux/fb.h"
 6352struct fb_var_screeninfo {
 6353   __u32 xres ;
 6354   __u32 yres ;
 6355   __u32 xres_virtual ;
 6356   __u32 yres_virtual ;
 6357   __u32 xoffset ;
 6358   __u32 yoffset ;
 6359   __u32 bits_per_pixel ;
 6360   __u32 grayscale ;
 6361   struct fb_bitfield red ;
 6362   struct fb_bitfield green ;
 6363   struct fb_bitfield blue ;
 6364   struct fb_bitfield transp ;
 6365   __u32 nonstd ;
 6366   __u32 activate ;
 6367   __u32 height ;
 6368   __u32 width ;
 6369   __u32 accel_flags ;
 6370   __u32 pixclock ;
 6371   __u32 left_margin ;
 6372   __u32 right_margin ;
 6373   __u32 upper_margin ;
 6374   __u32 lower_margin ;
 6375   __u32 hsync_len ;
 6376   __u32 vsync_len ;
 6377   __u32 sync ;
 6378   __u32 vmode ;
 6379   __u32 rotate ;
 6380   __u32 colorspace ;
 6381   __u32 reserved[4] ;
 6382};
 6383#line 285 "include/linux/fb.h"
 6384struct fb_cmap {
 6385   __u32 start ;
 6386   __u32 len ;
 6387   __u16 *red ;
 6388   __u16 *green ;
 6389   __u16 *blue ;
 6390   __u16 *transp ;
 6391};
 6392#line 345 "include/linux/fb.h"
 6393struct fb_copyarea {
 6394   __u32 dx ;
 6395   __u32 dy ;
 6396   __u32 width ;
 6397   __u32 height ;
 6398   __u32 sx ;
 6399   __u32 sy ;
 6400};
 6401#line 354 "include/linux/fb.h"
 6402struct fb_fillrect {
 6403   __u32 dx ;
 6404   __u32 dy ;
 6405   __u32 width ;
 6406   __u32 height ;
 6407   __u32 color ;
 6408   __u32 rop ;
 6409};
 6410#line 363 "include/linux/fb.h"
 6411struct fb_image {
 6412   __u32 dx ;
 6413   __u32 dy ;
 6414   __u32 width ;
 6415   __u32 height ;
 6416   __u32 fg_color ;
 6417   __u32 bg_color ;
 6418   __u8 depth ;
 6419   char    *data ;
 6420   struct fb_cmap cmap ;
 6421};
 6422#line 387 "include/linux/fb.h"
 6423struct fbcurpos {
 6424   __u16 x ;
 6425   __u16 y ;
 6426};
 6427#line 391 "include/linux/fb.h"
 6428struct fb_cursor {
 6429   __u16 set ;
 6430   __u16 enable ;
 6431   __u16 rop ;
 6432   char    *mask ;
 6433   struct fbcurpos hot ;
 6434   struct fb_image image ;
 6435};
 6436#line 35 "include/linux/backlight.h"
 6437enum backlight_type {
 6438    BACKLIGHT_RAW = 1,
 6439    BACKLIGHT_PLATFORM = 2,
 6440    BACKLIGHT_FIRMWARE = 3,
 6441    BACKLIGHT_TYPE_MAX = 4
 6442} ;
 6443#line 42
 6444struct backlight_device;
 6445#line 43
 6446struct fb_info;
 6447#line 45 "include/linux/backlight.h"
 6448struct backlight_ops {
 6449   unsigned int options ;
 6450   int (*update_status)(struct backlight_device * ) ;
 6451   int (*get_brightness)(struct backlight_device * ) ;
 6452   int (*check_fb)(struct backlight_device * , struct fb_info * ) ;
 6453};
 6454#line 61 "include/linux/backlight.h"
 6455struct backlight_properties {
 6456   int brightness ;
 6457   int max_brightness ;
 6458   int power ;
 6459   int fb_blank ;
 6460   enum backlight_type type ;
 6461   unsigned int state ;
 6462};
 6463#line 87 "include/linux/backlight.h"
 6464struct backlight_device {
 6465   struct backlight_properties props ;
 6466   struct mutex update_lock ;
 6467   struct mutex ops_lock ;
 6468   struct backlight_ops    *ops ;
 6469   struct notifier_block fb_notif ;
 6470   struct device dev ;
 6471};
 6472#line 447 "include/linux/fb.h"
 6473struct fb_chroma {
 6474   __u32 redx ;
 6475   __u32 greenx ;
 6476   __u32 bluex ;
 6477   __u32 whitex ;
 6478   __u32 redy ;
 6479   __u32 greeny ;
 6480   __u32 bluey ;
 6481   __u32 whitey ;
 6482};
 6483#line 458
 6484struct fb_videomode;
 6485#line 458 "include/linux/fb.h"
 6486struct fb_monspecs {
 6487   struct fb_chroma chroma ;
 6488   struct fb_videomode *modedb ;
 6489   __u8 manufacturer[4] ;
 6490   __u8 monitor[14] ;
 6491   __u8 serial_no[14] ;
 6492   __u8 ascii[14] ;
 6493   __u32 modedb_len ;
 6494   __u32 model ;
 6495   __u32 serial ;
 6496   __u32 year ;
 6497   __u32 week ;
 6498   __u32 hfmin ;
 6499   __u32 hfmax ;
 6500   __u32 dclkmin ;
 6501   __u32 dclkmax ;
 6502   __u16 input ;
 6503   __u16 dpms ;
 6504   __u16 signal ;
 6505   __u16 vfmin ;
 6506   __u16 vfmax ;
 6507   __u16 gamma ;
 6508   __u16 gtf : 1 ;
 6509   __u16 misc ;
 6510   __u8 version ;
 6511   __u8 revision ;
 6512   __u8 max_x ;
 6513   __u8 max_y ;
 6514};
 6515#line 563 "include/linux/fb.h"
 6516struct fb_blit_caps {
 6517   u32 x ;
 6518   u32 y ;
 6519   u32 len ;
 6520   u32 flags ;
 6521};
 6522#line 586 "include/linux/fb.h"
 6523struct fb_pixmap {
 6524   u8 *addr ;
 6525   u32 size ;
 6526   u32 offset ;
 6527   u32 buf_align ;
 6528   u32 scan_align ;
 6529   u32 access_align ;
 6530   u32 flags ;
 6531   u32 blit_x ;
 6532   u32 blit_y ;
 6533   void (*writeio)(struct fb_info *info , void *dst , void *src , unsigned int size ) ;
 6534   void (*readio)(struct fb_info *info , void *dst , void *src , unsigned int size ) ;
 6535};
 6536#line 604 "include/linux/fb.h"
 6537struct fb_deferred_io {
 6538   unsigned long delay ;
 6539   struct mutex lock ;
 6540   struct list_head pagelist ;
 6541   void (*deferred_io)(struct fb_info *info , struct list_head *pagelist ) ;
 6542};
 6543#line 628 "include/linux/fb.h"
 6544struct fb_ops {
 6545   struct module *owner ;
 6546   int (*fb_open)(struct fb_info *info , int user ) ;
 6547   int (*fb_release)(struct fb_info *info , int user ) ;
 6548   ssize_t (*fb_read)(struct fb_info *info , char *buf , size_t count , loff_t *ppos ) ;
 6549   ssize_t (*fb_write)(struct fb_info *info , char    *buf , size_t count , loff_t *ppos ) ;
 6550   int (*fb_check_var)(struct fb_var_screeninfo *var , struct fb_info *info ) ;
 6551   int (*fb_set_par)(struct fb_info *info ) ;
 6552   int (*fb_setcolreg)(unsigned int regno , unsigned int red , unsigned int green ,
 6553                       unsigned int blue , unsigned int transp , struct fb_info *info ) ;
 6554   int (*fb_setcmap)(struct fb_cmap *cmap , struct fb_info *info ) ;
 6555   int (*fb_blank)(int blank , struct fb_info *info ) ;
 6556   int (*fb_pan_display)(struct fb_var_screeninfo *var , struct fb_info *info ) ;
 6557   void (*fb_fillrect)(struct fb_info *info , struct fb_fillrect    *rect ) ;
 6558   void (*fb_copyarea)(struct fb_info *info , struct fb_copyarea    *region ) ;
 6559   void (*fb_imageblit)(struct fb_info *info , struct fb_image    *image ) ;
 6560   int (*fb_cursor)(struct fb_info *info , struct fb_cursor *cursor ) ;
 6561   void (*fb_rotate)(struct fb_info *info , int angle ) ;
 6562   int (*fb_sync)(struct fb_info *info ) ;
 6563   int (*fb_ioctl)(struct fb_info *info , unsigned int cmd , unsigned long arg ) ;
 6564   int (*fb_compat_ioctl)(struct fb_info *info , unsigned int cmd , unsigned long arg ) ;
 6565   int (*fb_mmap)(struct fb_info *info , struct vm_area_struct *vma ) ;
 6566   void (*fb_get_caps)(struct fb_info *info , struct fb_blit_caps *caps , struct fb_var_screeninfo *var ) ;
 6567   void (*fb_destroy)(struct fb_info *info ) ;
 6568   int (*fb_debug_enter)(struct fb_info *info ) ;
 6569   int (*fb_debug_leave)(struct fb_info *info ) ;
 6570};
 6571#line 709 "include/linux/fb.h"
 6572struct fb_tilemap {
 6573   __u32 width ;
 6574   __u32 height ;
 6575   __u32 depth ;
 6576   __u32 length ;
 6577   __u8    *data ;
 6578};
 6579#line 718 "include/linux/fb.h"
 6580struct fb_tilerect {
 6581   __u32 sx ;
 6582   __u32 sy ;
 6583   __u32 width ;
 6584   __u32 height ;
 6585   __u32 index ;
 6586   __u32 fg ;
 6587   __u32 bg ;
 6588   __u32 rop ;
 6589};
 6590#line 729 "include/linux/fb.h"
 6591struct fb_tilearea {
 6592   __u32 sx ;
 6593   __u32 sy ;
 6594   __u32 dx ;
 6595   __u32 dy ;
 6596   __u32 width ;
 6597   __u32 height ;
 6598};
 6599#line 738 "include/linux/fb.h"
 6600struct fb_tileblit {
 6601   __u32 sx ;
 6602   __u32 sy ;
 6603   __u32 width ;
 6604   __u32 height ;
 6605   __u32 fg ;
 6606   __u32 bg ;
 6607   __u32 length ;
 6608   __u32 *indices ;
 6609};
 6610#line 749 "include/linux/fb.h"
 6611struct fb_tilecursor {
 6612   __u32 sx ;
 6613   __u32 sy ;
 6614   __u32 mode ;
 6615   __u32 shape ;
 6616   __u32 fg ;
 6617   __u32 bg ;
 6618};
 6619#line 758 "include/linux/fb.h"
 6620struct fb_tile_ops {
 6621   void (*fb_settile)(struct fb_info *info , struct fb_tilemap *map ) ;
 6622   void (*fb_tilecopy)(struct fb_info *info , struct fb_tilearea *area ) ;
 6623   void (*fb_tilefill)(struct fb_info *info , struct fb_tilerect *rect ) ;
 6624   void (*fb_tileblit)(struct fb_info *info , struct fb_tileblit *blit ) ;
 6625   void (*fb_tilecursor)(struct fb_info *info , struct fb_tilecursor *cursor ) ;
 6626   int (*fb_get_tilemax)(struct fb_info *info ) ;
 6627};
 6628#line 839 "include/linux/fb.h"
 6629struct aperture {
 6630   resource_size_t base ;
 6631   resource_size_t size ;
 6632};
 6633#line 839 "include/linux/fb.h"
 6634struct apertures_struct {
 6635   unsigned int count ;
 6636   struct aperture ranges[0] ;
 6637};
 6638#line 839 "include/linux/fb.h"
 6639struct fb_info {
 6640   atomic_t count ;
 6641   int node ;
 6642   int flags ;
 6643   struct mutex lock ;
 6644   struct mutex mm_lock ;
 6645   struct fb_var_screeninfo var ;
 6646   struct fb_fix_screeninfo fix ;
 6647   struct fb_monspecs monspecs ;
 6648   struct work_struct queue ;
 6649   struct fb_pixmap pixmap ;
 6650   struct fb_pixmap sprite ;
 6651   struct fb_cmap cmap ;
 6652   struct list_head modelist ;
 6653   struct fb_videomode *mode ;
 6654   struct backlight_device *bl_dev ;
 6655   struct mutex bl_curve_mutex ;
 6656   u8 bl_curve[128] ;
 6657   struct delayed_work deferred_work ;
 6658   struct fb_deferred_io *fbdefio ;
 6659   struct fb_ops *fbops ;
 6660   struct device *device ;
 6661   struct device *dev ;
 6662   int class_flag ;
 6663   struct fb_tile_ops *tileops ;
 6664   char *screen_base ;
 6665   unsigned long screen_size ;
 6666   void *pseudo_palette ;
 6667   u32 state ;
 6668   void *fbcon_par ;
 6669   void *par ;
 6670   struct apertures_struct *apertures ;
 6671};
 6672#line 1146 "include/linux/fb.h"
 6673struct fb_videomode {
 6674   char    *name ;
 6675   u32 refresh ;
 6676   u32 xres ;
 6677   u32 yres ;
 6678   u32 pixclock ;
 6679   u32 left_margin ;
 6680   u32 right_margin ;
 6681   u32 upper_margin ;
 6682   u32 lower_margin ;
 6683   u32 hsync_len ;
 6684   u32 vsync_len ;
 6685   u32 sync ;
 6686   u32 vmode ;
 6687   u32 flag ;
 6688};
 6689#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
 6690struct __anonstruct_dirty_429 {
 6691   spinlock_t lock ;
 6692   bool active ;
 6693   unsigned int x1 ;
 6694   unsigned int y1 ;
 6695   unsigned int x2 ;
 6696   unsigned int y2 ;
 6697};
 6698#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
 6699struct vmw_fb_par {
 6700   struct vmw_private *vmw_priv ;
 6701   void *vmalloc ;
 6702   struct vmw_dma_buffer *vmw_bo ;
 6703   struct ttm_bo_kmap_obj map ;
 6704   u32 pseudo_palette[17] ;
 6705   unsigned int depth ;
 6706   unsigned int bpp ;
 6707   unsigned int max_width ;
 6708   unsigned int max_height ;
 6709   void *bo_ptr ;
 6710   unsigned int bo_size ;
 6711   bool bo_iowrite ;
 6712   struct __anonstruct_dirty_429 dirty ;
 6713};
 6714#line 217 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
 6715struct __anonstruct_cmd_430___0 {
 6716   uint32_t header ;
 6717   SVGAFifoCmdUpdate body ;
 6718};
 6719#line 290 "include/linux/timer.h"
 6720enum hrtimer_restart;
 6721#line 24 "include/linux/sysfs.h"
 6722enum kobj_ns_type;
 6723#line 83 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6724typedef enum SVGA3dSurfaceFormat SVGA3dSurfaceFormat;
 6725#line 1131 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6726struct __anonstruct_SVGA3dSize_87 {
 6727   uint32 width ;
 6728   uint32 height ;
 6729   uint32 depth ;
 6730};
 6731#line 1131 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6732typedef struct __anonstruct_SVGA3dSize_87 SVGA3dSize;
 6733#line 1138
 6734enum __anonenum_SVGA3dSurfaceFlags_88 {
 6735    SVGA3D_SURFACE_CUBEMAP = 1,
 6736    SVGA3D_SURFACE_HINT_STATIC = 2,
 6737    SVGA3D_SURFACE_HINT_DYNAMIC = 4,
 6738    SVGA3D_SURFACE_HINT_INDEXBUFFER = 8,
 6739    SVGA3D_SURFACE_HINT_VERTEXBUFFER = 16,
 6740    SVGA3D_SURFACE_HINT_TEXTURE = 32,
 6741    SVGA3D_SURFACE_HINT_RENDERTARGET = 64,
 6742    SVGA3D_SURFACE_HINT_DEPTHSTENCIL = 128,
 6743    SVGA3D_SURFACE_HINT_WRITEONLY = 256,
 6744    SVGA3D_SURFACE_MASKABLE_ANTIALIAS = 512,
 6745    SVGA3D_SURFACE_AUTOGENMIPMAPS = 1024
 6746} ;
 6747#line 1138 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6748typedef enum __anonenum_SVGA3dSurfaceFlags_88 SVGA3dSurfaceFlags;
 6749#line 1152 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6750struct __anonstruct_SVGA3dSurfaceFace_89 {
 6751   uint32 numMipLevels ;
 6752};
 6753#line 1152 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6754typedef struct __anonstruct_SVGA3dSurfaceFace_89 SVGA3dSurfaceFace;
 6755#line 1157 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6756struct __anonstruct_SVGA3dCmdDefineSurface_90 {
 6757   uint32 sid ;
 6758   SVGA3dSurfaceFlags surfaceFlags ;
 6759   SVGA3dSurfaceFormat format ;
 6760   SVGA3dSurfaceFace face[6] ;
 6761};
 6762#line 1157 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6763typedef struct __anonstruct_SVGA3dCmdDefineSurface_90 SVGA3dCmdDefineSurface;
 6764#line 1205 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6765struct __anonstruct_SVGA3dCmdDestroySurface_92 {
 6766   uint32 sid ;
 6767};
 6768#line 1205 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6769typedef struct __anonstruct_SVGA3dCmdDestroySurface_92 SVGA3dCmdDestroySurface;
 6770#line 1210 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6771struct __anonstruct_SVGA3dCmdDefineContext_93 {
 6772   uint32 cid ;
 6773};
 6774#line 1210 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6775typedef struct __anonstruct_SVGA3dCmdDefineContext_93 SVGA3dCmdDefineContext;
 6776#line 1215 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6777struct __anonstruct_SVGA3dCmdDestroyContext_94 {
 6778   uint32 cid ;
 6779};
 6780#line 1215 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6781typedef struct __anonstruct_SVGA3dCmdDestroyContext_94 SVGA3dCmdDestroyContext;
 6782#line 1340 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6783struct __anonstruct_SVGA3dSurfaceDMAFlags_107 {
 6784   uint32 discard : 1 ;
 6785   uint32 unsynchronized : 1 ;
 6786   uint32 reserved : 30 ;
 6787};
 6788#line 1340 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6789typedef struct __anonstruct_SVGA3dSurfaceDMAFlags_107 SVGA3dSurfaceDMAFlags;
 6790#line 1390 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6791struct __anonstruct_SVGA3dCmdSurfaceDMASuffix_109 {
 6792   uint32 suffixSize ;
 6793   uint32 maximumOffset ;
 6794   SVGA3dSurfaceDMAFlags flags ;
 6795};
 6796#line 1390 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga3d_reg.h"
 6797typedef struct __anonstruct_SVGA3dCmdSurfaceDMASuffix_109 SVGA3dCmdSurfaceDMASuffix;
 6798#line 290 "include/linux/timer.h"
 6799enum hrtimer_restart;
 6800#line 24 "include/linux/sysfs.h"
 6801enum kobj_ns_type;
 6802#line 34 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6803struct vmw_user_context {
 6804   struct ttm_base_object base ;
 6805   struct vmw_resource res ;
 6806};
 6807#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6808struct vmw_user_surface {
 6809   struct ttm_base_object base ;
 6810   struct vmw_surface srf ;
 6811   uint32_t size ;
 6812};
 6813#line 45 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6814struct vmw_user_dma_buffer {
 6815   struct ttm_base_object base ;
 6816   struct vmw_dma_buffer dma ;
 6817};
 6818#line 55 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6819struct vmw_stream {
 6820   struct vmw_resource res ;
 6821   uint32_t stream_id ;
 6822};
 6823#line 60 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6824struct vmw_user_stream {
 6825   struct ttm_base_object base ;
 6826   struct vmw_stream stream ;
 6827};
 6828#line 65 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6829struct vmw_surface_offset {
 6830   uint32_t face ;
 6831   uint32_t mip ;
 6832   uint32_t bo_offset ;
 6833};
 6834#line 260 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6835struct __anonstruct_cmd_429___1 {
 6836   SVGA3dCmdHeader header ;
 6837   SVGA3dCmdDestroyContext body ;
 6838};
 6839#line 289 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6840struct __anonstruct_cmd_430___1 {
 6841   SVGA3dCmdHeader header ;
 6842   SVGA3dCmdDefineContext body ;
 6843};
 6844#line 503 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6845struct vmw_bpp {
 6846   uint8_t bpp ;
 6847   uint8_t s_bpp ;
 6848};
 6849#line 579 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6850struct vmw_surface_dma {
 6851   SVGA3dCmdHeader header ;
 6852   SVGA3dCmdSurfaceDMA body ;
 6853   SVGA3dCopyBox cb ;
 6854   SVGA3dCmdSurfaceDMASuffix suffix ;
 6855};
 6856#line 586 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6857struct vmw_surface_define {
 6858   SVGA3dCmdHeader header ;
 6859   SVGA3dCmdDefineSurface body ;
 6860};
 6861#line 591 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
 6862struct vmw_surface_destroy {
 6863   SVGA3dCmdHeader header ;
 6864   SVGA3dCmdDestroySurface body ;
 6865};
 6866#line 290 "include/linux/timer.h"
 6867enum hrtimer_restart;
 6868#line 24 "include/linux/sysfs.h"
 6869enum kobj_ns_type;
 6870#line 144 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
 6871struct vmw_ttm_tt {
 6872   struct ttm_tt ttm ;
 6873   struct vmw_private *dev_priv ;
 6874   int gmr_id ;
 6875};
 6876#line 46 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h"
 6877struct svga_fifo_cmd_fence {
 6878   __le32 fence ;
 6879};
 6880#line 27 "include/linux/wait.h"
 6881struct __wait_queue;
 6882#line 27 "include/linux/wait.h"
 6883typedef struct __wait_queue wait_queue_t;
 6884#line 31 "include/linux/wait.h"
 6885struct __wait_queue {
 6886   unsigned int flags ;
 6887   void *private ;
 6888   int (*func)(wait_queue_t *wait , unsigned int mode , int flags , void *key ) ;
 6889   struct list_head task_list ;
 6890};
 6891#line 290 "include/linux/timer.h"
 6892enum hrtimer_restart;
 6893#line 24 "include/linux/sysfs.h"
 6894enum kobj_ns_type;
 6895#line 540 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
 6896struct __anonstruct_cmd_429___2 {
 6897   SVGA3dCmdHeader header ;
 6898   SVGA3dCmdWaitForQuery body ;
 6899};
 6900#line 290 "include/linux/timer.h"
 6901enum hrtimer_restart;
 6902#line 24 "include/linux/sysfs.h"
 6903enum kobj_ns_type;
 6904#line 290 "include/linux/timer.h"
 6905enum hrtimer_restart;
 6906#line 24 "include/linux/sysfs.h"
 6907enum kobj_ns_type;
 6908#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
 6909struct vmw_legacy_display {
 6910   struct list_head active ;
 6911   unsigned int num_active ;
 6912   unsigned int last_num_active ;
 6913   struct vmw_framebuffer *fb ;
 6914};
 6915#line 51 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
 6916struct vmw_legacy_display_unit {
 6917   struct vmw_display_unit base ;
 6918   struct list_head active ;
 6919};
 6920#line 290 "include/linux/timer.h"
 6921enum hrtimer_restart;
 6922#line 24 "include/linux/sysfs.h"
 6923enum kobj_ns_type;
 6924#line 290 "include/linux/timer.h"
 6925enum hrtimer_restart;
 6926#line 24 "include/linux/sysfs.h"
 6927enum kobj_ns_type;
 6928#line 1223 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 6929struct SVGAFifoCmdEscape {
 6930   uint32 nsid ;
 6931   uint32 size ;
 6932};
 6933#line 1223 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 6934typedef struct SVGAFifoCmdEscape SVGAFifoCmdEscape;
 6935#line 64 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6936struct __anonstruct_header_430 {
 6937   uint32 cmdType ;
 6938   uint32 streamId ;
 6939};
 6940#line 64 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6941struct __anonstruct_items_431 {
 6942   uint32 registerId ;
 6943   uint32 value ;
 6944};
 6945#line 64 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6946struct SVGAEscapeVideoSetRegs {
 6947   struct __anonstruct_header_430 header ;
 6948   struct __anonstruct_items_431 items[1] ;
 6949};
 6950#line 64 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6951typedef struct SVGAEscapeVideoSetRegs SVGAEscapeVideoSetRegs;
 6952#line 78 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6953struct SVGAEscapeVideoFlush {
 6954   uint32 cmdType ;
 6955   uint32 streamId ;
 6956};
 6957#line 78 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_overlay.h"
 6958typedef struct SVGAEscapeVideoFlush SVGAEscapeVideoFlush;
 6959#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6960struct vmw_stream___0 {
 6961   struct vmw_dma_buffer *buf ;
 6962   bool claimed ;
 6963   bool paused ;
 6964   struct drm_vmw_control_stream_arg saved ;
 6965};
 6966#line 49 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6967struct vmw_overlay {
 6968   struct mutex mutex ;
 6969   struct vmw_stream___0 stream[1] ;
 6970};
 6971#line 63 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6972struct vmw_escape_header {
 6973   uint32_t cmd ;
 6974   SVGAFifoCmdEscape body ;
 6975};
 6976#line 68 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6977struct vmw_escape_video_flush {
 6978   struct vmw_escape_header escape ;
 6979   SVGAEscapeVideoFlush flush ;
 6980};
 6981#line 106 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6982struct __anonstruct_header_441 {
 6983   uint32_t cmdType ;
 6984   uint32_t streamId ;
 6985};
 6986#line 106 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6987struct __anonstruct_cmds_440 {
 6988   struct vmw_escape_header escape ;
 6989   struct __anonstruct_header_441 header ;
 6990};
 6991#line 113 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6992struct __anonstruct_items_442 {
 6993   uint32_t registerId ;
 6994   uint32_t value ;
 6995};
 6996#line 188 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
 6997struct __anonstruct_cmds_443 {
 6998   struct vmw_escape_header escape ;
 6999   SVGAEscapeVideoSetRegs body ;
 7000   struct vmw_escape_video_flush flush ;
 7001};
 7002#line 290 "include/linux/timer.h"
 7003enum hrtimer_restart;
 7004#line 24 "include/linux/sysfs.h"
 7005enum kobj_ns_type;
 7006#line 31 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
 7007struct vmw_marker {
 7008   struct list_head head ;
 7009   uint32_t seqno ;
 7010   struct timespec submitted ;
 7011};
 7012#line 290 "include/linux/timer.h"
 7013enum hrtimer_restart;
 7014#line 24 "include/linux/sysfs.h"
 7015enum kobj_ns_type;
 7016#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
 7017struct vmwgfx_gmrid_man {
 7018   spinlock_t lock ;
 7019   struct ida gmr_ida ;
 7020   uint32_t max_gmr_ids ;
 7021   uint32_t max_gmr_pages ;
 7022   uint32_t used_gmr_pages ;
 7023};
 7024#line 290 "include/linux/timer.h"
 7025enum hrtimer_restart;
 7026#line 24 "include/linux/sysfs.h"
 7027enum kobj_ns_type;
 7028#line 676 "include/drm/vmwgfx_drm.h"
 7029struct drm_vmw_event_fence {
 7030   struct drm_event base ;
 7031   uint64_t user_data ;
 7032   uint32_t tv_sec ;
 7033   uint32_t tv_usec ;
 7034};
 7035#line 40 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
 7036enum vmw_action_type {
 7037    VMW_ACTION_EVENT = 0,
 7038    VMW_ACTION_MAX = 1
 7039} ;
 7040#line 45 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
 7041struct vmw_fence_action {
 7042   struct list_head head ;
 7043   enum vmw_action_type type ;
 7044   void (*seq_passed)(struct vmw_fence_action *action ) ;
 7045   void (*cleanup)(struct vmw_fence_action *action ) ;
 7046};
 7047#line 33 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
 7048struct vmw_fence_manager {
 7049   int num_fence_objects ;
 7050   struct vmw_private *dev_priv ;
 7051   spinlock_t lock ;
 7052   struct list_head fence_list ;
 7053   struct work_struct work ;
 7054   u32 user_fence_size ;
 7055   u32 fence_size ;
 7056   u32 event_fence_action_size ;
 7057   bool fifo_down ;
 7058   struct list_head cleanup_list ;
 7059   uint32_t pending_actions[1] ;
 7060   struct mutex goal_irq_mutex ;
 7061   bool goal_irq_on ;
 7062   bool seqno_valid ;
 7063};
 7064#line 51 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
 7065struct vmw_user_fence {
 7066   struct ttm_base_object base ;
 7067   struct vmw_fence_obj fence ;
 7068};
 7069#line 71 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
 7070struct vmw_event_fence_action {
 7071   struct vmw_fence_action action ;
 7072   struct list_head fpriv_head ;
 7073   struct drm_pending_event *event ;
 7074   struct vmw_fence_obj *fence ;
 7075   struct drm_device *dev ;
 7076   uint32_t *tv_sec ;
 7077   uint32_t *tv_usec ;
 7078};
 7079#line 991 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
 7080struct vmw_event_fence_pending {
 7081   struct drm_pending_event base ;
 7082   struct drm_vmw_event_fence event ;
 7083};
 7084#line 290 "include/linux/timer.h"
 7085enum hrtimer_restart;
 7086#line 24 "include/linux/sysfs.h"
 7087enum kobj_ns_type;
 7088#line 290 "include/linux/timer.h"
 7089enum hrtimer_restart;
 7090#line 24 "include/linux/sysfs.h"
 7091enum kobj_ns_type;
 7092#line 327 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7093struct SVGAGuestImage {
 7094   SVGAGuestPtr ptr ;
 7095   uint32 pitch ;
 7096};
 7097#line 327 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7098typedef struct SVGAGuestImage SVGAGuestImage;
 7099#line 967 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7100struct __anonstruct_size_288 {
 7101   uint32 width ;
 7102   uint32 height ;
 7103};
 7104#line 967 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7105struct __anonstruct_root_289 {
 7106   int32 x ;
 7107   int32 y ;
 7108};
 7109#line 967 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7110struct SVGAScreenObject {
 7111   uint32 structSize ;
 7112   uint32 id ;
 7113   uint32 flags ;
 7114   struct __anonstruct_size_288 size ;
 7115   struct __anonstruct_root_289 root ;
 7116   SVGAGuestImage backingStore ;
 7117   uint32 cloneCount ;
 7118};
 7119#line 967 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7120typedef struct SVGAScreenObject SVGAScreenObject;
 7121#line 1273 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7122struct __anonstruct_SVGAFifoCmdDestroyScreen_293 {
 7123   uint32 screenId ;
 7124};
 7125#line 1273 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/svga_reg.h"
 7126typedef struct __anonstruct_SVGAFifoCmdDestroyScreen_293 SVGAFifoCmdDestroyScreen;
 7127#line 39 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7128struct vmw_screen_object_display {
 7129   unsigned int num_implicit ;
 7130   struct vmw_framebuffer *implicit_fb ;
 7131};
 7132#line 48 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7133struct vmw_screen_object_unit {
 7134   struct vmw_display_unit base ;
 7135   unsigned long buffer_size ;
 7136   struct vmw_dma_buffer *buffer ;
 7137   bool defined ;
 7138   bool active_implicit ;
 7139};
 7140#line 111 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7141struct __anonstruct_header_430___0 {
 7142   uint32_t cmdType ;
 7143};
 7144#line 111 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7145struct __anonstruct_cmd_429___3 {
 7146   struct __anonstruct_header_430___0 header ;
 7147   SVGAScreenObject obj ;
 7148};
 7149#line 164 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7150struct __anonstruct_header_432 {
 7151   uint32_t cmdType ;
 7152};
 7153#line 164 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
 7154struct __anonstruct_cmd_431___0 {
 7155   struct __anonstruct_header_432 header ;
 7156   SVGAFifoCmdDestroyScreen body ;
 7157};
 7158#line 1 "<compiler builtins>"
 7159
 7160#line 1
 7161
 7162#line 1
 7163long __builtin_expect(long val , long res ) ;
 7164#line 100 "include/linux/printk.h"
 7165extern int ( /* format attribute */  printk)(char    *fmt  , ...) ;
 7166#line 147 "include/linux/kernel.h"
 7167extern void __might_sleep(char    *file , int line , int preempt_offset ) ;
 7168#line 194
 7169__inline static void might_fault(void)  __attribute__((__no_instrument_function__)) ;
 7170#line 194 "include/linux/kernel.h"
 7171__inline static void might_fault(void) 
 7172{ 
 7173
 7174  {
 7175  {
 7176#line 196
 7177  while (1) {
 7178    while_continue: /* CIL Label */ ;
 7179    {
 7180#line 196
 7181    __might_sleep("include/linux/kernel.h", 196, 0);
 7182    }
 7183    {
 7184#line 196
 7185    while (1) {
 7186      while_continue___0: /* CIL Label */ ;
 7187#line 196
 7188      goto while_break___0;
 7189    }
 7190    while_break___0: /* CIL Label */ ;
 7191    }
 7192#line 196
 7193    goto while_break;
 7194  }
 7195  while_break: /* CIL Label */ ;
 7196  }
 7197#line 197
 7198  return;
 7199}
 7200}
 7201#line 24 "include/linux/list.h"
 7202__inline static void INIT_LIST_HEAD(struct list_head *list )  __attribute__((__no_instrument_function__)) ;
 7203#line 24 "include/linux/list.h"
 7204__inline static void INIT_LIST_HEAD(struct list_head *list ) 
 7205{ unsigned long __cil_tmp2 ;
 7206  unsigned long __cil_tmp3 ;
 7207
 7208  {
 7209#line 26
 7210  *((struct list_head **)list) = list;
 7211#line 27
 7212  __cil_tmp2 = (unsigned long )list;
 7213#line 27
 7214  __cil_tmp3 = __cil_tmp2 + 8;
 7215#line 27
 7216  *((struct list_head **)__cil_tmp3) = list;
 7217#line 28
 7218  return;
 7219}
 7220}
 7221#line 47
 7222extern void __list_add(struct list_head *new , struct list_head *prev , struct list_head *next ) ;
 7223#line 74
 7224__inline static void list_add_tail(struct list_head *new , struct list_head *head )  __attribute__((__no_instrument_function__)) ;
 7225#line 74 "include/linux/list.h"
 7226__inline static void list_add_tail(struct list_head *new , struct list_head *head ) 
 7227{ unsigned long __cil_tmp3 ;
 7228  unsigned long __cil_tmp4 ;
 7229  struct list_head *__cil_tmp5 ;
 7230
 7231  {
 7232  {
 7233#line 76
 7234  __cil_tmp3 = (unsigned long )head;
 7235#line 76
 7236  __cil_tmp4 = __cil_tmp3 + 8;
 7237#line 76
 7238  __cil_tmp5 = *((struct list_head **)__cil_tmp4);
 7239#line 76
 7240  __list_add(new, __cil_tmp5, head);
 7241  }
 7242#line 77
 7243  return;
 7244}
 7245}
 7246#line 111
 7247extern void __list_del_entry(struct list_head *entry ) ;
 7248#line 112
 7249extern void list_del(struct list_head *entry ) ;
 7250#line 142
 7251__inline static void list_del_init(struct list_head *entry )  __attribute__((__no_instrument_function__)) ;
 7252#line 142 "include/linux/list.h"
 7253__inline static void list_del_init(struct list_head *entry ) 
 7254{ 
 7255
 7256  {
 7257  {
 7258#line 144
 7259  __list_del_entry(entry);
 7260#line 145
 7261  INIT_LIST_HEAD(entry);
 7262  }
 7263#line 146
 7264  return;
 7265}
 7266}
 7267#line 186
 7268__inline static int list_empty(struct list_head    *head )  __attribute__((__no_instrument_function__)) ;
 7269#line 186 "include/linux/list.h"
 7270__inline static int list_empty(struct list_head    *head ) 
 7271{ unsigned long __cil_tmp2 ;
 7272  struct list_head *   __cil_tmp3 ;
 7273  unsigned long __cil_tmp4 ;
 7274
 7275  {
 7276  {
 7277#line 188
 7278  __cil_tmp2 = (unsigned long )head;
 7279#line 188
 7280  __cil_tmp3 = *((struct list_head *   *)head);
 7281#line 188
 7282  __cil_tmp4 = (unsigned long )__cil_tmp3;
 7283#line 188
 7284  return (__cil_tmp4 == __cil_tmp2);
 7285  }
 7286}
 7287}
 7288#line 55 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/string_64.h"
 7289extern void *memset(void *s , int c , size_t n ) ;
 7290#line 64 "include/asm-generic/bug.h"
 7291extern void ( /* format attribute */  warn_slowpath_fmt)(char    *file , int    line ,
 7292                                                         char    *fmt  , ...) ;
 7293#line 70
 7294extern void warn_slowpath_null(char    *file , int    line ) ;
 7295#line 23 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
 7296__inline static int atomic_read(atomic_t    *v )  __attribute__((__no_instrument_function__)) ;
 7297#line 23 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
 7298__inline static int atomic_read(atomic_t    *v ) 
 7299{ int    *__cil_tmp2 ;
 7300  int volatile   *__cil_tmp3 ;
 7301  int volatile   __cil_tmp4 ;
 7302
 7303  {
 7304  {
 7305#line 25
 7306  __cil_tmp2 = (int    *)v;
 7307#line 25
 7308  __cil_tmp3 = (int volatile   *)__cil_tmp2;
 7309#line 25
 7310  __cil_tmp4 = *__cil_tmp3;
 7311#line 25
 7312  return ((int )__cil_tmp4);
 7313  }
 7314}
 7315}
 7316#line 93
 7317__inline static void atomic_inc(atomic_t *v )  __attribute__((__no_instrument_function__)) ;
 7318#line 93 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
 7319__inline static void atomic_inc(atomic_t *v ) 
 7320{ 
 7321
 7322  {
 7323#line 95
 7324  __asm__  volatile   (".section .smp_locks,\"a\"\n"
 7325                       ".balign 4\n"
 7326                       ".long 671f - .\n"
 7327                       ".previous\n"
 7328                       "671:"
 7329                       "\n\tlock; "
 7330                       "incl %0": "+m" (*((int *)v)));
 7331#line 97
 7332  return;
 7333}
 7334}
 7335#line 152 "include/linux/mutex.h"
 7336void mutex_lock(struct mutex *lock ) ;
 7337#line 153
 7338int __attribute__((__warn_unused_result__))  mutex_lock_interruptible(struct mutex *lock ) ;
 7339#line 154
 7340int __attribute__((__warn_unused_result__))  mutex_lock_killable(struct mutex *lock ) ;
 7341#line 168
 7342int mutex_trylock(struct mutex *lock ) ;
 7343#line 169
 7344void mutex_unlock(struct mutex *lock ) ;
 7345#line 170
 7346int atomic_dec_and_mutex_lock(atomic_t *cnt , struct mutex *lock ) ;
 7347#line 548 "include/linux/capability.h"
 7348extern bool capable(int cap ) ;
 7349#line 54 "include/linux/vmalloc.h"
 7350extern void *vmalloc(unsigned long size ) ;
 7351#line 66
 7352extern void vfree(void    *addr ) ;
 7353#line 39 "include/linux/kref.h"
 7354__inline static void kref_get(struct kref *kref )  __attribute__((__no_instrument_function__)) ;
 7355#line 39 "include/linux/kref.h"
 7356__inline static void kref_get(struct kref *kref ) 
 7357{ int __ret_warn_on ;
 7358  int tmp ;
 7359  int tmp___0 ;
 7360  long tmp___1 ;
 7361  atomic_t *__cil_tmp6 ;
 7362  atomic_t    *__cil_tmp7 ;
 7363  int __cil_tmp8 ;
 7364  int __cil_tmp9 ;
 7365  long __cil_tmp10 ;
 7366  int    __cil_tmp11 ;
 7367  int __cil_tmp12 ;
 7368  int __cil_tmp13 ;
 7369  long __cil_tmp14 ;
 7370  atomic_t *__cil_tmp15 ;
 7371
 7372  {
 7373  {
 7374#line 41
 7375  __cil_tmp6 = (atomic_t *)kref;
 7376#line 41
 7377  __cil_tmp7 = (atomic_t    *)__cil_tmp6;
 7378#line 41
 7379  tmp = atomic_read(__cil_tmp7);
 7380  }
 7381#line 41
 7382  if (tmp) {
 7383#line 41
 7384    tmp___0 = 0;
 7385  } else {
 7386#line 41
 7387    tmp___0 = 1;
 7388  }
 7389  {
 7390#line 41
 7391  __ret_warn_on = tmp___0;
 7392#line 41
 7393  __cil_tmp8 = ! __ret_warn_on;
 7394#line 41
 7395  __cil_tmp9 = ! __cil_tmp8;
 7396#line 41
 7397  __cil_tmp10 = (long )__cil_tmp9;
 7398#line 41
 7399  tmp___1 = __builtin_expect(__cil_tmp10, 0L);
 7400  }
 7401#line 41
 7402  if (tmp___1) {
 7403    {
 7404#line 41
 7405    __cil_tmp11 = (int    )41;
 7406#line 41
 7407    warn_slowpath_null("include/linux/kref.h", __cil_tmp11);
 7408    }
 7409  } else {
 7410
 7411  }
 7412  {
 7413#line 41
 7414  __cil_tmp12 = ! __ret_warn_on;
 7415#line 41
 7416  __cil_tmp13 = ! __cil_tmp12;
 7417#line 41
 7418  __cil_tmp14 = (long )__cil_tmp13;
 7419#line 41
 7420  __builtin_expect(__cil_tmp14, 0L);
 7421#line 42
 7422  __cil_tmp15 = (atomic_t *)kref;
 7423#line 42
 7424  atomic_inc(__cil_tmp15);
 7425  }
 7426#line 43
 7427  return;
 7428}
 7429}
 7430#line 39 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/uaccess_64.h"
 7431extern unsigned long __attribute__((__warn_unused_result__))  _copy_to_user(void *to ,
 7432                                                                            void    *from ,
 7433                                                                            unsigned int len ) ;
 7434#line 41
 7435extern unsigned long __attribute__((__warn_unused_result__))  _copy_from_user(void *to ,
 7436                                                                              void    *from ,
 7437                                                                              unsigned int len ) ;
 7438#line 46
 7439__inline static unsigned long __attribute__((__warn_unused_result__))  copy_from_user(void *to ,
 7440                                                                                      void    *from ,
 7441                                                                                      unsigned long n )  __attribute__((__no_instrument_function__)) ;
 7442#line 46 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/uaccess_64.h"
 7443__inline static unsigned long __attribute__((__warn_unused_result__))  copy_from_user(void *to ,
 7444                                                                                      void    *from ,
 7445                                                                                      unsigned long n ) 
 7446{ int sz ;
 7447  unsigned long tmp ;
 7448  int __ret_warn_on ;
 7449  long tmp___0 ;
 7450  int tmp___1 ;
 7451  long tmp___2 ;
 7452  unsigned long __cil_tmp10 ;
 7453  long __cil_tmp11 ;
 7454  unsigned int __cil_tmp12 ;
 7455  int __cil_tmp13 ;
 7456  int __cil_tmp14 ;
 7457  long __cil_tmp15 ;
 7458  int    __cil_tmp16 ;
 7459  int __cil_tmp17 ;
 7460  int __cil_tmp18 ;
 7461  long __cil_tmp19 ;
 7462
 7463  {
 7464  {
 7465#line 50
 7466  tmp = __builtin_object_size(to, 0);
 7467#line 50
 7468  sz = (int )tmp;
 7469#line 52
 7470  might_fault();
 7471  }
 7472#line 53
 7473  if (sz == -1) {
 7474#line 53
 7475    tmp___1 = 1;
 7476  } else {
 7477    {
 7478#line 53
 7479    __cil_tmp10 = (unsigned long )sz;
 7480#line 53
 7481    if (__cil_tmp10 >= n) {
 7482#line 53
 7483      tmp___1 = 1;
 7484    } else {
 7485#line 53
 7486      tmp___1 = 0;
 7487    }
 7488    }
 7489  }
 7490  {
 7491#line 53
 7492  __cil_tmp11 = (long )tmp___1;
 7493#line 53
 7494  tmp___2 = __builtin_expect(__cil_tmp11, 1L);
 7495  }
 7496#line 53
 7497  if (tmp___2) {
 7498    {
 7499#line 54
 7500    __cil_tmp12 = (unsigned int )n;
 7501#line 54
 7502    n = (unsigned long )_copy_from_user(to, from, __cil_tmp12);
 7503    }
 7504  } else {
 7505    {
 7506#line 57
 7507    __ret_warn_on = 1;
 7508#line 57
 7509    __cil_tmp13 = ! __ret_warn_on;
 7510#line 57
 7511    __cil_tmp14 = ! __cil_tmp13;
 7512#line 57
 7513    __cil_tmp15 = (long )__cil_tmp14;
 7514#line 57
 7515    tmp___0 = __builtin_expect(__cil_tmp15, 0L);
 7516    }
 7517#line 57
 7518    if (tmp___0) {
 7519      {
 7520#line 57
 7521      __cil_tmp16 = (int    )57;
 7522#line 57
 7523      warn_slowpath_fmt("/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/uaccess_64.h",
 7524                        __cil_tmp16, "Buffer overflow detected!\n");
 7525      }
 7526    } else {
 7527
 7528    }
 7529    {
 7530#line 57
 7531    __cil_tmp17 = ! __ret_warn_on;
 7532#line 57
 7533    __cil_tmp18 = ! __cil_tmp17;
 7534#line 57
 7535    __cil_tmp19 = (long )__cil_tmp18;
 7536#line 57
 7537    __builtin_expect(__cil_tmp19, 0L);
 7538    }
 7539  }
 7540#line 59
 7541  return (n);
 7542}
 7543}
 7544#line 62
 7545__inline static int __attribute__((__warn_unused_result__))  ( __attribute__((__always_inline__)) copy_to_user)(void *dst ,
 7546                                                                                                                void    *src ,
 7547                                                                                                                unsigned int size )  __attribute__((__no_instrument_function__)) ;
 7548#line 62 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/uaccess_64.h"
 7549__inline static int __attribute__((__warn_unused_result__))  ( __attribute__((__always_inline__)) copy_to_user)(void *dst ,
 7550                                                                                                                void    *src ,
 7551                                                                                                                unsigned int size ) 
 7552{ unsigned long tmp ;
 7553
 7554  {
 7555  {
 7556#line 65
 7557  might_fault();
 7558#line 67
 7559  tmp = (unsigned long )_copy_to_user(dst, src, size);
 7560  }
 7561#line 67
 7562  return ((int )tmp);
 7563}
 7564}
 7565#line 132 "include/drm/drmP.h"
 7566extern int ( /* format attribute */  drm_err)(char    *func , char    *format 
 7567                                              , ...) ;
 7568#line 310 "include/drm/ttm/ttm_bo_api.h"
 7569__inline static struct ttm_buffer_object *ttm_bo_reference(struct ttm_buffer_object *bo )  __attribute__((__no_instrument_function__)) ;
 7570#line 310 "include/drm/ttm/ttm_bo_api.h"
 7571__inline static struct ttm_buffer_object *ttm_bo_reference(struct ttm_buffer_object *bo ) 
 7572{ unsigned long __cil_tmp2 ;
 7573  unsigned long __cil_tmp3 ;
 7574  struct kref *__cil_tmp4 ;
 7575
 7576  {
 7577  {
 7578#line 313
 7579  __cil_tmp2 = (unsigned long )bo;
 7580#line 313
 7581  __cil_tmp3 = __cil_tmp2 + 64;
 7582#line 313
 7583  __cil_tmp4 = (struct kref *)__cil_tmp3;
 7584#line 313
 7585  kref_get(__cil_tmp4);
 7586  }
 7587#line 314
 7588  return (bo);
 7589}
 7590}
 7591#line 350
 7592extern int ttm_bo_validate(struct ttm_buffer_object *bo , struct ttm_placement *placement ,
 7593                           bool interruptible , bool no_wait_reserve , bool no_wait_gpu ) ;
 7594#line 362
 7595extern void ttm_bo_unref(struct ttm_buffer_object **bo ) ;
 7596#line 216 "include/drm/ttm/ttm_object.h"
 7597extern int ttm_ref_object_base_unref(struct ttm_object_file *tfile , unsigned long key ,
 7598                                     enum ttm_ref_type ref_type ) ;
 7599#line 96 "include/drm/ttm/ttm_lock.h"
 7600extern void ttm_read_unlock(struct ttm_lock *lock ) ;
 7601#line 108
 7602extern int ttm_read_lock(struct ttm_lock *lock , bool interruptible ) ;
 7603#line 69 "include/drm/ttm/ttm_execbuf_util.h"
 7604extern void ttm_eu_backoff_reservation(struct list_head *list ) ;
 7605#line 96
 7606extern int ttm_eu_reserve_buffers(struct list_head *list ) ;
 7607#line 110
 7608extern void ttm_eu_fence_buffer_objects(struct list_head *list , void *sync_obj ) ;
 7609#line 70 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
 7610void vmw_fence_obj_unreference(struct vmw_fence_obj **fence_p ) ;
 7611#line 80
 7612int vmw_fence_obj_wait(struct vmw_fence_obj *fence , uint32_t flags , bool lazy ,
 7613                       bool interruptible , unsigned long timeout ) ;
 7614#line 86
 7615int vmw_fence_create(struct vmw_fence_manager *fman , uint32_t seqno , uint32_t mask ,
 7616                     struct vmw_fence_obj **p_fence ) ;
 7617#line 91
 7618int vmw_user_fence_create(struct drm_file *file_priv , struct vmw_fence_manager *fman ,
 7619                          uint32_t seqno , uint32_t mask , struct vmw_fence_obj **p_fence ,
 7620                          uint32_t *p_handle ) ;
 7621#line 336 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7622__inline static struct vmw_private *vmw_priv(struct drm_device *dev )  __attribute__((__no_instrument_function__)) ;
 7623#line 336 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7624__inline static struct vmw_private *vmw_priv(struct drm_device *dev ) 
 7625{ unsigned long __cil_tmp2 ;
 7626  unsigned long __cil_tmp3 ;
 7627  void *__cil_tmp4 ;
 7628
 7629  {
 7630  {
 7631#line 338
 7632  __cil_tmp2 = (unsigned long )dev;
 7633#line 338
 7634  __cil_tmp3 = __cil_tmp2 + 1064;
 7635#line 338
 7636  __cil_tmp4 = *((void **)__cil_tmp3);
 7637#line 338
 7638  return ((struct vmw_private *)__cil_tmp4);
 7639  }
 7640}
 7641}
 7642#line 341
 7643__inline static struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv )  __attribute__((__no_instrument_function__)) ;
 7644#line 341 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7645__inline static struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv ) 
 7646{ unsigned long __cil_tmp2 ;
 7647  unsigned long __cil_tmp3 ;
 7648  void *__cil_tmp4 ;
 7649
 7650  {
 7651  {
 7652#line 343
 7653  __cil_tmp2 = (unsigned long )file_priv;
 7654#line 343
 7655  __cil_tmp3 = __cil_tmp2 + 136;
 7656#line 343
 7657  __cil_tmp4 = *((void **)__cil_tmp3);
 7658#line 343
 7659  return ((struct vmw_fpriv *)__cil_tmp4);
 7660  }
 7661}
 7662}
 7663#line 346
 7664__inline static struct vmw_master *vmw_master(struct drm_master *master )  __attribute__((__no_instrument_function__)) ;
 7665#line 346 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7666__inline static struct vmw_master *vmw_master(struct drm_master *master ) 
 7667{ unsigned long __cil_tmp2 ;
 7668  unsigned long __cil_tmp3 ;
 7669  void *__cil_tmp4 ;
 7670
 7671  {
 7672  {
 7673#line 348
 7674  __cil_tmp2 = (unsigned long )master;
 7675#line 348
 7676  __cil_tmp3 = __cil_tmp2 + 192;
 7677#line 348
 7678  __cil_tmp4 = *((void **)__cil_tmp3);
 7679#line 348
 7680  return ((struct vmw_master *)__cil_tmp4);
 7681  }
 7682}
 7683}
 7684#line 386
 7685void vmw_resource_unreference(struct vmw_resource **p_res ) ;
 7686#line 392
 7687int vmw_context_check(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
 7688                      int id , struct vmw_resource **p_res ) ;
 7689#line 405
 7690int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
 7691                                   uint32_t handle , struct vmw_surface **out ) ;
 7692#line 418
 7693int vmw_surface_validate(struct vmw_private *dev_priv , struct vmw_surface *srf ) ;
 7694#line 430
 7695uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo , uint32_t cur_validate_node ) ;
 7696#line 432
 7697void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo ) ;
 7698#line 433
 7699int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile , uint32_t handle , struct vmw_dma_buffer **out ) ;
 7700#line 443
 7701void vmw_resource_unreserve(struct list_head *list ) ;
 7702#line 466
 7703void vmw_bo_pin(struct ttm_buffer_object *bo , bool pin ) ;
 7704#line 493
 7705void *vmw_fifo_reserve(struct vmw_private *dev_priv , uint32_t bytes ) ;
 7706#line 494
 7707void vmw_fifo_commit(struct vmw_private *dev_priv , uint32_t bytes ) ;
 7708#line 495
 7709int vmw_fifo_send_fence(struct vmw_private *dev_priv , uint32_t *seqno ) ;
 7710#line 500
 7711int vmw_fifo_emit_dummy_query(struct vmw_private *dev_priv , uint32_t cid ) ;
 7712#line 515
 7713struct ttm_placement vmw_vram_placement ;
 7714#line 518
 7715struct ttm_placement vmw_vram_gmr_placement ;
 7716#line 530
 7717int vmw_execbuf_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
 7718#line 532
 7719int vmw_execbuf_process(struct drm_file *file_priv , struct vmw_private *dev_priv ,
 7720                        void *user_commands , void *kernel_commands , uint32_t command_size ,
 7721                        uint64_t throttle_us , struct drm_vmw_fence_rep *user_fence_rep ,
 7722                        struct vmw_fence_obj **out_fence ) ;
 7723#line 542
 7724void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv , bool only_on_cid_match ,
 7725                                   uint32_t cid ) ;
 7726#line 546
 7727int vmw_execbuf_fence_commands(struct drm_file *file_priv , struct vmw_private *dev_priv ,
 7728                               struct vmw_fence_obj **p_fence , uint32_t *p_handle ) ;
 7729#line 550
 7730void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv , struct vmw_fpriv *vmw_fp ,
 7731                                 int ret , struct drm_vmw_fence_rep *user_fence_rep ,
 7732                                 struct vmw_fence_obj *fence , uint32_t fence_handle ) ;
 7733#line 571
 7734int vmw_fallback_wait(struct vmw_private *dev_priv , bool lazy , bool fifo_idle ,
 7735                      uint32_t seqno , bool interruptible , unsigned long timeout ) ;
 7736#line 577
 7737void vmw_update_seqno(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo_state ) ;
 7738#line 595
 7739int vmw_wait_lag(struct vmw_private *dev_priv , struct vmw_marker_queue *queue , uint32_t us ) ;
 7740#line 617
 7741void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv ) ;
 7742#line 618
 7743void vmw_kms_cursor_snoop(struct vmw_surface *srf , struct ttm_object_file *tfile ,
 7744                          struct ttm_buffer_object *bo , SVGA3dCmdHeader *header ) ;
 7745#line 674
 7746__inline static void vmw_surface_unreference(struct vmw_surface **srf )  __attribute__((__no_instrument_function__)) ;
 7747#line 674 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7748__inline static void vmw_surface_unreference(struct vmw_surface **srf ) 
 7749{ struct vmw_surface *tmp_srf ;
 7750  struct vmw_resource *res ;
 7751  struct vmw_resource **__cil_tmp4 ;
 7752  void *__cil_tmp5 ;
 7753
 7754  {
 7755  {
 7756#line 676
 7757  tmp_srf = *srf;
 7758#line 677
 7759  __cil_tmp4 = & res;
 7760#line 677
 7761  *__cil_tmp4 = (struct vmw_resource *)tmp_srf;
 7762#line 678
 7763  __cil_tmp5 = (void *)0;
 7764#line 678
 7765  *srf = (struct vmw_surface *)__cil_tmp5;
 7766#line 680
 7767  vmw_resource_unreference(& res);
 7768  }
 7769#line 681
 7770  return;
 7771}
 7772}
 7773#line 689
 7774__inline static void vmw_dmabuf_unreference(struct vmw_dma_buffer **buf )  __attribute__((__no_instrument_function__)) ;
 7775#line 689 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
 7776__inline static void vmw_dmabuf_unreference(struct vmw_dma_buffer **buf ) 
 7777{ struct vmw_dma_buffer *tmp_buf ;
 7778  struct ttm_buffer_object *bo ;
 7779  struct ttm_buffer_object **__cil_tmp4 ;
 7780  void *__cil_tmp5 ;
 7781
 7782  {
 7783  {
 7784#line 691
 7785  tmp_buf = *buf;
 7786#line 692
 7787  __cil_tmp4 = & bo;
 7788#line 692
 7789  *__cil_tmp4 = (struct ttm_buffer_object *)tmp_buf;
 7790#line 693
 7791  __cil_tmp5 = (void *)0;
 7792#line 693
 7793  *buf = (struct vmw_dma_buffer *)__cil_tmp5;
 7794#line 695
 7795  ttm_bo_unref(& bo);
 7796  }
 7797#line 696
 7798  return;
 7799}
 7800}
 7801#line 33 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 7802static int vmw_cmd_invalid(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 7803                           SVGA3dCmdHeader *header ) 
 7804{ int tmp___8 ;
 7805  bool tmp___9 ;
 7806
 7807  {
 7808  {
 7809#line 37
 7810  tmp___9 = capable(21);
 7811#line 37
 7812  tmp___8 = (int )tmp___9;
 7813  }
 7814#line 37
 7815  if (tmp___8) {
 7816
 7817  } else {
 7818#line 37
 7819    tmp___8 = -22;
 7820  }
 7821#line 37
 7822  return (tmp___8);
 7823}
 7824}
 7825#line 40 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 7826static int vmw_cmd_ok(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 7827                      SVGA3dCmdHeader *header ) 
 7828{ 
 7829
 7830  {
 7831#line 44
 7832  return (0);
 7833}
 7834}
 7835#line 47 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 7836static void vmw_resource_to_validate_list(struct vmw_sw_context *sw_context , struct vmw_resource **p_res ) 
 7837{ struct vmw_resource *res ;
 7838  int tmp___7 ;
 7839  unsigned long __cil_tmp5 ;
 7840  unsigned long __cil_tmp6 ;
 7841  struct list_head *__cil_tmp7 ;
 7842  struct list_head    *__cil_tmp8 ;
 7843  unsigned long __cil_tmp9 ;
 7844  unsigned long __cil_tmp10 ;
 7845  struct list_head *__cil_tmp11 ;
 7846  unsigned long __cil_tmp12 ;
 7847  unsigned long __cil_tmp13 ;
 7848  struct list_head *__cil_tmp14 ;
 7849  void *__cil_tmp15 ;
 7850
 7851  {
 7852  {
 7853#line 50
 7854  res = *p_res;
 7855#line 52
 7856  __cil_tmp5 = (unsigned long )res;
 7857#line 52
 7858  __cil_tmp6 = __cil_tmp5 + 64;
 7859#line 52
 7860  __cil_tmp7 = (struct list_head *)__cil_tmp6;
 7861#line 52
 7862  __cil_tmp8 = (struct list_head    *)__cil_tmp7;
 7863#line 52
 7864  tmp___7 = list_empty(__cil_tmp8);
 7865  }
 7866#line 52
 7867  if (tmp___7) {
 7868    {
 7869#line 53
 7870    __cil_tmp9 = (unsigned long )res;
 7871#line 53
 7872    __cil_tmp10 = __cil_tmp9 + 64;
 7873#line 53
 7874    __cil_tmp11 = (struct list_head *)__cil_tmp10;
 7875#line 53
 7876    __cil_tmp12 = (unsigned long )sw_context;
 7877#line 53
 7878    __cil_tmp13 = __cil_tmp12 + 131216;
 7879#line 53
 7880    __cil_tmp14 = (struct list_head *)__cil_tmp13;
 7881#line 53
 7882    list_add_tail(__cil_tmp11, __cil_tmp14);
 7883#line 54
 7884    __cil_tmp15 = (void *)0;
 7885#line 54
 7886    *p_res = (struct vmw_resource *)__cil_tmp15;
 7887    }
 7888  } else {
 7889    {
 7890#line 56
 7891    vmw_resource_unreference(p_res);
 7892    }
 7893  }
 7894#line 57
 7895  return;
 7896}
 7897}
 7898#line 72 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 7899static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context , struct ttm_buffer_object *bo ,
 7900                                   uint32_t fence_flags , uint32_t *p_val_node ) 
 7901{ uint32_t val_node ;
 7902  struct ttm_validate_buffer *val_buf ;
 7903  long tmp___7 ;
 7904  long tmp___8 ;
 7905  unsigned long __cil_tmp9 ;
 7906  unsigned long __cil_tmp10 ;
 7907  uint32_t __cil_tmp11 ;
 7908  int __cil_tmp12 ;
 7909  int __cil_tmp13 ;
 7910  int __cil_tmp14 ;
 7911  long __cil_tmp15 ;
 7912  unsigned long __cil_tmp16 ;
 7913  unsigned long __cil_tmp17 ;
 7914  unsigned long __cil_tmp18 ;
 7915  unsigned long __cil_tmp19 ;
 7916  unsigned long __cil_tmp20 ;
 7917  unsigned long __cil_tmp21 ;
 7918  uint32_t __cil_tmp22 ;
 7919  int __cil_tmp23 ;
 7920  int __cil_tmp24 ;
 7921  int __cil_tmp25 ;
 7922  long __cil_tmp26 ;
 7923  unsigned long __cil_tmp27 ;
 7924  unsigned long __cil_tmp28 ;
 7925  unsigned long __cil_tmp29 ;
 7926  unsigned long __cil_tmp30 ;
 7927  struct list_head *__cil_tmp31 ;
 7928  unsigned long __cil_tmp32 ;
 7929  unsigned long __cil_tmp33 ;
 7930  struct list_head *__cil_tmp34 ;
 7931  unsigned long __cil_tmp35 ;
 7932  unsigned long __cil_tmp36 ;
 7933  unsigned long __cil_tmp37 ;
 7934  unsigned long __cil_tmp38 ;
 7935  uint32_t __cil_tmp39 ;
 7936  unsigned long __cil_tmp40 ;
 7937  unsigned long __cil_tmp41 ;
 7938  unsigned long __cil_tmp42 ;
 7939  unsigned long __cil_tmp43 ;
 7940  unsigned long __cil_tmp44 ;
 7941  void *__cil_tmp45 ;
 7942  unsigned long __cil_tmp46 ;
 7943  unsigned long __cil_tmp47 ;
 7944  unsigned long __cil_tmp48 ;
 7945  unsigned long __cil_tmp49 ;
 7946  unsigned long __cil_tmp50 ;
 7947  unsigned long __cil_tmp51 ;
 7948  uint32_t __cil_tmp52 ;
 7949
 7950  {
 7951  {
 7952#line 80
 7953  __cil_tmp9 = (unsigned long )sw_context;
 7954#line 80
 7955  __cil_tmp10 = __cil_tmp9 + 131192;
 7956#line 80
 7957  __cil_tmp11 = *((uint32_t *)__cil_tmp10);
 7958#line 80
 7959  val_node = vmw_dmabuf_validate_node(bo, __cil_tmp11);
 7960#line 82
 7961  __cil_tmp12 = val_node >= 2048U;
 7962#line 82
 7963  __cil_tmp13 = ! __cil_tmp12;
 7964#line 82
 7965  __cil_tmp14 = ! __cil_tmp13;
 7966#line 82
 7967  __cil_tmp15 = (long )__cil_tmp14;
 7968#line 82
 7969  tmp___7 = __builtin_expect(__cil_tmp15, 0L);
 7970  }
 7971#line 82
 7972  if (tmp___7) {
 7973    {
 7974#line 83
 7975    drm_err("vmw_bo_to_validate_list", "Max number of DMA buffers per submission exceeded.\n");
 7976    }
 7977#line 85
 7978    return (-22);
 7979  } else {
 7980
 7981  }
 7982  {
 7983#line 88
 7984  __cil_tmp16 = val_node * 48UL;
 7985#line 88
 7986  __cil_tmp17 = 32888 + __cil_tmp16;
 7987#line 88
 7988  __cil_tmp18 = (unsigned long )sw_context;
 7989#line 88
 7990  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
 7991#line 88
 7992  val_buf = (struct ttm_validate_buffer *)__cil_tmp19;
 7993#line 89
 7994  __cil_tmp20 = (unsigned long )sw_context;
 7995#line 89
 7996  __cil_tmp21 = __cil_tmp20 + 131192;
 7997#line 89
 7998  __cil_tmp22 = *((uint32_t *)__cil_tmp21);
 7999#line 89
 8000  __cil_tmp23 = val_node == __cil_tmp22;
 8001#line 89
 8002  __cil_tmp24 = ! __cil_tmp23;
 8003#line 89
 8004  __cil_tmp25 = ! __cil_tmp24;
 8005#line 89
 8006  __cil_tmp26 = (long )__cil_tmp25;
 8007#line 89
 8008  tmp___8 = __builtin_expect(__cil_tmp26, 0L);
 8009  }
 8010#line 89
 8011  if (tmp___8) {
 8012    {
 8013#line 90
 8014    __cil_tmp27 = (unsigned long )val_buf;
 8015#line 90
 8016    __cil_tmp28 = __cil_tmp27 + 24;
 8017#line 90
 8018    *((void **)__cil_tmp28) = (void *)0;
 8019#line 91
 8020    __cil_tmp29 = (unsigned long )val_buf;
 8021#line 91
 8022    __cil_tmp30 = __cil_tmp29 + 16;
 8023#line 91
 8024    *((struct ttm_buffer_object **)__cil_tmp30) = ttm_bo_reference(bo);
 8025#line 92
 8026    __cil_tmp31 = (struct list_head *)val_buf;
 8027#line 92
 8028    __cil_tmp32 = (unsigned long )sw_context;
 8029#line 92
 8030    __cil_tmp33 = __cil_tmp32 + 96;
 8031#line 92
 8032    __cil_tmp34 = (struct list_head *)__cil_tmp33;
 8033#line 92
 8034    list_add_tail(__cil_tmp31, __cil_tmp34);
 8035#line 93
 8036    __cil_tmp35 = (unsigned long )sw_context;
 8037#line 93
 8038    __cil_tmp36 = __cil_tmp35 + 131192;
 8039#line 93
 8040    __cil_tmp37 = (unsigned long )sw_context;
 8041#line 93
 8042    __cil_tmp38 = __cil_tmp37 + 131192;
 8043#line 93
 8044    __cil_tmp39 = *((uint32_t *)__cil_tmp38);
 8045#line 93
 8046    *((uint32_t *)__cil_tmp36) = __cil_tmp39 + 1U;
 8047    }
 8048  } else {
 8049
 8050  }
 8051#line 96
 8052  __cil_tmp40 = (unsigned long )val_buf;
 8053#line 96
 8054  __cil_tmp41 = __cil_tmp40 + 24;
 8055#line 96
 8056  __cil_tmp42 = (unsigned long )fence_flags;
 8057#line 96
 8058  __cil_tmp43 = (unsigned long )val_buf;
 8059#line 96
 8060  __cil_tmp44 = __cil_tmp43 + 24;
 8061#line 96
 8062  __cil_tmp45 = *((void **)__cil_tmp44);
 8063#line 96
 8064  __cil_tmp46 = (unsigned long )__cil_tmp45;
 8065#line 96
 8066  __cil_tmp47 = __cil_tmp46 | __cil_tmp42;
 8067#line 96
 8068  *((void **)__cil_tmp41) = (void *)__cil_tmp47;
 8069#line 98
 8070  __cil_tmp48 = (unsigned long )sw_context;
 8071#line 98
 8072  __cil_tmp49 = __cil_tmp48 + 131232;
 8073#line 98
 8074  __cil_tmp50 = (unsigned long )sw_context;
 8075#line 98
 8076  __cil_tmp51 = __cil_tmp50 + 131232;
 8077#line 98
 8078  __cil_tmp52 = *((uint32_t *)__cil_tmp51);
 8079#line 98
 8080  *((uint32_t *)__cil_tmp49) = __cil_tmp52 | fence_flags;
 8081#line 100
 8082  if (p_val_node) {
 8083#line 101
 8084    *p_val_node = val_node;
 8085  } else {
 8086
 8087  }
 8088#line 103
 8089  return (0);
 8090}
 8091}
 8092#line 106 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8093static int vmw_cmd_cid_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8094                             SVGA3dCmdHeader *header ) 
 8095{ struct vmw_resource *ctx ;
 8096  struct vmw_cid_cmd *cmd ;
 8097  int ret ;
 8098  SVGA3dCmdHeader    *__mptr ;
 8099  int tmp___7 ;
 8100  long tmp___8 ;
 8101  long tmp___9 ;
 8102  struct vmw_cid_cmd *__cil_tmp11 ;
 8103  SVGA3dCmdHeader *__cil_tmp12 ;
 8104  unsigned int __cil_tmp13 ;
 8105  char *__cil_tmp14 ;
 8106  char *__cil_tmp15 ;
 8107  unsigned long __cil_tmp16 ;
 8108  unsigned long __cil_tmp17 ;
 8109  unsigned long __cil_tmp18 ;
 8110  unsigned long __cil_tmp19 ;
 8111  uint32_t __cil_tmp20 ;
 8112  unsigned long __cil_tmp21 ;
 8113  unsigned long __cil_tmp22 ;
 8114  __le32 __cil_tmp23 ;
 8115  long __cil_tmp24 ;
 8116  unsigned long __cil_tmp25 ;
 8117  unsigned long __cil_tmp26 ;
 8118  struct ttm_object_file *__cil_tmp27 ;
 8119  unsigned long __cil_tmp28 ;
 8120  unsigned long __cil_tmp29 ;
 8121  __le32 __cil_tmp30 ;
 8122  int __cil_tmp31 ;
 8123  int __cil_tmp32 ;
 8124  int __cil_tmp33 ;
 8125  int __cil_tmp34 ;
 8126  long __cil_tmp35 ;
 8127  unsigned long __cil_tmp36 ;
 8128  unsigned long __cil_tmp37 ;
 8129  __le32 __cil_tmp38 ;
 8130  unsigned long __cil_tmp39 ;
 8131  unsigned long __cil_tmp40 ;
 8132  unsigned long __cil_tmp41 ;
 8133  unsigned long __cil_tmp42 ;
 8134  unsigned long __cil_tmp43 ;
 8135  unsigned long __cil_tmp44 ;
 8136  unsigned long __cil_tmp45 ;
 8137  unsigned long __cil_tmp46 ;
 8138  struct vmw_resource **__cil_tmp47 ;
 8139
 8140  {
 8141#line 118
 8142  __mptr = (SVGA3dCmdHeader    *)header;
 8143#line 118
 8144  __cil_tmp11 = (struct vmw_cid_cmd *)0;
 8145#line 118
 8146  __cil_tmp12 = (SVGA3dCmdHeader *)__cil_tmp11;
 8147#line 118
 8148  __cil_tmp13 = (unsigned int )__cil_tmp12;
 8149#line 118
 8150  __cil_tmp14 = (char *)__mptr;
 8151#line 118
 8152  __cil_tmp15 = __cil_tmp14 - __cil_tmp13;
 8153#line 118
 8154  cmd = (struct vmw_cid_cmd *)__cil_tmp15;
 8155  {
 8156#line 119
 8157  __cil_tmp16 = (unsigned long )sw_context;
 8158#line 119
 8159  __cil_tmp17 = __cil_tmp16 + 60;
 8160#line 119
 8161  if (*((bool *)__cil_tmp17)) {
 8162    {
 8163#line 119
 8164    __cil_tmp18 = (unsigned long )sw_context;
 8165#line 119
 8166    __cil_tmp19 = __cil_tmp18 + 56;
 8167#line 119
 8168    __cil_tmp20 = *((uint32_t *)__cil_tmp19);
 8169#line 119
 8170    __cil_tmp21 = (unsigned long )cmd;
 8171#line 119
 8172    __cil_tmp22 = __cil_tmp21 + 8;
 8173#line 119
 8174    __cil_tmp23 = *((__le32 *)__cil_tmp22);
 8175#line 119
 8176    if (__cil_tmp23 == __cil_tmp20) {
 8177#line 119
 8178      tmp___7 = 1;
 8179    } else {
 8180#line 119
 8181      tmp___7 = 0;
 8182    }
 8183    }
 8184  } else {
 8185#line 119
 8186    tmp___7 = 0;
 8187  }
 8188  }
 8189  {
 8190#line 119
 8191  __cil_tmp24 = (long )tmp___7;
 8192#line 119
 8193  tmp___8 = __builtin_expect(__cil_tmp24, 1L);
 8194  }
 8195#line 119
 8196  if (tmp___8) {
 8197#line 120
 8198    return (0);
 8199  } else {
 8200
 8201  }
 8202  {
 8203#line 122
 8204  __cil_tmp25 = (unsigned long )sw_context;
 8205#line 122
 8206  __cil_tmp26 = __cil_tmp25 + 88;
 8207#line 122
 8208  __cil_tmp27 = *((struct ttm_object_file **)__cil_tmp26);
 8209#line 122
 8210  __cil_tmp28 = (unsigned long )cmd;
 8211#line 122
 8212  __cil_tmp29 = __cil_tmp28 + 8;
 8213#line 122
 8214  __cil_tmp30 = *((__le32 *)__cil_tmp29);
 8215#line 122
 8216  __cil_tmp31 = (int )__cil_tmp30;
 8217#line 122
 8218  ret = vmw_context_check(dev_priv, __cil_tmp27, __cil_tmp31, & ctx);
 8219#line 124
 8220  __cil_tmp32 = ret != 0;
 8221#line 124
 8222  __cil_tmp33 = ! __cil_tmp32;
 8223#line 124
 8224  __cil_tmp34 = ! __cil_tmp33;
 8225#line 124
 8226  __cil_tmp35 = (long )__cil_tmp34;
 8227#line 124
 8228  tmp___9 = __builtin_expect(__cil_tmp35, 0L);
 8229  }
 8230#line 124
 8231  if (tmp___9) {
 8232    {
 8233#line 125
 8234    __cil_tmp36 = (unsigned long )cmd;
 8235#line 125
 8236    __cil_tmp37 = __cil_tmp36 + 8;
 8237#line 125
 8238    __cil_tmp38 = *((__le32 *)__cil_tmp37);
 8239#line 125
 8240    drm_err("vmw_cmd_cid_check", "Could not find or use context %u\n", __cil_tmp38);
 8241    }
 8242#line 127
 8243    return (ret);
 8244  } else {
 8245
 8246  }
 8247  {
 8248#line 130
 8249  __cil_tmp39 = (unsigned long )sw_context;
 8250#line 130
 8251  __cil_tmp40 = __cil_tmp39 + 56;
 8252#line 130
 8253  __cil_tmp41 = (unsigned long )cmd;
 8254#line 130
 8255  __cil_tmp42 = __cil_tmp41 + 8;
 8256#line 130
 8257  *((uint32_t *)__cil_tmp40) = *((__le32 *)__cil_tmp42);
 8258#line 131
 8259  __cil_tmp43 = (unsigned long )sw_context;
 8260#line 131
 8261  __cil_tmp44 = __cil_tmp43 + 60;
 8262#line 131
 8263  *((bool *)__cil_tmp44) = (bool )1;
 8264#line 132
 8265  __cil_tmp45 = (unsigned long )sw_context;
 8266#line 132
 8267  __cil_tmp46 = __cil_tmp45 + 64;
 8268#line 132
 8269  __cil_tmp47 = & ctx;
 8270#line 132
 8271  *((struct vmw_resource **)__cil_tmp46) = *__cil_tmp47;
 8272#line 133
 8273  vmw_resource_to_validate_list(sw_context, & ctx);
 8274  }
 8275#line 135
 8276  return (0);
 8277}
 8278}
 8279#line 138 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8280static int vmw_cmd_sid_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8281                             uint32_t *sid ) 
 8282{ struct vmw_surface *srf ;
 8283  int ret ;
 8284  struct vmw_resource *res ;
 8285  int tmp___7 ;
 8286  long tmp___8 ;
 8287  long tmp___9 ;
 8288  long tmp___10 ;
 8289  uint32_t __cil_tmp11 ;
 8290  unsigned long __cil_tmp12 ;
 8291  unsigned long __cil_tmp13 ;
 8292  unsigned long __cil_tmp14 ;
 8293  unsigned long __cil_tmp15 ;
 8294  uint32_t __cil_tmp16 ;
 8295  uint32_t __cil_tmp17 ;
 8296  long __cil_tmp18 ;
 8297  unsigned long __cil_tmp19 ;
 8298  unsigned long __cil_tmp20 ;
 8299  unsigned long __cil_tmp21 ;
 8300  unsigned long __cil_tmp22 ;
 8301  struct ttm_object_file *__cil_tmp23 ;
 8302  uint32_t __cil_tmp24 ;
 8303  int __cil_tmp25 ;
 8304  int __cil_tmp26 ;
 8305  int __cil_tmp27 ;
 8306  long __cil_tmp28 ;
 8307  uint32_t __cil_tmp29 ;
 8308  unsigned long __cil_tmp30 ;
 8309  struct vmw_surface **__cil_tmp31 ;
 8310  struct vmw_surface *__cil_tmp32 ;
 8311  int __cil_tmp33 ;
 8312  int __cil_tmp34 ;
 8313  int __cil_tmp35 ;
 8314  long __cil_tmp36 ;
 8315  unsigned long __cil_tmp37 ;
 8316  unsigned long __cil_tmp38 ;
 8317  unsigned long __cil_tmp39 ;
 8318  unsigned long __cil_tmp40 ;
 8319  unsigned long __cil_tmp41 ;
 8320  unsigned long __cil_tmp42 ;
 8321  unsigned long __cil_tmp43 ;
 8322  struct vmw_surface **__cil_tmp44 ;
 8323  struct vmw_surface *__cil_tmp45 ;
 8324  unsigned long __cil_tmp46 ;
 8325  unsigned long __cil_tmp47 ;
 8326  int __cil_tmp48 ;
 8327  unsigned long __cil_tmp49 ;
 8328  unsigned long __cil_tmp50 ;
 8329  struct vmw_resource **__cil_tmp51 ;
 8330  struct vmw_surface **__cil_tmp52 ;
 8331  struct vmw_surface *__cil_tmp53 ;
 8332
 8333  {
 8334  {
 8335#line 146
 8336  __cil_tmp11 = *sid;
 8337#line 146
 8338  if (__cil_tmp11 == 4294967295U) {
 8339#line 147
 8340    return (0);
 8341  } else {
 8342
 8343  }
 8344  }
 8345  {
 8346#line 149
 8347  __cil_tmp12 = (unsigned long )sw_context;
 8348#line 149
 8349  __cil_tmp13 = __cil_tmp12 + 80;
 8350#line 149
 8351  if (*((bool *)__cil_tmp13)) {
 8352    {
 8353#line 149
 8354    __cil_tmp14 = (unsigned long )sw_context;
 8355#line 149
 8356    __cil_tmp15 = __cil_tmp14 + 72;
 8357#line 149
 8358    __cil_tmp16 = *((uint32_t *)__cil_tmp15);
 8359#line 149
 8360    __cil_tmp17 = *sid;
 8361#line 149
 8362    if (__cil_tmp17 == __cil_tmp16) {
 8363#line 149
 8364      tmp___7 = 1;
 8365    } else {
 8366#line 149
 8367      tmp___7 = 0;
 8368    }
 8369    }
 8370  } else {
 8371#line 149
 8372    tmp___7 = 0;
 8373  }
 8374  }
 8375  {
 8376#line 149
 8377  __cil_tmp18 = (long )tmp___7;
 8378#line 149
 8379  tmp___8 = __builtin_expect(__cil_tmp18, 1L);
 8380  }
 8381#line 149
 8382  if (tmp___8) {
 8383#line 151
 8384    __cil_tmp19 = (unsigned long )sw_context;
 8385#line 151
 8386    __cil_tmp20 = __cil_tmp19 + 76;
 8387#line 151
 8388    *sid = *((uint32_t *)__cil_tmp20);
 8389#line 152
 8390    return (0);
 8391  } else {
 8392
 8393  }
 8394  {
 8395#line 155
 8396  __cil_tmp21 = (unsigned long )sw_context;
 8397#line 155
 8398  __cil_tmp22 = __cil_tmp21 + 88;
 8399#line 155
 8400  __cil_tmp23 = *((struct ttm_object_file **)__cil_tmp22);
 8401#line 155
 8402  __cil_tmp24 = *sid;
 8403#line 155
 8404  ret = vmw_user_surface_lookup_handle(dev_priv, __cil_tmp23, __cil_tmp24, & srf);
 8405#line 158
 8406  __cil_tmp25 = ret != 0;
 8407#line 158
 8408  __cil_tmp26 = ! __cil_tmp25;
 8409#line 158
 8410  __cil_tmp27 = ! __cil_tmp26;
 8411#line 158
 8412  __cil_tmp28 = (long )__cil_tmp27;
 8413#line 158
 8414  tmp___9 = __builtin_expect(__cil_tmp28, 0L);
 8415  }
 8416#line 158
 8417  if (tmp___9) {
 8418    {
 8419#line 159
 8420    __cil_tmp29 = *sid;
 8421#line 159
 8422    __cil_tmp30 = (unsigned long )sid;
 8423#line 159
 8424    drm_err("vmw_cmd_sid_check", "Could ot find or use surface 0x%08x address 0x%08lx\n",
 8425            __cil_tmp29, __cil_tmp30);
 8426    }
 8427#line 163
 8428    return (ret);
 8429  } else {
 8430
 8431  }
 8432  {
 8433#line 166
 8434  __cil_tmp31 = & srf;
 8435#line 166
 8436  __cil_tmp32 = *__cil_tmp31;
 8437#line 166
 8438  ret = vmw_surface_validate(dev_priv, __cil_tmp32);
 8439#line 167
 8440  __cil_tmp33 = ret != 0;
 8441#line 167
 8442  __cil_tmp34 = ! __cil_tmp33;
 8443#line 167
 8444  __cil_tmp35 = ! __cil_tmp34;
 8445#line 167
 8446  __cil_tmp36 = (long )__cil_tmp35;
 8447#line 167
 8448  tmp___10 = __builtin_expect(__cil_tmp36, 0L);
 8449  }
 8450#line 167
 8451  if (tmp___10) {
 8452#line 168
 8453    if (ret != -512) {
 8454      {
 8455#line 169
 8456      drm_err("vmw_cmd_sid_check", "Could not validate surface.\n");
 8457      }
 8458    } else {
 8459
 8460    }
 8461    {
 8462#line 170
 8463    vmw_surface_unreference(& srf);
 8464    }
 8465#line 171
 8466    return (ret);
 8467  } else {
 8468
 8469  }
 8470  {
 8471#line 174
 8472  __cil_tmp37 = (unsigned long )sw_context;
 8473#line 174
 8474  __cil_tmp38 = __cil_tmp37 + 72;
 8475#line 174
 8476  *((uint32_t *)__cil_tmp38) = *sid;
 8477#line 175
 8478  __cil_tmp39 = (unsigned long )sw_context;
 8479#line 175
 8480  __cil_tmp40 = __cil_tmp39 + 80;
 8481#line 175
 8482  *((bool *)__cil_tmp40) = (bool )1;
 8483#line 176
 8484  __cil_tmp41 = (unsigned long )sw_context;
 8485#line 176
 8486  __cil_tmp42 = __cil_tmp41 + 76;
 8487#line 176
 8488  __cil_tmp43 = 0 + 24;
 8489#line 176
 8490  __cil_tmp44 = & srf;
 8491#line 176
 8492  __cil_tmp45 = *__cil_tmp44;
 8493#line 176
 8494  __cil_tmp46 = (unsigned long )__cil_tmp45;
 8495#line 176
 8496  __cil_tmp47 = __cil_tmp46 + __cil_tmp43;
 8497#line 176
 8498  __cil_tmp48 = *((int *)__cil_tmp47);
 8499#line 176
 8500  *((uint32_t *)__cil_tmp42) = (uint32_t )__cil_tmp48;
 8501#line 177
 8502  __cil_tmp49 = (unsigned long )sw_context;
 8503#line 177
 8504  __cil_tmp50 = __cil_tmp49 + 76;
 8505#line 177
 8506  *sid = *((uint32_t *)__cil_tmp50);
 8507#line 179
 8508  __cil_tmp51 = & res;
 8509#line 179
 8510  __cil_tmp52 = & srf;
 8511#line 179
 8512  __cil_tmp53 = *__cil_tmp52;
 8513#line 179
 8514  *__cil_tmp51 = (struct vmw_resource *)__cil_tmp53;
 8515#line 180
 8516  vmw_resource_to_validate_list(sw_context, & res);
 8517  }
 8518#line 182
 8519  return (0);
 8520}
 8521}
 8522#line 186 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8523static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8524                                           SVGA3dCmdHeader *header ) 
 8525{ struct vmw_sid_cmd *cmd ;
 8526  int ret ;
 8527  long tmp___7 ;
 8528  SVGA3dCmdHeader    *__mptr ;
 8529  int __cil_tmp8 ;
 8530  int __cil_tmp9 ;
 8531  int __cil_tmp10 ;
 8532  long __cil_tmp11 ;
 8533  struct vmw_sid_cmd *__cil_tmp12 ;
 8534  SVGA3dCmdHeader *__cil_tmp13 ;
 8535  unsigned int __cil_tmp14 ;
 8536  char *__cil_tmp15 ;
 8537  char *__cil_tmp16 ;
 8538  unsigned long __cil_tmp17 ;
 8539  unsigned long __cil_tmp18 ;
 8540  unsigned long __cil_tmp19 ;
 8541  uint32 *__cil_tmp20 ;
 8542
 8543  {
 8544  {
 8545#line 196
 8546  ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
 8547#line 197
 8548  __cil_tmp8 = ret != 0;
 8549#line 197
 8550  __cil_tmp9 = ! __cil_tmp8;
 8551#line 197
 8552  __cil_tmp10 = ! __cil_tmp9;
 8553#line 197
 8554  __cil_tmp11 = (long )__cil_tmp10;
 8555#line 197
 8556  tmp___7 = __builtin_expect(__cil_tmp11, 0L);
 8557  }
 8558#line 197
 8559  if (tmp___7) {
 8560#line 198
 8561    return (ret);
 8562  } else {
 8563
 8564  }
 8565  {
 8566#line 200
 8567  __mptr = (SVGA3dCmdHeader    *)header;
 8568#line 200
 8569  __cil_tmp12 = (struct vmw_sid_cmd *)0;
 8570#line 200
 8571  __cil_tmp13 = (SVGA3dCmdHeader *)__cil_tmp12;
 8572#line 200
 8573  __cil_tmp14 = (unsigned int )__cil_tmp13;
 8574#line 200
 8575  __cil_tmp15 = (char *)__mptr;
 8576#line 200
 8577  __cil_tmp16 = __cil_tmp15 - __cil_tmp14;
 8578#line 200
 8579  cmd = (struct vmw_sid_cmd *)__cil_tmp16;
 8580#line 201
 8581  __cil_tmp17 = 8 + 8;
 8582#line 201
 8583  __cil_tmp18 = (unsigned long )cmd;
 8584#line 201
 8585  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
 8586#line 201
 8587  __cil_tmp20 = (uint32 *)__cil_tmp19;
 8588#line 201
 8589  ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp20);
 8590  }
 8591#line 202
 8592  return (ret);
 8593}
 8594}
 8595#line 205 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8596static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8597                                      SVGA3dCmdHeader *header ) 
 8598{ struct vmw_sid_cmd___0 *cmd ;
 8599  int ret ;
 8600  SVGA3dCmdHeader    *__mptr ;
 8601  long tmp___7 ;
 8602  int tmp___8 ;
 8603  struct vmw_sid_cmd___0 *__cil_tmp9 ;
 8604  SVGA3dCmdHeader *__cil_tmp10 ;
 8605  unsigned int __cil_tmp11 ;
 8606  char *__cil_tmp12 ;
 8607  char *__cil_tmp13 ;
 8608  unsigned long __cil_tmp14 ;
 8609  unsigned long __cil_tmp15 ;
 8610  uint32 *__cil_tmp16 ;
 8611  int __cil_tmp17 ;
 8612  int __cil_tmp18 ;
 8613  int __cil_tmp19 ;
 8614  long __cil_tmp20 ;
 8615  unsigned long __cil_tmp21 ;
 8616  unsigned long __cil_tmp22 ;
 8617  unsigned long __cil_tmp23 ;
 8618  uint32 *__cil_tmp24 ;
 8619
 8620  {
 8621  {
 8622#line 215
 8623  __mptr = (SVGA3dCmdHeader    *)header;
 8624#line 215
 8625  __cil_tmp9 = (struct vmw_sid_cmd___0 *)0;
 8626#line 215
 8627  __cil_tmp10 = (SVGA3dCmdHeader *)__cil_tmp9;
 8628#line 215
 8629  __cil_tmp11 = (unsigned int )__cil_tmp10;
 8630#line 215
 8631  __cil_tmp12 = (char *)__mptr;
 8632#line 215
 8633  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
 8634#line 215
 8635  cmd = (struct vmw_sid_cmd___0 *)__cil_tmp13;
 8636#line 216
 8637  __cil_tmp14 = (unsigned long )cmd;
 8638#line 216
 8639  __cil_tmp15 = __cil_tmp14 + 8;
 8640#line 216
 8641  __cil_tmp16 = (uint32 *)__cil_tmp15;
 8642#line 216
 8643  ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp16);
 8644#line 217
 8645  __cil_tmp17 = ret != 0;
 8646#line 217
 8647  __cil_tmp18 = ! __cil_tmp17;
 8648#line 217
 8649  __cil_tmp19 = ! __cil_tmp18;
 8650#line 217
 8651  __cil_tmp20 = (long )__cil_tmp19;
 8652#line 217
 8653  tmp___7 = __builtin_expect(__cil_tmp20, 0L);
 8654  }
 8655#line 217
 8656  if (tmp___7) {
 8657#line 218
 8658    return (ret);
 8659  } else {
 8660
 8661  }
 8662  {
 8663#line 219
 8664  __cil_tmp21 = 8 + 12;
 8665#line 219
 8666  __cil_tmp22 = (unsigned long )cmd;
 8667#line 219
 8668  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
 8669#line 219
 8670  __cil_tmp24 = (uint32 *)__cil_tmp23;
 8671#line 219
 8672  tmp___8 = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp24);
 8673  }
 8674#line 219
 8675  return (tmp___8);
 8676}
 8677}
 8678#line 222 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8679static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8680                                     SVGA3dCmdHeader *header ) 
 8681{ struct vmw_sid_cmd___1 *cmd ;
 8682  int ret ;
 8683  SVGA3dCmdHeader    *__mptr ;
 8684  long tmp___7 ;
 8685  int tmp___8 ;
 8686  struct vmw_sid_cmd___1 *__cil_tmp9 ;
 8687  SVGA3dCmdHeader *__cil_tmp10 ;
 8688  unsigned int __cil_tmp11 ;
 8689  char *__cil_tmp12 ;
 8690  char *__cil_tmp13 ;
 8691  unsigned long __cil_tmp14 ;
 8692  unsigned long __cil_tmp15 ;
 8693  uint32 *__cil_tmp16 ;
 8694  int __cil_tmp17 ;
 8695  int __cil_tmp18 ;
 8696  int __cil_tmp19 ;
 8697  long __cil_tmp20 ;
 8698  unsigned long __cil_tmp21 ;
 8699  unsigned long __cil_tmp22 ;
 8700  unsigned long __cil_tmp23 ;
 8701  uint32 *__cil_tmp24 ;
 8702
 8703  {
 8704  {
 8705#line 232
 8706  __mptr = (SVGA3dCmdHeader    *)header;
 8707#line 232
 8708  __cil_tmp9 = (struct vmw_sid_cmd___1 *)0;
 8709#line 232
 8710  __cil_tmp10 = (SVGA3dCmdHeader *)__cil_tmp9;
 8711#line 232
 8712  __cil_tmp11 = (unsigned int )__cil_tmp10;
 8713#line 232
 8714  __cil_tmp12 = (char *)__mptr;
 8715#line 232
 8716  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
 8717#line 232
 8718  cmd = (struct vmw_sid_cmd___1 *)__cil_tmp13;
 8719#line 233
 8720  __cil_tmp14 = (unsigned long )cmd;
 8721#line 233
 8722  __cil_tmp15 = __cil_tmp14 + 8;
 8723#line 233
 8724  __cil_tmp16 = (uint32 *)__cil_tmp15;
 8725#line 233
 8726  ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp16);
 8727#line 234
 8728  __cil_tmp17 = ret != 0;
 8729#line 234
 8730  __cil_tmp18 = ! __cil_tmp17;
 8731#line 234
 8732  __cil_tmp19 = ! __cil_tmp18;
 8733#line 234
 8734  __cil_tmp20 = (long )__cil_tmp19;
 8735#line 234
 8736  tmp___7 = __builtin_expect(__cil_tmp20, 0L);
 8737  }
 8738#line 234
 8739  if (tmp___7) {
 8740#line 235
 8741    return (ret);
 8742  } else {
 8743
 8744  }
 8745  {
 8746#line 236
 8747  __cil_tmp21 = 8 + 12;
 8748#line 236
 8749  __cil_tmp22 = (unsigned long )cmd;
 8750#line 236
 8751  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
 8752#line 236
 8753  __cil_tmp24 = (uint32 *)__cil_tmp23;
 8754#line 236
 8755  tmp___8 = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp24);
 8756  }
 8757#line 236
 8758  return (tmp___8);
 8759}
 8760}
 8761#line 239 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8762static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8763                                         SVGA3dCmdHeader *header ) 
 8764{ struct vmw_sid_cmd___2 *cmd ;
 8765  SVGA3dCmdHeader    *__mptr ;
 8766  long tmp___7 ;
 8767  int tmp___8 ;
 8768  struct vmw_sid_cmd___2 *__cil_tmp8 ;
 8769  SVGA3dCmdHeader *__cil_tmp9 ;
 8770  unsigned int __cil_tmp10 ;
 8771  char *__cil_tmp11 ;
 8772  char *__cil_tmp12 ;
 8773  unsigned long __cil_tmp13 ;
 8774  unsigned long __cil_tmp14 ;
 8775  bool __cil_tmp15 ;
 8776  int __cil_tmp16 ;
 8777  int __cil_tmp17 ;
 8778  int __cil_tmp18 ;
 8779  long __cil_tmp19 ;
 8780  uint32 __cil_tmp20 ;
 8781  unsigned long __cil_tmp21 ;
 8782  unsigned long __cil_tmp22 ;
 8783  uint32 *__cil_tmp23 ;
 8784
 8785  {
 8786  {
 8787#line 248
 8788  __mptr = (SVGA3dCmdHeader    *)header;
 8789#line 248
 8790  __cil_tmp8 = (struct vmw_sid_cmd___2 *)0;
 8791#line 248
 8792  __cil_tmp9 = (SVGA3dCmdHeader *)__cil_tmp8;
 8793#line 248
 8794  __cil_tmp10 = (unsigned int )__cil_tmp9;
 8795#line 248
 8796  __cil_tmp11 = (char *)__mptr;
 8797#line 248
 8798  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
 8799#line 248
 8800  cmd = (struct vmw_sid_cmd___2 *)__cil_tmp12;
 8801#line 250
 8802  __cil_tmp13 = (unsigned long )sw_context;
 8803#line 250
 8804  __cil_tmp14 = __cil_tmp13 + 61;
 8805#line 250
 8806  __cil_tmp15 = *((bool *)__cil_tmp14);
 8807#line 250
 8808  __cil_tmp16 = ! __cil_tmp15;
 8809#line 250
 8810  __cil_tmp17 = ! __cil_tmp16;
 8811#line 250
 8812  __cil_tmp18 = ! __cil_tmp17;
 8813#line 250
 8814  __cil_tmp19 = (long )__cil_tmp18;
 8815#line 250
 8816  tmp___7 = __builtin_expect(__cil_tmp19, 0L);
 8817  }
 8818#line 250
 8819  if (tmp___7) {
 8820    {
 8821#line 251
 8822    __cil_tmp20 = *((uint32 *)cmd);
 8823#line 251
 8824    drm_err("vmw_cmd_blt_surf_screen_check", "Kernel only SVGA3d command: %u.\n",
 8825            __cil_tmp20);
 8826    }
 8827#line 252
 8828    return (-1);
 8829  } else {
 8830
 8831  }
 8832  {
 8833#line 255
 8834  __cil_tmp21 = (unsigned long )cmd;
 8835#line 255
 8836  __cil_tmp22 = __cil_tmp21 + 8;
 8837#line 255
 8838  __cil_tmp23 = (uint32 *)__cil_tmp22;
 8839#line 255
 8840  tmp___8 = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp23);
 8841  }
 8842#line 255
 8843  return (tmp___8);
 8844}
 8845}
 8846#line 258 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8847static int vmw_cmd_present_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 8848                                 SVGA3dCmdHeader *header ) 
 8849{ struct vmw_sid_cmd___3 *cmd ;
 8850  SVGA3dCmdHeader    *__mptr ;
 8851  long tmp___7 ;
 8852  int tmp___8 ;
 8853  struct vmw_sid_cmd___3 *__cil_tmp8 ;
 8854  SVGA3dCmdHeader *__cil_tmp9 ;
 8855  unsigned int __cil_tmp10 ;
 8856  char *__cil_tmp11 ;
 8857  char *__cil_tmp12 ;
 8858  unsigned long __cil_tmp13 ;
 8859  unsigned long __cil_tmp14 ;
 8860  bool __cil_tmp15 ;
 8861  int __cil_tmp16 ;
 8862  int __cil_tmp17 ;
 8863  int __cil_tmp18 ;
 8864  long __cil_tmp19 ;
 8865  uint32 __cil_tmp20 ;
 8866  unsigned long __cil_tmp21 ;
 8867  unsigned long __cil_tmp22 ;
 8868  uint32 *__cil_tmp23 ;
 8869
 8870  {
 8871  {
 8872#line 268
 8873  __mptr = (SVGA3dCmdHeader    *)header;
 8874#line 268
 8875  __cil_tmp8 = (struct vmw_sid_cmd___3 *)0;
 8876#line 268
 8877  __cil_tmp9 = (SVGA3dCmdHeader *)__cil_tmp8;
 8878#line 268
 8879  __cil_tmp10 = (unsigned int )__cil_tmp9;
 8880#line 268
 8881  __cil_tmp11 = (char *)__mptr;
 8882#line 268
 8883  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
 8884#line 268
 8885  cmd = (struct vmw_sid_cmd___3 *)__cil_tmp12;
 8886#line 270
 8887  __cil_tmp13 = (unsigned long )sw_context;
 8888#line 270
 8889  __cil_tmp14 = __cil_tmp13 + 61;
 8890#line 270
 8891  __cil_tmp15 = *((bool *)__cil_tmp14);
 8892#line 270
 8893  __cil_tmp16 = ! __cil_tmp15;
 8894#line 270
 8895  __cil_tmp17 = ! __cil_tmp16;
 8896#line 270
 8897  __cil_tmp18 = ! __cil_tmp17;
 8898#line 270
 8899  __cil_tmp19 = (long )__cil_tmp18;
 8900#line 270
 8901  tmp___7 = __builtin_expect(__cil_tmp19, 0L);
 8902  }
 8903#line 270
 8904  if (tmp___7) {
 8905    {
 8906#line 271
 8907    __cil_tmp20 = *((uint32 *)cmd);
 8908#line 271
 8909    drm_err("vmw_cmd_present_check", "Kernel only SVGA3d command: %u.\n", __cil_tmp20);
 8910    }
 8911#line 272
 8912    return (-1);
 8913  } else {
 8914
 8915  }
 8916  {
 8917#line 275
 8918  __cil_tmp21 = (unsigned long )cmd;
 8919#line 275
 8920  __cil_tmp22 = __cil_tmp21 + 8;
 8921#line 275
 8922  __cil_tmp23 = (uint32 *)__cil_tmp22;
 8923#line 275
 8924  tmp___8 = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp23);
 8925  }
 8926#line 275
 8927  return (tmp___8);
 8928}
 8929}
 8930#line 294 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 8931static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv , uint32_t cid ,
 8932                                       struct ttm_buffer_object *new_query_bo , struct vmw_sw_context *sw_context ) 
 8933{ int ret ;
 8934  bool add_cid ;
 8935  uint32_t cid_to_add ;
 8936  long tmp___7 ;
 8937  long tmp___8 ;
 8938  long tmp___9 ;
 8939  long tmp___10 ;
 8940  long tmp___11 ;
 8941  long tmp___12 ;
 8942  int tmp___13 ;
 8943  long tmp___14 ;
 8944  struct vmw_resource *ctx ;
 8945  int tmp___15 ;
 8946  long tmp___16 ;
 8947  unsigned long __cil_tmp19 ;
 8948  unsigned long __cil_tmp20 ;
 8949  struct ttm_buffer_object *__cil_tmp21 ;
 8950  unsigned long __cil_tmp22 ;
 8951  unsigned long __cil_tmp23 ;
 8952  int __cil_tmp24 ;
 8953  int __cil_tmp25 ;
 8954  int __cil_tmp26 ;
 8955  long __cil_tmp27 ;
 8956  unsigned long __cil_tmp28 ;
 8957  unsigned long __cil_tmp29 ;
 8958  unsigned long __cil_tmp30 ;
 8959  int __cil_tmp31 ;
 8960  int __cil_tmp32 ;
 8961  int __cil_tmp33 ;
 8962  long __cil_tmp34 ;
 8963  void *__cil_tmp35 ;
 8964  unsigned long __cil_tmp36 ;
 8965  unsigned long __cil_tmp37 ;
 8966  unsigned long __cil_tmp38 ;
 8967  struct ttm_buffer_object *__cil_tmp39 ;
 8968  unsigned long __cil_tmp40 ;
 8969  int __cil_tmp41 ;
 8970  int __cil_tmp42 ;
 8971  int __cil_tmp43 ;
 8972  long __cil_tmp44 ;
 8973  unsigned long __cil_tmp45 ;
 8974  unsigned long __cil_tmp46 ;
 8975  bool __cil_tmp47 ;
 8976  int __cil_tmp48 ;
 8977  int __cil_tmp49 ;
 8978  int __cil_tmp50 ;
 8979  long __cil_tmp51 ;
 8980  unsigned long __cil_tmp52 ;
 8981  unsigned long __cil_tmp53 ;
 8982  unsigned long __cil_tmp54 ;
 8983  unsigned long __cil_tmp55 ;
 8984  struct ttm_buffer_object *__cil_tmp56 ;
 8985  uint32_t __cil_tmp57 ;
 8986  void *__cil_tmp58 ;
 8987  uint32_t *__cil_tmp59 ;
 8988  int __cil_tmp60 ;
 8989  int __cil_tmp61 ;
 8990  int __cil_tmp62 ;
 8991  long __cil_tmp63 ;
 8992  unsigned long __cil_tmp64 ;
 8993  unsigned long __cil_tmp65 ;
 8994  unsigned long __cil_tmp66 ;
 8995  unsigned long __cil_tmp67 ;
 8996  struct ttm_buffer_object *__cil_tmp68 ;
 8997  uint32_t __cil_tmp69 ;
 8998  void *__cil_tmp70 ;
 8999  uint32_t *__cil_tmp71 ;
 9000  int __cil_tmp72 ;
 9001  int __cil_tmp73 ;
 9002  int __cil_tmp74 ;
 9003  long __cil_tmp75 ;
 9004  unsigned long __cil_tmp76 ;
 9005  unsigned long __cil_tmp77 ;
 9006  uint32_t __cil_tmp78 ;
 9007  unsigned long __cil_tmp79 ;
 9008  unsigned long __cil_tmp80 ;
 9009  long __cil_tmp81 ;
 9010  unsigned long __cil_tmp82 ;
 9011  unsigned long __cil_tmp83 ;
 9012  unsigned long __cil_tmp84 ;
 9013  unsigned long __cil_tmp85 ;
 9014  unsigned long __cil_tmp86 ;
 9015  unsigned long __cil_tmp87 ;
 9016  unsigned long __cil_tmp88 ;
 9017  unsigned long __cil_tmp89 ;
 9018  unsigned long __cil_tmp90 ;
 9019  unsigned long __cil_tmp91 ;
 9020  struct list_head *__cil_tmp92 ;
 9021  struct list_head    *__cil_tmp93 ;
 9022  unsigned long __cil_tmp94 ;
 9023  unsigned long __cil_tmp95 ;
 9024  struct list_head *__cil_tmp96 ;
 9025  unsigned long __cil_tmp97 ;
 9026  unsigned long __cil_tmp98 ;
 9027  struct list_head *__cil_tmp99 ;
 9028  unsigned long __cil_tmp100 ;
 9029  unsigned long __cil_tmp101 ;
 9030  struct ttm_buffer_object *__cil_tmp102 ;
 9031  uint32_t __cil_tmp103 ;
 9032  void *__cil_tmp104 ;
 9033  uint32_t *__cil_tmp105 ;
 9034  int __cil_tmp106 ;
 9035  int __cil_tmp107 ;
 9036  int __cil_tmp108 ;
 9037  long __cil_tmp109 ;
 9038
 9039  {
 9040  {
 9041#line 300
 9042  add_cid = (bool )0;
 9043#line 303
 9044  __cil_tmp19 = (unsigned long )sw_context;
 9045#line 303
 9046  __cil_tmp20 = __cil_tmp19 + 131256;
 9047#line 303
 9048  __cil_tmp21 = *((struct ttm_buffer_object **)__cil_tmp20);
 9049#line 303
 9050  __cil_tmp22 = (unsigned long )__cil_tmp21;
 9051#line 303
 9052  __cil_tmp23 = (unsigned long )new_query_bo;
 9053#line 303
 9054  __cil_tmp24 = __cil_tmp23 != __cil_tmp22;
 9055#line 303
 9056  __cil_tmp25 = ! __cil_tmp24;
 9057#line 303
 9058  __cil_tmp26 = ! __cil_tmp25;
 9059#line 303
 9060  __cil_tmp27 = (long )__cil_tmp26;
 9061#line 303
 9062  tmp___12 = __builtin_expect(__cil_tmp27, 0L);
 9063  }
 9064#line 303
 9065  if (tmp___12) {
 9066    {
 9067#line 305
 9068    __cil_tmp28 = (unsigned long )new_query_bo;
 9069#line 305
 9070    __cil_tmp29 = __cil_tmp28 + 40;
 9071#line 305
 9072    __cil_tmp30 = *((unsigned long *)__cil_tmp29);
 9073#line 305
 9074    __cil_tmp31 = __cil_tmp30 > 4UL;
 9075#line 305
 9076    __cil_tmp32 = ! __cil_tmp31;
 9077#line 305
 9078    __cil_tmp33 = ! __cil_tmp32;
 9079#line 305
 9080    __cil_tmp34 = (long )__cil_tmp33;
 9081#line 305
 9082    tmp___7 = __builtin_expect(__cil_tmp34, 0L);
 9083    }
 9084#line 305
 9085    if (tmp___7) {
 9086      {
 9087#line 306
 9088      drm_err("vmw_query_bo_switch_prepare", "Query buffer too large.\n");
 9089      }
 9090#line 307
 9091      return (-22);
 9092    } else {
 9093
 9094    }
 9095    {
 9096#line 310
 9097    __cil_tmp35 = (void *)0;
 9098#line 310
 9099    __cil_tmp36 = (unsigned long )__cil_tmp35;
 9100#line 310
 9101    __cil_tmp37 = (unsigned long )sw_context;
 9102#line 310
 9103    __cil_tmp38 = __cil_tmp37 + 131256;
 9104#line 310
 9105    __cil_tmp39 = *((struct ttm_buffer_object **)__cil_tmp38);
 9106#line 310
 9107    __cil_tmp40 = (unsigned long )__cil_tmp39;
 9108#line 310
 9109    __cil_tmp41 = __cil_tmp40 != __cil_tmp36;
 9110#line 310
 9111    __cil_tmp42 = ! __cil_tmp41;
 9112#line 310
 9113    __cil_tmp43 = ! __cil_tmp42;
 9114#line 310
 9115    __cil_tmp44 = (long )__cil_tmp43;
 9116#line 310
 9117    tmp___10 = __builtin_expect(__cil_tmp44, 0L);
 9118    }
 9119#line 310
 9120    if (tmp___10) {
 9121      {
 9122#line 311
 9123      while (1) {
 9124        while_continue: /* CIL Label */ ;
 9125        {
 9126#line 311
 9127        __cil_tmp45 = (unsigned long )sw_context;
 9128#line 311
 9129        __cil_tmp46 = __cil_tmp45 + 131268;
 9130#line 311
 9131        __cil_tmp47 = *((bool *)__cil_tmp46);
 9132#line 311
 9133        __cil_tmp48 = ! __cil_tmp47;
 9134#line 311
 9135        __cil_tmp49 = ! __cil_tmp48;
 9136#line 311
 9137        __cil_tmp50 = ! __cil_tmp49;
 9138#line 311
 9139        __cil_tmp51 = (long )__cil_tmp50;
 9140#line 311
 9141        tmp___8 = __builtin_expect(__cil_tmp51, 0L);
 9142        }
 9143#line 311
 9144        if (tmp___8) {
 9145          {
 9146#line 311
 9147          while (1) {
 9148            while_continue___0: /* CIL Label */ ;
 9149#line 311
 9150            __asm__  volatile   ("1:\tud2\n"
 9151                                 ".pushsection __bug_table,\"a\"\n"
 9152                                 "2:\t.long 1b - 2b, %c0 - 2b\n"
 9153                                 "\t.word %c1, 0\n"
 9154                                 "\t.org 2b+%c2\n"
 9155                                 ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"),
 9156                                 "i" (311), "i" (12UL));
 9157            {
 9158#line 311
 9159            while (1) {
 9160              while_continue___1: /* CIL Label */ ;
 9161            }
 9162            while_break___1: /* CIL Label */ ;
 9163            }
 9164#line 311
 9165            goto while_break___0;
 9166          }
 9167          while_break___0: /* CIL Label */ ;
 9168          }
 9169        } else {
 9170
 9171        }
 9172#line 311
 9173        goto while_break;
 9174      }
 9175      while_break: /* CIL Label */ ;
 9176      }
 9177      {
 9178#line 312
 9179      add_cid = (bool )1;
 9180#line 313
 9181      __cil_tmp52 = (unsigned long )sw_context;
 9182#line 313
 9183      __cil_tmp53 = __cil_tmp52 + 131264;
 9184#line 313
 9185      cid_to_add = *((uint32_t *)__cil_tmp53);
 9186#line 314
 9187      __cil_tmp54 = (unsigned long )sw_context;
 9188#line 314
 9189      __cil_tmp55 = __cil_tmp54 + 131256;
 9190#line 314
 9191      __cil_tmp56 = *((struct ttm_buffer_object **)__cil_tmp55);
 9192#line 314
 9193      __cil_tmp57 = (uint32_t )1;
 9194#line 314
 9195      __cil_tmp58 = (void *)0;
 9196#line 314
 9197      __cil_tmp59 = (uint32_t *)__cil_tmp58;
 9198#line 314
 9199      ret = vmw_bo_to_validate_list(sw_context, __cil_tmp56, __cil_tmp57, __cil_tmp59);
 9200#line 318
 9201      __cil_tmp60 = ret != 0;
 9202#line 318
 9203      __cil_tmp61 = ! __cil_tmp60;
 9204#line 318
 9205      __cil_tmp62 = ! __cil_tmp61;
 9206#line 318
 9207      __cil_tmp63 = (long )__cil_tmp62;
 9208#line 318
 9209      tmp___9 = __builtin_expect(__cil_tmp63, 0L);
 9210      }
 9211#line 318
 9212      if (tmp___9) {
 9213#line 319
 9214        return (ret);
 9215      } else {
 9216
 9217      }
 9218    } else {
 9219
 9220    }
 9221    {
 9222#line 321
 9223    __cil_tmp64 = (unsigned long )sw_context;
 9224#line 321
 9225    __cil_tmp65 = __cil_tmp64 + 131256;
 9226#line 321
 9227    *((struct ttm_buffer_object **)__cil_tmp65) = new_query_bo;
 9228#line 323
 9229    __cil_tmp66 = (unsigned long )dev_priv;
 9230#line 323
 9231    __cil_tmp67 = __cil_tmp66 + 134744;
 9232#line 323
 9233    __cil_tmp68 = *((struct ttm_buffer_object **)__cil_tmp67);
 9234#line 323
 9235    __cil_tmp69 = (uint32_t )1;
 9236#line 323
 9237    __cil_tmp70 = (void *)0;
 9238#line 323
 9239    __cil_tmp71 = (uint32_t *)__cil_tmp70;
 9240#line 323
 9241    ret = vmw_bo_to_validate_list(sw_context, __cil_tmp68, __cil_tmp69, __cil_tmp71);
 9242#line 327
 9243    __cil_tmp72 = ret != 0;
 9244#line 327
 9245    __cil_tmp73 = ! __cil_tmp72;
 9246#line 327
 9247    __cil_tmp74 = ! __cil_tmp73;
 9248#line 327
 9249    __cil_tmp75 = (long )__cil_tmp74;
 9250#line 327
 9251    tmp___11 = __builtin_expect(__cil_tmp75, 0L);
 9252    }
 9253#line 327
 9254    if (tmp___11) {
 9255#line 328
 9256      return (ret);
 9257    } else {
 9258
 9259    }
 9260  } else {
 9261
 9262  }
 9263  {
 9264#line 332
 9265  __cil_tmp76 = (unsigned long )sw_context;
 9266#line 332
 9267  __cil_tmp77 = __cil_tmp76 + 131264;
 9268#line 332
 9269  __cil_tmp78 = *((uint32_t *)__cil_tmp77);
 9270#line 332
 9271  if (cid != __cil_tmp78) {
 9272    {
 9273#line 332
 9274    __cil_tmp79 = (unsigned long )sw_context;
 9275#line 332
 9276    __cil_tmp80 = __cil_tmp79 + 131268;
 9277#line 332
 9278    if (*((bool *)__cil_tmp80)) {
 9279#line 332
 9280      tmp___13 = 1;
 9281    } else {
 9282#line 332
 9283      tmp___13 = 0;
 9284    }
 9285    }
 9286  } else {
 9287#line 332
 9288    tmp___13 = 0;
 9289  }
 9290  }
 9291  {
 9292#line 332
 9293  __cil_tmp81 = (long )tmp___13;
 9294#line 332
 9295  tmp___14 = __builtin_expect(__cil_tmp81, 0L);
 9296  }
 9297#line 332
 9298  if (tmp___14) {
 9299#line 334
 9300    add_cid = (bool )1;
 9301#line 335
 9302    __cil_tmp82 = (unsigned long )sw_context;
 9303#line 335
 9304    __cil_tmp83 = __cil_tmp82 + 131264;
 9305#line 335
 9306    cid_to_add = *((uint32_t *)__cil_tmp83);
 9307  } else {
 9308
 9309  }
 9310#line 338
 9311  __cil_tmp84 = (unsigned long )sw_context;
 9312#line 338
 9313  __cil_tmp85 = __cil_tmp84 + 131264;
 9314#line 338
 9315  *((uint32_t *)__cil_tmp85) = cid;
 9316#line 339
 9317  __cil_tmp86 = (unsigned long )sw_context;
 9318#line 339
 9319  __cil_tmp87 = __cil_tmp86 + 131268;
 9320#line 339
 9321  *((bool *)__cil_tmp87) = (bool )1;
 9322#line 341
 9323  if (add_cid) {
 9324    {
 9325#line 342
 9326    __cil_tmp88 = (unsigned long )sw_context;
 9327#line 342
 9328    __cil_tmp89 = __cil_tmp88 + 64;
 9329#line 342
 9330    ctx = *((struct vmw_resource **)__cil_tmp89);
 9331#line 344
 9332    __cil_tmp90 = (unsigned long )ctx;
 9333#line 344
 9334    __cil_tmp91 = __cil_tmp90 + 80;
 9335#line 344
 9336    __cil_tmp92 = (struct list_head *)__cil_tmp91;
 9337#line 344
 9338    __cil_tmp93 = (struct list_head    *)__cil_tmp92;
 9339#line 344
 9340    tmp___15 = list_empty(__cil_tmp93);
 9341    }
 9342#line 344
 9343    if (tmp___15) {
 9344      {
 9345#line 345
 9346      __cil_tmp94 = (unsigned long )ctx;
 9347#line 345
 9348      __cil_tmp95 = __cil_tmp94 + 80;
 9349#line 345
 9350      __cil_tmp96 = (struct list_head *)__cil_tmp95;
 9351#line 345
 9352      __cil_tmp97 = (unsigned long )sw_context;
 9353#line 345
 9354      __cil_tmp98 = __cil_tmp97 + 131240;
 9355#line 345
 9356      __cil_tmp99 = (struct list_head *)__cil_tmp98;
 9357#line 345
 9358      list_add_tail(__cil_tmp96, __cil_tmp99);
 9359      }
 9360    } else {
 9361
 9362    }
 9363    {
 9364#line 347
 9365    __cil_tmp100 = (unsigned long )dev_priv;
 9366#line 347
 9367    __cil_tmp101 = __cil_tmp100 + 134744;
 9368#line 347
 9369    __cil_tmp102 = *((struct ttm_buffer_object **)__cil_tmp101);
 9370#line 347
 9371    __cil_tmp103 = (uint32_t )1;
 9372#line 347
 9373    __cil_tmp104 = (void *)0;
 9374#line 347
 9375    __cil_tmp105 = (uint32_t *)__cil_tmp104;
 9376#line 347
 9377    ret = vmw_bo_to_validate_list(sw_context, __cil_tmp102, __cil_tmp103, __cil_tmp105);
 9378#line 351
 9379    __cil_tmp106 = ret != 0;
 9380#line 351
 9381    __cil_tmp107 = ! __cil_tmp106;
 9382#line 351
 9383    __cil_tmp108 = ! __cil_tmp107;
 9384#line 351
 9385    __cil_tmp109 = (long )__cil_tmp108;
 9386#line 351
 9387    tmp___16 = __builtin_expect(__cil_tmp109, 0L);
 9388    }
 9389#line 351
 9390    if (tmp___16) {
 9391#line 352
 9392      return (ret);
 9393    } else {
 9394
 9395    }
 9396  } else {
 9397
 9398  }
 9399#line 354
 9400  return (0);
 9401}
 9402}
 9403#line 376 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 9404static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ) 
 9405{ struct vmw_resource *ctx ;
 9406  struct vmw_resource *next_ctx ;
 9407  int ret ;
 9408  struct list_head    *__mptr ;
 9409  struct list_head    *__mptr___0 ;
 9410  struct list_head    *__mptr___1 ;
 9411  int tmp___7 ;
 9412  int tmp___8 ;
 9413  long tmp___9 ;
 9414  long tmp___10 ;
 9415  unsigned long __cil_tmp13 ;
 9416  unsigned long __cil_tmp14 ;
 9417  struct list_head *__cil_tmp15 ;
 9418  struct vmw_resource *__cil_tmp16 ;
 9419  unsigned long __cil_tmp17 ;
 9420  unsigned long __cil_tmp18 ;
 9421  struct list_head *__cil_tmp19 ;
 9422  unsigned int __cil_tmp20 ;
 9423  char *__cil_tmp21 ;
 9424  char *__cil_tmp22 ;
 9425  unsigned long __cil_tmp23 ;
 9426  unsigned long __cil_tmp24 ;
 9427  struct list_head *__cil_tmp25 ;
 9428  struct vmw_resource *__cil_tmp26 ;
 9429  unsigned long __cil_tmp27 ;
 9430  unsigned long __cil_tmp28 ;
 9431  struct list_head *__cil_tmp29 ;
 9432  unsigned int __cil_tmp30 ;
 9433  char *__cil_tmp31 ;
 9434  char *__cil_tmp32 ;
 9435  unsigned long __cil_tmp33 ;
 9436  unsigned long __cil_tmp34 ;
 9437  struct list_head *__cil_tmp35 ;
 9438  unsigned long __cil_tmp36 ;
 9439  unsigned long __cil_tmp37 ;
 9440  unsigned long __cil_tmp38 ;
 9441  struct list_head *__cil_tmp39 ;
 9442  unsigned long __cil_tmp40 ;
 9443  unsigned long __cil_tmp41 ;
 9444  unsigned long __cil_tmp42 ;
 9445  struct list_head *__cil_tmp43 ;
 9446  unsigned long __cil_tmp44 ;
 9447  unsigned long __cil_tmp45 ;
 9448  struct list_head *__cil_tmp46 ;
 9449  struct list_head    *__cil_tmp47 ;
 9450  long __cil_tmp48 ;
 9451  unsigned long __cil_tmp49 ;
 9452  unsigned long __cil_tmp50 ;
 9453  int __cil_tmp51 ;
 9454  uint32_t __cil_tmp52 ;
 9455  int __cil_tmp53 ;
 9456  int __cil_tmp54 ;
 9457  int __cil_tmp55 ;
 9458  long __cil_tmp56 ;
 9459  unsigned long __cil_tmp57 ;
 9460  unsigned long __cil_tmp58 ;
 9461  struct list_head *__cil_tmp59 ;
 9462  struct vmw_resource *__cil_tmp60 ;
 9463  unsigned long __cil_tmp61 ;
 9464  unsigned long __cil_tmp62 ;
 9465  struct list_head *__cil_tmp63 ;
 9466  unsigned int __cil_tmp64 ;
 9467  char *__cil_tmp65 ;
 9468  char *__cil_tmp66 ;
 9469  unsigned long __cil_tmp67 ;
 9470  unsigned long __cil_tmp68 ;
 9471  struct ttm_buffer_object *__cil_tmp69 ;
 9472  unsigned long __cil_tmp70 ;
 9473  unsigned long __cil_tmp71 ;
 9474  unsigned long __cil_tmp72 ;
 9475  struct ttm_buffer_object *__cil_tmp73 ;
 9476  unsigned long __cil_tmp74 ;
 9477  unsigned long __cil_tmp75 ;
 9478  unsigned long __cil_tmp76 ;
 9479  unsigned long __cil_tmp77 ;
 9480  unsigned long __cil_tmp78 ;
 9481  struct ttm_buffer_object *__cil_tmp79 ;
 9482  bool __cil_tmp80 ;
 9483  unsigned long __cil_tmp81 ;
 9484  unsigned long __cil_tmp82 ;
 9485  struct ttm_buffer_object **__cil_tmp83 ;
 9486  unsigned long __cil_tmp84 ;
 9487  unsigned long __cil_tmp85 ;
 9488  struct ttm_buffer_object *__cil_tmp86 ;
 9489  bool __cil_tmp87 ;
 9490  unsigned long __cil_tmp88 ;
 9491  unsigned long __cil_tmp89 ;
 9492  struct ttm_buffer_object *__cil_tmp90 ;
 9493  bool __cil_tmp91 ;
 9494  unsigned long __cil_tmp92 ;
 9495  unsigned long __cil_tmp93 ;
 9496  unsigned long __cil_tmp94 ;
 9497  unsigned long __cil_tmp95 ;
 9498  unsigned long __cil_tmp96 ;
 9499  unsigned long __cil_tmp97 ;
 9500  unsigned long __cil_tmp98 ;
 9501  unsigned long __cil_tmp99 ;
 9502  unsigned long __cil_tmp100 ;
 9503  unsigned long __cil_tmp101 ;
 9504  struct ttm_buffer_object *__cil_tmp102 ;
 9505
 9506  {
 9507#line 388
 9508  __cil_tmp13 = (unsigned long )sw_context;
 9509#line 388
 9510  __cil_tmp14 = __cil_tmp13 + 131240;
 9511#line 388
 9512  __cil_tmp15 = *((struct list_head **)__cil_tmp14);
 9513#line 388
 9514  __mptr = (struct list_head    *)__cil_tmp15;
 9515#line 388
 9516  __cil_tmp16 = (struct vmw_resource *)0;
 9517#line 388
 9518  __cil_tmp17 = (unsigned long )__cil_tmp16;
 9519#line 388
 9520  __cil_tmp18 = __cil_tmp17 + 80;
 9521#line 388
 9522  __cil_tmp19 = (struct list_head *)__cil_tmp18;
 9523#line 388
 9524  __cil_tmp20 = (unsigned int )__cil_tmp19;
 9525#line 388
 9526  __cil_tmp21 = (char *)__mptr;
 9527#line 388
 9528  __cil_tmp22 = __cil_tmp21 - __cil_tmp20;
 9529#line 388
 9530  ctx = (struct vmw_resource *)__cil_tmp22;
 9531#line 388
 9532  __cil_tmp23 = (unsigned long )ctx;
 9533#line 388
 9534  __cil_tmp24 = __cil_tmp23 + 80;
 9535#line 388
 9536  __cil_tmp25 = *((struct list_head **)__cil_tmp24);
 9537#line 388
 9538  __mptr___0 = (struct list_head    *)__cil_tmp25;
 9539#line 388
 9540  __cil_tmp26 = (struct vmw_resource *)0;
 9541#line 388
 9542  __cil_tmp27 = (unsigned long )__cil_tmp26;
 9543#line 388
 9544  __cil_tmp28 = __cil_tmp27 + 80;
 9545#line 388
 9546  __cil_tmp29 = (struct list_head *)__cil_tmp28;
 9547#line 388
 9548  __cil_tmp30 = (unsigned int )__cil_tmp29;
 9549#line 388
 9550  __cil_tmp31 = (char *)__mptr___0;
 9551#line 388
 9552  __cil_tmp32 = __cil_tmp31 - __cil_tmp30;
 9553#line 388
 9554  next_ctx = (struct vmw_resource *)__cil_tmp32;
 9555  {
 9556#line 388
 9557  while (1) {
 9558    while_continue: /* CIL Label */ ;
 9559    {
 9560#line 388
 9561    __cil_tmp33 = (unsigned long )sw_context;
 9562#line 388
 9563    __cil_tmp34 = __cil_tmp33 + 131240;
 9564#line 388
 9565    __cil_tmp35 = (struct list_head *)__cil_tmp34;
 9566#line 388
 9567    __cil_tmp36 = (unsigned long )__cil_tmp35;
 9568#line 388
 9569    __cil_tmp37 = (unsigned long )ctx;
 9570#line 388
 9571    __cil_tmp38 = __cil_tmp37 + 80;
 9572#line 388
 9573    __cil_tmp39 = (struct list_head *)__cil_tmp38;
 9574#line 388
 9575    __cil_tmp40 = (unsigned long )__cil_tmp39;
 9576#line 388
 9577    if (__cil_tmp40 != __cil_tmp36) {
 9578
 9579    } else {
 9580#line 388
 9581      goto while_break;
 9582    }
 9583    }
 9584    {
 9585#line 390
 9586    __cil_tmp41 = (unsigned long )ctx;
 9587#line 390
 9588    __cil_tmp42 = __cil_tmp41 + 80;
 9589#line 390
 9590    __cil_tmp43 = (struct list_head *)__cil_tmp42;
 9591#line 390
 9592    list_del_init(__cil_tmp43);
 9593    }
 9594    {
 9595#line 392
 9596    while (1) {
 9597      while_continue___0: /* CIL Label */ ;
 9598      {
 9599#line 392
 9600      __cil_tmp44 = (unsigned long )ctx;
 9601#line 392
 9602      __cil_tmp45 = __cil_tmp44 + 64;
 9603#line 392
 9604      __cil_tmp46 = (struct list_head *)__cil_tmp45;
 9605#line 392
 9606      __cil_tmp47 = (struct list_head    *)__cil_tmp46;
 9607#line 392
 9608      tmp___7 = list_empty(__cil_tmp47);
 9609      }
 9610#line 392
 9611      if (tmp___7) {
 9612#line 392
 9613        tmp___8 = 1;
 9614      } else {
 9615#line 392
 9616        tmp___8 = 0;
 9617      }
 9618      {
 9619#line 392
 9620      __cil_tmp48 = (long )tmp___8;
 9621#line 392
 9622      tmp___9 = __builtin_expect(__cil_tmp48, 0L);
 9623      }
 9624#line 392
 9625      if (tmp___9) {
 9626        {
 9627#line 392
 9628        while (1) {
 9629          while_continue___1: /* CIL Label */ ;
 9630#line 392
 9631          __asm__  volatile   ("1:\tud2\n"
 9632                               ".pushsection __bug_table,\"a\"\n"
 9633                               "2:\t.long 1b - 2b, %c0 - 2b\n"
 9634                               "\t.word %c1, 0\n"
 9635                               "\t.org 2b+%c2\n"
 9636                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"),
 9637                               "i" (392), "i" (12UL));
 9638          {
 9639#line 392
 9640          while (1) {
 9641            while_continue___2: /* CIL Label */ ;
 9642          }
 9643          while_break___2: /* CIL Label */ ;
 9644          }
 9645#line 392
 9646          goto while_break___1;
 9647        }
 9648        while_break___1: /* CIL Label */ ;
 9649        }
 9650      } else {
 9651
 9652      }
 9653#line 392
 9654      goto while_break___0;
 9655    }
 9656    while_break___0: /* CIL Label */ ;
 9657    }
 9658    {
 9659#line 394
 9660    __cil_tmp49 = (unsigned long )ctx;
 9661#line 394
 9662    __cil_tmp50 = __cil_tmp49 + 24;
 9663#line 394
 9664    __cil_tmp51 = *((int *)__cil_tmp50);
 9665#line 394
 9666    __cil_tmp52 = (uint32_t )__cil_tmp51;
 9667#line 394
 9668    ret = vmw_fifo_emit_dummy_query(dev_priv, __cil_tmp52);
 9669#line 396
 9670    __cil_tmp53 = ret != 0;
 9671#line 396
 9672    __cil_tmp54 = ! __cil_tmp53;
 9673#line 396
 9674    __cil_tmp55 = ! __cil_tmp54;
 9675#line 396
 9676    __cil_tmp56 = (long )__cil_tmp55;
 9677#line 396
 9678    tmp___10 = __builtin_expect(__cil_tmp56, 0L);
 9679    }
 9680#line 396
 9681    if (tmp___10) {
 9682      {
 9683#line 397
 9684      drm_err("vmw_query_bo_switch_commit", "Out of fifo space for dummy query.\n");
 9685      }
 9686    } else {
 9687
 9688    }
 9689#line 388
 9690    ctx = next_ctx;
 9691#line 388
 9692    __cil_tmp57 = (unsigned long )next_ctx;
 9693#line 388
 9694    __cil_tmp58 = __cil_tmp57 + 80;
 9695#line 388
 9696    __cil_tmp59 = *((struct list_head **)__cil_tmp58);
 9697#line 388
 9698    __mptr___1 = (struct list_head    *)__cil_tmp59;
 9699#line 388
 9700    __cil_tmp60 = (struct vmw_resource *)0;
 9701#line 388
 9702    __cil_tmp61 = (unsigned long )__cil_tmp60;
 9703#line 388
 9704    __cil_tmp62 = __cil_tmp61 + 80;
 9705#line 388
 9706    __cil_tmp63 = (struct list_head *)__cil_tmp62;
 9707#line 388
 9708    __cil_tmp64 = (unsigned int )__cil_tmp63;
 9709#line 388
 9710    __cil_tmp65 = (char *)__mptr___1;
 9711#line 388
 9712    __cil_tmp66 = __cil_tmp65 - __cil_tmp64;
 9713#line 388
 9714    next_ctx = (struct vmw_resource *)__cil_tmp66;
 9715  }
 9716  while_break: /* CIL Label */ ;
 9717  }
 9718  {
 9719#line 400
 9720  __cil_tmp67 = (unsigned long )sw_context;
 9721#line 400
 9722  __cil_tmp68 = __cil_tmp67 + 131256;
 9723#line 400
 9724  __cil_tmp69 = *((struct ttm_buffer_object **)__cil_tmp68);
 9725#line 400
 9726  __cil_tmp70 = (unsigned long )__cil_tmp69;
 9727#line 400
 9728  __cil_tmp71 = (unsigned long )dev_priv;
 9729#line 400
 9730  __cil_tmp72 = __cil_tmp71 + 134752;
 9731#line 400
 9732  __cil_tmp73 = *((struct ttm_buffer_object **)__cil_tmp72);
 9733#line 400
 9734  __cil_tmp74 = (unsigned long )__cil_tmp73;
 9735#line 400
 9736  if (__cil_tmp74 != __cil_tmp70) {
 9737    {
 9738#line 401
 9739    __cil_tmp75 = (unsigned long )dev_priv;
 9740#line 401
 9741    __cil_tmp76 = __cil_tmp75 + 134752;
 9742#line 401
 9743    if (*((struct ttm_buffer_object **)__cil_tmp76)) {
 9744      {
 9745#line 402
 9746      __cil_tmp77 = (unsigned long )dev_priv;
 9747#line 402
 9748      __cil_tmp78 = __cil_tmp77 + 134752;
 9749#line 402
 9750      __cil_tmp79 = *((struct ttm_buffer_object **)__cil_tmp78);
 9751#line 402
 9752      __cil_tmp80 = (bool )0;
 9753#line 402
 9754      vmw_bo_pin(__cil_tmp79, __cil_tmp80);
 9755#line 403
 9756      __cil_tmp81 = (unsigned long )dev_priv;
 9757#line 403
 9758      __cil_tmp82 = __cil_tmp81 + 134752;
 9759#line 403
 9760      __cil_tmp83 = (struct ttm_buffer_object **)__cil_tmp82;
 9761#line 403
 9762      ttm_bo_unref(__cil_tmp83);
 9763      }
 9764    } else {
 9765
 9766    }
 9767    }
 9768    {
 9769#line 406
 9770    __cil_tmp84 = (unsigned long )sw_context;
 9771#line 406
 9772    __cil_tmp85 = __cil_tmp84 + 131256;
 9773#line 406
 9774    __cil_tmp86 = *((struct ttm_buffer_object **)__cil_tmp85);
 9775#line 406
 9776    __cil_tmp87 = (bool )1;
 9777#line 406
 9778    vmw_bo_pin(__cil_tmp86, __cil_tmp87);
 9779#line 414
 9780    __cil_tmp88 = (unsigned long )dev_priv;
 9781#line 414
 9782    __cil_tmp89 = __cil_tmp88 + 134744;
 9783#line 414
 9784    __cil_tmp90 = *((struct ttm_buffer_object **)__cil_tmp89);
 9785#line 414
 9786    __cil_tmp91 = (bool )1;
 9787#line 414
 9788    vmw_bo_pin(__cil_tmp90, __cil_tmp91);
 9789#line 415
 9790    __cil_tmp92 = (unsigned long )dev_priv;
 9791#line 415
 9792    __cil_tmp93 = __cil_tmp92 + 134764;
 9793#line 415
 9794    *((bool *)__cil_tmp93) = (bool )1;
 9795#line 417
 9796    __cil_tmp94 = (unsigned long )dev_priv;
 9797#line 417
 9798    __cil_tmp95 = __cil_tmp94 + 134760;
 9799#line 417
 9800    __cil_tmp96 = (unsigned long )sw_context;
 9801#line 417
 9802    __cil_tmp97 = __cil_tmp96 + 131264;
 9803#line 417
 9804    *((uint32_t *)__cil_tmp95) = *((uint32_t *)__cil_tmp97);
 9805#line 418
 9806    __cil_tmp98 = (unsigned long )dev_priv;
 9807#line 418
 9808    __cil_tmp99 = __cil_tmp98 + 134752;
 9809#line 418
 9810    __cil_tmp100 = (unsigned long )sw_context;
 9811#line 418
 9812    __cil_tmp101 = __cil_tmp100 + 131256;
 9813#line 418
 9814    __cil_tmp102 = *((struct ttm_buffer_object **)__cil_tmp101);
 9815#line 418
 9816    *((struct ttm_buffer_object **)__cil_tmp99) = ttm_bo_reference(__cil_tmp102);
 9817    }
 9818  } else {
 9819
 9820  }
 9821  }
 9822#line 421
 9823  return;
 9824}
 9825}
 9826#line 431 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 9827static void vmw_query_switch_backoff(struct vmw_sw_context *sw_context ) 
 9828{ struct list_head *list ;
 9829  struct list_head *next ;
 9830  unsigned long __cil_tmp4 ;
 9831  unsigned long __cil_tmp5 ;
 9832  unsigned long __cil_tmp6 ;
 9833  unsigned long __cil_tmp7 ;
 9834  struct list_head *__cil_tmp8 ;
 9835  unsigned long __cil_tmp9 ;
 9836  unsigned long __cil_tmp10 ;
 9837
 9838  {
 9839#line 435
 9840  __cil_tmp4 = (unsigned long )sw_context;
 9841#line 435
 9842  __cil_tmp5 = __cil_tmp4 + 131240;
 9843#line 435
 9844  list = *((struct list_head **)__cil_tmp5);
 9845#line 435
 9846  next = *((struct list_head **)list);
 9847  {
 9848#line 435
 9849  while (1) {
 9850    while_continue: /* CIL Label */ ;
 9851    {
 9852#line 435
 9853    __cil_tmp6 = (unsigned long )sw_context;
 9854#line 435
 9855    __cil_tmp7 = __cil_tmp6 + 131240;
 9856#line 435
 9857    __cil_tmp8 = (struct list_head *)__cil_tmp7;
 9858#line 435
 9859    __cil_tmp9 = (unsigned long )__cil_tmp8;
 9860#line 435
 9861    __cil_tmp10 = (unsigned long )list;
 9862#line 435
 9863    if (__cil_tmp10 != __cil_tmp9) {
 9864
 9865    } else {
 9866#line 435
 9867      goto while_break;
 9868    }
 9869    }
 9870    {
 9871#line 436
 9872    list_del_init(list);
 9873#line 435
 9874    list = next;
 9875#line 435
 9876    next = *((struct list_head **)list);
 9877    }
 9878  }
 9879  while_break: /* CIL Label */ ;
 9880  }
 9881#line 438
 9882  return;
 9883}
 9884}
 9885#line 440 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
 9886static int vmw_translate_guest_ptr(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
 9887                                   SVGAGuestPtr *ptr , struct vmw_dma_buffer **vmw_bo_p ) 
 9888{ struct vmw_dma_buffer *vmw_bo ;
 9889  struct ttm_buffer_object *bo ;
 9890  uint32_t handle ;
 9891  struct vmw_relocation *reloc ;
 9892  int ret ;
 9893  long tmp___7 ;
 9894  long tmp___8 ;
 9895  uint32_t tmp___9 ;
 9896  long tmp___10 ;
 9897  struct vmw_dma_buffer **__cil_tmp14 ;
 9898  void *__cil_tmp15 ;
 9899  unsigned long __cil_tmp16 ;
 9900  unsigned long __cil_tmp17 ;
 9901  struct ttm_object_file *__cil_tmp18 ;
 9902  int __cil_tmp19 ;
 9903  int __cil_tmp20 ;
 9904  int __cil_tmp21 ;
 9905  long __cil_tmp22 ;
 9906  struct vmw_dma_buffer **__cil_tmp23 ;
 9907  struct vmw_dma_buffer *__cil_tmp24 ;
 9908  unsigned long __cil_tmp25 ;
 9909  unsigned long __cil_tmp26 ;
 9910  uint32_t __cil_tmp27 ;
 9911  int __cil_tmp28 ;
 9912  int __cil_tmp29 ;
 9913  int __cil_tmp30 ;
 9914  long __cil_tmp31 ;
 9915  unsigned long __cil_tmp32 ;
 9916  unsigned long __cil_tmp33 ;
 9917  unsigned long __cil_tmp34 ;
 9918  unsigned long __cil_tmp35 ;
 9919  unsigned long __cil_tmp36 ;
 9920  unsigned long __cil_tmp37 ;
 9921  uint32_t __cil_tmp38 ;
 9922  unsigned long __cil_tmp39 ;
 9923  unsigned long __cil_tmp40 ;
 9924  unsigned long __cil_tmp41 ;
 9925  unsigned long __cil_tmp42 ;
 9926  uint32_t __cil_tmp43 ;
 9927  unsigned long __cil_tmp44 ;
 9928  unsigned long __cil_tmp45 ;
 9929  uint32_t *__cil_tmp46 ;
 9930  int __cil_tmp47 ;
 9931  int __cil_tmp48 ;
 9932  int __cil_tmp49 ;
 9933  long __cil_tmp50 ;
 9934  struct vmw_dma_buffer **__cil_tmp51 ;
 9935  void *__cil_tmp52 ;
 9936
 9937  {
 9938  {
 9939#line 445
 9940  __cil_tmp14 = & vmw_bo;
 9941#line 445
 9942  __cil_tmp15 = (void *)0;
 9943#line 445
 9944  *__cil_tmp14 = (struct vmw_dma_buffer *)__cil_tmp15;
 9945#line 447
 9946  handle = *((uint32 *)ptr);
 9947#line 451
 9948  __cil_tmp16 = (unsigned long )sw_context;
 9949#line 451
 9950  __cil_tmp17 = __cil_tmp16 + 88;
 9951#line 451
 9952  __cil_tmp18 = *((struct ttm_object_file **)__cil_tmp17);
 9953#line 451
 9954  ret = vmw_user_dmabuf_lookup(__cil_tmp18, handle, & vmw_bo);
 9955#line 452
 9956  __cil_tmp19 = ret != 0;
 9957#line 452
 9958  __cil_tmp20 = ! __cil_tmp19;
 9959#line 452
 9960  __cil_tmp21 = ! __cil_tmp20;
 9961#line 452
 9962  __cil_tmp22 = (long )__cil_tmp21;
 9963#line 452
 9964  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
 9965  }
 9966#line 452
 9967  if (tmp___7) {
 9968    {
 9969#line 453
 9970    drm_err("vmw_translate_guest_ptr", "Could not find or use GMR region.\n");
 9971    }
 9972#line 454
 9973    return (-22);
 9974  } else {
 9975
 9976  }
 9977  {
 9978#line 456
 9979  __cil_tmp23 = & vmw_bo;
 9980#line 456
 9981  __cil_tmp24 = *__cil_tmp23;
 9982#line 456
 9983  bo = (struct ttm_buffer_object *)__cil_tmp24;
 9984#line 458
 9985  __cil_tmp25 = (unsigned long )sw_context;
 9986#line 458
 9987  __cil_tmp26 = __cil_tmp25 + 32880;
 9988#line 458
 9989  __cil_tmp27 = *((uint32_t *)__cil_tmp26);
 9990#line 458
 9991  __cil_tmp28 = __cil_tmp27 >= 2048U;
 9992#line 458
 9993  __cil_tmp29 = ! __cil_tmp28;
 9994#line 458
 9995  __cil_tmp30 = ! __cil_tmp29;
 9996#line 458
 9997  __cil_tmp31 = (long )__cil_tmp30;
 9998#line 458
 9999  tmp___8 = __builtin_expect(__cil_tmp31, 0L);
10000  }
10001#line 458
10002  if (tmp___8) {
10003    {
10004#line 459
10005    drm_err("vmw_translate_guest_ptr", "Max number relocations per submission exceeded\n");
10006#line 461
10007    ret = -22;
10008    }
10009#line 462
10010    goto out_no_reloc;
10011  } else {
10012
10013  }
10014  {
10015#line 465
10016  __cil_tmp32 = (unsigned long )sw_context;
10017#line 465
10018  __cil_tmp33 = __cil_tmp32 + 32880;
10019#line 465
10020  tmp___9 = *((uint32_t *)__cil_tmp33);
10021#line 465
10022  __cil_tmp34 = (unsigned long )sw_context;
10023#line 465
10024  __cil_tmp35 = __cil_tmp34 + 32880;
10025#line 465
10026  __cil_tmp36 = (unsigned long )sw_context;
10027#line 465
10028  __cil_tmp37 = __cil_tmp36 + 32880;
10029#line 465
10030  __cil_tmp38 = *((uint32_t *)__cil_tmp37);
10031#line 465
10032  *((uint32_t *)__cil_tmp35) = __cil_tmp38 + 1U;
10033#line 465
10034  __cil_tmp39 = tmp___9 * 16UL;
10035#line 465
10036  __cil_tmp40 = 112 + __cil_tmp39;
10037#line 465
10038  __cil_tmp41 = (unsigned long )sw_context;
10039#line 465
10040  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
10041#line 465
10042  reloc = (struct vmw_relocation *)__cil_tmp42;
10043#line 466
10044  *((SVGAGuestPtr **)reloc) = ptr;
10045#line 468
10046  __cil_tmp43 = (uint32_t )1;
10047#line 468
10048  __cil_tmp44 = (unsigned long )reloc;
10049#line 468
10050  __cil_tmp45 = __cil_tmp44 + 8;
10051#line 468
10052  __cil_tmp46 = (uint32_t *)__cil_tmp45;
10053#line 468
10054  ret = vmw_bo_to_validate_list(sw_context, bo, __cil_tmp43, __cil_tmp46);
10055#line 470
10056  __cil_tmp47 = ret != 0;
10057#line 470
10058  __cil_tmp48 = ! __cil_tmp47;
10059#line 470
10060  __cil_tmp49 = ! __cil_tmp48;
10061#line 470
10062  __cil_tmp50 = (long )__cil_tmp49;
10063#line 470
10064  tmp___10 = __builtin_expect(__cil_tmp50, 0L);
10065  }
10066#line 470
10067  if (tmp___10) {
10068#line 471
10069    goto out_no_reloc;
10070  } else {
10071
10072  }
10073#line 473
10074  __cil_tmp51 = & vmw_bo;
10075#line 473
10076  *vmw_bo_p = *__cil_tmp51;
10077#line 474
10078  return (0);
10079  out_no_reloc: 
10080  {
10081#line 477
10082  vmw_dmabuf_unreference(& vmw_bo);
10083#line 478
10084  __cil_tmp52 = (void *)0;
10085#line 478
10086  vmw_bo_p = (struct vmw_dma_buffer **)__cil_tmp52;
10087  }
10088#line 479
10089  return (ret);
10090}
10091}
10092#line 482 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
10093static int vmw_cmd_end_query(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
10094                             SVGA3dCmdHeader *header ) 
10095{ struct vmw_dma_buffer *vmw_bo ;
10096  struct vmw_query_cmd *cmd ;
10097  int ret ;
10098  SVGA3dCmdHeader    *__mptr ;
10099  long tmp___7 ;
10100  long tmp___8 ;
10101  struct vmw_query_cmd *__cil_tmp10 ;
10102  SVGA3dCmdHeader *__cil_tmp11 ;
10103  unsigned int __cil_tmp12 ;
10104  char *__cil_tmp13 ;
10105  char *__cil_tmp14 ;
10106  int __cil_tmp15 ;
10107  int __cil_tmp16 ;
10108  int __cil_tmp17 ;
10109  long __cil_tmp18 ;
10110  unsigned long __cil_tmp19 ;
10111  unsigned long __cil_tmp20 ;
10112  unsigned long __cil_tmp21 ;
10113  SVGAGuestPtr *__cil_tmp22 ;
10114  int __cil_tmp23 ;
10115  int __cil_tmp24 ;
10116  int __cil_tmp25 ;
10117  long __cil_tmp26 ;
10118  unsigned long __cil_tmp27 ;
10119  unsigned long __cil_tmp28 ;
10120  uint32 __cil_tmp29 ;
10121  struct vmw_dma_buffer **__cil_tmp30 ;
10122  struct vmw_dma_buffer *__cil_tmp31 ;
10123  struct ttm_buffer_object *__cil_tmp32 ;
10124
10125  {
10126  {
10127#line 493
10128  __mptr = (SVGA3dCmdHeader    *)header;
10129#line 493
10130  __cil_tmp10 = (struct vmw_query_cmd *)0;
10131#line 493
10132  __cil_tmp11 = (SVGA3dCmdHeader *)__cil_tmp10;
10133#line 493
10134  __cil_tmp12 = (unsigned int )__cil_tmp11;
10135#line 493
10136  __cil_tmp13 = (char *)__mptr;
10137#line 493
10138  __cil_tmp14 = __cil_tmp13 - __cil_tmp12;
10139#line 493
10140  cmd = (struct vmw_query_cmd *)__cil_tmp14;
10141#line 494
10142  ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
10143#line 495
10144  __cil_tmp15 = ret != 0;
10145#line 495
10146  __cil_tmp16 = ! __cil_tmp15;
10147#line 495
10148  __cil_tmp17 = ! __cil_tmp16;
10149#line 495
10150  __cil_tmp18 = (long )__cil_tmp17;
10151#line 495
10152  tmp___7 = __builtin_expect(__cil_tmp18, 0L);
10153  }
10154#line 495
10155  if (tmp___7) {
10156#line 496
10157    return (ret);
10158  } else {
10159
10160  }
10161  {
10162#line 498
10163  __cil_tmp19 = 8 + 8;
10164#line 498
10165  __cil_tmp20 = (unsigned long )cmd;
10166#line 498
10167  __cil_tmp21 = __cil_tmp20 + __cil_tmp19;
10168#line 498
10169  __cil_tmp22 = (SVGAGuestPtr *)__cil_tmp21;
10170#line 498
10171  ret = vmw_translate_guest_ptr(dev_priv, sw_context, __cil_tmp22, & vmw_bo);
10172#line 501
10173  __cil_tmp23 = ret != 0;
10174#line 501
10175  __cil_tmp24 = ! __cil_tmp23;
10176#line 501
10177  __cil_tmp25 = ! __cil_tmp24;
10178#line 501
10179  __cil_tmp26 = (long )__cil_tmp25;
10180#line 501
10181  tmp___8 = __builtin_expect(__cil_tmp26, 0L);
10182  }
10183#line 501
10184  if (tmp___8) {
10185#line 502
10186    return (ret);
10187  } else {
10188
10189  }
10190  {
10191#line 504
10192  __cil_tmp27 = (unsigned long )cmd;
10193#line 504
10194  __cil_tmp28 = __cil_tmp27 + 8;
10195#line 504
10196  __cil_tmp29 = *((uint32 *)__cil_tmp28);
10197#line 504
10198  __cil_tmp30 = & vmw_bo;
10199#line 504
10200  __cil_tmp31 = *__cil_tmp30;
10201#line 504
10202  __cil_tmp32 = (struct ttm_buffer_object *)__cil_tmp31;
10203#line 504
10204  ret = vmw_query_bo_switch_prepare(dev_priv, __cil_tmp29, __cil_tmp32, sw_context);
10205#line 507
10206  vmw_dmabuf_unreference(& vmw_bo);
10207  }
10208#line 508
10209  return (ret);
10210}
10211}
10212#line 511 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
10213static int vmw_cmd_wait_query(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
10214                              SVGA3dCmdHeader *header ) 
10215{ struct vmw_dma_buffer *vmw_bo ;
10216  struct vmw_query_cmd___0 *cmd ;
10217  int ret ;
10218  struct vmw_resource *ctx ;
10219  SVGA3dCmdHeader    *__mptr ;
10220  long tmp___7 ;
10221  long tmp___8 ;
10222  int tmp___9 ;
10223  struct vmw_query_cmd___0 *__cil_tmp12 ;
10224  SVGA3dCmdHeader *__cil_tmp13 ;
10225  unsigned int __cil_tmp14 ;
10226  char *__cil_tmp15 ;
10227  char *__cil_tmp16 ;
10228  int __cil_tmp17 ;
10229  int __cil_tmp18 ;
10230  int __cil_tmp19 ;
10231  long __cil_tmp20 ;
10232  unsigned long __cil_tmp21 ;
10233  unsigned long __cil_tmp22 ;
10234  unsigned long __cil_tmp23 ;
10235  SVGAGuestPtr *__cil_tmp24 ;
10236  int __cil_tmp25 ;
10237  int __cil_tmp26 ;
10238  int __cil_tmp27 ;
10239  long __cil_tmp28 ;
10240  unsigned long __cil_tmp29 ;
10241  unsigned long __cil_tmp30 ;
10242  unsigned long __cil_tmp31 ;
10243  unsigned long __cil_tmp32 ;
10244  struct list_head *__cil_tmp33 ;
10245  struct list_head    *__cil_tmp34 ;
10246  unsigned long __cil_tmp35 ;
10247  unsigned long __cil_tmp36 ;
10248  struct list_head *__cil_tmp37 ;
10249
10250  {
10251  {
10252#line 523
10253  __mptr = (SVGA3dCmdHeader    *)header;
10254#line 523
10255  __cil_tmp12 = (struct vmw_query_cmd___0 *)0;
10256#line 523
10257  __cil_tmp13 = (SVGA3dCmdHeader *)__cil_tmp12;
10258#line 523
10259  __cil_tmp14 = (unsigned int )__cil_tmp13;
10260#line 523
10261  __cil_tmp15 = (char *)__mptr;
10262#line 523
10263  __cil_tmp16 = __cil_tmp15 - __cil_tmp14;
10264#line 523
10265  cmd = (struct vmw_query_cmd___0 *)__cil_tmp16;
10266#line 524
10267  ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
10268#line 525
10269  __cil_tmp17 = ret != 0;
10270#line 525
10271  __cil_tmp18 = ! __cil_tmp17;
10272#line 525
10273  __cil_tmp19 = ! __cil_tmp18;
10274#line 525
10275  __cil_tmp20 = (long )__cil_tmp19;
10276#line 525
10277  tmp___7 = __builtin_expect(__cil_tmp20, 0L);
10278  }
10279#line 525
10280  if (tmp___7) {
10281#line 526
10282    return (ret);
10283  } else {
10284
10285  }
10286  {
10287#line 528
10288  __cil_tmp21 = 8 + 8;
10289#line 528
10290  __cil_tmp22 = (unsigned long )cmd;
10291#line 528
10292  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
10293#line 528
10294  __cil_tmp24 = (SVGAGuestPtr *)__cil_tmp23;
10295#line 528
10296  ret = vmw_translate_guest_ptr(dev_priv, sw_context, __cil_tmp24, & vmw_bo);
10297#line 531
10298  __cil_tmp25 = ret != 0;
10299#line 531
10300  __cil_tmp26 = ! __cil_tmp25;
10301#line 531
10302  __cil_tmp27 = ! __cil_tmp26;
10303#line 531
10304  __cil_tmp28 = (long )__cil_tmp27;
10305#line 531
10306  tmp___8 = __builtin_expect(__cil_tmp28, 0L);
10307  }
10308#line 531
10309  if (tmp___8) {
10310#line 532
10311    return (ret);
10312  } else {
10313
10314  }
10315  {
10316#line 534
10317  vmw_dmabuf_unreference(& vmw_bo);
10318#line 541
10319  __cil_tmp29 = (unsigned long )sw_context;
10320#line 541
10321  __cil_tmp30 = __cil_tmp29 + 64;
10322#line 541
10323  ctx = *((struct vmw_resource **)__cil_tmp30);
10324#line 542
10325  __cil_tmp31 = (unsigned long )ctx;
10326#line 542
10327  __cil_tmp32 = __cil_tmp31 + 80;
10328#line 542
10329  __cil_tmp33 = (struct list_head *)__cil_tmp32;
10330#line 542
10331  __cil_tmp34 = (struct list_head    *)__cil_tmp33;
10332#line 542
10333  tmp___9 = list_empty(__cil_tmp34);
10334  }
10335#line 542
10336  if (tmp___9) {
10337
10338  } else {
10339    {
10340#line 543
10341    __cil_tmp35 = (unsigned long )ctx;
10342#line 543
10343    __cil_tmp36 = __cil_tmp35 + 80;
10344#line 543
10345    __cil_tmp37 = (struct list_head *)__cil_tmp36;
10346#line 543
10347    list_del_init(__cil_tmp37);
10348    }
10349  }
10350#line 545
10351  return (0);
10352}
10353}
10354#line 548 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
10355static int vmw_cmd_dma(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
10356                       SVGA3dCmdHeader *header ) 
10357{ struct vmw_dma_buffer *vmw_bo ;
10358  struct ttm_buffer_object *bo ;
10359  struct vmw_surface *srf ;
10360  struct vmw_dma_cmd *cmd ;
10361  int ret ;
10362  struct vmw_resource *res ;
10363  SVGA3dCmdHeader    *__mptr ;
10364  long tmp___7 ;
10365  long tmp___8 ;
10366  struct vmw_dma_buffer **__cil_tmp13 ;
10367  void *__cil_tmp14 ;
10368  struct vmw_surface **__cil_tmp15 ;
10369  void *__cil_tmp16 ;
10370  struct vmw_dma_cmd *__cil_tmp17 ;
10371  SVGA3dCmdHeader *__cil_tmp18 ;
10372  unsigned int __cil_tmp19 ;
10373  char *__cil_tmp20 ;
10374  char *__cil_tmp21 ;
10375  unsigned long __cil_tmp22 ;
10376  unsigned long __cil_tmp23 ;
10377  SVGAGuestPtr *__cil_tmp24 ;
10378  int __cil_tmp25 ;
10379  int __cil_tmp26 ;
10380  int __cil_tmp27 ;
10381  long __cil_tmp28 ;
10382  struct vmw_dma_buffer **__cil_tmp29 ;
10383  struct vmw_dma_buffer *__cil_tmp30 ;
10384  unsigned long __cil_tmp31 ;
10385  unsigned long __cil_tmp32 ;
10386  struct ttm_object_file *__cil_tmp33 ;
10387  unsigned long __cil_tmp34 ;
10388  unsigned long __cil_tmp35 ;
10389  unsigned long __cil_tmp36 ;
10390  uint32 __cil_tmp37 ;
10391  struct vmw_surface **__cil_tmp38 ;
10392  struct vmw_surface *__cil_tmp39 ;
10393  int __cil_tmp40 ;
10394  int __cil_tmp41 ;
10395  int __cil_tmp42 ;
10396  long __cil_tmp43 ;
10397  unsigned long __cil_tmp44 ;
10398  unsigned long __cil_tmp45 ;
10399  unsigned long __cil_tmp46 ;
10400  unsigned long __cil_tmp47 ;
10401  struct vmw_surface **__cil_tmp48 ;
10402  struct vmw_surface *__cil_tmp49 ;
10403  unsigned long __cil_tmp50 ;
10404  unsigned long __cil_tmp51 ;
10405  int __cil_tmp52 ;
10406  struct vmw_surface **__cil_tmp53 ;
10407  struct vmw_surface *__cil_tmp54 ;
10408  unsigned long __cil_tmp55 ;
10409  unsigned long __cil_tmp56 ;
10410  struct ttm_object_file *__cil_tmp57 ;
10411  struct vmw_resource **__cil_tmp58 ;
10412  struct vmw_surface **__cil_tmp59 ;
10413  struct vmw_surface *__cil_tmp60 ;
10414
10415  {
10416  {
10417#line 552
10418  __cil_tmp13 = & vmw_bo;
10419#line 552
10420  __cil_tmp14 = (void *)0;
10421#line 552
10422  *__cil_tmp13 = (struct vmw_dma_buffer *)__cil_tmp14;
10423#line 554
10424  __cil_tmp15 = & srf;
10425#line 554
10426  __cil_tmp16 = (void *)0;
10427#line 554
10428  *__cil_tmp15 = (struct vmw_surface *)__cil_tmp16;
10429#line 562
10430  __mptr = (SVGA3dCmdHeader    *)header;
10431#line 562
10432  __cil_tmp17 = (struct vmw_dma_cmd *)0;
10433#line 562
10434  __cil_tmp18 = (SVGA3dCmdHeader *)__cil_tmp17;
10435#line 562
10436  __cil_tmp19 = (unsigned int )__cil_tmp18;
10437#line 562
10438  __cil_tmp20 = (char *)__mptr;
10439#line 562
10440  __cil_tmp21 = __cil_tmp20 - __cil_tmp19;
10441#line 562
10442  cmd = (struct vmw_dma_cmd *)__cil_tmp21;
10443#line 563
10444  __cil_tmp22 = (unsigned long )cmd;
10445#line 563
10446  __cil_tmp23 = __cil_tmp22 + 8;
10447#line 563
10448  __cil_tmp24 = (SVGAGuestPtr *)__cil_tmp23;
10449#line 563
10450  ret = vmw_translate_guest_ptr(dev_priv, sw_context, __cil_tmp24, & vmw_bo);
10451#line 566
10452  __cil_tmp25 = ret != 0;
10453#line 566
10454  __cil_tmp26 = ! __cil_tmp25;
10455#line 566
10456  __cil_tmp27 = ! __cil_tmp26;
10457#line 566
10458  __cil_tmp28 = (long )__cil_tmp27;
10459#line 566
10460  tmp___7 = __builtin_expect(__cil_tmp28, 0L);
10461  }
10462#line 566
10463  if (tmp___7) {
10464#line 567
10465    return (ret);
10466  } else {
10467
10468  }
10469  {
10470#line 569
10471  __cil_tmp29 = & vmw_bo;
10472#line 569
10473  __cil_tmp30 = *__cil_tmp29;
10474#line 569
10475  bo = (struct ttm_buffer_object *)__cil_tmp30;
10476#line 570
10477  __cil_tmp31 = (unsigned long )sw_context;
10478#line 570
10479  __cil_tmp32 = __cil_tmp31 + 88;
10480#line 570
10481  __cil_tmp33 = *((struct ttm_object_file **)__cil_tmp32);
10482#line 570
10483  __cil_tmp34 = 8 + 12;
10484#line 570
10485  __cil_tmp35 = (unsigned long )cmd;
10486#line 570
10487  __cil_tmp36 = __cil_tmp35 + __cil_tmp34;
10488#line 570
10489  __cil_tmp37 = *((uint32 *)__cil_tmp36);
10490#line 570
10491  ret = vmw_user_surface_lookup_handle(dev_priv, __cil_tmp33, __cil_tmp37, & srf);
10492  }
10493#line 572
10494  if (ret) {
10495    {
10496#line 573
10497    drm_err("vmw_cmd_dma", "could not find surface\n");
10498    }
10499#line 574
10500    goto out_no_reloc;
10501  } else {
10502
10503  }
10504  {
10505#line 577
10506  __cil_tmp38 = & srf;
10507#line 577
10508  __cil_tmp39 = *__cil_tmp38;
10509#line 577
10510  ret = vmw_surface_validate(dev_priv, __cil_tmp39);
10511#line 578
10512  __cil_tmp40 = ret != 0;
10513#line 578
10514  __cil_tmp41 = ! __cil_tmp40;
10515#line 578
10516  __cil_tmp42 = ! __cil_tmp41;
10517#line 578
10518  __cil_tmp43 = (long )__cil_tmp42;
10519#line 578
10520  tmp___8 = __builtin_expect(__cil_tmp43, 0L);
10521  }
10522#line 578
10523  if (tmp___8) {
10524#line 579
10525    if (ret != -512) {
10526      {
10527#line 580
10528      drm_err("vmw_cmd_dma", "Culd not validate surface.\n");
10529      }
10530    } else {
10531
10532    }
10533#line 581
10534    goto out_no_validate;
10535  } else {
10536
10537  }
10538  {
10539#line 587
10540  __cil_tmp44 = 8 + 12;
10541#line 587
10542  __cil_tmp45 = (unsigned long )cmd;
10543#line 587
10544  __cil_tmp46 = __cil_tmp45 + __cil_tmp44;
10545#line 587
10546  __cil_tmp47 = 0 + 24;
10547#line 587
10548  __cil_tmp48 = & srf;
10549#line 587
10550  __cil_tmp49 = *__cil_tmp48;
10551#line 587
10552  __cil_tmp50 = (unsigned long )__cil_tmp49;
10553#line 587
10554  __cil_tmp51 = __cil_tmp50 + __cil_tmp47;
10555#line 587
10556  __cil_tmp52 = *((int *)__cil_tmp51);
10557#line 587
10558  *((uint32 *)__cil_tmp46) = (uint32 )__cil_tmp52;
10559#line 588
10560  __cil_tmp53 = & srf;
10561#line 588
10562  __cil_tmp54 = *__cil_tmp53;
10563#line 588
10564  __cil_tmp55 = (unsigned long )sw_context;
10565#line 588
10566  __cil_tmp56 = __cil_tmp55 + 88;
10567#line 588
10568  __cil_tmp57 = *((struct ttm_object_file **)__cil_tmp56);
10569#line 588
10570  vmw_kms_cursor_snoop(__cil_tmp54, __cil_tmp57, bo, header);
10571#line 590
10572  vmw_dmabuf_unreference(& vmw_bo);
10573#line 592
10574  __cil_tmp58 = & res;
10575#line 592
10576  __cil_tmp59 = & srf;
10577#line 592
10578  __cil_tmp60 = *__cil_tmp59;
10579#line 592
10580  *__cil_tmp58 = (struct vmw_resource *)__cil_tmp60;
10581#line 593
10582  vmw_resource_to_validate_list(sw_context, & res);
10583  }
10584#line 595
10585  return (0);
10586  out_no_validate: 
10587  {
10588#line 598
10589  vmw_surface_unreference(& srf);
10590  }
10591  out_no_reloc: 
10592  {
10593#line 600
10594  vmw_dmabuf_unreference(& vmw_bo);
10595  }
10596#line 601
10597  return (ret);
10598}
10599}
10600#line 604 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
10601static int vmw_cmd_draw(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
10602                        SVGA3dCmdHeader *header ) 
10603{ struct vmw_draw_cmd *cmd ;
10604  SVGA3dVertexDecl *decl ;
10605  SVGA3dPrimitiveRange *range ;
10606  uint32_t i ;
10607  uint32_t maxnum ;
10608  int ret ;
10609  long tmp___7 ;
10610  SVGA3dCmdHeader    *__mptr ;
10611  long tmp___8 ;
10612  long tmp___9 ;
10613  long tmp___10 ;
10614  long tmp___11 ;
10615  unsigned long __cil_tmp16 ;
10616  unsigned long __cil_tmp17 ;
10617  int __cil_tmp18 ;
10618  int __cil_tmp19 ;
10619  int __cil_tmp20 ;
10620  long __cil_tmp21 ;
10621  struct vmw_draw_cmd *__cil_tmp22 ;
10622  SVGA3dCmdHeader *__cil_tmp23 ;
10623  unsigned int __cil_tmp24 ;
10624  char *__cil_tmp25 ;
10625  char *__cil_tmp26 ;
10626  unsigned long __cil_tmp27 ;
10627  unsigned long __cil_tmp28 ;
10628  uint32 __cil_tmp29 ;
10629  unsigned long __cil_tmp30 ;
10630  unsigned long __cil_tmp31 ;
10631  unsigned long __cil_tmp32 ;
10632  unsigned long __cil_tmp33 ;
10633  unsigned long __cil_tmp34 ;
10634  unsigned long __cil_tmp35 ;
10635  uint32 __cil_tmp36 ;
10636  int __cil_tmp37 ;
10637  int __cil_tmp38 ;
10638  int __cil_tmp39 ;
10639  long __cil_tmp40 ;
10640  unsigned long __cil_tmp41 ;
10641  unsigned long __cil_tmp42 ;
10642  unsigned long __cil_tmp43 ;
10643  uint32 __cil_tmp44 ;
10644  unsigned long __cil_tmp45 ;
10645  unsigned long __cil_tmp46 ;
10646  uint32 *__cil_tmp47 ;
10647  int __cil_tmp48 ;
10648  int __cil_tmp49 ;
10649  int __cil_tmp50 ;
10650  long __cil_tmp51 ;
10651  unsigned long __cil_tmp52 ;
10652  unsigned long __cil_tmp53 ;
10653  unsigned long __cil_tmp54 ;
10654  uint32 __cil_tmp55 ;
10655  unsigned long __cil_tmp56 ;
10656  unsigned long __cil_tmp57 ;
10657  unsigned long __cil_tmp58 ;
10658  unsigned long __cil_tmp59 ;
10659  uint32 __cil_tmp60 ;
10660  unsigned long __cil_tmp61 ;
10661  unsigned long __cil_tmp62 ;
10662  unsigned long __cil_tmp63 ;
10663  unsigned long __cil_tmp64 ;
10664  unsigned long __cil_tmp65 ;
10665  unsigned long __cil_tmp66 ;
10666  unsigned long __cil_tmp67 ;
10667  uint32 __cil_tmp68 ;
10668  int __cil_tmp69 ;
10669  int __cil_tmp70 ;
10670  int __cil_tmp71 ;
10671  long __cil_tmp72 ;
10672  unsigned long __cil_tmp73 ;
10673  unsigned long __cil_tmp74 ;
10674  unsigned long __cil_tmp75 ;
10675  uint32 __cil_tmp76 ;
10676  unsigned long __cil_tmp77 ;
10677  unsigned long __cil_tmp78 ;
10678  uint32 *__cil_tmp79 ;
10679  int __cil_tmp80 ;
10680  int __cil_tmp81 ;
10681  int __cil_tmp82 ;
10682  long __cil_tmp83 ;
10683
10684  {
10685  {
10686#line 612
10687  __cil_tmp16 = (unsigned long )header;
10688#line 612
10689  __cil_tmp17 = __cil_tmp16 + 20UL;
10690#line 612
10691  decl = (SVGA3dVertexDecl *)__cil_tmp17;
10692#line 619
10693  ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
10694#line 620
10695  __cil_tmp18 = ret != 0;
10696#line 620
10697  __cil_tmp19 = ! __cil_tmp18;
10698#line 620
10699  __cil_tmp20 = ! __cil_tmp19;
10700#line 620
10701  __cil_tmp21 = (long )__cil_tmp20;
10702#line 620
10703  tmp___7 = __builtin_expect(__cil_tmp21, 0L);
10704  }
10705#line 620
10706  if (tmp___7) {
10707#line 621
10708    return (ret);
10709  } else {
10710
10711  }
10712  {
10713#line 623
10714  __mptr = (SVGA3dCmdHeader    *)header;
10715#line 623
10716  __cil_tmp22 = (struct vmw_draw_cmd *)0;
10717#line 623
10718  __cil_tmp23 = (SVGA3dCmdHeader *)__cil_tmp22;
10719#line 623
10720  __cil_tmp24 = (unsigned int )__cil_tmp23;
10721#line 623
10722  __cil_tmp25 = (char *)__mptr;
10723#line 623
10724  __cil_tmp26 = __cil_tmp25 - __cil_tmp24;
10725#line 623
10726  cmd = (struct vmw_draw_cmd *)__cil_tmp26;
10727#line 624
10728  __cil_tmp27 = (unsigned long )header;
10729#line 624
10730  __cil_tmp28 = __cil_tmp27 + 4;
10731#line 624
10732  __cil_tmp29 = *((uint32 *)__cil_tmp28);
10733#line 624
10734  __cil_tmp30 = (unsigned long )__cil_tmp29;
10735#line 624
10736  __cil_tmp31 = __cil_tmp30 - 12UL;
10737#line 624
10738  __cil_tmp32 = __cil_tmp31 / 36UL;
10739#line 624
10740  maxnum = (uint32_t )__cil_tmp32;
10741#line 626
10742  __cil_tmp33 = 8 + 4;
10743#line 626
10744  __cil_tmp34 = (unsigned long )cmd;
10745#line 626
10746  __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
10747#line 626
10748  __cil_tmp36 = *((uint32 *)__cil_tmp35);
10749#line 626
10750  __cil_tmp37 = __cil_tmp36 > maxnum;
10751#line 626
10752  __cil_tmp38 = ! __cil_tmp37;
10753#line 626
10754  __cil_tmp39 = ! __cil_tmp38;
10755#line 626
10756  __cil_tmp40 = (long )__cil_tmp39;
10757#line 626
10758  tmp___8 = __builtin_expect(__cil_tmp40, 0L);
10759  }
10760#line 626
10761  if (tmp___8) {
10762    {
10763#line 627
10764    drm_err("vmw_cmd_draw", "Illegal number of vertex declarations.\n");
10765    }
10766#line 628
10767    return (-22);
10768  } else {
10769
10770  }
10771#line 631
10772  i = (uint32_t )0;
10773  {
10774#line 631
10775  while (1) {
10776    while_continue: /* CIL Label */ ;
10777    {
10778#line 631
10779    __cil_tmp41 = 8 + 4;
10780#line 631
10781    __cil_tmp42 = (unsigned long )cmd;
10782#line 631
10783    __cil_tmp43 = __cil_tmp42 + __cil_tmp41;
10784#line 631
10785    __cil_tmp44 = *((uint32 *)__cil_tmp43);
10786#line 631
10787    if (i < __cil_tmp44) {
10788
10789    } else {
10790#line 631
10791      goto while_break;
10792    }
10793    }
10794    {
10795#line 632
10796    __cil_tmp45 = (unsigned long )decl;
10797#line 632
10798    __cil_tmp46 = __cil_tmp45 + 16;
10799#line 632
10800    __cil_tmp47 = (uint32 *)__cil_tmp46;
10801#line 632
10802    ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp47);
10803#line 634
10804    __cil_tmp48 = ret != 0;
10805#line 634
10806    __cil_tmp49 = ! __cil_tmp48;
10807#line 634
10808    __cil_tmp50 = ! __cil_tmp49;
10809#line 634
10810    __cil_tmp51 = (long )__cil_tmp50;
10811#line 634
10812    tmp___9 = __builtin_expect(__cil_tmp51, 0L);
10813    }
10814#line 634
10815    if (tmp___9) {
10816#line 635
10817      return (ret);
10818    } else {
10819
10820    }
10821#line 631
10822    i = i + 1U;
10823#line 631
10824    decl = decl + 1;
10825  }
10826  while_break: /* CIL Label */ ;
10827  }
10828  {
10829#line 638
10830  __cil_tmp52 = 8 + 4;
10831#line 638
10832  __cil_tmp53 = (unsigned long )cmd;
10833#line 638
10834  __cil_tmp54 = __cil_tmp53 + __cil_tmp52;
10835#line 638
10836  __cil_tmp55 = *((uint32 *)__cil_tmp54);
10837#line 638
10838  __cil_tmp56 = (unsigned long )__cil_tmp55;
10839#line 638
10840  __cil_tmp57 = __cil_tmp56 * 36UL;
10841#line 638
10842  __cil_tmp58 = (unsigned long )header;
10843#line 638
10844  __cil_tmp59 = __cil_tmp58 + 4;
10845#line 638
10846  __cil_tmp60 = *((uint32 *)__cil_tmp59);
10847#line 638
10848  __cil_tmp61 = (unsigned long )__cil_tmp60;
10849#line 638
10850  __cil_tmp62 = __cil_tmp61 - 12UL;
10851#line 638
10852  __cil_tmp63 = __cil_tmp62 - __cil_tmp57;
10853#line 638
10854  __cil_tmp64 = __cil_tmp63 / 28UL;
10855#line 638
10856  maxnum = (uint32_t )__cil_tmp64;
10857#line 640
10858  __cil_tmp65 = 8 + 8;
10859#line 640
10860  __cil_tmp66 = (unsigned long )cmd;
10861#line 640
10862  __cil_tmp67 = __cil_tmp66 + __cil_tmp65;
10863#line 640
10864  __cil_tmp68 = *((uint32 *)__cil_tmp67);
10865#line 640
10866  __cil_tmp69 = __cil_tmp68 > maxnum;
10867#line 640
10868  __cil_tmp70 = ! __cil_tmp69;
10869#line 640
10870  __cil_tmp71 = ! __cil_tmp70;
10871#line 640
10872  __cil_tmp72 = (long )__cil_tmp71;
10873#line 640
10874  tmp___10 = __builtin_expect(__cil_tmp72, 0L);
10875  }
10876#line 640
10877  if (tmp___10) {
10878    {
10879#line 641
10880    drm_err("vmw_cmd_draw", "Illegal number of index ranges.\n");
10881    }
10882#line 642
10883    return (-22);
10884  } else {
10885
10886  }
10887#line 645
10888  range = (SVGA3dPrimitiveRange *)decl;
10889#line 646
10890  i = (uint32_t )0;
10891  {
10892#line 646
10893  while (1) {
10894    while_continue___0: /* CIL Label */ ;
10895    {
10896#line 646
10897    __cil_tmp73 = 8 + 8;
10898#line 646
10899    __cil_tmp74 = (unsigned long )cmd;
10900#line 646
10901    __cil_tmp75 = __cil_tmp74 + __cil_tmp73;
10902#line 646
10903    __cil_tmp76 = *((uint32 *)__cil_tmp75);
10904#line 646
10905    if (i < __cil_tmp76) {
10906
10907    } else {
10908#line 646
10909      goto while_break___0;
10910    }
10911    }
10912    {
10913#line 647
10914    __cil_tmp77 = (unsigned long )range;
10915#line 647
10916    __cil_tmp78 = __cil_tmp77 + 8;
10917#line 647
10918    __cil_tmp79 = (uint32 *)__cil_tmp78;
10919#line 647
10920    ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp79);
10921#line 649
10922    __cil_tmp80 = ret != 0;
10923#line 649
10924    __cil_tmp81 = ! __cil_tmp80;
10925#line 649
10926    __cil_tmp82 = ! __cil_tmp81;
10927#line 649
10928    __cil_tmp83 = (long )__cil_tmp82;
10929#line 649
10930    tmp___11 = __builtin_expect(__cil_tmp83, 0L);
10931    }
10932#line 649
10933    if (tmp___11) {
10934#line 650
10935      return (ret);
10936    } else {
10937
10938    }
10939#line 646
10940    i = i + 1U;
10941#line 646
10942    range = range + 1;
10943  }
10944  while_break___0: /* CIL Label */ ;
10945  }
10946#line 652
10947  return (0);
10948}
10949}
10950#line 656 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
10951static int vmw_cmd_tex_state(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
10952                             SVGA3dCmdHeader *header ) 
10953{ SVGA3dTextureState *last_state ;
10954  SVGA3dTextureState *cur_state ;
10955  int ret ;
10956  long tmp___7 ;
10957  long tmp___8 ;
10958  long tmp___9 ;
10959  unsigned long __cil_tmp10 ;
10960  unsigned long __cil_tmp11 ;
10961  uint32 __cil_tmp12 ;
10962  unsigned long __cil_tmp13 ;
10963  unsigned long __cil_tmp14 ;
10964  unsigned long __cil_tmp15 ;
10965  unsigned long __cil_tmp16 ;
10966  unsigned long __cil_tmp17 ;
10967  unsigned long __cil_tmp18 ;
10968  int __cil_tmp19 ;
10969  int __cil_tmp20 ;
10970  int __cil_tmp21 ;
10971  long __cil_tmp22 ;
10972  unsigned long __cil_tmp23 ;
10973  unsigned long __cil_tmp24 ;
10974  unsigned long __cil_tmp25 ;
10975  unsigned long __cil_tmp26 ;
10976  SVGA3dTextureStateName __cil_tmp27 ;
10977  unsigned int __cil_tmp28 ;
10978  int __cil_tmp29 ;
10979  int __cil_tmp30 ;
10980  int __cil_tmp31 ;
10981  long __cil_tmp32 ;
10982  unsigned long __cil_tmp33 ;
10983  unsigned long __cil_tmp34 ;
10984  uint32 *__cil_tmp35 ;
10985  int __cil_tmp36 ;
10986  int __cil_tmp37 ;
10987  int __cil_tmp38 ;
10988  long __cil_tmp39 ;
10989
10990  {
10991  {
10992#line 665
10993  __cil_tmp10 = (unsigned long )header;
10994#line 665
10995  __cil_tmp11 = __cil_tmp10 + 4;
10996#line 665
10997  __cil_tmp12 = *((uint32 *)__cil_tmp11);
10998#line 665
10999  __cil_tmp13 = (unsigned long )__cil_tmp12;
11000#line 665
11001  __cil_tmp14 = (unsigned long )header;
11002#line 665
11003  __cil_tmp15 = __cil_tmp14 + __cil_tmp13;
11004#line 665
11005  __cil_tmp16 = __cil_tmp15 + 8UL;
11006#line 665
11007  last_state = (SVGA3dTextureState *)__cil_tmp16;
11008#line 667
11009  __cil_tmp17 = (unsigned long )header;
11010#line 667
11011  __cil_tmp18 = __cil_tmp17 + 12UL;
11012#line 667
11013  cur_state = (SVGA3dTextureState *)__cil_tmp18;
11014#line 671
11015  ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
11016#line 672
11017  __cil_tmp19 = ret != 0;
11018#line 672
11019  __cil_tmp20 = ! __cil_tmp19;
11020#line 672
11021  __cil_tmp21 = ! __cil_tmp20;
11022#line 672
11023  __cil_tmp22 = (long )__cil_tmp21;
11024#line 672
11025  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
11026  }
11027#line 672
11028  if (tmp___7) {
11029#line 673
11030    return (ret);
11031  } else {
11032
11033  }
11034  {
11035#line 675
11036  while (1) {
11037    while_continue: /* CIL Label */ ;
11038    {
11039#line 675
11040    __cil_tmp23 = (unsigned long )last_state;
11041#line 675
11042    __cil_tmp24 = (unsigned long )cur_state;
11043#line 675
11044    if (__cil_tmp24 < __cil_tmp23) {
11045
11046    } else {
11047#line 675
11048      goto while_break;
11049    }
11050    }
11051    {
11052#line 676
11053    __cil_tmp25 = (unsigned long )cur_state;
11054#line 676
11055    __cil_tmp26 = __cil_tmp25 + 4;
11056#line 676
11057    __cil_tmp27 = *((SVGA3dTextureStateName *)__cil_tmp26);
11058#line 676
11059    __cil_tmp28 = (unsigned int )__cil_tmp27;
11060#line 676
11061    __cil_tmp29 = __cil_tmp28 != 1U;
11062#line 676
11063    __cil_tmp30 = ! __cil_tmp29;
11064#line 676
11065    __cil_tmp31 = ! __cil_tmp30;
11066#line 676
11067    __cil_tmp32 = (long )__cil_tmp31;
11068#line 676
11069    tmp___8 = __builtin_expect(__cil_tmp32, 1L);
11070    }
11071#line 676
11072    if (tmp___8) {
11073#line 677
11074      goto __Cont;
11075    } else {
11076
11077    }
11078    {
11079#line 679
11080    __cil_tmp33 = (unsigned long )cur_state;
11081#line 679
11082    __cil_tmp34 = __cil_tmp33 + 8;
11083#line 679
11084    __cil_tmp35 = (uint32 *)__cil_tmp34;
11085#line 679
11086    ret = vmw_cmd_sid_check(dev_priv, sw_context, __cil_tmp35);
11087#line 681
11088    __cil_tmp36 = ret != 0;
11089#line 681
11090    __cil_tmp37 = ! __cil_tmp36;
11091#line 681
11092    __cil_tmp38 = ! __cil_tmp37;
11093#line 681
11094    __cil_tmp39 = (long )__cil_tmp38;
11095#line 681
11096    tmp___9 = __builtin_expect(__cil_tmp39, 0L);
11097    }
11098#line 681
11099    if (tmp___9) {
11100#line 682
11101      return (ret);
11102    } else {
11103
11104    }
11105    __Cont: /* CIL Label */ 
11106#line 675
11107    cur_state = cur_state + 1;
11108  }
11109  while_break: /* CIL Label */ ;
11110  }
11111#line 685
11112  return (0);
11113}
11114}
11115#line 688 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11116static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
11117                                      void *buf ) 
11118{ struct vmw_dma_buffer *vmw_bo ;
11119  int ret ;
11120  struct __anonstruct_cmd_429 *cmd ;
11121  long tmp___7 ;
11122  unsigned long __cil_tmp8 ;
11123  unsigned long __cil_tmp9 ;
11124  SVGAGuestPtr *__cil_tmp10 ;
11125  int __cil_tmp11 ;
11126  int __cil_tmp12 ;
11127  int __cil_tmp13 ;
11128  long __cil_tmp14 ;
11129
11130  {
11131  {
11132#line 695
11133  cmd = (struct __anonstruct_cmd_429 *)buf;
11134#line 700
11135  __cil_tmp8 = (unsigned long )cmd;
11136#line 700
11137  __cil_tmp9 = __cil_tmp8 + 4;
11138#line 700
11139  __cil_tmp10 = (SVGAGuestPtr *)__cil_tmp9;
11140#line 700
11141  ret = vmw_translate_guest_ptr(dev_priv, sw_context, __cil_tmp10, & vmw_bo);
11142#line 703
11143  __cil_tmp11 = ret != 0;
11144#line 703
11145  __cil_tmp12 = ! __cil_tmp11;
11146#line 703
11147  __cil_tmp13 = ! __cil_tmp12;
11148#line 703
11149  __cil_tmp14 = (long )__cil_tmp13;
11150#line 703
11151  tmp___7 = __builtin_expect(__cil_tmp14, 0L);
11152  }
11153#line 703
11154  if (tmp___7) {
11155#line 704
11156    return (ret);
11157  } else {
11158
11159  }
11160  {
11161#line 706
11162  vmw_dmabuf_unreference(& vmw_bo);
11163  }
11164#line 708
11165  return (ret);
11166}
11167}
11168#line 711 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11169static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
11170                                void *buf , uint32_t *size ) 
11171{ uint32_t size_remaining ;
11172  uint32_t cmd_id ;
11173  long tmp___7 ;
11174  int tmp___8 ;
11175  uint32_t *__cil_tmp9 ;
11176  uint32_t *__cil_tmp10 ;
11177  unsigned long __cil_tmp11 ;
11178  unsigned long __cil_tmp12 ;
11179  unsigned long __cil_tmp13 ;
11180  unsigned long __cil_tmp14 ;
11181  uint32_t __cil_tmp15 ;
11182  unsigned long __cil_tmp16 ;
11183  unsigned long __cil_tmp17 ;
11184  bool __cil_tmp18 ;
11185  int __cil_tmp19 ;
11186  int __cil_tmp20 ;
11187  int __cil_tmp21 ;
11188  long __cil_tmp22 ;
11189
11190  {
11191#line 715
11192  size_remaining = *size;
11193#line 718
11194  __cil_tmp9 = (uint32_t *)buf;
11195#line 718
11196  __cil_tmp10 = __cil_tmp9 + 0;
11197#line 718
11198  cmd_id = *__cil_tmp10;
11199#line 720
11200  if ((int )cmd_id == 1) {
11201#line 720
11202    goto case_1;
11203  } else
11204#line 723
11205  if ((int )cmd_id == 36) {
11206#line 723
11207    goto case_36;
11208  } else
11209#line 726
11210  if ((int )cmd_id == 37) {
11211#line 726
11212    goto case_37;
11213  } else
11214#line 729
11215  if ((int )cmd_id == 38) {
11216#line 729
11217    goto case_38;
11218  } else {
11219    {
11220#line 732
11221    goto switch_default;
11222#line 719
11223    if (0) {
11224      case_1: /* CIL Label */ 
11225#line 721
11226      __cil_tmp11 = 4UL + 16UL;
11227#line 721
11228      *size = (uint32_t )__cil_tmp11;
11229#line 722
11230      goto switch_break;
11231      case_36: /* CIL Label */ 
11232#line 724
11233      __cil_tmp12 = 4UL + 16UL;
11234#line 724
11235      *size = (uint32_t )__cil_tmp12;
11236#line 725
11237      goto switch_break;
11238      case_37: /* CIL Label */ 
11239#line 727
11240      __cil_tmp13 = 4UL + 28UL;
11241#line 727
11242      *size = (uint32_t )__cil_tmp13;
11243#line 728
11244      goto switch_break;
11245      case_38: /* CIL Label */ 
11246#line 730
11247      __cil_tmp14 = 4UL + 28UL;
11248#line 730
11249      *size = (uint32_t )__cil_tmp14;
11250#line 731
11251      goto switch_break;
11252      switch_default: /* CIL Label */ 
11253      {
11254#line 733
11255      drm_err("vmw_cmd_check_not_3d", "Unsupported SVGA command: %u.\n", cmd_id);
11256      }
11257#line 734
11258      return (-22);
11259    } else {
11260      switch_break: /* CIL Label */ ;
11261    }
11262    }
11263  }
11264  {
11265#line 737
11266  __cil_tmp15 = *size;
11267#line 737
11268  if (__cil_tmp15 > size_remaining) {
11269    {
11270#line 738
11271    drm_err("vmw_cmd_check_not_3d", "Invalid SVGA command (size mismatch): %u.\n",
11272            cmd_id);
11273    }
11274#line 740
11275    return (-22);
11276  } else {
11277
11278  }
11279  }
11280  {
11281#line 743
11282  __cil_tmp16 = (unsigned long )sw_context;
11283#line 743
11284  __cil_tmp17 = __cil_tmp16 + 61;
11285#line 743
11286  __cil_tmp18 = *((bool *)__cil_tmp17);
11287#line 743
11288  __cil_tmp19 = ! __cil_tmp18;
11289#line 743
11290  __cil_tmp20 = ! __cil_tmp19;
11291#line 743
11292  __cil_tmp21 = ! __cil_tmp20;
11293#line 743
11294  __cil_tmp22 = (long )__cil_tmp21;
11295#line 743
11296  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
11297  }
11298#line 743
11299  if (tmp___7) {
11300    {
11301#line 744
11302    drm_err("vmw_cmd_check_not_3d", "Kernel only SVGA command: %u.\n", cmd_id);
11303    }
11304#line 745
11305    return (-1);
11306  } else {
11307
11308  }
11309#line 748
11310  if (cmd_id == 36U) {
11311    {
11312#line 749
11313    tmp___8 = vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
11314    }
11315#line 749
11316    return (tmp___8);
11317  } else {
11318
11319  }
11320#line 751
11321  return (0);
11322}
11323}
11324#line 761 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11325static vmw_cmd_func vmw_cmd_funcs[1082]  = 
11326#line 761
11327  {      & vmw_cmd_invalid,      & vmw_cmd_invalid,      & vmw_cmd_surface_copy_check,      & vmw_cmd_stretch_blt_check, 
11328        & vmw_cmd_dma,      & vmw_cmd_invalid,      & vmw_cmd_invalid,      & vmw_cmd_cid_check, 
11329        & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_set_render_target_check,      & vmw_cmd_tex_state, 
11330        & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_cid_check, 
11331        & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_present_check,      & vmw_cmd_cid_check, 
11332        & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_draw, 
11333        & vmw_cmd_cid_check,      & vmw_cmd_cid_check,      & vmw_cmd_end_query,      & vmw_cmd_wait_query, 
11334        & vmw_cmd_ok,      & vmw_cmd_blt_surf_screen_check};
11335#line 796 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11336static int vmw_cmd_check(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
11337                         void *buf , uint32_t *size ) 
11338{ uint32_t cmd_id ;
11339  uint32_t size_remaining ;
11340  SVGA3dCmdHeader *header ;
11341  int ret ;
11342  int tmp___7 ;
11343  long tmp___8 ;
11344  long tmp___9 ;
11345  long tmp___10 ;
11346  long tmp___11 ;
11347  uint32_t *__cil_tmp14 ;
11348  uint32_t *__cil_tmp15 ;
11349  int __cil_tmp16 ;
11350  int __cil_tmp17 ;
11351  int __cil_tmp18 ;
11352  long __cil_tmp19 ;
11353  unsigned long __cil_tmp20 ;
11354  unsigned long __cil_tmp21 ;
11355  uint32 __cil_tmp22 ;
11356  unsigned long __cil_tmp23 ;
11357  unsigned long __cil_tmp24 ;
11358  uint32_t __cil_tmp25 ;
11359  int __cil_tmp26 ;
11360  int __cil_tmp27 ;
11361  int __cil_tmp28 ;
11362  long __cil_tmp29 ;
11363  int __cil_tmp30 ;
11364  int __cil_tmp31 ;
11365  int __cil_tmp32 ;
11366  long __cil_tmp33 ;
11367  unsigned long __cil_tmp34 ;
11368  unsigned long __cil_tmp35 ;
11369  vmw_cmd_func __cil_tmp36 ;
11370  int __cil_tmp37 ;
11371  int __cil_tmp38 ;
11372  int __cil_tmp39 ;
11373  long __cil_tmp40 ;
11374  uint32_t __cil_tmp41 ;
11375
11376  {
11377  {
11378#line 801
11379  size_remaining = *size;
11380#line 802
11381  header = (SVGA3dCmdHeader *)buf;
11382#line 805
11383  __cil_tmp14 = (uint32_t *)buf;
11384#line 805
11385  __cil_tmp15 = __cil_tmp14 + 0;
11386#line 805
11387  cmd_id = *__cil_tmp15;
11388#line 807
11389  __cil_tmp16 = cmd_id < 43U;
11390#line 807
11391  __cil_tmp17 = ! __cil_tmp16;
11392#line 807
11393  __cil_tmp18 = ! __cil_tmp17;
11394#line 807
11395  __cil_tmp19 = (long )__cil_tmp18;
11396#line 807
11397  tmp___8 = __builtin_expect(__cil_tmp19, 0L);
11398  }
11399#line 807
11400  if (tmp___8) {
11401    {
11402#line 808
11403    tmp___7 = vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
11404    }
11405#line 808
11406    return (tmp___7);
11407  } else {
11408
11409  }
11410  {
11411#line 811
11412  cmd_id = *((uint32 *)header);
11413#line 812
11414  __cil_tmp20 = (unsigned long )header;
11415#line 812
11416  __cil_tmp21 = __cil_tmp20 + 4;
11417#line 812
11418  __cil_tmp22 = *((uint32 *)__cil_tmp21);
11419#line 812
11420  __cil_tmp23 = (unsigned long )__cil_tmp22;
11421#line 812
11422  __cil_tmp24 = __cil_tmp23 + 8UL;
11423#line 812
11424  *size = (uint32_t )__cil_tmp24;
11425#line 814
11426  cmd_id = cmd_id - 1040U;
11427#line 815
11428  __cil_tmp25 = *size;
11429#line 815
11430  __cil_tmp26 = __cil_tmp25 > size_remaining;
11431#line 815
11432  __cil_tmp27 = ! __cil_tmp26;
11433#line 815
11434  __cil_tmp28 = ! __cil_tmp27;
11435#line 815
11436  __cil_tmp29 = (long )__cil_tmp28;
11437#line 815
11438  tmp___9 = __builtin_expect(__cil_tmp29, 0L);
11439  }
11440#line 815
11441  if (tmp___9) {
11442#line 816
11443    goto out_err;
11444  } else {
11445
11446  }
11447  {
11448#line 818
11449  __cil_tmp30 = cmd_id >= 42U;
11450#line 818
11451  __cil_tmp31 = ! __cil_tmp30;
11452#line 818
11453  __cil_tmp32 = ! __cil_tmp31;
11454#line 818
11455  __cil_tmp33 = (long )__cil_tmp32;
11456#line 818
11457  tmp___10 = __builtin_expect(__cil_tmp33, 0L);
11458  }
11459#line 818
11460  if (tmp___10) {
11461#line 819
11462    goto out_err;
11463  } else {
11464
11465  }
11466  {
11467#line 821
11468  __cil_tmp34 = cmd_id * 8UL;
11469#line 821
11470  __cil_tmp35 = (unsigned long )(vmw_cmd_funcs) + __cil_tmp34;
11471#line 821
11472  __cil_tmp36 = *((vmw_cmd_func *)__cil_tmp35);
11473#line 821
11474  ret = (*__cil_tmp36)(dev_priv, sw_context, header);
11475#line 822
11476  __cil_tmp37 = ret != 0;
11477#line 822
11478  __cil_tmp38 = ! __cil_tmp37;
11479#line 822
11480  __cil_tmp39 = ! __cil_tmp38;
11481#line 822
11482  __cil_tmp40 = (long )__cil_tmp39;
11483#line 822
11484  tmp___11 = __builtin_expect(__cil_tmp40, 0L);
11485  }
11486#line 822
11487  if (tmp___11) {
11488#line 823
11489    goto out_err;
11490  } else {
11491
11492  }
11493#line 825
11494  return (0);
11495  out_err: 
11496  {
11497#line 827
11498  __cil_tmp41 = cmd_id + 1040U;
11499#line 827
11500  drm_err("vmw_cmd_check", "Illegal / Invalid SVGA3D command: %d\n", __cil_tmp41);
11501  }
11502#line 829
11503  return (-22);
11504}
11505}
11506#line 832 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11507static int vmw_cmd_check_all(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ,
11508                             void *buf , uint32_t size ) 
11509{ int32_t cur_size ;
11510  int ret ;
11511  long tmp___7 ;
11512  long tmp___8 ;
11513  uint32_t *__cil_tmp9 ;
11514  uint32_t __cil_tmp10 ;
11515  uint32_t *__cil_tmp11 ;
11516  int __cil_tmp12 ;
11517  int __cil_tmp13 ;
11518  int __cil_tmp14 ;
11519  long __cil_tmp15 ;
11520  uint32_t *__cil_tmp16 ;
11521  uint32_t __cil_tmp17 ;
11522  unsigned long __cil_tmp18 ;
11523  unsigned long __cil_tmp19 ;
11524  unsigned long __cil_tmp20 ;
11525  uint32_t *__cil_tmp21 ;
11526  uint32_t __cil_tmp22 ;
11527  uint32_t __cil_tmp23 ;
11528  uint32_t __cil_tmp24 ;
11529  int __cil_tmp25 ;
11530  int __cil_tmp26 ;
11531  int __cil_tmp27 ;
11532  long __cil_tmp28 ;
11533
11534  {
11535#line 837
11536  __cil_tmp9 = & size;
11537#line 837
11538  __cil_tmp10 = *__cil_tmp9;
11539#line 837
11540  cur_size = (int32_t )__cil_tmp10;
11541  {
11542#line 840
11543  while (1) {
11544    while_continue: /* CIL Label */ ;
11545#line 840
11546    if (cur_size > 0) {
11547
11548    } else {
11549#line 840
11550      goto while_break;
11551    }
11552    {
11553#line 841
11554    __cil_tmp11 = & size;
11555#line 841
11556    *__cil_tmp11 = (uint32_t )cur_size;
11557#line 842
11558    ret = vmw_cmd_check(dev_priv, sw_context, buf, & size);
11559#line 843
11560    __cil_tmp12 = ret != 0;
11561#line 843
11562    __cil_tmp13 = ! __cil_tmp12;
11563#line 843
11564    __cil_tmp14 = ! __cil_tmp13;
11565#line 843
11566    __cil_tmp15 = (long )__cil_tmp14;
11567#line 843
11568    tmp___7 = __builtin_expect(__cil_tmp15, 0L);
11569    }
11570#line 843
11571    if (tmp___7) {
11572#line 844
11573      return (ret);
11574    } else {
11575
11576    }
11577#line 845
11578    __cil_tmp16 = & size;
11579#line 845
11580    __cil_tmp17 = *__cil_tmp16;
11581#line 845
11582    __cil_tmp18 = (unsigned long )__cil_tmp17;
11583#line 845
11584    __cil_tmp19 = (unsigned long )buf;
11585#line 845
11586    __cil_tmp20 = __cil_tmp19 + __cil_tmp18;
11587#line 845
11588    buf = (void *)__cil_tmp20;
11589#line 846
11590    __cil_tmp21 = & size;
11591#line 846
11592    __cil_tmp22 = *__cil_tmp21;
11593#line 846
11594    __cil_tmp23 = (uint32_t )cur_size;
11595#line 846
11596    __cil_tmp24 = __cil_tmp23 - __cil_tmp22;
11597#line 846
11598    cur_size = (int32_t )__cil_tmp24;
11599  }
11600  while_break: /* CIL Label */ ;
11601  }
11602  {
11603#line 849
11604  __cil_tmp25 = cur_size != 0;
11605#line 849
11606  __cil_tmp26 = ! __cil_tmp25;
11607#line 849
11608  __cil_tmp27 = ! __cil_tmp26;
11609#line 849
11610  __cil_tmp28 = (long )__cil_tmp27;
11611#line 849
11612  tmp___8 = __builtin_expect(__cil_tmp28, 0L);
11613  }
11614#line 849
11615  if (tmp___8) {
11616    {
11617#line 850
11618    drm_err("vmw_cmd_check_all", "Command verifier out of sync.\n");
11619    }
11620#line 851
11621    return (-22);
11622  } else {
11623
11624  }
11625#line 854
11626  return (0);
11627}
11628}
11629#line 857 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11630static void vmw_free_relocations(struct vmw_sw_context *sw_context ) 
11631{ unsigned long __cil_tmp2 ;
11632  unsigned long __cil_tmp3 ;
11633
11634  {
11635#line 859
11636  __cil_tmp2 = (unsigned long )sw_context;
11637#line 859
11638  __cil_tmp3 = __cil_tmp2 + 32880;
11639#line 859
11640  *((uint32_t *)__cil_tmp3) = (uint32_t )0;
11641#line 860
11642  return;
11643}
11644}
11645#line 862 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11646static void vmw_apply_relocations(struct vmw_sw_context *sw_context ) 
11647{ uint32_t i ;
11648  struct vmw_relocation *reloc ;
11649  struct ttm_validate_buffer *validate ;
11650  struct ttm_buffer_object *bo ;
11651  unsigned long __cil_tmp6 ;
11652  unsigned long __cil_tmp7 ;
11653  uint32_t __cil_tmp8 ;
11654  unsigned long __cil_tmp9 ;
11655  unsigned long __cil_tmp10 ;
11656  unsigned long __cil_tmp11 ;
11657  unsigned long __cil_tmp12 ;
11658  unsigned long __cil_tmp13 ;
11659  unsigned long __cil_tmp14 ;
11660  uint32_t __cil_tmp15 ;
11661  unsigned long __cil_tmp16 ;
11662  unsigned long __cil_tmp17 ;
11663  unsigned long __cil_tmp18 ;
11664  unsigned long __cil_tmp19 ;
11665  unsigned long __cil_tmp20 ;
11666  unsigned long __cil_tmp21 ;
11667  unsigned long __cil_tmp22 ;
11668  unsigned long __cil_tmp23 ;
11669  unsigned long __cil_tmp24 ;
11670  uint32_t __cil_tmp25 ;
11671  SVGAGuestPtr *__cil_tmp26 ;
11672  unsigned long __cil_tmp27 ;
11673  unsigned long __cil_tmp28 ;
11674  unsigned long __cil_tmp29 ;
11675  unsigned long __cil_tmp30 ;
11676  unsigned long __cil_tmp31 ;
11677  SVGAGuestPtr *__cil_tmp32 ;
11678  unsigned long __cil_tmp33 ;
11679  unsigned long __cil_tmp34 ;
11680  uint32 __cil_tmp35 ;
11681  unsigned long __cil_tmp36 ;
11682  unsigned long __cil_tmp37 ;
11683  SVGAGuestPtr *__cil_tmp38 ;
11684  SVGAGuestPtr *__cil_tmp39 ;
11685  unsigned long __cil_tmp40 ;
11686  unsigned long __cil_tmp41 ;
11687  unsigned long __cil_tmp42 ;
11688  unsigned long __cil_tmp43 ;
11689
11690  {
11691#line 869
11692  i = (uint32_t )0;
11693  {
11694#line 869
11695  while (1) {
11696    while_continue: /* CIL Label */ ;
11697    {
11698#line 869
11699    __cil_tmp6 = (unsigned long )sw_context;
11700#line 869
11701    __cil_tmp7 = __cil_tmp6 + 32880;
11702#line 869
11703    __cil_tmp8 = *((uint32_t *)__cil_tmp7);
11704#line 869
11705    if (i < __cil_tmp8) {
11706
11707    } else {
11708#line 869
11709      goto while_break;
11710    }
11711    }
11712#line 870
11713    __cil_tmp9 = i * 16UL;
11714#line 870
11715    __cil_tmp10 = 112 + __cil_tmp9;
11716#line 870
11717    __cil_tmp11 = (unsigned long )sw_context;
11718#line 870
11719    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
11720#line 870
11721    reloc = (struct vmw_relocation *)__cil_tmp12;
11722#line 871
11723    __cil_tmp13 = (unsigned long )reloc;
11724#line 871
11725    __cil_tmp14 = __cil_tmp13 + 8;
11726#line 871
11727    __cil_tmp15 = *((uint32_t *)__cil_tmp14);
11728#line 871
11729    __cil_tmp16 = __cil_tmp15 * 48UL;
11730#line 871
11731    __cil_tmp17 = 32888 + __cil_tmp16;
11732#line 871
11733    __cil_tmp18 = (unsigned long )sw_context;
11734#line 871
11735    __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
11736#line 871
11737    validate = (struct ttm_validate_buffer *)__cil_tmp19;
11738#line 872
11739    __cil_tmp20 = (unsigned long )validate;
11740#line 872
11741    __cil_tmp21 = __cil_tmp20 + 16;
11742#line 872
11743    bo = *((struct ttm_buffer_object **)__cil_tmp21);
11744    {
11745#line 873
11746    __cil_tmp22 = 112 + 36;
11747#line 873
11748    __cil_tmp23 = (unsigned long )bo;
11749#line 873
11750    __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
11751#line 873
11752    __cil_tmp25 = *((uint32_t *)__cil_tmp24);
11753#line 873
11754    if (__cil_tmp25 == 2U) {
11755#line 874
11756      __cil_tmp26 = *((SVGAGuestPtr **)reloc);
11757#line 874
11758      __cil_tmp27 = (unsigned long )__cil_tmp26;
11759#line 874
11760      __cil_tmp28 = __cil_tmp27 + 4;
11761#line 874
11762      __cil_tmp29 = (unsigned long )bo;
11763#line 874
11764      __cil_tmp30 = __cil_tmp29 + 368;
11765#line 874
11766      __cil_tmp31 = *((unsigned long *)__cil_tmp30);
11767#line 874
11768      __cil_tmp32 = *((SVGAGuestPtr **)reloc);
11769#line 874
11770      __cil_tmp33 = (unsigned long )__cil_tmp32;
11771#line 874
11772      __cil_tmp34 = __cil_tmp33 + 4;
11773#line 874
11774      __cil_tmp35 = *((uint32 *)__cil_tmp34);
11775#line 874
11776      __cil_tmp36 = (unsigned long )__cil_tmp35;
11777#line 874
11778      __cil_tmp37 = __cil_tmp36 + __cil_tmp31;
11779#line 874
11780      *((uint32 *)__cil_tmp28) = (uint32 )__cil_tmp37;
11781#line 875
11782      __cil_tmp38 = *((SVGAGuestPtr **)reloc);
11783#line 875
11784      *((uint32 *)__cil_tmp38) = (uint32 )-2;
11785    } else {
11786#line 877
11787      __cil_tmp39 = *((SVGAGuestPtr **)reloc);
11788#line 877
11789      __cil_tmp40 = 112 + 8;
11790#line 877
11791      __cil_tmp41 = (unsigned long )bo;
11792#line 877
11793      __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
11794#line 877
11795      __cil_tmp43 = *((unsigned long *)__cil_tmp42);
11796#line 877
11797      *((uint32 *)__cil_tmp39) = (uint32 )__cil_tmp43;
11798    }
11799    }
11800#line 869
11801    i = i + 1U;
11802  }
11803  while_break: /* CIL Label */ ;
11804  }
11805  {
11806#line 879
11807  vmw_free_relocations(sw_context);
11808  }
11809#line 880
11810  return;
11811}
11812}
11813#line 882 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
11814static void vmw_clear_validations(struct vmw_sw_context *sw_context ) 
11815{ struct ttm_validate_buffer *entry ;
11816  struct ttm_validate_buffer *next ;
11817  struct vmw_resource *res ;
11818  struct vmw_resource *res_next ;
11819  struct list_head    *__mptr ;
11820  struct list_head    *__mptr___0 ;
11821  struct list_head    *__mptr___1 ;
11822  long tmp___7 ;
11823  struct list_head    *__mptr___2 ;
11824  struct list_head    *__mptr___3 ;
11825  struct list_head    *__mptr___4 ;
11826  unsigned long __cil_tmp13 ;
11827  unsigned long __cil_tmp14 ;
11828  struct list_head *__cil_tmp15 ;
11829  struct ttm_validate_buffer *__cil_tmp16 ;
11830  struct list_head *__cil_tmp17 ;
11831  unsigned int __cil_tmp18 ;
11832  char *__cil_tmp19 ;
11833  char *__cil_tmp20 ;
11834  struct list_head *__cil_tmp21 ;
11835  struct ttm_validate_buffer *__cil_tmp22 ;
11836  struct list_head *__cil_tmp23 ;
11837  unsigned int __cil_tmp24 ;
11838  char *__cil_tmp25 ;
11839  char *__cil_tmp26 ;
11840  unsigned long __cil_tmp27 ;
11841  unsigned long __cil_tmp28 ;
11842  struct list_head *__cil_tmp29 ;
11843  unsigned long __cil_tmp30 ;
11844  struct list_head *__cil_tmp31 ;
11845  unsigned long __cil_tmp32 ;
11846  struct list_head *__cil_tmp33 ;
11847  unsigned long __cil_tmp34 ;
11848  unsigned long __cil_tmp35 ;
11849  struct ttm_buffer_object *__cil_tmp36 ;
11850  unsigned long __cil_tmp37 ;
11851  unsigned long __cil_tmp38 ;
11852  struct ttm_buffer_object **__cil_tmp39 ;
11853  unsigned long __cil_tmp40 ;
11854  unsigned long __cil_tmp41 ;
11855  unsigned long __cil_tmp42 ;
11856  unsigned long __cil_tmp43 ;
11857  uint32_t __cil_tmp44 ;
11858  struct list_head *__cil_tmp45 ;
11859  struct ttm_validate_buffer *__cil_tmp46 ;
11860  struct list_head *__cil_tmp47 ;
11861  unsigned int __cil_tmp48 ;
11862  char *__cil_tmp49 ;
11863  char *__cil_tmp50 ;
11864  unsigned long __cil_tmp51 ;
11865  unsigned long __cil_tmp52 ;
11866  uint32_t __cil_tmp53 ;
11867  int __cil_tmp54 ;
11868  int __cil_tmp55 ;
11869  int __cil_tmp56 ;
11870  long __cil_tmp57 ;
11871  unsigned long __cil_tmp58 ;
11872  unsigned long __cil_tmp59 ;
11873  struct list_head *__cil_tmp60 ;
11874  unsigned long __cil_tmp61 ;
11875  unsigned long __cil_tmp62 ;
11876  struct list_head *__cil_tmp63 ;
11877  struct vmw_resource **__cil_tmp64 ;
11878  struct vmw_resource *__cil_tmp65 ;
11879  unsigned long __cil_tmp66 ;
11880  unsigned long __cil_tmp67 ;
11881  struct list_head *__cil_tmp68 ;
11882  unsigned int __cil_tmp69 ;
11883  char *__cil_tmp70 ;
11884  char *__cil_tmp71 ;
11885  struct vmw_resource **__cil_tmp72 ;
11886  struct vmw_resource *__cil_tmp73 ;
11887  unsigned long __cil_tmp74 ;
11888  unsigned long __cil_tmp75 ;
11889  struct list_head *__cil_tmp76 ;
11890  struct vmw_resource *__cil_tmp77 ;
11891  unsigned long __cil_tmp78 ;
11892  unsigned long __cil_tmp79 ;
11893  struct list_head *__cil_tmp80 ;
11894  unsigned int __cil_tmp81 ;
11895  char *__cil_tmp82 ;
11896  char *__cil_tmp83 ;
11897  unsigned long __cil_tmp84 ;
11898  unsigned long __cil_tmp85 ;
11899  struct list_head *__cil_tmp86 ;
11900  unsigned long __cil_tmp87 ;
11901  struct vmw_resource **__cil_tmp88 ;
11902  struct vmw_resource *__cil_tmp89 ;
11903  unsigned long __cil_tmp90 ;
11904  unsigned long __cil_tmp91 ;
11905  struct list_head *__cil_tmp92 ;
11906  unsigned long __cil_tmp93 ;
11907  struct vmw_resource **__cil_tmp94 ;
11908  struct vmw_resource *__cil_tmp95 ;
11909  unsigned long __cil_tmp96 ;
11910  unsigned long __cil_tmp97 ;
11911  struct list_head *__cil_tmp98 ;
11912  struct vmw_resource **__cil_tmp99 ;
11913  unsigned long __cil_tmp100 ;
11914  unsigned long __cil_tmp101 ;
11915  struct list_head *__cil_tmp102 ;
11916  struct vmw_resource *__cil_tmp103 ;
11917  unsigned long __cil_tmp104 ;
11918  unsigned long __cil_tmp105 ;
11919  struct list_head *__cil_tmp106 ;
11920  unsigned int __cil_tmp107 ;
11921  char *__cil_tmp108 ;
11922  char *__cil_tmp109 ;
11923
11924  {
11925#line 890
11926  __cil_tmp13 = (unsigned long )sw_context;
11927#line 890
11928  __cil_tmp14 = __cil_tmp13 + 96;
11929#line 890
11930  __cil_tmp15 = *((struct list_head **)__cil_tmp14);
11931#line 890
11932  __mptr = (struct list_head    *)__cil_tmp15;
11933#line 890
11934  __cil_tmp16 = (struct ttm_validate_buffer *)0;
11935#line 890
11936  __cil_tmp17 = (struct list_head *)__cil_tmp16;
11937#line 890
11938  __cil_tmp18 = (unsigned int )__cil_tmp17;
11939#line 890
11940  __cil_tmp19 = (char *)__mptr;
11941#line 890
11942  __cil_tmp20 = __cil_tmp19 - __cil_tmp18;
11943#line 890
11944  entry = (struct ttm_validate_buffer *)__cil_tmp20;
11945#line 890
11946  __cil_tmp21 = *((struct list_head **)entry);
11947#line 890
11948  __mptr___0 = (struct list_head    *)__cil_tmp21;
11949#line 890
11950  __cil_tmp22 = (struct ttm_validate_buffer *)0;
11951#line 890
11952  __cil_tmp23 = (struct list_head *)__cil_tmp22;
11953#line 890
11954  __cil_tmp24 = (unsigned int )__cil_tmp23;
11955#line 890
11956  __cil_tmp25 = (char *)__mptr___0;
11957#line 890
11958  __cil_tmp26 = __cil_tmp25 - __cil_tmp24;
11959#line 890
11960  next = (struct ttm_validate_buffer *)__cil_tmp26;
11961  {
11962#line 890
11963  while (1) {
11964    while_continue: /* CIL Label */ ;
11965    {
11966#line 890
11967    __cil_tmp27 = (unsigned long )sw_context;
11968#line 890
11969    __cil_tmp28 = __cil_tmp27 + 96;
11970#line 890
11971    __cil_tmp29 = (struct list_head *)__cil_tmp28;
11972#line 890
11973    __cil_tmp30 = (unsigned long )__cil_tmp29;
11974#line 890
11975    __cil_tmp31 = (struct list_head *)entry;
11976#line 890
11977    __cil_tmp32 = (unsigned long )__cil_tmp31;
11978#line 890
11979    if (__cil_tmp32 != __cil_tmp30) {
11980
11981    } else {
11982#line 890
11983      goto while_break;
11984    }
11985    }
11986    {
11987#line 892
11988    __cil_tmp33 = (struct list_head *)entry;
11989#line 892
11990    list_del(__cil_tmp33);
11991#line 893
11992    __cil_tmp34 = (unsigned long )entry;
11993#line 893
11994    __cil_tmp35 = __cil_tmp34 + 16;
11995#line 893
11996    __cil_tmp36 = *((struct ttm_buffer_object **)__cil_tmp35);
11997#line 893
11998    vmw_dmabuf_validate_clear(__cil_tmp36);
11999#line 894
12000    __cil_tmp37 = (unsigned long )entry;
12001#line 894
12002    __cil_tmp38 = __cil_tmp37 + 16;
12003#line 894
12004    __cil_tmp39 = (struct ttm_buffer_object **)__cil_tmp38;
12005#line 894
12006    ttm_bo_unref(__cil_tmp39);
12007#line 895
12008    __cil_tmp40 = (unsigned long )sw_context;
12009#line 895
12010    __cil_tmp41 = __cil_tmp40 + 131192;
12011#line 895
12012    __cil_tmp42 = (unsigned long )sw_context;
12013#line 895
12014    __cil_tmp43 = __cil_tmp42 + 131192;
12015#line 895
12016    __cil_tmp44 = *((uint32_t *)__cil_tmp43);
12017#line 895
12018    *((uint32_t *)__cil_tmp41) = __cil_tmp44 - 1U;
12019#line 890
12020    entry = next;
12021#line 890
12022    __cil_tmp45 = *((struct list_head **)next);
12023#line 890
12024    __mptr___1 = (struct list_head    *)__cil_tmp45;
12025#line 890
12026    __cil_tmp46 = (struct ttm_validate_buffer *)0;
12027#line 890
12028    __cil_tmp47 = (struct list_head *)__cil_tmp46;
12029#line 890
12030    __cil_tmp48 = (unsigned int )__cil_tmp47;
12031#line 890
12032    __cil_tmp49 = (char *)__mptr___1;
12033#line 890
12034    __cil_tmp50 = __cil_tmp49 - __cil_tmp48;
12035#line 890
12036    next = (struct ttm_validate_buffer *)__cil_tmp50;
12037    }
12038  }
12039  while_break: /* CIL Label */ ;
12040  }
12041  {
12042#line 897
12043  while (1) {
12044    while_continue___0: /* CIL Label */ ;
12045    {
12046#line 897
12047    __cil_tmp51 = (unsigned long )sw_context;
12048#line 897
12049    __cil_tmp52 = __cil_tmp51 + 131192;
12050#line 897
12051    __cil_tmp53 = *((uint32_t *)__cil_tmp52);
12052#line 897
12053    __cil_tmp54 = __cil_tmp53 != 0U;
12054#line 897
12055    __cil_tmp55 = ! __cil_tmp54;
12056#line 897
12057    __cil_tmp56 = ! __cil_tmp55;
12058#line 897
12059    __cil_tmp57 = (long )__cil_tmp56;
12060#line 897
12061    tmp___7 = __builtin_expect(__cil_tmp57, 0L);
12062    }
12063#line 897
12064    if (tmp___7) {
12065      {
12066#line 897
12067      while (1) {
12068        while_continue___1: /* CIL Label */ ;
12069#line 897
12070        __asm__  volatile   ("1:\tud2\n"
12071                             ".pushsection __bug_table,\"a\"\n"
12072                             "2:\t.long 1b - 2b, %c0 - 2b\n"
12073                             "\t.word %c1, 0\n"
12074                             "\t.org 2b+%c2\n"
12075                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"),
12076                             "i" (897), "i" (12UL));
12077        {
12078#line 897
12079        while (1) {
12080          while_continue___2: /* CIL Label */ ;
12081        }
12082        while_break___2: /* CIL Label */ ;
12083        }
12084#line 897
12085        goto while_break___1;
12086      }
12087      while_break___1: /* CIL Label */ ;
12088      }
12089    } else {
12090
12091    }
12092#line 897
12093    goto while_break___0;
12094  }
12095  while_break___0: /* CIL Label */ ;
12096  }
12097  {
12098#line 902
12099  __cil_tmp58 = (unsigned long )sw_context;
12100#line 902
12101  __cil_tmp59 = __cil_tmp58 + 131216;
12102#line 902
12103  __cil_tmp60 = (struct list_head *)__cil_tmp59;
12104#line 902
12105  vmw_resource_unreserve(__cil_tmp60);
12106#line 903
12107  __cil_tmp61 = (unsigned long )sw_context;
12108#line 903
12109  __cil_tmp62 = __cil_tmp61 + 131216;
12110#line 903
12111  __cil_tmp63 = *((struct list_head **)__cil_tmp62);
12112#line 903
12113  __mptr___2 = (struct list_head    *)__cil_tmp63;
12114#line 903
12115  __cil_tmp64 = & res;
12116#line 903
12117  __cil_tmp65 = (struct vmw_resource *)0;
12118#line 903
12119  __cil_tmp66 = (unsigned long )__cil_tmp65;
12120#line 903
12121  __cil_tmp67 = __cil_tmp66 + 64;
12122#line 903
12123  __cil_tmp68 = (struct list_head *)__cil_tmp67;
12124#line 903
12125  __cil_tmp69 = (unsigned int )__cil_tmp68;
12126#line 903
12127  __cil_tmp70 = (char *)__mptr___2;
12128#line 903
12129  __cil_tmp71 = __cil_tmp70 - __cil_tmp69;
12130#line 903
12131  *__cil_tmp64 = (struct vmw_resource *)__cil_tmp71;
12132#line 903
12133  __cil_tmp72 = & res;
12134#line 903
12135  __cil_tmp73 = *__cil_tmp72;
12136#line 903
12137  __cil_tmp74 = (unsigned long )__cil_tmp73;
12138#line 903
12139  __cil_tmp75 = __cil_tmp74 + 64;
12140#line 903
12141  __cil_tmp76 = *((struct list_head **)__cil_tmp75);
12142#line 903
12143  __mptr___3 = (struct list_head    *)__cil_tmp76;
12144#line 903
12145  __cil_tmp77 = (struct vmw_resource *)0;
12146#line 903
12147  __cil_tmp78 = (unsigned long )__cil_tmp77;
12148#line 903
12149  __cil_tmp79 = __cil_tmp78 + 64;
12150#line 903
12151  __cil_tmp80 = (struct list_head *)__cil_tmp79;
12152#line 903
12153  __cil_tmp81 = (unsigned int )__cil_tmp80;
12154#line 903
12155  __cil_tmp82 = (char *)__mptr___3;
12156#line 903
12157  __cil_tmp83 = __cil_tmp82 - __cil_tmp81;
12158#line 903
12159  res_next = (struct vmw_resource *)__cil_tmp83;
12160  }
12161  {
12162#line 903
12163  while (1) {
12164    while_continue___3: /* CIL Label */ ;
12165    {
12166#line 903
12167    __cil_tmp84 = (unsigned long )sw_context;
12168#line 903
12169    __cil_tmp85 = __cil_tmp84 + 131216;
12170#line 903
12171    __cil_tmp86 = (struct list_head *)__cil_tmp85;
12172#line 903
12173    __cil_tmp87 = (unsigned long )__cil_tmp86;
12174#line 903
12175    __cil_tmp88 = & res;
12176#line 903
12177    __cil_tmp89 = *__cil_tmp88;
12178#line 903
12179    __cil_tmp90 = (unsigned long )__cil_tmp89;
12180#line 903
12181    __cil_tmp91 = __cil_tmp90 + 64;
12182#line 903
12183    __cil_tmp92 = (struct list_head *)__cil_tmp91;
12184#line 903
12185    __cil_tmp93 = (unsigned long )__cil_tmp92;
12186#line 903
12187    if (__cil_tmp93 != __cil_tmp87) {
12188
12189    } else {
12190#line 903
12191      goto while_break___3;
12192    }
12193    }
12194    {
12195#line 905
12196    __cil_tmp94 = & res;
12197#line 905
12198    __cil_tmp95 = *__cil_tmp94;
12199#line 905
12200    __cil_tmp96 = (unsigned long )__cil_tmp95;
12201#line 905
12202    __cil_tmp97 = __cil_tmp96 + 64;
12203#line 905
12204    __cil_tmp98 = (struct list_head *)__cil_tmp97;
12205#line 905
12206    list_del_init(__cil_tmp98);
12207#line 906
12208    vmw_resource_unreference(& res);
12209#line 903
12210    __cil_tmp99 = & res;
12211#line 903
12212    *__cil_tmp99 = res_next;
12213#line 903
12214    __cil_tmp100 = (unsigned long )res_next;
12215#line 903
12216    __cil_tmp101 = __cil_tmp100 + 64;
12217#line 903
12218    __cil_tmp102 = *((struct list_head **)__cil_tmp101);
12219#line 903
12220    __mptr___4 = (struct list_head    *)__cil_tmp102;
12221#line 903
12222    __cil_tmp103 = (struct vmw_resource *)0;
12223#line 903
12224    __cil_tmp104 = (unsigned long )__cil_tmp103;
12225#line 903
12226    __cil_tmp105 = __cil_tmp104 + 64;
12227#line 903
12228    __cil_tmp106 = (struct list_head *)__cil_tmp105;
12229#line 903
12230    __cil_tmp107 = (unsigned int )__cil_tmp106;
12231#line 903
12232    __cil_tmp108 = (char *)__mptr___4;
12233#line 903
12234    __cil_tmp109 = __cil_tmp108 - __cil_tmp107;
12235#line 903
12236    res_next = (struct vmw_resource *)__cil_tmp109;
12237    }
12238  }
12239  while_break___3: /* CIL Label */ ;
12240  }
12241#line 908
12242  return;
12243}
12244}
12245#line 910 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
12246static int vmw_validate_single_buffer(struct vmw_private *dev_priv , struct ttm_buffer_object *bo ) 
12247{ int ret ;
12248  int tmp___7 ;
12249  long tmp___8 ;
12250  unsigned long __cil_tmp6 ;
12251  unsigned long __cil_tmp7 ;
12252  struct ttm_buffer_object *__cil_tmp8 ;
12253  unsigned long __cil_tmp9 ;
12254  unsigned long __cil_tmp10 ;
12255  unsigned long __cil_tmp11 ;
12256  unsigned long __cil_tmp12 ;
12257  struct ttm_buffer_object *__cil_tmp13 ;
12258  unsigned long __cil_tmp14 ;
12259  unsigned long __cil_tmp15 ;
12260  unsigned long __cil_tmp16 ;
12261  unsigned long __cil_tmp17 ;
12262  bool __cil_tmp18 ;
12263  bool __cil_tmp19 ;
12264  bool __cil_tmp20 ;
12265  long __cil_tmp21 ;
12266  bool __cil_tmp22 ;
12267  bool __cil_tmp23 ;
12268  bool __cil_tmp24 ;
12269
12270  {
12271  {
12272#line 920
12273  __cil_tmp6 = (unsigned long )dev_priv;
12274#line 920
12275  __cil_tmp7 = __cil_tmp6 + 134752;
12276#line 920
12277  __cil_tmp8 = *((struct ttm_buffer_object **)__cil_tmp7);
12278#line 920
12279  __cil_tmp9 = (unsigned long )__cil_tmp8;
12280#line 920
12281  __cil_tmp10 = (unsigned long )bo;
12282#line 920
12283  if (__cil_tmp10 == __cil_tmp9) {
12284#line 923
12285    return (0);
12286  } else {
12287    {
12288#line 920
12289    __cil_tmp11 = (unsigned long )dev_priv;
12290#line 920
12291    __cil_tmp12 = __cil_tmp11 + 134744;
12292#line 920
12293    __cil_tmp13 = *((struct ttm_buffer_object **)__cil_tmp12);
12294#line 920
12295    __cil_tmp14 = (unsigned long )__cil_tmp13;
12296#line 920
12297    __cil_tmp15 = (unsigned long )bo;
12298#line 920
12299    if (__cil_tmp15 == __cil_tmp14) {
12300      {
12301#line 920
12302      __cil_tmp16 = (unsigned long )dev_priv;
12303#line 920
12304      __cil_tmp17 = __cil_tmp16 + 134764;
12305#line 920
12306      if (*((bool *)__cil_tmp17)) {
12307#line 923
12308        return (0);
12309      } else {
12310
12311      }
12312      }
12313    } else {
12314
12315    }
12316    }
12317  }
12318  }
12319  {
12320#line 932
12321  __cil_tmp18 = (bool )1;
12322#line 932
12323  __cil_tmp19 = (bool )0;
12324#line 932
12325  __cil_tmp20 = (bool )0;
12326#line 932
12327  ret = ttm_bo_validate(bo, & vmw_vram_gmr_placement, __cil_tmp18, __cil_tmp19, __cil_tmp20);
12328  }
12329#line 933
12330  if (ret == 0) {
12331#line 933
12332    tmp___7 = 1;
12333  } else
12334#line 933
12335  if (ret == -512) {
12336#line 933
12337    tmp___7 = 1;
12338  } else {
12339#line 933
12340    tmp___7 = 0;
12341  }
12342  {
12343#line 933
12344  __cil_tmp21 = (long )tmp___7;
12345#line 933
12346  tmp___8 = __builtin_expect(__cil_tmp21, 1L);
12347  }
12348#line 933
12349  if (tmp___8) {
12350#line 934
12351    return (ret);
12352  } else {
12353
12354  }
12355  {
12356#line 941
12357  printk("<6>[drm] Falling through to VRAM.\n");
12358#line 942
12359  __cil_tmp22 = (bool )1;
12360#line 942
12361  __cil_tmp23 = (bool )0;
12362#line 942
12363  __cil_tmp24 = (bool )0;
12364#line 942
12365  ret = ttm_bo_validate(bo, & vmw_vram_placement, __cil_tmp22, __cil_tmp23, __cil_tmp24);
12366  }
12367#line 943
12368  return (ret);
12369}
12370}
12371#line 947 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
12372static int vmw_validate_buffers(struct vmw_private *dev_priv , struct vmw_sw_context *sw_context ) 
12373{ struct ttm_validate_buffer *entry ;
12374  int ret ;
12375  struct list_head    *__mptr ;
12376  struct list_head    *__mptr___0 ;
12377  long tmp___7 ;
12378  unsigned long __cil_tmp8 ;
12379  unsigned long __cil_tmp9 ;
12380  struct list_head *__cil_tmp10 ;
12381  struct ttm_validate_buffer *__cil_tmp11 ;
12382  struct list_head *__cil_tmp12 ;
12383  unsigned int __cil_tmp13 ;
12384  char *__cil_tmp14 ;
12385  char *__cil_tmp15 ;
12386  unsigned long __cil_tmp16 ;
12387  unsigned long __cil_tmp17 ;
12388  struct list_head *__cil_tmp18 ;
12389  unsigned long __cil_tmp19 ;
12390  struct list_head *__cil_tmp20 ;
12391  unsigned long __cil_tmp21 ;
12392  unsigned long __cil_tmp22 ;
12393  unsigned long __cil_tmp23 ;
12394  struct ttm_buffer_object *__cil_tmp24 ;
12395  int __cil_tmp25 ;
12396  int __cil_tmp26 ;
12397  int __cil_tmp27 ;
12398  long __cil_tmp28 ;
12399  struct list_head *__cil_tmp29 ;
12400  struct ttm_validate_buffer *__cil_tmp30 ;
12401  struct list_head *__cil_tmp31 ;
12402  unsigned int __cil_tmp32 ;
12403  char *__cil_tmp33 ;
12404  char *__cil_tmp34 ;
12405
12406  {
12407#line 953
12408  __cil_tmp8 = (unsigned long )sw_context;
12409#line 953
12410  __cil_tmp9 = __cil_tmp8 + 96;
12411#line 953
12412  __cil_tmp10 = *((struct list_head **)__cil_tmp9);
12413#line 953
12414  __mptr = (struct list_head    *)__cil_tmp10;
12415#line 953
12416  __cil_tmp11 = (struct ttm_validate_buffer *)0;
12417#line 953
12418  __cil_tmp12 = (struct list_head *)__cil_tmp11;
12419#line 953
12420  __cil_tmp13 = (unsigned int )__cil_tmp12;
12421#line 953
12422  __cil_tmp14 = (char *)__mptr;
12423#line 953
12424  __cil_tmp15 = __cil_tmp14 - __cil_tmp13;
12425#line 953
12426  entry = (struct ttm_validate_buffer *)__cil_tmp15;
12427  {
12428#line 953
12429  while (1) {
12430    while_continue: /* CIL Label */ ;
12431    {
12432#line 953
12433    __cil_tmp16 = (unsigned long )sw_context;
12434#line 953
12435    __cil_tmp17 = __cil_tmp16 + 96;
12436#line 953
12437    __cil_tmp18 = (struct list_head *)__cil_tmp17;
12438#line 953
12439    __cil_tmp19 = (unsigned long )__cil_tmp18;
12440#line 953
12441    __cil_tmp20 = (struct list_head *)entry;
12442#line 953
12443    __cil_tmp21 = (unsigned long )__cil_tmp20;
12444#line 953
12445    if (__cil_tmp21 != __cil_tmp19) {
12446
12447    } else {
12448#line 953
12449      goto while_break;
12450    }
12451    }
12452    {
12453#line 954
12454    __cil_tmp22 = (unsigned long )entry;
12455#line 954
12456    __cil_tmp23 = __cil_tmp22 + 16;
12457#line 954
12458    __cil_tmp24 = *((struct ttm_buffer_object **)__cil_tmp23);
12459#line 954
12460    ret = vmw_validate_single_buffer(dev_priv, __cil_tmp24);
12461#line 955
12462    __cil_tmp25 = ret != 0;
12463#line 955
12464    __cil_tmp26 = ! __cil_tmp25;
12465#line 955
12466    __cil_tmp27 = ! __cil_tmp26;
12467#line 955
12468    __cil_tmp28 = (long )__cil_tmp27;
12469#line 955
12470    tmp___7 = __builtin_expect(__cil_tmp28, 0L);
12471    }
12472#line 955
12473    if (tmp___7) {
12474#line 956
12475      return (ret);
12476    } else {
12477
12478    }
12479#line 953
12480    __cil_tmp29 = *((struct list_head **)entry);
12481#line 953
12482    __mptr___0 = (struct list_head    *)__cil_tmp29;
12483#line 953
12484    __cil_tmp30 = (struct ttm_validate_buffer *)0;
12485#line 953
12486    __cil_tmp31 = (struct list_head *)__cil_tmp30;
12487#line 953
12488    __cil_tmp32 = (unsigned int )__cil_tmp31;
12489#line 953
12490    __cil_tmp33 = (char *)__mptr___0;
12491#line 953
12492    __cil_tmp34 = __cil_tmp33 - __cil_tmp32;
12493#line 953
12494    entry = (struct ttm_validate_buffer *)__cil_tmp34;
12495  }
12496  while_break: /* CIL Label */ ;
12497  }
12498#line 958
12499  return (0);
12500}
12501}
12502#line 961 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
12503static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context , uint32_t size ) 
12504{ long tmp___7 ;
12505  void *tmp___8 ;
12506  unsigned long __cil_tmp5 ;
12507  unsigned long __cil_tmp6 ;
12508  uint32_t __cil_tmp7 ;
12509  int __cil_tmp8 ;
12510  int __cil_tmp9 ;
12511  int __cil_tmp10 ;
12512  long __cil_tmp11 ;
12513  unsigned long __cil_tmp12 ;
12514  unsigned long __cil_tmp13 ;
12515  uint32_t __cil_tmp14 ;
12516  unsigned long __cil_tmp15 ;
12517  unsigned long __cil_tmp16 ;
12518  unsigned long __cil_tmp17 ;
12519  unsigned long __cil_tmp18 ;
12520  uint32_t __cil_tmp19 ;
12521  unsigned long __cil_tmp20 ;
12522  unsigned long __cil_tmp21 ;
12523  unsigned long __cil_tmp22 ;
12524  uint32_t __cil_tmp23 ;
12525  uint32_t __cil_tmp24 ;
12526  uint32_t __cil_tmp25 ;
12527  unsigned long __cil_tmp26 ;
12528  uint32_t __cil_tmp27 ;
12529  uint32_t __cil_tmp28 ;
12530  unsigned long __cil_tmp29 ;
12531  unsigned long __cil_tmp30 ;
12532  uint32_t __cil_tmp31 ;
12533  uint32_t __cil_tmp32 ;
12534  unsigned long __cil_tmp33 ;
12535  unsigned long __cil_tmp34 ;
12536  uint32_t __cil_tmp35 ;
12537  uint32_t __cil_tmp36 ;
12538  uint32_t __cil_tmp37 ;
12539  void *__cil_tmp38 ;
12540  unsigned long __cil_tmp39 ;
12541  unsigned long __cil_tmp40 ;
12542  unsigned long __cil_tmp41 ;
12543  uint32_t *__cil_tmp42 ;
12544  unsigned long __cil_tmp43 ;
12545  unsigned long __cil_tmp44 ;
12546  unsigned long __cil_tmp45 ;
12547  uint32_t *__cil_tmp46 ;
12548  void    *__cil_tmp47 ;
12549  unsigned long __cil_tmp48 ;
12550  unsigned long __cil_tmp49 ;
12551  uint32_t __cil_tmp50 ;
12552  unsigned long __cil_tmp51 ;
12553  unsigned long __cil_tmp52 ;
12554  unsigned long __cil_tmp53 ;
12555  void *__cil_tmp54 ;
12556  unsigned long __cil_tmp55 ;
12557  unsigned long __cil_tmp56 ;
12558  unsigned long __cil_tmp57 ;
12559  uint32_t *__cil_tmp58 ;
12560  unsigned long __cil_tmp59 ;
12561  unsigned long __cil_tmp60 ;
12562  unsigned long __cil_tmp61 ;
12563
12564  {
12565  {
12566#line 964
12567  __cil_tmp5 = (unsigned long )sw_context;
12568#line 964
12569  __cil_tmp6 = __cil_tmp5 + 131208;
12570#line 964
12571  __cil_tmp7 = *((uint32_t *)__cil_tmp6);
12572#line 964
12573  __cil_tmp8 = __cil_tmp7 >= size;
12574#line 964
12575  __cil_tmp9 = ! __cil_tmp8;
12576#line 964
12577  __cil_tmp10 = ! __cil_tmp9;
12578#line 964
12579  __cil_tmp11 = (long )__cil_tmp10;
12580#line 964
12581  tmp___7 = __builtin_expect(__cil_tmp11, 1L);
12582  }
12583#line 964
12584  if (tmp___7) {
12585#line 965
12586    return (0);
12587  } else {
12588
12589  }
12590  {
12591#line 967
12592  __cil_tmp12 = (unsigned long )sw_context;
12593#line 967
12594  __cil_tmp13 = __cil_tmp12 + 131208;
12595#line 967
12596  __cil_tmp14 = *((uint32_t *)__cil_tmp13);
12597#line 967
12598  if (__cil_tmp14 == 0U) {
12599#line 968
12600    __cil_tmp15 = (unsigned long )sw_context;
12601#line 968
12602    __cil_tmp16 = __cil_tmp15 + 131208;
12603#line 968
12604    *((uint32_t *)__cil_tmp16) = (uint32_t )32768;
12605  } else {
12606
12607  }
12608  }
12609  {
12610#line 970
12611  while (1) {
12612    while_continue: /* CIL Label */ ;
12613    {
12614#line 970
12615    __cil_tmp17 = (unsigned long )sw_context;
12616#line 970
12617    __cil_tmp18 = __cil_tmp17 + 131208;
12618#line 970
12619    __cil_tmp19 = *((uint32_t *)__cil_tmp18);
12620#line 970
12621    if (__cil_tmp19 < size) {
12622
12623    } else {
12624#line 970
12625      goto while_break;
12626    }
12627    }
12628#line 971
12629    __cil_tmp20 = (unsigned long )sw_context;
12630#line 971
12631    __cil_tmp21 = __cil_tmp20 + 131208;
12632#line 971
12633    __cil_tmp22 = 1UL << 12;
12634#line 971
12635    __cil_tmp23 = (uint32_t )__cil_tmp22;
12636#line 971
12637    __cil_tmp24 = __cil_tmp23 - 1U;
12638#line 971
12639    __cil_tmp25 = ~ __cil_tmp24;
12640#line 971
12641    __cil_tmp26 = 1UL << 12;
12642#line 971
12643    __cil_tmp27 = (uint32_t )__cil_tmp26;
12644#line 971
12645    __cil_tmp28 = __cil_tmp27 - 1U;
12646#line 971
12647    __cil_tmp29 = (unsigned long )sw_context;
12648#line 971
12649    __cil_tmp30 = __cil_tmp29 + 131208;
12650#line 971
12651    __cil_tmp31 = *((uint32_t *)__cil_tmp30);
12652#line 971
12653    __cil_tmp32 = __cil_tmp31 >> 1;
12654#line 971
12655    __cil_tmp33 = (unsigned long )sw_context;
12656#line 971
12657    __cil_tmp34 = __cil_tmp33 + 131208;
12658#line 971
12659    __cil_tmp35 = *((uint32_t *)__cil_tmp34);
12660#line 971
12661    __cil_tmp36 = __cil_tmp35 + __cil_tmp32;
12662#line 971
12663    __cil_tmp37 = __cil_tmp36 + __cil_tmp28;
12664#line 971
12665    *((uint32_t *)__cil_tmp21) = __cil_tmp37 & __cil_tmp25;
12666  }
12667  while_break: /* CIL Label */ ;
12668  }
12669  {
12670#line 976
12671  __cil_tmp38 = (void *)0;
12672#line 976
12673  __cil_tmp39 = (unsigned long )__cil_tmp38;
12674#line 976
12675  __cil_tmp40 = (unsigned long )sw_context;
12676#line 976
12677  __cil_tmp41 = __cil_tmp40 + 131200;
12678#line 976
12679  __cil_tmp42 = *((uint32_t **)__cil_tmp41);
12680#line 976
12681  __cil_tmp43 = (unsigned long )__cil_tmp42;
12682#line 976
12683  if (__cil_tmp43 != __cil_tmp39) {
12684    {
12685#line 977
12686    __cil_tmp44 = (unsigned long )sw_context;
12687#line 977
12688    __cil_tmp45 = __cil_tmp44 + 131200;
12689#line 977
12690    __cil_tmp46 = *((uint32_t **)__cil_tmp45);
12691#line 977
12692    __cil_tmp47 = (void    *)__cil_tmp46;
12693#line 977
12694    vfree(__cil_tmp47);
12695    }
12696  } else {
12697
12698  }
12699  }
12700  {
12701#line 979
12702  __cil_tmp48 = (unsigned long )sw_context;
12703#line 979
12704  __cil_tmp49 = __cil_tmp48 + 131208;
12705#line 979
12706  __cil_tmp50 = *((uint32_t *)__cil_tmp49);
12707#line 979
12708  __cil_tmp51 = (unsigned long )__cil_tmp50;
12709#line 979
12710  tmp___8 = vmalloc(__cil_tmp51);
12711#line 979
12712  __cil_tmp52 = (unsigned long )sw_context;
12713#line 979
12714  __cil_tmp53 = __cil_tmp52 + 131200;
12715#line 979
12716  *((uint32_t **)__cil_tmp53) = (uint32_t *)tmp___8;
12717  }
12718  {
12719#line 981
12720  __cil_tmp54 = (void *)0;
12721#line 981
12722  __cil_tmp55 = (unsigned long )__cil_tmp54;
12723#line 981
12724  __cil_tmp56 = (unsigned long )sw_context;
12725#line 981
12726  __cil_tmp57 = __cil_tmp56 + 131200;
12727#line 981
12728  __cil_tmp58 = *((uint32_t **)__cil_tmp57);
12729#line 981
12730  __cil_tmp59 = (unsigned long )__cil_tmp58;
12731#line 981
12732  if (__cil_tmp59 == __cil_tmp55) {
12733    {
12734#line 982
12735    drm_err("vmw_resize_cmd_bounce", "Failed to allocate command bounce buffer.\n");
12736#line 983
12737    __cil_tmp60 = (unsigned long )sw_context;
12738#line 983
12739    __cil_tmp61 = __cil_tmp60 + 131208;
12740#line 983
12741    *((uint32_t *)__cil_tmp61) = (uint32_t )0;
12742    }
12743#line 984
12744    return (-12);
12745  } else {
12746
12747  }
12748  }
12749#line 987
12750  return (0);
12751}
12752}
12753#line 1001 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
12754int vmw_execbuf_fence_commands(struct drm_file *file_priv , struct vmw_private *dev_priv ,
12755                               struct vmw_fence_obj **p_fence , uint32_t *p_handle ) 
12756{ uint32_t sequence ;
12757  int ret ;
12758  bool synced ;
12759  int tmp___7 ;
12760  long tmp___8 ;
12761  long tmp___9 ;
12762  int tmp___10 ;
12763  long tmp___11 ;
12764  void *__cil_tmp13 ;
12765  unsigned long __cil_tmp14 ;
12766  unsigned long __cil_tmp15 ;
12767  void *__cil_tmp16 ;
12768  unsigned long __cil_tmp17 ;
12769  unsigned long __cil_tmp18 ;
12770  long __cil_tmp19 ;
12771  int __cil_tmp20 ;
12772  int __cil_tmp21 ;
12773  int __cil_tmp22 ;
12774  long __cil_tmp23 ;
12775  void *__cil_tmp24 ;
12776  unsigned long __cil_tmp25 ;
12777  unsigned long __cil_tmp26 ;
12778  unsigned long __cil_tmp27 ;
12779  unsigned long __cil_tmp28 ;
12780  struct vmw_fence_manager *__cil_tmp29 ;
12781  uint32_t *__cil_tmp30 ;
12782  uint32_t __cil_tmp31 ;
12783  uint32_t __cil_tmp32 ;
12784  unsigned long __cil_tmp33 ;
12785  unsigned long __cil_tmp34 ;
12786  struct vmw_fence_manager *__cil_tmp35 ;
12787  uint32_t *__cil_tmp36 ;
12788  uint32_t __cil_tmp37 ;
12789  uint32_t __cil_tmp38 ;
12790  long __cil_tmp39 ;
12791  bool __cil_tmp40 ;
12792  bool __cil_tmp41 ;
12793  uint32_t *__cil_tmp42 ;
12794  uint32_t __cil_tmp43 ;
12795  bool __cil_tmp44 ;
12796  void *__cil_tmp45 ;
12797
12798  {
12799#line 1008
12800  synced = (bool )0;
12801  {
12802#line 1011
12803  while (1) {
12804    while_continue: /* CIL Label */ ;
12805    {
12806#line 1011
12807    __cil_tmp13 = (void *)0;
12808#line 1011
12809    __cil_tmp14 = (unsigned long )__cil_tmp13;
12810#line 1011
12811    __cil_tmp15 = (unsigned long )p_handle;
12812#line 1011
12813    if (__cil_tmp15 != __cil_tmp14) {
12814      {
12815#line 1011
12816      __cil_tmp16 = (void *)0;
12817#line 1011
12818      __cil_tmp17 = (unsigned long )__cil_tmp16;
12819#line 1011
12820      __cil_tmp18 = (unsigned long )file_priv;
12821#line 1011
12822      if (__cil_tmp18 == __cil_tmp17) {
12823#line 1011
12824        tmp___7 = 1;
12825      } else {
12826#line 1011
12827        tmp___7 = 0;
12828      }
12829      }
12830    } else {
12831#line 1011
12832      tmp___7 = 0;
12833    }
12834    }
12835    {
12836#line 1011
12837    __cil_tmp19 = (long )tmp___7;
12838#line 1011
12839    tmp___8 = __builtin_expect(__cil_tmp19, 0L);
12840    }
12841#line 1011
12842    if (tmp___8) {
12843      {
12844#line 1011
12845      while (1) {
12846        while_continue___0: /* CIL Label */ ;
12847#line 1011
12848        __asm__  volatile   ("1:\tud2\n"
12849                             ".pushsection __bug_table,\"a\"\n"
12850                             "2:\t.long 1b - 2b, %c0 - 2b\n"
12851                             "\t.word %c1, 0\n"
12852                             "\t.org 2b+%c2\n"
12853                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"),
12854                             "i" (1011), "i" (12UL));
12855        {
12856#line 1011
12857        while (1) {
12858          while_continue___1: /* CIL Label */ ;
12859        }
12860        while_break___1: /* CIL Label */ ;
12861        }
12862#line 1011
12863        goto while_break___0;
12864      }
12865      while_break___0: /* CIL Label */ ;
12866      }
12867    } else {
12868
12869    }
12870#line 1011
12871    goto while_break;
12872  }
12873  while_break: /* CIL Label */ ;
12874  }
12875  {
12876#line 1013
12877  ret = vmw_fifo_send_fence(dev_priv, & sequence);
12878#line 1014
12879  __cil_tmp20 = ret != 0;
12880#line 1014
12881  __cil_tmp21 = ! __cil_tmp20;
12882#line 1014
12883  __cil_tmp22 = ! __cil_tmp21;
12884#line 1014
12885  __cil_tmp23 = (long )__cil_tmp22;
12886#line 1014
12887  tmp___9 = __builtin_expect(__cil_tmp23, 0L);
12888  }
12889#line 1014
12890  if (tmp___9) {
12891    {
12892#line 1015
12893    drm_err("vmw_execbuf_fence_commands", "Fence submission error. Syncing.\n");
12894#line 1016
12895    synced = (bool )1;
12896    }
12897  } else {
12898
12899  }
12900  {
12901#line 1019
12902  __cil_tmp24 = (void *)0;
12903#line 1019
12904  __cil_tmp25 = (unsigned long )__cil_tmp24;
12905#line 1019
12906  __cil_tmp26 = (unsigned long )p_handle;
12907#line 1019
12908  if (__cil_tmp26 != __cil_tmp25) {
12909    {
12910#line 1020
12911    __cil_tmp27 = (unsigned long )dev_priv;
12912#line 1020
12913    __cil_tmp28 = __cil_tmp27 + 3008;
12914#line 1020
12915    __cil_tmp29 = *((struct vmw_fence_manager **)__cil_tmp28);
12916#line 1020
12917    __cil_tmp30 = & sequence;
12918#line 1020
12919    __cil_tmp31 = *__cil_tmp30;
12920#line 1020
12921    __cil_tmp32 = (uint32_t )1;
12922#line 1020
12923    ret = vmw_user_fence_create(file_priv, __cil_tmp29, __cil_tmp31, __cil_tmp32,
12924                                p_fence, p_handle);
12925    }
12926  } else {
12927    {
12928#line 1025
12929    __cil_tmp33 = (unsigned long )dev_priv;
12930#line 1025
12931    __cil_tmp34 = __cil_tmp33 + 3008;
12932#line 1025
12933    __cil_tmp35 = *((struct vmw_fence_manager **)__cil_tmp34);
12934#line 1025
12935    __cil_tmp36 = & sequence;
12936#line 1025
12937    __cil_tmp37 = *__cil_tmp36;
12938#line 1025
12939    __cil_tmp38 = (uint32_t )1;
12940#line 1025
12941    ret = vmw_fence_create(__cil_tmp35, __cil_tmp37, __cil_tmp38, p_fence);
12942    }
12943  }
12944  }
12945#line 1029
12946  if (ret != 0) {
12947#line 1029
12948    if (! synced) {
12949#line 1029
12950      tmp___10 = 1;
12951    } else {
12952#line 1029
12953      tmp___10 = 0;
12954    }
12955  } else {
12956#line 1029
12957    tmp___10 = 0;
12958  }
12959  {
12960#line 1029
12961  __cil_tmp39 = (long )tmp___10;
12962#line 1029
12963  tmp___11 = __builtin_expect(__cil_tmp39, 0L);
12964  }
12965#line 1029
12966  if (tmp___11) {
12967    {
12968#line 1030
12969    __cil_tmp40 = (bool )0;
12970#line 1030
12971    __cil_tmp41 = (bool )0;
12972#line 1030
12973    __cil_tmp42 = & sequence;
12974#line 1030
12975    __cil_tmp43 = *__cil_tmp42;
12976#line 1030
12977    __cil_tmp44 = (bool )0;
12978#line 1030
12979    vmw_fallback_wait(dev_priv, __cil_tmp40, __cil_tmp41, __cil_tmp43, __cil_tmp44,
12980                      1250UL);
12981#line 1033
12982    __cil_tmp45 = (void *)0;
12983#line 1033
12984    *p_fence = (struct vmw_fence_obj *)__cil_tmp45;
12985    }
12986  } else {
12987
12988  }
12989#line 1036
12990  return (0);
12991}
12992}
12993#line 1059 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
12994void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv , struct vmw_fpriv *vmw_fp ,
12995                                 int ret , struct drm_vmw_fence_rep *user_fence_rep ,
12996                                 struct vmw_fence_obj *fence , uint32_t fence_handle ) 
12997{ struct drm_vmw_fence_rep fence_rep ;
12998  long tmp___7 ;
12999  long tmp___8 ;
13000  void *__cil_tmp10 ;
13001  unsigned long __cil_tmp11 ;
13002  unsigned long __cil_tmp12 ;
13003  void *__cil_tmp13 ;
13004  unsigned long __cil_tmp14 ;
13005  void *__cil_tmp15 ;
13006  unsigned long __cil_tmp16 ;
13007  unsigned long __cil_tmp17 ;
13008  int __cil_tmp18 ;
13009  int __cil_tmp19 ;
13010  int __cil_tmp20 ;
13011  long __cil_tmp21 ;
13012  struct drm_vmw_fence_rep *__cil_tmp22 ;
13013  unsigned long __cil_tmp23 ;
13014  unsigned long __cil_tmp24 ;
13015  unsigned long __cil_tmp25 ;
13016  unsigned long __cil_tmp26 ;
13017  unsigned long __cil_tmp27 ;
13018  struct vmw_fifo_state *__cil_tmp28 ;
13019  unsigned long __cil_tmp29 ;
13020  unsigned long __cil_tmp30 ;
13021  unsigned long __cil_tmp31 ;
13022  void *__cil_tmp32 ;
13023  void    *__cil_tmp33 ;
13024  unsigned int __cil_tmp34 ;
13025  int __cil_tmp35 ;
13026  int __cil_tmp36 ;
13027  int __cil_tmp37 ;
13028  long __cil_tmp38 ;
13029  unsigned long __cil_tmp39 ;
13030  int32_t __cil_tmp40 ;
13031  unsigned long __cil_tmp41 ;
13032  unsigned long __cil_tmp42 ;
13033  struct ttm_object_file *__cil_tmp43 ;
13034  unsigned long __cil_tmp44 ;
13035  enum ttm_ref_type __cil_tmp45 ;
13036  unsigned long __cil_tmp46 ;
13037  unsigned long __cil_tmp47 ;
13038  uint32_t __cil_tmp48 ;
13039  bool __cil_tmp49 ;
13040  bool __cil_tmp50 ;
13041
13042  {
13043  {
13044#line 1069
13045  __cil_tmp10 = (void *)0;
13046#line 1069
13047  __cil_tmp11 = (unsigned long )__cil_tmp10;
13048#line 1069
13049  __cil_tmp12 = (unsigned long )user_fence_rep;
13050#line 1069
13051  if (__cil_tmp12 == __cil_tmp11) {
13052#line 1070
13053    return;
13054  } else {
13055
13056  }
13057  }
13058  {
13059#line 1072
13060  __cil_tmp13 = (void *)(& fence_rep);
13061#line 1072
13062  memset(__cil_tmp13, 0, 24UL);
13063#line 1074
13064  __cil_tmp14 = (unsigned long )(& fence_rep) + 20;
13065#line 1074
13066  *((int32_t *)__cil_tmp14) = ret;
13067  }
13068#line 1075
13069  if (ret == 0) {
13070    {
13071#line 1076
13072    while (1) {
13073      while_continue: /* CIL Label */ ;
13074      {
13075#line 1076
13076      __cil_tmp15 = (void *)0;
13077#line 1076
13078      __cil_tmp16 = (unsigned long )__cil_tmp15;
13079#line 1076
13080      __cil_tmp17 = (unsigned long )fence;
13081#line 1076
13082      __cil_tmp18 = __cil_tmp17 == __cil_tmp16;
13083#line 1076
13084      __cil_tmp19 = ! __cil_tmp18;
13085#line 1076
13086      __cil_tmp20 = ! __cil_tmp19;
13087#line 1076
13088      __cil_tmp21 = (long )__cil_tmp20;
13089#line 1076
13090      tmp___7 = __builtin_expect(__cil_tmp21, 0L);
13091      }
13092#line 1076
13093      if (tmp___7) {
13094        {
13095#line 1076
13096        while (1) {
13097          while_continue___0: /* CIL Label */ ;
13098#line 1076
13099          __asm__  volatile   ("1:\tud2\n"
13100                               ".pushsection __bug_table,\"a\"\n"
13101                               "2:\t.long 1b - 2b, %c0 - 2b\n"
13102                               "\t.word %c1, 0\n"
13103                               "\t.org 2b+%c2\n"
13104                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"),
13105                               "i" (1076), "i" (12UL));
13106          {
13107#line 1076
13108          while (1) {
13109            while_continue___1: /* CIL Label */ ;
13110          }
13111          while_break___1: /* CIL Label */ ;
13112          }
13113#line 1076
13114          goto while_break___0;
13115        }
13116        while_break___0: /* CIL Label */ ;
13117        }
13118      } else {
13119
13120      }
13121#line 1076
13122      goto while_break;
13123    }
13124    while_break: /* CIL Label */ ;
13125    }
13126    {
13127#line 1078
13128    __cil_tmp22 = & fence_rep;
13129#line 1078
13130    *((uint32_t *)__cil_tmp22) = fence_handle;
13131#line 1079
13132    __cil_tmp23 = (unsigned long )(& fence_rep) + 8;
13133#line 1079
13134    __cil_tmp24 = (unsigned long )fence;
13135#line 1079
13136    __cil_tmp25 = __cil_tmp24 + 4;
13137#line 1079
13138    *((uint32_t *)__cil_tmp23) = *((u32 *)__cil_tmp25);
13139#line 1080
13140    __cil_tmp26 = (unsigned long )dev_priv;
13141#line 1080
13142    __cil_tmp27 = __cil_tmp26 + 1856;
13143#line 1080
13144    __cil_tmp28 = (struct vmw_fifo_state *)__cil_tmp27;
13145#line 1080
13146    vmw_update_seqno(dev_priv, __cil_tmp28);
13147#line 1081
13148    __cil_tmp29 = (unsigned long )(& fence_rep) + 12;
13149#line 1081
13150    __cil_tmp30 = (unsigned long )dev_priv;
13151#line 1081
13152    __cil_tmp31 = __cil_tmp30 + 2980;
13153#line 1081
13154    *((uint32_t *)__cil_tmp29) = *((uint32_t *)__cil_tmp31);
13155    }
13156  } else {
13157
13158  }
13159  {
13160#line 1089
13161  __cil_tmp32 = (void *)user_fence_rep;
13162#line 1089
13163  __cil_tmp33 = (void    *)(& fence_rep);
13164#line 1089
13165  __cil_tmp34 = (unsigned int )24UL;
13166#line 1089
13167  ret = (int )copy_to_user(__cil_tmp32, __cil_tmp33, __cil_tmp34);
13168#line 1096
13169  __cil_tmp35 = ret != 0;
13170#line 1096
13171  __cil_tmp36 = ! __cil_tmp35;
13172#line 1096
13173  __cil_tmp37 = ! __cil_tmp36;
13174#line 1096
13175  __cil_tmp38 = (long )__cil_tmp37;
13176#line 1096
13177  tmp___8 = __builtin_expect(__cil_tmp38, 0L);
13178  }
13179#line 1096
13180  if (tmp___8) {
13181    {
13182#line 1096
13183    __cil_tmp39 = (unsigned long )(& fence_rep) + 20;
13184#line 1096
13185    __cil_tmp40 = *((int32_t *)__cil_tmp39);
13186#line 1096
13187    if (__cil_tmp40 == 0) {
13188      {
13189#line 1097
13190      __cil_tmp41 = (unsigned long )vmw_fp;
13191#line 1097
13192      __cil_tmp42 = __cil_tmp41 + 8;
13193#line 1097
13194      __cil_tmp43 = *((struct ttm_object_file **)__cil_tmp42);
13195#line 1097
13196      __cil_tmp44 = (unsigned long )fence_handle;
13197#line 1097
13198      __cil_tmp45 = (enum ttm_ref_type )0;
13199#line 1097
13200      ttm_ref_object_base_unref(__cil_tmp43, __cil_tmp44, __cil_tmp45);
13201#line 1099
13202      drm_err("vmw_execbuf_copy_fence_user", "Fence copy error. Syncing.\n");
13203#line 1100
13204      __cil_tmp46 = (unsigned long )fence;
13205#line 1100
13206      __cil_tmp47 = __cil_tmp46 + 36;
13207#line 1100
13208      __cil_tmp48 = *((uint32_t *)__cil_tmp47);
13209#line 1100
13210      __cil_tmp49 = (bool )0;
13211#line 1100
13212      __cil_tmp50 = (bool )0;
13213#line 1100
13214      vmw_fence_obj_wait(fence, __cil_tmp48, __cil_tmp49, __cil_tmp50, 1250UL);
13215      }
13216    } else {
13217
13218    }
13219    }
13220  } else {
13221
13222  }
13223#line 1104
13224  return;
13225}
13226}
13227#line 1106 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
13228int vmw_execbuf_process(struct drm_file *file_priv , struct vmw_private *dev_priv ,
13229                        void *user_commands , void *kernel_commands , uint32_t command_size ,
13230                        uint64_t throttle_us , struct drm_vmw_fence_rep *user_fence_rep ,
13231                        struct vmw_fence_obj **out_fence ) 
13232{ struct vmw_sw_context *sw_context ;
13233  struct vmw_fence_obj *fence ;
13234  uint32_t handle ;
13235  void *cmd ;
13236  int ret ;
13237  long tmp___7 ;
13238  long tmp___8 ;
13239  unsigned long tmp___9 ;
13240  long tmp___10 ;
13241  struct vmw_fpriv *tmp___11 ;
13242  long tmp___12 ;
13243  long tmp___13 ;
13244  long tmp___14 ;
13245  long tmp___15 ;
13246  long tmp___16 ;
13247  size_t __len ;
13248  void *__ret ;
13249  uint32_t *tmp___17 ;
13250  struct vmw_fpriv *tmp___18 ;
13251  long tmp___19 ;
13252  long tmp___20 ;
13253  unsigned long __cil_tmp30 ;
13254  unsigned long __cil_tmp31 ;
13255  struct vmw_fence_obj **__cil_tmp32 ;
13256  void *__cil_tmp33 ;
13257  unsigned long __cil_tmp34 ;
13258  unsigned long __cil_tmp35 ;
13259  struct mutex *__cil_tmp36 ;
13260  int __cil_tmp37 ;
13261  int __cil_tmp38 ;
13262  int __cil_tmp39 ;
13263  long __cil_tmp40 ;
13264  void *__cil_tmp41 ;
13265  unsigned long __cil_tmp42 ;
13266  unsigned long __cil_tmp43 ;
13267  unsigned long __cil_tmp44 ;
13268  unsigned long __cil_tmp45 ;
13269  int __cil_tmp46 ;
13270  int __cil_tmp47 ;
13271  int __cil_tmp48 ;
13272  long __cil_tmp49 ;
13273  unsigned long __cil_tmp50 ;
13274  unsigned long __cil_tmp51 ;
13275  uint32_t *__cil_tmp52 ;
13276  void *__cil_tmp53 ;
13277  void    *__cil_tmp54 ;
13278  unsigned long __cil_tmp55 ;
13279  int __cil_tmp56 ;
13280  int __cil_tmp57 ;
13281  int __cil_tmp58 ;
13282  long __cil_tmp59 ;
13283  unsigned long __cil_tmp60 ;
13284  unsigned long __cil_tmp61 ;
13285  uint32_t *__cil_tmp62 ;
13286  unsigned long __cil_tmp63 ;
13287  unsigned long __cil_tmp64 ;
13288  unsigned long __cil_tmp65 ;
13289  unsigned long __cil_tmp66 ;
13290  unsigned long __cil_tmp67 ;
13291  unsigned long __cil_tmp68 ;
13292  unsigned long __cil_tmp69 ;
13293  unsigned long __cil_tmp70 ;
13294  unsigned long __cil_tmp71 ;
13295  unsigned long __cil_tmp72 ;
13296  unsigned long __cil_tmp73 ;
13297  unsigned long __cil_tmp74 ;
13298  unsigned long __cil_tmp75 ;
13299  unsigned long __cil_tmp76 ;
13300  unsigned long __cil_tmp77 ;
13301  unsigned long __cil_tmp78 ;
13302  unsigned long __cil_tmp79 ;
13303  unsigned long __cil_tmp80 ;
13304  struct list_head *__cil_tmp81 ;
13305  unsigned long __cil_tmp82 ;
13306  unsigned long __cil_tmp83 ;
13307  struct list_head *__cil_tmp84 ;
13308  unsigned long __cil_tmp85 ;
13309  unsigned long __cil_tmp86 ;
13310  unsigned long __cil_tmp87 ;
13311  unsigned long __cil_tmp88 ;
13312  unsigned long __cil_tmp89 ;
13313  unsigned long __cil_tmp90 ;
13314  unsigned long __cil_tmp91 ;
13315  unsigned long __cil_tmp92 ;
13316  unsigned long __cil_tmp93 ;
13317  unsigned long __cil_tmp94 ;
13318  void *__cil_tmp95 ;
13319  unsigned long __cil_tmp96 ;
13320  unsigned long __cil_tmp97 ;
13321  unsigned long __cil_tmp98 ;
13322  struct ttm_buffer_object *__cil_tmp99 ;
13323  unsigned long __cil_tmp100 ;
13324  int __cil_tmp101 ;
13325  unsigned long __cil_tmp102 ;
13326  unsigned long __cil_tmp103 ;
13327  struct list_head *__cil_tmp104 ;
13328  int __cil_tmp105 ;
13329  int __cil_tmp106 ;
13330  int __cil_tmp107 ;
13331  long __cil_tmp108 ;
13332  unsigned long __cil_tmp109 ;
13333  unsigned long __cil_tmp110 ;
13334  struct list_head *__cil_tmp111 ;
13335  int __cil_tmp112 ;
13336  int __cil_tmp113 ;
13337  int __cil_tmp114 ;
13338  long __cil_tmp115 ;
13339  int __cil_tmp116 ;
13340  int __cil_tmp117 ;
13341  int __cil_tmp118 ;
13342  long __cil_tmp119 ;
13343  unsigned long __cil_tmp120 ;
13344  unsigned long __cil_tmp121 ;
13345  unsigned long __cil_tmp122 ;
13346  struct vmw_marker_queue *__cil_tmp123 ;
13347  uint32_t __cil_tmp124 ;
13348  int __cil_tmp125 ;
13349  int __cil_tmp126 ;
13350  int __cil_tmp127 ;
13351  long __cil_tmp128 ;
13352  void *__cil_tmp129 ;
13353  unsigned long __cil_tmp130 ;
13354  unsigned long __cil_tmp131 ;
13355  int __cil_tmp132 ;
13356  int __cil_tmp133 ;
13357  int __cil_tmp134 ;
13358  long __cil_tmp135 ;
13359  void    *__cil_tmp136 ;
13360  void *__cil_tmp137 ;
13361  unsigned long __cil_tmp138 ;
13362  unsigned long __cil_tmp139 ;
13363  struct list_head *__cil_tmp140 ;
13364  struct vmw_fence_obj **__cil_tmp141 ;
13365  struct vmw_fence_obj *__cil_tmp142 ;
13366  void *__cil_tmp143 ;
13367  struct vmw_fence_obj **__cil_tmp144 ;
13368  struct vmw_fence_obj *__cil_tmp145 ;
13369  uint32_t *__cil_tmp146 ;
13370  uint32_t __cil_tmp147 ;
13371  void *__cil_tmp148 ;
13372  unsigned long __cil_tmp149 ;
13373  unsigned long __cil_tmp150 ;
13374  int __cil_tmp151 ;
13375  int __cil_tmp152 ;
13376  int __cil_tmp153 ;
13377  long __cil_tmp154 ;
13378  struct vmw_fence_obj **__cil_tmp155 ;
13379  struct vmw_fence_obj **__cil_tmp156 ;
13380  void *__cil_tmp157 ;
13381  void *__cil_tmp158 ;
13382  unsigned long __cil_tmp159 ;
13383  struct vmw_fence_obj **__cil_tmp160 ;
13384  struct vmw_fence_obj *__cil_tmp161 ;
13385  unsigned long __cil_tmp162 ;
13386  int __cil_tmp163 ;
13387  int __cil_tmp164 ;
13388  int __cil_tmp165 ;
13389  long __cil_tmp166 ;
13390  unsigned long __cil_tmp167 ;
13391  unsigned long __cil_tmp168 ;
13392  struct mutex *__cil_tmp169 ;
13393  unsigned long __cil_tmp170 ;
13394  unsigned long __cil_tmp171 ;
13395  struct list_head *__cil_tmp172 ;
13396  unsigned long __cil_tmp173 ;
13397  unsigned long __cil_tmp174 ;
13398  struct mutex *__cil_tmp175 ;
13399
13400  {
13401  {
13402#line 1115
13403  __cil_tmp30 = (unsigned long )dev_priv;
13404#line 1115
13405  __cil_tmp31 = __cil_tmp30 + 3032;
13406#line 1115
13407  sw_context = (struct vmw_sw_context *)__cil_tmp31;
13408#line 1116
13409  __cil_tmp32 = & fence;
13410#line 1116
13411  __cil_tmp33 = (void *)0;
13412#line 1116
13413  *__cil_tmp32 = (struct vmw_fence_obj *)__cil_tmp33;
13414#line 1121
13415  __cil_tmp34 = (unsigned long )dev_priv;
13416#line 1121
13417  __cil_tmp35 = __cil_tmp34 + 134304;
13418#line 1121
13419  __cil_tmp36 = (struct mutex *)__cil_tmp35;
13420#line 1121
13421  ret = (int )mutex_lock_interruptible(__cil_tmp36);
13422#line 1122
13423  __cil_tmp37 = ret != 0;
13424#line 1122
13425  __cil_tmp38 = ! __cil_tmp37;
13426#line 1122
13427  __cil_tmp39 = ! __cil_tmp38;
13428#line 1122
13429  __cil_tmp40 = (long )__cil_tmp39;
13430#line 1122
13431  tmp___7 = __builtin_expect(__cil_tmp40, 0L);
13432  }
13433#line 1122
13434  if (tmp___7) {
13435#line 1123
13436    return (-512);
13437  } else {
13438
13439  }
13440  {
13441#line 1125
13442  __cil_tmp41 = (void *)0;
13443#line 1125
13444  __cil_tmp42 = (unsigned long )__cil_tmp41;
13445#line 1125
13446  __cil_tmp43 = (unsigned long )kernel_commands;
13447#line 1125
13448  if (__cil_tmp43 == __cil_tmp42) {
13449    {
13450#line 1126
13451    __cil_tmp44 = (unsigned long )sw_context;
13452#line 1126
13453    __cil_tmp45 = __cil_tmp44 + 61;
13454#line 1126
13455    *((bool *)__cil_tmp45) = (bool )0;
13456#line 1128
13457    ret = vmw_resize_cmd_bounce(sw_context, command_size);
13458#line 1129
13459    __cil_tmp46 = ret != 0;
13460#line 1129
13461    __cil_tmp47 = ! __cil_tmp46;
13462#line 1129
13463    __cil_tmp48 = ! __cil_tmp47;
13464#line 1129
13465    __cil_tmp49 = (long )__cil_tmp48;
13466#line 1129
13467    tmp___8 = __builtin_expect(__cil_tmp49, 0L);
13468    }
13469#line 1129
13470    if (tmp___8) {
13471#line 1130
13472      goto out_unlock;
13473    } else {
13474
13475    }
13476    {
13477#line 1133
13478    __cil_tmp50 = (unsigned long )sw_context;
13479#line 1133
13480    __cil_tmp51 = __cil_tmp50 + 131200;
13481#line 1133
13482    __cil_tmp52 = *((uint32_t **)__cil_tmp51);
13483#line 1133
13484    __cil_tmp53 = (void *)__cil_tmp52;
13485#line 1133
13486    __cil_tmp54 = (void    *)user_commands;
13487#line 1133
13488    __cil_tmp55 = (unsigned long )command_size;
13489#line 1133
13490    tmp___9 = (unsigned long )copy_from_user(__cil_tmp53, __cil_tmp54, __cil_tmp55);
13491#line 1133
13492    ret = (int )tmp___9;
13493#line 1136
13494    __cil_tmp56 = ret != 0;
13495#line 1136
13496    __cil_tmp57 = ! __cil_tmp56;
13497#line 1136
13498    __cil_tmp58 = ! __cil_tmp57;
13499#line 1136
13500    __cil_tmp59 = (long )__cil_tmp58;
13501#line 1136
13502    tmp___10 = __builtin_expect(__cil_tmp59, 0L);
13503    }
13504#line 1136
13505    if (tmp___10) {
13506      {
13507#line 1137
13508      ret = -14;
13509#line 1138
13510      drm_err("vmw_execbuf_process", "Failed copying commands.\n");
13511      }
13512#line 1139
13513      goto out_unlock;
13514    } else {
13515
13516    }
13517#line 1141
13518    __cil_tmp60 = (unsigned long )sw_context;
13519#line 1141
13520    __cil_tmp61 = __cil_tmp60 + 131200;
13521#line 1141
13522    __cil_tmp62 = *((uint32_t **)__cil_tmp61);
13523#line 1141
13524    kernel_commands = (void *)__cil_tmp62;
13525  } else {
13526#line 1143
13527    __cil_tmp63 = (unsigned long )sw_context;
13528#line 1143
13529    __cil_tmp64 = __cil_tmp63 + 61;
13530#line 1143
13531    *((bool *)__cil_tmp64) = (bool )1;
13532  }
13533  }
13534  {
13535#line 1145
13536  tmp___11 = vmw_fpriv(file_priv);
13537#line 1145
13538  __cil_tmp65 = (unsigned long )sw_context;
13539#line 1145
13540  __cil_tmp66 = __cil_tmp65 + 88;
13541#line 1145
13542  __cil_tmp67 = (unsigned long )tmp___11;
13543#line 1145
13544  __cil_tmp68 = __cil_tmp67 + 8;
13545#line 1145
13546  *((struct ttm_object_file **)__cil_tmp66) = *((struct ttm_object_file **)__cil_tmp68);
13547#line 1146
13548  __cil_tmp69 = (unsigned long )sw_context;
13549#line 1146
13550  __cil_tmp70 = __cil_tmp69 + 60;
13551#line 1146
13552  *((bool *)__cil_tmp70) = (bool )0;
13553#line 1147
13554  __cil_tmp71 = (unsigned long )sw_context;
13555#line 1147
13556  __cil_tmp72 = __cil_tmp71 + 80;
13557#line 1147
13558  *((bool *)__cil_tmp72) = (bool )0;
13559#line 1148
13560  __cil_tmp73 = (unsigned long )sw_context;
13561#line 1148
13562  __cil_tmp74 = __cil_tmp73 + 32880;
13563#line 1148
13564  *((uint32_t *)__cil_tmp74) = (uint32_t )0;
13565#line 1149
13566  __cil_tmp75 = (unsigned long )sw_context;
13567#line 1149
13568  __cil_tmp76 = __cil_tmp75 + 131192;
13569#line 1149
13570  *((uint32_t *)__cil_tmp76) = (uint32_t )0;
13571#line 1150
13572  __cil_tmp77 = (unsigned long )sw_context;
13573#line 1150
13574  __cil_tmp78 = __cil_tmp77 + 131232;
13575#line 1150
13576  *((uint32_t *)__cil_tmp78) = (uint32_t )0;
13577#line 1151
13578  __cil_tmp79 = (unsigned long )sw_context;
13579#line 1151
13580  __cil_tmp80 = __cil_tmp79 + 131240;
13581#line 1151
13582  __cil_tmp81 = (struct list_head *)__cil_tmp80;
13583#line 1151
13584  INIT_LIST_HEAD(__cil_tmp81);
13585#line 1152
13586  __cil_tmp82 = (unsigned long )sw_context;
13587#line 1152
13588  __cil_tmp83 = __cil_tmp82 + 131216;
13589#line 1152
13590  __cil_tmp84 = (struct list_head *)__cil_tmp83;
13591#line 1152
13592  INIT_LIST_HEAD(__cil_tmp84);
13593#line 1153
13594  __cil_tmp85 = (unsigned long )sw_context;
13595#line 1153
13596  __cil_tmp86 = __cil_tmp85 + 131256;
13597#line 1153
13598  __cil_tmp87 = (unsigned long )dev_priv;
13599#line 1153
13600  __cil_tmp88 = __cil_tmp87 + 134752;
13601#line 1153
13602  *((struct ttm_buffer_object **)__cil_tmp86) = *((struct ttm_buffer_object **)__cil_tmp88);
13603#line 1154
13604  __cil_tmp89 = (unsigned long )sw_context;
13605#line 1154
13606  __cil_tmp90 = __cil_tmp89 + 131264;
13607#line 1154
13608  __cil_tmp91 = (unsigned long )dev_priv;
13609#line 1154
13610  __cil_tmp92 = __cil_tmp91 + 134760;
13611#line 1154
13612  *((uint32_t *)__cil_tmp90) = *((uint32_t *)__cil_tmp92);
13613#line 1155
13614  __cil_tmp93 = (unsigned long )sw_context;
13615#line 1155
13616  __cil_tmp94 = __cil_tmp93 + 131268;
13617#line 1155
13618  __cil_tmp95 = (void *)0;
13619#line 1155
13620  __cil_tmp96 = (unsigned long )__cil_tmp95;
13621#line 1155
13622  __cil_tmp97 = (unsigned long )dev_priv;
13623#line 1155
13624  __cil_tmp98 = __cil_tmp97 + 134752;
13625#line 1155
13626  __cil_tmp99 = *((struct ttm_buffer_object **)__cil_tmp98);
13627#line 1155
13628  __cil_tmp100 = (unsigned long )__cil_tmp99;
13629#line 1155
13630  __cil_tmp101 = __cil_tmp100 != __cil_tmp96;
13631#line 1155
13632  *((bool *)__cil_tmp94) = (bool )__cil_tmp101;
13633#line 1157
13634  __cil_tmp102 = (unsigned long )sw_context;
13635#line 1157
13636  __cil_tmp103 = __cil_tmp102 + 96;
13637#line 1157
13638  __cil_tmp104 = (struct list_head *)__cil_tmp103;
13639#line 1157
13640  INIT_LIST_HEAD(__cil_tmp104);
13641#line 1159
13642  ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands, command_size);
13643#line 1161
13644  __cil_tmp105 = ret != 0;
13645#line 1161
13646  __cil_tmp106 = ! __cil_tmp105;
13647#line 1161
13648  __cil_tmp107 = ! __cil_tmp106;
13649#line 1161
13650  __cil_tmp108 = (long )__cil_tmp107;
13651#line 1161
13652  tmp___12 = __builtin_expect(__cil_tmp108, 0L);
13653  }
13654#line 1161
13655  if (tmp___12) {
13656#line 1162
13657    goto out_err;
13658  } else {
13659
13660  }
13661  {
13662#line 1164
13663  __cil_tmp109 = (unsigned long )sw_context;
13664#line 1164
13665  __cil_tmp110 = __cil_tmp109 + 96;
13666#line 1164
13667  __cil_tmp111 = (struct list_head *)__cil_tmp110;
13668#line 1164
13669  ret = ttm_eu_reserve_buffers(__cil_tmp111);
13670#line 1165
13671  __cil_tmp112 = ret != 0;
13672#line 1165
13673  __cil_tmp113 = ! __cil_tmp112;
13674#line 1165
13675  __cil_tmp114 = ! __cil_tmp113;
13676#line 1165
13677  __cil_tmp115 = (long )__cil_tmp114;
13678#line 1165
13679  tmp___13 = __builtin_expect(__cil_tmp115, 0L);
13680  }
13681#line 1165
13682  if (tmp___13) {
13683#line 1166
13684    goto out_err;
13685  } else {
13686
13687  }
13688  {
13689#line 1168
13690  ret = vmw_validate_buffers(dev_priv, sw_context);
13691#line 1169
13692  __cil_tmp116 = ret != 0;
13693#line 1169
13694  __cil_tmp117 = ! __cil_tmp116;
13695#line 1169
13696  __cil_tmp118 = ! __cil_tmp117;
13697#line 1169
13698  __cil_tmp119 = (long )__cil_tmp118;
13699#line 1169
13700  tmp___14 = __builtin_expect(__cil_tmp119, 0L);
13701  }
13702#line 1169
13703  if (tmp___14) {
13704#line 1170
13705    goto out_err;
13706  } else {
13707
13708  }
13709  {
13710#line 1172
13711  vmw_apply_relocations(sw_context);
13712  }
13713#line 1174
13714  if (throttle_us) {
13715    {
13716#line 1175
13717    __cil_tmp120 = 1856 + 160;
13718#line 1175
13719    __cil_tmp121 = (unsigned long )dev_priv;
13720#line 1175
13721    __cil_tmp122 = __cil_tmp121 + __cil_tmp120;
13722#line 1175
13723    __cil_tmp123 = (struct vmw_marker_queue *)__cil_tmp122;
13724#line 1175
13725    __cil_tmp124 = (uint32_t )throttle_us;
13726#line 1175
13727    ret = vmw_wait_lag(dev_priv, __cil_tmp123, __cil_tmp124);
13728#line 1178
13729    __cil_tmp125 = ret != 0;
13730#line 1178
13731    __cil_tmp126 = ! __cil_tmp125;
13732#line 1178
13733    __cil_tmp127 = ! __cil_tmp126;
13734#line 1178
13735    __cil_tmp128 = (long )__cil_tmp127;
13736#line 1178
13737    tmp___15 = __builtin_expect(__cil_tmp128, 0L);
13738    }
13739#line 1178
13740    if (tmp___15) {
13741#line 1179
13742      goto out_throttle;
13743    } else {
13744
13745    }
13746  } else {
13747
13748  }
13749  {
13750#line 1182
13751  cmd = vmw_fifo_reserve(dev_priv, command_size);
13752#line 1183
13753  __cil_tmp129 = (void *)0;
13754#line 1183
13755  __cil_tmp130 = (unsigned long )__cil_tmp129;
13756#line 1183
13757  __cil_tmp131 = (unsigned long )cmd;
13758#line 1183
13759  __cil_tmp132 = __cil_tmp131 == __cil_tmp130;
13760#line 1183
13761  __cil_tmp133 = ! __cil_tmp132;
13762#line 1183
13763  __cil_tmp134 = ! __cil_tmp133;
13764#line 1183
13765  __cil_tmp135 = (long )__cil_tmp134;
13766#line 1183
13767  tmp___16 = __builtin_expect(__cil_tmp135, 0L);
13768  }
13769#line 1183
13770  if (tmp___16) {
13771    {
13772#line 1184
13773    drm_err("vmw_execbuf_process", "Failed reserving fifo space for commands.\n");
13774#line 1185
13775    ret = -12;
13776    }
13777#line 1186
13778    goto out_throttle;
13779  } else {
13780
13781  }
13782  {
13783#line 1189
13784  __len = (size_t )command_size;
13785#line 1189
13786  __cil_tmp136 = (void    *)kernel_commands;
13787#line 1189
13788  __ret = __builtin_memcpy(cmd, __cil_tmp136, __len);
13789#line 1190
13790  vmw_fifo_commit(dev_priv, command_size);
13791#line 1192
13792  vmw_query_bo_switch_commit(dev_priv, sw_context);
13793  }
13794#line 1193
13795  if (user_fence_rep) {
13796#line 1193
13797    tmp___17 = & handle;
13798  } else {
13799#line 1193
13800    __cil_tmp137 = (void *)0;
13801#line 1193
13802    tmp___17 = (uint32_t *)__cil_tmp137;
13803  }
13804  {
13805#line 1193
13806  ret = vmw_execbuf_fence_commands(file_priv, dev_priv, & fence, tmp___17);
13807  }
13808#line 1202
13809  if (ret != 0) {
13810    {
13811#line 1203
13812    drm_err("vmw_execbuf_process", "Fence submission error. Syncing.\n");
13813    }
13814  } else {
13815
13816  }
13817  {
13818#line 1205
13819  __cil_tmp138 = (unsigned long )sw_context;
13820#line 1205
13821  __cil_tmp139 = __cil_tmp138 + 96;
13822#line 1205
13823  __cil_tmp140 = (struct list_head *)__cil_tmp139;
13824#line 1205
13825  __cil_tmp141 = & fence;
13826#line 1205
13827  __cil_tmp142 = *__cil_tmp141;
13828#line 1205
13829  __cil_tmp143 = (void *)__cil_tmp142;
13830#line 1205
13831  ttm_eu_fence_buffer_objects(__cil_tmp140, __cil_tmp143);
13832#line 1208
13833  vmw_clear_validations(sw_context);
13834#line 1209
13835  tmp___18 = vmw_fpriv(file_priv);
13836#line 1209
13837  __cil_tmp144 = & fence;
13838#line 1209
13839  __cil_tmp145 = *__cil_tmp144;
13840#line 1209
13841  __cil_tmp146 = & handle;
13842#line 1209
13843  __cil_tmp147 = *__cil_tmp146;
13844#line 1209
13845  vmw_execbuf_copy_fence_user(dev_priv, tmp___18, ret, user_fence_rep, __cil_tmp145,
13846                              __cil_tmp147);
13847#line 1213
13848  __cil_tmp148 = (void *)0;
13849#line 1213
13850  __cil_tmp149 = (unsigned long )__cil_tmp148;
13851#line 1213
13852  __cil_tmp150 = (unsigned long )out_fence;
13853#line 1213
13854  __cil_tmp151 = __cil_tmp150 != __cil_tmp149;
13855#line 1213
13856  __cil_tmp152 = ! __cil_tmp151;
13857#line 1213
13858  __cil_tmp153 = ! __cil_tmp152;
13859#line 1213
13860  __cil_tmp154 = (long )__cil_tmp153;
13861#line 1213
13862  tmp___20 = __builtin_expect(__cil_tmp154, 0L);
13863  }
13864#line 1213
13865  if (tmp___20) {
13866#line 1214
13867    __cil_tmp155 = & fence;
13868#line 1214
13869    *out_fence = *__cil_tmp155;
13870#line 1215
13871    __cil_tmp156 = & fence;
13872#line 1215
13873    __cil_tmp157 = (void *)0;
13874#line 1215
13875    *__cil_tmp156 = (struct vmw_fence_obj *)__cil_tmp157;
13876  } else {
13877    {
13878#line 1216
13879    __cil_tmp158 = (void *)0;
13880#line 1216
13881    __cil_tmp159 = (unsigned long )__cil_tmp158;
13882#line 1216
13883    __cil_tmp160 = & fence;
13884#line 1216
13885    __cil_tmp161 = *__cil_tmp160;
13886#line 1216
13887    __cil_tmp162 = (unsigned long )__cil_tmp161;
13888#line 1216
13889    __cil_tmp163 = __cil_tmp162 != __cil_tmp159;
13890#line 1216
13891    __cil_tmp164 = ! __cil_tmp163;
13892#line 1216
13893    __cil_tmp165 = ! __cil_tmp164;
13894#line 1216
13895    __cil_tmp166 = (long )__cil_tmp165;
13896#line 1216
13897    tmp___19 = __builtin_expect(__cil_tmp166, 1L);
13898    }
13899#line 1216
13900    if (tmp___19) {
13901      {
13902#line 1217
13903      vmw_fence_obj_unreference(& fence);
13904      }
13905    } else {
13906
13907    }
13908  }
13909  {
13910#line 1220
13911  __cil_tmp167 = (unsigned long )dev_priv;
13912#line 1220
13913  __cil_tmp168 = __cil_tmp167 + 134304;
13914#line 1220
13915  __cil_tmp169 = (struct mutex *)__cil_tmp168;
13916#line 1220
13917  mutex_unlock(__cil_tmp169);
13918  }
13919#line 1221
13920  return (0);
13921  out_err: 
13922  {
13923#line 1224
13924  vmw_free_relocations(sw_context);
13925  }
13926  out_throttle: 
13927  {
13928#line 1226
13929  vmw_query_switch_backoff(sw_context);
13930#line 1227
13931  __cil_tmp170 = (unsigned long )sw_context;
13932#line 1227
13933  __cil_tmp171 = __cil_tmp170 + 96;
13934#line 1227
13935  __cil_tmp172 = (struct list_head *)__cil_tmp171;
13936#line 1227
13937  ttm_eu_backoff_reservation(__cil_tmp172);
13938#line 1228
13939  vmw_clear_validations(sw_context);
13940  }
13941  out_unlock: 
13942  {
13943#line 1230
13944  __cil_tmp173 = (unsigned long )dev_priv;
13945#line 1230
13946  __cil_tmp174 = __cil_tmp173 + 134304;
13947#line 1230
13948  __cil_tmp175 = (struct mutex *)__cil_tmp174;
13949#line 1230
13950  mutex_unlock(__cil_tmp175);
13951  }
13952#line 1231
13953  return (ret);
13954}
13955}
13956#line 1243 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
13957static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv ) 
13958{ bool __cil_tmp2 ;
13959  bool __cil_tmp3 ;
13960  uint32_t __cil_tmp4 ;
13961  bool __cil_tmp5 ;
13962  unsigned long __cil_tmp6 ;
13963  unsigned long __cil_tmp7 ;
13964  struct ttm_buffer_object *__cil_tmp8 ;
13965  bool __cil_tmp9 ;
13966  unsigned long __cil_tmp10 ;
13967  unsigned long __cil_tmp11 ;
13968  struct ttm_buffer_object *__cil_tmp12 ;
13969  bool __cil_tmp13 ;
13970  unsigned long __cil_tmp14 ;
13971  unsigned long __cil_tmp15 ;
13972
13973  {
13974  {
13975#line 1245
13976  drm_err("vmw_execbuf_unpin_panic", "Can\'t unpin query buffer. Trying to recover.\n");
13977#line 1247
13978  __cil_tmp2 = (bool )0;
13979#line 1247
13980  __cil_tmp3 = (bool )1;
13981#line 1247
13982  __cil_tmp4 = (uint32_t )0;
13983#line 1247
13984  __cil_tmp5 = (bool )0;
13985#line 1247
13986  vmw_fallback_wait(dev_priv, __cil_tmp2, __cil_tmp3, __cil_tmp4, __cil_tmp5, 2500UL);
13987#line 1248
13988  __cil_tmp6 = (unsigned long )dev_priv;
13989#line 1248
13990  __cil_tmp7 = __cil_tmp6 + 134752;
13991#line 1248
13992  __cil_tmp8 = *((struct ttm_buffer_object **)__cil_tmp7);
13993#line 1248
13994  __cil_tmp9 = (bool )0;
13995#line 1248
13996  vmw_bo_pin(__cil_tmp8, __cil_tmp9);
13997#line 1249
13998  __cil_tmp10 = (unsigned long )dev_priv;
13999#line 1249
14000  __cil_tmp11 = __cil_tmp10 + 134744;
14001#line 1249
14002  __cil_tmp12 = *((struct ttm_buffer_object **)__cil_tmp11);
14003#line 1249
14004  __cil_tmp13 = (bool )0;
14005#line 1249
14006  vmw_bo_pin(__cil_tmp12, __cil_tmp13);
14007#line 1250
14008  __cil_tmp14 = (unsigned long )dev_priv;
14009#line 1250
14010  __cil_tmp15 = __cil_tmp14 + 134764;
14011#line 1250
14012  *((bool *)__cil_tmp15) = (bool )0;
14013  }
14014#line 1251
14015  return;
14016}
14017}
14018#line 1275 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
14019void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv , bool only_on_cid_match ,
14020                                   uint32_t cid ) 
14021{ int ret ;
14022  struct list_head validate_list ;
14023  struct ttm_validate_buffer pinned_val ;
14024  struct ttm_validate_buffer query_val ;
14025  struct vmw_fence_obj *fence ;
14026  long tmp___7 ;
14027  long tmp___8 ;
14028  unsigned long __cil_tmp11 ;
14029  unsigned long __cil_tmp12 ;
14030  struct mutex *__cil_tmp13 ;
14031  void *__cil_tmp14 ;
14032  unsigned long __cil_tmp15 ;
14033  unsigned long __cil_tmp16 ;
14034  unsigned long __cil_tmp17 ;
14035  struct ttm_buffer_object *__cil_tmp18 ;
14036  unsigned long __cil_tmp19 ;
14037  unsigned long __cil_tmp20 ;
14038  unsigned long __cil_tmp21 ;
14039  uint32_t __cil_tmp22 ;
14040  unsigned long __cil_tmp23 ;
14041  unsigned long __cil_tmp24 ;
14042  unsigned long __cil_tmp25 ;
14043  unsigned long __cil_tmp26 ;
14044  struct ttm_buffer_object *__cil_tmp27 ;
14045  struct ttm_validate_buffer *__cil_tmp28 ;
14046  struct list_head *__cil_tmp29 ;
14047  unsigned long __cil_tmp30 ;
14048  unsigned long __cil_tmp31 ;
14049  unsigned long __cil_tmp32 ;
14050  unsigned long __cil_tmp33 ;
14051  unsigned long __cil_tmp34 ;
14052  struct ttm_buffer_object *__cil_tmp35 ;
14053  struct ttm_validate_buffer *__cil_tmp36 ;
14054  struct list_head *__cil_tmp37 ;
14055  int __cil_tmp38 ;
14056  int __cil_tmp39 ;
14057  int __cil_tmp40 ;
14058  long __cil_tmp41 ;
14059  unsigned long __cil_tmp42 ;
14060  unsigned long __cil_tmp43 ;
14061  uint32_t __cil_tmp44 ;
14062  int __cil_tmp45 ;
14063  int __cil_tmp46 ;
14064  int __cil_tmp47 ;
14065  long __cil_tmp48 ;
14066  unsigned long __cil_tmp49 ;
14067  unsigned long __cil_tmp50 ;
14068  struct ttm_buffer_object *__cil_tmp51 ;
14069  bool __cil_tmp52 ;
14070  unsigned long __cil_tmp53 ;
14071  unsigned long __cil_tmp54 ;
14072  struct ttm_buffer_object *__cil_tmp55 ;
14073  bool __cil_tmp56 ;
14074  unsigned long __cil_tmp57 ;
14075  unsigned long __cil_tmp58 ;
14076  void *__cil_tmp59 ;
14077  struct drm_file *__cil_tmp60 ;
14078  void *__cil_tmp61 ;
14079  uint32_t *__cil_tmp62 ;
14080  struct vmw_fence_obj **__cil_tmp63 ;
14081  struct vmw_fence_obj *__cil_tmp64 ;
14082  void *__cil_tmp65 ;
14083  unsigned long __cil_tmp66 ;
14084  struct ttm_buffer_object **__cil_tmp67 ;
14085  unsigned long __cil_tmp68 ;
14086  struct ttm_buffer_object **__cil_tmp69 ;
14087  unsigned long __cil_tmp70 ;
14088  unsigned long __cil_tmp71 ;
14089  struct ttm_buffer_object **__cil_tmp72 ;
14090  unsigned long __cil_tmp73 ;
14091  unsigned long __cil_tmp74 ;
14092  struct mutex *__cil_tmp75 ;
14093  unsigned long __cil_tmp76 ;
14094  struct ttm_buffer_object **__cil_tmp77 ;
14095  unsigned long __cil_tmp78 ;
14096  struct ttm_buffer_object **__cil_tmp79 ;
14097  unsigned long __cil_tmp80 ;
14098  unsigned long __cil_tmp81 ;
14099  struct ttm_buffer_object **__cil_tmp82 ;
14100  unsigned long __cil_tmp83 ;
14101  unsigned long __cil_tmp84 ;
14102  struct mutex *__cil_tmp85 ;
14103
14104  {
14105  {
14106#line 1278
14107  ret = 0;
14108#line 1283
14109  __cil_tmp11 = (unsigned long )dev_priv;
14110#line 1283
14111  __cil_tmp12 = __cil_tmp11 + 134304;
14112#line 1283
14113  __cil_tmp13 = (struct mutex *)__cil_tmp12;
14114#line 1283
14115  mutex_lock(__cil_tmp13);
14116  }
14117  {
14118#line 1285
14119  __cil_tmp14 = (void *)0;
14120#line 1285
14121  __cil_tmp15 = (unsigned long )__cil_tmp14;
14122#line 1285
14123  __cil_tmp16 = (unsigned long )dev_priv;
14124#line 1285
14125  __cil_tmp17 = __cil_tmp16 + 134752;
14126#line 1285
14127  __cil_tmp18 = *((struct ttm_buffer_object **)__cil_tmp17);
14128#line 1285
14129  __cil_tmp19 = (unsigned long )__cil_tmp18;
14130#line 1285
14131  if (__cil_tmp19 == __cil_tmp15) {
14132#line 1286
14133    goto out_unlock;
14134  } else {
14135
14136  }
14137  }
14138#line 1288
14139  if (only_on_cid_match) {
14140    {
14141#line 1288
14142    __cil_tmp20 = (unsigned long )dev_priv;
14143#line 1288
14144    __cil_tmp21 = __cil_tmp20 + 134760;
14145#line 1288
14146    __cil_tmp22 = *((uint32_t *)__cil_tmp21);
14147#line 1288
14148    if (cid != __cil_tmp22) {
14149#line 1289
14150      goto out_unlock;
14151    } else {
14152
14153    }
14154    }
14155  } else {
14156
14157  }
14158  {
14159#line 1291
14160  INIT_LIST_HEAD(& validate_list);
14161#line 1293
14162  __cil_tmp23 = (unsigned long )(& pinned_val) + 24;
14163#line 1293
14164  *((void **)__cil_tmp23) = (void *)1UL;
14165#line 1295
14166  __cil_tmp24 = (unsigned long )(& pinned_val) + 16;
14167#line 1295
14168  __cil_tmp25 = (unsigned long )dev_priv;
14169#line 1295
14170  __cil_tmp26 = __cil_tmp25 + 134752;
14171#line 1295
14172  __cil_tmp27 = *((struct ttm_buffer_object **)__cil_tmp26);
14173#line 1295
14174  *((struct ttm_buffer_object **)__cil_tmp24) = ttm_bo_reference(__cil_tmp27);
14175#line 1296
14176  __cil_tmp28 = & pinned_val;
14177#line 1296
14178  __cil_tmp29 = (struct list_head *)__cil_tmp28;
14179#line 1296
14180  list_add_tail(__cil_tmp29, & validate_list);
14181#line 1298
14182  __cil_tmp30 = (unsigned long )(& query_val) + 24;
14183#line 1298
14184  __cil_tmp31 = (unsigned long )(& pinned_val) + 24;
14185#line 1298
14186  *((void **)__cil_tmp30) = *((void **)__cil_tmp31);
14187#line 1299
14188  __cil_tmp32 = (unsigned long )(& query_val) + 16;
14189#line 1299
14190  __cil_tmp33 = (unsigned long )dev_priv;
14191#line 1299
14192  __cil_tmp34 = __cil_tmp33 + 134744;
14193#line 1299
14194  __cil_tmp35 = *((struct ttm_buffer_object **)__cil_tmp34);
14195#line 1299
14196  *((struct ttm_buffer_object **)__cil_tmp32) = ttm_bo_reference(__cil_tmp35);
14197#line 1300
14198  __cil_tmp36 = & query_val;
14199#line 1300
14200  __cil_tmp37 = (struct list_head *)__cil_tmp36;
14201#line 1300
14202  list_add_tail(__cil_tmp37, & validate_list);
14203  }
14204  {
14205#line 1302
14206  while (1) {
14207    while_continue: /* CIL Label */ ;
14208    {
14209#line 1303
14210    ret = ttm_eu_reserve_buffers(& validate_list);
14211    }
14212#line 1302
14213    if (ret == -512) {
14214
14215    } else {
14216#line 1302
14217      goto while_break;
14218    }
14219  }
14220  while_break: /* CIL Label */ ;
14221  }
14222  {
14223#line 1306
14224  __cil_tmp38 = ret != 0;
14225#line 1306
14226  __cil_tmp39 = ! __cil_tmp38;
14227#line 1306
14228  __cil_tmp40 = ! __cil_tmp39;
14229#line 1306
14230  __cil_tmp41 = (long )__cil_tmp40;
14231#line 1306
14232  tmp___7 = __builtin_expect(__cil_tmp41, 0L);
14233  }
14234#line 1306
14235  if (tmp___7) {
14236    {
14237#line 1307
14238    vmw_execbuf_unpin_panic(dev_priv);
14239    }
14240#line 1308
14241    goto out_no_reserve;
14242  } else {
14243
14244  }
14245  {
14246#line 1311
14247  __cil_tmp42 = (unsigned long )dev_priv;
14248#line 1311
14249  __cil_tmp43 = __cil_tmp42 + 134760;
14250#line 1311
14251  __cil_tmp44 = *((uint32_t *)__cil_tmp43);
14252#line 1311
14253  ret = vmw_fifo_emit_dummy_query(dev_priv, __cil_tmp44);
14254#line 1312
14255  __cil_tmp45 = ret != 0;
14256#line 1312
14257  __cil_tmp46 = ! __cil_tmp45;
14258#line 1312
14259  __cil_tmp47 = ! __cil_tmp46;
14260#line 1312
14261  __cil_tmp48 = (long )__cil_tmp47;
14262#line 1312
14263  tmp___8 = __builtin_expect(__cil_tmp48, 0L);
14264  }
14265#line 1312
14266  if (tmp___8) {
14267    {
14268#line 1313
14269    vmw_execbuf_unpin_panic(dev_priv);
14270    }
14271#line 1314
14272    goto out_no_emit;
14273  } else {
14274
14275  }
14276  {
14277#line 1317
14278  __cil_tmp49 = (unsigned long )dev_priv;
14279#line 1317
14280  __cil_tmp50 = __cil_tmp49 + 134752;
14281#line 1317
14282  __cil_tmp51 = *((struct ttm_buffer_object **)__cil_tmp50);
14283#line 1317
14284  __cil_tmp52 = (bool )0;
14285#line 1317
14286  vmw_bo_pin(__cil_tmp51, __cil_tmp52);
14287#line 1318
14288  __cil_tmp53 = (unsigned long )dev_priv;
14289#line 1318
14290  __cil_tmp54 = __cil_tmp53 + 134744;
14291#line 1318
14292  __cil_tmp55 = *((struct ttm_buffer_object **)__cil_tmp54);
14293#line 1318
14294  __cil_tmp56 = (bool )0;
14295#line 1318
14296  vmw_bo_pin(__cil_tmp55, __cil_tmp56);
14297#line 1319
14298  __cil_tmp57 = (unsigned long )dev_priv;
14299#line 1319
14300  __cil_tmp58 = __cil_tmp57 + 134764;
14301#line 1319
14302  *((bool *)__cil_tmp58) = (bool )0;
14303#line 1321
14304  __cil_tmp59 = (void *)0;
14305#line 1321
14306  __cil_tmp60 = (struct drm_file *)__cil_tmp59;
14307#line 1321
14308  __cil_tmp61 = (void *)0;
14309#line 1321
14310  __cil_tmp62 = (uint32_t *)__cil_tmp61;
14311#line 1321
14312  vmw_execbuf_fence_commands(__cil_tmp60, dev_priv, & fence, __cil_tmp62);
14313#line 1322
14314  __cil_tmp63 = & fence;
14315#line 1322
14316  __cil_tmp64 = *__cil_tmp63;
14317#line 1322
14318  __cil_tmp65 = (void *)__cil_tmp64;
14319#line 1322
14320  ttm_eu_fence_buffer_objects(& validate_list, __cil_tmp65);
14321#line 1324
14322  __cil_tmp66 = (unsigned long )(& query_val) + 16;
14323#line 1324
14324  __cil_tmp67 = (struct ttm_buffer_object **)__cil_tmp66;
14325#line 1324
14326  ttm_bo_unref(__cil_tmp67);
14327#line 1325
14328  __cil_tmp68 = (unsigned long )(& pinned_val) + 16;
14329#line 1325
14330  __cil_tmp69 = (struct ttm_buffer_object **)__cil_tmp68;
14331#line 1325
14332  ttm_bo_unref(__cil_tmp69);
14333#line 1326
14334  __cil_tmp70 = (unsigned long )dev_priv;
14335#line 1326
14336  __cil_tmp71 = __cil_tmp70 + 134752;
14337#line 1326
14338  __cil_tmp72 = (struct ttm_buffer_object **)__cil_tmp71;
14339#line 1326
14340  ttm_bo_unref(__cil_tmp72);
14341  }
14342  out_unlock: 
14343  {
14344#line 1329
14345  __cil_tmp73 = (unsigned long )dev_priv;
14346#line 1329
14347  __cil_tmp74 = __cil_tmp73 + 134304;
14348#line 1329
14349  __cil_tmp75 = (struct mutex *)__cil_tmp74;
14350#line 1329
14351  mutex_unlock(__cil_tmp75);
14352  }
14353#line 1330
14354  return;
14355  out_no_emit: 
14356  {
14357#line 1333
14358  ttm_eu_backoff_reservation(& validate_list);
14359  }
14360  out_no_reserve: 
14361  {
14362#line 1335
14363  __cil_tmp76 = (unsigned long )(& query_val) + 16;
14364#line 1335
14365  __cil_tmp77 = (struct ttm_buffer_object **)__cil_tmp76;
14366#line 1335
14367  ttm_bo_unref(__cil_tmp77);
14368#line 1336
14369  __cil_tmp78 = (unsigned long )(& pinned_val) + 16;
14370#line 1336
14371  __cil_tmp79 = (struct ttm_buffer_object **)__cil_tmp78;
14372#line 1336
14373  ttm_bo_unref(__cil_tmp79);
14374#line 1337
14375  __cil_tmp80 = (unsigned long )dev_priv;
14376#line 1337
14377  __cil_tmp81 = __cil_tmp80 + 134752;
14378#line 1337
14379  __cil_tmp82 = (struct ttm_buffer_object **)__cil_tmp81;
14380#line 1337
14381  ttm_bo_unref(__cil_tmp82);
14382#line 1338
14383  __cil_tmp83 = (unsigned long )dev_priv;
14384#line 1338
14385  __cil_tmp84 = __cil_tmp83 + 134304;
14386#line 1338
14387  __cil_tmp85 = (struct mutex *)__cil_tmp84;
14388#line 1338
14389  mutex_unlock(__cil_tmp85);
14390  }
14391#line 1339
14392  return;
14393}
14394}
14395#line 1342 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
14396int vmw_execbuf_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
14397{ struct vmw_private *dev_priv ;
14398  struct vmw_private *tmp___7 ;
14399  struct drm_vmw_execbuf_arg *arg ;
14400  struct vmw_master *vmaster ;
14401  struct vmw_master *tmp___8 ;
14402  int ret ;
14403  long tmp___9 ;
14404  long tmp___10 ;
14405  long tmp___11 ;
14406  unsigned long __cil_tmp13 ;
14407  unsigned long __cil_tmp14 ;
14408  struct drm_master *__cil_tmp15 ;
14409  unsigned long __cil_tmp16 ;
14410  unsigned long __cil_tmp17 ;
14411  uint32_t __cil_tmp18 ;
14412  int __cil_tmp19 ;
14413  int __cil_tmp20 ;
14414  int __cil_tmp21 ;
14415  long __cil_tmp22 ;
14416  struct ttm_lock *__cil_tmp23 ;
14417  bool __cil_tmp24 ;
14418  int __cil_tmp25 ;
14419  int __cil_tmp26 ;
14420  int __cil_tmp27 ;
14421  long __cil_tmp28 ;
14422  uint64_t __cil_tmp29 ;
14423  unsigned long __cil_tmp30 ;
14424  void *__cil_tmp31 ;
14425  void *__cil_tmp32 ;
14426  unsigned long __cil_tmp33 ;
14427  unsigned long __cil_tmp34 ;
14428  uint32_t __cil_tmp35 ;
14429  unsigned long __cil_tmp36 ;
14430  unsigned long __cil_tmp37 ;
14431  uint32_t __cil_tmp38 ;
14432  uint64_t __cil_tmp39 ;
14433  unsigned long __cil_tmp40 ;
14434  unsigned long __cil_tmp41 ;
14435  uint64_t __cil_tmp42 ;
14436  unsigned long __cil_tmp43 ;
14437  void *__cil_tmp44 ;
14438  struct drm_vmw_fence_rep *__cil_tmp45 ;
14439  void *__cil_tmp46 ;
14440  struct vmw_fence_obj **__cil_tmp47 ;
14441  int __cil_tmp48 ;
14442  int __cil_tmp49 ;
14443  int __cil_tmp50 ;
14444  long __cil_tmp51 ;
14445  struct ttm_lock *__cil_tmp52 ;
14446
14447  {
14448  {
14449#line 1345
14450  tmp___7 = vmw_priv(dev);
14451#line 1345
14452  dev_priv = tmp___7;
14453#line 1346
14454  arg = (struct drm_vmw_execbuf_arg *)data;
14455#line 1347
14456  __cil_tmp13 = (unsigned long )file_priv;
14457#line 1347
14458  __cil_tmp14 = __cil_tmp13 + 152;
14459#line 1347
14460  __cil_tmp15 = *((struct drm_master **)__cil_tmp14);
14461#line 1347
14462  tmp___8 = vmw_master(__cil_tmp15);
14463#line 1347
14464  vmaster = tmp___8;
14465#line 1357
14466  __cil_tmp16 = (unsigned long )arg;
14467#line 1357
14468  __cil_tmp17 = __cil_tmp16 + 24;
14469#line 1357
14470  __cil_tmp18 = *((uint32_t *)__cil_tmp17);
14471#line 1357
14472  __cil_tmp19 = __cil_tmp18 != 1U;
14473#line 1357
14474  __cil_tmp20 = ! __cil_tmp19;
14475#line 1357
14476  __cil_tmp21 = ! __cil_tmp20;
14477#line 1357
14478  __cil_tmp22 = (long )__cil_tmp21;
14479#line 1357
14480  tmp___9 = __builtin_expect(__cil_tmp22, 0L);
14481  }
14482#line 1357
14483  if (tmp___9) {
14484    {
14485#line 1358
14486    drm_err("vmw_execbuf_ioctl", "Incorrect execbuf version.\n");
14487#line 1359
14488    drm_err("vmw_execbuf_ioctl", "You\'re running outdated experimental vmwgfx user-space drivers.");
14489    }
14490#line 1361
14491    return (-22);
14492  } else {
14493
14494  }
14495  {
14496#line 1364
14497  __cil_tmp23 = (struct ttm_lock *)vmaster;
14498#line 1364
14499  __cil_tmp24 = (bool )1;
14500#line 1364
14501  ret = ttm_read_lock(__cil_tmp23, __cil_tmp24);
14502#line 1365
14503  __cil_tmp25 = ret != 0;
14504#line 1365
14505  __cil_tmp26 = ! __cil_tmp25;
14506#line 1365
14507  __cil_tmp27 = ! __cil_tmp26;
14508#line 1365
14509  __cil_tmp28 = (long )__cil_tmp27;
14510#line 1365
14511  tmp___10 = __builtin_expect(__cil_tmp28, 0L);
14512  }
14513#line 1365
14514  if (tmp___10) {
14515#line 1366
14516    return (ret);
14517  } else {
14518
14519  }
14520  {
14521#line 1368
14522  __cil_tmp29 = *((uint64_t *)arg);
14523#line 1368
14524  __cil_tmp30 = (unsigned long )__cil_tmp29;
14525#line 1368
14526  __cil_tmp31 = (void *)__cil_tmp30;
14527#line 1368
14528  __cil_tmp32 = (void *)0;
14529#line 1368
14530  __cil_tmp33 = (unsigned long )arg;
14531#line 1368
14532  __cil_tmp34 = __cil_tmp33 + 8;
14533#line 1368
14534  __cil_tmp35 = *((uint32_t *)__cil_tmp34);
14535#line 1368
14536  __cil_tmp36 = (unsigned long )arg;
14537#line 1368
14538  __cil_tmp37 = __cil_tmp36 + 12;
14539#line 1368
14540  __cil_tmp38 = *((uint32_t *)__cil_tmp37);
14541#line 1368
14542  __cil_tmp39 = (uint64_t )__cil_tmp38;
14543#line 1368
14544  __cil_tmp40 = (unsigned long )arg;
14545#line 1368
14546  __cil_tmp41 = __cil_tmp40 + 16;
14547#line 1368
14548  __cil_tmp42 = *((uint64_t *)__cil_tmp41);
14549#line 1368
14550  __cil_tmp43 = (unsigned long )__cil_tmp42;
14551#line 1368
14552  __cil_tmp44 = (void *)__cil_tmp43;
14553#line 1368
14554  __cil_tmp45 = (struct drm_vmw_fence_rep *)__cil_tmp44;
14555#line 1368
14556  __cil_tmp46 = (void *)0;
14557#line 1368
14558  __cil_tmp47 = (struct vmw_fence_obj **)__cil_tmp46;
14559#line 1368
14560  ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp31, __cil_tmp32, __cil_tmp35,
14561                            __cil_tmp39, __cil_tmp45, __cil_tmp47);
14562#line 1374
14563  __cil_tmp48 = ret != 0;
14564#line 1374
14565  __cil_tmp49 = ! __cil_tmp48;
14566#line 1374
14567  __cil_tmp50 = ! __cil_tmp49;
14568#line 1374
14569  __cil_tmp51 = (long )__cil_tmp50;
14570#line 1374
14571  tmp___11 = __builtin_expect(__cil_tmp51, 0L);
14572  }
14573#line 1374
14574  if (tmp___11) {
14575#line 1375
14576    goto out_unlock;
14577  } else {
14578
14579  }
14580  {
14581#line 1377
14582  vmw_kms_cursor_post_execbuf(dev_priv);
14583  }
14584  out_unlock: 
14585  {
14586#line 1380
14587  __cil_tmp52 = (struct ttm_lock *)vmaster;
14588#line 1380
14589  ttm_read_unlock(__cil_tmp52);
14590  }
14591#line 1381
14592  return (ret);
14593}
14594}
14595#line 5 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/engine-blast-assert.h"
14596void ldv_blast_assert(void) 
14597{ 
14598
14599  {
14600  ERROR: 
14601#line 6
14602  goto ERROR;
14603}
14604}
14605#line 6 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/engine-blast.h"
14606extern int __VERIFIER_nondet_int(void) ;
14607#line 19 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14608int ldv_mutex  =    1;
14609#line 22 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14610int __attribute__((__warn_unused_result__))  mutex_lock_interruptible(struct mutex *lock ) 
14611{ int nondetermined ;
14612
14613  {
14614#line 29
14615  if (ldv_mutex == 1) {
14616
14617  } else {
14618    {
14619#line 29
14620    ldv_blast_assert();
14621    }
14622  }
14623  {
14624#line 32
14625  nondetermined = __VERIFIER_nondet_int();
14626  }
14627#line 35
14628  if (nondetermined) {
14629#line 38
14630    ldv_mutex = 2;
14631#line 40
14632    return (0);
14633  } else {
14634#line 45
14635    return (-4);
14636  }
14637}
14638}
14639#line 50 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14640int __attribute__((__warn_unused_result__))  mutex_lock_killable(struct mutex *lock ) 
14641{ int nondetermined ;
14642
14643  {
14644#line 57
14645  if (ldv_mutex == 1) {
14646
14647  } else {
14648    {
14649#line 57
14650    ldv_blast_assert();
14651    }
14652  }
14653  {
14654#line 60
14655  nondetermined = __VERIFIER_nondet_int();
14656  }
14657#line 63
14658  if (nondetermined) {
14659#line 66
14660    ldv_mutex = 2;
14661#line 68
14662    return (0);
14663  } else {
14664#line 73
14665    return (-4);
14666  }
14667}
14668}
14669#line 78 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14670int atomic_dec_and_mutex_lock(atomic_t *cnt , struct mutex *lock ) 
14671{ int atomic_value_after_dec ;
14672
14673  {
14674#line 83
14675  if (ldv_mutex == 1) {
14676
14677  } else {
14678    {
14679#line 83
14680    ldv_blast_assert();
14681    }
14682  }
14683  {
14684#line 86
14685  atomic_value_after_dec = __VERIFIER_nondet_int();
14686  }
14687#line 89
14688  if (atomic_value_after_dec == 0) {
14689#line 92
14690    ldv_mutex = 2;
14691#line 94
14692    return (1);
14693  } else {
14694
14695  }
14696#line 98
14697  return (0);
14698}
14699}
14700#line 103 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14701void mutex_lock(struct mutex *lock ) 
14702{ 
14703
14704  {
14705#line 108
14706  if (ldv_mutex == 1) {
14707
14708  } else {
14709    {
14710#line 108
14711    ldv_blast_assert();
14712    }
14713  }
14714#line 110
14715  ldv_mutex = 2;
14716#line 111
14717  return;
14718}
14719}
14720#line 114 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14721int mutex_trylock(struct mutex *lock ) 
14722{ int nondetermined ;
14723
14724  {
14725#line 121
14726  if (ldv_mutex == 1) {
14727
14728  } else {
14729    {
14730#line 121
14731    ldv_blast_assert();
14732    }
14733  }
14734  {
14735#line 124
14736  nondetermined = __VERIFIER_nondet_int();
14737  }
14738#line 127
14739  if (nondetermined) {
14740#line 130
14741    ldv_mutex = 2;
14742#line 132
14743    return (1);
14744  } else {
14745#line 137
14746    return (0);
14747  }
14748}
14749}
14750#line 142 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14751void mutex_unlock(struct mutex *lock ) 
14752{ 
14753
14754  {
14755#line 147
14756  if (ldv_mutex == 2) {
14757
14758  } else {
14759    {
14760#line 147
14761    ldv_blast_assert();
14762    }
14763  }
14764#line 149
14765  ldv_mutex = 1;
14766#line 150
14767  return;
14768}
14769}
14770#line 153 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/kernel-rules/files/model0032.c"
14771void ldv_check_final_state(void) 
14772{ 
14773
14774  {
14775#line 156
14776  if (ldv_mutex == 1) {
14777
14778  } else {
14779    {
14780#line 156
14781    ldv_blast_assert();
14782    }
14783  }
14784#line 157
14785  return;
14786}
14787}
14788#line 1386 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c.common.c"
14789long s__builtin_expect(long val , long res ) 
14790{ 
14791
14792  {
14793#line 1387
14794  return (val);
14795}
14796}
14797#line 88 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/percpu.h"
14798extern void __bad_percpu_size(void) ;
14799#line 34 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/string_64.h"
14800extern void *__memcpy(void *to , void    *from , size_t len ) ;
14801#line 220 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/thread_info.h"
14802extern unsigned long kernel_stack  __attribute__((__section__(".data..percpu"))) ;
14803#line 222
14804__inline static struct thread_info *current_thread_info(void)  __attribute__((__no_instrument_function__)) ;
14805#line 222 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/thread_info.h"
14806__inline static struct thread_info *current_thread_info(void) 
14807{ struct thread_info *ti ;
14808  unsigned long pfo_ret__ ;
14809  unsigned long __cil_tmp3 ;
14810  unsigned long __cil_tmp4 ;
14811  unsigned long __cil_tmp5 ;
14812  unsigned long __cil_tmp6 ;
14813  void *__cil_tmp7 ;
14814
14815  {
14816#line 225
14817  if ((int )8UL == 1) {
14818#line 225
14819    goto case_1;
14820  } else
14821#line 225
14822  if ((int )8UL == 2) {
14823#line 225
14824    goto case_2;
14825  } else
14826#line 225
14827  if ((int )8UL == 4) {
14828#line 225
14829    goto case_4;
14830  } else
14831#line 225
14832  if ((int )8UL == 8) {
14833#line 225
14834    goto case_8;
14835  } else {
14836    {
14837#line 225
14838    goto switch_default;
14839#line 225
14840    if (0) {
14841      case_1: /* CIL Label */ 
14842#line 225
14843      __asm__  ("mov"
14844                "b "
14845                "%%"
14846                "gs"
14847                ":"
14848                "%P"
14849                "1"
14850                ",%0": "=q" (pfo_ret__): "p" (& kernel_stack));
14851#line 225
14852      goto switch_break;
14853      case_2: /* CIL Label */ 
14854#line 225
14855      __asm__  ("mov"
14856                "w "
14857                "%%"
14858                "gs"
14859                ":"
14860                "%P"
14861                "1"
14862                ",%0": "=r" (pfo_ret__): "p" (& kernel_stack));
14863#line 225
14864      goto switch_break;
14865      case_4: /* CIL Label */ 
14866#line 225
14867      __asm__  ("mov"
14868                "l "
14869                "%%"
14870                "gs"
14871                ":"
14872                "%P"
14873                "1"
14874                ",%0": "=r" (pfo_ret__): "p" (& kernel_stack));
14875#line 225
14876      goto switch_break;
14877      case_8: /* CIL Label */ 
14878#line 225
14879      __asm__  ("mov"
14880                "q "
14881                "%%"
14882                "gs"
14883                ":"
14884                "%P"
14885                "1"
14886                ",%0": "=r" (pfo_ret__): "p" (& kernel_stack));
14887#line 225
14888      goto switch_break;
14889      switch_default: /* CIL Label */ 
14890      {
14891#line 225
14892      __bad_percpu_size();
14893      }
14894    } else {
14895      switch_break: /* CIL Label */ ;
14896    }
14897    }
14898  }
14899#line 225
14900  __cil_tmp3 = 1UL << 12;
14901#line 225
14902  __cil_tmp4 = __cil_tmp3 << 1;
14903#line 225
14904  __cil_tmp5 = pfo_ret__ + 40UL;
14905#line 225
14906  __cil_tmp6 = __cil_tmp5 - __cil_tmp4;
14907#line 225
14908  __cil_tmp7 = (void *)__cil_tmp6;
14909#line 225
14910  ti = (struct thread_info *)__cil_tmp7;
14911#line 227
14912  return (ti);
14913}
14914}
14915#line 310 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
14916__inline static void outl(unsigned int value , int port )  __attribute__((__no_instrument_function__)) ;
14917#line 310 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
14918__inline static void outl(unsigned int value , int port ) 
14919{ 
14920
14921  {
14922#line 310
14923  __asm__  volatile   ("out"
14924                       "l"
14925                       " %"
14926                       ""
14927                       "0, %w1": : "a" (value), "Nd" (port));
14928#line 310
14929  return;
14930}
14931}
14932#line 324 "include/linux/gfp.h"
14933extern struct page *alloc_pages_current(gfp_t gfp_mask , unsigned int order ) ;
14934#line 326
14935__inline static struct page *alloc_pages(gfp_t gfp_mask , unsigned int order )  __attribute__((__no_instrument_function__)) ;
14936#line 326 "include/linux/gfp.h"
14937__inline static struct page *alloc_pages(gfp_t gfp_mask , unsigned int order ) 
14938{ struct page *tmp ;
14939
14940  {
14941  {
14942#line 329
14943  tmp = alloc_pages_current(gfp_mask, order);
14944  }
14945#line 329
14946  return (tmp);
14947}
14948}
14949#line 360
14950extern void __free_pages(struct page *page , unsigned int order ) ;
14951#line 737 "include/linux/mm.h"
14952__inline static void *( __attribute__((__always_inline__)) lowmem_page_address)(struct page    *page )  __attribute__((__no_instrument_function__)) ;
14953#line 737 "include/linux/mm.h"
14954__inline static void *( __attribute__((__always_inline__)) lowmem_page_address)(struct page    *page ) 
14955{ struct page *__cil_tmp2 ;
14956  struct page    *__cil_tmp3 ;
14957  int __cil_tmp4 ;
14958  unsigned long __cil_tmp5 ;
14959  phys_addr_t __cil_tmp6 ;
14960  phys_addr_t __cil_tmp7 ;
14961  unsigned long __cil_tmp8 ;
14962  unsigned long __cil_tmp9 ;
14963
14964  {
14965  {
14966#line 739
14967  __cil_tmp2 = (struct page *)0xffffea0000000000UL;
14968#line 739
14969  __cil_tmp3 = (struct page    *)__cil_tmp2;
14970#line 739
14971  __cil_tmp4 = page - __cil_tmp3;
14972#line 739
14973  __cil_tmp5 = (unsigned long )__cil_tmp4;
14974#line 739
14975  __cil_tmp6 = (phys_addr_t )__cil_tmp5;
14976#line 739
14977  __cil_tmp7 = __cil_tmp6 << 12;
14978#line 739
14979  __cil_tmp8 = (unsigned long )__cil_tmp7;
14980#line 739
14981  __cil_tmp9 = __cil_tmp8 + 0xffff880000000000UL;
14982#line 739
14983  return ((void *)__cil_tmp9);
14984  }
14985}
14986}
14987#line 16 "include/linux/uaccess.h"
14988__inline static void pagefault_disable(void)  __attribute__((__no_instrument_function__)) ;
14989#line 16 "include/linux/uaccess.h"
14990__inline static void pagefault_disable(void) 
14991{ struct thread_info *tmp___7 ;
14992  unsigned long __cil_tmp2 ;
14993  unsigned long __cil_tmp3 ;
14994  unsigned long __cil_tmp4 ;
14995  unsigned long __cil_tmp5 ;
14996  int __cil_tmp6 ;
14997
14998  {
14999  {
15000#line 18
15001  while (1) {
15002    while_continue: /* CIL Label */ ;
15003    {
15004#line 18
15005    tmp___7 = current_thread_info();
15006#line 18
15007    __cil_tmp2 = (unsigned long )tmp___7;
15008#line 18
15009    __cil_tmp3 = __cil_tmp2 + 28;
15010#line 18
15011    __cil_tmp4 = (unsigned long )tmp___7;
15012#line 18
15013    __cil_tmp5 = __cil_tmp4 + 28;
15014#line 18
15015    __cil_tmp6 = *((int *)__cil_tmp5);
15016#line 18
15017    *((int *)__cil_tmp3) = __cil_tmp6 + 1;
15018    }
15019#line 18
15020    goto while_break;
15021  }
15022  while_break: /* CIL Label */ ;
15023  }
15024#line 23
15025  __asm__  volatile   ("": : : "memory");
15026#line 24
15027  return;
15028}
15029}
15030#line 26
15031__inline static void pagefault_enable(void)  __attribute__((__no_instrument_function__)) ;
15032#line 26 "include/linux/uaccess.h"
15033__inline static void pagefault_enable(void) 
15034{ struct thread_info *tmp___7 ;
15035  unsigned long __cil_tmp2 ;
15036  unsigned long __cil_tmp3 ;
15037  unsigned long __cil_tmp4 ;
15038  unsigned long __cil_tmp5 ;
15039  int __cil_tmp6 ;
15040
15041  {
15042#line 32
15043  __asm__  volatile   ("": : : "memory");
15044  {
15045#line 33
15046  while (1) {
15047    while_continue: /* CIL Label */ ;
15048    {
15049#line 33
15050    tmp___7 = current_thread_info();
15051#line 33
15052    __cil_tmp2 = (unsigned long )tmp___7;
15053#line 33
15054    __cil_tmp3 = __cil_tmp2 + 28;
15055#line 33
15056    __cil_tmp4 = (unsigned long )tmp___7;
15057#line 33
15058    __cil_tmp5 = __cil_tmp4 + 28;
15059#line 33
15060    __cil_tmp6 = *((int *)__cil_tmp5);
15061#line 33
15062    *((int *)__cil_tmp3) = __cil_tmp6 - 1;
15063    }
15064#line 33
15065    goto while_break;
15066  }
15067  while_break: /* CIL Label */ ;
15068  }
15069#line 37
15070  __asm__  volatile   ("": : : "memory");
15071  {
15072#line 38
15073  while (1) {
15074    while_continue___0: /* CIL Label */ ;
15075#line 38
15076    goto while_break___0;
15077  }
15078  while_break___0: /* CIL Label */ ;
15079  }
15080#line 39
15081  return;
15082}
15083}
15084#line 59 "include/linux/highmem.h"
15085__inline static void *kmap_atomic(struct page *page )  __attribute__((__no_instrument_function__)) ;
15086#line 59 "include/linux/highmem.h"
15087__inline static void *kmap_atomic(struct page *page ) 
15088{ void *tmp___7 ;
15089  struct page    *__cil_tmp3 ;
15090
15091  {
15092  {
15093#line 61
15094  pagefault_disable();
15095#line 62
15096  __cil_tmp3 = (struct page    *)page;
15097#line 62
15098  tmp___7 = lowmem_page_address(__cil_tmp3);
15099  }
15100#line 62
15101  return (tmp___7);
15102}
15103}
15104#line 66
15105__inline static void __kunmap_atomic(void *addr )  __attribute__((__no_instrument_function__)) ;
15106#line 66 "include/linux/highmem.h"
15107__inline static void __kunmap_atomic(void *addr ) 
15108{ 
15109
15110  {
15111  {
15112#line 68
15113  pagefault_enable();
15114  }
15115#line 69
15116  return;
15117}
15118}
15119#line 351 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
15120__inline static void vmw_write(struct vmw_private *dev_priv , unsigned int offset ,
15121                               uint32_t value )  __attribute__((__no_instrument_function__)) ;
15122#line 351 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
15123__inline static void vmw_write(struct vmw_private *dev_priv , unsigned int offset ,
15124                               uint32_t value ) 
15125{ unsigned long __cil_tmp4 ;
15126  unsigned long __cil_tmp5 ;
15127  unsigned int __cil_tmp6 ;
15128  int __cil_tmp7 ;
15129  unsigned long __cil_tmp8 ;
15130  unsigned long __cil_tmp9 ;
15131  unsigned int __cil_tmp10 ;
15132  unsigned int __cil_tmp11 ;
15133  int __cil_tmp12 ;
15134
15135  {
15136  {
15137#line 354
15138  __cil_tmp4 = (unsigned long )dev_priv;
15139#line 354
15140  __cil_tmp5 = __cil_tmp4 + 2104;
15141#line 354
15142  __cil_tmp6 = *((unsigned int *)__cil_tmp5);
15143#line 354
15144  __cil_tmp7 = (int )__cil_tmp6;
15145#line 354
15146  outl(offset, __cil_tmp7);
15147#line 355
15148  __cil_tmp8 = (unsigned long )dev_priv;
15149#line 355
15150  __cil_tmp9 = __cil_tmp8 + 2104;
15151#line 355
15152  __cil_tmp10 = *((unsigned int *)__cil_tmp9);
15153#line 355
15154  __cil_tmp11 = __cil_tmp10 + 1U;
15155#line 355
15156  __cil_tmp12 = (int )__cil_tmp11;
15157#line 355
15158  outl(value, __cil_tmp12);
15159  }
15160#line 356
15161  return;
15162}
15163}
15164#line 375
15165int vmw_gmr_bind(struct vmw_private *dev_priv , struct page **pages , unsigned long num_pages ,
15166                 int gmr_id ) ;
15167#line 379
15168void vmw_gmr_unbind(struct vmw_private *dev_priv , int gmr_id ) ;
15169#line 34 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
15170static int vmw_gmr2_bind(struct vmw_private *dev_priv , struct page **pages , unsigned long num_pages ,
15171                         int gmr_id ) 
15172{ SVGAFifoCmdDefineGMR2 define_cmd ;
15173  SVGAFifoCmdRemapGMR2 remap_cmd ;
15174  uint32_t define_size ;
15175  uint32_t remap_size ;
15176  uint32_t *cmd ;
15177  uint32_t *cmd_orig ;
15178  uint32_t i ;
15179  void *tmp___7 ;
15180  long tmp___8 ;
15181  uint32_t *tmp___9 ;
15182  size_t __len ;
15183  void *__ret ;
15184  uint32_t *tmp___10 ;
15185  size_t __len___0 ;
15186  void *__ret___0 ;
15187  struct page **tmp___11 ;
15188  struct page **tmp___12 ;
15189  unsigned long __cil_tmp22 ;
15190  unsigned long __cil_tmp23 ;
15191  unsigned long __cil_tmp24 ;
15192  unsigned long __cil_tmp25 ;
15193  uint32_t __cil_tmp26 ;
15194  void *__cil_tmp27 ;
15195  unsigned long __cil_tmp28 ;
15196  unsigned long __cil_tmp29 ;
15197  int __cil_tmp30 ;
15198  int __cil_tmp31 ;
15199  int __cil_tmp32 ;
15200  long __cil_tmp33 ;
15201  SVGAFifoCmdDefineGMR2 *__cil_tmp34 ;
15202  unsigned long __cil_tmp35 ;
15203  SVGAFifoCmdRemapGMR2 *__cil_tmp36 ;
15204  unsigned long __cil_tmp37 ;
15205  unsigned long __cil_tmp38 ;
15206  unsigned long __cil_tmp39 ;
15207  unsigned long __cil_tmp40 ;
15208  void *__cil_tmp41 ;
15209  void    *__cil_tmp42 ;
15210  void *__cil_tmp43 ;
15211  void    *__cil_tmp44 ;
15212  unsigned long __cil_tmp45 ;
15213  void *__cil_tmp46 ;
15214  void    *__cil_tmp47 ;
15215  void *__cil_tmp48 ;
15216  void    *__cil_tmp49 ;
15217  unsigned long __cil_tmp50 ;
15218  unsigned long __cil_tmp51 ;
15219  struct page *__cil_tmp52 ;
15220  struct page *__cil_tmp53 ;
15221  int __cil_tmp54 ;
15222  unsigned long __cil_tmp55 ;
15223  uint64_t *__cil_tmp56 ;
15224  struct page *__cil_tmp57 ;
15225  struct page *__cil_tmp58 ;
15226  int __cil_tmp59 ;
15227  unsigned long __cil_tmp60 ;
15228  unsigned long __cil_tmp61 ;
15229  uint32_t __cil_tmp62 ;
15230
15231  {
15232  {
15233#line 41
15234  __cil_tmp22 = 8UL + 4UL;
15235#line 41
15236  define_size = (uint32_t )__cil_tmp22;
15237#line 42
15238  __cil_tmp23 = 8UL * num_pages;
15239#line 42
15240  __cil_tmp24 = __cil_tmp23 + 16UL;
15241#line 42
15242  __cil_tmp25 = __cil_tmp24 + 4UL;
15243#line 42
15244  remap_size = (uint32_t )__cil_tmp25;
15245#line 47
15246  __cil_tmp26 = define_size + remap_size;
15247#line 47
15248  tmp___7 = vmw_fifo_reserve(dev_priv, __cil_tmp26);
15249#line 47
15250  cmd = (uint32_t *)tmp___7;
15251#line 47
15252  cmd_orig = cmd;
15253#line 48
15254  __cil_tmp27 = (void *)0;
15255#line 48
15256  __cil_tmp28 = (unsigned long )__cil_tmp27;
15257#line 48
15258  __cil_tmp29 = (unsigned long )cmd;
15259#line 48
15260  __cil_tmp30 = __cil_tmp29 == __cil_tmp28;
15261#line 48
15262  __cil_tmp31 = ! __cil_tmp30;
15263#line 48
15264  __cil_tmp32 = ! __cil_tmp31;
15265#line 48
15266  __cil_tmp33 = (long )__cil_tmp32;
15267#line 48
15268  tmp___8 = __builtin_expect(__cil_tmp33, 0L);
15269  }
15270#line 48
15271  if (tmp___8) {
15272#line 49
15273    return (-12);
15274  } else {
15275
15276  }
15277#line 51
15278  __cil_tmp34 = & define_cmd;
15279#line 51
15280  *((uint32 *)__cil_tmp34) = (uint32 )gmr_id;
15281#line 52
15282  __cil_tmp35 = (unsigned long )(& define_cmd) + 4;
15283#line 52
15284  *((uint32 *)__cil_tmp35) = (uint32 )num_pages;
15285#line 54
15286  __cil_tmp36 = & remap_cmd;
15287#line 54
15288  *((uint32 *)__cil_tmp36) = (uint32 )gmr_id;
15289#line 55
15290  if (8UL > 4UL) {
15291#line 55
15292    __cil_tmp37 = (unsigned long )(& remap_cmd) + 4;
15293#line 55
15294    *((SVGARemapGMR2Flags *)__cil_tmp37) = (SVGARemapGMR2Flags )2;
15295  } else {
15296#line 55
15297    __cil_tmp38 = (unsigned long )(& remap_cmd) + 4;
15298#line 55
15299    *((SVGARemapGMR2Flags *)__cil_tmp38) = (SVGARemapGMR2Flags )0;
15300  }
15301#line 57
15302  __cil_tmp39 = (unsigned long )(& remap_cmd) + 8;
15303#line 57
15304  *((uint32 *)__cil_tmp39) = (uint32 )0;
15305#line 58
15306  __cil_tmp40 = (unsigned long )(& remap_cmd) + 12;
15307#line 58
15308  *((uint32 *)__cil_tmp40) = (uint32 )num_pages;
15309#line 60
15310  tmp___9 = cmd;
15311#line 60
15312  cmd = cmd + 1;
15313#line 60
15314  *tmp___9 = (uint32_t )41;
15315#line 61
15316  __len = 8UL;
15317#line 61
15318  if (__len >= 64UL) {
15319    {
15320#line 61
15321    __cil_tmp41 = (void *)cmd;
15322#line 61
15323    __cil_tmp42 = (void    *)(& define_cmd);
15324#line 61
15325    __ret = __memcpy(__cil_tmp41, __cil_tmp42, __len);
15326    }
15327  } else {
15328    {
15329#line 61
15330    __cil_tmp43 = (void *)cmd;
15331#line 61
15332    __cil_tmp44 = (void    *)(& define_cmd);
15333#line 61
15334    __ret = __builtin_memcpy(__cil_tmp43, __cil_tmp44, __len);
15335    }
15336  }
15337#line 62
15338  __cil_tmp45 = 8UL / 4UL;
15339#line 62
15340  cmd = cmd + __cil_tmp45;
15341#line 64
15342  tmp___10 = cmd;
15343#line 64
15344  cmd = cmd + 1;
15345#line 64
15346  *tmp___10 = (uint32_t )42;
15347#line 65
15348  __len___0 = 16UL;
15349#line 65
15350  if (__len___0 >= 64UL) {
15351    {
15352#line 65
15353    __cil_tmp46 = (void *)cmd;
15354#line 65
15355    __cil_tmp47 = (void    *)(& remap_cmd);
15356#line 65
15357    __ret___0 = __memcpy(__cil_tmp46, __cil_tmp47, __len___0);
15358    }
15359  } else {
15360    {
15361#line 65
15362    __cil_tmp48 = (void *)cmd;
15363#line 65
15364    __cil_tmp49 = (void    *)(& remap_cmd);
15365#line 65
15366    __ret___0 = __builtin_memcpy(__cil_tmp48, __cil_tmp49, __len___0);
15367    }
15368  }
15369#line 66
15370  __cil_tmp50 = 16UL / 4UL;
15371#line 66
15372  cmd = cmd + __cil_tmp50;
15373#line 68
15374  i = (uint32_t )0;
15375  {
15376#line 68
15377  while (1) {
15378    while_continue: /* CIL Label */ ;
15379    {
15380#line 68
15381    __cil_tmp51 = (unsigned long )i;
15382#line 68
15383    if (__cil_tmp51 < num_pages) {
15384
15385    } else {
15386#line 68
15387      goto while_break;
15388    }
15389    }
15390#line 69
15391    if (8UL > 4UL) {
15392#line 70
15393      tmp___11 = pages;
15394#line 70
15395      pages = pages + 1;
15396#line 70
15397      __cil_tmp52 = (struct page *)0xffffea0000000000UL;
15398#line 70
15399      __cil_tmp53 = *tmp___11;
15400#line 70
15401      __cil_tmp54 = __cil_tmp53 - __cil_tmp52;
15402#line 70
15403      __cil_tmp55 = (unsigned long )__cil_tmp54;
15404#line 70
15405      *cmd = (uint32_t )__cil_tmp55;
15406    } else {
15407#line 72
15408      tmp___12 = pages;
15409#line 72
15410      pages = pages + 1;
15411#line 72
15412      __cil_tmp56 = (uint64_t *)cmd;
15413#line 72
15414      __cil_tmp57 = (struct page *)0xffffea0000000000UL;
15415#line 72
15416      __cil_tmp58 = *tmp___12;
15417#line 72
15418      __cil_tmp59 = __cil_tmp58 - __cil_tmp57;
15419#line 72
15420      __cil_tmp60 = (unsigned long )__cil_tmp59;
15421#line 72
15422      *__cil_tmp56 = (uint64_t )__cil_tmp60;
15423    }
15424#line 74
15425    __cil_tmp61 = 8UL / 4UL;
15426#line 74
15427    cmd = cmd + __cil_tmp61;
15428#line 68
15429    i = i + 1U;
15430  }
15431  while_break: /* CIL Label */ ;
15432  }
15433  {
15434#line 77
15435  __cil_tmp62 = define_size + remap_size;
15436#line 77
15437  vmw_fifo_commit(dev_priv, __cil_tmp62);
15438  }
15439#line 79
15440  return (0);
15441}
15442}
15443#line 82 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
15444static void vmw_gmr2_unbind(struct vmw_private *dev_priv , int gmr_id ) 
15445{ SVGAFifoCmdDefineGMR2 define_cmd ;
15446  uint32_t define_size ;
15447  uint32_t *cmd ;
15448  void *tmp___7 ;
15449  long tmp___8 ;
15450  uint32_t *tmp___9 ;
15451  size_t __len ;
15452  void *__ret ;
15453  unsigned long __cil_tmp11 ;
15454  void *__cil_tmp12 ;
15455  unsigned long __cil_tmp13 ;
15456  unsigned long __cil_tmp14 ;
15457  int __cil_tmp15 ;
15458  int __cil_tmp16 ;
15459  int __cil_tmp17 ;
15460  long __cil_tmp18 ;
15461  SVGAFifoCmdDefineGMR2 *__cil_tmp19 ;
15462  unsigned long __cil_tmp20 ;
15463  void *__cil_tmp21 ;
15464  void    *__cil_tmp22 ;
15465  void *__cil_tmp23 ;
15466  void    *__cil_tmp24 ;
15467
15468  {
15469  {
15470#line 86
15471  __cil_tmp11 = 8UL + 4UL;
15472#line 86
15473  define_size = (uint32_t )__cil_tmp11;
15474#line 89
15475  tmp___7 = vmw_fifo_reserve(dev_priv, define_size);
15476#line 89
15477  cmd = (uint32_t *)tmp___7;
15478#line 90
15479  __cil_tmp12 = (void *)0;
15480#line 90
15481  __cil_tmp13 = (unsigned long )__cil_tmp12;
15482#line 90
15483  __cil_tmp14 = (unsigned long )cmd;
15484#line 90
15485  __cil_tmp15 = __cil_tmp14 == __cil_tmp13;
15486#line 90
15487  __cil_tmp16 = ! __cil_tmp15;
15488#line 90
15489  __cil_tmp17 = ! __cil_tmp16;
15490#line 90
15491  __cil_tmp18 = (long )__cil_tmp17;
15492#line 90
15493  tmp___8 = __builtin_expect(__cil_tmp18, 0L);
15494  }
15495#line 90
15496  if (tmp___8) {
15497    {
15498#line 91
15499    drm_err("vmw_gmr2_unbind", "GMR2 unbind failed.\n");
15500    }
15501#line 92
15502    return;
15503  } else {
15504
15505  }
15506#line 94
15507  __cil_tmp19 = & define_cmd;
15508#line 94
15509  *((uint32 *)__cil_tmp19) = (uint32 )gmr_id;
15510#line 95
15511  __cil_tmp20 = (unsigned long )(& define_cmd) + 4;
15512#line 95
15513  *((uint32 *)__cil_tmp20) = (uint32 )0;
15514#line 97
15515  tmp___9 = cmd;
15516#line 97
15517  cmd = cmd + 1;
15518#line 97
15519  *tmp___9 = (uint32_t )41;
15520#line 98
15521  __len = 8UL;
15522#line 98
15523  if (__len >= 64UL) {
15524    {
15525#line 98
15526    __cil_tmp21 = (void *)cmd;
15527#line 98
15528    __cil_tmp22 = (void    *)(& define_cmd);
15529#line 98
15530    __ret = __memcpy(__cil_tmp21, __cil_tmp22, __len);
15531    }
15532  } else {
15533    {
15534#line 98
15535    __cil_tmp23 = (void *)cmd;
15536#line 98
15537    __cil_tmp24 = (void    *)(& define_cmd);
15538#line 98
15539    __ret = __builtin_memcpy(__cil_tmp23, __cil_tmp24, __len);
15540    }
15541  }
15542  {
15543#line 100
15544  vmw_fifo_commit(dev_priv, define_size);
15545  }
15546#line 101
15547  return;
15548}
15549}
15550#line 108 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
15551static int vmw_gmr_build_descriptors(struct list_head *desc_pages , struct page **pages ,
15552                                     unsigned long num_pages ) 
15553{ struct page *page ;
15554  struct page *next ;
15555  struct svga_guest_mem_descriptor *page_virtual ;
15556  struct svga_guest_mem_descriptor *desc_virtual ;
15557  unsigned int desc_per_page ;
15558  unsigned long prev_pfn ;
15559  unsigned long pfn ;
15560  int ret ;
15561  long tmp___7 ;
15562  long tmp___8 ;
15563  void *tmp___9 ;
15564  uint32_t tmp___10 ;
15565  long tmp___11 ;
15566  long tmp___12 ;
15567  long tmp___13 ;
15568  struct list_head    *__mptr ;
15569  struct list_head    *__mptr___0 ;
15570  struct list_head    *__mptr___1 ;
15571  void *__cil_tmp22 ;
15572  void *__cil_tmp23 ;
15573  unsigned long __cil_tmp24 ;
15574  unsigned long __cil_tmp25 ;
15575  unsigned long __cil_tmp26 ;
15576  int __cil_tmp27 ;
15577  int __cil_tmp28 ;
15578  int __cil_tmp29 ;
15579  long __cil_tmp30 ;
15580  void *__cil_tmp31 ;
15581  unsigned long __cil_tmp32 ;
15582  unsigned long __cil_tmp33 ;
15583  int __cil_tmp34 ;
15584  int __cil_tmp35 ;
15585  int __cil_tmp36 ;
15586  long __cil_tmp37 ;
15587  unsigned long __cil_tmp38 ;
15588  unsigned long __cil_tmp39 ;
15589  struct list_head *__cil_tmp40 ;
15590  void *__cil_tmp41 ;
15591  unsigned long __cil_tmp42 ;
15592  unsigned long __cil_tmp43 ;
15593  int __cil_tmp44 ;
15594  int __cil_tmp45 ;
15595  int __cil_tmp46 ;
15596  long __cil_tmp47 ;
15597  struct page *__cil_tmp48 ;
15598  int __cil_tmp49 ;
15599  unsigned long __cil_tmp50 ;
15600  void *__cil_tmp51 ;
15601  int __cil_tmp52 ;
15602  int __cil_tmp53 ;
15603  int __cil_tmp54 ;
15604  long __cil_tmp55 ;
15605  struct page *__cil_tmp56 ;
15606  struct page *__cil_tmp57 ;
15607  int __cil_tmp58 ;
15608  unsigned long __cil_tmp59 ;
15609  unsigned int __cil_tmp60 ;
15610  int __cil_tmp61 ;
15611  unsigned int __cil_tmp62 ;
15612  unsigned long __cil_tmp63 ;
15613  unsigned long __cil_tmp64 ;
15614  unsigned long __cil_tmp65 ;
15615  unsigned long __cil_tmp66 ;
15616  unsigned long __cil_tmp67 ;
15617  unsigned long __cil_tmp68 ;
15618  unsigned long __cil_tmp69 ;
15619  unsigned long __cil_tmp70 ;
15620  void *__cil_tmp71 ;
15621  unsigned long __cil_tmp72 ;
15622  unsigned long __cil_tmp73 ;
15623  int __cil_tmp74 ;
15624  int __cil_tmp75 ;
15625  int __cil_tmp76 ;
15626  long __cil_tmp77 ;
15627  void *__cil_tmp78 ;
15628  struct list_head *__cil_tmp79 ;
15629  struct page *__cil_tmp80 ;
15630  unsigned long __cil_tmp81 ;
15631  unsigned long __cil_tmp82 ;
15632  struct list_head *__cil_tmp83 ;
15633  unsigned int __cil_tmp84 ;
15634  char *__cil_tmp85 ;
15635  char *__cil_tmp86 ;
15636  unsigned long __cil_tmp87 ;
15637  unsigned long __cil_tmp88 ;
15638  struct list_head *__cil_tmp89 ;
15639  struct page *__cil_tmp90 ;
15640  unsigned long __cil_tmp91 ;
15641  unsigned long __cil_tmp92 ;
15642  struct list_head *__cil_tmp93 ;
15643  unsigned int __cil_tmp94 ;
15644  char *__cil_tmp95 ;
15645  char *__cil_tmp96 ;
15646  unsigned long __cil_tmp97 ;
15647  unsigned long __cil_tmp98 ;
15648  unsigned long __cil_tmp99 ;
15649  struct list_head *__cil_tmp100 ;
15650  unsigned long __cil_tmp101 ;
15651  unsigned long __cil_tmp102 ;
15652  unsigned long __cil_tmp103 ;
15653  struct list_head *__cil_tmp104 ;
15654  unsigned long __cil_tmp105 ;
15655  unsigned long __cil_tmp106 ;
15656  struct list_head *__cil_tmp107 ;
15657  struct page *__cil_tmp108 ;
15658  unsigned long __cil_tmp109 ;
15659  unsigned long __cil_tmp110 ;
15660  struct list_head *__cil_tmp111 ;
15661  unsigned int __cil_tmp112 ;
15662  char *__cil_tmp113 ;
15663  char *__cil_tmp114 ;
15664
15665  {
15666#line 113
15667  __cil_tmp22 = (void *)0;
15668#line 113
15669  page_virtual = (struct svga_guest_mem_descriptor *)__cil_tmp22;
15670#line 114
15671  __cil_tmp23 = (void *)0;
15672#line 114
15673  desc_virtual = (struct svga_guest_mem_descriptor *)__cil_tmp23;
15674#line 120
15675  __cil_tmp24 = 1UL << 12;
15676#line 120
15677  __cil_tmp25 = __cil_tmp24 / 8UL;
15678#line 120
15679  __cil_tmp26 = __cil_tmp25 - 1UL;
15680#line 120
15681  desc_per_page = (unsigned int )__cil_tmp26;
15682  {
15683#line 123
15684  while (1) {
15685    while_continue: /* CIL Label */ ;
15686    {
15687#line 123
15688    __cil_tmp27 = num_pages != 0UL;
15689#line 123
15690    __cil_tmp28 = ! __cil_tmp27;
15691#line 123
15692    __cil_tmp29 = ! __cil_tmp28;
15693#line 123
15694    __cil_tmp30 = (long )__cil_tmp29;
15695#line 123
15696    tmp___12 = __builtin_expect(__cil_tmp30, 1L);
15697    }
15698#line 123
15699    if (tmp___12) {
15700
15701    } else {
15702#line 123
15703      goto while_break;
15704    }
15705    {
15706#line 124
15707    page = alloc_pages(2U, 0U);
15708#line 125
15709    __cil_tmp31 = (void *)0;
15710#line 125
15711    __cil_tmp32 = (unsigned long )__cil_tmp31;
15712#line 125
15713    __cil_tmp33 = (unsigned long )page;
15714#line 125
15715    __cil_tmp34 = __cil_tmp33 == __cil_tmp32;
15716#line 125
15717    __cil_tmp35 = ! __cil_tmp34;
15718#line 125
15719    __cil_tmp36 = ! __cil_tmp35;
15720#line 125
15721    __cil_tmp37 = (long )__cil_tmp36;
15722#line 125
15723    tmp___7 = __builtin_expect(__cil_tmp37, 0L);
15724    }
15725#line 125
15726    if (tmp___7) {
15727#line 126
15728      ret = -12;
15729#line 127
15730      goto out_err;
15731    } else {
15732
15733    }
15734    {
15735#line 130
15736    __cil_tmp38 = (unsigned long )page;
15737#line 130
15738    __cil_tmp39 = __cil_tmp38 + 32;
15739#line 130
15740    __cil_tmp40 = (struct list_head *)__cil_tmp39;
15741#line 130
15742    list_add_tail(__cil_tmp40, desc_pages);
15743#line 137
15744    __cil_tmp41 = (void *)0;
15745#line 137
15746    __cil_tmp42 = (unsigned long )__cil_tmp41;
15747#line 137
15748    __cil_tmp43 = (unsigned long )page_virtual;
15749#line 137
15750    __cil_tmp44 = __cil_tmp43 != __cil_tmp42;
15751#line 137
15752    __cil_tmp45 = ! __cil_tmp44;
15753#line 137
15754    __cil_tmp46 = ! __cil_tmp45;
15755#line 137
15756    __cil_tmp47 = (long )__cil_tmp46;
15757#line 137
15758    tmp___8 = __builtin_expect(__cil_tmp47, 1L);
15759    }
15760#line 137
15761    if (tmp___8) {
15762#line 138
15763      __cil_tmp48 = (struct page *)0xffffea0000000000UL;
15764#line 138
15765      __cil_tmp49 = page - __cil_tmp48;
15766#line 138
15767      __cil_tmp50 = (unsigned long )__cil_tmp49;
15768#line 138
15769      *((__le32 *)desc_virtual) = (__le32 )__cil_tmp50;
15770      {
15771#line 139
15772      while (1) {
15773        while_continue___0: /* CIL Label */ ;
15774        {
15775#line 139
15776        __cil_tmp51 = (void *)page_virtual;
15777#line 139
15778        __kunmap_atomic(__cil_tmp51);
15779        }
15780#line 139
15781        goto while_break___0;
15782      }
15783      while_break___0: /* CIL Label */ ;
15784      }
15785    } else {
15786
15787    }
15788    {
15789#line 142
15790    tmp___9 = kmap_atomic(page);
15791#line 142
15792    page_virtual = (struct svga_guest_mem_descriptor *)tmp___9;
15793#line 143
15794    desc_virtual = page_virtual - 1;
15795#line 144
15796    prev_pfn = ~ 0UL;
15797    }
15798    {
15799#line 146
15800    while (1) {
15801      while_continue___1: /* CIL Label */ ;
15802      {
15803#line 146
15804      __cil_tmp52 = num_pages != 0UL;
15805#line 146
15806      __cil_tmp53 = ! __cil_tmp52;
15807#line 146
15808      __cil_tmp54 = ! __cil_tmp53;
15809#line 146
15810      __cil_tmp55 = (long )__cil_tmp54;
15811#line 146
15812      tmp___11 = __builtin_expect(__cil_tmp55, 1L);
15813      }
15814#line 146
15815      if (tmp___11) {
15816
15817      } else {
15818#line 146
15819        goto while_break___1;
15820      }
15821#line 147
15822      __cil_tmp56 = (struct page *)0xffffea0000000000UL;
15823#line 147
15824      __cil_tmp57 = *pages;
15825#line 147
15826      __cil_tmp58 = __cil_tmp57 - __cil_tmp56;
15827#line 147
15828      pfn = (unsigned long )__cil_tmp58;
15829      {
15830#line 149
15831      __cil_tmp59 = prev_pfn + 1UL;
15832#line 149
15833      if (pfn != __cil_tmp59) {
15834        {
15835#line 151
15836        __cil_tmp60 = desc_per_page - 1U;
15837#line 151
15838        __cil_tmp61 = desc_virtual - page_virtual;
15839#line 151
15840        __cil_tmp62 = (unsigned int )__cil_tmp61;
15841#line 151
15842        if (__cil_tmp62 == __cil_tmp60) {
15843#line 153
15844          goto while_break___1;
15845        } else {
15846
15847        }
15848        }
15849#line 155
15850        desc_virtual = desc_virtual + 1;
15851#line 155
15852        *((__le32 *)desc_virtual) = (__u32 )pfn;
15853#line 156
15854        __cil_tmp63 = (unsigned long )desc_virtual;
15855#line 156
15856        __cil_tmp64 = __cil_tmp63 + 4;
15857#line 156
15858        *((__le32 *)__cil_tmp64) = (__u32 )1;
15859      } else {
15860#line 158
15861        __cil_tmp65 = (unsigned long )desc_virtual;
15862#line 158
15863        __cil_tmp66 = __cil_tmp65 + 4;
15864#line 158
15865        tmp___10 = *((__le32 *)__cil_tmp66);
15866#line 160
15867        __cil_tmp67 = (unsigned long )desc_virtual;
15868#line 160
15869        __cil_tmp68 = __cil_tmp67 + 4;
15870#line 160
15871        *((__le32 *)__cil_tmp68) = tmp___10 + 1U;
15872      }
15873      }
15874#line 162
15875      prev_pfn = pfn;
15876#line 163
15877      num_pages = num_pages - 1UL;
15878#line 164
15879      pages = pages + 1;
15880    }
15881    while_break___1: /* CIL Label */ ;
15882    }
15883#line 167
15884    desc_virtual = desc_virtual + 1;
15885#line 167
15886    *((__le32 *)desc_virtual) = (__u32 )0;
15887#line 168
15888    __cil_tmp69 = (unsigned long )desc_virtual;
15889#line 168
15890    __cil_tmp70 = __cil_tmp69 + 4;
15891#line 168
15892    *((__le32 *)__cil_tmp70) = (__u32 )0;
15893  }
15894  while_break: /* CIL Label */ ;
15895  }
15896  {
15897#line 171
15898  __cil_tmp71 = (void *)0;
15899#line 171
15900  __cil_tmp72 = (unsigned long )__cil_tmp71;
15901#line 171
15902  __cil_tmp73 = (unsigned long )page_virtual;
15903#line 171
15904  __cil_tmp74 = __cil_tmp73 != __cil_tmp72;
15905#line 171
15906  __cil_tmp75 = ! __cil_tmp74;
15907#line 171
15908  __cil_tmp76 = ! __cil_tmp75;
15909#line 171
15910  __cil_tmp77 = (long )__cil_tmp76;
15911#line 171
15912  tmp___13 = __builtin_expect(__cil_tmp77, 1L);
15913  }
15914#line 171
15915  if (tmp___13) {
15916    {
15917#line 172
15918    while (1) {
15919      while_continue___2: /* CIL Label */ ;
15920      {
15921#line 172
15922      __cil_tmp78 = (void *)page_virtual;
15923#line 172
15924      __kunmap_atomic(__cil_tmp78);
15925      }
15926#line 172
15927      goto while_break___2;
15928    }
15929    while_break___2: /* CIL Label */ ;
15930    }
15931  } else {
15932
15933  }
15934#line 174
15935  return (0);
15936  out_err: 
15937#line 176
15938  __cil_tmp79 = *((struct list_head **)desc_pages);
15939#line 176
15940  __mptr = (struct list_head    *)__cil_tmp79;
15941#line 176
15942  __cil_tmp80 = (struct page *)0;
15943#line 176
15944  __cil_tmp81 = (unsigned long )__cil_tmp80;
15945#line 176
15946  __cil_tmp82 = __cil_tmp81 + 32;
15947#line 176
15948  __cil_tmp83 = (struct list_head *)__cil_tmp82;
15949#line 176
15950  __cil_tmp84 = (unsigned int )__cil_tmp83;
15951#line 176
15952  __cil_tmp85 = (char *)__mptr;
15953#line 176
15954  __cil_tmp86 = __cil_tmp85 - __cil_tmp84;
15955#line 176
15956  page = (struct page *)__cil_tmp86;
15957#line 176
15958  __cil_tmp87 = (unsigned long )page;
15959#line 176
15960  __cil_tmp88 = __cil_tmp87 + 32;
15961#line 176
15962  __cil_tmp89 = *((struct list_head **)__cil_tmp88);
15963#line 176
15964  __mptr___0 = (struct list_head    *)__cil_tmp89;
15965#line 176
15966  __cil_tmp90 = (struct page *)0;
15967#line 176
15968  __cil_tmp91 = (unsigned long )__cil_tmp90;
15969#line 176
15970  __cil_tmp92 = __cil_tmp91 + 32;
15971#line 176
15972  __cil_tmp93 = (struct list_head *)__cil_tmp92;
15973#line 176
15974  __cil_tmp94 = (unsigned int )__cil_tmp93;
15975#line 176
15976  __cil_tmp95 = (char *)__mptr___0;
15977#line 176
15978  __cil_tmp96 = __cil_tmp95 - __cil_tmp94;
15979#line 176
15980  next = (struct page *)__cil_tmp96;
15981  {
15982#line 176
15983  while (1) {
15984    while_continue___3: /* CIL Label */ ;
15985    {
15986#line 176
15987    __cil_tmp97 = (unsigned long )desc_pages;
15988#line 176
15989    __cil_tmp98 = (unsigned long )page;
15990#line 176
15991    __cil_tmp99 = __cil_tmp98 + 32;
15992#line 176
15993    __cil_tmp100 = (struct list_head *)__cil_tmp99;
15994#line 176
15995    __cil_tmp101 = (unsigned long )__cil_tmp100;
15996#line 176
15997    if (__cil_tmp101 != __cil_tmp97) {
15998
15999    } else {
16000#line 176
16001      goto while_break___3;
16002    }
16003    }
16004    {
16005#line 177
16006    __cil_tmp102 = (unsigned long )page;
16007#line 177
16008    __cil_tmp103 = __cil_tmp102 + 32;
16009#line 177
16010    __cil_tmp104 = (struct list_head *)__cil_tmp103;
16011#line 177
16012    list_del_init(__cil_tmp104);
16013#line 178
16014    __free_pages(page, 0U);
16015#line 176
16016    page = next;
16017#line 176
16018    __cil_tmp105 = (unsigned long )next;
16019#line 176
16020    __cil_tmp106 = __cil_tmp105 + 32;
16021#line 176
16022    __cil_tmp107 = *((struct list_head **)__cil_tmp106);
16023#line 176
16024    __mptr___1 = (struct list_head    *)__cil_tmp107;
16025#line 176
16026    __cil_tmp108 = (struct page *)0;
16027#line 176
16028    __cil_tmp109 = (unsigned long )__cil_tmp108;
16029#line 176
16030    __cil_tmp110 = __cil_tmp109 + 32;
16031#line 176
16032    __cil_tmp111 = (struct list_head *)__cil_tmp110;
16033#line 176
16034    __cil_tmp112 = (unsigned int )__cil_tmp111;
16035#line 176
16036    __cil_tmp113 = (char *)__mptr___1;
16037#line 176
16038    __cil_tmp114 = __cil_tmp113 - __cil_tmp112;
16039#line 176
16040    next = (struct page *)__cil_tmp114;
16041    }
16042  }
16043  while_break___3: /* CIL Label */ ;
16044  }
16045#line 180
16046  return (ret);
16047}
16048}
16049#line 183
16050__inline static void vmw_gmr_free_descriptors(struct list_head *desc_pages )  __attribute__((__no_instrument_function__)) ;
16051#line 183 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
16052__inline static void vmw_gmr_free_descriptors(struct list_head *desc_pages ) 
16053{ struct page *page ;
16054  struct page *next ;
16055  struct list_head    *__mptr ;
16056  struct list_head    *__mptr___0 ;
16057  struct list_head    *__mptr___1 ;
16058  struct list_head *__cil_tmp7 ;
16059  struct page *__cil_tmp8 ;
16060  unsigned long __cil_tmp9 ;
16061  unsigned long __cil_tmp10 ;
16062  struct list_head *__cil_tmp11 ;
16063  unsigned int __cil_tmp12 ;
16064  char *__cil_tmp13 ;
16065  char *__cil_tmp14 ;
16066  unsigned long __cil_tmp15 ;
16067  unsigned long __cil_tmp16 ;
16068  struct list_head *__cil_tmp17 ;
16069  struct page *__cil_tmp18 ;
16070  unsigned long __cil_tmp19 ;
16071  unsigned long __cil_tmp20 ;
16072  struct list_head *__cil_tmp21 ;
16073  unsigned int __cil_tmp22 ;
16074  char *__cil_tmp23 ;
16075  char *__cil_tmp24 ;
16076  unsigned long __cil_tmp25 ;
16077  unsigned long __cil_tmp26 ;
16078  unsigned long __cil_tmp27 ;
16079  struct list_head *__cil_tmp28 ;
16080  unsigned long __cil_tmp29 ;
16081  unsigned long __cil_tmp30 ;
16082  unsigned long __cil_tmp31 ;
16083  struct list_head *__cil_tmp32 ;
16084  unsigned long __cil_tmp33 ;
16085  unsigned long __cil_tmp34 ;
16086  struct list_head *__cil_tmp35 ;
16087  struct page *__cil_tmp36 ;
16088  unsigned long __cil_tmp37 ;
16089  unsigned long __cil_tmp38 ;
16090  struct list_head *__cil_tmp39 ;
16091  unsigned int __cil_tmp40 ;
16092  char *__cil_tmp41 ;
16093  char *__cil_tmp42 ;
16094
16095  {
16096#line 187
16097  __cil_tmp7 = *((struct list_head **)desc_pages);
16098#line 187
16099  __mptr = (struct list_head    *)__cil_tmp7;
16100#line 187
16101  __cil_tmp8 = (struct page *)0;
16102#line 187
16103  __cil_tmp9 = (unsigned long )__cil_tmp8;
16104#line 187
16105  __cil_tmp10 = __cil_tmp9 + 32;
16106#line 187
16107  __cil_tmp11 = (struct list_head *)__cil_tmp10;
16108#line 187
16109  __cil_tmp12 = (unsigned int )__cil_tmp11;
16110#line 187
16111  __cil_tmp13 = (char *)__mptr;
16112#line 187
16113  __cil_tmp14 = __cil_tmp13 - __cil_tmp12;
16114#line 187
16115  page = (struct page *)__cil_tmp14;
16116#line 187
16117  __cil_tmp15 = (unsigned long )page;
16118#line 187
16119  __cil_tmp16 = __cil_tmp15 + 32;
16120#line 187
16121  __cil_tmp17 = *((struct list_head **)__cil_tmp16);
16122#line 187
16123  __mptr___0 = (struct list_head    *)__cil_tmp17;
16124#line 187
16125  __cil_tmp18 = (struct page *)0;
16126#line 187
16127  __cil_tmp19 = (unsigned long )__cil_tmp18;
16128#line 187
16129  __cil_tmp20 = __cil_tmp19 + 32;
16130#line 187
16131  __cil_tmp21 = (struct list_head *)__cil_tmp20;
16132#line 187
16133  __cil_tmp22 = (unsigned int )__cil_tmp21;
16134#line 187
16135  __cil_tmp23 = (char *)__mptr___0;
16136#line 187
16137  __cil_tmp24 = __cil_tmp23 - __cil_tmp22;
16138#line 187
16139  next = (struct page *)__cil_tmp24;
16140  {
16141#line 187
16142  while (1) {
16143    while_continue: /* CIL Label */ ;
16144    {
16145#line 187
16146    __cil_tmp25 = (unsigned long )desc_pages;
16147#line 187
16148    __cil_tmp26 = (unsigned long )page;
16149#line 187
16150    __cil_tmp27 = __cil_tmp26 + 32;
16151#line 187
16152    __cil_tmp28 = (struct list_head *)__cil_tmp27;
16153#line 187
16154    __cil_tmp29 = (unsigned long )__cil_tmp28;
16155#line 187
16156    if (__cil_tmp29 != __cil_tmp25) {
16157
16158    } else {
16159#line 187
16160      goto while_break;
16161    }
16162    }
16163    {
16164#line 188
16165    __cil_tmp30 = (unsigned long )page;
16166#line 188
16167    __cil_tmp31 = __cil_tmp30 + 32;
16168#line 188
16169    __cil_tmp32 = (struct list_head *)__cil_tmp31;
16170#line 188
16171    list_del_init(__cil_tmp32);
16172#line 189
16173    __free_pages(page, 0U);
16174#line 187
16175    page = next;
16176#line 187
16177    __cil_tmp33 = (unsigned long )next;
16178#line 187
16179    __cil_tmp34 = __cil_tmp33 + 32;
16180#line 187
16181    __cil_tmp35 = *((struct list_head **)__cil_tmp34);
16182#line 187
16183    __mptr___1 = (struct list_head    *)__cil_tmp35;
16184#line 187
16185    __cil_tmp36 = (struct page *)0;
16186#line 187
16187    __cil_tmp37 = (unsigned long )__cil_tmp36;
16188#line 187
16189    __cil_tmp38 = __cil_tmp37 + 32;
16190#line 187
16191    __cil_tmp39 = (struct list_head *)__cil_tmp38;
16192#line 187
16193    __cil_tmp40 = (unsigned int )__cil_tmp39;
16194#line 187
16195    __cil_tmp41 = (char *)__mptr___1;
16196#line 187
16197    __cil_tmp42 = __cil_tmp41 - __cil_tmp40;
16198#line 187
16199    next = (struct page *)__cil_tmp42;
16200    }
16201  }
16202  while_break: /* CIL Label */ ;
16203  }
16204#line 191
16205  return;
16206}
16207}
16208#line 193 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
16209static void vmw_gmr_fire_descriptors(struct vmw_private *dev_priv , int gmr_id , struct list_head *desc_pages ) 
16210{ struct page *page ;
16211  int tmp___7 ;
16212  int tmp___8 ;
16213  long tmp___9 ;
16214  struct list_head    *__mptr ;
16215  struct list_head    *__cil_tmp9 ;
16216  long __cil_tmp10 ;
16217  struct list_head *__cil_tmp11 ;
16218  struct page *__cil_tmp12 ;
16219  unsigned long __cil_tmp13 ;
16220  unsigned long __cil_tmp14 ;
16221  struct list_head *__cil_tmp15 ;
16222  unsigned int __cil_tmp16 ;
16223  char *__cil_tmp17 ;
16224  char *__cil_tmp18 ;
16225  unsigned long __cil_tmp19 ;
16226  unsigned long __cil_tmp20 ;
16227  struct mutex *__cil_tmp21 ;
16228  uint32_t __cil_tmp22 ;
16229  struct page *__cil_tmp23 ;
16230  int __cil_tmp24 ;
16231  unsigned long __cil_tmp25 ;
16232  uint32_t __cil_tmp26 ;
16233  unsigned long __cil_tmp27 ;
16234  unsigned long __cil_tmp28 ;
16235  struct mutex *__cil_tmp29 ;
16236
16237  {
16238  {
16239#line 198
16240  __cil_tmp9 = (struct list_head    *)desc_pages;
16241#line 198
16242  tmp___7 = list_empty(__cil_tmp9);
16243  }
16244#line 198
16245  if (tmp___7) {
16246#line 198
16247    tmp___8 = 1;
16248  } else {
16249#line 198
16250    tmp___8 = 0;
16251  }
16252  {
16253#line 198
16254  __cil_tmp10 = (long )tmp___8;
16255#line 198
16256  tmp___9 = __builtin_expect(__cil_tmp10, 0L);
16257  }
16258#line 198
16259  if (tmp___9) {
16260#line 199
16261    return;
16262  } else {
16263
16264  }
16265  {
16266#line 201
16267  __cil_tmp11 = *((struct list_head **)desc_pages);
16268#line 201
16269  __mptr = (struct list_head    *)__cil_tmp11;
16270#line 201
16271  __cil_tmp12 = (struct page *)0;
16272#line 201
16273  __cil_tmp13 = (unsigned long )__cil_tmp12;
16274#line 201
16275  __cil_tmp14 = __cil_tmp13 + 32;
16276#line 201
16277  __cil_tmp15 = (struct list_head *)__cil_tmp14;
16278#line 201
16279  __cil_tmp16 = (unsigned int )__cil_tmp15;
16280#line 201
16281  __cil_tmp17 = (char *)__mptr;
16282#line 201
16283  __cil_tmp18 = __cil_tmp17 - __cil_tmp16;
16284#line 201
16285  page = (struct page *)__cil_tmp18;
16286#line 203
16287  __cil_tmp19 = (unsigned long )dev_priv;
16288#line 203
16289  __cil_tmp20 = __cil_tmp19 + 2184;
16290#line 203
16291  __cil_tmp21 = (struct mutex *)__cil_tmp20;
16292#line 203
16293  mutex_lock(__cil_tmp21);
16294#line 205
16295  __cil_tmp22 = (uint32_t )gmr_id;
16296#line 205
16297  vmw_write(dev_priv, 41U, __cil_tmp22);
16298#line 206
16299  __asm__  volatile   ("sfence": : : "memory");
16300#line 207
16301  __cil_tmp23 = (struct page *)0xffffea0000000000UL;
16302#line 207
16303  __cil_tmp24 = page - __cil_tmp23;
16304#line 207
16305  __cil_tmp25 = (unsigned long )__cil_tmp24;
16306#line 207
16307  __cil_tmp26 = (uint32_t )__cil_tmp25;
16308#line 207
16309  vmw_write(dev_priv, 42U, __cil_tmp26);
16310#line 208
16311  __asm__  volatile   ("mfence": : : "memory");
16312#line 210
16313  __cil_tmp27 = (unsigned long )dev_priv;
16314#line 210
16315  __cil_tmp28 = __cil_tmp27 + 2184;
16316#line 210
16317  __cil_tmp29 = (struct mutex *)__cil_tmp28;
16318#line 210
16319  mutex_unlock(__cil_tmp29);
16320  }
16321#line 212
16322  return;
16323}
16324}
16325#line 219 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
16326static unsigned long vmw_gmr_count_descriptors(struct page **pages , unsigned long num_pages ) 
16327{ unsigned long prev_pfn ;
16328  unsigned long pfn ;
16329  unsigned long descriptors ;
16330  struct page **tmp___7 ;
16331  unsigned long tmp___8 ;
16332  struct page *__cil_tmp8 ;
16333  struct page *__cil_tmp9 ;
16334  int __cil_tmp10 ;
16335  unsigned long __cil_tmp11 ;
16336
16337  {
16338#line 222
16339  prev_pfn = ~ 0UL;
16340#line 224
16341  descriptors = 0UL;
16342  {
16343#line 226
16344  while (1) {
16345    while_continue: /* CIL Label */ ;
16346#line 226
16347    tmp___8 = num_pages;
16348#line 226
16349    num_pages = num_pages - 1UL;
16350#line 226
16351    if (tmp___8) {
16352
16353    } else {
16354#line 226
16355      goto while_break;
16356    }
16357#line 227
16358    tmp___7 = pages;
16359#line 227
16360    pages = pages + 1;
16361#line 227
16362    __cil_tmp8 = (struct page *)0xffffea0000000000UL;
16363#line 227
16364    __cil_tmp9 = *tmp___7;
16365#line 227
16366    __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
16367#line 227
16368    pfn = (unsigned long )__cil_tmp10;
16369    {
16370#line 228
16371    __cil_tmp11 = prev_pfn + 1UL;
16372#line 228
16373    if (__cil_tmp11 != pfn) {
16374#line 229
16375      descriptors = descriptors + 1UL;
16376    } else {
16377
16378    }
16379    }
16380#line 230
16381    prev_pfn = pfn;
16382  }
16383  while_break: /* CIL Label */ ;
16384  }
16385#line 233
16386  return (descriptors);
16387}
16388}
16389#line 236 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
16390int vmw_gmr_bind(struct vmw_private *dev_priv , struct page **pages , unsigned long num_pages ,
16391                 int gmr_id ) 
16392{ struct list_head desc_pages ;
16393  int ret ;
16394  int tmp___7 ;
16395  long tmp___8 ;
16396  long tmp___9 ;
16397  unsigned long tmp___10 ;
16398  long tmp___11 ;
16399  unsigned long __cil_tmp12 ;
16400  unsigned long __cil_tmp13 ;
16401  uint32_t __cil_tmp14 ;
16402  unsigned int __cil_tmp15 ;
16403  int __cil_tmp16 ;
16404  int __cil_tmp17 ;
16405  long __cil_tmp18 ;
16406  unsigned long __cil_tmp19 ;
16407  unsigned long __cil_tmp20 ;
16408  uint32_t __cil_tmp21 ;
16409  unsigned int __cil_tmp22 ;
16410  int __cil_tmp23 ;
16411  int __cil_tmp24 ;
16412  int __cil_tmp25 ;
16413  long __cil_tmp26 ;
16414  unsigned long __cil_tmp27 ;
16415  unsigned long __cil_tmp28 ;
16416  uint32_t __cil_tmp29 ;
16417  unsigned long __cil_tmp30 ;
16418  int __cil_tmp31 ;
16419  int __cil_tmp32 ;
16420  int __cil_tmp33 ;
16421  long __cil_tmp34 ;
16422
16423  {
16424  {
16425#line 244
16426  __cil_tmp12 = (unsigned long )dev_priv;
16427#line 244
16428  __cil_tmp13 = __cil_tmp12 + 2156;
16429#line 244
16430  __cil_tmp14 = *((uint32_t *)__cil_tmp13);
16431#line 244
16432  __cil_tmp15 = __cil_tmp14 & 4194304U;
16433#line 244
16434  __cil_tmp16 = ! __cil_tmp15;
16435#line 244
16436  __cil_tmp17 = ! __cil_tmp16;
16437#line 244
16438  __cil_tmp18 = (long )__cil_tmp17;
16439#line 244
16440  tmp___8 = __builtin_expect(__cil_tmp18, 1L);
16441  }
16442#line 244
16443  if (tmp___8) {
16444    {
16445#line 245
16446    tmp___7 = vmw_gmr2_bind(dev_priv, pages, num_pages, gmr_id);
16447    }
16448#line 245
16449    return (tmp___7);
16450  } else {
16451
16452  }
16453  {
16454#line 247
16455  __cil_tmp19 = (unsigned long )dev_priv;
16456#line 247
16457  __cil_tmp20 = __cil_tmp19 + 2156;
16458#line 247
16459  __cil_tmp21 = *((uint32_t *)__cil_tmp20);
16460#line 247
16461  __cil_tmp22 = __cil_tmp21 & 1048576U;
16462#line 247
16463  __cil_tmp23 = ! __cil_tmp22;
16464#line 247
16465  __cil_tmp24 = ! __cil_tmp23;
16466#line 247
16467  __cil_tmp25 = ! __cil_tmp24;
16468#line 247
16469  __cil_tmp26 = (long )__cil_tmp25;
16470#line 247
16471  tmp___9 = __builtin_expect(__cil_tmp26, 0L);
16472  }
16473#line 247
16474  if (tmp___9) {
16475#line 248
16476    return (-22);
16477  } else {
16478
16479  }
16480  {
16481#line 250
16482  tmp___10 = vmw_gmr_count_descriptors(pages, num_pages);
16483  }
16484  {
16485#line 250
16486  __cil_tmp27 = (unsigned long )dev_priv;
16487#line 250
16488  __cil_tmp28 = __cil_tmp27 + 2160;
16489#line 250
16490  __cil_tmp29 = *((uint32_t *)__cil_tmp28);
16491#line 250
16492  __cil_tmp30 = (unsigned long )__cil_tmp29;
16493#line 250
16494  if (tmp___10 > __cil_tmp30) {
16495#line 252
16496    return (-22);
16497  } else {
16498
16499  }
16500  }
16501  {
16502#line 254
16503  INIT_LIST_HEAD(& desc_pages);
16504#line 256
16505  ret = vmw_gmr_build_descriptors(& desc_pages, pages, num_pages);
16506#line 257
16507  __cil_tmp31 = ret != 0;
16508#line 257
16509  __cil_tmp32 = ! __cil_tmp31;
16510#line 257
16511  __cil_tmp33 = ! __cil_tmp32;
16512#line 257
16513  __cil_tmp34 = (long )__cil_tmp33;
16514#line 257
16515  tmp___11 = __builtin_expect(__cil_tmp34, 0L);
16516  }
16517#line 257
16518  if (tmp___11) {
16519#line 258
16520    return (ret);
16521  } else {
16522
16523  }
16524  {
16525#line 260
16526  vmw_gmr_fire_descriptors(dev_priv, gmr_id, & desc_pages);
16527#line 261
16528  vmw_gmr_free_descriptors(& desc_pages);
16529  }
16530#line 263
16531  return (0);
16532}
16533}
16534#line 267 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c"
16535void vmw_gmr_unbind(struct vmw_private *dev_priv , int gmr_id ) 
16536{ long tmp___7 ;
16537  unsigned long __cil_tmp4 ;
16538  unsigned long __cil_tmp5 ;
16539  uint32_t __cil_tmp6 ;
16540  unsigned int __cil_tmp7 ;
16541  int __cil_tmp8 ;
16542  int __cil_tmp9 ;
16543  long __cil_tmp10 ;
16544  unsigned long __cil_tmp11 ;
16545  unsigned long __cil_tmp12 ;
16546  struct mutex *__cil_tmp13 ;
16547  uint32_t __cil_tmp14 ;
16548  uint32_t __cil_tmp15 ;
16549  unsigned long __cil_tmp16 ;
16550  unsigned long __cil_tmp17 ;
16551  struct mutex *__cil_tmp18 ;
16552
16553  {
16554  {
16555#line 269
16556  __cil_tmp4 = (unsigned long )dev_priv;
16557#line 269
16558  __cil_tmp5 = __cil_tmp4 + 2156;
16559#line 269
16560  __cil_tmp6 = *((uint32_t *)__cil_tmp5);
16561#line 269
16562  __cil_tmp7 = __cil_tmp6 & 4194304U;
16563#line 269
16564  __cil_tmp8 = ! __cil_tmp7;
16565#line 269
16566  __cil_tmp9 = ! __cil_tmp8;
16567#line 269
16568  __cil_tmp10 = (long )__cil_tmp9;
16569#line 269
16570  tmp___7 = __builtin_expect(__cil_tmp10, 1L);
16571  }
16572#line 269
16573  if (tmp___7) {
16574    {
16575#line 270
16576    vmw_gmr2_unbind(dev_priv, gmr_id);
16577    }
16578#line 271
16579    return;
16580  } else {
16581
16582  }
16583  {
16584#line 274
16585  __cil_tmp11 = (unsigned long )dev_priv;
16586#line 274
16587  __cil_tmp12 = __cil_tmp11 + 2184;
16588#line 274
16589  __cil_tmp13 = (struct mutex *)__cil_tmp12;
16590#line 274
16591  mutex_lock(__cil_tmp13);
16592#line 275
16593  __cil_tmp14 = (uint32_t )gmr_id;
16594#line 275
16595  vmw_write(dev_priv, 41U, __cil_tmp14);
16596#line 276
16597  __asm__  volatile   ("sfence": : : "memory");
16598#line 277
16599  __cil_tmp15 = (uint32_t )0;
16600#line 277
16601  vmw_write(dev_priv, 42U, __cil_tmp15);
16602#line 278
16603  __asm__  volatile   ("mfence": : : "memory");
16604#line 279
16605  __cil_tmp16 = (unsigned long )dev_priv;
16606#line 279
16607  __cil_tmp17 = __cil_tmp16 + 2184;
16608#line 279
16609  __cil_tmp18 = (struct mutex *)__cil_tmp17;
16610#line 279
16611  mutex_unlock(__cil_tmp18);
16612  }
16613#line 280
16614  return;
16615}
16616}
16617#line 60 "include/linux/list.h"
16618__inline static void list_add(struct list_head *new , struct list_head *head )  __attribute__((__no_instrument_function__)) ;
16619#line 60 "include/linux/list.h"
16620__inline static void list_add(struct list_head *new , struct list_head *head ) 
16621{ struct list_head *__cil_tmp3 ;
16622
16623  {
16624  {
16625#line 62
16626  __cil_tmp3 = *((struct list_head **)head);
16627#line 62
16628  __list_add(new, head, __cil_tmp3);
16629  }
16630#line 63
16631  return;
16632}
16633}
16634#line 153
16635__inline static void list_move(struct list_head *list , struct list_head *head )  __attribute__((__no_instrument_function__)) ;
16636#line 153 "include/linux/list.h"
16637__inline static void list_move(struct list_head *list , struct list_head *head ) 
16638{ 
16639
16640  {
16641  {
16642#line 155
16643  __list_del_entry(list);
16644#line 156
16645  list_add(list, head);
16646  }
16647#line 157
16648  return;
16649}
16650}
16651#line 22 "include/linux/err.h"
16652__inline static void * __attribute__((__warn_unused_result__)) ERR_PTR(long error )  __attribute__((__no_instrument_function__)) ;
16653#line 22 "include/linux/err.h"
16654__inline static void * __attribute__((__warn_unused_result__)) ERR_PTR(long error ) 
16655{ 
16656
16657  {
16658#line 24
16659  return ((void *)error);
16660}
16661}
16662#line 31 "include/asm-generic/iomap.h"
16663extern unsigned int ioread32(void * ) ;
16664#line 37
16665extern void iowrite32(u32  , void * ) ;
16666#line 310 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
16667__inline static unsigned int inl(int port )  __attribute__((__no_instrument_function__)) ;
16668#line 310 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
16669__inline static unsigned int inl(int port ) 
16670{ unsigned int value ;
16671
16672  {
16673#line 310
16674  __asm__  volatile   ("in"
16675                       "l"
16676                       " %w1, %"
16677                       ""
16678                       "0": "=a" (value): "Nd" (port));
16679#line 310
16680  return (value);
16681}
16682}
16683#line 161 "include/linux/slab.h"
16684extern void kfree(void    * ) ;
16685#line 221 "include/linux/slub_def.h"
16686extern void *__kmalloc(size_t size , gfp_t flags ) ;
16687#line 268
16688__inline static void *( __attribute__((__always_inline__)) kmalloc)(size_t size ,
16689                                                                    gfp_t flags )  __attribute__((__no_instrument_function__)) ;
16690#line 268 "include/linux/slub_def.h"
16691__inline static void *( __attribute__((__always_inline__)) kmalloc)(size_t size ,
16692                                                                    gfp_t flags ) 
16693{ void *tmp___2 ;
16694
16695  {
16696  {
16697#line 283
16698  tmp___2 = __kmalloc(size, flags);
16699  }
16700#line 283
16701  return (tmp___2);
16702}
16703}
16704#line 243 "include/linux/slab.h"
16705__inline static void *kmalloc_array(size_t n , size_t size , gfp_t flags )  __attribute__((__no_instrument_function__)) ;
16706#line 243 "include/linux/slab.h"
16707__inline static void *kmalloc_array(size_t n , size_t size , gfp_t flags ) 
16708{ void *tmp ;
16709  unsigned long __cil_tmp5 ;
16710  size_t __cil_tmp6 ;
16711
16712  {
16713#line 245
16714  if (size != 0UL) {
16715    {
16716#line 245
16717    __cil_tmp5 = 0xffffffffffffffffUL / size;
16718#line 245
16719    if (n > __cil_tmp5) {
16720#line 246
16721      return ((void *)0);
16722    } else {
16723
16724    }
16725    }
16726  } else {
16727
16728  }
16729  {
16730#line 247
16731  __cil_tmp6 = n * size;
16732#line 247
16733  tmp = __kmalloc(__cil_tmp6, flags);
16734  }
16735#line 247
16736  return (tmp);
16737}
16738}
16739#line 256
16740__inline static void *kcalloc(size_t n , size_t size , gfp_t flags )  __attribute__((__no_instrument_function__)) ;
16741#line 256 "include/linux/slab.h"
16742__inline static void *kcalloc(size_t n , size_t size , gfp_t flags ) 
16743{ void *tmp ;
16744  unsigned int __cil_tmp5 ;
16745
16746  {
16747  {
16748#line 258
16749  __cil_tmp5 = flags | 32768U;
16750#line 258
16751  tmp = kmalloc_array(n, size, __cil_tmp5);
16752  }
16753#line 258
16754  return (tmp);
16755}
16756}
16757#line 349
16758__inline static void *kzalloc(size_t size , gfp_t flags )  __attribute__((__no_instrument_function__)) ;
16759#line 349 "include/linux/slab.h"
16760__inline static void *kzalloc(size_t size , gfp_t flags ) 
16761{ void *tmp ;
16762  unsigned int __cil_tmp4 ;
16763
16764  {
16765  {
16766#line 351
16767  __cil_tmp4 = flags | 32768U;
16768#line 351
16769  tmp = kmalloc(size, __cil_tmp4);
16770  }
16771#line 351
16772  return (tmp);
16773}
16774}
16775#line 127 "include/drm/drmP.h"
16776extern void ( /* format attribute */  drm_ut_debug_printk)(unsigned int request_level ,
16777                                                           char    *prefix ,
16778                                                           char    *function_name ,
16779                                                           char    *format  , ...) ;
16780#line 821 "include/drm/drm_crtc.h"
16781extern void drm_crtc_cleanup(struct drm_crtc *crtc ) ;
16782#line 828
16783extern void drm_connector_cleanup(struct drm_connector *connector ) ;
16784#line 845
16785extern void drm_encoder_cleanup(struct drm_encoder *encoder ) ;
16786#line 858
16787extern void drm_mode_probed_add(struct drm_connector *connector , struct drm_display_mode *mode ) ;
16788#line 861
16789extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev , struct drm_display_mode    *mode ) ;
16790#line 864
16791extern void drm_mode_config_init(struct drm_device *dev ) ;
16792#line 866
16793extern void drm_mode_config_cleanup(struct drm_device *dev ) ;
16794#line 879
16795extern void drm_mode_destroy(struct drm_device *dev , struct drm_display_mode *mode ) ;
16796#line 889
16797extern int drm_mode_vrefresh(struct drm_display_mode    *mode ) ;
16798#line 892
16799extern void drm_mode_connector_list_update(struct drm_connector *connector ) ;
16800#line 904
16801extern int drm_framebuffer_init(struct drm_device *dev , struct drm_framebuffer *fb ,
16802                                struct drm_framebuffer_funcs    *funcs ) ;
16803#line 907
16804extern void drm_framebuffer_cleanup(struct drm_framebuffer *fb ) ;
16805#line 941
16806extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev , uint32_t id ,
16807                                                    uint32_t type ) ;
16808#line 1027
16809extern void drm_fb_get_bpp_depth(uint32_t format , unsigned int *depth , int *bpp ) ;
16810#line 1504 "include/drm/drmP.h"
16811extern struct drm_master *drm_master_get(struct drm_master *master ) ;
16812#line 1505
16813extern void drm_master_put(struct drm_master **master ) ;
16814#line 640 "include/drm/ttm/ttm_bo_api.h"
16815__inline static void *ttm_kmap_obj_virtual(struct ttm_bo_kmap_obj *map , bool *is_iomem )  __attribute__((__no_instrument_function__)) ;
16816#line 640 "include/drm/ttm/ttm_bo_api.h"
16817__inline static void *ttm_kmap_obj_virtual(struct ttm_bo_kmap_obj *map , bool *is_iomem ) 
16818{ unsigned long __cil_tmp3 ;
16819  unsigned long __cil_tmp4 ;
16820  enum __anonenum_bo_kmap_type_427 __cil_tmp5 ;
16821  unsigned int __cil_tmp6 ;
16822  unsigned int __cil_tmp7 ;
16823  int __cil_tmp8 ;
16824  int __cil_tmp9 ;
16825
16826  {
16827#line 643
16828  __cil_tmp3 = (unsigned long )map;
16829#line 643
16830  __cil_tmp4 = __cil_tmp3 + 16;
16831#line 643
16832  __cil_tmp5 = *((enum __anonenum_bo_kmap_type_427 *)__cil_tmp4);
16833#line 643
16834  __cil_tmp6 = (unsigned int )__cil_tmp5;
16835#line 643
16836  __cil_tmp7 = __cil_tmp6 & 128U;
16837#line 643
16838  __cil_tmp8 = ! __cil_tmp7;
16839#line 643
16840  __cil_tmp9 = ! __cil_tmp8;
16841#line 643
16842  *is_iomem = (bool )__cil_tmp9;
16843#line 644
16844  return (*((void **)map));
16845}
16846}
16847#line 664
16848extern int ttm_bo_kmap(struct ttm_buffer_object *bo , unsigned long start_page , unsigned long num_pages ,
16849                       struct ttm_bo_kmap_obj *map ) ;
16850#line 675
16851extern void ttm_bo_kunmap(struct ttm_bo_kmap_obj *map ) ;
16852#line 848 "include/drm/ttm/ttm_bo_driver.h"
16853extern int ttm_bo_reserve(struct ttm_buffer_object *bo , bool interruptible , bool no_wait ,
16854                          bool use_sequence , uint32_t sequence ) ;
16855#line 889
16856extern void ttm_bo_unreserve(struct ttm_buffer_object *bo ) ;
16857#line 169 "include/drm/ttm/ttm_object.h"
16858extern struct ttm_base_object *ttm_base_object_lookup(struct ttm_object_file *tfile ,
16859                                                      uint32_t key ) ;
16860#line 181
16861extern void ttm_base_object_unref(struct ttm_base_object **p_base ) ;
16862#line 114 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
16863int vmw_event_fence_action_queue(struct drm_file *file_priv , struct vmw_fence_obj *fence ,
16864                                 struct drm_pending_event *event , uint32_t *tv_sec ,
16865                                 uint32_t *tv_usec , bool interruptible ) ;
16866#line 358 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
16867__inline static uint32_t vmw_read(struct vmw_private *dev_priv , unsigned int offset )  __attribute__((__no_instrument_function__)) ;
16868#line 358 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
16869__inline static uint32_t vmw_read(struct vmw_private *dev_priv , unsigned int offset ) 
16870{ uint32_t val ;
16871  unsigned long __cil_tmp4 ;
16872  unsigned long __cil_tmp5 ;
16873  unsigned int __cil_tmp6 ;
16874  int __cil_tmp7 ;
16875  unsigned long __cil_tmp8 ;
16876  unsigned long __cil_tmp9 ;
16877  unsigned int __cil_tmp10 ;
16878  unsigned int __cil_tmp11 ;
16879  int __cil_tmp12 ;
16880
16881  {
16882  {
16883#line 363
16884  __cil_tmp4 = (unsigned long )dev_priv;
16885#line 363
16886  __cil_tmp5 = __cil_tmp4 + 2104;
16887#line 363
16888  __cil_tmp6 = *((unsigned int *)__cil_tmp5);
16889#line 363
16890  __cil_tmp7 = (int )__cil_tmp6;
16891#line 363
16892  outl(offset, __cil_tmp7);
16893#line 364
16894  __cil_tmp8 = (unsigned long )dev_priv;
16895#line 364
16896  __cil_tmp9 = __cil_tmp8 + 2104;
16897#line 364
16898  __cil_tmp10 = *((unsigned int *)__cil_tmp9);
16899#line 364
16900  __cil_tmp11 = __cil_tmp10 + 1U;
16901#line 364
16902  __cil_tmp12 = (int )__cil_tmp11;
16903#line 364
16904  val = inl(__cil_tmp12);
16905  }
16906#line 365
16907  return (val);
16908}
16909}
16910#line 387
16911struct vmw_resource *vmw_resource_reference(struct vmw_resource *res ) ;
16912#line 396
16913int vmw_user_lookup_handle(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
16914                           uint32_t handle , struct vmw_surface **out_surf , struct vmw_dma_buffer **out_buf ) ;
16915#line 458
16916int vmw_dmabuf_to_start_of_vram(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
16917                                bool pin , bool interruptible ) ;
16918#line 461
16919int vmw_dmabuf_unpin(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf , bool interruptible ) ;
16920#line 499
16921bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv ) ;
16922#line 611
16923int vmw_kms_init(struct vmw_private *dev_priv ) ;
16924#line 612
16925int vmw_kms_close(struct vmw_private *dev_priv ) ;
16926#line 613
16927int vmw_kms_save_vga(struct vmw_private *vmw_priv___0 ) ;
16928#line 614
16929int vmw_kms_restore_vga(struct vmw_private *vmw_priv___0 ) ;
16930#line 615
16931int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
16932#line 622
16933int vmw_kms_write_svga(struct vmw_private *vmw_priv___0 , unsigned int width , unsigned int height ,
16934                       unsigned int pitch , unsigned int bpp , unsigned int depth ) ;
16935#line 626
16936bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv , uint32_t pitch , uint32_t height ) ;
16937#line 629
16938u32 vmw_get_vblank_counter(struct drm_device *dev , int crtc ) ;
16939#line 630
16940int vmw_enable_vblank(struct drm_device *dev , int crtc ) ;
16941#line 631
16942void vmw_disable_vblank(struct drm_device *dev , int crtc ) ;
16943#line 632
16944int vmw_kms_present(struct vmw_private *dev_priv , struct drm_file *file_priv , struct vmw_framebuffer *vfb ,
16945                    struct vmw_surface *surface , uint32_t sid , int32_t destX , int32_t destY ,
16946                    struct drm_vmw_rect *clips , uint32_t num_clips ) ;
16947#line 639
16948int vmw_kms_readback(struct vmw_private *dev_priv , struct drm_file *file_priv , struct vmw_framebuffer *vfb ,
16949                     struct drm_vmw_fence_rep *user_fence_rep , struct drm_vmw_rect *clips ,
16950                     uint32_t num_clips ) ;
16951#line 645
16952int vmw_kms_update_layout_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
16953#line 657
16954int vmw_overlay_resume_all(struct vmw_private *dev_priv ) ;
16955#line 658
16956int vmw_overlay_pause_all(struct vmw_private *dev_priv ) ;
16957#line 683
16958__inline static struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf )  __attribute__((__no_instrument_function__)) ;
16959#line 683 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
16960__inline static struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf ) 
16961{ struct vmw_resource *__cil_tmp2 ;
16962
16963  {
16964  {
16965#line 685
16966  __cil_tmp2 = (struct vmw_resource *)srf;
16967#line 685
16968  vmw_resource_reference(__cil_tmp2);
16969  }
16970#line 686
16971  return (srf);
16972}
16973}
16974#line 698
16975__inline static struct vmw_dma_buffer *vmw_dmabuf_reference(struct vmw_dma_buffer *buf )  __attribute__((__no_instrument_function__)) ;
16976#line 698 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
16977__inline static struct vmw_dma_buffer *vmw_dmabuf_reference(struct vmw_dma_buffer *buf ) 
16978{ struct ttm_buffer_object *tmp___7 ;
16979  struct ttm_buffer_object *__cil_tmp3 ;
16980  void *__cil_tmp4 ;
16981
16982  {
16983  {
16984#line 700
16985  __cil_tmp3 = (struct ttm_buffer_object *)buf;
16986#line 700
16987  tmp___7 = ttm_bo_reference(__cil_tmp3);
16988  }
16989#line 700
16990  if (tmp___7) {
16991#line 701
16992    return (buf);
16993  } else {
16994
16995  }
16996  {
16997#line 702
16998  __cil_tmp4 = (void *)0;
16999#line 702
17000  return ((struct vmw_dma_buffer *)__cil_tmp4);
17001  }
17002}
17003}
17004#line 63 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h"
17005int vmw_cursor_update_image(struct vmw_private *dev_priv , u32 *image , u32 width ,
17006                            u32 height , u32 hotspotX , u32 hotspotY ) ;
17007#line 66
17008int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv , struct vmw_dma_buffer *dmabuf ,
17009                             u32 width , u32 height , u32 hotspotX , u32 hotspotY ) ;
17010#line 70
17011void vmw_cursor_update_position(struct vmw_private *dev_priv , bool show , int x ,
17012                                int y ) ;
17013#line 123
17014void vmw_display_unit_cleanup(struct vmw_display_unit *du ) ;
17015#line 124
17016int vmw_du_page_flip(struct drm_crtc *crtc , struct drm_framebuffer *fb , struct drm_pending_vblank_event *event ) ;
17017#line 127
17018void vmw_du_crtc_save(struct drm_crtc *crtc ) ;
17019#line 128
17020void vmw_du_crtc_restore(struct drm_crtc *crtc ) ;
17021#line 129
17022void vmw_du_crtc_gamma_set(struct drm_crtc *crtc , u16 *r , u16 *g , u16 *b , uint32_t start ,
17023                           uint32_t size ) ;
17024#line 132
17025int vmw_du_crtc_cursor_set(struct drm_crtc *crtc , struct drm_file *file_priv , uint32_t handle ,
17026                           uint32_t width , uint32_t height ) ;
17027#line 134
17028int vmw_du_crtc_cursor_move(struct drm_crtc *crtc , int x , int y ) ;
17029#line 135
17030void vmw_du_connector_dpms(struct drm_connector *connector , int mode ) ;
17031#line 136
17032void vmw_du_connector_save(struct drm_connector *connector ) ;
17033#line 137
17034void vmw_du_connector_restore(struct drm_connector *connector ) ;
17035#line 138
17036enum drm_connector_status vmw_du_connector_detect(struct drm_connector *connector ,
17037                                                  bool force ) ;
17038#line 140
17039int vmw_du_connector_fill_modes(struct drm_connector *connector , uint32_t max_width ,
17040                                uint32_t max_height ) ;
17041#line 142
17042int vmw_du_connector_set_property(struct drm_connector *connector , struct drm_property *property ,
17043                                  uint64_t val ) ;
17044#line 150
17045int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv ) ;
17046#line 151
17047int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv ) ;
17048#line 156
17049int vmw_kms_init_screen_object_display(struct vmw_private *dev_priv ) ;
17050#line 157
17051int vmw_kms_close_screen_object_display(struct vmw_private *dev_priv ) ;
17052#line 160
17053bool vmw_kms_screen_object_flippable(struct vmw_private *dev_priv , struct drm_crtc *crtc ) ;
17054#line 162
17055void vmw_kms_screen_object_update_implicit_fb(struct vmw_private *dev_priv , struct drm_crtc *crtc ) ;
17056#line 44 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17057void vmw_clip_cliprects(struct drm_clip_rect *rects , int num_rects , int clip_x151 ,
17058                        int clip_x250 , int clip_y149 , int clip_y248 , SVGASignedRect *out_rects ,
17059                        int *out_num ) 
17060{ int i ;
17061  int k ;
17062  int x1 ;
17063  int __max1 ;
17064  int __max2 ;
17065  int tmp___7 ;
17066  int y1 ;
17067  int __max1___0 ;
17068  int __max2___0 ;
17069  int tmp___8 ;
17070  int x2 ;
17071  int __min1 ;
17072  int __min2 ;
17073  int tmp___9 ;
17074  int y2 ;
17075  int __min1___0 ;
17076  int __min2___0 ;
17077  int tmp___10 ;
17078  struct drm_clip_rect *__cil_tmp24 ;
17079  unsigned short __cil_tmp25 ;
17080  struct drm_clip_rect *__cil_tmp26 ;
17081  unsigned long __cil_tmp27 ;
17082  unsigned long __cil_tmp28 ;
17083  unsigned short __cil_tmp29 ;
17084  struct drm_clip_rect *__cil_tmp30 ;
17085  unsigned long __cil_tmp31 ;
17086  unsigned long __cil_tmp32 ;
17087  unsigned short __cil_tmp33 ;
17088  struct drm_clip_rect *__cil_tmp34 ;
17089  unsigned long __cil_tmp35 ;
17090  unsigned long __cil_tmp36 ;
17091  unsigned short __cil_tmp37 ;
17092  SVGASignedRect *__cil_tmp38 ;
17093  SVGASignedRect *__cil_tmp39 ;
17094  unsigned long __cil_tmp40 ;
17095  unsigned long __cil_tmp41 ;
17096  SVGASignedRect *__cil_tmp42 ;
17097  unsigned long __cil_tmp43 ;
17098  unsigned long __cil_tmp44 ;
17099  SVGASignedRect *__cil_tmp45 ;
17100  unsigned long __cil_tmp46 ;
17101  unsigned long __cil_tmp47 ;
17102
17103  {
17104#line 52
17105  i = 0;
17106#line 52
17107  k = 0;
17108  {
17109#line 52
17110  while (1) {
17111    while_continue: /* CIL Label */ ;
17112#line 52
17113    if (i < num_rects) {
17114
17115    } else {
17116#line 52
17117      goto while_break;
17118    }
17119#line 53
17120    __max1 = clip_x151;
17121#line 53
17122    __cil_tmp24 = rects + i;
17123#line 53
17124    __cil_tmp25 = *((unsigned short *)__cil_tmp24);
17125#line 53
17126    __max2 = (int )__cil_tmp25;
17127#line 53
17128    if (__max1 > __max2) {
17129#line 53
17130      tmp___7 = __max1;
17131    } else {
17132#line 53
17133      tmp___7 = __max2;
17134    }
17135#line 53
17136    x1 = tmp___7;
17137#line 54
17138    __max1___0 = clip_y149;
17139#line 54
17140    __cil_tmp26 = rects + i;
17141#line 54
17142    __cil_tmp27 = (unsigned long )__cil_tmp26;
17143#line 54
17144    __cil_tmp28 = __cil_tmp27 + 2;
17145#line 54
17146    __cil_tmp29 = *((unsigned short *)__cil_tmp28);
17147#line 54
17148    __max2___0 = (int )__cil_tmp29;
17149#line 54
17150    if (__max1___0 > __max2___0) {
17151#line 54
17152      tmp___8 = __max1___0;
17153    } else {
17154#line 54
17155      tmp___8 = __max2___0;
17156    }
17157#line 54
17158    y1 = tmp___8;
17159#line 55
17160    __min1 = clip_x250;
17161#line 55
17162    __cil_tmp30 = rects + i;
17163#line 55
17164    __cil_tmp31 = (unsigned long )__cil_tmp30;
17165#line 55
17166    __cil_tmp32 = __cil_tmp31 + 4;
17167#line 55
17168    __cil_tmp33 = *((unsigned short *)__cil_tmp32);
17169#line 55
17170    __min2 = (int )__cil_tmp33;
17171#line 55
17172    if (__min1 < __min2) {
17173#line 55
17174      tmp___9 = __min1;
17175    } else {
17176#line 55
17177      tmp___9 = __min2;
17178    }
17179#line 55
17180    x2 = tmp___9;
17181#line 56
17182    __min1___0 = clip_y248;
17183#line 56
17184    __cil_tmp34 = rects + i;
17185#line 56
17186    __cil_tmp35 = (unsigned long )__cil_tmp34;
17187#line 56
17188    __cil_tmp36 = __cil_tmp35 + 6;
17189#line 56
17190    __cil_tmp37 = *((unsigned short *)__cil_tmp36);
17191#line 56
17192    __min2___0 = (int )__cil_tmp37;
17193#line 56
17194    if (__min1___0 < __min2___0) {
17195#line 56
17196      tmp___10 = __min1___0;
17197    } else {
17198#line 56
17199      tmp___10 = __min2___0;
17200    }
17201#line 56
17202    y2 = tmp___10;
17203#line 58
17204    if (x1 >= x2) {
17205#line 59
17206      goto __Cont;
17207    } else {
17208
17209    }
17210#line 60
17211    if (y1 >= y2) {
17212#line 61
17213      goto __Cont;
17214    } else {
17215
17216    }
17217#line 63
17218    __cil_tmp38 = out_rects + k;
17219#line 63
17220    *((int32 *)__cil_tmp38) = x1;
17221#line 64
17222    __cil_tmp39 = out_rects + k;
17223#line 64
17224    __cil_tmp40 = (unsigned long )__cil_tmp39;
17225#line 64
17226    __cil_tmp41 = __cil_tmp40 + 4;
17227#line 64
17228    *((int32 *)__cil_tmp41) = y1;
17229#line 65
17230    __cil_tmp42 = out_rects + k;
17231#line 65
17232    __cil_tmp43 = (unsigned long )__cil_tmp42;
17233#line 65
17234    __cil_tmp44 = __cil_tmp43 + 8;
17235#line 65
17236    *((int32 *)__cil_tmp44) = x2;
17237#line 66
17238    __cil_tmp45 = out_rects + k;
17239#line 66
17240    __cil_tmp46 = (unsigned long )__cil_tmp45;
17241#line 66
17242    __cil_tmp47 = __cil_tmp46 + 12;
17243#line 66
17244    *((int32 *)__cil_tmp47) = y2;
17245#line 67
17246    k = k + 1;
17247    __Cont: /* CIL Label */ 
17248#line 52
17249    i = i + 1;
17250  }
17251  while_break: /* CIL Label */ ;
17252  }
17253#line 70
17254  *out_num = k;
17255#line 71
17256  return;
17257}
17258}
17259#line 73 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17260void vmw_display_unit_cleanup(struct vmw_display_unit *du ) 
17261{ unsigned long __cil_tmp2 ;
17262  unsigned long __cil_tmp3 ;
17263  unsigned long __cil_tmp4 ;
17264  unsigned long __cil_tmp5 ;
17265  struct vmw_surface **__cil_tmp6 ;
17266  unsigned long __cil_tmp7 ;
17267  unsigned long __cil_tmp8 ;
17268  unsigned long __cil_tmp9 ;
17269  unsigned long __cil_tmp10 ;
17270  struct vmw_dma_buffer **__cil_tmp11 ;
17271  struct drm_crtc *__cil_tmp12 ;
17272  unsigned long __cil_tmp13 ;
17273  unsigned long __cil_tmp14 ;
17274  struct drm_encoder *__cil_tmp15 ;
17275  unsigned long __cil_tmp16 ;
17276  unsigned long __cil_tmp17 ;
17277  struct drm_connector *__cil_tmp18 ;
17278
17279  {
17280  {
17281#line 75
17282  __cil_tmp2 = (unsigned long )du;
17283#line 75
17284  __cil_tmp3 = __cil_tmp2 + 1992;
17285#line 75
17286  if (*((struct vmw_surface **)__cil_tmp3)) {
17287    {
17288#line 76
17289    __cil_tmp4 = (unsigned long )du;
17290#line 76
17291    __cil_tmp5 = __cil_tmp4 + 1992;
17292#line 76
17293    __cil_tmp6 = (struct vmw_surface **)__cil_tmp5;
17294#line 76
17295    vmw_surface_unreference(__cil_tmp6);
17296    }
17297  } else {
17298
17299  }
17300  }
17301  {
17302#line 77
17303  __cil_tmp7 = (unsigned long )du;
17304#line 77
17305  __cil_tmp8 = __cil_tmp7 + 2000;
17306#line 77
17307  if (*((struct vmw_dma_buffer **)__cil_tmp8)) {
17308    {
17309#line 78
17310    __cil_tmp9 = (unsigned long )du;
17311#line 78
17312    __cil_tmp10 = __cil_tmp9 + 2000;
17313#line 78
17314    __cil_tmp11 = (struct vmw_dma_buffer **)__cil_tmp10;
17315#line 78
17316    vmw_dmabuf_unreference(__cil_tmp11);
17317    }
17318  } else {
17319
17320  }
17321  }
17322  {
17323#line 79
17324  __cil_tmp12 = (struct drm_crtc *)du;
17325#line 79
17326  drm_crtc_cleanup(__cil_tmp12);
17327#line 80
17328  __cil_tmp13 = (unsigned long )du;
17329#line 80
17330  __cil_tmp14 = __cil_tmp13 + 544;
17331#line 80
17332  __cil_tmp15 = (struct drm_encoder *)__cil_tmp14;
17333#line 80
17334  drm_encoder_cleanup(__cil_tmp15);
17335#line 81
17336  __cil_tmp16 = (unsigned long )du;
17337#line 81
17338  __cil_tmp17 = __cil_tmp16 + 616;
17339#line 81
17340  __cil_tmp18 = (struct drm_connector *)__cil_tmp17;
17341#line 81
17342  drm_connector_cleanup(__cil_tmp18);
17343  }
17344#line 82
17345  return;
17346}
17347}
17348#line 88 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17349int vmw_cursor_update_image(struct vmw_private *dev_priv , u32 *image , u32 width ,
17350                            u32 height , u32 hotspotX , u32 hotspotY ) 
17351{ struct __anonstruct_cmd_429___0 *cmd ;
17352  u32 image_size ;
17353  u32 cmd_size ;
17354  void *tmp___7 ;
17355  long tmp___8 ;
17356  size_t __len ;
17357  void *__ret ;
17358  u32 __cil_tmp14 ;
17359  unsigned long __cil_tmp15 ;
17360  unsigned long __cil_tmp16 ;
17361  void *__cil_tmp17 ;
17362  unsigned long __cil_tmp18 ;
17363  unsigned long __cil_tmp19 ;
17364  int __cil_tmp20 ;
17365  int __cil_tmp21 ;
17366  int __cil_tmp22 ;
17367  long __cil_tmp23 ;
17368  void *__cil_tmp24 ;
17369  struct __anonstruct_cmd_429___0 *__cil_tmp25 ;
17370  void *__cil_tmp26 ;
17371  void    *__cil_tmp27 ;
17372  unsigned long __cil_tmp28 ;
17373  unsigned long __cil_tmp29 ;
17374  unsigned long __cil_tmp30 ;
17375  unsigned long __cil_tmp31 ;
17376  unsigned long __cil_tmp32 ;
17377  unsigned long __cil_tmp33 ;
17378  unsigned long __cil_tmp34 ;
17379  unsigned long __cil_tmp35 ;
17380  unsigned long __cil_tmp36 ;
17381  unsigned long __cil_tmp37 ;
17382  unsigned long __cil_tmp38 ;
17383  unsigned long __cil_tmp39 ;
17384  unsigned long __cil_tmp40 ;
17385  unsigned long __cil_tmp41 ;
17386
17387  {
17388#line 96
17389  __cil_tmp14 = width * height;
17390#line 96
17391  image_size = __cil_tmp14 * 4U;
17392#line 97
17393  __cil_tmp15 = (unsigned long )image_size;
17394#line 97
17395  __cil_tmp16 = 24UL + __cil_tmp15;
17396#line 97
17397  cmd_size = (u32 )__cil_tmp16;
17398#line 99
17399  if (! image) {
17400#line 100
17401    return (-22);
17402  } else {
17403
17404  }
17405  {
17406#line 102
17407  tmp___7 = vmw_fifo_reserve(dev_priv, cmd_size);
17408#line 102
17409  cmd = (struct __anonstruct_cmd_429___0 *)tmp___7;
17410#line 103
17411  __cil_tmp17 = (void *)0;
17412#line 103
17413  __cil_tmp18 = (unsigned long )__cil_tmp17;
17414#line 103
17415  __cil_tmp19 = (unsigned long )cmd;
17416#line 103
17417  __cil_tmp20 = __cil_tmp19 == __cil_tmp18;
17418#line 103
17419  __cil_tmp21 = ! __cil_tmp20;
17420#line 103
17421  __cil_tmp22 = ! __cil_tmp21;
17422#line 103
17423  __cil_tmp23 = (long )__cil_tmp22;
17424#line 103
17425  tmp___8 = __builtin_expect(__cil_tmp23, 0L);
17426  }
17427#line 103
17428  if (tmp___8) {
17429    {
17430#line 104
17431    drm_err("vmw_cursor_update_image", "Fifo reserve failed.\n");
17432    }
17433#line 105
17434    return (-12);
17435  } else {
17436
17437  }
17438  {
17439#line 108
17440  __cil_tmp24 = (void *)cmd;
17441#line 108
17442  memset(__cil_tmp24, 0, 24UL);
17443#line 110
17444  __len = (size_t )image_size;
17445#line 110
17446  __cil_tmp25 = cmd + 1;
17447#line 110
17448  __cil_tmp26 = (void *)__cil_tmp25;
17449#line 110
17450  __cil_tmp27 = (void    *)image;
17451#line 110
17452  __ret = __builtin_memcpy(__cil_tmp26, __cil_tmp27, __len);
17453#line 112
17454  *((u32 *)cmd) = (__u32 )22;
17455#line 113
17456  __cil_tmp28 = (unsigned long )cmd;
17457#line 113
17458  __cil_tmp29 = __cil_tmp28 + 4;
17459#line 113
17460  *((uint32 *)__cil_tmp29) = (__u32 )0;
17461#line 114
17462  __cil_tmp30 = 4 + 12;
17463#line 114
17464  __cil_tmp31 = (unsigned long )cmd;
17465#line 114
17466  __cil_tmp32 = __cil_tmp31 + __cil_tmp30;
17467#line 114
17468  *((uint32 *)__cil_tmp32) = width;
17469#line 115
17470  __cil_tmp33 = 4 + 16;
17471#line 115
17472  __cil_tmp34 = (unsigned long )cmd;
17473#line 115
17474  __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
17475#line 115
17476  *((uint32 *)__cil_tmp35) = height;
17477#line 116
17478  __cil_tmp36 = 4 + 4;
17479#line 116
17480  __cil_tmp37 = (unsigned long )cmd;
17481#line 116
17482  __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
17483#line 116
17484  *((uint32 *)__cil_tmp38) = hotspotX;
17485#line 117
17486  __cil_tmp39 = 4 + 8;
17487#line 117
17488  __cil_tmp40 = (unsigned long )cmd;
17489#line 117
17490  __cil_tmp41 = __cil_tmp40 + __cil_tmp39;
17491#line 117
17492  *((uint32 *)__cil_tmp41) = hotspotY;
17493#line 119
17494  vmw_fifo_commit(dev_priv, cmd_size);
17495  }
17496#line 121
17497  return (0);
17498}
17499}
17500#line 124 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17501int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv , struct vmw_dma_buffer *dmabuf ,
17502                             u32 width , u32 height , u32 hotspotX , u32 hotspotY ) 
17503{ struct ttm_bo_kmap_obj map ;
17504  unsigned long kmap_offset ;
17505  unsigned long kmap_num ;
17506  void *virtual ;
17507  bool dummy ;
17508  int ret ;
17509  long tmp___7 ;
17510  long tmp___8 ;
17511  unsigned long __cil_tmp15 ;
17512  u32 __cil_tmp16 ;
17513  u32 __cil_tmp17 ;
17514  unsigned long __cil_tmp18 ;
17515  unsigned long __cil_tmp19 ;
17516  unsigned long __cil_tmp20 ;
17517  struct ttm_buffer_object *__cil_tmp21 ;
17518  bool __cil_tmp22 ;
17519  bool __cil_tmp23 ;
17520  bool __cil_tmp24 ;
17521  uint32_t __cil_tmp25 ;
17522  int __cil_tmp26 ;
17523  int __cil_tmp27 ;
17524  int __cil_tmp28 ;
17525  long __cil_tmp29 ;
17526  struct ttm_buffer_object *__cil_tmp30 ;
17527  int __cil_tmp31 ;
17528  int __cil_tmp32 ;
17529  int __cil_tmp33 ;
17530  long __cil_tmp34 ;
17531  u32 *__cil_tmp35 ;
17532  struct ttm_buffer_object *__cil_tmp36 ;
17533
17534  {
17535  {
17536#line 136
17537  kmap_offset = 0UL;
17538#line 137
17539  __cil_tmp15 = 1UL << 12;
17540#line 137
17541  __cil_tmp16 = width * height;
17542#line 137
17543  __cil_tmp17 = __cil_tmp16 * 4U;
17544#line 137
17545  __cil_tmp18 = (unsigned long )__cil_tmp17;
17546#line 137
17547  __cil_tmp19 = __cil_tmp18 + __cil_tmp15;
17548#line 137
17549  __cil_tmp20 = __cil_tmp19 - 1UL;
17550#line 137
17551  kmap_num = __cil_tmp20 >> 12;
17552#line 139
17553  __cil_tmp21 = (struct ttm_buffer_object *)dmabuf;
17554#line 139
17555  __cil_tmp22 = (bool )1;
17556#line 139
17557  __cil_tmp23 = (bool )0;
17558#line 139
17559  __cil_tmp24 = (bool )0;
17560#line 139
17561  __cil_tmp25 = (uint32_t )0;
17562#line 139
17563  ret = ttm_bo_reserve(__cil_tmp21, __cil_tmp22, __cil_tmp23, __cil_tmp24, __cil_tmp25);
17564#line 140
17565  __cil_tmp26 = ret != 0;
17566#line 140
17567  __cil_tmp27 = ! __cil_tmp26;
17568#line 140
17569  __cil_tmp28 = ! __cil_tmp27;
17570#line 140
17571  __cil_tmp29 = (long )__cil_tmp28;
17572#line 140
17573  tmp___7 = __builtin_expect(__cil_tmp29, 0L);
17574  }
17575#line 140
17576  if (tmp___7) {
17577    {
17578#line 141
17579    drm_err("vmw_cursor_update_dmabuf", "reserve failed\n");
17580    }
17581#line 142
17582    return (-22);
17583  } else {
17584
17585  }
17586  {
17587#line 145
17588  __cil_tmp30 = (struct ttm_buffer_object *)dmabuf;
17589#line 145
17590  ret = ttm_bo_kmap(__cil_tmp30, kmap_offset, kmap_num, & map);
17591#line 146
17592  __cil_tmp31 = ret != 0;
17593#line 146
17594  __cil_tmp32 = ! __cil_tmp31;
17595#line 146
17596  __cil_tmp33 = ! __cil_tmp32;
17597#line 146
17598  __cil_tmp34 = (long )__cil_tmp33;
17599#line 146
17600  tmp___8 = __builtin_expect(__cil_tmp34, 0L);
17601  }
17602#line 146
17603  if (tmp___8) {
17604#line 147
17605    goto err_unreserve;
17606  } else {
17607
17608  }
17609  {
17610#line 149
17611  virtual = ttm_kmap_obj_virtual(& map, & dummy);
17612#line 150
17613  __cil_tmp35 = (u32 *)virtual;
17614#line 150
17615  ret = vmw_cursor_update_image(dev_priv, __cil_tmp35, width, height, hotspotX, hotspotY);
17616#line 153
17617  ttm_bo_kunmap(& map);
17618  }
17619  err_unreserve: 
17620  {
17621#line 155
17622  __cil_tmp36 = (struct ttm_buffer_object *)dmabuf;
17623#line 155
17624  ttm_bo_unreserve(__cil_tmp36);
17625  }
17626#line 157
17627  return (ret);
17628}
17629}
17630#line 161 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17631void vmw_cursor_update_position(struct vmw_private *dev_priv , bool show , int x ,
17632                                int y ) 
17633{ __le32 *fifo_mem ;
17634  uint32_t count ;
17635  int tmp___7 ;
17636  unsigned long __cil_tmp8 ;
17637  unsigned long __cil_tmp9 ;
17638  u32 __cil_tmp10 ;
17639  __le32 *__cil_tmp11 ;
17640  void *__cil_tmp12 ;
17641  u32 __cil_tmp13 ;
17642  __le32 *__cil_tmp14 ;
17643  void *__cil_tmp15 ;
17644  u32 __cil_tmp16 ;
17645  __le32 *__cil_tmp17 ;
17646  void *__cil_tmp18 ;
17647  __le32 *__cil_tmp19 ;
17648  void *__cil_tmp20 ;
17649  __le32 *__cil_tmp21 ;
17650  void *__cil_tmp22 ;
17651
17652  {
17653#line 164
17654  __cil_tmp8 = (unsigned long )dev_priv;
17655#line 164
17656  __cil_tmp9 = __cil_tmp8 + 2144;
17657#line 164
17658  fifo_mem = *((__le32 **)__cil_tmp9);
17659#line 167
17660  if (show) {
17661#line 167
17662    tmp___7 = 1;
17663  } else {
17664#line 167
17665    tmp___7 = 0;
17666  }
17667  {
17668#line 167
17669  __cil_tmp10 = (u32 )tmp___7;
17670#line 167
17671  __cil_tmp11 = fifo_mem + 9;
17672#line 167
17673  __cil_tmp12 = (void *)__cil_tmp11;
17674#line 167
17675  iowrite32(__cil_tmp10, __cil_tmp12);
17676#line 168
17677  __cil_tmp13 = (u32 )x;
17678#line 168
17679  __cil_tmp14 = fifo_mem + 10;
17680#line 168
17681  __cil_tmp15 = (void *)__cil_tmp14;
17682#line 168
17683  iowrite32(__cil_tmp13, __cil_tmp15);
17684#line 169
17685  __cil_tmp16 = (u32 )y;
17686#line 169
17687  __cil_tmp17 = fifo_mem + 11;
17688#line 169
17689  __cil_tmp18 = (void *)__cil_tmp17;
17690#line 169
17691  iowrite32(__cil_tmp16, __cil_tmp18);
17692#line 170
17693  __cil_tmp19 = fifo_mem + 12;
17694#line 170
17695  __cil_tmp20 = (void *)__cil_tmp19;
17696#line 170
17697  count = ioread32(__cil_tmp20);
17698#line 171
17699  count = count + 1U;
17700#line 171
17701  __cil_tmp21 = fifo_mem + 12;
17702#line 171
17703  __cil_tmp22 = (void *)__cil_tmp21;
17704#line 171
17705  iowrite32(count, __cil_tmp22);
17706  }
17707#line 172
17708  return;
17709}
17710}
17711#line 174 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
17712int vmw_du_crtc_cursor_set(struct drm_crtc *crtc , struct drm_file *file_priv , uint32_t handle ,
17713                           uint32_t width , uint32_t height ) 
17714{ struct vmw_private *dev_priv ;
17715  struct vmw_private *tmp___7 ;
17716  struct ttm_object_file *tfile ;
17717  struct vmw_fpriv *tmp___8 ;
17718  struct vmw_display_unit *du ;
17719  struct drm_crtc    *__mptr ;
17720  struct vmw_surface *surface ;
17721  struct vmw_dma_buffer *dmabuf ;
17722  int ret ;
17723  struct drm_device *__cil_tmp15 ;
17724  unsigned long __cil_tmp16 ;
17725  unsigned long __cil_tmp17 ;
17726  struct vmw_display_unit *__cil_tmp18 ;
17727  struct drm_crtc *__cil_tmp19 ;
17728  unsigned int __cil_tmp20 ;
17729  char *__cil_tmp21 ;
17730  char *__cil_tmp22 ;
17731  struct vmw_surface **__cil_tmp23 ;
17732  void *__cil_tmp24 ;
17733  struct vmw_dma_buffer **__cil_tmp25 ;
17734  void *__cil_tmp26 ;
17735  struct vmw_surface **__cil_tmp27 ;
17736  unsigned long __cil_tmp28 ;
17737  struct vmw_surface **__cil_tmp29 ;
17738  struct vmw_surface *__cil_tmp30 ;
17739  unsigned long __cil_tmp31 ;
17740  unsigned long __cil_tmp32 ;
17741  uint32_t *__cil_tmp33 ;
17742  unsigned long __cil_tmp34 ;
17743  unsigned long __cil_tmp35 ;
17744  unsigned long __cil_tmp36 ;
17745  unsigned long __cil_tmp37 ;
17746  struct vmw_surface *__cil_tmp38 ;
17747  unsigned long __cil_tmp39 ;
17748  unsigned long __cil_tmp40 ;
17749  void *__cil_tmp41 ;
17750  unsigned long __cil_tmp42 ;
17751  unsigned long __cil_tmp43 ;
17752  struct vmw_surface **__cil_tmp44 ;
17753  unsigned long __cil_tmp45 ;
17754  unsigned long __cil_tmp46 ;
17755  unsigned long __cil_tmp47 ;
17756  unsigned long __cil_tmp48 ;
17757  struct vmw_dma_buffer **__cil_tmp49 ;
17758  struct vmw_surface **__cil_tmp50 ;
17759  unsigned long __cil_tmp51 ;
17760  unsigned long __cil_tmp52 ;
17761  struct vmw_surface **__cil_tmp53 ;
17762  unsigned long __cil_tmp54 ;
17763  unsigned long __cil_tmp55 ;
17764  struct vmw_surface *__cil_tmp56 ;
17765  unsigned long __cil_tmp57 ;
17766  unsigned long __cil_tmp58 ;
17767  unsigned long __cil_tmp59 ;
17768  unsigned long __cil_tmp60 ;
17769  unsigned long __cil_tmp61 ;
17770  unsigned long __cil_tmp62 ;
17771  unsigned long __cil_tmp63 ;
17772  struct vmw_surface *__cil_tmp64 ;
17773  unsigned long __cil_tmp65 ;
17774  unsigned long __cil_tmp66 ;
17775  unsigned long __cil_tmp67 ;
17776  struct vmw_surface **__cil_tmp68 ;
17777  struct vmw_surface *__cil_tmp69 ;
17778  unsigned long __cil_tmp70 ;
17779  unsigned long __cil_tmp71 ;
17780  uint32_t *__cil_tmp72 ;
17781  u32 __cil_tmp73 ;
17782  u32 __cil_tmp74 ;
17783  unsigned long __cil_tmp75 ;
17784  unsigned long __cil_tmp76 ;
17785  int __cil_tmp77 ;
17786  u32 __cil_tmp78 ;
17787  unsigned long __cil_tmp79 ;
17788  unsigned long __cil_tmp80 ;
17789  int __cil_tmp81 ;
17790  u32 __cil_tmp82 ;
17791  struct vmw_dma_buffer **__cil_tmp83 ;
17792  unsigned long __cil_tmp84 ;
17793  unsigned long __cil_tmp85 ;
17794  struct vmw_dma_buffer **__cil_tmp86 ;
17795  struct vmw_dma_buffer **__cil_tmp87 ;
17796  struct vmw_dma_buffer *__cil_tmp88 ;
17797  unsigned long __cil_tmp89 ;
17798  unsigned long __cil_tmp90 ;
17799  int __cil_tmp91 ;
17800  u32 __cil_tmp92 ;
17801  unsigned long __cil_tmp93 ;
17802  unsigned long __cil_tmp94 ;
17803  int __cil_tmp95 ;
17804  u32 __cil_tmp96 ;
17805  bool __cil_tmp97 ;
17806  bool __cil_tmp98 ;
17807  unsigned long __cil_tmp99 ;
17808  unsigned long __cil_tmp100 ;
17809  int __cil_tmp101 ;
17810  unsigned long __cil_tmp102 ;
17811  unsigned long __cil_tmp103 ;
17812  int __cil_tmp104 ;
17813  int __cil_tmp105 ;
17814  unsigned long __cil_tmp106 ;
17815  unsigned long __cil_tmp107 ;
17816  int __cil_tmp108 ;
17817  unsigned long __cil_tmp109 ;
17818  unsigned long __cil_tmp110 ;
17819  int __cil_tmp111 ;
17820  int __cil_tmp112 ;
17821
17822  {
17823  {
17824#line 177
17825  __cil_tmp15 = *((struct drm_device **)crtc);
17826#line 177
17827  tmp___7 = vmw_priv(__cil_tmp15);
17828#line 177
17829  dev_priv = tmp___7;
17830#line 178
17831  tmp___8 = vmw_fpriv(file_priv);
17832#line 178
17833  __cil_tmp16 = (unsigned long )tmp___8;
17834#line 178
17835  __cil_tmp17 = __cil_tmp16 + 8;
17836#line 178
17837  tfile = *((struct ttm_object_file **)__cil_tmp17);
17838#line 179
17839  __mptr = (struct drm_crtc    *)crtc;
17840#line 179
17841  __cil_tmp18 = (struct vmw_display_unit *)0;
17842#line 179
17843  __cil_tmp19 = (struct drm_crtc *)__cil_tmp18;
17844#line 179
17845  __cil_tmp20 = (unsigned int )__cil_tmp19;
17846#line 179
17847  __cil_tmp21 = (char *)__mptr;
17848#line 179
17849  __cil_tmp22 = __cil_tmp21 - __cil_tmp20;
17850#line 179
17851  du = (struct vmw_display_unit *)__cil_tmp22;
17852#line 180
17853  __cil_tmp23 = & surface;
17854#line 180
17855  __cil_tmp24 = (void *)0;
17856#line 180
17857  *__cil_tmp23 = (struct vmw_surface *)__cil_tmp24;
17858#line 181
17859  __cil_tmp25 = & dmabuf;
17860#line 181
17861  __cil_tmp26 = (void *)0;
17862#line 181
17863  *__cil_tmp25 = (struct vmw_dma_buffer *)__cil_tmp26;
17864  }
17865#line 185
17866  if (handle) {
17867#line 185
17868    if (width != 64U) {
17869#line 186
17870      return (-22);
17871    } else
17872#line 185
17873    if (height != 64U) {
17874#line 186
17875      return (-22);
17876    } else {
17877
17878    }
17879  } else {
17880
17881  }
17882#line 188
17883  if (handle) {
17884    {
17885#line 189
17886    ret = vmw_user_lookup_handle(dev_priv, tfile, handle, & surface, & dmabuf);
17887    }
17888#line 191
17889    if (ret) {
17890      {
17891#line 192
17892      drm_err("vmw_du_crtc_cursor_set", "failed to find surface or dmabuf: %i\n",
17893              ret);
17894      }
17895#line 193
17896      return (-22);
17897    } else {
17898
17899    }
17900  } else {
17901
17902  }
17903  {
17904#line 198
17905  __cil_tmp27 = & surface;
17906#line 198
17907  if (*__cil_tmp27) {
17908    {
17909#line 198
17910    __cil_tmp28 = 160 + 16;
17911#line 198
17912    __cil_tmp29 = & surface;
17913#line 198
17914    __cil_tmp30 = *__cil_tmp29;
17915#line 198
17916    __cil_tmp31 = (unsigned long )__cil_tmp30;
17917#line 198
17918    __cil_tmp32 = __cil_tmp31 + __cil_tmp28;
17919#line 198
17920    __cil_tmp33 = *((uint32_t **)__cil_tmp32);
17921#line 198
17922    if (! __cil_tmp33) {
17923      {
17924#line 199
17925      drm_err("vmw_du_crtc_cursor_set", "surface not suitable for cursor\n");
17926#line 200
17927      vmw_surface_unreference(& surface);
17928      }
17929#line 201
17930      return (-22);
17931    } else {
17932
17933    }
17934    }
17935  } else {
17936
17937  }
17938  }
17939  {
17940#line 205
17941  __cil_tmp34 = (unsigned long )du;
17942#line 205
17943  __cil_tmp35 = __cil_tmp34 + 1992;
17944#line 205
17945  if (*((struct vmw_surface **)__cil_tmp35)) {
17946    {
17947#line 206
17948    __cil_tmp36 = (unsigned long )du;
17949#line 206
17950    __cil_tmp37 = __cil_tmp36 + 1992;
17951#line 206
17952    __cil_tmp38 = *((struct vmw_surface **)__cil_tmp37);
17953#line 206
17954    __cil_tmp39 = (unsigned long )__cil_tmp38;
17955#line 206
17956    __cil_tmp40 = __cil_tmp39 + 160;
17957#line 206
17958    __cil_tmp41 = (void *)0;
17959#line 206
17960    *((struct drm_crtc **)__cil_tmp40) = (struct drm_crtc *)__cil_tmp41;
17961#line 207
17962    __cil_tmp42 = (unsigned long )du;
17963#line 207
17964    __cil_tmp43 = __cil_tmp42 + 1992;
17965#line 207
17966    __cil_tmp44 = (struct vmw_surface **)__cil_tmp43;
17967#line 207
17968    vmw_surface_unreference(__cil_tmp44);
17969    }
17970  } else {
17971
17972  }
17973  }
17974  {
17975#line 209
17976  __cil_tmp45 = (unsigned long )du;
17977#line 209
17978  __cil_tmp46 = __cil_tmp45 + 2000;
17979#line 209
17980  if (*((struct vmw_dma_buffer **)__cil_tmp46)) {
17981    {
17982#line 210
17983    __cil_tmp47 = (unsigned long )du;
17984#line 210
17985    __cil_tmp48 = __cil_tmp47 + 2000;
17986#line 210
17987    __cil_tmp49 = (struct vmw_dma_buffer **)__cil_tmp48;
17988#line 210
17989    vmw_dmabuf_unreference(__cil_tmp49);
17990    }
17991  } else {
17992
17993  }
17994  }
17995  {
17996#line 213
17997  __cil_tmp50 = & surface;
17998#line 213
17999  if (*__cil_tmp50) {
18000    {
18001#line 215
18002    __cil_tmp51 = (unsigned long )du;
18003#line 215
18004    __cil_tmp52 = __cil_tmp51 + 1992;
18005#line 215
18006    __cil_tmp53 = & surface;
18007#line 215
18008    *((struct vmw_surface **)__cil_tmp52) = *__cil_tmp53;
18009#line 217
18010    __cil_tmp54 = (unsigned long )du;
18011#line 217
18012    __cil_tmp55 = __cil_tmp54 + 1992;
18013#line 217
18014    __cil_tmp56 = *((struct vmw_surface **)__cil_tmp55);
18015#line 217
18016    __cil_tmp57 = (unsigned long )__cil_tmp56;
18017#line 217
18018    __cil_tmp58 = __cil_tmp57 + 160;
18019#line 217
18020    *((struct drm_crtc **)__cil_tmp58) = crtc;
18021#line 218
18022    __cil_tmp59 = (unsigned long )du;
18023#line 218
18024    __cil_tmp60 = __cil_tmp59 + 2008;
18025#line 218
18026    __cil_tmp61 = 160 + 8;
18027#line 218
18028    __cil_tmp62 = (unsigned long )du;
18029#line 218
18030    __cil_tmp63 = __cil_tmp62 + 1992;
18031#line 218
18032    __cil_tmp64 = *((struct vmw_surface **)__cil_tmp63);
18033#line 218
18034    __cil_tmp65 = (unsigned long )__cil_tmp64;
18035#line 218
18036    __cil_tmp66 = __cil_tmp65 + __cil_tmp61;
18037#line 218
18038    *((size_t *)__cil_tmp60) = *((size_t *)__cil_tmp66);
18039#line 219
18040    __cil_tmp67 = 160 + 16;
18041#line 219
18042    __cil_tmp68 = & surface;
18043#line 219
18044    __cil_tmp69 = *__cil_tmp68;
18045#line 219
18046    __cil_tmp70 = (unsigned long )__cil_tmp69;
18047#line 219
18048    __cil_tmp71 = __cil_tmp70 + __cil_tmp67;
18049#line 219
18050    __cil_tmp72 = *((uint32_t **)__cil_tmp71);
18051#line 219
18052    __cil_tmp73 = (u32 )64;
18053#line 219
18054    __cil_tmp74 = (u32 )64;
18055#line 219
18056    __cil_tmp75 = (unsigned long )du;
18057#line 219
18058    __cil_tmp76 = __cil_tmp75 + 2024;
18059#line 219
18060    __cil_tmp77 = *((int *)__cil_tmp76);
18061#line 219
18062    __cil_tmp78 = (u32 )__cil_tmp77;
18063#line 219
18064    __cil_tmp79 = (unsigned long )du;
18065#line 219
18066    __cil_tmp80 = __cil_tmp79 + 2028;
18067#line 219
18068    __cil_tmp81 = *((int *)__cil_tmp80);
18069#line 219
18070    __cil_tmp82 = (u32 )__cil_tmp81;
18071#line 219
18072    vmw_cursor_update_image(dev_priv, __cil_tmp72, __cil_tmp73, __cil_tmp74, __cil_tmp78,
18073                            __cil_tmp82);
18074    }
18075  } else {
18076    {
18077#line 221
18078    __cil_tmp83 = & dmabuf;
18079#line 221
18080    if (*__cil_tmp83) {
18081      {
18082#line 223
18083      __cil_tmp84 = (unsigned long )du;
18084#line 223
18085      __cil_tmp85 = __cil_tmp84 + 2000;
18086#line 223
18087      __cil_tmp86 = & dmabuf;
18088#line 223
18089      *((struct vmw_dma_buffer **)__cil_tmp85) = *__cil_tmp86;
18090#line 225
18091      __cil_tmp87 = & dmabuf;
18092#line 225
18093      __cil_tmp88 = *__cil_tmp87;
18094#line 225
18095      __cil_tmp89 = (unsigned long )du;
18096#line 225
18097      __cil_tmp90 = __cil_tmp89 + 2024;
18098#line 225
18099      __cil_tmp91 = *((int *)__cil_tmp90);
18100#line 225
18101      __cil_tmp92 = (u32 )__cil_tmp91;
18102#line 225
18103      __cil_tmp93 = (unsigned long )du;
18104#line 225
18105      __cil_tmp94 = __cil_tmp93 + 2028;
18106#line 225
18107      __cil_tmp95 = *((int *)__cil_tmp94);
18108#line 225
18109      __cil_tmp96 = (u32 )__cil_tmp95;
18110#line 225
18111      ret = vmw_cursor_update_dmabuf(dev_priv, __cil_tmp88, width, height, __cil_tmp92,
18112                                     __cil_tmp96);
18113      }
18114    } else {
18115      {
18116#line 228
18117      __cil_tmp97 = (bool )0;
18118#line 228
18119      vmw_cursor_update_position(dev_priv, __cil_tmp97, 0, 0);
18120      }
18121#line 229
18122      return (0);
18123    }
18124    }
18125  }
18126  }
18127  {
18128#line 232
18129  __cil_tmp98 = (bool )1;
18130#line 232
18131  __cil_tmp99 = (unsigned long )du;
18132#line 232
18133  __cil_tmp100 = __cil_tmp99 + 2024;
18134#line 232
18135  __cil_tmp101 = *((int *)__cil_tmp100);
18136#line 232
18137  __cil_tmp102 = (unsigned long )du;
18138#line 232
18139  __cil_tmp103 = __cil_tmp102 + 2016;
18140#line 232
18141  __cil_tmp104 = *((int *)__cil_tmp103);
18142#line 232
18143  __cil_tmp105 = __cil_tmp104 + __cil_tmp101;
18144#line 232
18145  __cil_tmp106 = (unsigned long )du;
18146#line 232
18147  __cil_tmp107 = __cil_tmp106 + 2028;
18148#line 232
18149  __cil_tmp108 = *((int *)__cil_tmp107);
18150#line 232
18151  __cil_tmp109 = (unsigned long )du;
18152#line 232
18153  __cil_tmp110 = __cil_tmp109 + 2020;
18154#line 232
18155  __cil_tmp111 = *((int *)__cil_tmp110);
18156#line 232
18157  __cil_tmp112 = __cil_tmp111 + __cil_tmp108;
18158#line 232
18159  vmw_cursor_update_position(dev_priv, __cil_tmp98, __cil_tmp105, __cil_tmp112);
18160  }
18161#line 236
18162  return (0);
18163}
18164}
18165#line 239 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
18166int vmw_du_crtc_cursor_move(struct drm_crtc *crtc , int x , int y ) 
18167{ struct vmw_private *dev_priv ;
18168  struct vmw_private *tmp___7 ;
18169  struct vmw_display_unit *du ;
18170  struct drm_crtc    *__mptr ;
18171  bool shown ;
18172  int tmp___8 ;
18173  struct drm_device *__cil_tmp10 ;
18174  struct vmw_display_unit *__cil_tmp11 ;
18175  struct drm_crtc *__cil_tmp12 ;
18176  unsigned int __cil_tmp13 ;
18177  char *__cil_tmp14 ;
18178  char *__cil_tmp15 ;
18179  unsigned long __cil_tmp16 ;
18180  unsigned long __cil_tmp17 ;
18181  unsigned long __cil_tmp18 ;
18182  unsigned long __cil_tmp19 ;
18183  unsigned long __cil_tmp20 ;
18184  unsigned long __cil_tmp21 ;
18185  unsigned long __cil_tmp22 ;
18186  unsigned long __cil_tmp23 ;
18187  int __cil_tmp24 ;
18188  unsigned long __cil_tmp25 ;
18189  unsigned long __cil_tmp26 ;
18190  unsigned long __cil_tmp27 ;
18191  unsigned long __cil_tmp28 ;
18192  int __cil_tmp29 ;
18193  unsigned long __cil_tmp30 ;
18194  unsigned long __cil_tmp31 ;
18195  int __cil_tmp32 ;
18196  unsigned long __cil_tmp33 ;
18197  unsigned long __cil_tmp34 ;
18198  int __cil_tmp35 ;
18199  int __cil_tmp36 ;
18200  unsigned long __cil_tmp37 ;
18201  unsigned long __cil_tmp38 ;
18202  int __cil_tmp39 ;
18203  unsigned long __cil_tmp40 ;
18204  unsigned long __cil_tmp41 ;
18205  int __cil_tmp42 ;
18206  int __cil_tmp43 ;
18207
18208  {
18209  {
18210#line 241
18211  __cil_tmp10 = *((struct drm_device **)crtc);
18212#line 241
18213  tmp___7 = vmw_priv(__cil_tmp10);
18214#line 241
18215  dev_priv = tmp___7;
18216#line 242
18217  __mptr = (struct drm_crtc    *)crtc;
18218#line 242
18219  __cil_tmp11 = (struct vmw_display_unit *)0;
18220#line 242
18221  __cil_tmp12 = (struct drm_crtc *)__cil_tmp11;
18222#line 242
18223  __cil_tmp13 = (unsigned int )__cil_tmp12;
18224#line 242
18225  __cil_tmp14 = (char *)__mptr;
18226#line 242
18227  __cil_tmp15 = __cil_tmp14 - __cil_tmp13;
18228#line 242
18229  du = (struct vmw_display_unit *)__cil_tmp15;
18230  }
18231  {
18232#line 243
18233  __cil_tmp16 = (unsigned long )du;
18234#line 243
18235  __cil_tmp17 = __cil_tmp16 + 1992;
18236#line 243
18237  if (*((struct vmw_surface **)__cil_tmp17)) {
18238#line 243
18239    tmp___8 = 1;
18240  } else {
18241    {
18242#line 243
18243    __cil_tmp18 = (unsigned long )du;
18244#line 243
18245    __cil_tmp19 = __cil_tmp18 + 2000;
18246#line 243
18247    if (*((struct vmw_dma_buffer **)__cil_tmp19)) {
18248#line 243
18249      tmp___8 = 1;
18250    } else {
18251#line 243
18252      tmp___8 = 0;
18253    }
18254    }
18255  }
18256  }
18257  {
18258#line 243
18259  shown = (bool )tmp___8;
18260#line 245
18261  __cil_tmp20 = (unsigned long )du;
18262#line 245
18263  __cil_tmp21 = __cil_tmp20 + 2016;
18264#line 245
18265  __cil_tmp22 = (unsigned long )crtc;
18266#line 245
18267  __cil_tmp23 = __cil_tmp22 + 480;
18268#line 245
18269  __cil_tmp24 = *((int *)__cil_tmp23);
18270#line 245
18271  *((int *)__cil_tmp21) = x + __cil_tmp24;
18272#line 246
18273  __cil_tmp25 = (unsigned long )du;
18274#line 246
18275  __cil_tmp26 = __cil_tmp25 + 2020;
18276#line 246
18277  __cil_tmp27 = (unsigned long )crtc;
18278#line 246
18279  __cil_tmp28 = __cil_tmp27 + 484;
18280#line 246
18281  __cil_tmp29 = *((int *)__cil_tmp28);
18282#line 246
18283  *((int *)__cil_tmp26) = y + __cil_tmp29;
18284#line 248
18285  __cil_tmp30 = (unsigned long )du;
18286#line 248
18287  __cil_tmp31 = __cil_tmp30 + 2024;
18288#line 248
18289  __cil_tmp32 = *((int *)__cil_tmp31);
18290#line 248
18291  __cil_tmp33 = (unsigned long )du;
18292#line 248
18293  __cil_tmp34 = __cil_tmp33 + 2016;
18294#line 248
18295  __cil_tmp35 = *((int *)__cil_tmp34);
18296#line 248
18297  __cil_tmp36 = __cil_tmp35 + __cil_tmp32;
18298#line 248
18299  __cil_tmp37 = (unsigned long )du;
18300#line 248
18301  __cil_tmp38 = __cil_tmp37 + 2028;
18302#line 248
18303  __cil_tmp39 = *((int *)__cil_tmp38);
18304#line 248
18305  __cil_tmp40 = (unsigned long )du;
18306#line 248
18307  __cil_tmp41 = __cil_tmp40 + 2020;
18308#line 248
18309  __cil_tmp42 = *((int *)__cil_tmp41);
18310#line 248
18311  __cil_tmp43 = __cil_tmp42 + __cil_tmp39;
18312#line 248
18313  vmw_cursor_update_position(dev_priv, shown, __cil_tmp36, __cil_tmp43);
18314  }
18315#line 252
18316  return (0);
18317}
18318}
18319#line 255 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
18320void vmw_kms_cursor_snoop(struct vmw_surface *srf , struct ttm_object_file *tfile ,
18321                          struct ttm_buffer_object *bo , SVGA3dCmdHeader *header ) 
18322{ struct ttm_bo_kmap_obj map ;
18323  unsigned long kmap_offset ;
18324  unsigned long kmap_num ;
18325  SVGA3dCopyBox *box ;
18326  unsigned int box_count ;
18327  void *virtual ;
18328  bool dummy ;
18329  struct vmw_dma_cmd *cmd ;
18330  int i ;
18331  int ret ;
18332  SVGA3dCmdHeader    *__mptr ;
18333  long tmp___7 ;
18334  long tmp___8 ;
18335  size_t __len ;
18336  void *__ret ;
18337  size_t __len___0 ;
18338  void *__ret___0 ;
18339  struct vmw_dma_cmd *__cil_tmp22 ;
18340  SVGA3dCmdHeader *__cil_tmp23 ;
18341  unsigned int __cil_tmp24 ;
18342  char *__cil_tmp25 ;
18343  char *__cil_tmp26 ;
18344  unsigned long __cil_tmp27 ;
18345  unsigned long __cil_tmp28 ;
18346  unsigned long __cil_tmp29 ;
18347  uint32_t *__cil_tmp30 ;
18348  unsigned long __cil_tmp31 ;
18349  unsigned long __cil_tmp32 ;
18350  unsigned long __cil_tmp33 ;
18351  unsigned long __cil_tmp34 ;
18352  uint32 __cil_tmp35 ;
18353  unsigned long __cil_tmp36 ;
18354  unsigned long __cil_tmp37 ;
18355  unsigned long __cil_tmp38 ;
18356  unsigned long __cil_tmp39 ;
18357  uint32 __cil_tmp40 ;
18358  unsigned long __cil_tmp41 ;
18359  unsigned long __cil_tmp42 ;
18360  unsigned long __cil_tmp43 ;
18361  uint32 __cil_tmp44 ;
18362  struct vmw_dma_cmd *__cil_tmp45 ;
18363  unsigned long __cil_tmp46 ;
18364  unsigned long __cil_tmp47 ;
18365  unsigned long __cil_tmp48 ;
18366  uint32 __cil_tmp49 ;
18367  unsigned long __cil_tmp50 ;
18368  unsigned long __cil_tmp51 ;
18369  unsigned long __cil_tmp52 ;
18370  unsigned long __cil_tmp53 ;
18371  unsigned long __cil_tmp54 ;
18372  unsigned long __cil_tmp55 ;
18373  unsigned long __cil_tmp56 ;
18374  unsigned long __cil_tmp57 ;
18375  unsigned long __cil_tmp58 ;
18376  uint32 __cil_tmp59 ;
18377  unsigned long __cil_tmp60 ;
18378  unsigned long __cil_tmp61 ;
18379  unsigned long __cil_tmp62 ;
18380  uint32 __cil_tmp63 ;
18381  unsigned long __cil_tmp64 ;
18382  unsigned long __cil_tmp65 ;
18383  uint32 __cil_tmp66 ;
18384  unsigned long __cil_tmp67 ;
18385  unsigned long __cil_tmp68 ;
18386  uint32 __cil_tmp69 ;
18387  uint32 __cil_tmp70 ;
18388  unsigned long __cil_tmp71 ;
18389  unsigned long __cil_tmp72 ;
18390  uint32 __cil_tmp73 ;
18391  unsigned long __cil_tmp74 ;
18392  unsigned long __cil_tmp75 ;
18393  uint32 __cil_tmp76 ;
18394  unsigned long __cil_tmp77 ;
18395  unsigned long __cil_tmp78 ;
18396  uint32 __cil_tmp79 ;
18397  unsigned long __cil_tmp80 ;
18398  unsigned long __cil_tmp81 ;
18399  uint32 __cil_tmp82 ;
18400  unsigned long __cil_tmp83 ;
18401  unsigned long __cil_tmp84 ;
18402  uint32 __cil_tmp85 ;
18403  unsigned long __cil_tmp86 ;
18404  unsigned long __cil_tmp87 ;
18405  unsigned long __cil_tmp88 ;
18406  unsigned long __cil_tmp89 ;
18407  unsigned long __cil_tmp90 ;
18408  uint32 __cil_tmp91 ;
18409  uint32 __cil_tmp92 ;
18410  unsigned long __cil_tmp93 ;
18411  unsigned long __cil_tmp94 ;
18412  uint32 __cil_tmp95 ;
18413  unsigned long __cil_tmp96 ;
18414  unsigned long __cil_tmp97 ;
18415  uint32 __cil_tmp98 ;
18416  unsigned long __cil_tmp99 ;
18417  unsigned long __cil_tmp100 ;
18418  uint32 __cil_tmp101 ;
18419  uint32 __cil_tmp102 ;
18420  unsigned long __cil_tmp103 ;
18421  unsigned long __cil_tmp104 ;
18422  uint32 __cil_tmp105 ;
18423  unsigned long __cil_tmp106 ;
18424  unsigned long __cil_tmp107 ;
18425  uint32 __cil_tmp108 ;
18426  unsigned long __cil_tmp109 ;
18427  unsigned long __cil_tmp110 ;
18428  uint32 __cil_tmp111 ;
18429  unsigned long __cil_tmp112 ;
18430  unsigned long __cil_tmp113 ;
18431  uint32 __cil_tmp114 ;
18432  unsigned long __cil_tmp115 ;
18433  unsigned long __cil_tmp116 ;
18434  uint32 __cil_tmp117 ;
18435  unsigned long __cil_tmp118 ;
18436  unsigned long __cil_tmp119 ;
18437  unsigned long __cil_tmp120 ;
18438  unsigned long __cil_tmp121 ;
18439  unsigned long __cil_tmp122 ;
18440  uint32 __cil_tmp123 ;
18441  unsigned long __cil_tmp124 ;
18442  unsigned long __cil_tmp125 ;
18443  uint32 __cil_tmp126 ;
18444  unsigned long __cil_tmp127 ;
18445  unsigned long __cil_tmp128 ;
18446  uint32 __cil_tmp129 ;
18447  unsigned long __cil_tmp130 ;
18448  unsigned long __cil_tmp131 ;
18449  uint32 __cil_tmp132 ;
18450  unsigned long __cil_tmp133 ;
18451  unsigned long __cil_tmp134 ;
18452  uint32 __cil_tmp135 ;
18453  uint32 __cil_tmp136 ;
18454  unsigned long __cil_tmp137 ;
18455  unsigned long __cil_tmp138 ;
18456  uint32 __cil_tmp139 ;
18457  unsigned long __cil_tmp140 ;
18458  unsigned long __cil_tmp141 ;
18459  uint32 __cil_tmp142 ;
18460  unsigned long __cil_tmp143 ;
18461  unsigned long __cil_tmp144 ;
18462  uint32 __cil_tmp145 ;
18463  unsigned long __cil_tmp146 ;
18464  unsigned long __cil_tmp147 ;
18465  uint32 __cil_tmp148 ;
18466  unsigned long __cil_tmp149 ;
18467  unsigned long __cil_tmp150 ;
18468  uint32 __cil_tmp151 ;
18469  unsigned long __cil_tmp152 ;
18470  unsigned long __cil_tmp153 ;
18471  unsigned long __cil_tmp154 ;
18472  unsigned long __cil_tmp155 ;
18473  unsigned long __cil_tmp156 ;
18474  uint32 __cil_tmp157 ;
18475  unsigned long __cil_tmp158 ;
18476  unsigned long __cil_tmp159 ;
18477  uint32 __cil_tmp160 ;
18478  unsigned long __cil_tmp161 ;
18479  unsigned long __cil_tmp162 ;
18480  uint32 __cil_tmp163 ;
18481  unsigned long __cil_tmp164 ;
18482  unsigned long __cil_tmp165 ;
18483  uint32 __cil_tmp166 ;
18484  unsigned long __cil_tmp167 ;
18485  unsigned long __cil_tmp168 ;
18486  uint32 __cil_tmp169 ;
18487  uint32 __cil_tmp170 ;
18488  unsigned long __cil_tmp171 ;
18489  unsigned long __cil_tmp172 ;
18490  uint32 __cil_tmp173 ;
18491  unsigned long __cil_tmp174 ;
18492  unsigned long __cil_tmp175 ;
18493  uint32 __cil_tmp176 ;
18494  unsigned long __cil_tmp177 ;
18495  unsigned long __cil_tmp178 ;
18496  uint32 __cil_tmp179 ;
18497  unsigned long __cil_tmp180 ;
18498  unsigned long __cil_tmp181 ;
18499  uint32 __cil_tmp182 ;
18500  unsigned long __cil_tmp183 ;
18501  unsigned long __cil_tmp184 ;
18502  uint32 __cil_tmp185 ;
18503  unsigned long __cil_tmp186 ;
18504  unsigned long __cil_tmp187 ;
18505  unsigned long __cil_tmp188 ;
18506  unsigned long __cil_tmp189 ;
18507  unsigned long __cil_tmp190 ;
18508  uint32 __cil_tmp191 ;
18509  unsigned long __cil_tmp192 ;
18510  unsigned long __cil_tmp193 ;
18511  uint32 __cil_tmp194 ;
18512  unsigned long __cil_tmp195 ;
18513  unsigned long __cil_tmp196 ;
18514  uint32 __cil_tmp197 ;
18515  unsigned long __cil_tmp198 ;
18516  unsigned long __cil_tmp199 ;
18517  uint32 __cil_tmp200 ;
18518  unsigned long __cil_tmp201 ;
18519  unsigned long __cil_tmp202 ;
18520  uint32 __cil_tmp203 ;
18521  uint32 __cil_tmp204 ;
18522  unsigned long __cil_tmp205 ;
18523  unsigned long __cil_tmp206 ;
18524  uint32 __cil_tmp207 ;
18525  unsigned long __cil_tmp208 ;
18526  unsigned long __cil_tmp209 ;
18527  uint32 __cil_tmp210 ;
18528  unsigned long __cil_tmp211 ;
18529  unsigned long __cil_tmp212 ;
18530  uint32 __cil_tmp213 ;
18531  unsigned long __cil_tmp214 ;
18532  unsigned long __cil_tmp215 ;
18533  uint32 __cil_tmp216 ;
18534  unsigned long __cil_tmp217 ;
18535  unsigned long __cil_tmp218 ;
18536  uint32 __cil_tmp219 ;
18537  unsigned long __cil_tmp220 ;
18538  unsigned long __cil_tmp221 ;
18539  unsigned long __cil_tmp222 ;
18540  unsigned long __cil_tmp223 ;
18541  unsigned long __cil_tmp224 ;
18542  uint32 __cil_tmp225 ;
18543  unsigned long __cil_tmp226 ;
18544  unsigned long __cil_tmp227 ;
18545  uint32 __cil_tmp228 ;
18546  unsigned long __cil_tmp229 ;
18547  unsigned long __cil_tmp230 ;
18548  uint32 __cil_tmp231 ;
18549  unsigned long __cil_tmp232 ;
18550  unsigned long __cil_tmp233 ;
18551  uint32 __cil_tmp234 ;
18552  unsigned long __cil_tmp235 ;
18553  unsigned long __cil_tmp236 ;
18554  uint32 __cil_tmp237 ;
18555  uint32 __cil_tmp238 ;
18556  unsigned long __cil_tmp239 ;
18557  unsigned long __cil_tmp240 ;
18558  uint32 __cil_tmp241 ;
18559  unsigned long __cil_tmp242 ;
18560  unsigned long __cil_tmp243 ;
18561  uint32 __cil_tmp244 ;
18562  unsigned long __cil_tmp245 ;
18563  unsigned long __cil_tmp246 ;
18564  uint32 __cil_tmp247 ;
18565  unsigned long __cil_tmp248 ;
18566  unsigned long __cil_tmp249 ;
18567  uint32 __cil_tmp250 ;
18568  unsigned long __cil_tmp251 ;
18569  unsigned long __cil_tmp252 ;
18570  uint32 __cil_tmp253 ;
18571  unsigned long __cil_tmp254 ;
18572  unsigned long __cil_tmp255 ;
18573  unsigned long __cil_tmp256 ;
18574  unsigned long __cil_tmp257 ;
18575  unsigned long __cil_tmp258 ;
18576  uint32 __cil_tmp259 ;
18577  unsigned long __cil_tmp260 ;
18578  unsigned long __cil_tmp261 ;
18579  uint32 __cil_tmp262 ;
18580  unsigned long __cil_tmp263 ;
18581  unsigned long __cil_tmp264 ;
18582  uint32 __cil_tmp265 ;
18583  unsigned long __cil_tmp266 ;
18584  unsigned long __cil_tmp267 ;
18585  uint32 __cil_tmp268 ;
18586  unsigned long __cil_tmp269 ;
18587  unsigned long __cil_tmp270 ;
18588  uint32 __cil_tmp271 ;
18589  uint32 __cil_tmp272 ;
18590  unsigned long __cil_tmp273 ;
18591  unsigned long __cil_tmp274 ;
18592  uint32 __cil_tmp275 ;
18593  unsigned long __cil_tmp276 ;
18594  unsigned long __cil_tmp277 ;
18595  uint32 __cil_tmp278 ;
18596  unsigned long __cil_tmp279 ;
18597  unsigned long __cil_tmp280 ;
18598  uint32 __cil_tmp281 ;
18599  unsigned long __cil_tmp282 ;
18600  unsigned long __cil_tmp283 ;
18601  uint32 __cil_tmp284 ;
18602  unsigned long __cil_tmp285 ;
18603  unsigned long __cil_tmp286 ;
18604  uint32 __cil_tmp287 ;
18605  unsigned long __cil_tmp288 ;
18606  unsigned long __cil_tmp289 ;
18607  unsigned long __cil_tmp290 ;
18608  unsigned long __cil_tmp291 ;
18609  unsigned long __cil_tmp292 ;
18610  uint32 __cil_tmp293 ;
18611  unsigned long __cil_tmp294 ;
18612  unsigned long __cil_tmp295 ;
18613  uint32 __cil_tmp296 ;
18614  unsigned long __cil_tmp297 ;
18615  unsigned long __cil_tmp298 ;
18616  uint32 __cil_tmp299 ;
18617  unsigned long __cil_tmp300 ;
18618  unsigned long __cil_tmp301 ;
18619  uint32 __cil_tmp302 ;
18620  unsigned long __cil_tmp303 ;
18621  unsigned long __cil_tmp304 ;
18622  uint32 __cil_tmp305 ;
18623  uint32 __cil_tmp306 ;
18624  unsigned long __cil_tmp307 ;
18625  unsigned long __cil_tmp308 ;
18626  uint32 __cil_tmp309 ;
18627  unsigned long __cil_tmp310 ;
18628  unsigned long __cil_tmp311 ;
18629  uint32 __cil_tmp312 ;
18630  unsigned long __cil_tmp313 ;
18631  unsigned long __cil_tmp314 ;
18632  uint32 __cil_tmp315 ;
18633  unsigned long __cil_tmp316 ;
18634  unsigned long __cil_tmp317 ;
18635  uint32 __cil_tmp318 ;
18636  unsigned long __cil_tmp319 ;
18637  unsigned long __cil_tmp320 ;
18638  uint32 __cil_tmp321 ;
18639  unsigned long __cil_tmp322 ;
18640  unsigned long __cil_tmp323 ;
18641  unsigned long __cil_tmp324 ;
18642  unsigned long __cil_tmp325 ;
18643  unsigned long __cil_tmp326 ;
18644  uint32 __cil_tmp327 ;
18645  unsigned long __cil_tmp328 ;
18646  unsigned long __cil_tmp329 ;
18647  uint32 __cil_tmp330 ;
18648  unsigned long __cil_tmp331 ;
18649  unsigned long __cil_tmp332 ;
18650  uint32 __cil_tmp333 ;
18651  unsigned long __cil_tmp334 ;
18652  unsigned long __cil_tmp335 ;
18653  uint32 __cil_tmp336 ;
18654  uint32 __cil_tmp337 ;
18655  unsigned long __cil_tmp338 ;
18656  unsigned long __cil_tmp339 ;
18657  uint32 __cil_tmp340 ;
18658  unsigned long __cil_tmp341 ;
18659  unsigned long __cil_tmp342 ;
18660  uint32 __cil_tmp343 ;
18661  unsigned long __cil_tmp344 ;
18662  unsigned long __cil_tmp345 ;
18663  uint32 __cil_tmp346 ;
18664  unsigned long __cil_tmp347 ;
18665  unsigned long __cil_tmp348 ;
18666  uint32 __cil_tmp349 ;
18667  unsigned long __cil_tmp350 ;
18668  unsigned long __cil_tmp351 ;
18669  uint32 __cil_tmp352 ;
18670  unsigned long __cil_tmp353 ;
18671  unsigned long __cil_tmp354 ;
18672  unsigned long __cil_tmp355 ;
18673  unsigned long __cil_tmp356 ;
18674  unsigned long __cil_tmp357 ;
18675  uint32 __cil_tmp358 ;
18676  unsigned long __cil_tmp359 ;
18677  unsigned long __cil_tmp360 ;
18678  unsigned long __cil_tmp361 ;
18679  unsigned long __cil_tmp362 ;
18680  unsigned long __cil_tmp363 ;
18681  uint32 __cil_tmp364 ;
18682  uint32 __cil_tmp365 ;
18683  int __cil_tmp366 ;
18684  bool __cil_tmp367 ;
18685  bool __cil_tmp368 ;
18686  bool __cil_tmp369 ;
18687  uint32_t __cil_tmp370 ;
18688  int __cil_tmp371 ;
18689  int __cil_tmp372 ;
18690  int __cil_tmp373 ;
18691  long __cil_tmp374 ;
18692  int __cil_tmp375 ;
18693  int __cil_tmp376 ;
18694  int __cil_tmp377 ;
18695  long __cil_tmp378 ;
18696  unsigned long __cil_tmp379 ;
18697  unsigned long __cil_tmp380 ;
18698  uint32 __cil_tmp381 ;
18699  unsigned long __cil_tmp382 ;
18700  unsigned long __cil_tmp383 ;
18701  unsigned long __cil_tmp384 ;
18702  unsigned long __cil_tmp385 ;
18703  uint32 __cil_tmp386 ;
18704  unsigned long __cil_tmp387 ;
18705  unsigned long __cil_tmp388 ;
18706  unsigned long __cil_tmp389 ;
18707  uint32_t *__cil_tmp390 ;
18708  void *__cil_tmp391 ;
18709  void    *__cil_tmp392 ;
18710  unsigned long __cil_tmp393 ;
18711  unsigned long __cil_tmp394 ;
18712  unsigned long __cil_tmp395 ;
18713  uint32_t *__cil_tmp396 ;
18714  void *__cil_tmp397 ;
18715  void    *__cil_tmp398 ;
18716  unsigned long __cil_tmp399 ;
18717  unsigned long __cil_tmp400 ;
18718  uint32 __cil_tmp401 ;
18719  uint32 __cil_tmp402 ;
18720  unsigned long __cil_tmp403 ;
18721  unsigned long __cil_tmp404 ;
18722  uint32 __cil_tmp405 ;
18723  uint32 __cil_tmp406 ;
18724  int __cil_tmp407 ;
18725  unsigned long __cil_tmp408 ;
18726  unsigned long __cil_tmp409 ;
18727  unsigned long __cil_tmp410 ;
18728  uint32_t *__cil_tmp411 ;
18729  uint32_t *__cil_tmp412 ;
18730  void *__cil_tmp413 ;
18731  unsigned long __cil_tmp414 ;
18732  unsigned long __cil_tmp415 ;
18733  unsigned long __cil_tmp416 ;
18734  unsigned long __cil_tmp417 ;
18735  uint32 __cil_tmp418 ;
18736  uint32 __cil_tmp419 ;
18737  uint32 __cil_tmp420 ;
18738  void *__cil_tmp421 ;
18739  void    *__cil_tmp422 ;
18740  unsigned long __cil_tmp423 ;
18741  unsigned long __cil_tmp424 ;
18742  unsigned long __cil_tmp425 ;
18743  unsigned long __cil_tmp426 ;
18744  unsigned long __cil_tmp427 ;
18745  unsigned long __cil_tmp428 ;
18746  size_t __cil_tmp429 ;
18747
18748  {
18749#line 273
18750  __mptr = (SVGA3dCmdHeader    *)header;
18751#line 273
18752  __cil_tmp22 = (struct vmw_dma_cmd *)0;
18753#line 273
18754  __cil_tmp23 = (SVGA3dCmdHeader *)__cil_tmp22;
18755#line 273
18756  __cil_tmp24 = (unsigned int )__cil_tmp23;
18757#line 273
18758  __cil_tmp25 = (char *)__mptr;
18759#line 273
18760  __cil_tmp26 = __cil_tmp25 - __cil_tmp24;
18761#line 273
18762  cmd = (struct vmw_dma_cmd *)__cil_tmp26;
18763  {
18764#line 276
18765  __cil_tmp27 = 160 + 16;
18766#line 276
18767  __cil_tmp28 = (unsigned long )srf;
18768#line 276
18769  __cil_tmp29 = __cil_tmp28 + __cil_tmp27;
18770#line 276
18771  __cil_tmp30 = *((uint32_t **)__cil_tmp29);
18772#line 276
18773  if (! __cil_tmp30) {
18774#line 277
18775    return;
18776  } else {
18777
18778  }
18779  }
18780  {
18781#line 279
18782  __cil_tmp31 = 12 + 4;
18783#line 279
18784  __cil_tmp32 = 8 + __cil_tmp31;
18785#line 279
18786  __cil_tmp33 = (unsigned long )cmd;
18787#line 279
18788  __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
18789#line 279
18790  __cil_tmp35 = *((uint32 *)__cil_tmp34);
18791#line 279
18792  if (__cil_tmp35 != 0U) {
18793    {
18794#line 280
18795    drm_err("vmw_kms_cursor_snoop", "face and mipmap for cursors should never != 0\n");
18796    }
18797#line 281
18798    return;
18799  } else {
18800    {
18801#line 279
18802    __cil_tmp36 = 12 + 8;
18803#line 279
18804    __cil_tmp37 = 8 + __cil_tmp36;
18805#line 279
18806    __cil_tmp38 = (unsigned long )cmd;
18807#line 279
18808    __cil_tmp39 = __cil_tmp38 + __cil_tmp37;
18809#line 279
18810    __cil_tmp40 = *((uint32 *)__cil_tmp39);
18811#line 279
18812    if (__cil_tmp40 != 0U) {
18813      {
18814#line 280
18815      drm_err("vmw_kms_cursor_snoop", "face and mipmap for cursors should never != 0\n");
18816      }
18817#line 281
18818      return;
18819    } else {
18820
18821    }
18822    }
18823  }
18824  }
18825  {
18826#line 284
18827  __cil_tmp41 = 0 + 4;
18828#line 284
18829  __cil_tmp42 = (unsigned long )cmd;
18830#line 284
18831  __cil_tmp43 = __cil_tmp42 + __cil_tmp41;
18832#line 284
18833  __cil_tmp44 = *((uint32 *)__cil_tmp43);
18834#line 284
18835  if (__cil_tmp44 < 64U) {
18836    {
18837#line 285
18838    drm_err("vmw_kms_cursor_snoop", "at least one full copy box must be given\n");
18839    }
18840#line 286
18841    return;
18842  } else {
18843
18844  }
18845  }
18846#line 289
18847  __cil_tmp45 = cmd + 1;
18848#line 289
18849  box = (SVGA3dCopyBox *)__cil_tmp45;
18850#line 290
18851  __cil_tmp46 = 0 + 4;
18852#line 290
18853  __cil_tmp47 = (unsigned long )cmd;
18854#line 290
18855  __cil_tmp48 = __cil_tmp47 + __cil_tmp46;
18856#line 290
18857  __cil_tmp49 = *((uint32 *)__cil_tmp48);
18858#line 290
18859  __cil_tmp50 = (unsigned long )__cil_tmp49;
18860#line 290
18861  __cil_tmp51 = __cil_tmp50 - 28UL;
18862#line 290
18863  __cil_tmp52 = __cil_tmp51 / 36UL;
18864#line 290
18865  box_count = (unsigned int )__cil_tmp52;
18866  {
18867#line 293
18868  __cil_tmp53 = 1UL << 12;
18869#line 293
18870  __cil_tmp54 = 0 + 4;
18871#line 293
18872  __cil_tmp55 = 0 + __cil_tmp54;
18873#line 293
18874  __cil_tmp56 = 8 + __cil_tmp55;
18875#line 293
18876  __cil_tmp57 = (unsigned long )cmd;
18877#line 293
18878  __cil_tmp58 = __cil_tmp57 + __cil_tmp56;
18879#line 293
18880  __cil_tmp59 = *((uint32 *)__cil_tmp58);
18881#line 293
18882  __cil_tmp60 = (unsigned long )__cil_tmp59;
18883#line 293
18884  if (__cil_tmp60 % __cil_tmp53) {
18885    {
18886#line 300
18887    drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
18888#line 301
18889    __cil_tmp61 = (unsigned long )box;
18890#line 301
18891    __cil_tmp62 = __cil_tmp61 + 24;
18892#line 301
18893    __cil_tmp63 = *((uint32 *)__cil_tmp62);
18894#line 301
18895    __cil_tmp64 = (unsigned long )box;
18896#line 301
18897    __cil_tmp65 = __cil_tmp64 + 28;
18898#line 301
18899    __cil_tmp66 = *((uint32 *)__cil_tmp65);
18900#line 301
18901    __cil_tmp67 = (unsigned long )box;
18902#line 301
18903    __cil_tmp68 = __cil_tmp67 + 32;
18904#line 301
18905    __cil_tmp69 = *((uint32 *)__cil_tmp68);
18906#line 301
18907    __cil_tmp70 = *((uint32 *)box);
18908#line 301
18909    __cil_tmp71 = (unsigned long )box;
18910#line 301
18911    __cil_tmp72 = __cil_tmp71 + 4;
18912#line 301
18913    __cil_tmp73 = *((uint32 *)__cil_tmp72);
18914#line 301
18915    __cil_tmp74 = (unsigned long )box;
18916#line 301
18917    __cil_tmp75 = __cil_tmp74 + 8;
18918#line 301
18919    __cil_tmp76 = *((uint32 *)__cil_tmp75);
18920#line 301
18921    __cil_tmp77 = (unsigned long )box;
18922#line 301
18923    __cil_tmp78 = __cil_tmp77 + 12;
18924#line 301
18925    __cil_tmp79 = *((uint32 *)__cil_tmp78);
18926#line 301
18927    __cil_tmp80 = (unsigned long )box;
18928#line 301
18929    __cil_tmp81 = __cil_tmp80 + 16;
18930#line 301
18931    __cil_tmp82 = *((uint32 *)__cil_tmp81);
18932#line 301
18933    __cil_tmp83 = (unsigned long )box;
18934#line 301
18935    __cil_tmp84 = __cil_tmp83 + 20;
18936#line 301
18937    __cil_tmp85 = *((uint32 *)__cil_tmp84);
18938#line 301
18939    __cil_tmp86 = 0 + 4;
18940#line 301
18941    __cil_tmp87 = 0 + __cil_tmp86;
18942#line 301
18943    __cil_tmp88 = 8 + __cil_tmp87;
18944#line 301
18945    __cil_tmp89 = (unsigned long )cmd;
18946#line 301
18947    __cil_tmp90 = __cil_tmp89 + __cil_tmp88;
18948#line 301
18949    __cil_tmp91 = *((uint32 *)__cil_tmp90);
18950#line 301
18951    drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
18952            __cil_tmp63, __cil_tmp66, __cil_tmp69, __cil_tmp70, __cil_tmp73, __cil_tmp76,
18953            __cil_tmp79, __cil_tmp82, __cil_tmp85, box_count, __cil_tmp91);
18954    }
18955#line 306
18956    return;
18957  } else {
18958    {
18959#line 293
18960    __cil_tmp92 = *((uint32 *)box);
18961#line 293
18962    if (__cil_tmp92 != 0U) {
18963      {
18964#line 300
18965      drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
18966#line 301
18967      __cil_tmp93 = (unsigned long )box;
18968#line 301
18969      __cil_tmp94 = __cil_tmp93 + 24;
18970#line 301
18971      __cil_tmp95 = *((uint32 *)__cil_tmp94);
18972#line 301
18973      __cil_tmp96 = (unsigned long )box;
18974#line 301
18975      __cil_tmp97 = __cil_tmp96 + 28;
18976#line 301
18977      __cil_tmp98 = *((uint32 *)__cil_tmp97);
18978#line 301
18979      __cil_tmp99 = (unsigned long )box;
18980#line 301
18981      __cil_tmp100 = __cil_tmp99 + 32;
18982#line 301
18983      __cil_tmp101 = *((uint32 *)__cil_tmp100);
18984#line 301
18985      __cil_tmp102 = *((uint32 *)box);
18986#line 301
18987      __cil_tmp103 = (unsigned long )box;
18988#line 301
18989      __cil_tmp104 = __cil_tmp103 + 4;
18990#line 301
18991      __cil_tmp105 = *((uint32 *)__cil_tmp104);
18992#line 301
18993      __cil_tmp106 = (unsigned long )box;
18994#line 301
18995      __cil_tmp107 = __cil_tmp106 + 8;
18996#line 301
18997      __cil_tmp108 = *((uint32 *)__cil_tmp107);
18998#line 301
18999      __cil_tmp109 = (unsigned long )box;
19000#line 301
19001      __cil_tmp110 = __cil_tmp109 + 12;
19002#line 301
19003      __cil_tmp111 = *((uint32 *)__cil_tmp110);
19004#line 301
19005      __cil_tmp112 = (unsigned long )box;
19006#line 301
19007      __cil_tmp113 = __cil_tmp112 + 16;
19008#line 301
19009      __cil_tmp114 = *((uint32 *)__cil_tmp113);
19010#line 301
19011      __cil_tmp115 = (unsigned long )box;
19012#line 301
19013      __cil_tmp116 = __cil_tmp115 + 20;
19014#line 301
19015      __cil_tmp117 = *((uint32 *)__cil_tmp116);
19016#line 301
19017      __cil_tmp118 = 0 + 4;
19018#line 301
19019      __cil_tmp119 = 0 + __cil_tmp118;
19020#line 301
19021      __cil_tmp120 = 8 + __cil_tmp119;
19022#line 301
19023      __cil_tmp121 = (unsigned long )cmd;
19024#line 301
19025      __cil_tmp122 = __cil_tmp121 + __cil_tmp120;
19026#line 301
19027      __cil_tmp123 = *((uint32 *)__cil_tmp122);
19028#line 301
19029      drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19030              __cil_tmp95, __cil_tmp98, __cil_tmp101, __cil_tmp102, __cil_tmp105,
19031              __cil_tmp108, __cil_tmp111, __cil_tmp114, __cil_tmp117, box_count, __cil_tmp123);
19032      }
19033#line 306
19034      return;
19035    } else {
19036      {
19037#line 293
19038      __cil_tmp124 = (unsigned long )box;
19039#line 293
19040      __cil_tmp125 = __cil_tmp124 + 4;
19041#line 293
19042      __cil_tmp126 = *((uint32 *)__cil_tmp125);
19043#line 293
19044      if (__cil_tmp126 != 0U) {
19045        {
19046#line 300
19047        drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19048#line 301
19049        __cil_tmp127 = (unsigned long )box;
19050#line 301
19051        __cil_tmp128 = __cil_tmp127 + 24;
19052#line 301
19053        __cil_tmp129 = *((uint32 *)__cil_tmp128);
19054#line 301
19055        __cil_tmp130 = (unsigned long )box;
19056#line 301
19057        __cil_tmp131 = __cil_tmp130 + 28;
19058#line 301
19059        __cil_tmp132 = *((uint32 *)__cil_tmp131);
19060#line 301
19061        __cil_tmp133 = (unsigned long )box;
19062#line 301
19063        __cil_tmp134 = __cil_tmp133 + 32;
19064#line 301
19065        __cil_tmp135 = *((uint32 *)__cil_tmp134);
19066#line 301
19067        __cil_tmp136 = *((uint32 *)box);
19068#line 301
19069        __cil_tmp137 = (unsigned long )box;
19070#line 301
19071        __cil_tmp138 = __cil_tmp137 + 4;
19072#line 301
19073        __cil_tmp139 = *((uint32 *)__cil_tmp138);
19074#line 301
19075        __cil_tmp140 = (unsigned long )box;
19076#line 301
19077        __cil_tmp141 = __cil_tmp140 + 8;
19078#line 301
19079        __cil_tmp142 = *((uint32 *)__cil_tmp141);
19080#line 301
19081        __cil_tmp143 = (unsigned long )box;
19082#line 301
19083        __cil_tmp144 = __cil_tmp143 + 12;
19084#line 301
19085        __cil_tmp145 = *((uint32 *)__cil_tmp144);
19086#line 301
19087        __cil_tmp146 = (unsigned long )box;
19088#line 301
19089        __cil_tmp147 = __cil_tmp146 + 16;
19090#line 301
19091        __cil_tmp148 = *((uint32 *)__cil_tmp147);
19092#line 301
19093        __cil_tmp149 = (unsigned long )box;
19094#line 301
19095        __cil_tmp150 = __cil_tmp149 + 20;
19096#line 301
19097        __cil_tmp151 = *((uint32 *)__cil_tmp150);
19098#line 301
19099        __cil_tmp152 = 0 + 4;
19100#line 301
19101        __cil_tmp153 = 0 + __cil_tmp152;
19102#line 301
19103        __cil_tmp154 = 8 + __cil_tmp153;
19104#line 301
19105        __cil_tmp155 = (unsigned long )cmd;
19106#line 301
19107        __cil_tmp156 = __cil_tmp155 + __cil_tmp154;
19108#line 301
19109        __cil_tmp157 = *((uint32 *)__cil_tmp156);
19110#line 301
19111        drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19112                __cil_tmp129, __cil_tmp132, __cil_tmp135, __cil_tmp136, __cil_tmp139,
19113                __cil_tmp142, __cil_tmp145, __cil_tmp148, __cil_tmp151, box_count,
19114                __cil_tmp157);
19115        }
19116#line 306
19117        return;
19118      } else {
19119        {
19120#line 293
19121        __cil_tmp158 = (unsigned long )box;
19122#line 293
19123        __cil_tmp159 = __cil_tmp158 + 8;
19124#line 293
19125        __cil_tmp160 = *((uint32 *)__cil_tmp159);
19126#line 293
19127        if (__cil_tmp160 != 0U) {
19128          {
19129#line 300
19130          drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19131#line 301
19132          __cil_tmp161 = (unsigned long )box;
19133#line 301
19134          __cil_tmp162 = __cil_tmp161 + 24;
19135#line 301
19136          __cil_tmp163 = *((uint32 *)__cil_tmp162);
19137#line 301
19138          __cil_tmp164 = (unsigned long )box;
19139#line 301
19140          __cil_tmp165 = __cil_tmp164 + 28;
19141#line 301
19142          __cil_tmp166 = *((uint32 *)__cil_tmp165);
19143#line 301
19144          __cil_tmp167 = (unsigned long )box;
19145#line 301
19146          __cil_tmp168 = __cil_tmp167 + 32;
19147#line 301
19148          __cil_tmp169 = *((uint32 *)__cil_tmp168);
19149#line 301
19150          __cil_tmp170 = *((uint32 *)box);
19151#line 301
19152          __cil_tmp171 = (unsigned long )box;
19153#line 301
19154          __cil_tmp172 = __cil_tmp171 + 4;
19155#line 301
19156          __cil_tmp173 = *((uint32 *)__cil_tmp172);
19157#line 301
19158          __cil_tmp174 = (unsigned long )box;
19159#line 301
19160          __cil_tmp175 = __cil_tmp174 + 8;
19161#line 301
19162          __cil_tmp176 = *((uint32 *)__cil_tmp175);
19163#line 301
19164          __cil_tmp177 = (unsigned long )box;
19165#line 301
19166          __cil_tmp178 = __cil_tmp177 + 12;
19167#line 301
19168          __cil_tmp179 = *((uint32 *)__cil_tmp178);
19169#line 301
19170          __cil_tmp180 = (unsigned long )box;
19171#line 301
19172          __cil_tmp181 = __cil_tmp180 + 16;
19173#line 301
19174          __cil_tmp182 = *((uint32 *)__cil_tmp181);
19175#line 301
19176          __cil_tmp183 = (unsigned long )box;
19177#line 301
19178          __cil_tmp184 = __cil_tmp183 + 20;
19179#line 301
19180          __cil_tmp185 = *((uint32 *)__cil_tmp184);
19181#line 301
19182          __cil_tmp186 = 0 + 4;
19183#line 301
19184          __cil_tmp187 = 0 + __cil_tmp186;
19185#line 301
19186          __cil_tmp188 = 8 + __cil_tmp187;
19187#line 301
19188          __cil_tmp189 = (unsigned long )cmd;
19189#line 301
19190          __cil_tmp190 = __cil_tmp189 + __cil_tmp188;
19191#line 301
19192          __cil_tmp191 = *((uint32 *)__cil_tmp190);
19193#line 301
19194          drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19195                  __cil_tmp163, __cil_tmp166, __cil_tmp169, __cil_tmp170, __cil_tmp173,
19196                  __cil_tmp176, __cil_tmp179, __cil_tmp182, __cil_tmp185, box_count,
19197                  __cil_tmp191);
19198          }
19199#line 306
19200          return;
19201        } else {
19202          {
19203#line 293
19204          __cil_tmp192 = (unsigned long )box;
19205#line 293
19206          __cil_tmp193 = __cil_tmp192 + 24;
19207#line 293
19208          __cil_tmp194 = *((uint32 *)__cil_tmp193);
19209#line 293
19210          if (__cil_tmp194 != 0U) {
19211            {
19212#line 300
19213            drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19214#line 301
19215            __cil_tmp195 = (unsigned long )box;
19216#line 301
19217            __cil_tmp196 = __cil_tmp195 + 24;
19218#line 301
19219            __cil_tmp197 = *((uint32 *)__cil_tmp196);
19220#line 301
19221            __cil_tmp198 = (unsigned long )box;
19222#line 301
19223            __cil_tmp199 = __cil_tmp198 + 28;
19224#line 301
19225            __cil_tmp200 = *((uint32 *)__cil_tmp199);
19226#line 301
19227            __cil_tmp201 = (unsigned long )box;
19228#line 301
19229            __cil_tmp202 = __cil_tmp201 + 32;
19230#line 301
19231            __cil_tmp203 = *((uint32 *)__cil_tmp202);
19232#line 301
19233            __cil_tmp204 = *((uint32 *)box);
19234#line 301
19235            __cil_tmp205 = (unsigned long )box;
19236#line 301
19237            __cil_tmp206 = __cil_tmp205 + 4;
19238#line 301
19239            __cil_tmp207 = *((uint32 *)__cil_tmp206);
19240#line 301
19241            __cil_tmp208 = (unsigned long )box;
19242#line 301
19243            __cil_tmp209 = __cil_tmp208 + 8;
19244#line 301
19245            __cil_tmp210 = *((uint32 *)__cil_tmp209);
19246#line 301
19247            __cil_tmp211 = (unsigned long )box;
19248#line 301
19249            __cil_tmp212 = __cil_tmp211 + 12;
19250#line 301
19251            __cil_tmp213 = *((uint32 *)__cil_tmp212);
19252#line 301
19253            __cil_tmp214 = (unsigned long )box;
19254#line 301
19255            __cil_tmp215 = __cil_tmp214 + 16;
19256#line 301
19257            __cil_tmp216 = *((uint32 *)__cil_tmp215);
19258#line 301
19259            __cil_tmp217 = (unsigned long )box;
19260#line 301
19261            __cil_tmp218 = __cil_tmp217 + 20;
19262#line 301
19263            __cil_tmp219 = *((uint32 *)__cil_tmp218);
19264#line 301
19265            __cil_tmp220 = 0 + 4;
19266#line 301
19267            __cil_tmp221 = 0 + __cil_tmp220;
19268#line 301
19269            __cil_tmp222 = 8 + __cil_tmp221;
19270#line 301
19271            __cil_tmp223 = (unsigned long )cmd;
19272#line 301
19273            __cil_tmp224 = __cil_tmp223 + __cil_tmp222;
19274#line 301
19275            __cil_tmp225 = *((uint32 *)__cil_tmp224);
19276#line 301
19277            drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19278                    __cil_tmp197, __cil_tmp200, __cil_tmp203, __cil_tmp204, __cil_tmp207,
19279                    __cil_tmp210, __cil_tmp213, __cil_tmp216, __cil_tmp219, box_count,
19280                    __cil_tmp225);
19281            }
19282#line 306
19283            return;
19284          } else {
19285            {
19286#line 293
19287            __cil_tmp226 = (unsigned long )box;
19288#line 293
19289            __cil_tmp227 = __cil_tmp226 + 28;
19290#line 293
19291            __cil_tmp228 = *((uint32 *)__cil_tmp227);
19292#line 293
19293            if (__cil_tmp228 != 0U) {
19294              {
19295#line 300
19296              drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19297#line 301
19298              __cil_tmp229 = (unsigned long )box;
19299#line 301
19300              __cil_tmp230 = __cil_tmp229 + 24;
19301#line 301
19302              __cil_tmp231 = *((uint32 *)__cil_tmp230);
19303#line 301
19304              __cil_tmp232 = (unsigned long )box;
19305#line 301
19306              __cil_tmp233 = __cil_tmp232 + 28;
19307#line 301
19308              __cil_tmp234 = *((uint32 *)__cil_tmp233);
19309#line 301
19310              __cil_tmp235 = (unsigned long )box;
19311#line 301
19312              __cil_tmp236 = __cil_tmp235 + 32;
19313#line 301
19314              __cil_tmp237 = *((uint32 *)__cil_tmp236);
19315#line 301
19316              __cil_tmp238 = *((uint32 *)box);
19317#line 301
19318              __cil_tmp239 = (unsigned long )box;
19319#line 301
19320              __cil_tmp240 = __cil_tmp239 + 4;
19321#line 301
19322              __cil_tmp241 = *((uint32 *)__cil_tmp240);
19323#line 301
19324              __cil_tmp242 = (unsigned long )box;
19325#line 301
19326              __cil_tmp243 = __cil_tmp242 + 8;
19327#line 301
19328              __cil_tmp244 = *((uint32 *)__cil_tmp243);
19329#line 301
19330              __cil_tmp245 = (unsigned long )box;
19331#line 301
19332              __cil_tmp246 = __cil_tmp245 + 12;
19333#line 301
19334              __cil_tmp247 = *((uint32 *)__cil_tmp246);
19335#line 301
19336              __cil_tmp248 = (unsigned long )box;
19337#line 301
19338              __cil_tmp249 = __cil_tmp248 + 16;
19339#line 301
19340              __cil_tmp250 = *((uint32 *)__cil_tmp249);
19341#line 301
19342              __cil_tmp251 = (unsigned long )box;
19343#line 301
19344              __cil_tmp252 = __cil_tmp251 + 20;
19345#line 301
19346              __cil_tmp253 = *((uint32 *)__cil_tmp252);
19347#line 301
19348              __cil_tmp254 = 0 + 4;
19349#line 301
19350              __cil_tmp255 = 0 + __cil_tmp254;
19351#line 301
19352              __cil_tmp256 = 8 + __cil_tmp255;
19353#line 301
19354              __cil_tmp257 = (unsigned long )cmd;
19355#line 301
19356              __cil_tmp258 = __cil_tmp257 + __cil_tmp256;
19357#line 301
19358              __cil_tmp259 = *((uint32 *)__cil_tmp258);
19359#line 301
19360              drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19361                      __cil_tmp231, __cil_tmp234, __cil_tmp237, __cil_tmp238, __cil_tmp241,
19362                      __cil_tmp244, __cil_tmp247, __cil_tmp250, __cil_tmp253, box_count,
19363                      __cil_tmp259);
19364              }
19365#line 306
19366              return;
19367            } else {
19368              {
19369#line 293
19370              __cil_tmp260 = (unsigned long )box;
19371#line 293
19372              __cil_tmp261 = __cil_tmp260 + 32;
19373#line 293
19374              __cil_tmp262 = *((uint32 *)__cil_tmp261);
19375#line 293
19376              if (__cil_tmp262 != 0U) {
19377                {
19378#line 300
19379                drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19380#line 301
19381                __cil_tmp263 = (unsigned long )box;
19382#line 301
19383                __cil_tmp264 = __cil_tmp263 + 24;
19384#line 301
19385                __cil_tmp265 = *((uint32 *)__cil_tmp264);
19386#line 301
19387                __cil_tmp266 = (unsigned long )box;
19388#line 301
19389                __cil_tmp267 = __cil_tmp266 + 28;
19390#line 301
19391                __cil_tmp268 = *((uint32 *)__cil_tmp267);
19392#line 301
19393                __cil_tmp269 = (unsigned long )box;
19394#line 301
19395                __cil_tmp270 = __cil_tmp269 + 32;
19396#line 301
19397                __cil_tmp271 = *((uint32 *)__cil_tmp270);
19398#line 301
19399                __cil_tmp272 = *((uint32 *)box);
19400#line 301
19401                __cil_tmp273 = (unsigned long )box;
19402#line 301
19403                __cil_tmp274 = __cil_tmp273 + 4;
19404#line 301
19405                __cil_tmp275 = *((uint32 *)__cil_tmp274);
19406#line 301
19407                __cil_tmp276 = (unsigned long )box;
19408#line 301
19409                __cil_tmp277 = __cil_tmp276 + 8;
19410#line 301
19411                __cil_tmp278 = *((uint32 *)__cil_tmp277);
19412#line 301
19413                __cil_tmp279 = (unsigned long )box;
19414#line 301
19415                __cil_tmp280 = __cil_tmp279 + 12;
19416#line 301
19417                __cil_tmp281 = *((uint32 *)__cil_tmp280);
19418#line 301
19419                __cil_tmp282 = (unsigned long )box;
19420#line 301
19421                __cil_tmp283 = __cil_tmp282 + 16;
19422#line 301
19423                __cil_tmp284 = *((uint32 *)__cil_tmp283);
19424#line 301
19425                __cil_tmp285 = (unsigned long )box;
19426#line 301
19427                __cil_tmp286 = __cil_tmp285 + 20;
19428#line 301
19429                __cil_tmp287 = *((uint32 *)__cil_tmp286);
19430#line 301
19431                __cil_tmp288 = 0 + 4;
19432#line 301
19433                __cil_tmp289 = 0 + __cil_tmp288;
19434#line 301
19435                __cil_tmp290 = 8 + __cil_tmp289;
19436#line 301
19437                __cil_tmp291 = (unsigned long )cmd;
19438#line 301
19439                __cil_tmp292 = __cil_tmp291 + __cil_tmp290;
19440#line 301
19441                __cil_tmp293 = *((uint32 *)__cil_tmp292);
19442#line 301
19443                drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19444                        __cil_tmp265, __cil_tmp268, __cil_tmp271, __cil_tmp272, __cil_tmp275,
19445                        __cil_tmp278, __cil_tmp281, __cil_tmp284, __cil_tmp287, box_count,
19446                        __cil_tmp293);
19447                }
19448#line 306
19449                return;
19450              } else {
19451                {
19452#line 293
19453                __cil_tmp294 = (unsigned long )box;
19454#line 293
19455                __cil_tmp295 = __cil_tmp294 + 20;
19456#line 293
19457                __cil_tmp296 = *((uint32 *)__cil_tmp295);
19458#line 293
19459                if (__cil_tmp296 != 1U) {
19460                  {
19461#line 300
19462                  drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19463#line 301
19464                  __cil_tmp297 = (unsigned long )box;
19465#line 301
19466                  __cil_tmp298 = __cil_tmp297 + 24;
19467#line 301
19468                  __cil_tmp299 = *((uint32 *)__cil_tmp298);
19469#line 301
19470                  __cil_tmp300 = (unsigned long )box;
19471#line 301
19472                  __cil_tmp301 = __cil_tmp300 + 28;
19473#line 301
19474                  __cil_tmp302 = *((uint32 *)__cil_tmp301);
19475#line 301
19476                  __cil_tmp303 = (unsigned long )box;
19477#line 301
19478                  __cil_tmp304 = __cil_tmp303 + 32;
19479#line 301
19480                  __cil_tmp305 = *((uint32 *)__cil_tmp304);
19481#line 301
19482                  __cil_tmp306 = *((uint32 *)box);
19483#line 301
19484                  __cil_tmp307 = (unsigned long )box;
19485#line 301
19486                  __cil_tmp308 = __cil_tmp307 + 4;
19487#line 301
19488                  __cil_tmp309 = *((uint32 *)__cil_tmp308);
19489#line 301
19490                  __cil_tmp310 = (unsigned long )box;
19491#line 301
19492                  __cil_tmp311 = __cil_tmp310 + 8;
19493#line 301
19494                  __cil_tmp312 = *((uint32 *)__cil_tmp311);
19495#line 301
19496                  __cil_tmp313 = (unsigned long )box;
19497#line 301
19498                  __cil_tmp314 = __cil_tmp313 + 12;
19499#line 301
19500                  __cil_tmp315 = *((uint32 *)__cil_tmp314);
19501#line 301
19502                  __cil_tmp316 = (unsigned long )box;
19503#line 301
19504                  __cil_tmp317 = __cil_tmp316 + 16;
19505#line 301
19506                  __cil_tmp318 = *((uint32 *)__cil_tmp317);
19507#line 301
19508                  __cil_tmp319 = (unsigned long )box;
19509#line 301
19510                  __cil_tmp320 = __cil_tmp319 + 20;
19511#line 301
19512                  __cil_tmp321 = *((uint32 *)__cil_tmp320);
19513#line 301
19514                  __cil_tmp322 = 0 + 4;
19515#line 301
19516                  __cil_tmp323 = 0 + __cil_tmp322;
19517#line 301
19518                  __cil_tmp324 = 8 + __cil_tmp323;
19519#line 301
19520                  __cil_tmp325 = (unsigned long )cmd;
19521#line 301
19522                  __cil_tmp326 = __cil_tmp325 + __cil_tmp324;
19523#line 301
19524                  __cil_tmp327 = *((uint32 *)__cil_tmp326);
19525#line 301
19526                  drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19527                          __cil_tmp299, __cil_tmp302, __cil_tmp305, __cil_tmp306,
19528                          __cil_tmp309, __cil_tmp312, __cil_tmp315, __cil_tmp318,
19529                          __cil_tmp321, box_count, __cil_tmp327);
19530                  }
19531#line 306
19532                  return;
19533                } else
19534#line 293
19535                if (box_count != 1U) {
19536                  {
19537#line 300
19538                  drm_err("vmw_kms_cursor_snoop", "Cant snoop dma request for cursor!\n");
19539#line 301
19540                  __cil_tmp328 = (unsigned long )box;
19541#line 301
19542                  __cil_tmp329 = __cil_tmp328 + 24;
19543#line 301
19544                  __cil_tmp330 = *((uint32 *)__cil_tmp329);
19545#line 301
19546                  __cil_tmp331 = (unsigned long )box;
19547#line 301
19548                  __cil_tmp332 = __cil_tmp331 + 28;
19549#line 301
19550                  __cil_tmp333 = *((uint32 *)__cil_tmp332);
19551#line 301
19552                  __cil_tmp334 = (unsigned long )box;
19553#line 301
19554                  __cil_tmp335 = __cil_tmp334 + 32;
19555#line 301
19556                  __cil_tmp336 = *((uint32 *)__cil_tmp335);
19557#line 301
19558                  __cil_tmp337 = *((uint32 *)box);
19559#line 301
19560                  __cil_tmp338 = (unsigned long )box;
19561#line 301
19562                  __cil_tmp339 = __cil_tmp338 + 4;
19563#line 301
19564                  __cil_tmp340 = *((uint32 *)__cil_tmp339);
19565#line 301
19566                  __cil_tmp341 = (unsigned long )box;
19567#line 301
19568                  __cil_tmp342 = __cil_tmp341 + 8;
19569#line 301
19570                  __cil_tmp343 = *((uint32 *)__cil_tmp342);
19571#line 301
19572                  __cil_tmp344 = (unsigned long )box;
19573#line 301
19574                  __cil_tmp345 = __cil_tmp344 + 12;
19575#line 301
19576                  __cil_tmp346 = *((uint32 *)__cil_tmp345);
19577#line 301
19578                  __cil_tmp347 = (unsigned long )box;
19579#line 301
19580                  __cil_tmp348 = __cil_tmp347 + 16;
19581#line 301
19582                  __cil_tmp349 = *((uint32 *)__cil_tmp348);
19583#line 301
19584                  __cil_tmp350 = (unsigned long )box;
19585#line 301
19586                  __cil_tmp351 = __cil_tmp350 + 20;
19587#line 301
19588                  __cil_tmp352 = *((uint32 *)__cil_tmp351);
19589#line 301
19590                  __cil_tmp353 = 0 + 4;
19591#line 301
19592                  __cil_tmp354 = 0 + __cil_tmp353;
19593#line 301
19594                  __cil_tmp355 = 8 + __cil_tmp354;
19595#line 301
19596                  __cil_tmp356 = (unsigned long )cmd;
19597#line 301
19598                  __cil_tmp357 = __cil_tmp356 + __cil_tmp355;
19599#line 301
19600                  __cil_tmp358 = *((uint32 *)__cil_tmp357);
19601#line 301
19602                  drm_err("vmw_kms_cursor_snoop", "(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
19603                          __cil_tmp330, __cil_tmp333, __cil_tmp336, __cil_tmp337,
19604                          __cil_tmp340, __cil_tmp343, __cil_tmp346, __cil_tmp349,
19605                          __cil_tmp352, box_count, __cil_tmp358);
19606                  }
19607#line 306
19608                  return;
19609                } else {
19610
19611                }
19612                }
19613              }
19614              }
19615            }
19616            }
19617          }
19618          }
19619        }
19620        }
19621      }
19622      }
19623    }
19624    }
19625  }
19626  }
19627  {
19628#line 309
19629  __cil_tmp359 = 0 + 4;
19630#line 309
19631  __cil_tmp360 = 0 + __cil_tmp359;
19632#line 309
19633  __cil_tmp361 = 8 + __cil_tmp360;
19634#line 309
19635  __cil_tmp362 = (unsigned long )cmd;
19636#line 309
19637  __cil_tmp363 = __cil_tmp362 + __cil_tmp361;
19638#line 309
19639  __cil_tmp364 = *((uint32 *)__cil_tmp363);
19640#line 309
19641  __cil_tmp365 = __cil_tmp364 >> 12;
19642#line 309
19643  kmap_offset = (unsigned long )__cil_tmp365;
19644#line 310
19645  __cil_tmp366 = 16384 >> 12;
19646#line 310
19647  kmap_num = (unsigned long )__cil_tmp366;
19648#line 312
19649  __cil_tmp367 = (bool )1;
19650#line 312
19651  __cil_tmp368 = (bool )0;
19652#line 312
19653  __cil_tmp369 = (bool )0;
19654#line 312
19655  __cil_tmp370 = (uint32_t )0;
19656#line 312
19657  ret = ttm_bo_reserve(bo, __cil_tmp367, __cil_tmp368, __cil_tmp369, __cil_tmp370);
19658#line 313
19659  __cil_tmp371 = ret != 0;
19660#line 313
19661  __cil_tmp372 = ! __cil_tmp371;
19662#line 313
19663  __cil_tmp373 = ! __cil_tmp372;
19664#line 313
19665  __cil_tmp374 = (long )__cil_tmp373;
19666#line 313
19667  tmp___7 = __builtin_expect(__cil_tmp374, 0L);
19668  }
19669#line 313
19670  if (tmp___7) {
19671    {
19672#line 314
19673    drm_err("vmw_kms_cursor_snoop", "reserve failed\n");
19674    }
19675#line 315
19676    return;
19677  } else {
19678
19679  }
19680  {
19681#line 318
19682  ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, & map);
19683#line 319
19684  __cil_tmp375 = ret != 0;
19685#line 319
19686  __cil_tmp376 = ! __cil_tmp375;
19687#line 319
19688  __cil_tmp377 = ! __cil_tmp376;
19689#line 319
19690  __cil_tmp378 = (long )__cil_tmp377;
19691#line 319
19692  tmp___8 = __builtin_expect(__cil_tmp378, 0L);
19693  }
19694#line 319
19695  if (tmp___8) {
19696#line 320
19697    goto err_unreserve;
19698  } else {
19699
19700  }
19701  {
19702#line 322
19703  virtual = ttm_kmap_obj_virtual(& map, & dummy);
19704  }
19705  {
19706#line 324
19707  __cil_tmp379 = (unsigned long )box;
19708#line 324
19709  __cil_tmp380 = __cil_tmp379 + 12;
19710#line 324
19711  __cil_tmp381 = *((uint32 *)__cil_tmp380);
19712#line 324
19713  if (__cil_tmp381 == 64U) {
19714    {
19715#line 324
19716    __cil_tmp382 = 0 + 8;
19717#line 324
19718    __cil_tmp383 = 8 + __cil_tmp382;
19719#line 324
19720    __cil_tmp384 = (unsigned long )cmd;
19721#line 324
19722    __cil_tmp385 = __cil_tmp384 + __cil_tmp383;
19723#line 324
19724    __cil_tmp386 = *((uint32 *)__cil_tmp385);
19725#line 324
19726    if (__cil_tmp386 == 256U) {
19727#line 325
19728      __len = (size_t )16384;
19729#line 325
19730      if (__len >= 64UL) {
19731        {
19732#line 325
19733        __cil_tmp387 = 160 + 16;
19734#line 325
19735        __cil_tmp388 = (unsigned long )srf;
19736#line 325
19737        __cil_tmp389 = __cil_tmp388 + __cil_tmp387;
19738#line 325
19739        __cil_tmp390 = *((uint32_t **)__cil_tmp389);
19740#line 325
19741        __cil_tmp391 = (void *)__cil_tmp390;
19742#line 325
19743        __cil_tmp392 = (void    *)virtual;
19744#line 325
19745        __ret = __memcpy(__cil_tmp391, __cil_tmp392, __len);
19746        }
19747      } else {
19748        {
19749#line 325
19750        __cil_tmp393 = 160 + 16;
19751#line 325
19752        __cil_tmp394 = (unsigned long )srf;
19753#line 325
19754        __cil_tmp395 = __cil_tmp394 + __cil_tmp393;
19755#line 325
19756        __cil_tmp396 = *((uint32_t **)__cil_tmp395);
19757#line 325
19758        __cil_tmp397 = (void *)__cil_tmp396;
19759#line 325
19760        __cil_tmp398 = (void    *)virtual;
19761#line 325
19762        __ret = __builtin_memcpy(__cil_tmp397, __cil_tmp398, __len);
19763        }
19764      }
19765    } else {
19766#line 324
19767      goto _L;
19768    }
19769    }
19770  } else {
19771    _L: /* CIL Label */ 
19772#line 328
19773    i = 0;
19774    {
19775#line 328
19776    while (1) {
19777      while_continue: /* CIL Label */ ;
19778      {
19779#line 328
19780      __cil_tmp399 = (unsigned long )box;
19781#line 328
19782      __cil_tmp400 = __cil_tmp399 + 16;
19783#line 328
19784      __cil_tmp401 = *((uint32 *)__cil_tmp400);
19785#line 328
19786      __cil_tmp402 = (uint32 )i;
19787#line 328
19788      if (__cil_tmp402 < __cil_tmp401) {
19789
19790      } else {
19791#line 328
19792        goto while_break;
19793      }
19794      }
19795      {
19796#line 329
19797      __cil_tmp403 = (unsigned long )box;
19798#line 329
19799      __cil_tmp404 = __cil_tmp403 + 12;
19800#line 329
19801      __cil_tmp405 = *((uint32 *)__cil_tmp404);
19802#line 329
19803      __cil_tmp406 = __cil_tmp405 * 4U;
19804#line 329
19805      __len___0 = (size_t )__cil_tmp406;
19806#line 329
19807      __cil_tmp407 = i * 64;
19808#line 329
19809      __cil_tmp408 = 160 + 16;
19810#line 329
19811      __cil_tmp409 = (unsigned long )srf;
19812#line 329
19813      __cil_tmp410 = __cil_tmp409 + __cil_tmp408;
19814#line 329
19815      __cil_tmp411 = *((uint32_t **)__cil_tmp410);
19816#line 329
19817      __cil_tmp412 = __cil_tmp411 + __cil_tmp407;
19818#line 329
19819      __cil_tmp413 = (void *)__cil_tmp412;
19820#line 329
19821      __cil_tmp414 = 0 + 8;
19822#line 329
19823      __cil_tmp415 = 8 + __cil_tmp414;
19824#line 329
19825      __cil_tmp416 = (unsigned long )cmd;
19826#line 329
19827      __cil_tmp417 = __cil_tmp416 + __cil_tmp415;
19828#line 329
19829      __cil_tmp418 = *((uint32 *)__cil_tmp417);
19830#line 329
19831      __cil_tmp419 = (uint32 )i;
19832#line 329
19833      __cil_tmp420 = __cil_tmp419 * __cil_tmp418;
19834#line 329
19835      __cil_tmp421 = virtual + __cil_tmp420;
19836#line 329
19837      __cil_tmp422 = (void    *)__cil_tmp421;
19838#line 329
19839      __ret___0 = __builtin_memcpy(__cil_tmp413, __cil_tmp422, __len___0);
19840#line 328
19841      i = i + 1;
19842      }
19843    }
19844    while_break: /* CIL Label */ ;
19845    }
19846  }
19847  }
19848  {
19849#line 334
19850  __cil_tmp423 = 160 + 8;
19851#line 334
19852  __cil_tmp424 = (unsigned long )srf;
19853#line 334
19854  __cil_tmp425 = __cil_tmp424 + __cil_tmp423;
19855#line 334
19856  __cil_tmp426 = 160 + 8;
19857#line 334
19858  __cil_tmp427 = (unsigned long )srf;
19859#line 334
19860  __cil_tmp428 = __cil_tmp427 + __cil_tmp426;
19861#line 334
19862  __cil_tmp429 = *((size_t *)__cil_tmp428);
19863#line 334
19864  *((size_t *)__cil_tmp425) = __cil_tmp429 + 1UL;
19865#line 345
19866  ttm_bo_kunmap(& map);
19867  }
19868  err_unreserve: 
19869  {
19870#line 347
19871  ttm_bo_unreserve(bo);
19872  }
19873#line 348
19874  return;
19875}
19876}
19877#line 350 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
19878void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv ) 
19879{ struct drm_device *dev ;
19880  struct vmw_display_unit *du ;
19881  struct drm_crtc *crtc ;
19882  struct list_head    *__mptr ;
19883  struct list_head    *__mptr___0 ;
19884  struct drm_crtc    *__mptr___1 ;
19885  unsigned long __cil_tmp8 ;
19886  unsigned long __cil_tmp9 ;
19887  unsigned long __cil_tmp10 ;
19888  unsigned long __cil_tmp11 ;
19889  struct mutex *__cil_tmp12 ;
19890  unsigned long __cil_tmp13 ;
19891  unsigned long __cil_tmp14 ;
19892  unsigned long __cil_tmp15 ;
19893  struct list_head *__cil_tmp16 ;
19894  struct drm_crtc *__cil_tmp17 ;
19895  unsigned long __cil_tmp18 ;
19896  unsigned long __cil_tmp19 ;
19897  struct list_head *__cil_tmp20 ;
19898  unsigned int __cil_tmp21 ;
19899  char *__cil_tmp22 ;
19900  char *__cil_tmp23 ;
19901  unsigned long __cil_tmp24 ;
19902  unsigned long __cil_tmp25 ;
19903  unsigned long __cil_tmp26 ;
19904  struct list_head *__cil_tmp27 ;
19905  unsigned long __cil_tmp28 ;
19906  unsigned long __cil_tmp29 ;
19907  unsigned long __cil_tmp30 ;
19908  struct list_head *__cil_tmp31 ;
19909  unsigned long __cil_tmp32 ;
19910  struct vmw_display_unit *__cil_tmp33 ;
19911  struct drm_crtc *__cil_tmp34 ;
19912  unsigned int __cil_tmp35 ;
19913  char *__cil_tmp36 ;
19914  char *__cil_tmp37 ;
19915  unsigned long __cil_tmp38 ;
19916  unsigned long __cil_tmp39 ;
19917  struct vmw_surface *__cil_tmp40 ;
19918  unsigned long __cil_tmp41 ;
19919  unsigned long __cil_tmp42 ;
19920  unsigned long __cil_tmp43 ;
19921  struct vmw_surface *__cil_tmp44 ;
19922  unsigned long __cil_tmp45 ;
19923  unsigned long __cil_tmp46 ;
19924  size_t __cil_tmp47 ;
19925  unsigned long __cil_tmp48 ;
19926  unsigned long __cil_tmp49 ;
19927  size_t __cil_tmp50 ;
19928  unsigned long __cil_tmp51 ;
19929  unsigned long __cil_tmp52 ;
19930  unsigned long __cil_tmp53 ;
19931  unsigned long __cil_tmp54 ;
19932  unsigned long __cil_tmp55 ;
19933  struct vmw_surface *__cil_tmp56 ;
19934  unsigned long __cil_tmp57 ;
19935  unsigned long __cil_tmp58 ;
19936  unsigned long __cil_tmp59 ;
19937  unsigned long __cil_tmp60 ;
19938  unsigned long __cil_tmp61 ;
19939  struct vmw_surface *__cil_tmp62 ;
19940  unsigned long __cil_tmp63 ;
19941  unsigned long __cil_tmp64 ;
19942  uint32_t *__cil_tmp65 ;
19943  u32 __cil_tmp66 ;
19944  u32 __cil_tmp67 ;
19945  unsigned long __cil_tmp68 ;
19946  unsigned long __cil_tmp69 ;
19947  int __cil_tmp70 ;
19948  u32 __cil_tmp71 ;
19949  unsigned long __cil_tmp72 ;
19950  unsigned long __cil_tmp73 ;
19951  int __cil_tmp74 ;
19952  u32 __cil_tmp75 ;
19953  unsigned long __cil_tmp76 ;
19954  unsigned long __cil_tmp77 ;
19955  struct list_head *__cil_tmp78 ;
19956  struct drm_crtc *__cil_tmp79 ;
19957  unsigned long __cil_tmp80 ;
19958  unsigned long __cil_tmp81 ;
19959  struct list_head *__cil_tmp82 ;
19960  unsigned int __cil_tmp83 ;
19961  char *__cil_tmp84 ;
19962  char *__cil_tmp85 ;
19963  unsigned long __cil_tmp86 ;
19964  unsigned long __cil_tmp87 ;
19965  struct mutex *__cil_tmp88 ;
19966
19967  {
19968  {
19969#line 352
19970  __cil_tmp8 = (unsigned long )dev_priv;
19971#line 352
19972  __cil_tmp9 = __cil_tmp8 + 2088;
19973#line 352
19974  dev = *((struct drm_device **)__cil_tmp9);
19975#line 356
19976  __cil_tmp10 = (unsigned long )dev;
19977#line 356
19978  __cil_tmp11 = __cil_tmp10 + 1152;
19979#line 356
19980  __cil_tmp12 = (struct mutex *)__cil_tmp11;
19981#line 356
19982  mutex_lock(__cil_tmp12);
19983#line 358
19984  __cil_tmp13 = 1152 + 296;
19985#line 358
19986  __cil_tmp14 = (unsigned long )dev;
19987#line 358
19988  __cil_tmp15 = __cil_tmp14 + __cil_tmp13;
19989#line 358
19990  __cil_tmp16 = *((struct list_head **)__cil_tmp15);
19991#line 358
19992  __mptr = (struct list_head    *)__cil_tmp16;
19993#line 358
19994  __cil_tmp17 = (struct drm_crtc *)0;
19995#line 358
19996  __cil_tmp18 = (unsigned long )__cil_tmp17;
19997#line 358
19998  __cil_tmp19 = __cil_tmp18 + 8;
19999#line 358
20000  __cil_tmp20 = (struct list_head *)__cil_tmp19;
20001#line 358
20002  __cil_tmp21 = (unsigned int )__cil_tmp20;
20003#line 358
20004  __cil_tmp22 = (char *)__mptr;
20005#line 358
20006  __cil_tmp23 = __cil_tmp22 - __cil_tmp21;
20007#line 358
20008  crtc = (struct drm_crtc *)__cil_tmp23;
20009  }
20010  {
20011#line 358
20012  while (1) {
20013    while_continue: /* CIL Label */ ;
20014    {
20015#line 358
20016    __cil_tmp24 = 1152 + 296;
20017#line 358
20018    __cil_tmp25 = (unsigned long )dev;
20019#line 358
20020    __cil_tmp26 = __cil_tmp25 + __cil_tmp24;
20021#line 358
20022    __cil_tmp27 = (struct list_head *)__cil_tmp26;
20023#line 358
20024    __cil_tmp28 = (unsigned long )__cil_tmp27;
20025#line 358
20026    __cil_tmp29 = (unsigned long )crtc;
20027#line 358
20028    __cil_tmp30 = __cil_tmp29 + 8;
20029#line 358
20030    __cil_tmp31 = (struct list_head *)__cil_tmp30;
20031#line 358
20032    __cil_tmp32 = (unsigned long )__cil_tmp31;
20033#line 358
20034    if (__cil_tmp32 != __cil_tmp28) {
20035
20036    } else {
20037#line 358
20038      goto while_break;
20039    }
20040    }
20041#line 359
20042    __mptr___1 = (struct drm_crtc    *)crtc;
20043#line 359
20044    __cil_tmp33 = (struct vmw_display_unit *)0;
20045#line 359
20046    __cil_tmp34 = (struct drm_crtc *)__cil_tmp33;
20047#line 359
20048    __cil_tmp35 = (unsigned int )__cil_tmp34;
20049#line 359
20050    __cil_tmp36 = (char *)__mptr___1;
20051#line 359
20052    __cil_tmp37 = __cil_tmp36 - __cil_tmp35;
20053#line 359
20054    du = (struct vmw_display_unit *)__cil_tmp37;
20055    {
20056#line 360
20057    __cil_tmp38 = (unsigned long )du;
20058#line 360
20059    __cil_tmp39 = __cil_tmp38 + 1992;
20060#line 360
20061    __cil_tmp40 = *((struct vmw_surface **)__cil_tmp39);
20062#line 360
20063    if (! __cil_tmp40) {
20064#line 362
20065      goto __Cont;
20066    } else {
20067      {
20068#line 360
20069      __cil_tmp41 = 160 + 8;
20070#line 360
20071      __cil_tmp42 = (unsigned long )du;
20072#line 360
20073      __cil_tmp43 = __cil_tmp42 + 1992;
20074#line 360
20075      __cil_tmp44 = *((struct vmw_surface **)__cil_tmp43);
20076#line 360
20077      __cil_tmp45 = (unsigned long )__cil_tmp44;
20078#line 360
20079      __cil_tmp46 = __cil_tmp45 + __cil_tmp41;
20080#line 360
20081      __cil_tmp47 = *((size_t *)__cil_tmp46);
20082#line 360
20083      __cil_tmp48 = (unsigned long )du;
20084#line 360
20085      __cil_tmp49 = __cil_tmp48 + 2008;
20086#line 360
20087      __cil_tmp50 = *((size_t *)__cil_tmp49);
20088#line 360
20089      if (__cil_tmp50 == __cil_tmp47) {
20090#line 362
20091        goto __Cont;
20092      } else {
20093
20094      }
20095      }
20096    }
20097    }
20098    {
20099#line 364
20100    __cil_tmp51 = (unsigned long )du;
20101#line 364
20102    __cil_tmp52 = __cil_tmp51 + 2008;
20103#line 364
20104    __cil_tmp53 = 160 + 8;
20105#line 364
20106    __cil_tmp54 = (unsigned long )du;
20107#line 364
20108    __cil_tmp55 = __cil_tmp54 + 1992;
20109#line 364
20110    __cil_tmp56 = *((struct vmw_surface **)__cil_tmp55);
20111#line 364
20112    __cil_tmp57 = (unsigned long )__cil_tmp56;
20113#line 364
20114    __cil_tmp58 = __cil_tmp57 + __cil_tmp53;
20115#line 364
20116    *((size_t *)__cil_tmp52) = *((size_t *)__cil_tmp58);
20117#line 365
20118    __cil_tmp59 = 160 + 16;
20119#line 365
20120    __cil_tmp60 = (unsigned long )du;
20121#line 365
20122    __cil_tmp61 = __cil_tmp60 + 1992;
20123#line 365
20124    __cil_tmp62 = *((struct vmw_surface **)__cil_tmp61);
20125#line 365
20126    __cil_tmp63 = (unsigned long )__cil_tmp62;
20127#line 365
20128    __cil_tmp64 = __cil_tmp63 + __cil_tmp59;
20129#line 365
20130    __cil_tmp65 = *((uint32_t **)__cil_tmp64);
20131#line 365
20132    __cil_tmp66 = (u32 )64;
20133#line 365
20134    __cil_tmp67 = (u32 )64;
20135#line 365
20136    __cil_tmp68 = (unsigned long )du;
20137#line 365
20138    __cil_tmp69 = __cil_tmp68 + 2024;
20139#line 365
20140    __cil_tmp70 = *((int *)__cil_tmp69);
20141#line 365
20142    __cil_tmp71 = (u32 )__cil_tmp70;
20143#line 365
20144    __cil_tmp72 = (unsigned long )du;
20145#line 365
20146    __cil_tmp73 = __cil_tmp72 + 2028;
20147#line 365
20148    __cil_tmp74 = *((int *)__cil_tmp73);
20149#line 365
20150    __cil_tmp75 = (u32 )__cil_tmp74;
20151#line 365
20152    vmw_cursor_update_image(dev_priv, __cil_tmp65, __cil_tmp66, __cil_tmp67, __cil_tmp71,
20153                            __cil_tmp75);
20154    }
20155    __Cont: /* CIL Label */ 
20156#line 358
20157    __cil_tmp76 = (unsigned long )crtc;
20158#line 358
20159    __cil_tmp77 = __cil_tmp76 + 8;
20160#line 358
20161    __cil_tmp78 = *((struct list_head **)__cil_tmp77);
20162#line 358
20163    __mptr___0 = (struct list_head    *)__cil_tmp78;
20164#line 358
20165    __cil_tmp79 = (struct drm_crtc *)0;
20166#line 358
20167    __cil_tmp80 = (unsigned long )__cil_tmp79;
20168#line 358
20169    __cil_tmp81 = __cil_tmp80 + 8;
20170#line 358
20171    __cil_tmp82 = (struct list_head *)__cil_tmp81;
20172#line 358
20173    __cil_tmp83 = (unsigned int )__cil_tmp82;
20174#line 358
20175    __cil_tmp84 = (char *)__mptr___0;
20176#line 358
20177    __cil_tmp85 = __cil_tmp84 - __cil_tmp83;
20178#line 358
20179    crtc = (struct drm_crtc *)__cil_tmp85;
20180  }
20181  while_break: /* CIL Label */ ;
20182  }
20183  {
20184#line 370
20185  __cil_tmp86 = (unsigned long )dev;
20186#line 370
20187  __cil_tmp87 = __cil_tmp86 + 1152;
20188#line 370
20189  __cil_tmp88 = (struct mutex *)__cil_tmp87;
20190#line 370
20191  mutex_unlock(__cil_tmp88);
20192  }
20193#line 371
20194  return;
20195}
20196}
20197#line 377 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
20198int vmw_framebuffer_create_handle(struct drm_framebuffer *fb , struct drm_file *file_priv ,
20199                                  unsigned int *handle ) 
20200{ 
20201
20202  {
20203#line 381
20204  if (handle) {
20205#line 382
20206    *handle = 0U;
20207  } else {
20208
20209  }
20210#line 384
20211  return (0);
20212}
20213}
20214#line 402 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
20215void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer ) 
20216{ struct vmw_framebuffer_surface *vfbs ;
20217  struct drm_framebuffer    *__mptr ;
20218  struct vmw_master *vmaster ;
20219  struct vmw_master *tmp___7 ;
20220  struct vmw_framebuffer_surface *__cil_tmp6 ;
20221  struct drm_framebuffer *__cil_tmp7 ;
20222  unsigned int __cil_tmp8 ;
20223  char *__cil_tmp9 ;
20224  char *__cil_tmp10 ;
20225  unsigned long __cil_tmp11 ;
20226  unsigned long __cil_tmp12 ;
20227  struct drm_master *__cil_tmp13 ;
20228  unsigned long __cil_tmp14 ;
20229  unsigned long __cil_tmp15 ;
20230  struct mutex *__cil_tmp16 ;
20231  unsigned long __cil_tmp17 ;
20232  unsigned long __cil_tmp18 ;
20233  struct list_head *__cil_tmp19 ;
20234  unsigned long __cil_tmp20 ;
20235  unsigned long __cil_tmp21 ;
20236  struct mutex *__cil_tmp22 ;
20237  unsigned long __cil_tmp23 ;
20238  unsigned long __cil_tmp24 ;
20239  struct drm_master **__cil_tmp25 ;
20240  unsigned long __cil_tmp26 ;
20241  unsigned long __cil_tmp27 ;
20242  struct vmw_surface **__cil_tmp28 ;
20243  unsigned long __cil_tmp29 ;
20244  unsigned long __cil_tmp30 ;
20245  unsigned long __cil_tmp31 ;
20246  struct ttm_base_object **__cil_tmp32 ;
20247  void    *__cil_tmp33 ;
20248
20249  {
20250  {
20251#line 405
20252  __mptr = (struct drm_framebuffer    *)framebuffer;
20253#line 405
20254  __cil_tmp6 = (struct vmw_framebuffer_surface *)0;
20255#line 405
20256  __cil_tmp7 = (struct drm_framebuffer *)__cil_tmp6;
20257#line 405
20258  __cil_tmp8 = (unsigned int )__cil_tmp7;
20259#line 405
20260  __cil_tmp9 = (char *)__mptr;
20261#line 405
20262  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
20263#line 405
20264  vfbs = (struct vmw_framebuffer_surface *)__cil_tmp10;
20265#line 406
20266  __cil_tmp11 = (unsigned long )vfbs;
20267#line 406
20268  __cil_tmp12 = __cil_tmp11 + 192;
20269#line 406
20270  __cil_tmp13 = *((struct drm_master **)__cil_tmp12);
20271#line 406
20272  tmp___7 = vmw_master(__cil_tmp13);
20273#line 406
20274  vmaster = tmp___7;
20275#line 409
20276  __cil_tmp14 = (unsigned long )vmaster;
20277#line 409
20278  __cil_tmp15 = __cil_tmp14 + 152;
20279#line 409
20280  __cil_tmp16 = (struct mutex *)__cil_tmp15;
20281#line 409
20282  mutex_lock(__cil_tmp16);
20283#line 410
20284  __cil_tmp17 = (unsigned long )vfbs;
20285#line 410
20286  __cil_tmp18 = __cil_tmp17 + 176;
20287#line 410
20288  __cil_tmp19 = (struct list_head *)__cil_tmp18;
20289#line 410
20290  list_del(__cil_tmp19);
20291#line 411
20292  __cil_tmp20 = (unsigned long )vmaster;
20293#line 411
20294  __cil_tmp21 = __cil_tmp20 + 152;
20295#line 411
20296  __cil_tmp22 = (struct mutex *)__cil_tmp21;
20297#line 411
20298  mutex_unlock(__cil_tmp22);
20299#line 413
20300  __cil_tmp23 = (unsigned long )vfbs;
20301#line 413
20302  __cil_tmp24 = __cil_tmp23 + 192;
20303#line 413
20304  __cil_tmp25 = (struct drm_master **)__cil_tmp24;
20305#line 413
20306  drm_master_put(__cil_tmp25);
20307#line 414
20308  drm_framebuffer_cleanup(framebuffer);
20309#line 415
20310  __cil_tmp26 = (unsigned long )vfbs;
20311#line 415
20312  __cil_tmp27 = __cil_tmp26 + 160;
20313#line 415
20314  __cil_tmp28 = (struct vmw_surface **)__cil_tmp27;
20315#line 415
20316  vmw_surface_unreference(__cil_tmp28);
20317#line 416
20318  __cil_tmp29 = 0 + 144;
20319#line 416
20320  __cil_tmp30 = (unsigned long )vfbs;
20321#line 416
20322  __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
20323#line 416
20324  __cil_tmp32 = (struct ttm_base_object **)__cil_tmp31;
20325#line 416
20326  ttm_base_object_unref(__cil_tmp32);
20327#line 418
20328  __cil_tmp33 = (void    *)vfbs;
20329#line 418
20330  kfree(__cil_tmp33);
20331  }
20332#line 419
20333  return;
20334}
20335}
20336#line 421 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
20337static int do_surface_dirty_sou(struct vmw_private *dev_priv , struct drm_file *file_priv ,
20338                                struct vmw_framebuffer *framebuffer , unsigned int flags ,
20339                                unsigned int color , struct drm_clip_rect *clips ,
20340                                unsigned int num_clips , int inc , struct vmw_fence_obj **out_fence ) 
20341{ struct vmw_display_unit *units[8] ;
20342  struct drm_clip_rect *clips_ptr ;
20343  struct drm_clip_rect *tmp___7 ;
20344  struct drm_crtc *crtc ;
20345  size_t fifo_size ;
20346  int i ;
20347  int num_units ;
20348  int ret ;
20349  int left ;
20350  int right ;
20351  int top ;
20352  int bottom ;
20353  struct __anonstruct_cmd_430 *cmd ;
20354  SVGASignedRect *blits ;
20355  struct list_head    *__mptr ;
20356  struct list_head    *__mptr___0 ;
20357  int tmp___8 ;
20358  struct drm_crtc    *__mptr___1 ;
20359  int tmp___9 ;
20360  long tmp___10 ;
20361  void *tmp___11 ;
20362  long tmp___12 ;
20363  void *tmp___13 ;
20364  long tmp___14 ;
20365  int __min1 ;
20366  int __min2 ;
20367  int tmp___15 ;
20368  int __max1 ;
20369  int __max2 ;
20370  int tmp___16 ;
20371  int __min1___0 ;
20372  int __min2___0 ;
20373  int tmp___17 ;
20374  int __max1___0 ;
20375  int __max2___0 ;
20376  int tmp___18 ;
20377  struct vmw_display_unit *unit ;
20378  struct vmw_clip_rect clip ;
20379  int num ;
20380  long tmp___19 ;
20381  unsigned long __cil_tmp50 ;
20382  unsigned long __cil_tmp51 ;
20383  unsigned long __cil_tmp52 ;
20384  struct drm_device *__cil_tmp53 ;
20385  unsigned long __cil_tmp54 ;
20386  unsigned long __cil_tmp55 ;
20387  struct list_head *__cil_tmp56 ;
20388  struct drm_crtc *__cil_tmp57 ;
20389  unsigned long __cil_tmp58 ;
20390  unsigned long __cil_tmp59 ;
20391  struct list_head *__cil_tmp60 ;
20392  unsigned int __cil_tmp61 ;
20393  char *__cil_tmp62 ;
20394  char *__cil_tmp63 ;
20395  unsigned long __cil_tmp64 ;
20396  unsigned long __cil_tmp65 ;
20397  unsigned long __cil_tmp66 ;
20398  struct drm_device *__cil_tmp67 ;
20399  unsigned long __cil_tmp68 ;
20400  unsigned long __cil_tmp69 ;
20401  struct list_head *__cil_tmp70 ;
20402  unsigned long __cil_tmp71 ;
20403  unsigned long __cil_tmp72 ;
20404  unsigned long __cil_tmp73 ;
20405  struct list_head *__cil_tmp74 ;
20406  unsigned long __cil_tmp75 ;
20407  struct drm_framebuffer *__cil_tmp76 ;
20408  unsigned long __cil_tmp77 ;
20409  unsigned long __cil_tmp78 ;
20410  unsigned long __cil_tmp79 ;
20411  struct drm_framebuffer *__cil_tmp80 ;
20412  unsigned long __cil_tmp81 ;
20413  unsigned long __cil_tmp82 ;
20414  unsigned long __cil_tmp83 ;
20415  struct vmw_display_unit *__cil_tmp84 ;
20416  struct drm_crtc *__cil_tmp85 ;
20417  unsigned int __cil_tmp86 ;
20418  char *__cil_tmp87 ;
20419  char *__cil_tmp88 ;
20420  unsigned long __cil_tmp89 ;
20421  unsigned long __cil_tmp90 ;
20422  struct list_head *__cil_tmp91 ;
20423  struct drm_crtc *__cil_tmp92 ;
20424  unsigned long __cil_tmp93 ;
20425  unsigned long __cil_tmp94 ;
20426  struct list_head *__cil_tmp95 ;
20427  unsigned int __cil_tmp96 ;
20428  char *__cil_tmp97 ;
20429  char *__cil_tmp98 ;
20430  long __cil_tmp99 ;
20431  unsigned long __cil_tmp100 ;
20432  unsigned long __cil_tmp101 ;
20433  void *__cil_tmp102 ;
20434  unsigned long __cil_tmp103 ;
20435  unsigned long __cil_tmp104 ;
20436  int __cil_tmp105 ;
20437  int __cil_tmp106 ;
20438  int __cil_tmp107 ;
20439  long __cil_tmp108 ;
20440  unsigned long __cil_tmp109 ;
20441  unsigned long __cil_tmp110 ;
20442  void *__cil_tmp111 ;
20443  unsigned long __cil_tmp112 ;
20444  unsigned long __cil_tmp113 ;
20445  int __cil_tmp114 ;
20446  int __cil_tmp115 ;
20447  int __cil_tmp116 ;
20448  long __cil_tmp117 ;
20449  struct __anonstruct_cmd_430 *__cil_tmp118 ;
20450  unsigned short __cil_tmp119 ;
20451  unsigned long __cil_tmp120 ;
20452  unsigned long __cil_tmp121 ;
20453  unsigned short __cil_tmp122 ;
20454  unsigned long __cil_tmp123 ;
20455  unsigned long __cil_tmp124 ;
20456  unsigned short __cil_tmp125 ;
20457  unsigned long __cil_tmp126 ;
20458  unsigned long __cil_tmp127 ;
20459  unsigned short __cil_tmp128 ;
20460  unsigned int __cil_tmp129 ;
20461  unsigned short __cil_tmp130 ;
20462  unsigned long __cil_tmp131 ;
20463  unsigned long __cil_tmp132 ;
20464  unsigned short __cil_tmp133 ;
20465  unsigned long __cil_tmp134 ;
20466  unsigned long __cil_tmp135 ;
20467  unsigned short __cil_tmp136 ;
20468  unsigned long __cil_tmp137 ;
20469  unsigned long __cil_tmp138 ;
20470  unsigned short __cil_tmp139 ;
20471  void *__cil_tmp140 ;
20472  unsigned long __cil_tmp141 ;
20473  unsigned long __cil_tmp142 ;
20474  unsigned long __cil_tmp143 ;
20475  size_t __cil_tmp144 ;
20476  unsigned long __cil_tmp145 ;
20477  unsigned long __cil_tmp146 ;
20478  unsigned long __cil_tmp147 ;
20479  unsigned long __cil_tmp148 ;
20480  unsigned long __cil_tmp149 ;
20481  unsigned long __cil_tmp150 ;
20482  unsigned long __cil_tmp151 ;
20483  unsigned long __cil_tmp152 ;
20484  unsigned long __cil_tmp153 ;
20485  unsigned long __cil_tmp154 ;
20486  unsigned long __cil_tmp155 ;
20487  unsigned long __cil_tmp156 ;
20488  unsigned long __cil_tmp157 ;
20489  unsigned long __cil_tmp158 ;
20490  unsigned long __cil_tmp159 ;
20491  unsigned int __cil_tmp160 ;
20492  struct drm_clip_rect *__cil_tmp161 ;
20493  unsigned short __cil_tmp162 ;
20494  int __cil_tmp163 ;
20495  int __cil_tmp164 ;
20496  struct drm_clip_rect *__cil_tmp165 ;
20497  unsigned long __cil_tmp166 ;
20498  unsigned long __cil_tmp167 ;
20499  unsigned long __cil_tmp168 ;
20500  unsigned long __cil_tmp169 ;
20501  unsigned short __cil_tmp170 ;
20502  int __cil_tmp171 ;
20503  int __cil_tmp172 ;
20504  struct drm_clip_rect *__cil_tmp173 ;
20505  unsigned long __cil_tmp174 ;
20506  unsigned long __cil_tmp175 ;
20507  unsigned long __cil_tmp176 ;
20508  unsigned long __cil_tmp177 ;
20509  unsigned short __cil_tmp178 ;
20510  int __cil_tmp179 ;
20511  int __cil_tmp180 ;
20512  struct drm_clip_rect *__cil_tmp181 ;
20513  unsigned long __cil_tmp182 ;
20514  unsigned long __cil_tmp183 ;
20515  unsigned long __cil_tmp184 ;
20516  unsigned long __cil_tmp185 ;
20517  unsigned short __cil_tmp186 ;
20518  int __cil_tmp187 ;
20519  int __cil_tmp188 ;
20520  unsigned long __cil_tmp189 ;
20521  unsigned long __cil_tmp190 ;
20522  unsigned long __cil_tmp191 ;
20523  unsigned long __cil_tmp192 ;
20524  unsigned long __cil_tmp193 ;
20525  int __cil_tmp194 ;
20526  unsigned long __cil_tmp195 ;
20527  unsigned long __cil_tmp196 ;
20528  unsigned long __cil_tmp197 ;
20529  int __cil_tmp198 ;
20530  unsigned long __cil_tmp199 ;
20531  unsigned long __cil_tmp200 ;
20532  unsigned long __cil_tmp201 ;
20533  int __cil_tmp202 ;
20534  unsigned long __cil_tmp203 ;
20535  unsigned long __cil_tmp204 ;
20536  unsigned long __cil_tmp205 ;
20537  int __cil_tmp206 ;
20538  unsigned long __cil_tmp207 ;
20539  unsigned long __cil_tmp208 ;
20540  unsigned long __cil_tmp209 ;
20541  unsigned long __cil_tmp210 ;
20542  int __cil_tmp211 ;
20543  unsigned long __cil_tmp212 ;
20544  unsigned long __cil_tmp213 ;
20545  unsigned long __cil_tmp214 ;
20546  unsigned long __cil_tmp215 ;
20547  int __cil_tmp216 ;
20548  unsigned long __cil_tmp217 ;
20549  unsigned long __cil_tmp218 ;
20550  unsigned long __cil_tmp219 ;
20551  unsigned long __cil_tmp220 ;
20552  unsigned long __cil_tmp221 ;
20553  unsigned long __cil_tmp222 ;
20554  unsigned long __cil_tmp223 ;
20555  unsigned long __cil_tmp224 ;
20556  unsigned long __cil_tmp225 ;
20557  unsigned long __cil_tmp226 ;
20558  unsigned long __cil_tmp227 ;
20559  unsigned long __cil_tmp228 ;
20560  unsigned long __cil_tmp229 ;
20561  unsigned long __cil_tmp230 ;
20562  unsigned long __cil_tmp231 ;
20563  unsigned long __cil_tmp232 ;
20564  unsigned long __cil_tmp233 ;
20565  unsigned long __cil_tmp234 ;
20566  unsigned long __cil_tmp235 ;
20567  int __cil_tmp236 ;
20568  unsigned long __cil_tmp237 ;
20569  unsigned long __cil_tmp238 ;
20570  unsigned long __cil_tmp239 ;
20571  unsigned long __cil_tmp240 ;
20572  int __cil_tmp241 ;
20573  unsigned long __cil_tmp242 ;
20574  unsigned long __cil_tmp243 ;
20575  unsigned long __cil_tmp244 ;
20576  unsigned long __cil_tmp245 ;
20577  unsigned long __cil_tmp246 ;
20578  unsigned long __cil_tmp247 ;
20579  unsigned long __cil_tmp248 ;
20580  unsigned long __cil_tmp249 ;
20581  unsigned long __cil_tmp250 ;
20582  int __cil_tmp251 ;
20583  int *__cil_tmp252 ;
20584  int __cil_tmp253 ;
20585  int *__cil_tmp254 ;
20586  int __cil_tmp255 ;
20587  unsigned long __cil_tmp256 ;
20588  unsigned long __cil_tmp257 ;
20589  unsigned long __cil_tmp258 ;
20590  unsigned long __cil_tmp259 ;
20591  unsigned long __cil_tmp260 ;
20592  size_t __cil_tmp261 ;
20593  void *__cil_tmp262 ;
20594  void *__cil_tmp263 ;
20595  uint32_t __cil_tmp264 ;
20596  uint64_t __cil_tmp265 ;
20597  void *__cil_tmp266 ;
20598  struct drm_vmw_fence_rep *__cil_tmp267 ;
20599  int __cil_tmp268 ;
20600  int __cil_tmp269 ;
20601  int __cil_tmp270 ;
20602  long __cil_tmp271 ;
20603  void    *__cil_tmp272 ;
20604  void    *__cil_tmp273 ;
20605  int clip_y2274 ;
20606  int clip_y1275 ;
20607  int clip_x2276 ;
20608  int clip_x1277 ;
20609
20610  {
20611#line 435
20612  ret = 0;
20613#line 444
20614  num_units = 0;
20615#line 445
20616  __cil_tmp50 = 1152 + 296;
20617#line 445
20618  __cil_tmp51 = (unsigned long )dev_priv;
20619#line 445
20620  __cil_tmp52 = __cil_tmp51 + 2088;
20621#line 445
20622  __cil_tmp53 = *((struct drm_device **)__cil_tmp52);
20623#line 445
20624  __cil_tmp54 = (unsigned long )__cil_tmp53;
20625#line 445
20626  __cil_tmp55 = __cil_tmp54 + __cil_tmp50;
20627#line 445
20628  __cil_tmp56 = *((struct list_head **)__cil_tmp55);
20629#line 445
20630  __mptr = (struct list_head    *)__cil_tmp56;
20631#line 445
20632  __cil_tmp57 = (struct drm_crtc *)0;
20633#line 445
20634  __cil_tmp58 = (unsigned long )__cil_tmp57;
20635#line 445
20636  __cil_tmp59 = __cil_tmp58 + 8;
20637#line 445
20638  __cil_tmp60 = (struct list_head *)__cil_tmp59;
20639#line 445
20640  __cil_tmp61 = (unsigned int )__cil_tmp60;
20641#line 445
20642  __cil_tmp62 = (char *)__mptr;
20643#line 445
20644  __cil_tmp63 = __cil_tmp62 - __cil_tmp61;
20645#line 445
20646  crtc = (struct drm_crtc *)__cil_tmp63;
20647  {
20648#line 445
20649  while (1) {
20650    while_continue: /* CIL Label */ ;
20651    {
20652#line 445
20653    __cil_tmp64 = 1152 + 296;
20654#line 445
20655    __cil_tmp65 = (unsigned long )dev_priv;
20656#line 445
20657    __cil_tmp66 = __cil_tmp65 + 2088;
20658#line 445
20659    __cil_tmp67 = *((struct drm_device **)__cil_tmp66);
20660#line 445
20661    __cil_tmp68 = (unsigned long )__cil_tmp67;
20662#line 445
20663    __cil_tmp69 = __cil_tmp68 + __cil_tmp64;
20664#line 445
20665    __cil_tmp70 = (struct list_head *)__cil_tmp69;
20666#line 445
20667    __cil_tmp71 = (unsigned long )__cil_tmp70;
20668#line 445
20669    __cil_tmp72 = (unsigned long )crtc;
20670#line 445
20671    __cil_tmp73 = __cil_tmp72 + 8;
20672#line 445
20673    __cil_tmp74 = (struct list_head *)__cil_tmp73;
20674#line 445
20675    __cil_tmp75 = (unsigned long )__cil_tmp74;
20676#line 445
20677    if (__cil_tmp75 != __cil_tmp71) {
20678
20679    } else {
20680#line 445
20681      goto while_break;
20682    }
20683    }
20684    {
20685#line 447
20686    __cil_tmp76 = (struct drm_framebuffer *)framebuffer;
20687#line 447
20688    __cil_tmp77 = (unsigned long )__cil_tmp76;
20689#line 447
20690    __cil_tmp78 = (unsigned long )crtc;
20691#line 447
20692    __cil_tmp79 = __cil_tmp78 + 32;
20693#line 447
20694    __cil_tmp80 = *((struct drm_framebuffer **)__cil_tmp79);
20695#line 447
20696    __cil_tmp81 = (unsigned long )__cil_tmp80;
20697#line 447
20698    if (__cil_tmp81 != __cil_tmp77) {
20699#line 448
20700      goto __Cont;
20701    } else {
20702
20703    }
20704    }
20705#line 449
20706    tmp___8 = num_units;
20707#line 449
20708    num_units = num_units + 1;
20709#line 449
20710    __mptr___1 = (struct drm_crtc    *)crtc;
20711#line 449
20712    __cil_tmp82 = tmp___8 * 8UL;
20713#line 449
20714    __cil_tmp83 = (unsigned long )(units) + __cil_tmp82;
20715#line 449
20716    __cil_tmp84 = (struct vmw_display_unit *)0;
20717#line 449
20718    __cil_tmp85 = (struct drm_crtc *)__cil_tmp84;
20719#line 449
20720    __cil_tmp86 = (unsigned int )__cil_tmp85;
20721#line 449
20722    __cil_tmp87 = (char *)__mptr___1;
20723#line 449
20724    __cil_tmp88 = __cil_tmp87 - __cil_tmp86;
20725#line 449
20726    *((struct vmw_display_unit **)__cil_tmp83) = (struct vmw_display_unit *)__cil_tmp88;
20727    __Cont: /* CIL Label */ 
20728#line 445
20729    __cil_tmp89 = (unsigned long )crtc;
20730#line 445
20731    __cil_tmp90 = __cil_tmp89 + 8;
20732#line 445
20733    __cil_tmp91 = *((struct list_head **)__cil_tmp90);
20734#line 445
20735    __mptr___0 = (struct list_head    *)__cil_tmp91;
20736#line 445
20737    __cil_tmp92 = (struct drm_crtc *)0;
20738#line 445
20739    __cil_tmp93 = (unsigned long )__cil_tmp92;
20740#line 445
20741    __cil_tmp94 = __cil_tmp93 + 8;
20742#line 445
20743    __cil_tmp95 = (struct list_head *)__cil_tmp94;
20744#line 445
20745    __cil_tmp96 = (unsigned int )__cil_tmp95;
20746#line 445
20747    __cil_tmp97 = (char *)__mptr___0;
20748#line 445
20749    __cil_tmp98 = __cil_tmp97 - __cil_tmp96;
20750#line 445
20751    crtc = (struct drm_crtc *)__cil_tmp98;
20752  }
20753  while_break: /* CIL Label */ ;
20754  }
20755  {
20756#line 452
20757  while (1) {
20758    while_continue___0: /* CIL Label */ ;
20759#line 452
20760    if (! clips) {
20761#line 452
20762      tmp___9 = 1;
20763    } else
20764#line 452
20765    if (! num_clips) {
20766#line 452
20767      tmp___9 = 1;
20768    } else {
20769#line 452
20770      tmp___9 = 0;
20771    }
20772    {
20773#line 452
20774    __cil_tmp99 = (long )tmp___9;
20775#line 452
20776    tmp___10 = __builtin_expect(__cil_tmp99, 0L);
20777    }
20778#line 452
20779    if (tmp___10) {
20780      {
20781#line 452
20782      while (1) {
20783        while_continue___1: /* CIL Label */ ;
20784#line 452
20785        __asm__  volatile   ("1:\tud2\n"
20786                             ".pushsection __bug_table,\"a\"\n"
20787                             "2:\t.long 1b - 2b, %c0 - 2b\n"
20788                             "\t.word %c1, 0\n"
20789                             "\t.org 2b+%c2\n"
20790                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
20791                             "i" (452), "i" (12UL));
20792        {
20793#line 452
20794        while (1) {
20795          while_continue___2: /* CIL Label */ ;
20796        }
20797        while_break___2: /* CIL Label */ ;
20798        }
20799#line 452
20800        goto while_break___1;
20801      }
20802      while_break___1: /* CIL Label */ ;
20803      }
20804    } else {
20805
20806    }
20807#line 452
20808    goto while_break___0;
20809  }
20810  while_break___0: /* CIL Label */ ;
20811  }
20812  {
20813#line 454
20814  __cil_tmp100 = (unsigned long )num_clips;
20815#line 454
20816  __cil_tmp101 = 8UL * __cil_tmp100;
20817#line 454
20818  tmp___11 = kzalloc(__cil_tmp101, 208U);
20819#line 454
20820  tmp___7 = (struct drm_clip_rect *)tmp___11;
20821#line 455
20822  __cil_tmp102 = (void *)0;
20823#line 455
20824  __cil_tmp103 = (unsigned long )__cil_tmp102;
20825#line 455
20826  __cil_tmp104 = (unsigned long )tmp___7;
20827#line 455
20828  __cil_tmp105 = __cil_tmp104 == __cil_tmp103;
20829#line 455
20830  __cil_tmp106 = ! __cil_tmp105;
20831#line 455
20832  __cil_tmp107 = ! __cil_tmp106;
20833#line 455
20834  __cil_tmp108 = (long )__cil_tmp107;
20835#line 455
20836  tmp___12 = __builtin_expect(__cil_tmp108, 0L);
20837  }
20838#line 455
20839  if (tmp___12) {
20840    {
20841#line 456
20842    drm_err("do_surface_dirty_sou", "Temporary cliprect memory alloc failed.\n");
20843    }
20844#line 457
20845    return (-12);
20846  } else {
20847
20848  }
20849  {
20850#line 460
20851  __cil_tmp109 = (unsigned long )num_clips;
20852#line 460
20853  __cil_tmp110 = 16UL * __cil_tmp109;
20854#line 460
20855  fifo_size = 56UL + __cil_tmp110;
20856#line 461
20857  tmp___13 = kzalloc(fifo_size, 208U);
20858#line 461
20859  cmd = (struct __anonstruct_cmd_430 *)tmp___13;
20860#line 462
20861  __cil_tmp111 = (void *)0;
20862#line 462
20863  __cil_tmp112 = (unsigned long )__cil_tmp111;
20864#line 462
20865  __cil_tmp113 = (unsigned long )cmd;
20866#line 462
20867  __cil_tmp114 = __cil_tmp113 == __cil_tmp112;
20868#line 462
20869  __cil_tmp115 = ! __cil_tmp114;
20870#line 462
20871  __cil_tmp116 = ! __cil_tmp115;
20872#line 462
20873  __cil_tmp117 = (long )__cil_tmp116;
20874#line 462
20875  tmp___14 = __builtin_expect(__cil_tmp117, 0L);
20876  }
20877#line 462
20878  if (tmp___14) {
20879    {
20880#line 463
20881    drm_err("do_surface_dirty_sou", "Temporary fifo memory alloc failed.\n");
20882#line 464
20883    ret = -12;
20884    }
20885#line 465
20886    goto out_free_tmp;
20887  } else {
20888
20889  }
20890#line 469
20891  __cil_tmp118 = cmd + 1;
20892#line 469
20893  blits = (SVGASignedRect *)__cil_tmp118;
20894#line 472
20895  __cil_tmp119 = *((unsigned short *)clips);
20896#line 472
20897  left = (int )__cil_tmp119;
20898#line 473
20899  __cil_tmp120 = (unsigned long )clips;
20900#line 473
20901  __cil_tmp121 = __cil_tmp120 + 4;
20902#line 473
20903  __cil_tmp122 = *((unsigned short *)__cil_tmp121);
20904#line 473
20905  right = (int )__cil_tmp122;
20906#line 474
20907  __cil_tmp123 = (unsigned long )clips;
20908#line 474
20909  __cil_tmp124 = __cil_tmp123 + 2;
20910#line 474
20911  __cil_tmp125 = *((unsigned short *)__cil_tmp124);
20912#line 474
20913  top = (int )__cil_tmp125;
20914#line 475
20915  __cil_tmp126 = (unsigned long )clips;
20916#line 475
20917  __cil_tmp127 = __cil_tmp126 + 6;
20918#line 475
20919  __cil_tmp128 = *((unsigned short *)__cil_tmp127);
20920#line 475
20921  bottom = (int )__cil_tmp128;
20922#line 478
20923  i = 1;
20924#line 478
20925  clips_ptr = clips + inc;
20926  {
20927#line 478
20928  while (1) {
20929    while_continue___3: /* CIL Label */ ;
20930    {
20931#line 478
20932    __cil_tmp129 = (unsigned int )i;
20933#line 478
20934    if (__cil_tmp129 < num_clips) {
20935
20936    } else {
20937#line 478
20938      goto while_break___3;
20939    }
20940    }
20941#line 480
20942    __min1 = left;
20943#line 480
20944    __cil_tmp130 = *((unsigned short *)clips_ptr);
20945#line 480
20946    __min2 = (int )__cil_tmp130;
20947#line 480
20948    if (__min1 < __min2) {
20949#line 480
20950      tmp___15 = __min1;
20951    } else {
20952#line 480
20953      tmp___15 = __min2;
20954    }
20955#line 480
20956    left = tmp___15;
20957#line 481
20958    __max1 = right;
20959#line 481
20960    __cil_tmp131 = (unsigned long )clips_ptr;
20961#line 481
20962    __cil_tmp132 = __cil_tmp131 + 4;
20963#line 481
20964    __cil_tmp133 = *((unsigned short *)__cil_tmp132);
20965#line 481
20966    __max2 = (int )__cil_tmp133;
20967#line 481
20968    if (__max1 > __max2) {
20969#line 481
20970      tmp___16 = __max1;
20971    } else {
20972#line 481
20973      tmp___16 = __max2;
20974    }
20975#line 481
20976    right = tmp___16;
20977#line 482
20978    __min1___0 = top;
20979#line 482
20980    __cil_tmp134 = (unsigned long )clips_ptr;
20981#line 482
20982    __cil_tmp135 = __cil_tmp134 + 2;
20983#line 482
20984    __cil_tmp136 = *((unsigned short *)__cil_tmp135);
20985#line 482
20986    __min2___0 = (int )__cil_tmp136;
20987#line 482
20988    if (__min1___0 < __min2___0) {
20989#line 482
20990      tmp___17 = __min1___0;
20991    } else {
20992#line 482
20993      tmp___17 = __min2___0;
20994    }
20995#line 482
20996    top = tmp___17;
20997#line 483
20998    __max1___0 = bottom;
20999#line 483
21000    __cil_tmp137 = (unsigned long )clips_ptr;
21001#line 483
21002    __cil_tmp138 = __cil_tmp137 + 6;
21003#line 483
21004    __cil_tmp139 = *((unsigned short *)__cil_tmp138);
21005#line 483
21006    __max2___0 = (int )__cil_tmp139;
21007#line 483
21008    if (__max1___0 > __max2___0) {
21009#line 483
21010      tmp___18 = __max1___0;
21011    } else {
21012#line 483
21013      tmp___18 = __max2___0;
21014    }
21015#line 483
21016    bottom = tmp___18;
21017#line 478
21018    i = i + 1;
21019#line 478
21020    clips_ptr = clips_ptr + inc;
21021  }
21022  while_break___3: /* CIL Label */ ;
21023  }
21024  {
21025#line 487
21026  __cil_tmp140 = (void *)cmd;
21027#line 487
21028  memset(__cil_tmp140, 0, fifo_size);
21029#line 488
21030  *((uint32 *)cmd) = (__u32 )1069;
21031#line 489
21032  __cil_tmp141 = 0 + 4;
21033#line 489
21034  __cil_tmp142 = (unsigned long )cmd;
21035#line 489
21036  __cil_tmp143 = __cil_tmp142 + __cil_tmp141;
21037#line 489
21038  __cil_tmp144 = fifo_size - 8UL;
21039#line 489
21040  *((uint32 *)__cil_tmp143) = (__u32 )__cil_tmp144;
21041#line 491
21042  __cil_tmp145 = 8 + 12;
21043#line 491
21044  __cil_tmp146 = (unsigned long )cmd;
21045#line 491
21046  __cil_tmp147 = __cil_tmp146 + __cil_tmp145;
21047#line 491
21048  *((int32 *)__cil_tmp147) = left;
21049#line 492
21050  __cil_tmp148 = 12 + 8;
21051#line 492
21052  __cil_tmp149 = 8 + __cil_tmp148;
21053#line 492
21054  __cil_tmp150 = (unsigned long )cmd;
21055#line 492
21056  __cil_tmp151 = __cil_tmp150 + __cil_tmp149;
21057#line 492
21058  *((int32 *)__cil_tmp151) = right;
21059#line 493
21060  __cil_tmp152 = 12 + 4;
21061#line 493
21062  __cil_tmp153 = 8 + __cil_tmp152;
21063#line 493
21064  __cil_tmp154 = (unsigned long )cmd;
21065#line 493
21066  __cil_tmp155 = __cil_tmp154 + __cil_tmp153;
21067#line 493
21068  *((int32 *)__cil_tmp155) = top;
21069#line 494
21070  __cil_tmp156 = 12 + 12;
21071#line 494
21072  __cil_tmp157 = 8 + __cil_tmp156;
21073#line 494
21074  __cil_tmp158 = (unsigned long )cmd;
21075#line 494
21076  __cil_tmp159 = __cil_tmp158 + __cil_tmp157;
21077#line 494
21078  *((int32 *)__cil_tmp159) = bottom;
21079#line 496
21080  clips_ptr = clips;
21081#line 497
21082  i = 0;
21083  }
21084  {
21085#line 497
21086  while (1) {
21087    while_continue___4: /* CIL Label */ ;
21088    {
21089#line 497
21090    __cil_tmp160 = (unsigned int )i;
21091#line 497
21092    if (__cil_tmp160 < num_clips) {
21093
21094    } else {
21095#line 497
21096      goto while_break___4;
21097    }
21098    }
21099#line 498
21100    __cil_tmp161 = tmp___7 + i;
21101#line 498
21102    __cil_tmp162 = *((unsigned short *)clips_ptr);
21103#line 498
21104    __cil_tmp163 = (int )__cil_tmp162;
21105#line 498
21106    __cil_tmp164 = __cil_tmp163 - left;
21107#line 498
21108    *((unsigned short *)__cil_tmp161) = (unsigned short )__cil_tmp164;
21109#line 499
21110    __cil_tmp165 = tmp___7 + i;
21111#line 499
21112    __cil_tmp166 = (unsigned long )__cil_tmp165;
21113#line 499
21114    __cil_tmp167 = __cil_tmp166 + 4;
21115#line 499
21116    __cil_tmp168 = (unsigned long )clips_ptr;
21117#line 499
21118    __cil_tmp169 = __cil_tmp168 + 4;
21119#line 499
21120    __cil_tmp170 = *((unsigned short *)__cil_tmp169);
21121#line 499
21122    __cil_tmp171 = (int )__cil_tmp170;
21123#line 499
21124    __cil_tmp172 = __cil_tmp171 - left;
21125#line 499
21126    *((unsigned short *)__cil_tmp167) = (unsigned short )__cil_tmp172;
21127#line 500
21128    __cil_tmp173 = tmp___7 + i;
21129#line 500
21130    __cil_tmp174 = (unsigned long )__cil_tmp173;
21131#line 500
21132    __cil_tmp175 = __cil_tmp174 + 2;
21133#line 500
21134    __cil_tmp176 = (unsigned long )clips_ptr;
21135#line 500
21136    __cil_tmp177 = __cil_tmp176 + 2;
21137#line 500
21138    __cil_tmp178 = *((unsigned short *)__cil_tmp177);
21139#line 500
21140    __cil_tmp179 = (int )__cil_tmp178;
21141#line 500
21142    __cil_tmp180 = __cil_tmp179 - top;
21143#line 500
21144    *((unsigned short *)__cil_tmp175) = (unsigned short )__cil_tmp180;
21145#line 501
21146    __cil_tmp181 = tmp___7 + i;
21147#line 501
21148    __cil_tmp182 = (unsigned long )__cil_tmp181;
21149#line 501
21150    __cil_tmp183 = __cil_tmp182 + 6;
21151#line 501
21152    __cil_tmp184 = (unsigned long )clips_ptr;
21153#line 501
21154    __cil_tmp185 = __cil_tmp184 + 6;
21155#line 501
21156    __cil_tmp186 = *((unsigned short *)__cil_tmp185);
21157#line 501
21158    __cil_tmp187 = (int )__cil_tmp186;
21159#line 501
21160    __cil_tmp188 = __cil_tmp187 - top;
21161#line 501
21162    *((unsigned short *)__cil_tmp183) = (unsigned short )__cil_tmp188;
21163#line 497
21164    i = i + 1;
21165#line 497
21166    clips_ptr = clips_ptr + inc;
21167  }
21168  while_break___4: /* CIL Label */ ;
21169  }
21170#line 505
21171  i = 0;
21172  {
21173#line 505
21174  while (1) {
21175    while_continue___5: /* CIL Label */ ;
21176#line 505
21177    if (i < num_units) {
21178
21179    } else {
21180#line 505
21181      goto while_break___5;
21182    }
21183#line 506
21184    __cil_tmp189 = i * 8UL;
21185#line 506
21186    __cil_tmp190 = (unsigned long )(units) + __cil_tmp189;
21187#line 506
21188    unit = *((struct vmw_display_unit **)__cil_tmp190);
21189#line 510
21190    __cil_tmp191 = 0 + 480;
21191#line 510
21192    __cil_tmp192 = (unsigned long )unit;
21193#line 510
21194    __cil_tmp193 = __cil_tmp192 + __cil_tmp191;
21195#line 510
21196    __cil_tmp194 = *((int *)__cil_tmp193);
21197#line 510
21198    clip_x1277 = left - __cil_tmp194;
21199#line 511
21200    __cil_tmp195 = 0 + 484;
21201#line 511
21202    __cil_tmp196 = (unsigned long )unit;
21203#line 511
21204    __cil_tmp197 = __cil_tmp196 + __cil_tmp195;
21205#line 511
21206    __cil_tmp198 = *((int *)__cil_tmp197);
21207#line 511
21208    clip_y1275 = top - __cil_tmp198;
21209#line 512
21210    __cil_tmp199 = 0 + 480;
21211#line 512
21212    __cil_tmp200 = (unsigned long )unit;
21213#line 512
21214    __cil_tmp201 = __cil_tmp200 + __cil_tmp199;
21215#line 512
21216    __cil_tmp202 = *((int *)__cil_tmp201);
21217#line 512
21218    clip_x2276 = right - __cil_tmp202;
21219#line 513
21220    __cil_tmp203 = 0 + 484;
21221#line 513
21222    __cil_tmp204 = (unsigned long )unit;
21223#line 513
21224    __cil_tmp205 = __cil_tmp204 + __cil_tmp203;
21225#line 513
21226    __cil_tmp206 = *((int *)__cil_tmp205);
21227#line 513
21228    clip_y2274 = bottom - __cil_tmp206;
21229    {
21230#line 516
21231    __cil_tmp207 = 48 + 68;
21232#line 516
21233    __cil_tmp208 = 0 + __cil_tmp207;
21234#line 516
21235    __cil_tmp209 = (unsigned long )unit;
21236#line 516
21237    __cil_tmp210 = __cil_tmp209 + __cil_tmp208;
21238#line 516
21239    __cil_tmp211 = *((int *)__cil_tmp210);
21240#line 516
21241    if (clip_x1277 >= __cil_tmp211) {
21242#line 519
21243      goto __Cont___0;
21244    } else {
21245      {
21246#line 516
21247      __cil_tmp212 = 48 + 88;
21248#line 516
21249      __cil_tmp213 = 0 + __cil_tmp212;
21250#line 516
21251      __cil_tmp214 = (unsigned long )unit;
21252#line 516
21253      __cil_tmp215 = __cil_tmp214 + __cil_tmp213;
21254#line 516
21255      __cil_tmp216 = *((int *)__cil_tmp215);
21256#line 516
21257      if (clip_y1275 >= __cil_tmp216) {
21258#line 519
21259        goto __Cont___0;
21260      } else
21261#line 516
21262      if (clip_x2276 <= 0) {
21263#line 519
21264        goto __Cont___0;
21265      } else
21266#line 516
21267      if (clip_y2274 <= 0) {
21268#line 519
21269        goto __Cont___0;
21270      } else {
21271
21272      }
21273      }
21274    }
21275    }
21276    {
21277#line 525
21278    __cil_tmp217 = 8 + 32;
21279#line 525
21280    __cil_tmp218 = (unsigned long )cmd;
21281#line 525
21282    __cil_tmp219 = __cil_tmp218 + __cil_tmp217;
21283#line 525
21284    *((int32 *)__cil_tmp219) = clip_x1277;
21285#line 526
21286    __cil_tmp220 = 32 + 8;
21287#line 526
21288    __cil_tmp221 = 8 + __cil_tmp220;
21289#line 526
21290    __cil_tmp222 = (unsigned long )cmd;
21291#line 526
21292    __cil_tmp223 = __cil_tmp222 + __cil_tmp221;
21293#line 526
21294    *((int32 *)__cil_tmp223) = clip_x2276;
21295#line 527
21296    __cil_tmp224 = 32 + 4;
21297#line 527
21298    __cil_tmp225 = 8 + __cil_tmp224;
21299#line 527
21300    __cil_tmp226 = (unsigned long )cmd;
21301#line 527
21302    __cil_tmp227 = __cil_tmp226 + __cil_tmp225;
21303#line 527
21304    *((int32 *)__cil_tmp227) = clip_y1275;
21305#line 528
21306    __cil_tmp228 = 32 + 12;
21307#line 528
21308    __cil_tmp229 = 8 + __cil_tmp228;
21309#line 528
21310    __cil_tmp230 = (unsigned long )cmd;
21311#line 528
21312    __cil_tmp231 = __cil_tmp230 + __cil_tmp229;
21313#line 528
21314    *((int32 *)__cil_tmp231) = clip_y2274;
21315#line 531
21316    __cil_tmp232 = 48 + 68;
21317#line 531
21318    __cil_tmp233 = 0 + __cil_tmp232;
21319#line 531
21320    __cil_tmp234 = (unsigned long )unit;
21321#line 531
21322    __cil_tmp235 = __cil_tmp234 + __cil_tmp233;
21323#line 531
21324    __cil_tmp236 = *((int *)__cil_tmp235);
21325#line 531
21326    clip_x2276 = __cil_tmp236 - clip_x1277;
21327#line 532
21328    __cil_tmp237 = 48 + 88;
21329#line 532
21330    __cil_tmp238 = 0 + __cil_tmp237;
21331#line 532
21332    __cil_tmp239 = (unsigned long )unit;
21333#line 532
21334    __cil_tmp240 = __cil_tmp239 + __cil_tmp238;
21335#line 532
21336    __cil_tmp241 = *((int *)__cil_tmp240);
21337#line 532
21338    clip_y2274 = __cil_tmp241 - clip_y1275;
21339#line 533
21340    clip_x1277 = 0 - clip_x1277;
21341#line 534
21342    clip_y1275 = 0 - clip_y1275;
21343#line 537
21344    __cil_tmp242 = (unsigned long )cmd;
21345#line 537
21346    __cil_tmp243 = __cil_tmp242 + 8;
21347#line 537
21348    __cil_tmp244 = (unsigned long )framebuffer;
21349#line 537
21350    __cil_tmp245 = __cil_tmp244 + 152;
21351#line 537
21352    *((uint32 *)__cil_tmp243) = *((uint32_t *)__cil_tmp245);
21353#line 538
21354    __cil_tmp246 = 8 + 28;
21355#line 538
21356    __cil_tmp247 = (unsigned long )cmd;
21357#line 538
21358    __cil_tmp248 = __cil_tmp247 + __cil_tmp246;
21359#line 538
21360    __cil_tmp249 = (unsigned long )unit;
21361#line 538
21362    __cil_tmp250 = __cil_tmp249 + 2032;
21363#line 538
21364    *((uint32 *)__cil_tmp248) = *((unsigned int *)__cil_tmp250);
21365#line 541
21366    __cil_tmp251 = (int )num_clips;
21367#line 541
21368    vmw_clip_cliprects(tmp___7, __cil_tmp251, clip_x1277, clip_x2276, clip_y1275,
21369                       clip_y2274, blits, & num);
21370    }
21371    {
21372#line 544
21373    __cil_tmp252 = & num;
21374#line 544
21375    __cil_tmp253 = *__cil_tmp252;
21376#line 544
21377    if (__cil_tmp253 == 0) {
21378#line 545
21379      goto __Cont___0;
21380    } else {
21381
21382    }
21383    }
21384#line 548
21385    if (out_fence) {
21386#line 548
21387      if (*out_fence) {
21388        {
21389#line 549
21390        vmw_fence_obj_unreference(out_fence);
21391        }
21392      } else {
21393
21394      }
21395    } else {
21396
21397    }
21398    {
21399#line 552
21400    __cil_tmp254 = & num;
21401#line 552
21402    __cil_tmp255 = *__cil_tmp254;
21403#line 552
21404    __cil_tmp256 = (unsigned long )__cil_tmp255;
21405#line 552
21406    __cil_tmp257 = 16UL * __cil_tmp256;
21407#line 552
21408    fifo_size = 56UL + __cil_tmp257;
21409#line 553
21410    __cil_tmp258 = 0 + 4;
21411#line 553
21412    __cil_tmp259 = (unsigned long )cmd;
21413#line 553
21414    __cil_tmp260 = __cil_tmp259 + __cil_tmp258;
21415#line 553
21416    __cil_tmp261 = fifo_size - 8UL;
21417#line 553
21418    *((uint32 *)__cil_tmp260) = (__u32 )__cil_tmp261;
21419#line 554
21420    __cil_tmp262 = (void *)0;
21421#line 554
21422    __cil_tmp263 = (void *)cmd;
21423#line 554
21424    __cil_tmp264 = (uint32_t )fifo_size;
21425#line 554
21426    __cil_tmp265 = (uint64_t )0;
21427#line 554
21428    __cil_tmp266 = (void *)0;
21429#line 554
21430    __cil_tmp267 = (struct drm_vmw_fence_rep *)__cil_tmp266;
21431#line 554
21432    ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp262, __cil_tmp263, __cil_tmp264,
21433                              __cil_tmp265, __cil_tmp267, out_fence);
21434#line 557
21435    __cil_tmp268 = ret != 0;
21436#line 557
21437    __cil_tmp269 = ! __cil_tmp268;
21438#line 557
21439    __cil_tmp270 = ! __cil_tmp269;
21440#line 557
21441    __cil_tmp271 = (long )__cil_tmp270;
21442#line 557
21443    tmp___19 = __builtin_expect(__cil_tmp271, 0L);
21444    }
21445#line 557
21446    if (tmp___19) {
21447#line 558
21448      goto while_break___5;
21449    } else {
21450
21451    }
21452    __Cont___0: /* CIL Label */ 
21453#line 505
21454    i = i + 1;
21455  }
21456  while_break___5: /* CIL Label */ ;
21457  }
21458  {
21459#line 562
21460  __cil_tmp272 = (void    *)cmd;
21461#line 562
21462  kfree(__cil_tmp272);
21463  }
21464  out_free_tmp: 
21465  {
21466#line 564
21467  __cil_tmp273 = (void    *)tmp___7;
21468#line 564
21469  kfree(__cil_tmp273);
21470  }
21471#line 566
21472  return (ret);
21473}
21474}
21475#line 569 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
21476int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer , struct drm_file *file_priv ,
21477                                  unsigned int flags , unsigned int color , struct drm_clip_rect *clips ,
21478                                  unsigned int num_clips ) 
21479{ struct vmw_private *dev_priv ;
21480  struct vmw_private *tmp___7 ;
21481  struct vmw_master *vmaster ;
21482  struct vmw_master *tmp___8 ;
21483  struct vmw_framebuffer_surface *vfbs ;
21484  struct drm_framebuffer    *__mptr ;
21485  struct drm_clip_rect norect ;
21486  int ret ;
21487  int inc ;
21488  long tmp___9 ;
21489  long tmp___10 ;
21490  struct drm_device *__cil_tmp18 ;
21491  unsigned long __cil_tmp19 ;
21492  unsigned long __cil_tmp20 ;
21493  struct drm_master *__cil_tmp21 ;
21494  struct vmw_framebuffer_surface *__cil_tmp22 ;
21495  struct drm_framebuffer *__cil_tmp23 ;
21496  unsigned int __cil_tmp24 ;
21497  char *__cil_tmp25 ;
21498  char *__cil_tmp26 ;
21499  unsigned long __cil_tmp27 ;
21500  unsigned long __cil_tmp28 ;
21501  struct drm_master *__cil_tmp29 ;
21502  unsigned long __cil_tmp30 ;
21503  unsigned long __cil_tmp31 ;
21504  unsigned long __cil_tmp32 ;
21505  struct drm_master *__cil_tmp33 ;
21506  unsigned long __cil_tmp34 ;
21507  int __cil_tmp35 ;
21508  int __cil_tmp36 ;
21509  int __cil_tmp37 ;
21510  long __cil_tmp38 ;
21511  unsigned long __cil_tmp39 ;
21512  unsigned long __cil_tmp40 ;
21513  struct vmw_screen_object_display *__cil_tmp41 ;
21514  struct ttm_lock *__cil_tmp42 ;
21515  bool __cil_tmp43 ;
21516  int __cil_tmp44 ;
21517  int __cil_tmp45 ;
21518  int __cil_tmp46 ;
21519  long __cil_tmp47 ;
21520  unsigned long __cil_tmp48 ;
21521  struct drm_clip_rect *__cil_tmp49 ;
21522  unsigned long __cil_tmp50 ;
21523  unsigned long __cil_tmp51 ;
21524  unsigned long __cil_tmp52 ;
21525  unsigned long __cil_tmp53 ;
21526  unsigned int __cil_tmp54 ;
21527  unsigned long __cil_tmp55 ;
21528  unsigned long __cil_tmp56 ;
21529  unsigned long __cil_tmp57 ;
21530  unsigned int __cil_tmp58 ;
21531  struct vmw_framebuffer *__cil_tmp59 ;
21532  void *__cil_tmp60 ;
21533  struct vmw_fence_obj **__cil_tmp61 ;
21534  struct ttm_lock *__cil_tmp62 ;
21535
21536  {
21537  {
21538#line 575
21539  __cil_tmp18 = *((struct drm_device **)framebuffer);
21540#line 575
21541  tmp___7 = vmw_priv(__cil_tmp18);
21542#line 575
21543  dev_priv = tmp___7;
21544#line 576
21545  __cil_tmp19 = (unsigned long )file_priv;
21546#line 576
21547  __cil_tmp20 = __cil_tmp19 + 152;
21548#line 576
21549  __cil_tmp21 = *((struct drm_master **)__cil_tmp20);
21550#line 576
21551  tmp___8 = vmw_master(__cil_tmp21);
21552#line 576
21553  vmaster = tmp___8;
21554#line 578
21555  __mptr = (struct drm_framebuffer    *)framebuffer;
21556#line 578
21557  __cil_tmp22 = (struct vmw_framebuffer_surface *)0;
21558#line 578
21559  __cil_tmp23 = (struct drm_framebuffer *)__cil_tmp22;
21560#line 578
21561  __cil_tmp24 = (unsigned int )__cil_tmp23;
21562#line 578
21563  __cil_tmp25 = (char *)__mptr;
21564#line 578
21565  __cil_tmp26 = __cil_tmp25 - __cil_tmp24;
21566#line 578
21567  vfbs = (struct vmw_framebuffer_surface *)__cil_tmp26;
21568#line 580
21569  inc = 1;
21570#line 582
21571  __cil_tmp27 = (unsigned long )file_priv;
21572#line 582
21573  __cil_tmp28 = __cil_tmp27 + 152;
21574#line 582
21575  __cil_tmp29 = *((struct drm_master **)__cil_tmp28);
21576#line 582
21577  __cil_tmp30 = (unsigned long )__cil_tmp29;
21578#line 582
21579  __cil_tmp31 = (unsigned long )vfbs;
21580#line 582
21581  __cil_tmp32 = __cil_tmp31 + 192;
21582#line 582
21583  __cil_tmp33 = *((struct drm_master **)__cil_tmp32);
21584#line 582
21585  __cil_tmp34 = (unsigned long )__cil_tmp33;
21586#line 582
21587  __cil_tmp35 = __cil_tmp34 != __cil_tmp30;
21588#line 582
21589  __cil_tmp36 = ! __cil_tmp35;
21590#line 582
21591  __cil_tmp37 = ! __cil_tmp36;
21592#line 582
21593  __cil_tmp38 = (long )__cil_tmp37;
21594#line 582
21595  tmp___9 = __builtin_expect(__cil_tmp38, 0L);
21596  }
21597#line 582
21598  if (tmp___9) {
21599#line 583
21600    return (-22);
21601  } else {
21602
21603  }
21604  {
21605#line 586
21606  __cil_tmp39 = (unsigned long )dev_priv;
21607#line 586
21608  __cil_tmp40 = __cil_tmp39 + 2616;
21609#line 586
21610  __cil_tmp41 = *((struct vmw_screen_object_display **)__cil_tmp40);
21611#line 586
21612  if (! __cil_tmp41) {
21613#line 587
21614    return (-22);
21615  } else {
21616
21617  }
21618  }
21619  {
21620#line 589
21621  __cil_tmp42 = (struct ttm_lock *)vmaster;
21622#line 589
21623  __cil_tmp43 = (bool )1;
21624#line 589
21625  ret = ttm_read_lock(__cil_tmp42, __cil_tmp43);
21626#line 590
21627  __cil_tmp44 = ret != 0;
21628#line 590
21629  __cil_tmp45 = ! __cil_tmp44;
21630#line 590
21631  __cil_tmp46 = ! __cil_tmp45;
21632#line 590
21633  __cil_tmp47 = (long )__cil_tmp46;
21634#line 590
21635  tmp___10 = __builtin_expect(__cil_tmp47, 0L);
21636  }
21637#line 590
21638  if (tmp___10) {
21639#line 591
21640    return (ret);
21641  } else {
21642
21643  }
21644#line 593
21645  if (! num_clips) {
21646#line 594
21647    num_clips = 1U;
21648#line 595
21649    clips = & norect;
21650#line 596
21651    __cil_tmp48 = (unsigned long )(& norect) + 2;
21652#line 596
21653    *((unsigned short *)__cil_tmp48) = (unsigned short)0;
21654#line 596
21655    __cil_tmp49 = & norect;
21656#line 596
21657    __cil_tmp50 = (unsigned long )(& norect) + 2;
21658#line 596
21659    *((unsigned short *)__cil_tmp49) = *((unsigned short *)__cil_tmp50);
21660#line 597
21661    __cil_tmp51 = (unsigned long )(& norect) + 4;
21662#line 597
21663    __cil_tmp52 = (unsigned long )framebuffer;
21664#line 597
21665    __cil_tmp53 = __cil_tmp52 + 72;
21666#line 597
21667    __cil_tmp54 = *((unsigned int *)__cil_tmp53);
21668#line 597
21669    *((unsigned short *)__cil_tmp51) = (unsigned short )__cil_tmp54;
21670#line 598
21671    __cil_tmp55 = (unsigned long )(& norect) + 6;
21672#line 598
21673    __cil_tmp56 = (unsigned long )framebuffer;
21674#line 598
21675    __cil_tmp57 = __cil_tmp56 + 76;
21676#line 598
21677    __cil_tmp58 = *((unsigned int *)__cil_tmp57);
21678#line 598
21679    *((unsigned short *)__cil_tmp55) = (unsigned short )__cil_tmp58;
21680  } else
21681#line 599
21682  if (flags & 1U) {
21683#line 600
21684    num_clips = num_clips / 2U;
21685#line 601
21686    inc = 2;
21687  } else {
21688
21689  }
21690  {
21691#line 604
21692  __cil_tmp59 = (struct vmw_framebuffer *)vfbs;
21693#line 604
21694  __cil_tmp60 = (void *)0;
21695#line 604
21696  __cil_tmp61 = (struct vmw_fence_obj **)__cil_tmp60;
21697#line 604
21698  ret = do_surface_dirty_sou(dev_priv, file_priv, __cil_tmp59, flags, color, clips,
21699                             num_clips, inc, __cil_tmp61);
21700#line 608
21701  __cil_tmp62 = (struct ttm_lock *)vmaster;
21702#line 608
21703  ttm_read_unlock(__cil_tmp62);
21704  }
21705#line 609
21706  return (0);
21707}
21708}
21709#line 612 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
21710static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs  =    {& vmw_framebuffer_surface_destroy, & vmw_framebuffer_create_handle, & vmw_framebuffer_surface_dirty};
21711#line 618 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
21712static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv , struct drm_file *file_priv ,
21713                                           struct vmw_surface *surface , struct vmw_framebuffer **out ,
21714                                           struct drm_mode_fb_cmd    *mode_cmd ) 
21715{ struct drm_device *dev ;
21716  struct vmw_framebuffer_surface *vfbs ;
21717  enum SVGA3dSurfaceFormat format ;
21718  struct vmw_master *vmaster ;
21719  struct vmw_master *tmp___7 ;
21720  int ret ;
21721  long tmp___8 ;
21722  int tmp___9 ;
21723  long tmp___10 ;
21724  long tmp___11 ;
21725  void *tmp___12 ;
21726  struct vmw_surface *tmp___13 ;
21727  unsigned long __cil_tmp18 ;
21728  unsigned long __cil_tmp19 ;
21729  unsigned long __cil_tmp20 ;
21730  unsigned long __cil_tmp21 ;
21731  struct drm_master *__cil_tmp22 ;
21732  unsigned long __cil_tmp23 ;
21733  unsigned long __cil_tmp24 ;
21734  struct vmw_screen_object_display *__cil_tmp25 ;
21735  unsigned long __cil_tmp26 ;
21736  unsigned long __cil_tmp27 ;
21737  bool __cil_tmp28 ;
21738  int __cil_tmp29 ;
21739  int __cil_tmp30 ;
21740  int __cil_tmp31 ;
21741  long __cil_tmp32 ;
21742  unsigned long __cil_tmp33 ;
21743  unsigned long __cil_tmp34 ;
21744  unsigned long __cil_tmp35 ;
21745  unsigned long __cil_tmp36 ;
21746  uint32_t __cil_tmp37 ;
21747  unsigned long __cil_tmp38 ;
21748  unsigned long __cil_tmp39 ;
21749  uint32_t __cil_tmp40 ;
21750  unsigned long __cil_tmp41 ;
21751  unsigned long __cil_tmp42 ;
21752  __u32    __cil_tmp43 ;
21753  uint32_t __cil_tmp44 ;
21754  unsigned long __cil_tmp45 ;
21755  unsigned long __cil_tmp46 ;
21756  struct drm_vmw_size *__cil_tmp47 ;
21757  struct drm_vmw_size *__cil_tmp48 ;
21758  uint32_t __cil_tmp49 ;
21759  unsigned long __cil_tmp50 ;
21760  unsigned long __cil_tmp51 ;
21761  __u32    __cil_tmp52 ;
21762  uint32_t __cil_tmp53 ;
21763  unsigned long __cil_tmp54 ;
21764  unsigned long __cil_tmp55 ;
21765  struct drm_vmw_size *__cil_tmp56 ;
21766  struct drm_vmw_size *__cil_tmp57 ;
21767  unsigned long __cil_tmp58 ;
21768  unsigned long __cil_tmp59 ;
21769  uint32_t __cil_tmp60 ;
21770  unsigned long __cil_tmp61 ;
21771  unsigned long __cil_tmp62 ;
21772  struct drm_vmw_size *__cil_tmp63 ;
21773  struct drm_vmw_size *__cil_tmp64 ;
21774  unsigned long __cil_tmp65 ;
21775  unsigned long __cil_tmp66 ;
21776  uint32_t __cil_tmp67 ;
21777  long __cil_tmp68 ;
21778  unsigned long __cil_tmp69 ;
21779  unsigned long __cil_tmp70 ;
21780  __u32    __cil_tmp71 ;
21781  unsigned long __cil_tmp72 ;
21782  unsigned long __cil_tmp73 ;
21783  __u32    __cil_tmp74 ;
21784  unsigned long __cil_tmp75 ;
21785  unsigned long __cil_tmp76 ;
21786  uint32_t __cil_tmp77 ;
21787  unsigned int __cil_tmp78 ;
21788  int __cil_tmp79 ;
21789  int __cil_tmp80 ;
21790  int __cil_tmp81 ;
21791  long __cil_tmp82 ;
21792  struct drm_framebuffer *__cil_tmp83 ;
21793  struct drm_framebuffer_funcs    *__cil_tmp84 ;
21794  unsigned long __cil_tmp85 ;
21795  unsigned long __cil_tmp86 ;
21796  unsigned long __cil_tmp87 ;
21797  unsigned long __cil_tmp88 ;
21798  unsigned long __cil_tmp89 ;
21799  unsigned long __cil_tmp90 ;
21800  __u32    __cil_tmp91 ;
21801  unsigned long __cil_tmp92 ;
21802  unsigned long __cil_tmp93 ;
21803  unsigned long __cil_tmp94 ;
21804  unsigned long __cil_tmp95 ;
21805  unsigned long __cil_tmp96 ;
21806  unsigned long __cil_tmp97 ;
21807  unsigned long __cil_tmp98 ;
21808  unsigned long __cil_tmp99 ;
21809  __u32    __cil_tmp100 ;
21810  unsigned long __cil_tmp101 ;
21811  unsigned long __cil_tmp102 ;
21812  unsigned long __cil_tmp103 ;
21813  unsigned long __cil_tmp104 ;
21814  unsigned long __cil_tmp105 ;
21815  unsigned long __cil_tmp106 ;
21816  __u32    __cil_tmp107 ;
21817  unsigned long __cil_tmp108 ;
21818  unsigned long __cil_tmp109 ;
21819  unsigned long __cil_tmp110 ;
21820  unsigned long __cil_tmp111 ;
21821  unsigned long __cil_tmp112 ;
21822  unsigned long __cil_tmp113 ;
21823  __u32    __cil_tmp114 ;
21824  unsigned long __cil_tmp115 ;
21825  unsigned long __cil_tmp116 ;
21826  unsigned long __cil_tmp117 ;
21827  unsigned long __cil_tmp118 ;
21828  unsigned long __cil_tmp119 ;
21829  unsigned long __cil_tmp120 ;
21830  __u32    __cil_tmp121 ;
21831  unsigned long __cil_tmp122 ;
21832  unsigned long __cil_tmp123 ;
21833  unsigned long __cil_tmp124 ;
21834  unsigned long __cil_tmp125 ;
21835  unsigned long __cil_tmp126 ;
21836  unsigned long __cil_tmp127 ;
21837  unsigned long __cil_tmp128 ;
21838  __u32    __cil_tmp129 ;
21839  unsigned long __cil_tmp130 ;
21840  unsigned long __cil_tmp131 ;
21841  unsigned long __cil_tmp132 ;
21842  unsigned long __cil_tmp133 ;
21843  struct drm_master *__cil_tmp134 ;
21844  unsigned long __cil_tmp135 ;
21845  unsigned long __cil_tmp136 ;
21846  struct mutex *__cil_tmp137 ;
21847  unsigned long __cil_tmp138 ;
21848  unsigned long __cil_tmp139 ;
21849  struct list_head *__cil_tmp140 ;
21850  unsigned long __cil_tmp141 ;
21851  unsigned long __cil_tmp142 ;
21852  struct list_head *__cil_tmp143 ;
21853  unsigned long __cil_tmp144 ;
21854  unsigned long __cil_tmp145 ;
21855  struct mutex *__cil_tmp146 ;
21856  struct drm_framebuffer *__cil_tmp147 ;
21857  void    *__cil_tmp148 ;
21858
21859  {
21860  {
21861#line 626
21862  __cil_tmp18 = (unsigned long )dev_priv;
21863#line 626
21864  __cil_tmp19 = __cil_tmp18 + 2088;
21865#line 626
21866  dev = *((struct drm_device **)__cil_tmp19);
21867#line 629
21868  __cil_tmp20 = (unsigned long )file_priv;
21869#line 629
21870  __cil_tmp21 = __cil_tmp20 + 152;
21871#line 629
21872  __cil_tmp22 = *((struct drm_master **)__cil_tmp21);
21873#line 629
21874  tmp___7 = vmw_master(__cil_tmp22);
21875#line 629
21876  vmaster = tmp___7;
21877  }
21878  {
21879#line 633
21880  __cil_tmp23 = (unsigned long )dev_priv;
21881#line 633
21882  __cil_tmp24 = __cil_tmp23 + 2616;
21883#line 633
21884  __cil_tmp25 = *((struct vmw_screen_object_display **)__cil_tmp24);
21885#line 633
21886  if (! __cil_tmp25) {
21887#line 634
21888    return (-38);
21889  } else {
21890
21891  }
21892  }
21893  {
21894#line 641
21895  __cil_tmp26 = (unsigned long )surface;
21896#line 641
21897  __cil_tmp27 = __cil_tmp26 + 156;
21898#line 641
21899  __cil_tmp28 = *((bool *)__cil_tmp27);
21900#line 641
21901  __cil_tmp29 = ! __cil_tmp28;
21902#line 641
21903  __cil_tmp30 = ! __cil_tmp29;
21904#line 641
21905  __cil_tmp31 = ! __cil_tmp30;
21906#line 641
21907  __cil_tmp32 = (long )__cil_tmp31;
21908#line 641
21909  tmp___8 = __builtin_expect(__cil_tmp32, 0L);
21910  }
21911#line 641
21912  if (tmp___8) {
21913#line 642
21914    return (-22);
21915  } else {
21916
21917  }
21918  {
21919#line 644
21920  __cil_tmp33 = 0 * 4UL;
21921#line 644
21922  __cil_tmp34 = 120 + __cil_tmp33;
21923#line 644
21924  __cil_tmp35 = (unsigned long )surface;
21925#line 644
21926  __cil_tmp36 = __cil_tmp35 + __cil_tmp34;
21927#line 644
21928  __cil_tmp37 = *((uint32_t *)__cil_tmp36);
21929#line 644
21930  if (__cil_tmp37 != 1U) {
21931#line 644
21932    tmp___9 = 1;
21933  } else {
21934    {
21935#line 644
21936    __cil_tmp38 = (unsigned long )surface;
21937#line 644
21938    __cil_tmp39 = __cil_tmp38 + 152;
21939#line 644
21940    __cil_tmp40 = *((uint32_t *)__cil_tmp39);
21941#line 644
21942    if (__cil_tmp40 != 1U) {
21943#line 644
21944      tmp___9 = 1;
21945    } else {
21946      {
21947#line 644
21948      __cil_tmp41 = (unsigned long )mode_cmd;
21949#line 644
21950      __cil_tmp42 = __cil_tmp41 + 4;
21951#line 644
21952      __cil_tmp43 = *((__u32    *)__cil_tmp42);
21953#line 644
21954      __cil_tmp44 = (uint32_t )__cil_tmp43;
21955#line 644
21956      __cil_tmp45 = (unsigned long )surface;
21957#line 644
21958      __cil_tmp46 = __cil_tmp45 + 144;
21959#line 644
21960      __cil_tmp47 = *((struct drm_vmw_size **)__cil_tmp46);
21961#line 644
21962      __cil_tmp48 = __cil_tmp47 + 0;
21963#line 644
21964      __cil_tmp49 = *((uint32_t *)__cil_tmp48);
21965#line 644
21966      if (__cil_tmp49 < __cil_tmp44) {
21967#line 644
21968        tmp___9 = 1;
21969      } else {
21970        {
21971#line 644
21972        __cil_tmp50 = (unsigned long )mode_cmd;
21973#line 644
21974        __cil_tmp51 = __cil_tmp50 + 8;
21975#line 644
21976        __cil_tmp52 = *((__u32    *)__cil_tmp51);
21977#line 644
21978        __cil_tmp53 = (uint32_t )__cil_tmp52;
21979#line 644
21980        __cil_tmp54 = (unsigned long )surface;
21981#line 644
21982        __cil_tmp55 = __cil_tmp54 + 144;
21983#line 644
21984        __cil_tmp56 = *((struct drm_vmw_size **)__cil_tmp55);
21985#line 644
21986        __cil_tmp57 = __cil_tmp56 + 0;
21987#line 644
21988        __cil_tmp58 = (unsigned long )__cil_tmp57;
21989#line 644
21990        __cil_tmp59 = __cil_tmp58 + 4;
21991#line 644
21992        __cil_tmp60 = *((uint32_t *)__cil_tmp59);
21993#line 644
21994        if (__cil_tmp60 < __cil_tmp53) {
21995#line 644
21996          tmp___9 = 1;
21997        } else {
21998          {
21999#line 644
22000          __cil_tmp61 = (unsigned long )surface;
22001#line 644
22002          __cil_tmp62 = __cil_tmp61 + 144;
22003#line 644
22004          __cil_tmp63 = *((struct drm_vmw_size **)__cil_tmp62);
22005#line 644
22006          __cil_tmp64 = __cil_tmp63 + 0;
22007#line 644
22008          __cil_tmp65 = (unsigned long )__cil_tmp64;
22009#line 644
22010          __cil_tmp66 = __cil_tmp65 + 8;
22011#line 644
22012          __cil_tmp67 = *((uint32_t *)__cil_tmp66);
22013#line 644
22014          if (__cil_tmp67 != 1U) {
22015#line 644
22016            tmp___9 = 1;
22017          } else {
22018#line 644
22019            tmp___9 = 0;
22020          }
22021          }
22022        }
22023        }
22024      }
22025      }
22026    }
22027    }
22028  }
22029  }
22030  {
22031#line 644
22032  __cil_tmp68 = (long )tmp___9;
22033#line 644
22034  tmp___10 = __builtin_expect(__cil_tmp68, 0L);
22035  }
22036#line 644
22037  if (tmp___10) {
22038    {
22039#line 649
22040    drm_err("vmw_kms_new_framebuffer_surface", "Incompatible surface dimensions for requested mode.\n");
22041    }
22042#line 651
22043    return (-22);
22044  } else {
22045
22046  }
22047  {
22048#line 654
22049  __cil_tmp69 = (unsigned long )mode_cmd;
22050#line 654
22051  __cil_tmp70 = __cil_tmp69 + 20;
22052#line 654
22053  __cil_tmp71 = *((__u32    *)__cil_tmp70);
22054#line 655
22055  if ((int )__cil_tmp71 == 32) {
22056#line 655
22057    goto case_32;
22058  } else
22059#line 658
22060  if ((int )__cil_tmp71 == 24) {
22061#line 658
22062    goto case_24;
22063  } else
22064#line 661
22065  if ((int )__cil_tmp71 == 16) {
22066#line 661
22067    goto case_16;
22068  } else
22069#line 664
22070  if ((int )__cil_tmp71 == 15) {
22071#line 664
22072    goto case_15;
22073  } else
22074#line 667
22075  if ((int )__cil_tmp71 == 8) {
22076#line 667
22077    goto case_8;
22078  } else {
22079    {
22080#line 670
22081    goto switch_default;
22082#line 654
22083    if (0) {
22084      case_32: /* CIL Label */ 
22085#line 656
22086      format = (enum SVGA3dSurfaceFormat )2;
22087#line 657
22088      goto switch_break;
22089      case_24: /* CIL Label */ 
22090#line 659
22091      format = (enum SVGA3dSurfaceFormat )1;
22092#line 660
22093      goto switch_break;
22094      case_16: /* CIL Label */ 
22095#line 662
22096      format = (enum SVGA3dSurfaceFormat )3;
22097#line 663
22098      goto switch_break;
22099      case_15: /* CIL Label */ 
22100#line 665
22101      format = (enum SVGA3dSurfaceFormat )5;
22102#line 666
22103      goto switch_break;
22104      case_8: /* CIL Label */ 
22105#line 668
22106      format = (enum SVGA3dSurfaceFormat )11;
22107#line 669
22108      goto switch_break;
22109      switch_default: /* CIL Label */ 
22110      {
22111#line 671
22112      __cil_tmp72 = (unsigned long )mode_cmd;
22113#line 671
22114      __cil_tmp73 = __cil_tmp72 + 20;
22115#line 671
22116      __cil_tmp74 = *((__u32    *)__cil_tmp73);
22117#line 671
22118      drm_err("vmw_kms_new_framebuffer_surface", "Invalid color depth: %d\n", __cil_tmp74);
22119      }
22120#line 672
22121      return (-22);
22122    } else {
22123      switch_break: /* CIL Label */ ;
22124    }
22125    }
22126  }
22127  }
22128  {
22129#line 675
22130  __cil_tmp75 = (unsigned long )surface;
22131#line 675
22132  __cil_tmp76 = __cil_tmp75 + 116;
22133#line 675
22134  __cil_tmp77 = *((uint32_t *)__cil_tmp76);
22135#line 675
22136  __cil_tmp78 = (unsigned int )format;
22137#line 675
22138  __cil_tmp79 = __cil_tmp78 != __cil_tmp77;
22139#line 675
22140  __cil_tmp80 = ! __cil_tmp79;
22141#line 675
22142  __cil_tmp81 = ! __cil_tmp80;
22143#line 675
22144  __cil_tmp82 = (long )__cil_tmp81;
22145#line 675
22146  tmp___11 = __builtin_expect(__cil_tmp82, 0L);
22147  }
22148#line 675
22149  if (tmp___11) {
22150    {
22151#line 676
22152    drm_err("vmw_kms_new_framebuffer_surface", "Invalid surface format for requested mode.\n");
22153    }
22154#line 677
22155    return (-22);
22156  } else {
22157
22158  }
22159  {
22160#line 680
22161  tmp___12 = kzalloc(200UL, 208U);
22162#line 680
22163  vfbs = (struct vmw_framebuffer_surface *)tmp___12;
22164  }
22165#line 681
22166  if (! vfbs) {
22167#line 682
22168    ret = -12;
22169#line 683
22170    goto out_err1;
22171  } else {
22172
22173  }
22174  {
22175#line 686
22176  __cil_tmp83 = (struct drm_framebuffer *)vfbs;
22177#line 686
22178  __cil_tmp84 = (struct drm_framebuffer_funcs    *)(& vmw_framebuffer_surface_funcs);
22179#line 686
22180  ret = drm_framebuffer_init(dev, __cil_tmp83, __cil_tmp84);
22181  }
22182#line 688
22183  if (ret) {
22184#line 689
22185    goto out_err2;
22186  } else {
22187
22188  }
22189  {
22190#line 691
22191  tmp___13 = vmw_surface_reference(surface);
22192  }
22193#line 691
22194  if (tmp___13) {
22195
22196  } else {
22197    {
22198#line 692
22199    drm_err("vmw_kms_new_framebuffer_surface", "failed to reference surface %p\n",
22200            surface);
22201    }
22202#line 693
22203    goto out_err3;
22204  }
22205  {
22206#line 697
22207  __cil_tmp85 = 0 + 84;
22208#line 697
22209  __cil_tmp86 = 0 + __cil_tmp85;
22210#line 697
22211  __cil_tmp87 = (unsigned long )vfbs;
22212#line 697
22213  __cil_tmp88 = __cil_tmp87 + __cil_tmp86;
22214#line 697
22215  __cil_tmp89 = (unsigned long )mode_cmd;
22216#line 697
22217  __cil_tmp90 = __cil_tmp89 + 16;
22218#line 697
22219  __cil_tmp91 = *((__u32    *)__cil_tmp90);
22220#line 697
22221  *((int *)__cil_tmp88) = (int )__cil_tmp91;
22222#line 698
22223  __cil_tmp92 = 0 * 4UL;
22224#line 698
22225  __cil_tmp93 = 40 + __cil_tmp92;
22226#line 698
22227  __cil_tmp94 = 0 + __cil_tmp93;
22228#line 698
22229  __cil_tmp95 = 0 + __cil_tmp94;
22230#line 698
22231  __cil_tmp96 = (unsigned long )vfbs;
22232#line 698
22233  __cil_tmp97 = __cil_tmp96 + __cil_tmp95;
22234#line 698
22235  __cil_tmp98 = (unsigned long )mode_cmd;
22236#line 698
22237  __cil_tmp99 = __cil_tmp98 + 12;
22238#line 698
22239  __cil_tmp100 = *((__u32    *)__cil_tmp99);
22240#line 698
22241  *((unsigned int *)__cil_tmp97) = (unsigned int )__cil_tmp100;
22242#line 699
22243  __cil_tmp101 = 0 + 80;
22244#line 699
22245  __cil_tmp102 = 0 + __cil_tmp101;
22246#line 699
22247  __cil_tmp103 = (unsigned long )vfbs;
22248#line 699
22249  __cil_tmp104 = __cil_tmp103 + __cil_tmp102;
22250#line 699
22251  __cil_tmp105 = (unsigned long )mode_cmd;
22252#line 699
22253  __cil_tmp106 = __cil_tmp105 + 20;
22254#line 699
22255  __cil_tmp107 = *((__u32    *)__cil_tmp106);
22256#line 699
22257  *((unsigned int *)__cil_tmp104) = (unsigned int )__cil_tmp107;
22258#line 700
22259  __cil_tmp108 = 0 + 72;
22260#line 700
22261  __cil_tmp109 = 0 + __cil_tmp108;
22262#line 700
22263  __cil_tmp110 = (unsigned long )vfbs;
22264#line 700
22265  __cil_tmp111 = __cil_tmp110 + __cil_tmp109;
22266#line 700
22267  __cil_tmp112 = (unsigned long )mode_cmd;
22268#line 700
22269  __cil_tmp113 = __cil_tmp112 + 4;
22270#line 700
22271  __cil_tmp114 = *((__u32    *)__cil_tmp113);
22272#line 700
22273  *((unsigned int *)__cil_tmp111) = (unsigned int )__cil_tmp114;
22274#line 701
22275  __cil_tmp115 = 0 + 76;
22276#line 701
22277  __cil_tmp116 = 0 + __cil_tmp115;
22278#line 701
22279  __cil_tmp117 = (unsigned long )vfbs;
22280#line 701
22281  __cil_tmp118 = __cil_tmp117 + __cil_tmp116;
22282#line 701
22283  __cil_tmp119 = (unsigned long )mode_cmd;
22284#line 701
22285  __cil_tmp120 = __cil_tmp119 + 8;
22286#line 701
22287  __cil_tmp121 = *((__u32    *)__cil_tmp120);
22288#line 701
22289  *((unsigned int *)__cil_tmp118) = (unsigned int )__cil_tmp121;
22290#line 702
22291  __cil_tmp122 = (unsigned long )vfbs;
22292#line 702
22293  __cil_tmp123 = __cil_tmp122 + 160;
22294#line 702
22295  *((struct vmw_surface **)__cil_tmp123) = surface;
22296#line 703
22297  __cil_tmp124 = 0 + 152;
22298#line 703
22299  __cil_tmp125 = (unsigned long )vfbs;
22300#line 703
22301  __cil_tmp126 = __cil_tmp125 + __cil_tmp124;
22302#line 703
22303  __cil_tmp127 = (unsigned long )mode_cmd;
22304#line 703
22305  __cil_tmp128 = __cil_tmp127 + 24;
22306#line 703
22307  __cil_tmp129 = *((__u32    *)__cil_tmp128);
22308#line 703
22309  *((uint32_t *)__cil_tmp126) = (uint32_t )__cil_tmp129;
22310#line 704
22311  __cil_tmp130 = (unsigned long )vfbs;
22312#line 704
22313  __cil_tmp131 = __cil_tmp130 + 192;
22314#line 704
22315  __cil_tmp132 = (unsigned long )file_priv;
22316#line 704
22317  __cil_tmp133 = __cil_tmp132 + 152;
22318#line 704
22319  __cil_tmp134 = *((struct drm_master **)__cil_tmp133);
22320#line 704
22321  *((struct drm_master **)__cil_tmp131) = drm_master_get(__cil_tmp134);
22322#line 706
22323  __cil_tmp135 = (unsigned long )vmaster;
22324#line 706
22325  __cil_tmp136 = __cil_tmp135 + 152;
22326#line 706
22327  __cil_tmp137 = (struct mutex *)__cil_tmp136;
22328#line 706
22329  mutex_lock(__cil_tmp137);
22330#line 707
22331  __cil_tmp138 = (unsigned long )vfbs;
22332#line 707
22333  __cil_tmp139 = __cil_tmp138 + 176;
22334#line 707
22335  __cil_tmp140 = (struct list_head *)__cil_tmp139;
22336#line 707
22337  __cil_tmp141 = (unsigned long )vmaster;
22338#line 707
22339  __cil_tmp142 = __cil_tmp141 + 224;
22340#line 707
22341  __cil_tmp143 = (struct list_head *)__cil_tmp142;
22342#line 707
22343  list_add_tail(__cil_tmp140, __cil_tmp143);
22344#line 708
22345  __cil_tmp144 = (unsigned long )vmaster;
22346#line 708
22347  __cil_tmp145 = __cil_tmp144 + 152;
22348#line 708
22349  __cil_tmp146 = (struct mutex *)__cil_tmp145;
22350#line 708
22351  mutex_unlock(__cil_tmp146);
22352#line 710
22353  *out = (struct vmw_framebuffer *)vfbs;
22354  }
22355#line 712
22356  return (0);
22357  out_err3: 
22358  {
22359#line 715
22360  __cil_tmp147 = (struct drm_framebuffer *)vfbs;
22361#line 715
22362  drm_framebuffer_cleanup(__cil_tmp147);
22363  }
22364  out_err2: 
22365  {
22366#line 717
22367  __cil_tmp148 = (void    *)vfbs;
22368#line 717
22369  kfree(__cil_tmp148);
22370  }
22371  out_err1: 
22372#line 719
22373  return (ret);
22374}
22375}
22376#line 734 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
22377void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer ) 
22378{ struct vmw_framebuffer_dmabuf *vfbd ;
22379  struct drm_framebuffer    *__mptr ;
22380  struct vmw_framebuffer_dmabuf *__cil_tmp4 ;
22381  struct drm_framebuffer *__cil_tmp5 ;
22382  unsigned int __cil_tmp6 ;
22383  char *__cil_tmp7 ;
22384  char *__cil_tmp8 ;
22385  unsigned long __cil_tmp9 ;
22386  unsigned long __cil_tmp10 ;
22387  struct vmw_dma_buffer **__cil_tmp11 ;
22388  unsigned long __cil_tmp12 ;
22389  unsigned long __cil_tmp13 ;
22390  unsigned long __cil_tmp14 ;
22391  struct ttm_base_object **__cil_tmp15 ;
22392  void    *__cil_tmp16 ;
22393
22394  {
22395  {
22396#line 737
22397  __mptr = (struct drm_framebuffer    *)framebuffer;
22398#line 737
22399  __cil_tmp4 = (struct vmw_framebuffer_dmabuf *)0;
22400#line 737
22401  __cil_tmp5 = (struct drm_framebuffer *)__cil_tmp4;
22402#line 737
22403  __cil_tmp6 = (unsigned int )__cil_tmp5;
22404#line 737
22405  __cil_tmp7 = (char *)__mptr;
22406#line 737
22407  __cil_tmp8 = __cil_tmp7 - __cil_tmp6;
22408#line 737
22409  vfbd = (struct vmw_framebuffer_dmabuf *)__cil_tmp8;
22410#line 739
22411  drm_framebuffer_cleanup(framebuffer);
22412#line 740
22413  __cil_tmp9 = (unsigned long )vfbd;
22414#line 740
22415  __cil_tmp10 = __cil_tmp9 + 160;
22416#line 740
22417  __cil_tmp11 = (struct vmw_dma_buffer **)__cil_tmp10;
22418#line 740
22419  vmw_dmabuf_unreference(__cil_tmp11);
22420#line 741
22421  __cil_tmp12 = 0 + 144;
22422#line 741
22423  __cil_tmp13 = (unsigned long )vfbd;
22424#line 741
22425  __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
22426#line 741
22427  __cil_tmp15 = (struct ttm_base_object **)__cil_tmp14;
22428#line 741
22429  ttm_base_object_unref(__cil_tmp15);
22430#line 743
22431  __cil_tmp16 = (void    *)vfbd;
22432#line 743
22433  kfree(__cil_tmp16);
22434  }
22435#line 744
22436  return;
22437}
22438}
22439#line 746 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
22440static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv , struct vmw_framebuffer *framebuffer ,
22441                               unsigned int flags , unsigned int color , struct drm_clip_rect *clips ,
22442                               unsigned int num_clips , int increment ) 
22443{ size_t fifo_size ;
22444  int i ;
22445  struct __anonstruct_cmd_431 *cmd ;
22446  void *tmp___7 ;
22447  long tmp___8 ;
22448  unsigned long __cil_tmp13 ;
22449  uint32_t __cil_tmp14 ;
22450  void *__cil_tmp15 ;
22451  unsigned long __cil_tmp16 ;
22452  unsigned long __cil_tmp17 ;
22453  int __cil_tmp18 ;
22454  int __cil_tmp19 ;
22455  int __cil_tmp20 ;
22456  long __cil_tmp21 ;
22457  void *__cil_tmp22 ;
22458  unsigned int __cil_tmp23 ;
22459  struct __anonstruct_cmd_431 *__cil_tmp24 ;
22460  struct __anonstruct_cmd_431 *__cil_tmp25 ;
22461  unsigned long __cil_tmp26 ;
22462  unsigned long __cil_tmp27 ;
22463  unsigned short __cil_tmp28 ;
22464  unsigned long __cil_tmp29 ;
22465  struct __anonstruct_cmd_431 *__cil_tmp30 ;
22466  unsigned long __cil_tmp31 ;
22467  unsigned long __cil_tmp32 ;
22468  unsigned long __cil_tmp33 ;
22469  unsigned long __cil_tmp34 ;
22470  unsigned short __cil_tmp35 ;
22471  unsigned long __cil_tmp36 ;
22472  struct __anonstruct_cmd_431 *__cil_tmp37 ;
22473  unsigned long __cil_tmp38 ;
22474  unsigned long __cil_tmp39 ;
22475  unsigned short __cil_tmp40 ;
22476  int __cil_tmp41 ;
22477  unsigned long __cil_tmp42 ;
22478  unsigned long __cil_tmp43 ;
22479  unsigned short __cil_tmp44 ;
22480  int __cil_tmp45 ;
22481  int __cil_tmp46 ;
22482  unsigned long __cil_tmp47 ;
22483  struct __anonstruct_cmd_431 *__cil_tmp48 ;
22484  unsigned long __cil_tmp49 ;
22485  unsigned long __cil_tmp50 ;
22486  unsigned long __cil_tmp51 ;
22487  unsigned long __cil_tmp52 ;
22488  unsigned short __cil_tmp53 ;
22489  int __cil_tmp54 ;
22490  unsigned long __cil_tmp55 ;
22491  unsigned long __cil_tmp56 ;
22492  unsigned short __cil_tmp57 ;
22493  int __cil_tmp58 ;
22494  int __cil_tmp59 ;
22495  uint32_t __cil_tmp60 ;
22496
22497  {
22498  {
22499#line 760
22500  __cil_tmp13 = (unsigned long )num_clips;
22501#line 760
22502  fifo_size = 20UL * __cil_tmp13;
22503#line 761
22504  __cil_tmp14 = (uint32_t )fifo_size;
22505#line 761
22506  tmp___7 = vmw_fifo_reserve(dev_priv, __cil_tmp14);
22507#line 761
22508  cmd = (struct __anonstruct_cmd_431 *)tmp___7;
22509#line 762
22510  __cil_tmp15 = (void *)0;
22511#line 762
22512  __cil_tmp16 = (unsigned long )__cil_tmp15;
22513#line 762
22514  __cil_tmp17 = (unsigned long )cmd;
22515#line 762
22516  __cil_tmp18 = __cil_tmp17 == __cil_tmp16;
22517#line 762
22518  __cil_tmp19 = ! __cil_tmp18;
22519#line 762
22520  __cil_tmp20 = ! __cil_tmp19;
22521#line 762
22522  __cil_tmp21 = (long )__cil_tmp20;
22523#line 762
22524  tmp___8 = __builtin_expect(__cil_tmp21, 0L);
22525  }
22526#line 762
22527  if (tmp___8) {
22528    {
22529#line 763
22530    drm_err("do_dmabuf_dirty_ldu", "Fifo reserve failed.\n");
22531    }
22532#line 764
22533    return (-12);
22534  } else {
22535
22536  }
22537  {
22538#line 767
22539  __cil_tmp22 = (void *)cmd;
22540#line 767
22541  memset(__cil_tmp22, 0, fifo_size);
22542#line 768
22543  i = 0;
22544  }
22545  {
22546#line 768
22547  while (1) {
22548    while_continue: /* CIL Label */ ;
22549    {
22550#line 768
22551    __cil_tmp23 = (unsigned int )i;
22552#line 768
22553    if (__cil_tmp23 < num_clips) {
22554
22555    } else {
22556#line 768
22557      goto while_break;
22558    }
22559    }
22560#line 769
22561    __cil_tmp24 = cmd + i;
22562#line 769
22563    *((uint32_t *)__cil_tmp24) = (__u32 )1;
22564#line 770
22565    __cil_tmp25 = cmd + i;
22566#line 770
22567    __cil_tmp26 = (unsigned long )__cil_tmp25;
22568#line 770
22569    __cil_tmp27 = __cil_tmp26 + 4;
22570#line 770
22571    __cil_tmp28 = *((unsigned short *)clips);
22572#line 770
22573    *((uint32 *)__cil_tmp27) = (__u32 )__cil_tmp28;
22574#line 771
22575    __cil_tmp29 = 4 + 4;
22576#line 771
22577    __cil_tmp30 = cmd + i;
22578#line 771
22579    __cil_tmp31 = (unsigned long )__cil_tmp30;
22580#line 771
22581    __cil_tmp32 = __cil_tmp31 + __cil_tmp29;
22582#line 771
22583    __cil_tmp33 = (unsigned long )clips;
22584#line 771
22585    __cil_tmp34 = __cil_tmp33 + 2;
22586#line 771
22587    __cil_tmp35 = *((unsigned short *)__cil_tmp34);
22588#line 771
22589    *((uint32 *)__cil_tmp32) = (__u32 )__cil_tmp35;
22590#line 772
22591    __cil_tmp36 = 4 + 8;
22592#line 772
22593    __cil_tmp37 = cmd + i;
22594#line 772
22595    __cil_tmp38 = (unsigned long )__cil_tmp37;
22596#line 772
22597    __cil_tmp39 = __cil_tmp38 + __cil_tmp36;
22598#line 772
22599    __cil_tmp40 = *((unsigned short *)clips);
22600#line 772
22601    __cil_tmp41 = (int )__cil_tmp40;
22602#line 772
22603    __cil_tmp42 = (unsigned long )clips;
22604#line 772
22605    __cil_tmp43 = __cil_tmp42 + 4;
22606#line 772
22607    __cil_tmp44 = *((unsigned short *)__cil_tmp43);
22608#line 772
22609    __cil_tmp45 = (int )__cil_tmp44;
22610#line 772
22611    __cil_tmp46 = __cil_tmp45 - __cil_tmp41;
22612#line 772
22613    *((uint32 *)__cil_tmp39) = (__u32 )__cil_tmp46;
22614#line 773
22615    __cil_tmp47 = 4 + 12;
22616#line 773
22617    __cil_tmp48 = cmd + i;
22618#line 773
22619    __cil_tmp49 = (unsigned long )__cil_tmp48;
22620#line 773
22621    __cil_tmp50 = __cil_tmp49 + __cil_tmp47;
22622#line 773
22623    __cil_tmp51 = (unsigned long )clips;
22624#line 773
22625    __cil_tmp52 = __cil_tmp51 + 2;
22626#line 773
22627    __cil_tmp53 = *((unsigned short *)__cil_tmp52);
22628#line 773
22629    __cil_tmp54 = (int )__cil_tmp53;
22630#line 773
22631    __cil_tmp55 = (unsigned long )clips;
22632#line 773
22633    __cil_tmp56 = __cil_tmp55 + 6;
22634#line 773
22635    __cil_tmp57 = *((unsigned short *)__cil_tmp56);
22636#line 773
22637    __cil_tmp58 = (int )__cil_tmp57;
22638#line 773
22639    __cil_tmp59 = __cil_tmp58 - __cil_tmp54;
22640#line 773
22641    *((uint32 *)__cil_tmp50) = (__u32 )__cil_tmp59;
22642#line 768
22643    i = i + 1;
22644#line 768
22645    clips = clips + increment;
22646  }
22647  while_break: /* CIL Label */ ;
22648  }
22649  {
22650#line 776
22651  __cil_tmp60 = (uint32_t )fifo_size;
22652#line 776
22653  vmw_fifo_commit(dev_priv, __cil_tmp60);
22654  }
22655#line 777
22656  return (0);
22657}
22658}
22659#line 780 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
22660static int do_dmabuf_define_gmrfb(struct drm_file *file_priv , struct vmw_private *dev_priv ,
22661                                  struct vmw_framebuffer *framebuffer ) 
22662{ int depth ;
22663  size_t fifo_size ;
22664  int ret ;
22665  struct __anonstruct_cmd_432 *cmd ;
22666  void *tmp___7 ;
22667  long tmp___8 ;
22668  unsigned long __cil_tmp10 ;
22669  unsigned long __cil_tmp11 ;
22670  unsigned long __cil_tmp12 ;
22671  unsigned int __cil_tmp13 ;
22672  void *__cil_tmp14 ;
22673  unsigned long __cil_tmp15 ;
22674  unsigned long __cil_tmp16 ;
22675  int __cil_tmp17 ;
22676  int __cil_tmp18 ;
22677  int __cil_tmp19 ;
22678  long __cil_tmp20 ;
22679  void *__cil_tmp21 ;
22680  unsigned long __cil_tmp22 ;
22681  unsigned long __cil_tmp23 ;
22682  unsigned long __cil_tmp24 ;
22683  unsigned long __cil_tmp25 ;
22684  unsigned long __cil_tmp26 ;
22685  unsigned long __cil_tmp27 ;
22686  int __cil_tmp28 ;
22687  unsigned long __cil_tmp29 ;
22688  unsigned long __cil_tmp30 ;
22689  unsigned long __cil_tmp31 ;
22690  unsigned long __cil_tmp32 ;
22691  unsigned long __cil_tmp33 ;
22692  unsigned long __cil_tmp34 ;
22693  unsigned long __cil_tmp35 ;
22694  unsigned long __cil_tmp36 ;
22695  unsigned long __cil_tmp37 ;
22696  unsigned long __cil_tmp38 ;
22697  unsigned long __cil_tmp39 ;
22698  unsigned long __cil_tmp40 ;
22699  unsigned long __cil_tmp41 ;
22700  unsigned long __cil_tmp42 ;
22701  unsigned long __cil_tmp43 ;
22702  unsigned long __cil_tmp44 ;
22703  unsigned long __cil_tmp45 ;
22704  unsigned long __cil_tmp46 ;
22705  unsigned long __cil_tmp47 ;
22706  unsigned long __cil_tmp48 ;
22707  unsigned long __cil_tmp49 ;
22708  unsigned long __cil_tmp50 ;
22709  unsigned long __cil_tmp51 ;
22710  unsigned long __cil_tmp52 ;
22711  unsigned long __cil_tmp53 ;
22712  unsigned long __cil_tmp54 ;
22713  unsigned long __cil_tmp55 ;
22714  unsigned long __cil_tmp56 ;
22715  void *__cil_tmp57 ;
22716  void *__cil_tmp58 ;
22717  uint32_t __cil_tmp59 ;
22718  uint64_t __cil_tmp60 ;
22719  void *__cil_tmp61 ;
22720  struct drm_vmw_fence_rep *__cil_tmp62 ;
22721  void *__cil_tmp63 ;
22722  struct vmw_fence_obj **__cil_tmp64 ;
22723  void    *__cil_tmp65 ;
22724
22725  {
22726#line 784
22727  __cil_tmp10 = 0 + 80;
22728#line 784
22729  __cil_tmp11 = (unsigned long )framebuffer;
22730#line 784
22731  __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
22732#line 784
22733  __cil_tmp13 = *((unsigned int *)__cil_tmp12);
22734#line 784
22735  depth = (int )__cil_tmp13;
22736#line 797
22737  if (depth == 32) {
22738#line 798
22739    depth = 24;
22740  } else {
22741
22742  }
22743  {
22744#line 800
22745  fifo_size = 20UL;
22746#line 801
22747  tmp___7 = kmalloc(fifo_size, 208U);
22748#line 801
22749  cmd = (struct __anonstruct_cmd_432 *)tmp___7;
22750#line 802
22751  __cil_tmp14 = (void *)0;
22752#line 802
22753  __cil_tmp15 = (unsigned long )__cil_tmp14;
22754#line 802
22755  __cil_tmp16 = (unsigned long )cmd;
22756#line 802
22757  __cil_tmp17 = __cil_tmp16 == __cil_tmp15;
22758#line 802
22759  __cil_tmp18 = ! __cil_tmp17;
22760#line 802
22761  __cil_tmp19 = ! __cil_tmp18;
22762#line 802
22763  __cil_tmp20 = (long )__cil_tmp19;
22764#line 802
22765  tmp___8 = __builtin_expect(__cil_tmp20, 0L);
22766  }
22767#line 802
22768  if (tmp___8) {
22769    {
22770#line 803
22771    drm_err("do_dmabuf_define_gmrfb", "Failed to allocate temporary cmd buffer.\n");
22772    }
22773#line 804
22774    return (-12);
22775  } else {
22776
22777  }
22778  {
22779#line 807
22780  __cil_tmp21 = (void *)cmd;
22781#line 807
22782  memset(__cil_tmp21, 0, fifo_size);
22783#line 808
22784  *((uint32_t *)cmd) = (uint32_t )36;
22785#line 809
22786  __cil_tmp22 = 4 + 12;
22787#line 809
22788  __cil_tmp23 = (unsigned long )cmd;
22789#line 809
22790  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
22791#line 809
22792  __cil_tmp25 = 0 + 84;
22793#line 809
22794  __cil_tmp26 = (unsigned long )framebuffer;
22795#line 809
22796  __cil_tmp27 = __cil_tmp26 + __cil_tmp25;
22797#line 809
22798  __cil_tmp28 = *((int *)__cil_tmp27);
22799#line 809
22800  *((uint32 *)__cil_tmp24) = (uint32 )__cil_tmp28;
22801#line 810
22802  __cil_tmp29 = 0 + 1;
22803#line 810
22804  __cil_tmp30 = 0 + __cil_tmp29;
22805#line 810
22806  __cil_tmp31 = 12 + __cil_tmp30;
22807#line 810
22808  __cil_tmp32 = 4 + __cil_tmp31;
22809#line 810
22810  __cil_tmp33 = (unsigned long )cmd;
22811#line 810
22812  __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
22813#line 810
22814  *((uint32 *)__cil_tmp34) = (uint32 )depth;
22815#line 811
22816  __cil_tmp35 = 0 + 2;
22817#line 811
22818  __cil_tmp36 = 0 + __cil_tmp35;
22819#line 811
22820  __cil_tmp37 = 12 + __cil_tmp36;
22821#line 811
22822  __cil_tmp38 = 4 + __cil_tmp37;
22823#line 811
22824  __cil_tmp39 = (unsigned long )cmd;
22825#line 811
22826  __cil_tmp40 = __cil_tmp39 + __cil_tmp38;
22827#line 811
22828  *((uint32 *)__cil_tmp40) = (uint32 )0;
22829#line 812
22830  __cil_tmp41 = 4 + 8;
22831#line 812
22832  __cil_tmp42 = (unsigned long )cmd;
22833#line 812
22834  __cil_tmp43 = __cil_tmp42 + __cil_tmp41;
22835#line 812
22836  __cil_tmp44 = 0 * 4UL;
22837#line 812
22838  __cil_tmp45 = 40 + __cil_tmp44;
22839#line 812
22840  __cil_tmp46 = 0 + __cil_tmp45;
22841#line 812
22842  __cil_tmp47 = (unsigned long )framebuffer;
22843#line 812
22844  __cil_tmp48 = __cil_tmp47 + __cil_tmp46;
22845#line 812
22846  *((uint32 *)__cil_tmp43) = *((unsigned int *)__cil_tmp48);
22847#line 813
22848  __cil_tmp49 = (unsigned long )cmd;
22849#line 813
22850  __cil_tmp50 = __cil_tmp49 + 4;
22851#line 813
22852  __cil_tmp51 = (unsigned long )framebuffer;
22853#line 813
22854  __cil_tmp52 = __cil_tmp51 + 152;
22855#line 813
22856  *((uint32 *)__cil_tmp50) = *((uint32_t *)__cil_tmp52);
22857#line 814
22858  __cil_tmp53 = 0 + 4;
22859#line 814
22860  __cil_tmp54 = 4 + __cil_tmp53;
22861#line 814
22862  __cil_tmp55 = (unsigned long )cmd;
22863#line 814
22864  __cil_tmp56 = __cil_tmp55 + __cil_tmp54;
22865#line 814
22866  *((uint32 *)__cil_tmp56) = (uint32 )0;
22867#line 816
22868  __cil_tmp57 = (void *)0;
22869#line 816
22870  __cil_tmp58 = (void *)cmd;
22871#line 816
22872  __cil_tmp59 = (uint32_t )fifo_size;
22873#line 816
22874  __cil_tmp60 = (uint64_t )0;
22875#line 816
22876  __cil_tmp61 = (void *)0;
22877#line 816
22878  __cil_tmp62 = (struct drm_vmw_fence_rep *)__cil_tmp61;
22879#line 816
22880  __cil_tmp63 = (void *)0;
22881#line 816
22882  __cil_tmp64 = (struct vmw_fence_obj **)__cil_tmp63;
22883#line 816
22884  ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp57, __cil_tmp58, __cil_tmp59,
22885                            __cil_tmp60, __cil_tmp62, __cil_tmp64);
22886#line 819
22887  __cil_tmp65 = (void    *)cmd;
22888#line 819
22889  kfree(__cil_tmp65);
22890  }
22891#line 821
22892  return (ret);
22893}
22894}
22895#line 824 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
22896static int do_dmabuf_dirty_sou(struct drm_file *file_priv , struct vmw_private *dev_priv ,
22897                               struct vmw_framebuffer *framebuffer , unsigned int flags ,
22898                               unsigned int color , struct drm_clip_rect *clips ,
22899                               unsigned int num_clips , int increment , struct vmw_fence_obj **out_fence ) 
22900{ struct vmw_display_unit *units[8] ;
22901  struct drm_clip_rect *clips_ptr ;
22902  int i ;
22903  int k ;
22904  int num_units ;
22905  int ret ;
22906  struct drm_crtc *crtc ;
22907  size_t fifo_size ;
22908  struct __anonstruct_blits_433 *blits ;
22909  long tmp___7 ;
22910  void *tmp___8 ;
22911  long tmp___9 ;
22912  struct list_head    *__mptr ;
22913  struct list_head    *__mptr___0 ;
22914  int tmp___10 ;
22915  struct drm_crtc    *__mptr___1 ;
22916  struct vmw_display_unit *unit ;
22917  int hit_num ;
22918  int clip_x1 ;
22919  int clip_y1 ;
22920  int clip_x2 ;
22921  int clip_y2 ;
22922  int move_x ;
22923  int move_y ;
22924  int __min1 ;
22925  int __min2 ;
22926  int tmp___11 ;
22927  int __min1___0 ;
22928  int __min2___0 ;
22929  int tmp___12 ;
22930  int __min1___1 ;
22931  int __min2___1 ;
22932  int tmp___13 ;
22933  int __min1___2 ;
22934  int __min2___2 ;
22935  int tmp___14 ;
22936  long tmp___15 ;
22937  int __cil_tmp47 ;
22938  int __cil_tmp48 ;
22939  int __cil_tmp49 ;
22940  long __cil_tmp50 ;
22941  unsigned long __cil_tmp51 ;
22942  void *__cil_tmp52 ;
22943  unsigned long __cil_tmp53 ;
22944  unsigned long __cil_tmp54 ;
22945  int __cil_tmp55 ;
22946  int __cil_tmp56 ;
22947  int __cil_tmp57 ;
22948  long __cil_tmp58 ;
22949  unsigned long __cil_tmp59 ;
22950  unsigned long __cil_tmp60 ;
22951  unsigned long __cil_tmp61 ;
22952  struct drm_device *__cil_tmp62 ;
22953  unsigned long __cil_tmp63 ;
22954  unsigned long __cil_tmp64 ;
22955  struct list_head *__cil_tmp65 ;
22956  struct drm_crtc *__cil_tmp66 ;
22957  unsigned long __cil_tmp67 ;
22958  unsigned long __cil_tmp68 ;
22959  struct list_head *__cil_tmp69 ;
22960  unsigned int __cil_tmp70 ;
22961  char *__cil_tmp71 ;
22962  char *__cil_tmp72 ;
22963  unsigned long __cil_tmp73 ;
22964  unsigned long __cil_tmp74 ;
22965  unsigned long __cil_tmp75 ;
22966  struct drm_device *__cil_tmp76 ;
22967  unsigned long __cil_tmp77 ;
22968  unsigned long __cil_tmp78 ;
22969  struct list_head *__cil_tmp79 ;
22970  unsigned long __cil_tmp80 ;
22971  unsigned long __cil_tmp81 ;
22972  unsigned long __cil_tmp82 ;
22973  struct list_head *__cil_tmp83 ;
22974  unsigned long __cil_tmp84 ;
22975  struct drm_framebuffer *__cil_tmp85 ;
22976  unsigned long __cil_tmp86 ;
22977  unsigned long __cil_tmp87 ;
22978  unsigned long __cil_tmp88 ;
22979  struct drm_framebuffer *__cil_tmp89 ;
22980  unsigned long __cil_tmp90 ;
22981  unsigned long __cil_tmp91 ;
22982  unsigned long __cil_tmp92 ;
22983  struct vmw_display_unit *__cil_tmp93 ;
22984  struct drm_crtc *__cil_tmp94 ;
22985  unsigned int __cil_tmp95 ;
22986  char *__cil_tmp96 ;
22987  char *__cil_tmp97 ;
22988  unsigned long __cil_tmp98 ;
22989  unsigned long __cil_tmp99 ;
22990  struct list_head *__cil_tmp100 ;
22991  struct drm_crtc *__cil_tmp101 ;
22992  unsigned long __cil_tmp102 ;
22993  unsigned long __cil_tmp103 ;
22994  struct list_head *__cil_tmp104 ;
22995  unsigned int __cil_tmp105 ;
22996  char *__cil_tmp106 ;
22997  char *__cil_tmp107 ;
22998  unsigned long __cil_tmp108 ;
22999  unsigned long __cil_tmp109 ;
23000  unsigned int __cil_tmp110 ;
23001  unsigned long __cil_tmp111 ;
23002  unsigned long __cil_tmp112 ;
23003  unsigned long __cil_tmp113 ;
23004  int __cil_tmp114 ;
23005  unsigned short __cil_tmp115 ;
23006  int __cil_tmp116 ;
23007  unsigned long __cil_tmp117 ;
23008  unsigned long __cil_tmp118 ;
23009  unsigned long __cil_tmp119 ;
23010  int __cil_tmp120 ;
23011  unsigned long __cil_tmp121 ;
23012  unsigned long __cil_tmp122 ;
23013  unsigned short __cil_tmp123 ;
23014  int __cil_tmp124 ;
23015  unsigned long __cil_tmp125 ;
23016  unsigned long __cil_tmp126 ;
23017  unsigned long __cil_tmp127 ;
23018  int __cil_tmp128 ;
23019  unsigned long __cil_tmp129 ;
23020  unsigned long __cil_tmp130 ;
23021  unsigned short __cil_tmp131 ;
23022  int __cil_tmp132 ;
23023  unsigned long __cil_tmp133 ;
23024  unsigned long __cil_tmp134 ;
23025  unsigned long __cil_tmp135 ;
23026  int __cil_tmp136 ;
23027  unsigned long __cil_tmp137 ;
23028  unsigned long __cil_tmp138 ;
23029  unsigned short __cil_tmp139 ;
23030  int __cil_tmp140 ;
23031  unsigned long __cil_tmp141 ;
23032  unsigned long __cil_tmp142 ;
23033  unsigned long __cil_tmp143 ;
23034  unsigned long __cil_tmp144 ;
23035  int __cil_tmp145 ;
23036  unsigned long __cil_tmp146 ;
23037  unsigned long __cil_tmp147 ;
23038  unsigned long __cil_tmp148 ;
23039  unsigned long __cil_tmp149 ;
23040  int __cil_tmp150 ;
23041  unsigned long __cil_tmp151 ;
23042  unsigned long __cil_tmp152 ;
23043  unsigned long __cil_tmp153 ;
23044  unsigned long __cil_tmp154 ;
23045  unsigned long __cil_tmp155 ;
23046  unsigned long __cil_tmp156 ;
23047  unsigned long __cil_tmp157 ;
23048  unsigned long __cil_tmp158 ;
23049  struct __anonstruct_blits_433 *__cil_tmp159 ;
23050  unsigned long __cil_tmp160 ;
23051  struct __anonstruct_blits_433 *__cil_tmp161 ;
23052  unsigned long __cil_tmp162 ;
23053  unsigned long __cil_tmp163 ;
23054  unsigned long __cil_tmp164 ;
23055  unsigned long __cil_tmp165 ;
23056  struct __anonstruct_blits_433 *__cil_tmp166 ;
23057  unsigned long __cil_tmp167 ;
23058  unsigned long __cil_tmp168 ;
23059  unsigned short __cil_tmp169 ;
23060  int __cil_tmp170 ;
23061  unsigned long __cil_tmp171 ;
23062  unsigned long __cil_tmp172 ;
23063  struct __anonstruct_blits_433 *__cil_tmp173 ;
23064  unsigned long __cil_tmp174 ;
23065  unsigned long __cil_tmp175 ;
23066  unsigned long __cil_tmp176 ;
23067  unsigned long __cil_tmp177 ;
23068  unsigned short __cil_tmp178 ;
23069  int __cil_tmp179 ;
23070  unsigned long __cil_tmp180 ;
23071  struct __anonstruct_blits_433 *__cil_tmp181 ;
23072  unsigned long __cil_tmp182 ;
23073  unsigned long __cil_tmp183 ;
23074  unsigned long __cil_tmp184 ;
23075  unsigned long __cil_tmp185 ;
23076  struct __anonstruct_blits_433 *__cil_tmp186 ;
23077  unsigned long __cil_tmp187 ;
23078  unsigned long __cil_tmp188 ;
23079  unsigned long __cil_tmp189 ;
23080  unsigned long __cil_tmp190 ;
23081  struct __anonstruct_blits_433 *__cil_tmp191 ;
23082  unsigned long __cil_tmp192 ;
23083  unsigned long __cil_tmp193 ;
23084  unsigned long __cil_tmp194 ;
23085  unsigned long __cil_tmp195 ;
23086  struct __anonstruct_blits_433 *__cil_tmp196 ;
23087  unsigned long __cil_tmp197 ;
23088  unsigned long __cil_tmp198 ;
23089  unsigned long __cil_tmp199 ;
23090  void *__cil_tmp200 ;
23091  void *__cil_tmp201 ;
23092  uint32_t __cil_tmp202 ;
23093  uint64_t __cil_tmp203 ;
23094  void *__cil_tmp204 ;
23095  struct drm_vmw_fence_rep *__cil_tmp205 ;
23096  int __cil_tmp206 ;
23097  int __cil_tmp207 ;
23098  int __cil_tmp208 ;
23099  long __cil_tmp209 ;
23100  void    *__cil_tmp210 ;
23101
23102  {
23103  {
23104#line 843
23105  ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
23106#line 844
23107  __cil_tmp47 = ret != 0;
23108#line 844
23109  __cil_tmp48 = ! __cil_tmp47;
23110#line 844
23111  __cil_tmp49 = ! __cil_tmp48;
23112#line 844
23113  __cil_tmp50 = (long )__cil_tmp49;
23114#line 844
23115  tmp___7 = __builtin_expect(__cil_tmp50, 0L);
23116  }
23117#line 844
23118  if (tmp___7) {
23119#line 845
23120    return (ret);
23121  } else {
23122
23123  }
23124  {
23125#line 847
23126  __cil_tmp51 = (unsigned long )num_clips;
23127#line 847
23128  fifo_size = 32UL * __cil_tmp51;
23129#line 848
23130  tmp___8 = kmalloc(fifo_size, 208U);
23131#line 848
23132  blits = (struct __anonstruct_blits_433 *)tmp___8;
23133#line 849
23134  __cil_tmp52 = (void *)0;
23135#line 849
23136  __cil_tmp53 = (unsigned long )__cil_tmp52;
23137#line 849
23138  __cil_tmp54 = (unsigned long )blits;
23139#line 849
23140  __cil_tmp55 = __cil_tmp54 == __cil_tmp53;
23141#line 849
23142  __cil_tmp56 = ! __cil_tmp55;
23143#line 849
23144  __cil_tmp57 = ! __cil_tmp56;
23145#line 849
23146  __cil_tmp58 = (long )__cil_tmp57;
23147#line 849
23148  tmp___9 = __builtin_expect(__cil_tmp58, 0L);
23149  }
23150#line 849
23151  if (tmp___9) {
23152    {
23153#line 850
23154    drm_err("do_dmabuf_dirty_sou", "Failed to allocate temporary cmd buffer.\n");
23155    }
23156#line 851
23157    return (-12);
23158  } else {
23159
23160  }
23161#line 854
23162  num_units = 0;
23163#line 855
23164  __cil_tmp59 = 1152 + 296;
23165#line 855
23166  __cil_tmp60 = (unsigned long )dev_priv;
23167#line 855
23168  __cil_tmp61 = __cil_tmp60 + 2088;
23169#line 855
23170  __cil_tmp62 = *((struct drm_device **)__cil_tmp61);
23171#line 855
23172  __cil_tmp63 = (unsigned long )__cil_tmp62;
23173#line 855
23174  __cil_tmp64 = __cil_tmp63 + __cil_tmp59;
23175#line 855
23176  __cil_tmp65 = *((struct list_head **)__cil_tmp64);
23177#line 855
23178  __mptr = (struct list_head    *)__cil_tmp65;
23179#line 855
23180  __cil_tmp66 = (struct drm_crtc *)0;
23181#line 855
23182  __cil_tmp67 = (unsigned long )__cil_tmp66;
23183#line 855
23184  __cil_tmp68 = __cil_tmp67 + 8;
23185#line 855
23186  __cil_tmp69 = (struct list_head *)__cil_tmp68;
23187#line 855
23188  __cil_tmp70 = (unsigned int )__cil_tmp69;
23189#line 855
23190  __cil_tmp71 = (char *)__mptr;
23191#line 855
23192  __cil_tmp72 = __cil_tmp71 - __cil_tmp70;
23193#line 855
23194  crtc = (struct drm_crtc *)__cil_tmp72;
23195  {
23196#line 855
23197  while (1) {
23198    while_continue: /* CIL Label */ ;
23199    {
23200#line 855
23201    __cil_tmp73 = 1152 + 296;
23202#line 855
23203    __cil_tmp74 = (unsigned long )dev_priv;
23204#line 855
23205    __cil_tmp75 = __cil_tmp74 + 2088;
23206#line 855
23207    __cil_tmp76 = *((struct drm_device **)__cil_tmp75);
23208#line 855
23209    __cil_tmp77 = (unsigned long )__cil_tmp76;
23210#line 855
23211    __cil_tmp78 = __cil_tmp77 + __cil_tmp73;
23212#line 855
23213    __cil_tmp79 = (struct list_head *)__cil_tmp78;
23214#line 855
23215    __cil_tmp80 = (unsigned long )__cil_tmp79;
23216#line 855
23217    __cil_tmp81 = (unsigned long )crtc;
23218#line 855
23219    __cil_tmp82 = __cil_tmp81 + 8;
23220#line 855
23221    __cil_tmp83 = (struct list_head *)__cil_tmp82;
23222#line 855
23223    __cil_tmp84 = (unsigned long )__cil_tmp83;
23224#line 855
23225    if (__cil_tmp84 != __cil_tmp80) {
23226
23227    } else {
23228#line 855
23229      goto while_break;
23230    }
23231    }
23232    {
23233#line 856
23234    __cil_tmp85 = (struct drm_framebuffer *)framebuffer;
23235#line 856
23236    __cil_tmp86 = (unsigned long )__cil_tmp85;
23237#line 856
23238    __cil_tmp87 = (unsigned long )crtc;
23239#line 856
23240    __cil_tmp88 = __cil_tmp87 + 32;
23241#line 856
23242    __cil_tmp89 = *((struct drm_framebuffer **)__cil_tmp88);
23243#line 856
23244    __cil_tmp90 = (unsigned long )__cil_tmp89;
23245#line 856
23246    if (__cil_tmp90 != __cil_tmp86) {
23247#line 857
23248      goto __Cont;
23249    } else {
23250
23251    }
23252    }
23253#line 858
23254    tmp___10 = num_units;
23255#line 858
23256    num_units = num_units + 1;
23257#line 858
23258    __mptr___1 = (struct drm_crtc    *)crtc;
23259#line 858
23260    __cil_tmp91 = tmp___10 * 8UL;
23261#line 858
23262    __cil_tmp92 = (unsigned long )(units) + __cil_tmp91;
23263#line 858
23264    __cil_tmp93 = (struct vmw_display_unit *)0;
23265#line 858
23266    __cil_tmp94 = (struct drm_crtc *)__cil_tmp93;
23267#line 858
23268    __cil_tmp95 = (unsigned int )__cil_tmp94;
23269#line 858
23270    __cil_tmp96 = (char *)__mptr___1;
23271#line 858
23272    __cil_tmp97 = __cil_tmp96 - __cil_tmp95;
23273#line 858
23274    *((struct vmw_display_unit **)__cil_tmp92) = (struct vmw_display_unit *)__cil_tmp97;
23275    __Cont: /* CIL Label */ 
23276#line 855
23277    __cil_tmp98 = (unsigned long )crtc;
23278#line 855
23279    __cil_tmp99 = __cil_tmp98 + 8;
23280#line 855
23281    __cil_tmp100 = *((struct list_head **)__cil_tmp99);
23282#line 855
23283    __mptr___0 = (struct list_head    *)__cil_tmp100;
23284#line 855
23285    __cil_tmp101 = (struct drm_crtc *)0;
23286#line 855
23287    __cil_tmp102 = (unsigned long )__cil_tmp101;
23288#line 855
23289    __cil_tmp103 = __cil_tmp102 + 8;
23290#line 855
23291    __cil_tmp104 = (struct list_head *)__cil_tmp103;
23292#line 855
23293    __cil_tmp105 = (unsigned int )__cil_tmp104;
23294#line 855
23295    __cil_tmp106 = (char *)__mptr___0;
23296#line 855
23297    __cil_tmp107 = __cil_tmp106 - __cil_tmp105;
23298#line 855
23299    crtc = (struct drm_crtc *)__cil_tmp107;
23300  }
23301  while_break: /* CIL Label */ ;
23302  }
23303#line 861
23304  k = 0;
23305  {
23306#line 861
23307  while (1) {
23308    while_continue___0: /* CIL Label */ ;
23309#line 861
23310    if (k < num_units) {
23311
23312    } else {
23313#line 861
23314      goto while_break___0;
23315    }
23316#line 862
23317    __cil_tmp108 = k * 8UL;
23318#line 862
23319    __cil_tmp109 = (unsigned long )(units) + __cil_tmp108;
23320#line 862
23321    unit = *((struct vmw_display_unit **)__cil_tmp109);
23322#line 863
23323    hit_num = 0;
23324#line 865
23325    clips_ptr = clips;
23326#line 866
23327    i = 0;
23328    {
23329#line 866
23330    while (1) {
23331      while_continue___1: /* CIL Label */ ;
23332      {
23333#line 866
23334      __cil_tmp110 = (unsigned int )i;
23335#line 866
23336      if (__cil_tmp110 < num_clips) {
23337
23338      } else {
23339#line 866
23340        goto while_break___1;
23341      }
23342      }
23343#line 867
23344      __cil_tmp111 = 0 + 480;
23345#line 867
23346      __cil_tmp112 = (unsigned long )unit;
23347#line 867
23348      __cil_tmp113 = __cil_tmp112 + __cil_tmp111;
23349#line 867
23350      __cil_tmp114 = *((int *)__cil_tmp113);
23351#line 867
23352      __cil_tmp115 = *((unsigned short *)clips_ptr);
23353#line 867
23354      __cil_tmp116 = (int )__cil_tmp115;
23355#line 867
23356      clip_x1 = __cil_tmp116 - __cil_tmp114;
23357#line 868
23358      __cil_tmp117 = 0 + 484;
23359#line 868
23360      __cil_tmp118 = (unsigned long )unit;
23361#line 868
23362      __cil_tmp119 = __cil_tmp118 + __cil_tmp117;
23363#line 868
23364      __cil_tmp120 = *((int *)__cil_tmp119);
23365#line 868
23366      __cil_tmp121 = (unsigned long )clips_ptr;
23367#line 868
23368      __cil_tmp122 = __cil_tmp121 + 2;
23369#line 868
23370      __cil_tmp123 = *((unsigned short *)__cil_tmp122);
23371#line 868
23372      __cil_tmp124 = (int )__cil_tmp123;
23373#line 868
23374      clip_y1 = __cil_tmp124 - __cil_tmp120;
23375#line 869
23376      __cil_tmp125 = 0 + 480;
23377#line 869
23378      __cil_tmp126 = (unsigned long )unit;
23379#line 869
23380      __cil_tmp127 = __cil_tmp126 + __cil_tmp125;
23381#line 869
23382      __cil_tmp128 = *((int *)__cil_tmp127);
23383#line 869
23384      __cil_tmp129 = (unsigned long )clips_ptr;
23385#line 869
23386      __cil_tmp130 = __cil_tmp129 + 4;
23387#line 869
23388      __cil_tmp131 = *((unsigned short *)__cil_tmp130);
23389#line 869
23390      __cil_tmp132 = (int )__cil_tmp131;
23391#line 869
23392      clip_x2 = __cil_tmp132 - __cil_tmp128;
23393#line 870
23394      __cil_tmp133 = 0 + 484;
23395#line 870
23396      __cil_tmp134 = (unsigned long )unit;
23397#line 870
23398      __cil_tmp135 = __cil_tmp134 + __cil_tmp133;
23399#line 870
23400      __cil_tmp136 = *((int *)__cil_tmp135);
23401#line 870
23402      __cil_tmp137 = (unsigned long )clips_ptr;
23403#line 870
23404      __cil_tmp138 = __cil_tmp137 + 6;
23405#line 870
23406      __cil_tmp139 = *((unsigned short *)__cil_tmp138);
23407#line 870
23408      __cil_tmp140 = (int )__cil_tmp139;
23409#line 870
23410      clip_y2 = __cil_tmp140 - __cil_tmp136;
23411      {
23412#line 874
23413      __cil_tmp141 = 48 + 68;
23414#line 874
23415      __cil_tmp142 = 0 + __cil_tmp141;
23416#line 874
23417      __cil_tmp143 = (unsigned long )unit;
23418#line 874
23419      __cil_tmp144 = __cil_tmp143 + __cil_tmp142;
23420#line 874
23421      __cil_tmp145 = *((int *)__cil_tmp144);
23422#line 874
23423      if (clip_x1 >= __cil_tmp145) {
23424#line 877
23425        goto __Cont___0;
23426      } else {
23427        {
23428#line 874
23429        __cil_tmp146 = 48 + 88;
23430#line 874
23431        __cil_tmp147 = 0 + __cil_tmp146;
23432#line 874
23433        __cil_tmp148 = (unsigned long )unit;
23434#line 874
23435        __cil_tmp149 = __cil_tmp148 + __cil_tmp147;
23436#line 874
23437        __cil_tmp150 = *((int *)__cil_tmp149);
23438#line 874
23439        if (clip_y1 >= __cil_tmp150) {
23440#line 877
23441          goto __Cont___0;
23442        } else
23443#line 874
23444        if (clip_x2 <= 0) {
23445#line 877
23446          goto __Cont___0;
23447        } else
23448#line 874
23449        if (clip_y2 <= 0) {
23450#line 877
23451          goto __Cont___0;
23452        } else {
23453
23454        }
23455        }
23456      }
23457      }
23458#line 880
23459      __min1 = clip_x2;
23460#line 880
23461      __cil_tmp151 = 48 + 68;
23462#line 880
23463      __cil_tmp152 = 0 + __cil_tmp151;
23464#line 880
23465      __cil_tmp153 = (unsigned long )unit;
23466#line 880
23467      __cil_tmp154 = __cil_tmp153 + __cil_tmp152;
23468#line 880
23469      __min2 = *((int *)__cil_tmp154);
23470#line 880
23471      if (__min1 < __min2) {
23472#line 880
23473        tmp___11 = __min1;
23474      } else {
23475#line 880
23476        tmp___11 = __min2;
23477      }
23478#line 880
23479      clip_x2 = tmp___11;
23480#line 881
23481      __min1___0 = clip_y2;
23482#line 881
23483      __cil_tmp155 = 48 + 88;
23484#line 881
23485      __cil_tmp156 = 0 + __cil_tmp155;
23486#line 881
23487      __cil_tmp157 = (unsigned long )unit;
23488#line 881
23489      __cil_tmp158 = __cil_tmp157 + __cil_tmp156;
23490#line 881
23491      __min2___0 = *((int *)__cil_tmp158);
23492#line 881
23493      if (__min1___0 < __min2___0) {
23494#line 881
23495        tmp___12 = __min1___0;
23496      } else {
23497#line 881
23498        tmp___12 = __min2___0;
23499      }
23500#line 881
23501      clip_y2 = tmp___12;
23502#line 884
23503      __min1___1 = clip_x1;
23504#line 884
23505      __min2___1 = 0;
23506#line 884
23507      if (__min1___1 < __min2___1) {
23508#line 884
23509        tmp___13 = __min1___1;
23510      } else {
23511#line 884
23512        tmp___13 = __min2___1;
23513      }
23514#line 884
23515      move_x = tmp___13;
23516#line 885
23517      __min1___2 = clip_y1;
23518#line 885
23519      __min2___2 = 0;
23520#line 885
23521      if (__min1___2 < __min2___2) {
23522#line 885
23523        tmp___14 = __min1___2;
23524      } else {
23525#line 885
23526        tmp___14 = __min2___2;
23527      }
23528#line 885
23529      move_y = tmp___14;
23530#line 888
23531      __cil_tmp159 = blits + hit_num;
23532#line 888
23533      *((uint32_t *)__cil_tmp159) = (uint32_t )37;
23534#line 889
23535      __cil_tmp160 = 4 + 24;
23536#line 889
23537      __cil_tmp161 = blits + hit_num;
23538#line 889
23539      __cil_tmp162 = (unsigned long )__cil_tmp161;
23540#line 889
23541      __cil_tmp163 = __cil_tmp162 + __cil_tmp160;
23542#line 889
23543      __cil_tmp164 = (unsigned long )unit;
23544#line 889
23545      __cil_tmp165 = __cil_tmp164 + 2032;
23546#line 889
23547      *((uint32 *)__cil_tmp163) = *((unsigned int *)__cil_tmp165);
23548#line 890
23549      __cil_tmp166 = blits + hit_num;
23550#line 890
23551      __cil_tmp167 = (unsigned long )__cil_tmp166;
23552#line 890
23553      __cil_tmp168 = __cil_tmp167 + 4;
23554#line 890
23555      __cil_tmp169 = *((unsigned short *)clips_ptr);
23556#line 890
23557      __cil_tmp170 = (int )__cil_tmp169;
23558#line 890
23559      *((int32 *)__cil_tmp168) = __cil_tmp170 - move_x;
23560#line 891
23561      __cil_tmp171 = 0 + 4;
23562#line 891
23563      __cil_tmp172 = 4 + __cil_tmp171;
23564#line 891
23565      __cil_tmp173 = blits + hit_num;
23566#line 891
23567      __cil_tmp174 = (unsigned long )__cil_tmp173;
23568#line 891
23569      __cil_tmp175 = __cil_tmp174 + __cil_tmp172;
23570#line 891
23571      __cil_tmp176 = (unsigned long )clips_ptr;
23572#line 891
23573      __cil_tmp177 = __cil_tmp176 + 2;
23574#line 891
23575      __cil_tmp178 = *((unsigned short *)__cil_tmp177);
23576#line 891
23577      __cil_tmp179 = (int )__cil_tmp178;
23578#line 891
23579      *((int32 *)__cil_tmp175) = __cil_tmp179 - move_y;
23580#line 892
23581      __cil_tmp180 = 4 + 8;
23582#line 892
23583      __cil_tmp181 = blits + hit_num;
23584#line 892
23585      __cil_tmp182 = (unsigned long )__cil_tmp181;
23586#line 892
23587      __cil_tmp183 = __cil_tmp182 + __cil_tmp180;
23588#line 892
23589      *((int32 *)__cil_tmp183) = clip_x1 - move_x;
23590#line 893
23591      __cil_tmp184 = 8 + 4;
23592#line 893
23593      __cil_tmp185 = 4 + __cil_tmp184;
23594#line 893
23595      __cil_tmp186 = blits + hit_num;
23596#line 893
23597      __cil_tmp187 = (unsigned long )__cil_tmp186;
23598#line 893
23599      __cil_tmp188 = __cil_tmp187 + __cil_tmp185;
23600#line 893
23601      *((int32 *)__cil_tmp188) = clip_y1 - move_y;
23602#line 894
23603      __cil_tmp189 = 8 + 8;
23604#line 894
23605      __cil_tmp190 = 4 + __cil_tmp189;
23606#line 894
23607      __cil_tmp191 = blits + hit_num;
23608#line 894
23609      __cil_tmp192 = (unsigned long )__cil_tmp191;
23610#line 894
23611      __cil_tmp193 = __cil_tmp192 + __cil_tmp190;
23612#line 894
23613      *((int32 *)__cil_tmp193) = clip_x2;
23614#line 895
23615      __cil_tmp194 = 8 + 12;
23616#line 895
23617      __cil_tmp195 = 4 + __cil_tmp194;
23618#line 895
23619      __cil_tmp196 = blits + hit_num;
23620#line 895
23621      __cil_tmp197 = (unsigned long )__cil_tmp196;
23622#line 895
23623      __cil_tmp198 = __cil_tmp197 + __cil_tmp195;
23624#line 895
23625      *((int32 *)__cil_tmp198) = clip_y2;
23626#line 896
23627      hit_num = hit_num + 1;
23628      __Cont___0: /* CIL Label */ 
23629#line 866
23630      i = i + 1;
23631#line 866
23632      clips_ptr = clips_ptr + increment;
23633    }
23634    while_break___1: /* CIL Label */ ;
23635    }
23636#line 900
23637    if (hit_num == 0) {
23638#line 901
23639      goto __Cont___1;
23640    } else {
23641
23642    }
23643#line 904
23644    if (out_fence) {
23645#line 904
23646      if (*out_fence) {
23647        {
23648#line 905
23649        vmw_fence_obj_unreference(out_fence);
23650        }
23651      } else {
23652
23653      }
23654    } else {
23655
23656    }
23657    {
23658#line 907
23659    __cil_tmp199 = (unsigned long )hit_num;
23660#line 907
23661    fifo_size = 32UL * __cil_tmp199;
23662#line 908
23663    __cil_tmp200 = (void *)0;
23664#line 908
23665    __cil_tmp201 = (void *)blits;
23666#line 908
23667    __cil_tmp202 = (uint32_t )fifo_size;
23668#line 908
23669    __cil_tmp203 = (uint64_t )0;
23670#line 908
23671    __cil_tmp204 = (void *)0;
23672#line 908
23673    __cil_tmp205 = (struct drm_vmw_fence_rep *)__cil_tmp204;
23674#line 908
23675    ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp200, __cil_tmp201, __cil_tmp202,
23676                              __cil_tmp203, __cil_tmp205, out_fence);
23677#line 911
23678    __cil_tmp206 = ret != 0;
23679#line 911
23680    __cil_tmp207 = ! __cil_tmp206;
23681#line 911
23682    __cil_tmp208 = ! __cil_tmp207;
23683#line 911
23684    __cil_tmp209 = (long )__cil_tmp208;
23685#line 911
23686    tmp___15 = __builtin_expect(__cil_tmp209, 0L);
23687    }
23688#line 911
23689    if (tmp___15) {
23690#line 912
23691      goto while_break___0;
23692    } else {
23693
23694    }
23695    __Cont___1: /* CIL Label */ 
23696#line 861
23697    k = k + 1;
23698  }
23699  while_break___0: /* CIL Label */ ;
23700  }
23701  {
23702#line 915
23703  __cil_tmp210 = (void    *)blits;
23704#line 915
23705  kfree(__cil_tmp210);
23706  }
23707#line 917
23708  return (ret);
23709}
23710}
23711#line 920 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
23712int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer , struct drm_file *file_priv ,
23713                                 unsigned int flags , unsigned int color , struct drm_clip_rect *clips ,
23714                                 unsigned int num_clips ) 
23715{ struct vmw_private *dev_priv ;
23716  struct vmw_private *tmp___7 ;
23717  struct vmw_master *vmaster ;
23718  struct vmw_master *tmp___8 ;
23719  struct vmw_framebuffer_dmabuf *vfbd ;
23720  struct drm_framebuffer    *__mptr ;
23721  struct drm_clip_rect norect ;
23722  int ret ;
23723  int increment ;
23724  long tmp___9 ;
23725  struct drm_device *__cil_tmp17 ;
23726  unsigned long __cil_tmp18 ;
23727  unsigned long __cil_tmp19 ;
23728  struct drm_master *__cil_tmp20 ;
23729  struct vmw_framebuffer_dmabuf *__cil_tmp21 ;
23730  struct drm_framebuffer *__cil_tmp22 ;
23731  unsigned int __cil_tmp23 ;
23732  char *__cil_tmp24 ;
23733  char *__cil_tmp25 ;
23734  struct ttm_lock *__cil_tmp26 ;
23735  bool __cil_tmp27 ;
23736  int __cil_tmp28 ;
23737  int __cil_tmp29 ;
23738  int __cil_tmp30 ;
23739  long __cil_tmp31 ;
23740  unsigned long __cil_tmp32 ;
23741  struct drm_clip_rect *__cil_tmp33 ;
23742  unsigned long __cil_tmp34 ;
23743  unsigned long __cil_tmp35 ;
23744  unsigned long __cil_tmp36 ;
23745  unsigned long __cil_tmp37 ;
23746  unsigned int __cil_tmp38 ;
23747  unsigned long __cil_tmp39 ;
23748  unsigned long __cil_tmp40 ;
23749  unsigned long __cil_tmp41 ;
23750  unsigned int __cil_tmp42 ;
23751  unsigned long __cil_tmp43 ;
23752  unsigned long __cil_tmp44 ;
23753  struct vmw_framebuffer *__cil_tmp45 ;
23754  struct vmw_framebuffer *__cil_tmp46 ;
23755  void *__cil_tmp47 ;
23756  struct vmw_fence_obj **__cil_tmp48 ;
23757  struct ttm_lock *__cil_tmp49 ;
23758
23759  {
23760  {
23761#line 926
23762  __cil_tmp17 = *((struct drm_device **)framebuffer);
23763#line 926
23764  tmp___7 = vmw_priv(__cil_tmp17);
23765#line 926
23766  dev_priv = tmp___7;
23767#line 927
23768  __cil_tmp18 = (unsigned long )file_priv;
23769#line 927
23770  __cil_tmp19 = __cil_tmp18 + 152;
23771#line 927
23772  __cil_tmp20 = *((struct drm_master **)__cil_tmp19);
23773#line 927
23774  tmp___8 = vmw_master(__cil_tmp20);
23775#line 927
23776  vmaster = tmp___8;
23777#line 929
23778  __mptr = (struct drm_framebuffer    *)framebuffer;
23779#line 929
23780  __cil_tmp21 = (struct vmw_framebuffer_dmabuf *)0;
23781#line 929
23782  __cil_tmp22 = (struct drm_framebuffer *)__cil_tmp21;
23783#line 929
23784  __cil_tmp23 = (unsigned int )__cil_tmp22;
23785#line 929
23786  __cil_tmp24 = (char *)__mptr;
23787#line 929
23788  __cil_tmp25 = __cil_tmp24 - __cil_tmp23;
23789#line 929
23790  vfbd = (struct vmw_framebuffer_dmabuf *)__cil_tmp25;
23791#line 931
23792  increment = 1;
23793#line 933
23794  __cil_tmp26 = (struct ttm_lock *)vmaster;
23795#line 933
23796  __cil_tmp27 = (bool )1;
23797#line 933
23798  ret = ttm_read_lock(__cil_tmp26, __cil_tmp27);
23799#line 934
23800  __cil_tmp28 = ret != 0;
23801#line 934
23802  __cil_tmp29 = ! __cil_tmp28;
23803#line 934
23804  __cil_tmp30 = ! __cil_tmp29;
23805#line 934
23806  __cil_tmp31 = (long )__cil_tmp30;
23807#line 934
23808  tmp___9 = __builtin_expect(__cil_tmp31, 0L);
23809  }
23810#line 934
23811  if (tmp___9) {
23812#line 935
23813    return (ret);
23814  } else {
23815
23816  }
23817#line 937
23818  if (! num_clips) {
23819#line 938
23820    num_clips = 1U;
23821#line 939
23822    clips = & norect;
23823#line 940
23824    __cil_tmp32 = (unsigned long )(& norect) + 2;
23825#line 940
23826    *((unsigned short *)__cil_tmp32) = (unsigned short)0;
23827#line 940
23828    __cil_tmp33 = & norect;
23829#line 940
23830    __cil_tmp34 = (unsigned long )(& norect) + 2;
23831#line 940
23832    *((unsigned short *)__cil_tmp33) = *((unsigned short *)__cil_tmp34);
23833#line 941
23834    __cil_tmp35 = (unsigned long )(& norect) + 4;
23835#line 941
23836    __cil_tmp36 = (unsigned long )framebuffer;
23837#line 941
23838    __cil_tmp37 = __cil_tmp36 + 72;
23839#line 941
23840    __cil_tmp38 = *((unsigned int *)__cil_tmp37);
23841#line 941
23842    *((unsigned short *)__cil_tmp35) = (unsigned short )__cil_tmp38;
23843#line 942
23844    __cil_tmp39 = (unsigned long )(& norect) + 6;
23845#line 942
23846    __cil_tmp40 = (unsigned long )framebuffer;
23847#line 942
23848    __cil_tmp41 = __cil_tmp40 + 76;
23849#line 942
23850    __cil_tmp42 = *((unsigned int *)__cil_tmp41);
23851#line 942
23852    *((unsigned short *)__cil_tmp39) = (unsigned short )__cil_tmp42;
23853  } else
23854#line 943
23855  if (flags & 1U) {
23856#line 944
23857    num_clips = num_clips / 2U;
23858#line 945
23859    increment = 2;
23860  } else {
23861
23862  }
23863  {
23864#line 948
23865  __cil_tmp43 = (unsigned long )dev_priv;
23866#line 948
23867  __cil_tmp44 = __cil_tmp43 + 2608;
23868#line 948
23869  if (*((struct vmw_legacy_display **)__cil_tmp44)) {
23870    {
23871#line 949
23872    __cil_tmp45 = (struct vmw_framebuffer *)vfbd;
23873#line 949
23874    ret = do_dmabuf_dirty_ldu(dev_priv, __cil_tmp45, flags, color, clips, num_clips,
23875                              increment);
23876    }
23877  } else {
23878    {
23879#line 953
23880    __cil_tmp46 = (struct vmw_framebuffer *)vfbd;
23881#line 953
23882    __cil_tmp47 = (void *)0;
23883#line 953
23884    __cil_tmp48 = (struct vmw_fence_obj **)__cil_tmp47;
23885#line 953
23886    ret = do_dmabuf_dirty_sou(file_priv, dev_priv, __cil_tmp46, flags, color, clips,
23887                              num_clips, increment, __cil_tmp48);
23888    }
23889  }
23890  }
23891  {
23892#line 958
23893  __cil_tmp49 = (struct ttm_lock *)vmaster;
23894#line 958
23895  ttm_read_unlock(__cil_tmp49);
23896  }
23897#line 959
23898  return (ret);
23899}
23900}
23901#line 962 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
23902static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs  =    {& vmw_framebuffer_dmabuf_destroy, & vmw_framebuffer_create_handle, & vmw_framebuffer_dmabuf_dirty};
23903#line 971 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
23904static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb ) 
23905{ struct vmw_private *dev_priv ;
23906  struct vmw_private *tmp___7 ;
23907  struct vmw_framebuffer_dmabuf *vfbd ;
23908  struct drm_framebuffer    *__mptr ;
23909  int ret ;
23910  long tmp___8 ;
23911  int __ret_warn_on ;
23912  long tmp___9 ;
23913  struct drm_device *__cil_tmp10 ;
23914  struct drm_framebuffer *__cil_tmp11 ;
23915  struct vmw_framebuffer_dmabuf *__cil_tmp12 ;
23916  struct drm_framebuffer *__cil_tmp13 ;
23917  unsigned int __cil_tmp14 ;
23918  char *__cil_tmp15 ;
23919  char *__cil_tmp16 ;
23920  unsigned long __cil_tmp17 ;
23921  unsigned long __cil_tmp18 ;
23922  struct vmw_screen_object_display *__cil_tmp19 ;
23923  int __cil_tmp20 ;
23924  int __cil_tmp21 ;
23925  long __cil_tmp22 ;
23926  unsigned long __cil_tmp23 ;
23927  unsigned long __cil_tmp24 ;
23928  struct vmw_dma_buffer *__cil_tmp25 ;
23929  bool __cil_tmp26 ;
23930  bool __cil_tmp27 ;
23931  int __cil_tmp28 ;
23932  int __cil_tmp29 ;
23933  int __cil_tmp30 ;
23934  int __cil_tmp31 ;
23935  long __cil_tmp32 ;
23936  int    __cil_tmp33 ;
23937  int __cil_tmp34 ;
23938  int __cil_tmp35 ;
23939  long __cil_tmp36 ;
23940
23941  {
23942  {
23943#line 973
23944  __cil_tmp10 = *((struct drm_device **)vfb);
23945#line 973
23946  tmp___7 = vmw_priv(__cil_tmp10);
23947#line 973
23948  dev_priv = tmp___7;
23949#line 975
23950  __cil_tmp11 = (struct drm_framebuffer *)vfb;
23951#line 975
23952  __mptr = (struct drm_framebuffer    *)__cil_tmp11;
23953#line 975
23954  __cil_tmp12 = (struct vmw_framebuffer_dmabuf *)0;
23955#line 975
23956  __cil_tmp13 = (struct drm_framebuffer *)__cil_tmp12;
23957#line 975
23958  __cil_tmp14 = (unsigned int )__cil_tmp13;
23959#line 975
23960  __cil_tmp15 = (char *)__mptr;
23961#line 975
23962  __cil_tmp16 = __cil_tmp15 - __cil_tmp14;
23963#line 975
23964  vfbd = (struct vmw_framebuffer_dmabuf *)__cil_tmp16;
23965  }
23966  {
23967#line 979
23968  while (1) {
23969    while_continue: /* CIL Label */ ;
23970    {
23971#line 979
23972    __cil_tmp17 = (unsigned long )dev_priv;
23973#line 979
23974    __cil_tmp18 = __cil_tmp17 + 2616;
23975#line 979
23976    __cil_tmp19 = *((struct vmw_screen_object_display **)__cil_tmp18);
23977#line 979
23978    __cil_tmp20 = ! __cil_tmp19;
23979#line 979
23980    __cil_tmp21 = ! __cil_tmp20;
23981#line 979
23982    __cil_tmp22 = (long )__cil_tmp21;
23983#line 979
23984    tmp___8 = __builtin_expect(__cil_tmp22, 0L);
23985    }
23986#line 979
23987    if (tmp___8) {
23988      {
23989#line 979
23990      while (1) {
23991        while_continue___0: /* CIL Label */ ;
23992#line 979
23993        __asm__  volatile   ("1:\tud2\n"
23994                             ".pushsection __bug_table,\"a\"\n"
23995                             "2:\t.long 1b - 2b, %c0 - 2b\n"
23996                             "\t.word %c1, 0\n"
23997                             "\t.org 2b+%c2\n"
23998                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
23999                             "i" (979), "i" (12UL));
24000        {
24001#line 979
24002        while (1) {
24003          while_continue___1: /* CIL Label */ ;
24004        }
24005        while_break___1: /* CIL Label */ ;
24006        }
24007#line 979
24008        goto while_break___0;
24009      }
24010      while_break___0: /* CIL Label */ ;
24011      }
24012    } else {
24013
24014    }
24015#line 979
24016    goto while_break;
24017  }
24018  while_break: /* CIL Label */ ;
24019  }
24020  {
24021#line 981
24022  vmw_overlay_pause_all(dev_priv);
24023#line 983
24024  __cil_tmp23 = (unsigned long )vfbd;
24025#line 983
24026  __cil_tmp24 = __cil_tmp23 + 160;
24027#line 983
24028  __cil_tmp25 = *((struct vmw_dma_buffer **)__cil_tmp24);
24029#line 983
24030  __cil_tmp26 = (bool )1;
24031#line 983
24032  __cil_tmp27 = (bool )0;
24033#line 983
24034  ret = vmw_dmabuf_to_start_of_vram(dev_priv, __cil_tmp25, __cil_tmp26, __cil_tmp27);
24035#line 985
24036  vmw_overlay_resume_all(dev_priv);
24037#line 987
24038  __cil_tmp28 = ret != 0;
24039#line 987
24040  __cil_tmp29 = ! __cil_tmp28;
24041#line 987
24042  __ret_warn_on = ! __cil_tmp29;
24043#line 987
24044  __cil_tmp30 = ! __ret_warn_on;
24045#line 987
24046  __cil_tmp31 = ! __cil_tmp30;
24047#line 987
24048  __cil_tmp32 = (long )__cil_tmp31;
24049#line 987
24050  tmp___9 = __builtin_expect(__cil_tmp32, 0L);
24051  }
24052#line 987
24053  if (tmp___9) {
24054    {
24055#line 987
24056    __cil_tmp33 = (int    )987;
24057#line 987
24058    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c",
24059                       __cil_tmp33);
24060    }
24061  } else {
24062
24063  }
24064  {
24065#line 987
24066  __cil_tmp34 = ! __ret_warn_on;
24067#line 987
24068  __cil_tmp35 = ! __cil_tmp34;
24069#line 987
24070  __cil_tmp36 = (long )__cil_tmp35;
24071#line 987
24072  __builtin_expect(__cil_tmp36, 0L);
24073  }
24074#line 989
24075  return (0);
24076}
24077}
24078#line 992 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
24079static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb ) 
24080{ struct vmw_private *dev_priv ;
24081  struct vmw_private *tmp___7 ;
24082  struct vmw_framebuffer_dmabuf *vfbd ;
24083  struct drm_framebuffer    *__mptr ;
24084  int __ret_warn_on ;
24085  long tmp___8 ;
24086  int tmp___9 ;
24087  struct drm_device *__cil_tmp9 ;
24088  struct drm_framebuffer *__cil_tmp10 ;
24089  struct vmw_framebuffer_dmabuf *__cil_tmp11 ;
24090  struct drm_framebuffer *__cil_tmp12 ;
24091  unsigned int __cil_tmp13 ;
24092  char *__cil_tmp14 ;
24093  char *__cil_tmp15 ;
24094  unsigned long __cil_tmp16 ;
24095  unsigned long __cil_tmp17 ;
24096  struct vmw_dma_buffer *__cil_tmp18 ;
24097  unsigned long __cil_tmp19 ;
24098  unsigned long __cil_tmp20 ;
24099  struct vmw_dma_buffer *__cil_tmp21 ;
24100  int __cil_tmp22 ;
24101  int __cil_tmp23 ;
24102  int __cil_tmp24 ;
24103  int __cil_tmp25 ;
24104  long __cil_tmp26 ;
24105  int    __cil_tmp27 ;
24106  int __cil_tmp28 ;
24107  int __cil_tmp29 ;
24108  long __cil_tmp30 ;
24109  unsigned long __cil_tmp31 ;
24110  unsigned long __cil_tmp32 ;
24111  struct vmw_dma_buffer *__cil_tmp33 ;
24112  bool __cil_tmp34 ;
24113
24114  {
24115  {
24116#line 994
24117  __cil_tmp9 = *((struct drm_device **)vfb);
24118#line 994
24119  tmp___7 = vmw_priv(__cil_tmp9);
24120#line 994
24121  dev_priv = tmp___7;
24122#line 996
24123  __cil_tmp10 = (struct drm_framebuffer *)vfb;
24124#line 996
24125  __mptr = (struct drm_framebuffer    *)__cil_tmp10;
24126#line 996
24127  __cil_tmp11 = (struct vmw_framebuffer_dmabuf *)0;
24128#line 996
24129  __cil_tmp12 = (struct drm_framebuffer *)__cil_tmp11;
24130#line 996
24131  __cil_tmp13 = (unsigned int )__cil_tmp12;
24132#line 996
24133  __cil_tmp14 = (char *)__mptr;
24134#line 996
24135  __cil_tmp15 = __cil_tmp14 - __cil_tmp13;
24136#line 996
24137  vfbd = (struct vmw_framebuffer_dmabuf *)__cil_tmp15;
24138  }
24139  {
24140#line 998
24141  __cil_tmp16 = (unsigned long )vfbd;
24142#line 998
24143  __cil_tmp17 = __cil_tmp16 + 160;
24144#line 998
24145  __cil_tmp18 = *((struct vmw_dma_buffer **)__cil_tmp17);
24146#line 998
24147  if (! __cil_tmp18) {
24148    {
24149#line 999
24150    __cil_tmp19 = (unsigned long )vfbd;
24151#line 999
24152    __cil_tmp20 = __cil_tmp19 + 160;
24153#line 999
24154    __cil_tmp21 = *((struct vmw_dma_buffer **)__cil_tmp20);
24155#line 999
24156    __cil_tmp22 = ! __cil_tmp21;
24157#line 999
24158    __cil_tmp23 = ! __cil_tmp22;
24159#line 999
24160    __ret_warn_on = ! __cil_tmp23;
24161#line 999
24162    __cil_tmp24 = ! __ret_warn_on;
24163#line 999
24164    __cil_tmp25 = ! __cil_tmp24;
24165#line 999
24166    __cil_tmp26 = (long )__cil_tmp25;
24167#line 999
24168    tmp___8 = __builtin_expect(__cil_tmp26, 0L);
24169    }
24170#line 999
24171    if (tmp___8) {
24172      {
24173#line 999
24174      __cil_tmp27 = (int    )999;
24175#line 999
24176      warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c",
24177                         __cil_tmp27);
24178      }
24179    } else {
24180
24181    }
24182    {
24183#line 999
24184    __cil_tmp28 = ! __ret_warn_on;
24185#line 999
24186    __cil_tmp29 = ! __cil_tmp28;
24187#line 999
24188    __cil_tmp30 = (long )__cil_tmp29;
24189#line 999
24190    __builtin_expect(__cil_tmp30, 0L);
24191    }
24192#line 1000
24193    return (0);
24194  } else {
24195
24196  }
24197  }
24198  {
24199#line 1003
24200  __cil_tmp31 = (unsigned long )vfbd;
24201#line 1003
24202  __cil_tmp32 = __cil_tmp31 + 160;
24203#line 1003
24204  __cil_tmp33 = *((struct vmw_dma_buffer **)__cil_tmp32);
24205#line 1003
24206  __cil_tmp34 = (bool )0;
24207#line 1003
24208  tmp___9 = vmw_dmabuf_unpin(dev_priv, __cil_tmp33, __cil_tmp34);
24209  }
24210#line 1003
24211  return (tmp___9);
24212}
24213}
24214#line 1006 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
24215static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv , struct vmw_dma_buffer *dmabuf ,
24216                                          struct vmw_framebuffer **out , struct drm_mode_fb_cmd    *mode_cmd ) 
24217{ struct drm_device *dev ;
24218  struct vmw_framebuffer_dmabuf *vfbd ;
24219  unsigned int requested_size ;
24220  int ret ;
24221  long tmp___7 ;
24222  void *tmp___8 ;
24223  struct vmw_dma_buffer *tmp___9 ;
24224  unsigned long __cil_tmp12 ;
24225  unsigned long __cil_tmp13 ;
24226  unsigned long __cil_tmp14 ;
24227  unsigned long __cil_tmp15 ;
24228  __u32    __cil_tmp16 ;
24229  unsigned long __cil_tmp17 ;
24230  unsigned long __cil_tmp18 ;
24231  __u32    __cil_tmp19 ;
24232  __u32    __cil_tmp20 ;
24233  unsigned long __cil_tmp21 ;
24234  unsigned long __cil_tmp22 ;
24235  unsigned long __cil_tmp23 ;
24236  unsigned long __cil_tmp24 ;
24237  unsigned long __cil_tmp25 ;
24238  unsigned long __cil_tmp26 ;
24239  unsigned long __cil_tmp27 ;
24240  int __cil_tmp28 ;
24241  int __cil_tmp29 ;
24242  int __cil_tmp30 ;
24243  long __cil_tmp31 ;
24244  unsigned long __cil_tmp32 ;
24245  unsigned long __cil_tmp33 ;
24246  unsigned long __cil_tmp34 ;
24247  unsigned long __cil_tmp35 ;
24248  __u32    __cil_tmp36 ;
24249  unsigned long __cil_tmp37 ;
24250  unsigned long __cil_tmp38 ;
24251  __u32    __cil_tmp39 ;
24252  unsigned long __cil_tmp40 ;
24253  unsigned long __cil_tmp41 ;
24254  __u32    __cil_tmp42 ;
24255  unsigned long __cil_tmp43 ;
24256  unsigned long __cil_tmp44 ;
24257  __u32    __cil_tmp45 ;
24258  unsigned long __cil_tmp46 ;
24259  unsigned long __cil_tmp47 ;
24260  __u32    __cil_tmp48 ;
24261  unsigned long __cil_tmp49 ;
24262  unsigned long __cil_tmp50 ;
24263  __u32    __cil_tmp51 ;
24264  unsigned long __cil_tmp52 ;
24265  unsigned long __cil_tmp53 ;
24266  __u32    __cil_tmp54 ;
24267  unsigned long __cil_tmp55 ;
24268  unsigned long __cil_tmp56 ;
24269  __u32    __cil_tmp57 ;
24270  struct drm_framebuffer *__cil_tmp58 ;
24271  struct drm_framebuffer_funcs    *__cil_tmp59 ;
24272  unsigned long __cil_tmp60 ;
24273  unsigned long __cil_tmp61 ;
24274  unsigned long __cil_tmp62 ;
24275  unsigned long __cil_tmp63 ;
24276  unsigned long __cil_tmp64 ;
24277  unsigned long __cil_tmp65 ;
24278  __u32    __cil_tmp66 ;
24279  unsigned long __cil_tmp67 ;
24280  unsigned long __cil_tmp68 ;
24281  unsigned long __cil_tmp69 ;
24282  unsigned long __cil_tmp70 ;
24283  unsigned long __cil_tmp71 ;
24284  unsigned long __cil_tmp72 ;
24285  unsigned long __cil_tmp73 ;
24286  unsigned long __cil_tmp74 ;
24287  __u32    __cil_tmp75 ;
24288  unsigned long __cil_tmp76 ;
24289  unsigned long __cil_tmp77 ;
24290  unsigned long __cil_tmp78 ;
24291  unsigned long __cil_tmp79 ;
24292  unsigned long __cil_tmp80 ;
24293  unsigned long __cil_tmp81 ;
24294  __u32    __cil_tmp82 ;
24295  unsigned long __cil_tmp83 ;
24296  unsigned long __cil_tmp84 ;
24297  unsigned long __cil_tmp85 ;
24298  unsigned long __cil_tmp86 ;
24299  unsigned long __cil_tmp87 ;
24300  unsigned long __cil_tmp88 ;
24301  __u32    __cil_tmp89 ;
24302  unsigned long __cil_tmp90 ;
24303  unsigned long __cil_tmp91 ;
24304  unsigned long __cil_tmp92 ;
24305  unsigned long __cil_tmp93 ;
24306  unsigned long __cil_tmp94 ;
24307  unsigned long __cil_tmp95 ;
24308  __u32    __cil_tmp96 ;
24309  unsigned long __cil_tmp97 ;
24310  unsigned long __cil_tmp98 ;
24311  struct vmw_screen_object_display *__cil_tmp99 ;
24312  unsigned long __cil_tmp100 ;
24313  unsigned long __cil_tmp101 ;
24314  unsigned long __cil_tmp102 ;
24315  unsigned long __cil_tmp103 ;
24316  unsigned long __cil_tmp104 ;
24317  unsigned long __cil_tmp105 ;
24318  unsigned long __cil_tmp106 ;
24319  unsigned long __cil_tmp107 ;
24320  unsigned long __cil_tmp108 ;
24321  unsigned long __cil_tmp109 ;
24322  unsigned long __cil_tmp110 ;
24323  unsigned long __cil_tmp111 ;
24324  unsigned long __cil_tmp112 ;
24325  unsigned long __cil_tmp113 ;
24326  unsigned long __cil_tmp114 ;
24327  unsigned long __cil_tmp115 ;
24328  __u32    __cil_tmp116 ;
24329  struct drm_framebuffer *__cil_tmp117 ;
24330  void    *__cil_tmp118 ;
24331
24332  {
24333  {
24334#line 1013
24335  __cil_tmp12 = (unsigned long )dev_priv;
24336#line 1013
24337  __cil_tmp13 = __cil_tmp12 + 2088;
24338#line 1013
24339  dev = *((struct drm_device **)__cil_tmp13);
24340#line 1018
24341  __cil_tmp14 = (unsigned long )mode_cmd;
24342#line 1018
24343  __cil_tmp15 = __cil_tmp14 + 12;
24344#line 1018
24345  __cil_tmp16 = *((__u32    *)__cil_tmp15);
24346#line 1018
24347  __cil_tmp17 = (unsigned long )mode_cmd;
24348#line 1018
24349  __cil_tmp18 = __cil_tmp17 + 8;
24350#line 1018
24351  __cil_tmp19 = *((__u32    *)__cil_tmp18);
24352#line 1018
24353  __cil_tmp20 = __cil_tmp19 * __cil_tmp16;
24354#line 1018
24355  requested_size = (unsigned int )__cil_tmp20;
24356#line 1019
24357  __cil_tmp21 = 1UL << 12;
24358#line 1019
24359  __cil_tmp22 = 0 + 40;
24360#line 1019
24361  __cil_tmp23 = (unsigned long )dmabuf;
24362#line 1019
24363  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
24364#line 1019
24365  __cil_tmp25 = *((unsigned long *)__cil_tmp24);
24366#line 1019
24367  __cil_tmp26 = __cil_tmp25 * __cil_tmp21;
24368#line 1019
24369  __cil_tmp27 = (unsigned long )requested_size;
24370#line 1019
24371  __cil_tmp28 = __cil_tmp27 > __cil_tmp26;
24372#line 1019
24373  __cil_tmp29 = ! __cil_tmp28;
24374#line 1019
24375  __cil_tmp30 = ! __cil_tmp29;
24376#line 1019
24377  __cil_tmp31 = (long )__cil_tmp30;
24378#line 1019
24379  tmp___7 = __builtin_expect(__cil_tmp31, 0L);
24380  }
24381#line 1019
24382  if (tmp___7) {
24383    {
24384#line 1020
24385    drm_err("vmw_kms_new_framebuffer_dmabuf", "Screen buffer object size is too small for requested mode.\n");
24386    }
24387#line 1022
24388    return (-22);
24389  } else {
24390
24391  }
24392  {
24393#line 1026
24394  __cil_tmp32 = (unsigned long )dev_priv;
24395#line 1026
24396  __cil_tmp33 = __cil_tmp32 + 2616;
24397#line 1026
24398  if (*((struct vmw_screen_object_display **)__cil_tmp33)) {
24399    {
24400#line 1027
24401    __cil_tmp34 = (unsigned long )mode_cmd;
24402#line 1027
24403    __cil_tmp35 = __cil_tmp34 + 20;
24404#line 1027
24405    __cil_tmp36 = *((__u32    *)__cil_tmp35);
24406#line 1028
24407    if ((int )__cil_tmp36 == 32) {
24408#line 1028
24409      goto case_32;
24410    } else
24411#line 1029
24412    if ((int )__cil_tmp36 == 24) {
24413#line 1029
24414      goto case_32;
24415    } else
24416#line 1037
24417    if ((int )__cil_tmp36 == 16) {
24418#line 1037
24419      goto case_16;
24420    } else
24421#line 1038
24422    if ((int )__cil_tmp36 == 15) {
24423#line 1038
24424      goto case_16;
24425    } else {
24426      {
24427#line 1046
24428      goto switch_default;
24429#line 1027
24430      if (0) {
24431        case_32: /* CIL Label */ 
24432        case_24: /* CIL Label */ 
24433        {
24434#line 1031
24435        __cil_tmp37 = (unsigned long )mode_cmd;
24436#line 1031
24437        __cil_tmp38 = __cil_tmp37 + 16;
24438#line 1031
24439        __cil_tmp39 = *((__u32    *)__cil_tmp38);
24440#line 1031
24441        if (__cil_tmp39 == 32U) {
24442#line 1032
24443          goto switch_break;
24444        } else {
24445
24446        }
24447        }
24448        {
24449#line 1034
24450        __cil_tmp40 = (unsigned long )mode_cmd;
24451#line 1034
24452        __cil_tmp41 = __cil_tmp40 + 20;
24453#line 1034
24454        __cil_tmp42 = *((__u32    *)__cil_tmp41);
24455#line 1034
24456        __cil_tmp43 = (unsigned long )mode_cmd;
24457#line 1034
24458        __cil_tmp44 = __cil_tmp43 + 16;
24459#line 1034
24460        __cil_tmp45 = *((__u32    *)__cil_tmp44);
24461#line 1034
24462        drm_err("vmw_kms_new_framebuffer_dmabuf", "Invalid color depth/bbp: %d %d\n",
24463                __cil_tmp42, __cil_tmp45);
24464        }
24465#line 1036
24466        return (-22);
24467        case_16: /* CIL Label */ 
24468        case_15: /* CIL Label */ 
24469        {
24470#line 1040
24471        __cil_tmp46 = (unsigned long )mode_cmd;
24472#line 1040
24473        __cil_tmp47 = __cil_tmp46 + 16;
24474#line 1040
24475        __cil_tmp48 = *((__u32    *)__cil_tmp47);
24476#line 1040
24477        if (__cil_tmp48 == 16U) {
24478#line 1041
24479          goto switch_break;
24480        } else {
24481
24482        }
24483        }
24484        {
24485#line 1043
24486        __cil_tmp49 = (unsigned long )mode_cmd;
24487#line 1043
24488        __cil_tmp50 = __cil_tmp49 + 20;
24489#line 1043
24490        __cil_tmp51 = *((__u32    *)__cil_tmp50);
24491#line 1043
24492        __cil_tmp52 = (unsigned long )mode_cmd;
24493#line 1043
24494        __cil_tmp53 = __cil_tmp52 + 16;
24495#line 1043
24496        __cil_tmp54 = *((__u32    *)__cil_tmp53);
24497#line 1043
24498        drm_err("vmw_kms_new_framebuffer_dmabuf", "Invalid color depth/bbp: %d %d\n",
24499                __cil_tmp51, __cil_tmp54);
24500        }
24501#line 1045
24502        return (-22);
24503        switch_default: /* CIL Label */ 
24504        {
24505#line 1047
24506        __cil_tmp55 = (unsigned long )mode_cmd;
24507#line 1047
24508        __cil_tmp56 = __cil_tmp55 + 20;
24509#line 1047
24510        __cil_tmp57 = *((__u32    *)__cil_tmp56);
24511#line 1047
24512        drm_err("vmw_kms_new_framebuffer_dmabuf", "Invalid color depth: %d\n", __cil_tmp57);
24513        }
24514#line 1048
24515        return (-22);
24516      } else {
24517        switch_break: /* CIL Label */ ;
24518      }
24519      }
24520    }
24521    }
24522  } else {
24523
24524  }
24525  }
24526  {
24527#line 1052
24528  tmp___8 = kzalloc(168UL, 208U);
24529#line 1052
24530  vfbd = (struct vmw_framebuffer_dmabuf *)tmp___8;
24531  }
24532#line 1053
24533  if (! vfbd) {
24534#line 1054
24535    ret = -12;
24536#line 1055
24537    goto out_err1;
24538  } else {
24539
24540  }
24541  {
24542#line 1058
24543  __cil_tmp58 = (struct drm_framebuffer *)vfbd;
24544#line 1058
24545  __cil_tmp59 = (struct drm_framebuffer_funcs    *)(& vmw_framebuffer_dmabuf_funcs);
24546#line 1058
24547  ret = drm_framebuffer_init(dev, __cil_tmp58, __cil_tmp59);
24548  }
24549#line 1060
24550  if (ret) {
24551#line 1061
24552    goto out_err2;
24553  } else {
24554
24555  }
24556  {
24557#line 1063
24558  tmp___9 = vmw_dmabuf_reference(dmabuf);
24559  }
24560#line 1063
24561  if (tmp___9) {
24562
24563  } else {
24564    {
24565#line 1064
24566    drm_err("vmw_kms_new_framebuffer_dmabuf", "failed to reference dmabuf %p\n", dmabuf);
24567    }
24568#line 1065
24569    goto out_err3;
24570  }
24571#line 1068
24572  __cil_tmp60 = 0 + 84;
24573#line 1068
24574  __cil_tmp61 = 0 + __cil_tmp60;
24575#line 1068
24576  __cil_tmp62 = (unsigned long )vfbd;
24577#line 1068
24578  __cil_tmp63 = __cil_tmp62 + __cil_tmp61;
24579#line 1068
24580  __cil_tmp64 = (unsigned long )mode_cmd;
24581#line 1068
24582  __cil_tmp65 = __cil_tmp64 + 16;
24583#line 1068
24584  __cil_tmp66 = *((__u32    *)__cil_tmp65);
24585#line 1068
24586  *((int *)__cil_tmp63) = (int )__cil_tmp66;
24587#line 1069
24588  __cil_tmp67 = 0 * 4UL;
24589#line 1069
24590  __cil_tmp68 = 40 + __cil_tmp67;
24591#line 1069
24592  __cil_tmp69 = 0 + __cil_tmp68;
24593#line 1069
24594  __cil_tmp70 = 0 + __cil_tmp69;
24595#line 1069
24596  __cil_tmp71 = (unsigned long )vfbd;
24597#line 1069
24598  __cil_tmp72 = __cil_tmp71 + __cil_tmp70;
24599#line 1069
24600  __cil_tmp73 = (unsigned long )mode_cmd;
24601#line 1069
24602  __cil_tmp74 = __cil_tmp73 + 12;
24603#line 1069
24604  __cil_tmp75 = *((__u32    *)__cil_tmp74);
24605#line 1069
24606  *((unsigned int *)__cil_tmp72) = (unsigned int )__cil_tmp75;
24607#line 1070
24608  __cil_tmp76 = 0 + 80;
24609#line 1070
24610  __cil_tmp77 = 0 + __cil_tmp76;
24611#line 1070
24612  __cil_tmp78 = (unsigned long )vfbd;
24613#line 1070
24614  __cil_tmp79 = __cil_tmp78 + __cil_tmp77;
24615#line 1070
24616  __cil_tmp80 = (unsigned long )mode_cmd;
24617#line 1070
24618  __cil_tmp81 = __cil_tmp80 + 20;
24619#line 1070
24620  __cil_tmp82 = *((__u32    *)__cil_tmp81);
24621#line 1070
24622  *((unsigned int *)__cil_tmp79) = (unsigned int )__cil_tmp82;
24623#line 1071
24624  __cil_tmp83 = 0 + 72;
24625#line 1071
24626  __cil_tmp84 = 0 + __cil_tmp83;
24627#line 1071
24628  __cil_tmp85 = (unsigned long )vfbd;
24629#line 1071
24630  __cil_tmp86 = __cil_tmp85 + __cil_tmp84;
24631#line 1071
24632  __cil_tmp87 = (unsigned long )mode_cmd;
24633#line 1071
24634  __cil_tmp88 = __cil_tmp87 + 4;
24635#line 1071
24636  __cil_tmp89 = *((__u32    *)__cil_tmp88);
24637#line 1071
24638  *((unsigned int *)__cil_tmp86) = (unsigned int )__cil_tmp89;
24639#line 1072
24640  __cil_tmp90 = 0 + 76;
24641#line 1072
24642  __cil_tmp91 = 0 + __cil_tmp90;
24643#line 1072
24644  __cil_tmp92 = (unsigned long )vfbd;
24645#line 1072
24646  __cil_tmp93 = __cil_tmp92 + __cil_tmp91;
24647#line 1072
24648  __cil_tmp94 = (unsigned long )mode_cmd;
24649#line 1072
24650  __cil_tmp95 = __cil_tmp94 + 8;
24651#line 1072
24652  __cil_tmp96 = *((__u32    *)__cil_tmp95);
24653#line 1072
24654  *((unsigned int *)__cil_tmp93) = (unsigned int )__cil_tmp96;
24655  {
24656#line 1073
24657  __cil_tmp97 = (unsigned long )dev_priv;
24658#line 1073
24659  __cil_tmp98 = __cil_tmp97 + 2616;
24660#line 1073
24661  __cil_tmp99 = *((struct vmw_screen_object_display **)__cil_tmp98);
24662#line 1073
24663  if (! __cil_tmp99) {
24664#line 1074
24665    __cil_tmp100 = 0 + 120;
24666#line 1074
24667    __cil_tmp101 = (unsigned long )vfbd;
24668#line 1074
24669    __cil_tmp102 = __cil_tmp101 + __cil_tmp100;
24670#line 1074
24671    *((int (**)(struct vmw_framebuffer *fb ))__cil_tmp102) = & vmw_framebuffer_dmabuf_pin;
24672#line 1075
24673    __cil_tmp103 = 0 + 128;
24674#line 1075
24675    __cil_tmp104 = (unsigned long )vfbd;
24676#line 1075
24677    __cil_tmp105 = __cil_tmp104 + __cil_tmp103;
24678#line 1075
24679    *((int (**)(struct vmw_framebuffer *fb ))__cil_tmp105) = & vmw_framebuffer_dmabuf_unpin;
24680  } else {
24681
24682  }
24683  }
24684#line 1077
24685  __cil_tmp106 = 0 + 136;
24686#line 1077
24687  __cil_tmp107 = (unsigned long )vfbd;
24688#line 1077
24689  __cil_tmp108 = __cil_tmp107 + __cil_tmp106;
24690#line 1077
24691  *((bool *)__cil_tmp108) = (bool )1;
24692#line 1078
24693  __cil_tmp109 = (unsigned long )vfbd;
24694#line 1078
24695  __cil_tmp110 = __cil_tmp109 + 160;
24696#line 1078
24697  *((struct vmw_dma_buffer **)__cil_tmp110) = dmabuf;
24698#line 1079
24699  __cil_tmp111 = 0 + 152;
24700#line 1079
24701  __cil_tmp112 = (unsigned long )vfbd;
24702#line 1079
24703  __cil_tmp113 = __cil_tmp112 + __cil_tmp111;
24704#line 1079
24705  __cil_tmp114 = (unsigned long )mode_cmd;
24706#line 1079
24707  __cil_tmp115 = __cil_tmp114 + 24;
24708#line 1079
24709  __cil_tmp116 = *((__u32    *)__cil_tmp115);
24710#line 1079
24711  *((uint32_t *)__cil_tmp113) = (uint32_t )__cil_tmp116;
24712#line 1080
24713  *out = (struct vmw_framebuffer *)vfbd;
24714#line 1082
24715  return (0);
24716  out_err3: 
24717  {
24718#line 1085
24719  __cil_tmp117 = (struct drm_framebuffer *)vfbd;
24720#line 1085
24721  drm_framebuffer_cleanup(__cil_tmp117);
24722  }
24723  out_err2: 
24724  {
24725#line 1087
24726  __cil_tmp118 = (void    *)vfbd;
24727#line 1087
24728  kfree(__cil_tmp118);
24729  }
24730  out_err1: 
24731#line 1089
24732  return (ret);
24733}
24734}
24735#line 1096 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
24736static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev , struct drm_file *file_priv ,
24737                                                 struct drm_mode_fb_cmd2 *mode_cmd2 ) 
24738{ struct vmw_private *dev_priv ;
24739  struct vmw_private *tmp___7 ;
24740  struct ttm_object_file *tfile ;
24741  struct vmw_fpriv *tmp___8 ;
24742  struct vmw_framebuffer *vfb ;
24743  struct vmw_surface *surface ;
24744  struct vmw_dma_buffer *bo ;
24745  struct ttm_base_object *user_obj ;
24746  struct drm_mode_fb_cmd mode_cmd ;
24747  int ret ;
24748  void *tmp___9 ;
24749  bool tmp___10 ;
24750  void *tmp___11 ;
24751  long tmp___12 ;
24752  void *tmp___13 ;
24753  unsigned long __cil_tmp19 ;
24754  unsigned long __cil_tmp20 ;
24755  struct vmw_framebuffer **__cil_tmp21 ;
24756  void *__cil_tmp22 ;
24757  struct vmw_surface **__cil_tmp23 ;
24758  void *__cil_tmp24 ;
24759  struct vmw_dma_buffer **__cil_tmp25 ;
24760  void *__cil_tmp26 ;
24761  unsigned long __cil_tmp27 ;
24762  unsigned long __cil_tmp28 ;
24763  unsigned long __cil_tmp29 ;
24764  unsigned long __cil_tmp30 ;
24765  unsigned long __cil_tmp31 ;
24766  unsigned long __cil_tmp32 ;
24767  unsigned long __cil_tmp33 ;
24768  unsigned long __cil_tmp34 ;
24769  unsigned long __cil_tmp35 ;
24770  unsigned long __cil_tmp36 ;
24771  unsigned long __cil_tmp37 ;
24772  unsigned long __cil_tmp38 ;
24773  unsigned long __cil_tmp39 ;
24774  unsigned long __cil_tmp40 ;
24775  unsigned long __cil_tmp41 ;
24776  unsigned long __cil_tmp42 ;
24777  unsigned long __cil_tmp43 ;
24778  unsigned long __cil_tmp44 ;
24779  __u32 __cil_tmp45 ;
24780  unsigned long __cil_tmp46 ;
24781  __u32 *__cil_tmp47 ;
24782  unsigned long __cil_tmp48 ;
24783  __u32 *__cil_tmp49 ;
24784  int *__cil_tmp50 ;
24785  unsigned long __cil_tmp51 ;
24786  __u32 __cil_tmp52 ;
24787  unsigned long __cil_tmp53 ;
24788  __u32 __cil_tmp54 ;
24789  struct ttm_base_object **__cil_tmp55 ;
24790  unsigned long __cil_tmp56 ;
24791  __u32 __cil_tmp57 ;
24792  void *__cil_tmp58 ;
24793  unsigned long __cil_tmp59 ;
24794  struct ttm_base_object **__cil_tmp60 ;
24795  struct ttm_base_object *__cil_tmp61 ;
24796  unsigned long __cil_tmp62 ;
24797  int __cil_tmp63 ;
24798  int __cil_tmp64 ;
24799  int __cil_tmp65 ;
24800  long __cil_tmp66 ;
24801  unsigned long __cil_tmp67 ;
24802  __u32 __cil_tmp68 ;
24803  struct vmw_dma_buffer **__cil_tmp69 ;
24804  struct vmw_dma_buffer **__cil_tmp70 ;
24805  struct vmw_dma_buffer *__cil_tmp71 ;
24806  struct drm_mode_fb_cmd    *__cil_tmp72 ;
24807  struct vmw_surface **__cil_tmp73 ;
24808  struct vmw_surface **__cil_tmp74 ;
24809  struct vmw_surface *__cil_tmp75 ;
24810  struct drm_mode_fb_cmd    *__cil_tmp76 ;
24811  struct vmw_dma_buffer **__cil_tmp77 ;
24812  struct vmw_surface **__cil_tmp78 ;
24813  long __cil_tmp79 ;
24814  struct vmw_framebuffer **__cil_tmp80 ;
24815  struct vmw_framebuffer *__cil_tmp81 ;
24816  unsigned long __cil_tmp82 ;
24817  unsigned long __cil_tmp83 ;
24818  struct ttm_base_object **__cil_tmp84 ;
24819  struct vmw_framebuffer **__cil_tmp85 ;
24820  struct vmw_framebuffer *__cil_tmp86 ;
24821
24822  {
24823  {
24824#line 1100
24825  tmp___7 = vmw_priv(dev);
24826#line 1100
24827  dev_priv = tmp___7;
24828#line 1101
24829  tmp___8 = vmw_fpriv(file_priv);
24830#line 1101
24831  __cil_tmp19 = (unsigned long )tmp___8;
24832#line 1101
24833  __cil_tmp20 = __cil_tmp19 + 8;
24834#line 1101
24835  tfile = *((struct ttm_object_file **)__cil_tmp20);
24836#line 1102
24837  __cil_tmp21 = & vfb;
24838#line 1102
24839  __cil_tmp22 = (void *)0;
24840#line 1102
24841  *__cil_tmp21 = (struct vmw_framebuffer *)__cil_tmp22;
24842#line 1103
24843  __cil_tmp23 = & surface;
24844#line 1103
24845  __cil_tmp24 = (void *)0;
24846#line 1103
24847  *__cil_tmp23 = (struct vmw_surface *)__cil_tmp24;
24848#line 1104
24849  __cil_tmp25 = & bo;
24850#line 1104
24851  __cil_tmp26 = (void *)0;
24852#line 1104
24853  *__cil_tmp25 = (struct vmw_dma_buffer *)__cil_tmp26;
24854#line 1109
24855  __cil_tmp27 = (unsigned long )(& mode_cmd) + 4;
24856#line 1109
24857  __cil_tmp28 = (unsigned long )mode_cmd2;
24858#line 1109
24859  __cil_tmp29 = __cil_tmp28 + 4;
24860#line 1109
24861  *((__u32 *)__cil_tmp27) = *((__u32 *)__cil_tmp29);
24862#line 1110
24863  __cil_tmp30 = (unsigned long )(& mode_cmd) + 8;
24864#line 1110
24865  __cil_tmp31 = (unsigned long )mode_cmd2;
24866#line 1110
24867  __cil_tmp32 = __cil_tmp31 + 8;
24868#line 1110
24869  *((__u32 *)__cil_tmp30) = *((__u32 *)__cil_tmp32);
24870#line 1111
24871  __cil_tmp33 = (unsigned long )(& mode_cmd) + 12;
24872#line 1111
24873  __cil_tmp34 = 0 * 4UL;
24874#line 1111
24875  __cil_tmp35 = 36 + __cil_tmp34;
24876#line 1111
24877  __cil_tmp36 = (unsigned long )mode_cmd2;
24878#line 1111
24879  __cil_tmp37 = __cil_tmp36 + __cil_tmp35;
24880#line 1111
24881  *((__u32 *)__cil_tmp33) = *((__u32 *)__cil_tmp37);
24882#line 1112
24883  __cil_tmp38 = (unsigned long )(& mode_cmd) + 24;
24884#line 1112
24885  __cil_tmp39 = 0 * 4UL;
24886#line 1112
24887  __cil_tmp40 = 20 + __cil_tmp39;
24888#line 1112
24889  __cil_tmp41 = (unsigned long )mode_cmd2;
24890#line 1112
24891  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
24892#line 1112
24893  *((__u32 *)__cil_tmp38) = *((__u32 *)__cil_tmp42);
24894#line 1113
24895  __cil_tmp43 = (unsigned long )mode_cmd2;
24896#line 1113
24897  __cil_tmp44 = __cil_tmp43 + 12;
24898#line 1113
24899  __cil_tmp45 = *((__u32 *)__cil_tmp44);
24900#line 1113
24901  __cil_tmp46 = (unsigned long )(& mode_cmd) + 20;
24902#line 1113
24903  __cil_tmp47 = (__u32 *)__cil_tmp46;
24904#line 1113
24905  __cil_tmp48 = (unsigned long )(& mode_cmd) + 16;
24906#line 1113
24907  __cil_tmp49 = (__u32 *)__cil_tmp48;
24908#line 1113
24909  __cil_tmp50 = (int *)__cil_tmp49;
24910#line 1113
24911  drm_fb_get_bpp_depth(__cil_tmp45, __cil_tmp47, __cil_tmp50);
24912#line 1122
24913  __cil_tmp51 = (unsigned long )(& mode_cmd) + 12;
24914#line 1122
24915  __cil_tmp52 = *((__u32 *)__cil_tmp51);
24916#line 1122
24917  __cil_tmp53 = (unsigned long )(& mode_cmd) + 8;
24918#line 1122
24919  __cil_tmp54 = *((__u32 *)__cil_tmp53);
24920#line 1122
24921  tmp___10 = vmw_kms_validate_mode_vram(dev_priv, __cil_tmp52, __cil_tmp54);
24922  }
24923#line 1122
24924  if (tmp___10) {
24925
24926  } else {
24927    {
24928#line 1125
24929    drm_err("vmw_kms_fb_create", "VRAM size is too small for requested mode.\n");
24930#line 1126
24931    tmp___9 = (void *)ERR_PTR(-12L);
24932    }
24933#line 1126
24934    return ((struct drm_framebuffer *)tmp___9);
24935  }
24936  {
24937#line 1138
24938  __cil_tmp55 = & user_obj;
24939#line 1138
24940  __cil_tmp56 = (unsigned long )(& mode_cmd) + 24;
24941#line 1138
24942  __cil_tmp57 = *((__u32 *)__cil_tmp56);
24943#line 1138
24944  *__cil_tmp55 = ttm_base_object_lookup(tfile, __cil_tmp57);
24945#line 1139
24946  __cil_tmp58 = (void *)0;
24947#line 1139
24948  __cil_tmp59 = (unsigned long )__cil_tmp58;
24949#line 1139
24950  __cil_tmp60 = & user_obj;
24951#line 1139
24952  __cil_tmp61 = *__cil_tmp60;
24953#line 1139
24954  __cil_tmp62 = (unsigned long )__cil_tmp61;
24955#line 1139
24956  __cil_tmp63 = __cil_tmp62 == __cil_tmp59;
24957#line 1139
24958  __cil_tmp64 = ! __cil_tmp63;
24959#line 1139
24960  __cil_tmp65 = ! __cil_tmp64;
24961#line 1139
24962  __cil_tmp66 = (long )__cil_tmp65;
24963#line 1139
24964  tmp___12 = __builtin_expect(__cil_tmp66, 0L);
24965  }
24966#line 1139
24967  if (tmp___12) {
24968    {
24969#line 1140
24970    drm_err("vmw_kms_fb_create", "Could not locate requested kms frame buffer.\n");
24971#line 1141
24972    tmp___11 = (void *)ERR_PTR(-2L);
24973    }
24974#line 1141
24975    return ((struct drm_framebuffer *)tmp___11);
24976  } else {
24977
24978  }
24979  {
24980#line 1149
24981  __cil_tmp67 = (unsigned long )(& mode_cmd) + 24;
24982#line 1149
24983  __cil_tmp68 = *((__u32 *)__cil_tmp67);
24984#line 1149
24985  ret = vmw_user_lookup_handle(dev_priv, tfile, __cil_tmp68, & surface, & bo);
24986  }
24987#line 1152
24988  if (ret) {
24989#line 1153
24990    goto err_out;
24991  } else {
24992
24993  }
24994  {
24995#line 1156
24996  __cil_tmp69 = & bo;
24997#line 1156
24998  if (*__cil_tmp69) {
24999    {
25000#line 1157
25001    __cil_tmp70 = & bo;
25002#line 1157
25003    __cil_tmp71 = *__cil_tmp70;
25004#line 1157
25005    __cil_tmp72 = (struct drm_mode_fb_cmd    *)(& mode_cmd);
25006#line 1157
25007    ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, __cil_tmp71, & vfb, __cil_tmp72);
25008    }
25009  } else {
25010    {
25011#line 1159
25012    __cil_tmp73 = & surface;
25013#line 1159
25014    if (*__cil_tmp73) {
25015      {
25016#line 1160
25017      __cil_tmp74 = & surface;
25018#line 1160
25019      __cil_tmp75 = *__cil_tmp74;
25020#line 1160
25021      __cil_tmp76 = (struct drm_mode_fb_cmd    *)(& mode_cmd);
25022#line 1160
25023      ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, __cil_tmp75, & vfb,
25024                                            __cil_tmp76);
25025      }
25026    } else {
25027      {
25028#line 1163
25029      while (1) {
25030        while_continue: /* CIL Label */ ;
25031#line 1163
25032        __asm__  volatile   ("1:\tud2\n"
25033                             ".pushsection __bug_table,\"a\"\n"
25034                             "2:\t.long 1b - 2b, %c0 - 2b\n"
25035                             "\t.word %c1, 0\n"
25036                             "\t.org 2b+%c2\n"
25037                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
25038                             "i" (1163), "i" (12UL));
25039        {
25040#line 1163
25041        while (1) {
25042          while_continue___0: /* CIL Label */ ;
25043        }
25044        while_break___0: /* CIL Label */ ;
25045        }
25046#line 1163
25047        goto while_break;
25048      }
25049      while_break: /* CIL Label */ ;
25050      }
25051    }
25052    }
25053  }
25054  }
25055  err_out: 
25056  {
25057#line 1167
25058  __cil_tmp77 = & bo;
25059#line 1167
25060  if (*__cil_tmp77) {
25061    {
25062#line 1168
25063    vmw_dmabuf_unreference(& bo);
25064    }
25065  } else {
25066
25067  }
25068  }
25069  {
25070#line 1169
25071  __cil_tmp78 = & surface;
25072#line 1169
25073  if (*__cil_tmp78) {
25074    {
25075#line 1170
25076    vmw_surface_unreference(& surface);
25077    }
25078  } else {
25079
25080  }
25081  }
25082#line 1172
25083  if (ret) {
25084    {
25085#line 1173
25086    drm_err("vmw_kms_fb_create", "failed to create vmw_framebuffer: %i\n", ret);
25087#line 1174
25088    ttm_base_object_unref(& user_obj);
25089#line 1175
25090    __cil_tmp79 = (long )ret;
25091#line 1175
25092    tmp___13 = (void *)ERR_PTR(__cil_tmp79);
25093    }
25094#line 1175
25095    return ((struct drm_framebuffer *)tmp___13);
25096  } else {
25097#line 1177
25098    __cil_tmp80 = & vfb;
25099#line 1177
25100    __cil_tmp81 = *__cil_tmp80;
25101#line 1177
25102    __cil_tmp82 = (unsigned long )__cil_tmp81;
25103#line 1177
25104    __cil_tmp83 = __cil_tmp82 + 144;
25105#line 1177
25106    __cil_tmp84 = & user_obj;
25107#line 1177
25108    *((struct ttm_base_object **)__cil_tmp83) = *__cil_tmp84;
25109  }
25110  {
25111#line 1179
25112  __cil_tmp85 = & vfb;
25113#line 1179
25114  __cil_tmp86 = *__cil_tmp85;
25115#line 1179
25116  return ((struct drm_framebuffer *)__cil_tmp86);
25117  }
25118}
25119}
25120#line 1182 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
25121static struct drm_mode_config_funcs vmw_kms_funcs  =    {& vmw_kms_fb_create, (void (*)(struct drm_device *dev ))0};
25122#line 1186 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
25123int vmw_kms_present(struct vmw_private *dev_priv , struct drm_file *file_priv , struct vmw_framebuffer *vfb ,
25124                    struct vmw_surface *surface , uint32_t sid , int32_t destX , int32_t destY ,
25125                    struct drm_vmw_rect *clips , uint32_t num_clips ) 
25126{ struct vmw_display_unit *units[8] ;
25127  struct drm_clip_rect *tmp___7 ;
25128  struct drm_crtc *crtc ;
25129  size_t fifo_size ;
25130  int i ;
25131  int k ;
25132  int num_units ;
25133  int ret ;
25134  int left ;
25135  int right ;
25136  int top ;
25137  int bottom ;
25138  struct __anonstruct_cmd_434 *cmd ;
25139  SVGASignedRect *blits ;
25140  struct list_head    *__mptr ;
25141  struct list_head    *__mptr___0 ;
25142  int tmp___8 ;
25143  struct drm_crtc    *__mptr___1 ;
25144  long tmp___9 ;
25145  int tmp___10 ;
25146  long tmp___11 ;
25147  void *tmp___12 ;
25148  long tmp___13 ;
25149  void *tmp___14 ;
25150  long tmp___15 ;
25151  int __min1 ;
25152  int __min2 ;
25153  int tmp___16 ;
25154  int __max1 ;
25155  int __max2 ;
25156  int tmp___17 ;
25157  int __min1___0 ;
25158  int __min2___0 ;
25159  int tmp___18 ;
25160  int __max1___0 ;
25161  int __max2___0 ;
25162  int tmp___19 ;
25163  struct vmw_display_unit *unit ;
25164  struct vmw_clip_rect clip ;
25165  int num ;
25166  long tmp___20 ;
25167  unsigned long __cil_tmp51 ;
25168  unsigned long __cil_tmp52 ;
25169  unsigned long __cil_tmp53 ;
25170  struct drm_device *__cil_tmp54 ;
25171  unsigned long __cil_tmp55 ;
25172  unsigned long __cil_tmp56 ;
25173  struct list_head *__cil_tmp57 ;
25174  struct drm_crtc *__cil_tmp58 ;
25175  unsigned long __cil_tmp59 ;
25176  unsigned long __cil_tmp60 ;
25177  struct list_head *__cil_tmp61 ;
25178  unsigned int __cil_tmp62 ;
25179  char *__cil_tmp63 ;
25180  char *__cil_tmp64 ;
25181  unsigned long __cil_tmp65 ;
25182  unsigned long __cil_tmp66 ;
25183  unsigned long __cil_tmp67 ;
25184  struct drm_device *__cil_tmp68 ;
25185  unsigned long __cil_tmp69 ;
25186  unsigned long __cil_tmp70 ;
25187  struct list_head *__cil_tmp71 ;
25188  unsigned long __cil_tmp72 ;
25189  unsigned long __cil_tmp73 ;
25190  unsigned long __cil_tmp74 ;
25191  struct list_head *__cil_tmp75 ;
25192  unsigned long __cil_tmp76 ;
25193  struct drm_framebuffer *__cil_tmp77 ;
25194  unsigned long __cil_tmp78 ;
25195  unsigned long __cil_tmp79 ;
25196  unsigned long __cil_tmp80 ;
25197  struct drm_framebuffer *__cil_tmp81 ;
25198  unsigned long __cil_tmp82 ;
25199  unsigned long __cil_tmp83 ;
25200  unsigned long __cil_tmp84 ;
25201  struct vmw_display_unit *__cil_tmp85 ;
25202  struct drm_crtc *__cil_tmp86 ;
25203  unsigned int __cil_tmp87 ;
25204  char *__cil_tmp88 ;
25205  char *__cil_tmp89 ;
25206  unsigned long __cil_tmp90 ;
25207  unsigned long __cil_tmp91 ;
25208  struct list_head *__cil_tmp92 ;
25209  struct drm_crtc *__cil_tmp93 ;
25210  unsigned long __cil_tmp94 ;
25211  unsigned long __cil_tmp95 ;
25212  struct list_head *__cil_tmp96 ;
25213  unsigned int __cil_tmp97 ;
25214  char *__cil_tmp98 ;
25215  char *__cil_tmp99 ;
25216  void *__cil_tmp100 ;
25217  unsigned long __cil_tmp101 ;
25218  unsigned long __cil_tmp102 ;
25219  int __cil_tmp103 ;
25220  int __cil_tmp104 ;
25221  int __cil_tmp105 ;
25222  long __cil_tmp106 ;
25223  long __cil_tmp107 ;
25224  unsigned long __cil_tmp108 ;
25225  unsigned long __cil_tmp109 ;
25226  void *__cil_tmp110 ;
25227  unsigned long __cil_tmp111 ;
25228  unsigned long __cil_tmp112 ;
25229  int __cil_tmp113 ;
25230  int __cil_tmp114 ;
25231  int __cil_tmp115 ;
25232  long __cil_tmp116 ;
25233  unsigned long __cil_tmp117 ;
25234  unsigned long __cil_tmp118 ;
25235  void *__cil_tmp119 ;
25236  unsigned long __cil_tmp120 ;
25237  unsigned long __cil_tmp121 ;
25238  int __cil_tmp122 ;
25239  int __cil_tmp123 ;
25240  int __cil_tmp124 ;
25241  long __cil_tmp125 ;
25242  unsigned long __cil_tmp126 ;
25243  unsigned long __cil_tmp127 ;
25244  uint32_t __cil_tmp128 ;
25245  int32_t __cil_tmp129 ;
25246  uint32_t __cil_tmp130 ;
25247  uint32_t __cil_tmp131 ;
25248  unsigned long __cil_tmp132 ;
25249  unsigned long __cil_tmp133 ;
25250  unsigned long __cil_tmp134 ;
25251  unsigned long __cil_tmp135 ;
25252  uint32_t __cil_tmp136 ;
25253  unsigned long __cil_tmp137 ;
25254  unsigned long __cil_tmp138 ;
25255  int32_t __cil_tmp139 ;
25256  uint32_t __cil_tmp140 ;
25257  uint32_t __cil_tmp141 ;
25258  uint32_t __cil_tmp142 ;
25259  struct drm_vmw_rect *__cil_tmp143 ;
25260  struct drm_vmw_rect *__cil_tmp144 ;
25261  unsigned long __cil_tmp145 ;
25262  unsigned long __cil_tmp146 ;
25263  uint32_t __cil_tmp147 ;
25264  struct drm_vmw_rect *__cil_tmp148 ;
25265  int32_t __cil_tmp149 ;
25266  uint32_t __cil_tmp150 ;
25267  uint32_t __cil_tmp151 ;
25268  struct drm_vmw_rect *__cil_tmp152 ;
25269  unsigned long __cil_tmp153 ;
25270  unsigned long __cil_tmp154 ;
25271  struct drm_vmw_rect *__cil_tmp155 ;
25272  unsigned long __cil_tmp156 ;
25273  unsigned long __cil_tmp157 ;
25274  uint32_t __cil_tmp158 ;
25275  struct drm_vmw_rect *__cil_tmp159 ;
25276  unsigned long __cil_tmp160 ;
25277  unsigned long __cil_tmp161 ;
25278  int32_t __cil_tmp162 ;
25279  uint32_t __cil_tmp163 ;
25280  uint32_t __cil_tmp164 ;
25281  void *__cil_tmp165 ;
25282  struct __anonstruct_cmd_434 *__cil_tmp166 ;
25283  unsigned long __cil_tmp167 ;
25284  unsigned long __cil_tmp168 ;
25285  unsigned long __cil_tmp169 ;
25286  unsigned long __cil_tmp170 ;
25287  unsigned long __cil_tmp171 ;
25288  unsigned long __cil_tmp172 ;
25289  unsigned long __cil_tmp173 ;
25290  unsigned long __cil_tmp174 ;
25291  unsigned long __cil_tmp175 ;
25292  unsigned long __cil_tmp176 ;
25293  unsigned long __cil_tmp177 ;
25294  unsigned long __cil_tmp178 ;
25295  unsigned long __cil_tmp179 ;
25296  unsigned long __cil_tmp180 ;
25297  unsigned long __cil_tmp181 ;
25298  uint32_t __cil_tmp182 ;
25299  struct drm_clip_rect *__cil_tmp183 ;
25300  struct drm_vmw_rect *__cil_tmp184 ;
25301  int32_t __cil_tmp185 ;
25302  int32_t __cil_tmp186 ;
25303  struct drm_clip_rect *__cil_tmp187 ;
25304  unsigned long __cil_tmp188 ;
25305  unsigned long __cil_tmp189 ;
25306  uint32_t __cil_tmp190 ;
25307  struct drm_vmw_rect *__cil_tmp191 ;
25308  unsigned long __cil_tmp192 ;
25309  unsigned long __cil_tmp193 ;
25310  uint32_t __cil_tmp194 ;
25311  struct drm_vmw_rect *__cil_tmp195 ;
25312  int32_t __cil_tmp196 ;
25313  uint32_t __cil_tmp197 ;
25314  uint32_t __cil_tmp198 ;
25315  uint32_t __cil_tmp199 ;
25316  struct drm_clip_rect *__cil_tmp200 ;
25317  unsigned long __cil_tmp201 ;
25318  unsigned long __cil_tmp202 ;
25319  struct drm_vmw_rect *__cil_tmp203 ;
25320  unsigned long __cil_tmp204 ;
25321  unsigned long __cil_tmp205 ;
25322  int32_t __cil_tmp206 ;
25323  int32_t __cil_tmp207 ;
25324  struct drm_clip_rect *__cil_tmp208 ;
25325  unsigned long __cil_tmp209 ;
25326  unsigned long __cil_tmp210 ;
25327  uint32_t __cil_tmp211 ;
25328  struct drm_vmw_rect *__cil_tmp212 ;
25329  unsigned long __cil_tmp213 ;
25330  unsigned long __cil_tmp214 ;
25331  uint32_t __cil_tmp215 ;
25332  struct drm_vmw_rect *__cil_tmp216 ;
25333  unsigned long __cil_tmp217 ;
25334  unsigned long __cil_tmp218 ;
25335  int32_t __cil_tmp219 ;
25336  uint32_t __cil_tmp220 ;
25337  uint32_t __cil_tmp221 ;
25338  uint32_t __cil_tmp222 ;
25339  unsigned long __cil_tmp223 ;
25340  unsigned long __cil_tmp224 ;
25341  unsigned long __cil_tmp225 ;
25342  unsigned long __cil_tmp226 ;
25343  unsigned long __cil_tmp227 ;
25344  int __cil_tmp228 ;
25345  int __cil_tmp229 ;
25346  unsigned long __cil_tmp230 ;
25347  unsigned long __cil_tmp231 ;
25348  unsigned long __cil_tmp232 ;
25349  int __cil_tmp233 ;
25350  int __cil_tmp234 ;
25351  unsigned long __cil_tmp235 ;
25352  unsigned long __cil_tmp236 ;
25353  unsigned long __cil_tmp237 ;
25354  int __cil_tmp238 ;
25355  int __cil_tmp239 ;
25356  unsigned long __cil_tmp240 ;
25357  unsigned long __cil_tmp241 ;
25358  unsigned long __cil_tmp242 ;
25359  int __cil_tmp243 ;
25360  int __cil_tmp244 ;
25361  unsigned long __cil_tmp245 ;
25362  unsigned long __cil_tmp246 ;
25363  unsigned long __cil_tmp247 ;
25364  unsigned long __cil_tmp248 ;
25365  int __cil_tmp249 ;
25366  unsigned long __cil_tmp250 ;
25367  unsigned long __cil_tmp251 ;
25368  unsigned long __cil_tmp252 ;
25369  unsigned long __cil_tmp253 ;
25370  int __cil_tmp254 ;
25371  unsigned long __cil_tmp255 ;
25372  unsigned long __cil_tmp256 ;
25373  unsigned long __cil_tmp257 ;
25374  unsigned long __cil_tmp258 ;
25375  unsigned long __cil_tmp259 ;
25376  unsigned long __cil_tmp260 ;
25377  unsigned long __cil_tmp261 ;
25378  unsigned long __cil_tmp262 ;
25379  unsigned long __cil_tmp263 ;
25380  unsigned long __cil_tmp264 ;
25381  unsigned long __cil_tmp265 ;
25382  unsigned long __cil_tmp266 ;
25383  unsigned long __cil_tmp267 ;
25384  unsigned long __cil_tmp268 ;
25385  unsigned long __cil_tmp269 ;
25386  unsigned long __cil_tmp270 ;
25387  unsigned long __cil_tmp271 ;
25388  unsigned long __cil_tmp272 ;
25389  unsigned long __cil_tmp273 ;
25390  int __cil_tmp274 ;
25391  unsigned long __cil_tmp275 ;
25392  unsigned long __cil_tmp276 ;
25393  unsigned long __cil_tmp277 ;
25394  unsigned long __cil_tmp278 ;
25395  int __cil_tmp279 ;
25396  unsigned long __cil_tmp280 ;
25397  unsigned long __cil_tmp281 ;
25398  unsigned long __cil_tmp282 ;
25399  unsigned long __cil_tmp283 ;
25400  unsigned long __cil_tmp284 ;
25401  unsigned long __cil_tmp285 ;
25402  unsigned long __cil_tmp286 ;
25403  int __cil_tmp287 ;
25404  int *__cil_tmp288 ;
25405  int __cil_tmp289 ;
25406  int *__cil_tmp290 ;
25407  int __cil_tmp291 ;
25408  unsigned long __cil_tmp292 ;
25409  unsigned long __cil_tmp293 ;
25410  unsigned long __cil_tmp294 ;
25411  unsigned long __cil_tmp295 ;
25412  unsigned long __cil_tmp296 ;
25413  size_t __cil_tmp297 ;
25414  void *__cil_tmp298 ;
25415  void *__cil_tmp299 ;
25416  uint32_t __cil_tmp300 ;
25417  uint64_t __cil_tmp301 ;
25418  void *__cil_tmp302 ;
25419  struct drm_vmw_fence_rep *__cil_tmp303 ;
25420  void *__cil_tmp304 ;
25421  struct vmw_fence_obj **__cil_tmp305 ;
25422  int __cil_tmp306 ;
25423  int __cil_tmp307 ;
25424  int __cil_tmp308 ;
25425  long __cil_tmp309 ;
25426  void    *__cil_tmp310 ;
25427  void    *__cil_tmp311 ;
25428  int clip_y2312 ;
25429  int clip_y1313 ;
25430  int clip_x2314 ;
25431  int clip_x1315 ;
25432
25433  {
25434#line 1200
25435  ret = 0;
25436#line 1209
25437  num_units = 0;
25438#line 1210
25439  __cil_tmp51 = 1152 + 296;
25440#line 1210
25441  __cil_tmp52 = (unsigned long )dev_priv;
25442#line 1210
25443  __cil_tmp53 = __cil_tmp52 + 2088;
25444#line 1210
25445  __cil_tmp54 = *((struct drm_device **)__cil_tmp53);
25446#line 1210
25447  __cil_tmp55 = (unsigned long )__cil_tmp54;
25448#line 1210
25449  __cil_tmp56 = __cil_tmp55 + __cil_tmp51;
25450#line 1210
25451  __cil_tmp57 = *((struct list_head **)__cil_tmp56);
25452#line 1210
25453  __mptr = (struct list_head    *)__cil_tmp57;
25454#line 1210
25455  __cil_tmp58 = (struct drm_crtc *)0;
25456#line 1210
25457  __cil_tmp59 = (unsigned long )__cil_tmp58;
25458#line 1210
25459  __cil_tmp60 = __cil_tmp59 + 8;
25460#line 1210
25461  __cil_tmp61 = (struct list_head *)__cil_tmp60;
25462#line 1210
25463  __cil_tmp62 = (unsigned int )__cil_tmp61;
25464#line 1210
25465  __cil_tmp63 = (char *)__mptr;
25466#line 1210
25467  __cil_tmp64 = __cil_tmp63 - __cil_tmp62;
25468#line 1210
25469  crtc = (struct drm_crtc *)__cil_tmp64;
25470  {
25471#line 1210
25472  while (1) {
25473    while_continue: /* CIL Label */ ;
25474    {
25475#line 1210
25476    __cil_tmp65 = 1152 + 296;
25477#line 1210
25478    __cil_tmp66 = (unsigned long )dev_priv;
25479#line 1210
25480    __cil_tmp67 = __cil_tmp66 + 2088;
25481#line 1210
25482    __cil_tmp68 = *((struct drm_device **)__cil_tmp67);
25483#line 1210
25484    __cil_tmp69 = (unsigned long )__cil_tmp68;
25485#line 1210
25486    __cil_tmp70 = __cil_tmp69 + __cil_tmp65;
25487#line 1210
25488    __cil_tmp71 = (struct list_head *)__cil_tmp70;
25489#line 1210
25490    __cil_tmp72 = (unsigned long )__cil_tmp71;
25491#line 1210
25492    __cil_tmp73 = (unsigned long )crtc;
25493#line 1210
25494    __cil_tmp74 = __cil_tmp73 + 8;
25495#line 1210
25496    __cil_tmp75 = (struct list_head *)__cil_tmp74;
25497#line 1210
25498    __cil_tmp76 = (unsigned long )__cil_tmp75;
25499#line 1210
25500    if (__cil_tmp76 != __cil_tmp72) {
25501
25502    } else {
25503#line 1210
25504      goto while_break;
25505    }
25506    }
25507    {
25508#line 1211
25509    __cil_tmp77 = (struct drm_framebuffer *)vfb;
25510#line 1211
25511    __cil_tmp78 = (unsigned long )__cil_tmp77;
25512#line 1211
25513    __cil_tmp79 = (unsigned long )crtc;
25514#line 1211
25515    __cil_tmp80 = __cil_tmp79 + 32;
25516#line 1211
25517    __cil_tmp81 = *((struct drm_framebuffer **)__cil_tmp80);
25518#line 1211
25519    __cil_tmp82 = (unsigned long )__cil_tmp81;
25520#line 1211
25521    if (__cil_tmp82 != __cil_tmp78) {
25522#line 1212
25523      goto __Cont;
25524    } else {
25525
25526    }
25527    }
25528#line 1213
25529    tmp___8 = num_units;
25530#line 1213
25531    num_units = num_units + 1;
25532#line 1213
25533    __mptr___1 = (struct drm_crtc    *)crtc;
25534#line 1213
25535    __cil_tmp83 = tmp___8 * 8UL;
25536#line 1213
25537    __cil_tmp84 = (unsigned long )(units) + __cil_tmp83;
25538#line 1213
25539    __cil_tmp85 = (struct vmw_display_unit *)0;
25540#line 1213
25541    __cil_tmp86 = (struct drm_crtc *)__cil_tmp85;
25542#line 1213
25543    __cil_tmp87 = (unsigned int )__cil_tmp86;
25544#line 1213
25545    __cil_tmp88 = (char *)__mptr___1;
25546#line 1213
25547    __cil_tmp89 = __cil_tmp88 - __cil_tmp87;
25548#line 1213
25549    *((struct vmw_display_unit **)__cil_tmp84) = (struct vmw_display_unit *)__cil_tmp89;
25550    __Cont: /* CIL Label */ 
25551#line 1210
25552    __cil_tmp90 = (unsigned long )crtc;
25553#line 1210
25554    __cil_tmp91 = __cil_tmp90 + 8;
25555#line 1210
25556    __cil_tmp92 = *((struct list_head **)__cil_tmp91);
25557#line 1210
25558    __mptr___0 = (struct list_head    *)__cil_tmp92;
25559#line 1210
25560    __cil_tmp93 = (struct drm_crtc *)0;
25561#line 1210
25562    __cil_tmp94 = (unsigned long )__cil_tmp93;
25563#line 1210
25564    __cil_tmp95 = __cil_tmp94 + 8;
25565#line 1210
25566    __cil_tmp96 = (struct list_head *)__cil_tmp95;
25567#line 1210
25568    __cil_tmp97 = (unsigned int )__cil_tmp96;
25569#line 1210
25570    __cil_tmp98 = (char *)__mptr___0;
25571#line 1210
25572    __cil_tmp99 = __cil_tmp98 - __cil_tmp97;
25573#line 1210
25574    crtc = (struct drm_crtc *)__cil_tmp99;
25575  }
25576  while_break: /* CIL Label */ ;
25577  }
25578  {
25579#line 1216
25580  while (1) {
25581    while_continue___0: /* CIL Label */ ;
25582    {
25583#line 1216
25584    __cil_tmp100 = (void *)0;
25585#line 1216
25586    __cil_tmp101 = (unsigned long )__cil_tmp100;
25587#line 1216
25588    __cil_tmp102 = (unsigned long )surface;
25589#line 1216
25590    __cil_tmp103 = __cil_tmp102 == __cil_tmp101;
25591#line 1216
25592    __cil_tmp104 = ! __cil_tmp103;
25593#line 1216
25594    __cil_tmp105 = ! __cil_tmp104;
25595#line 1216
25596    __cil_tmp106 = (long )__cil_tmp105;
25597#line 1216
25598    tmp___9 = __builtin_expect(__cil_tmp106, 0L);
25599    }
25600#line 1216
25601    if (tmp___9) {
25602      {
25603#line 1216
25604      while (1) {
25605        while_continue___1: /* CIL Label */ ;
25606#line 1216
25607        __asm__  volatile   ("1:\tud2\n"
25608                             ".pushsection __bug_table,\"a\"\n"
25609                             "2:\t.long 1b - 2b, %c0 - 2b\n"
25610                             "\t.word %c1, 0\n"
25611                             "\t.org 2b+%c2\n"
25612                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
25613                             "i" (1216), "i" (12UL));
25614        {
25615#line 1216
25616        while (1) {
25617          while_continue___2: /* CIL Label */ ;
25618        }
25619        while_break___2: /* CIL Label */ ;
25620        }
25621#line 1216
25622        goto while_break___1;
25623      }
25624      while_break___1: /* CIL Label */ ;
25625      }
25626    } else {
25627
25628    }
25629#line 1216
25630    goto while_break___0;
25631  }
25632  while_break___0: /* CIL Label */ ;
25633  }
25634  {
25635#line 1217
25636  while (1) {
25637    while_continue___3: /* CIL Label */ ;
25638#line 1217
25639    if (! clips) {
25640#line 1217
25641      tmp___10 = 1;
25642    } else
25643#line 1217
25644    if (! num_clips) {
25645#line 1217
25646      tmp___10 = 1;
25647    } else {
25648#line 1217
25649      tmp___10 = 0;
25650    }
25651    {
25652#line 1217
25653    __cil_tmp107 = (long )tmp___10;
25654#line 1217
25655    tmp___11 = __builtin_expect(__cil_tmp107, 0L);
25656    }
25657#line 1217
25658    if (tmp___11) {
25659      {
25660#line 1217
25661      while (1) {
25662        while_continue___4: /* CIL Label */ ;
25663#line 1217
25664        __asm__  volatile   ("1:\tud2\n"
25665                             ".pushsection __bug_table,\"a\"\n"
25666                             "2:\t.long 1b - 2b, %c0 - 2b\n"
25667                             "\t.word %c1, 0\n"
25668                             "\t.org 2b+%c2\n"
25669                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
25670                             "i" (1217), "i" (12UL));
25671        {
25672#line 1217
25673        while (1) {
25674          while_continue___5: /* CIL Label */ ;
25675        }
25676        while_break___5: /* CIL Label */ ;
25677        }
25678#line 1217
25679        goto while_break___4;
25680      }
25681      while_break___4: /* CIL Label */ ;
25682      }
25683    } else {
25684
25685    }
25686#line 1217
25687    goto while_break___3;
25688  }
25689  while_break___3: /* CIL Label */ ;
25690  }
25691  {
25692#line 1219
25693  __cil_tmp108 = (unsigned long )num_clips;
25694#line 1219
25695  __cil_tmp109 = 8UL * __cil_tmp108;
25696#line 1219
25697  tmp___12 = kzalloc(__cil_tmp109, 208U);
25698#line 1219
25699  tmp___7 = (struct drm_clip_rect *)tmp___12;
25700#line 1220
25701  __cil_tmp110 = (void *)0;
25702#line 1220
25703  __cil_tmp111 = (unsigned long )__cil_tmp110;
25704#line 1220
25705  __cil_tmp112 = (unsigned long )tmp___7;
25706#line 1220
25707  __cil_tmp113 = __cil_tmp112 == __cil_tmp111;
25708#line 1220
25709  __cil_tmp114 = ! __cil_tmp113;
25710#line 1220
25711  __cil_tmp115 = ! __cil_tmp114;
25712#line 1220
25713  __cil_tmp116 = (long )__cil_tmp115;
25714#line 1220
25715  tmp___13 = __builtin_expect(__cil_tmp116, 0L);
25716  }
25717#line 1220
25718  if (tmp___13) {
25719    {
25720#line 1221
25721    drm_err("vmw_kms_present", "Temporary cliprect memory alloc failed.\n");
25722    }
25723#line 1222
25724    return (-12);
25725  } else {
25726
25727  }
25728  {
25729#line 1225
25730  __cil_tmp117 = (unsigned long )num_clips;
25731#line 1225
25732  __cil_tmp118 = 16UL * __cil_tmp117;
25733#line 1225
25734  fifo_size = 56UL + __cil_tmp118;
25735#line 1226
25736  tmp___14 = kmalloc(fifo_size, 208U);
25737#line 1226
25738  cmd = (struct __anonstruct_cmd_434 *)tmp___14;
25739#line 1227
25740  __cil_tmp119 = (void *)0;
25741#line 1227
25742  __cil_tmp120 = (unsigned long )__cil_tmp119;
25743#line 1227
25744  __cil_tmp121 = (unsigned long )cmd;
25745#line 1227
25746  __cil_tmp122 = __cil_tmp121 == __cil_tmp120;
25747#line 1227
25748  __cil_tmp123 = ! __cil_tmp122;
25749#line 1227
25750  __cil_tmp124 = ! __cil_tmp123;
25751#line 1227
25752  __cil_tmp125 = (long )__cil_tmp124;
25753#line 1227
25754  tmp___15 = __builtin_expect(__cil_tmp125, 0L);
25755  }
25756#line 1227
25757  if (tmp___15) {
25758    {
25759#line 1228
25760    drm_err("vmw_kms_present", "Failed to allocate temporary fifo memory.\n");
25761#line 1229
25762    ret = -12;
25763    }
25764#line 1230
25765    goto out_free_tmp;
25766  } else {
25767
25768  }
25769#line 1233
25770  left = *((int32_t *)clips);
25771#line 1234
25772  __cil_tmp126 = (unsigned long )clips;
25773#line 1234
25774  __cil_tmp127 = __cil_tmp126 + 8;
25775#line 1234
25776  __cil_tmp128 = *((uint32_t *)__cil_tmp127);
25777#line 1234
25778  __cil_tmp129 = *((int32_t *)clips);
25779#line 1234
25780  __cil_tmp130 = (uint32_t )__cil_tmp129;
25781#line 1234
25782  __cil_tmp131 = __cil_tmp130 + __cil_tmp128;
25783#line 1234
25784  right = (int )__cil_tmp131;
25785#line 1235
25786  __cil_tmp132 = (unsigned long )clips;
25787#line 1235
25788  __cil_tmp133 = __cil_tmp132 + 4;
25789#line 1235
25790  top = *((int32_t *)__cil_tmp133);
25791#line 1236
25792  __cil_tmp134 = (unsigned long )clips;
25793#line 1236
25794  __cil_tmp135 = __cil_tmp134 + 12;
25795#line 1236
25796  __cil_tmp136 = *((uint32_t *)__cil_tmp135);
25797#line 1236
25798  __cil_tmp137 = (unsigned long )clips;
25799#line 1236
25800  __cil_tmp138 = __cil_tmp137 + 4;
25801#line 1236
25802  __cil_tmp139 = *((int32_t *)__cil_tmp138);
25803#line 1236
25804  __cil_tmp140 = (uint32_t )__cil_tmp139;
25805#line 1236
25806  __cil_tmp141 = __cil_tmp140 + __cil_tmp136;
25807#line 1236
25808  bottom = (int )__cil_tmp141;
25809#line 1238
25810  i = 1;
25811  {
25812#line 1238
25813  while (1) {
25814    while_continue___6: /* CIL Label */ ;
25815    {
25816#line 1238
25817    __cil_tmp142 = (uint32_t )i;
25818#line 1238
25819    if (__cil_tmp142 < num_clips) {
25820
25821    } else {
25822#line 1238
25823      goto while_break___6;
25824    }
25825    }
25826#line 1239
25827    __min1 = left;
25828#line 1239
25829    __cil_tmp143 = clips + i;
25830#line 1239
25831    __min2 = *((int32_t *)__cil_tmp143);
25832#line 1239
25833    if (__min1 < __min2) {
25834#line 1239
25835      tmp___16 = __min1;
25836    } else {
25837#line 1239
25838      tmp___16 = __min2;
25839    }
25840#line 1239
25841    left = tmp___16;
25842#line 1240
25843    __max1 = right;
25844#line 1240
25845    __cil_tmp144 = clips + i;
25846#line 1240
25847    __cil_tmp145 = (unsigned long )__cil_tmp144;
25848#line 1240
25849    __cil_tmp146 = __cil_tmp145 + 8;
25850#line 1240
25851    __cil_tmp147 = *((uint32_t *)__cil_tmp146);
25852#line 1240
25853    __cil_tmp148 = clips + i;
25854#line 1240
25855    __cil_tmp149 = *((int32_t *)__cil_tmp148);
25856#line 1240
25857    __cil_tmp150 = (uint32_t )__cil_tmp149;
25858#line 1240
25859    __cil_tmp151 = __cil_tmp150 + __cil_tmp147;
25860#line 1240
25861    __max2 = (int )__cil_tmp151;
25862#line 1240
25863    if (__max1 > __max2) {
25864#line 1240
25865      tmp___17 = __max1;
25866    } else {
25867#line 1240
25868      tmp___17 = __max2;
25869    }
25870#line 1240
25871    right = tmp___17;
25872#line 1241
25873    __min1___0 = top;
25874#line 1241
25875    __cil_tmp152 = clips + i;
25876#line 1241
25877    __cil_tmp153 = (unsigned long )__cil_tmp152;
25878#line 1241
25879    __cil_tmp154 = __cil_tmp153 + 4;
25880#line 1241
25881    __min2___0 = *((int32_t *)__cil_tmp154);
25882#line 1241
25883    if (__min1___0 < __min2___0) {
25884#line 1241
25885      tmp___18 = __min1___0;
25886    } else {
25887#line 1241
25888      tmp___18 = __min2___0;
25889    }
25890#line 1241
25891    top = tmp___18;
25892#line 1242
25893    __max1___0 = bottom;
25894#line 1242
25895    __cil_tmp155 = clips + i;
25896#line 1242
25897    __cil_tmp156 = (unsigned long )__cil_tmp155;
25898#line 1242
25899    __cil_tmp157 = __cil_tmp156 + 12;
25900#line 1242
25901    __cil_tmp158 = *((uint32_t *)__cil_tmp157);
25902#line 1242
25903    __cil_tmp159 = clips + i;
25904#line 1242
25905    __cil_tmp160 = (unsigned long )__cil_tmp159;
25906#line 1242
25907    __cil_tmp161 = __cil_tmp160 + 4;
25908#line 1242
25909    __cil_tmp162 = *((int32_t *)__cil_tmp161);
25910#line 1242
25911    __cil_tmp163 = (uint32_t )__cil_tmp162;
25912#line 1242
25913    __cil_tmp164 = __cil_tmp163 + __cil_tmp158;
25914#line 1242
25915    __max2___0 = (int )__cil_tmp164;
25916#line 1242
25917    if (__max1___0 > __max2___0) {
25918#line 1242
25919      tmp___19 = __max1___0;
25920    } else {
25921#line 1242
25922      tmp___19 = __max2___0;
25923    }
25924#line 1242
25925    bottom = tmp___19;
25926#line 1238
25927    i = i + 1;
25928  }
25929  while_break___6: /* CIL Label */ ;
25930  }
25931  {
25932#line 1246
25933  __cil_tmp165 = (void *)cmd;
25934#line 1246
25935  memset(__cil_tmp165, 0, fifo_size);
25936#line 1247
25937  *((uint32 *)cmd) = (__u32 )1069;
25938#line 1249
25939  __cil_tmp166 = cmd + 1;
25940#line 1249
25941  blits = (SVGASignedRect *)__cil_tmp166;
25942#line 1251
25943  __cil_tmp167 = 8 + 12;
25944#line 1251
25945  __cil_tmp168 = (unsigned long )cmd;
25946#line 1251
25947  __cil_tmp169 = __cil_tmp168 + __cil_tmp167;
25948#line 1251
25949  *((int32 *)__cil_tmp169) = left;
25950#line 1252
25951  __cil_tmp170 = 12 + 8;
25952#line 1252
25953  __cil_tmp171 = 8 + __cil_tmp170;
25954#line 1252
25955  __cil_tmp172 = (unsigned long )cmd;
25956#line 1252
25957  __cil_tmp173 = __cil_tmp172 + __cil_tmp171;
25958#line 1252
25959  *((int32 *)__cil_tmp173) = right;
25960#line 1253
25961  __cil_tmp174 = 12 + 4;
25962#line 1253
25963  __cil_tmp175 = 8 + __cil_tmp174;
25964#line 1253
25965  __cil_tmp176 = (unsigned long )cmd;
25966#line 1253
25967  __cil_tmp177 = __cil_tmp176 + __cil_tmp175;
25968#line 1253
25969  *((int32 *)__cil_tmp177) = top;
25970#line 1254
25971  __cil_tmp178 = 12 + 12;
25972#line 1254
25973  __cil_tmp179 = 8 + __cil_tmp178;
25974#line 1254
25975  __cil_tmp180 = (unsigned long )cmd;
25976#line 1254
25977  __cil_tmp181 = __cil_tmp180 + __cil_tmp179;
25978#line 1254
25979  *((int32 *)__cil_tmp181) = bottom;
25980#line 1256
25981  i = 0;
25982  }
25983  {
25984#line 1256
25985  while (1) {
25986    while_continue___7: /* CIL Label */ ;
25987    {
25988#line 1256
25989    __cil_tmp182 = (uint32_t )i;
25990#line 1256
25991    if (__cil_tmp182 < num_clips) {
25992
25993    } else {
25994#line 1256
25995      goto while_break___7;
25996    }
25997    }
25998#line 1257
25999    __cil_tmp183 = tmp___7 + i;
26000#line 1257
26001    __cil_tmp184 = clips + i;
26002#line 1257
26003    __cil_tmp185 = *((int32_t *)__cil_tmp184);
26004#line 1257
26005    __cil_tmp186 = __cil_tmp185 - left;
26006#line 1257
26007    *((unsigned short *)__cil_tmp183) = (unsigned short )__cil_tmp186;
26008#line 1258
26009    __cil_tmp187 = tmp___7 + i;
26010#line 1258
26011    __cil_tmp188 = (unsigned long )__cil_tmp187;
26012#line 1258
26013    __cil_tmp189 = __cil_tmp188 + 4;
26014#line 1258
26015    __cil_tmp190 = (uint32_t )left;
26016#line 1258
26017    __cil_tmp191 = clips + i;
26018#line 1258
26019    __cil_tmp192 = (unsigned long )__cil_tmp191;
26020#line 1258
26021    __cil_tmp193 = __cil_tmp192 + 8;
26022#line 1258
26023    __cil_tmp194 = *((uint32_t *)__cil_tmp193);
26024#line 1258
26025    __cil_tmp195 = clips + i;
26026#line 1258
26027    __cil_tmp196 = *((int32_t *)__cil_tmp195);
26028#line 1258
26029    __cil_tmp197 = (uint32_t )__cil_tmp196;
26030#line 1258
26031    __cil_tmp198 = __cil_tmp197 + __cil_tmp194;
26032#line 1258
26033    __cil_tmp199 = __cil_tmp198 - __cil_tmp190;
26034#line 1258
26035    *((unsigned short *)__cil_tmp189) = (unsigned short )__cil_tmp199;
26036#line 1259
26037    __cil_tmp200 = tmp___7 + i;
26038#line 1259
26039    __cil_tmp201 = (unsigned long )__cil_tmp200;
26040#line 1259
26041    __cil_tmp202 = __cil_tmp201 + 2;
26042#line 1259
26043    __cil_tmp203 = clips + i;
26044#line 1259
26045    __cil_tmp204 = (unsigned long )__cil_tmp203;
26046#line 1259
26047    __cil_tmp205 = __cil_tmp204 + 4;
26048#line 1259
26049    __cil_tmp206 = *((int32_t *)__cil_tmp205);
26050#line 1259
26051    __cil_tmp207 = __cil_tmp206 - top;
26052#line 1259
26053    *((unsigned short *)__cil_tmp202) = (unsigned short )__cil_tmp207;
26054#line 1260
26055    __cil_tmp208 = tmp___7 + i;
26056#line 1260
26057    __cil_tmp209 = (unsigned long )__cil_tmp208;
26058#line 1260
26059    __cil_tmp210 = __cil_tmp209 + 6;
26060#line 1260
26061    __cil_tmp211 = (uint32_t )top;
26062#line 1260
26063    __cil_tmp212 = clips + i;
26064#line 1260
26065    __cil_tmp213 = (unsigned long )__cil_tmp212;
26066#line 1260
26067    __cil_tmp214 = __cil_tmp213 + 12;
26068#line 1260
26069    __cil_tmp215 = *((uint32_t *)__cil_tmp214);
26070#line 1260
26071    __cil_tmp216 = clips + i;
26072#line 1260
26073    __cil_tmp217 = (unsigned long )__cil_tmp216;
26074#line 1260
26075    __cil_tmp218 = __cil_tmp217 + 4;
26076#line 1260
26077    __cil_tmp219 = *((int32_t *)__cil_tmp218);
26078#line 1260
26079    __cil_tmp220 = (uint32_t )__cil_tmp219;
26080#line 1260
26081    __cil_tmp221 = __cil_tmp220 + __cil_tmp215;
26082#line 1260
26083    __cil_tmp222 = __cil_tmp221 - __cil_tmp211;
26084#line 1260
26085    *((unsigned short *)__cil_tmp210) = (unsigned short )__cil_tmp222;
26086#line 1256
26087    i = i + 1;
26088  }
26089  while_break___7: /* CIL Label */ ;
26090  }
26091#line 1263
26092  k = 0;
26093  {
26094#line 1263
26095  while (1) {
26096    while_continue___8: /* CIL Label */ ;
26097#line 1263
26098    if (k < num_units) {
26099
26100    } else {
26101#line 1263
26102      goto while_break___8;
26103    }
26104#line 1264
26105    __cil_tmp223 = k * 8UL;
26106#line 1264
26107    __cil_tmp224 = (unsigned long )(units) + __cil_tmp223;
26108#line 1264
26109    unit = *((struct vmw_display_unit **)__cil_tmp224);
26110#line 1268
26111    __cil_tmp225 = 0 + 480;
26112#line 1268
26113    __cil_tmp226 = (unsigned long )unit;
26114#line 1268
26115    __cil_tmp227 = __cil_tmp226 + __cil_tmp225;
26116#line 1268
26117    __cil_tmp228 = *((int *)__cil_tmp227);
26118#line 1268
26119    __cil_tmp229 = left + destX;
26120#line 1268
26121    clip_x1315 = __cil_tmp229 - __cil_tmp228;
26122#line 1269
26123    __cil_tmp230 = 0 + 484;
26124#line 1269
26125    __cil_tmp231 = (unsigned long )unit;
26126#line 1269
26127    __cil_tmp232 = __cil_tmp231 + __cil_tmp230;
26128#line 1269
26129    __cil_tmp233 = *((int *)__cil_tmp232);
26130#line 1269
26131    __cil_tmp234 = top + destY;
26132#line 1269
26133    clip_y1313 = __cil_tmp234 - __cil_tmp233;
26134#line 1270
26135    __cil_tmp235 = 0 + 480;
26136#line 1270
26137    __cil_tmp236 = (unsigned long )unit;
26138#line 1270
26139    __cil_tmp237 = __cil_tmp236 + __cil_tmp235;
26140#line 1270
26141    __cil_tmp238 = *((int *)__cil_tmp237);
26142#line 1270
26143    __cil_tmp239 = right + destX;
26144#line 1270
26145    clip_x2314 = __cil_tmp239 - __cil_tmp238;
26146#line 1271
26147    __cil_tmp240 = 0 + 484;
26148#line 1271
26149    __cil_tmp241 = (unsigned long )unit;
26150#line 1271
26151    __cil_tmp242 = __cil_tmp241 + __cil_tmp240;
26152#line 1271
26153    __cil_tmp243 = *((int *)__cil_tmp242);
26154#line 1271
26155    __cil_tmp244 = bottom + destY;
26156#line 1271
26157    clip_y2312 = __cil_tmp244 - __cil_tmp243;
26158    {
26159#line 1274
26160    __cil_tmp245 = 48 + 68;
26161#line 1274
26162    __cil_tmp246 = 0 + __cil_tmp245;
26163#line 1274
26164    __cil_tmp247 = (unsigned long )unit;
26165#line 1274
26166    __cil_tmp248 = __cil_tmp247 + __cil_tmp246;
26167#line 1274
26168    __cil_tmp249 = *((int *)__cil_tmp248);
26169#line 1274
26170    if (clip_x1315 >= __cil_tmp249) {
26171#line 1277
26172      goto __Cont___0;
26173    } else {
26174      {
26175#line 1274
26176      __cil_tmp250 = 48 + 88;
26177#line 1274
26178      __cil_tmp251 = 0 + __cil_tmp250;
26179#line 1274
26180      __cil_tmp252 = (unsigned long )unit;
26181#line 1274
26182      __cil_tmp253 = __cil_tmp252 + __cil_tmp251;
26183#line 1274
26184      __cil_tmp254 = *((int *)__cil_tmp253);
26185#line 1274
26186      if (clip_y1313 >= __cil_tmp254) {
26187#line 1277
26188        goto __Cont___0;
26189      } else
26190#line 1274
26191      if (clip_x2314 <= 0) {
26192#line 1277
26193        goto __Cont___0;
26194      } else
26195#line 1274
26196      if (clip_y2312 <= 0) {
26197#line 1277
26198        goto __Cont___0;
26199      } else {
26200
26201      }
26202      }
26203    }
26204    }
26205    {
26206#line 1283
26207    __cil_tmp255 = 8 + 32;
26208#line 1283
26209    __cil_tmp256 = (unsigned long )cmd;
26210#line 1283
26211    __cil_tmp257 = __cil_tmp256 + __cil_tmp255;
26212#line 1283
26213    *((int32 *)__cil_tmp257) = clip_x1315;
26214#line 1284
26215    __cil_tmp258 = 32 + 8;
26216#line 1284
26217    __cil_tmp259 = 8 + __cil_tmp258;
26218#line 1284
26219    __cil_tmp260 = (unsigned long )cmd;
26220#line 1284
26221    __cil_tmp261 = __cil_tmp260 + __cil_tmp259;
26222#line 1284
26223    *((int32 *)__cil_tmp261) = clip_x2314;
26224#line 1285
26225    __cil_tmp262 = 32 + 4;
26226#line 1285
26227    __cil_tmp263 = 8 + __cil_tmp262;
26228#line 1285
26229    __cil_tmp264 = (unsigned long )cmd;
26230#line 1285
26231    __cil_tmp265 = __cil_tmp264 + __cil_tmp263;
26232#line 1285
26233    *((int32 *)__cil_tmp265) = clip_y1313;
26234#line 1286
26235    __cil_tmp266 = 32 + 12;
26236#line 1286
26237    __cil_tmp267 = 8 + __cil_tmp266;
26238#line 1286
26239    __cil_tmp268 = (unsigned long )cmd;
26240#line 1286
26241    __cil_tmp269 = __cil_tmp268 + __cil_tmp267;
26242#line 1286
26243    *((int32 *)__cil_tmp269) = clip_y2312;
26244#line 1289
26245    __cil_tmp270 = 48 + 68;
26246#line 1289
26247    __cil_tmp271 = 0 + __cil_tmp270;
26248#line 1289
26249    __cil_tmp272 = (unsigned long )unit;
26250#line 1289
26251    __cil_tmp273 = __cil_tmp272 + __cil_tmp271;
26252#line 1289
26253    __cil_tmp274 = *((int *)__cil_tmp273);
26254#line 1289
26255    clip_x2314 = __cil_tmp274 - clip_x1315;
26256#line 1290
26257    __cil_tmp275 = 48 + 88;
26258#line 1290
26259    __cil_tmp276 = 0 + __cil_tmp275;
26260#line 1290
26261    __cil_tmp277 = (unsigned long )unit;
26262#line 1290
26263    __cil_tmp278 = __cil_tmp277 + __cil_tmp276;
26264#line 1290
26265    __cil_tmp279 = *((int *)__cil_tmp278);
26266#line 1290
26267    clip_y2312 = __cil_tmp279 - clip_y1313;
26268#line 1291
26269    clip_x1315 = 0 - clip_x1315;
26270#line 1292
26271    clip_y1313 = 0 - clip_y1313;
26272#line 1295
26273    __cil_tmp280 = (unsigned long )cmd;
26274#line 1295
26275    __cil_tmp281 = __cil_tmp280 + 8;
26276#line 1295
26277    *((uint32 *)__cil_tmp281) = sid;
26278#line 1296
26279    __cil_tmp282 = 8 + 28;
26280#line 1296
26281    __cil_tmp283 = (unsigned long )cmd;
26282#line 1296
26283    __cil_tmp284 = __cil_tmp283 + __cil_tmp282;
26284#line 1296
26285    __cil_tmp285 = (unsigned long )unit;
26286#line 1296
26287    __cil_tmp286 = __cil_tmp285 + 2032;
26288#line 1296
26289    *((uint32 *)__cil_tmp284) = *((unsigned int *)__cil_tmp286);
26290#line 1299
26291    __cil_tmp287 = (int )num_clips;
26292#line 1299
26293    vmw_clip_cliprects(tmp___7, __cil_tmp287, clip_x1315, clip_x2314, clip_y1313,
26294                       clip_y2312, blits, & num);
26295    }
26296    {
26297#line 1302
26298    __cil_tmp288 = & num;
26299#line 1302
26300    __cil_tmp289 = *__cil_tmp288;
26301#line 1302
26302    if (__cil_tmp289 == 0) {
26303#line 1303
26304      goto __Cont___0;
26305    } else {
26306
26307    }
26308    }
26309    {
26310#line 1306
26311    __cil_tmp290 = & num;
26312#line 1306
26313    __cil_tmp291 = *__cil_tmp290;
26314#line 1306
26315    __cil_tmp292 = (unsigned long )__cil_tmp291;
26316#line 1306
26317    __cil_tmp293 = 16UL * __cil_tmp292;
26318#line 1306
26319    fifo_size = 56UL + __cil_tmp293;
26320#line 1307
26321    __cil_tmp294 = 0 + 4;
26322#line 1307
26323    __cil_tmp295 = (unsigned long )cmd;
26324#line 1307
26325    __cil_tmp296 = __cil_tmp295 + __cil_tmp294;
26326#line 1307
26327    __cil_tmp297 = fifo_size - 8UL;
26328#line 1307
26329    *((uint32 *)__cil_tmp296) = (__u32 )__cil_tmp297;
26330#line 1308
26331    __cil_tmp298 = (void *)0;
26332#line 1308
26333    __cil_tmp299 = (void *)cmd;
26334#line 1308
26335    __cil_tmp300 = (uint32_t )fifo_size;
26336#line 1308
26337    __cil_tmp301 = (uint64_t )0;
26338#line 1308
26339    __cil_tmp302 = (void *)0;
26340#line 1308
26341    __cil_tmp303 = (struct drm_vmw_fence_rep *)__cil_tmp302;
26342#line 1308
26343    __cil_tmp304 = (void *)0;
26344#line 1308
26345    __cil_tmp305 = (struct vmw_fence_obj **)__cil_tmp304;
26346#line 1308
26347    ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp298, __cil_tmp299, __cil_tmp300,
26348                              __cil_tmp301, __cil_tmp303, __cil_tmp305);
26349#line 1311
26350    __cil_tmp306 = ret != 0;
26351#line 1311
26352    __cil_tmp307 = ! __cil_tmp306;
26353#line 1311
26354    __cil_tmp308 = ! __cil_tmp307;
26355#line 1311
26356    __cil_tmp309 = (long )__cil_tmp308;
26357#line 1311
26358    tmp___20 = __builtin_expect(__cil_tmp309, 0L);
26359    }
26360#line 1311
26361    if (tmp___20) {
26362#line 1312
26363      goto while_break___8;
26364    } else {
26365
26366    }
26367    __Cont___0: /* CIL Label */ 
26368#line 1263
26369    k = k + 1;
26370  }
26371  while_break___8: /* CIL Label */ ;
26372  }
26373  {
26374#line 1315
26375  __cil_tmp310 = (void    *)cmd;
26376#line 1315
26377  kfree(__cil_tmp310);
26378  }
26379  out_free_tmp: 
26380  {
26381#line 1317
26382  __cil_tmp311 = (void    *)tmp___7;
26383#line 1317
26384  kfree(__cil_tmp311);
26385  }
26386#line 1319
26387  return (ret);
26388}
26389}
26390#line 1322 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
26391int vmw_kms_readback(struct vmw_private *dev_priv , struct drm_file *file_priv , struct vmw_framebuffer *vfb ,
26392                     struct drm_vmw_fence_rep *user_fence_rep , struct drm_vmw_rect *clips ,
26393                     uint32_t num_clips ) 
26394{ struct vmw_framebuffer_dmabuf *vfbd ;
26395  struct drm_framebuffer    *__mptr ;
26396  struct vmw_dma_buffer *dmabuf ;
26397  struct vmw_display_unit *units[8] ;
26398  struct drm_crtc *crtc ;
26399  size_t fifo_size ;
26400  int i ;
26401  int k ;
26402  int ret ;
26403  int num_units ;
26404  int blits_pos ;
26405  struct __anonstruct_cmd_435 *cmd ;
26406  struct __anonstruct_blits_436 *blits ;
26407  struct list_head    *__mptr___0 ;
26408  struct list_head    *__mptr___1 ;
26409  int tmp___7 ;
26410  struct drm_crtc    *__mptr___2 ;
26411  long tmp___8 ;
26412  int tmp___9 ;
26413  long tmp___10 ;
26414  void *tmp___11 ;
26415  long tmp___12 ;
26416  struct drm_vmw_rect *c ;
26417  int clip_x1 ;
26418  int clip_x2 ;
26419  int clip_y1 ;
26420  int clip_y2 ;
26421  int dest_x ;
26422  int dest_y ;
26423  int _max1 ;
26424  int _max2 ;
26425  int tmp___13 ;
26426  int _max1___0 ;
26427  int _max2___0 ;
26428  int tmp___14 ;
26429  int _min1 ;
26430  int _min2 ;
26431  int tmp___15 ;
26432  int _min1___0 ;
26433  int _min2___0 ;
26434  int tmp___16 ;
26435  struct drm_framebuffer *__cil_tmp48 ;
26436  struct vmw_framebuffer_dmabuf *__cil_tmp49 ;
26437  struct drm_framebuffer *__cil_tmp50 ;
26438  unsigned int __cil_tmp51 ;
26439  char *__cil_tmp52 ;
26440  char *__cil_tmp53 ;
26441  unsigned long __cil_tmp54 ;
26442  unsigned long __cil_tmp55 ;
26443  unsigned long __cil_tmp56 ;
26444  unsigned long __cil_tmp57 ;
26445  unsigned long __cil_tmp58 ;
26446  struct drm_device *__cil_tmp59 ;
26447  unsigned long __cil_tmp60 ;
26448  unsigned long __cil_tmp61 ;
26449  struct list_head *__cil_tmp62 ;
26450  struct drm_crtc *__cil_tmp63 ;
26451  unsigned long __cil_tmp64 ;
26452  unsigned long __cil_tmp65 ;
26453  struct list_head *__cil_tmp66 ;
26454  unsigned int __cil_tmp67 ;
26455  char *__cil_tmp68 ;
26456  char *__cil_tmp69 ;
26457  unsigned long __cil_tmp70 ;
26458  unsigned long __cil_tmp71 ;
26459  unsigned long __cil_tmp72 ;
26460  struct drm_device *__cil_tmp73 ;
26461  unsigned long __cil_tmp74 ;
26462  unsigned long __cil_tmp75 ;
26463  struct list_head *__cil_tmp76 ;
26464  unsigned long __cil_tmp77 ;
26465  unsigned long __cil_tmp78 ;
26466  unsigned long __cil_tmp79 ;
26467  struct list_head *__cil_tmp80 ;
26468  unsigned long __cil_tmp81 ;
26469  struct drm_framebuffer *__cil_tmp82 ;
26470  unsigned long __cil_tmp83 ;
26471  unsigned long __cil_tmp84 ;
26472  unsigned long __cil_tmp85 ;
26473  struct drm_framebuffer *__cil_tmp86 ;
26474  unsigned long __cil_tmp87 ;
26475  unsigned long __cil_tmp88 ;
26476  unsigned long __cil_tmp89 ;
26477  struct vmw_display_unit *__cil_tmp90 ;
26478  struct drm_crtc *__cil_tmp91 ;
26479  unsigned int __cil_tmp92 ;
26480  char *__cil_tmp93 ;
26481  char *__cil_tmp94 ;
26482  unsigned long __cil_tmp95 ;
26483  unsigned long __cil_tmp96 ;
26484  struct list_head *__cil_tmp97 ;
26485  struct drm_crtc *__cil_tmp98 ;
26486  unsigned long __cil_tmp99 ;
26487  unsigned long __cil_tmp100 ;
26488  struct list_head *__cil_tmp101 ;
26489  unsigned int __cil_tmp102 ;
26490  char *__cil_tmp103 ;
26491  char *__cil_tmp104 ;
26492  void *__cil_tmp105 ;
26493  unsigned long __cil_tmp106 ;
26494  unsigned long __cil_tmp107 ;
26495  int __cil_tmp108 ;
26496  int __cil_tmp109 ;
26497  int __cil_tmp110 ;
26498  long __cil_tmp111 ;
26499  long __cil_tmp112 ;
26500  unsigned long __cil_tmp113 ;
26501  unsigned long __cil_tmp114 ;
26502  unsigned long __cil_tmp115 ;
26503  unsigned long __cil_tmp116 ;
26504  void *__cil_tmp117 ;
26505  unsigned long __cil_tmp118 ;
26506  unsigned long __cil_tmp119 ;
26507  int __cil_tmp120 ;
26508  int __cil_tmp121 ;
26509  int __cil_tmp122 ;
26510  long __cil_tmp123 ;
26511  void *__cil_tmp124 ;
26512  unsigned long __cil_tmp125 ;
26513  unsigned long __cil_tmp126 ;
26514  unsigned long __cil_tmp127 ;
26515  unsigned long __cil_tmp128 ;
26516  unsigned long __cil_tmp129 ;
26517  unsigned long __cil_tmp130 ;
26518  int __cil_tmp131 ;
26519  unsigned long __cil_tmp132 ;
26520  unsigned long __cil_tmp133 ;
26521  unsigned long __cil_tmp134 ;
26522  unsigned long __cil_tmp135 ;
26523  unsigned long __cil_tmp136 ;
26524  unsigned long __cil_tmp137 ;
26525  unsigned long __cil_tmp138 ;
26526  unsigned long __cil_tmp139 ;
26527  unsigned long __cil_tmp140 ;
26528  unsigned long __cil_tmp141 ;
26529  unsigned long __cil_tmp142 ;
26530  unsigned long __cil_tmp143 ;
26531  unsigned long __cil_tmp144 ;
26532  unsigned long __cil_tmp145 ;
26533  unsigned long __cil_tmp146 ;
26534  unsigned long __cil_tmp147 ;
26535  unsigned long __cil_tmp148 ;
26536  unsigned long __cil_tmp149 ;
26537  unsigned long __cil_tmp150 ;
26538  unsigned long __cil_tmp151 ;
26539  unsigned long __cil_tmp152 ;
26540  unsigned long __cil_tmp153 ;
26541  unsigned long __cil_tmp154 ;
26542  unsigned long __cil_tmp155 ;
26543  unsigned long __cil_tmp156 ;
26544  unsigned long __cil_tmp157 ;
26545  unsigned long __cil_tmp158 ;
26546  unsigned long __cil_tmp159 ;
26547  unsigned long __cil_tmp160 ;
26548  unsigned long __cil_tmp161 ;
26549  unsigned long __cil_tmp162 ;
26550  struct __anonstruct_cmd_435 *__cil_tmp163 ;
26551  void *__cil_tmp164 ;
26552  uint32_t __cil_tmp165 ;
26553  unsigned long __cil_tmp166 ;
26554  unsigned long __cil_tmp167 ;
26555  unsigned long __cil_tmp168 ;
26556  struct vmw_display_unit *__cil_tmp169 ;
26557  unsigned long __cil_tmp170 ;
26558  unsigned long __cil_tmp171 ;
26559  int __cil_tmp172 ;
26560  int32_t __cil_tmp173 ;
26561  unsigned long __cil_tmp174 ;
26562  unsigned long __cil_tmp175 ;
26563  uint32_t __cil_tmp176 ;
26564  unsigned long __cil_tmp177 ;
26565  unsigned long __cil_tmp178 ;
26566  unsigned long __cil_tmp179 ;
26567  struct vmw_display_unit *__cil_tmp180 ;
26568  unsigned long __cil_tmp181 ;
26569  unsigned long __cil_tmp182 ;
26570  int __cil_tmp183 ;
26571  int32_t __cil_tmp184 ;
26572  int32_t __cil_tmp185 ;
26573  uint32_t __cil_tmp186 ;
26574  uint32_t __cil_tmp187 ;
26575  unsigned long __cil_tmp188 ;
26576  unsigned long __cil_tmp189 ;
26577  unsigned long __cil_tmp190 ;
26578  struct vmw_display_unit *__cil_tmp191 ;
26579  unsigned long __cil_tmp192 ;
26580  unsigned long __cil_tmp193 ;
26581  int __cil_tmp194 ;
26582  unsigned long __cil_tmp195 ;
26583  unsigned long __cil_tmp196 ;
26584  int32_t __cil_tmp197 ;
26585  unsigned long __cil_tmp198 ;
26586  unsigned long __cil_tmp199 ;
26587  uint32_t __cil_tmp200 ;
26588  unsigned long __cil_tmp201 ;
26589  unsigned long __cil_tmp202 ;
26590  unsigned long __cil_tmp203 ;
26591  struct vmw_display_unit *__cil_tmp204 ;
26592  unsigned long __cil_tmp205 ;
26593  unsigned long __cil_tmp206 ;
26594  int __cil_tmp207 ;
26595  unsigned long __cil_tmp208 ;
26596  unsigned long __cil_tmp209 ;
26597  int32_t __cil_tmp210 ;
26598  int32_t __cil_tmp211 ;
26599  uint32_t __cil_tmp212 ;
26600  uint32_t __cil_tmp213 ;
26601  unsigned long __cil_tmp214 ;
26602  unsigned long __cil_tmp215 ;
26603  int __cil_tmp216 ;
26604  int __cil_tmp217 ;
26605  int *__cil_tmp218 ;
26606  int *__cil_tmp219 ;
26607  int *__cil_tmp220 ;
26608  int __cil_tmp221 ;
26609  int *__cil_tmp222 ;
26610  int __cil_tmp223 ;
26611  int *__cil_tmp224 ;
26612  int *__cil_tmp225 ;
26613  int *__cil_tmp226 ;
26614  int *__cil_tmp227 ;
26615  int *__cil_tmp228 ;
26616  int __cil_tmp229 ;
26617  int *__cil_tmp230 ;
26618  int __cil_tmp231 ;
26619  int *__cil_tmp232 ;
26620  int *__cil_tmp233 ;
26621  int *__cil_tmp234 ;
26622  int *__cil_tmp235 ;
26623  unsigned long __cil_tmp236 ;
26624  unsigned long __cil_tmp237 ;
26625  unsigned long __cil_tmp238 ;
26626  unsigned long __cil_tmp239 ;
26627  struct vmw_display_unit *__cil_tmp240 ;
26628  unsigned long __cil_tmp241 ;
26629  unsigned long __cil_tmp242 ;
26630  int *__cil_tmp243 ;
26631  int __cil_tmp244 ;
26632  int *__cil_tmp245 ;
26633  int __cil_tmp246 ;
26634  int *__cil_tmp247 ;
26635  int *__cil_tmp248 ;
26636  int *__cil_tmp249 ;
26637  int *__cil_tmp250 ;
26638  unsigned long __cil_tmp251 ;
26639  unsigned long __cil_tmp252 ;
26640  unsigned long __cil_tmp253 ;
26641  unsigned long __cil_tmp254 ;
26642  struct vmw_display_unit *__cil_tmp255 ;
26643  unsigned long __cil_tmp256 ;
26644  unsigned long __cil_tmp257 ;
26645  int *__cil_tmp258 ;
26646  int __cil_tmp259 ;
26647  int *__cil_tmp260 ;
26648  int __cil_tmp261 ;
26649  int *__cil_tmp262 ;
26650  int *__cil_tmp263 ;
26651  unsigned long __cil_tmp264 ;
26652  unsigned long __cil_tmp265 ;
26653  unsigned long __cil_tmp266 ;
26654  unsigned long __cil_tmp267 ;
26655  struct vmw_display_unit *__cil_tmp268 ;
26656  unsigned long __cil_tmp269 ;
26657  unsigned long __cil_tmp270 ;
26658  int __cil_tmp271 ;
26659  unsigned long __cil_tmp272 ;
26660  unsigned long __cil_tmp273 ;
26661  unsigned long __cil_tmp274 ;
26662  unsigned long __cil_tmp275 ;
26663  struct vmw_display_unit *__cil_tmp276 ;
26664  unsigned long __cil_tmp277 ;
26665  unsigned long __cil_tmp278 ;
26666  int __cil_tmp279 ;
26667  struct __anonstruct_blits_436 *__cil_tmp280 ;
26668  unsigned long __cil_tmp281 ;
26669  struct __anonstruct_blits_436 *__cil_tmp282 ;
26670  unsigned long __cil_tmp283 ;
26671  unsigned long __cil_tmp284 ;
26672  unsigned long __cil_tmp285 ;
26673  unsigned long __cil_tmp286 ;
26674  struct vmw_display_unit *__cil_tmp287 ;
26675  unsigned long __cil_tmp288 ;
26676  unsigned long __cil_tmp289 ;
26677  struct __anonstruct_blits_436 *__cil_tmp290 ;
26678  unsigned long __cil_tmp291 ;
26679  unsigned long __cil_tmp292 ;
26680  unsigned long __cil_tmp293 ;
26681  unsigned long __cil_tmp294 ;
26682  struct __anonstruct_blits_436 *__cil_tmp295 ;
26683  unsigned long __cil_tmp296 ;
26684  unsigned long __cil_tmp297 ;
26685  unsigned long __cil_tmp298 ;
26686  struct __anonstruct_blits_436 *__cil_tmp299 ;
26687  unsigned long __cil_tmp300 ;
26688  unsigned long __cil_tmp301 ;
26689  unsigned long __cil_tmp302 ;
26690  unsigned long __cil_tmp303 ;
26691  struct __anonstruct_blits_436 *__cil_tmp304 ;
26692  unsigned long __cil_tmp305 ;
26693  unsigned long __cil_tmp306 ;
26694  unsigned long __cil_tmp307 ;
26695  unsigned long __cil_tmp308 ;
26696  struct __anonstruct_blits_436 *__cil_tmp309 ;
26697  unsigned long __cil_tmp310 ;
26698  unsigned long __cil_tmp311 ;
26699  unsigned long __cil_tmp312 ;
26700  unsigned long __cil_tmp313 ;
26701  struct __anonstruct_blits_436 *__cil_tmp314 ;
26702  unsigned long __cil_tmp315 ;
26703  unsigned long __cil_tmp316 ;
26704  unsigned long __cil_tmp317 ;
26705  unsigned long __cil_tmp318 ;
26706  void *__cil_tmp319 ;
26707  void *__cil_tmp320 ;
26708  uint32_t __cil_tmp321 ;
26709  uint64_t __cil_tmp322 ;
26710  void *__cil_tmp323 ;
26711  struct vmw_fence_obj **__cil_tmp324 ;
26712  void    *__cil_tmp325 ;
26713
26714  {
26715#line 1330
26716  __cil_tmp48 = (struct drm_framebuffer *)vfb;
26717#line 1330
26718  __mptr = (struct drm_framebuffer    *)__cil_tmp48;
26719#line 1330
26720  __cil_tmp49 = (struct vmw_framebuffer_dmabuf *)0;
26721#line 1330
26722  __cil_tmp50 = (struct drm_framebuffer *)__cil_tmp49;
26723#line 1330
26724  __cil_tmp51 = (unsigned int )__cil_tmp50;
26725#line 1330
26726  __cil_tmp52 = (char *)__mptr;
26727#line 1330
26728  __cil_tmp53 = __cil_tmp52 - __cil_tmp51;
26729#line 1330
26730  vfbd = (struct vmw_framebuffer_dmabuf *)__cil_tmp53;
26731#line 1331
26732  __cil_tmp54 = (unsigned long )vfbd;
26733#line 1331
26734  __cil_tmp55 = __cil_tmp54 + 160;
26735#line 1331
26736  dmabuf = *((struct vmw_dma_buffer **)__cil_tmp55);
26737#line 1346
26738  num_units = 0;
26739#line 1347
26740  __cil_tmp56 = 1152 + 296;
26741#line 1347
26742  __cil_tmp57 = (unsigned long )dev_priv;
26743#line 1347
26744  __cil_tmp58 = __cil_tmp57 + 2088;
26745#line 1347
26746  __cil_tmp59 = *((struct drm_device **)__cil_tmp58);
26747#line 1347
26748  __cil_tmp60 = (unsigned long )__cil_tmp59;
26749#line 1347
26750  __cil_tmp61 = __cil_tmp60 + __cil_tmp56;
26751#line 1347
26752  __cil_tmp62 = *((struct list_head **)__cil_tmp61);
26753#line 1347
26754  __mptr___0 = (struct list_head    *)__cil_tmp62;
26755#line 1347
26756  __cil_tmp63 = (struct drm_crtc *)0;
26757#line 1347
26758  __cil_tmp64 = (unsigned long )__cil_tmp63;
26759#line 1347
26760  __cil_tmp65 = __cil_tmp64 + 8;
26761#line 1347
26762  __cil_tmp66 = (struct list_head *)__cil_tmp65;
26763#line 1347
26764  __cil_tmp67 = (unsigned int )__cil_tmp66;
26765#line 1347
26766  __cil_tmp68 = (char *)__mptr___0;
26767#line 1347
26768  __cil_tmp69 = __cil_tmp68 - __cil_tmp67;
26769#line 1347
26770  crtc = (struct drm_crtc *)__cil_tmp69;
26771  {
26772#line 1347
26773  while (1) {
26774    while_continue: /* CIL Label */ ;
26775    {
26776#line 1347
26777    __cil_tmp70 = 1152 + 296;
26778#line 1347
26779    __cil_tmp71 = (unsigned long )dev_priv;
26780#line 1347
26781    __cil_tmp72 = __cil_tmp71 + 2088;
26782#line 1347
26783    __cil_tmp73 = *((struct drm_device **)__cil_tmp72);
26784#line 1347
26785    __cil_tmp74 = (unsigned long )__cil_tmp73;
26786#line 1347
26787    __cil_tmp75 = __cil_tmp74 + __cil_tmp70;
26788#line 1347
26789    __cil_tmp76 = (struct list_head *)__cil_tmp75;
26790#line 1347
26791    __cil_tmp77 = (unsigned long )__cil_tmp76;
26792#line 1347
26793    __cil_tmp78 = (unsigned long )crtc;
26794#line 1347
26795    __cil_tmp79 = __cil_tmp78 + 8;
26796#line 1347
26797    __cil_tmp80 = (struct list_head *)__cil_tmp79;
26798#line 1347
26799    __cil_tmp81 = (unsigned long )__cil_tmp80;
26800#line 1347
26801    if (__cil_tmp81 != __cil_tmp77) {
26802
26803    } else {
26804#line 1347
26805      goto while_break;
26806    }
26807    }
26808    {
26809#line 1348
26810    __cil_tmp82 = (struct drm_framebuffer *)vfb;
26811#line 1348
26812    __cil_tmp83 = (unsigned long )__cil_tmp82;
26813#line 1348
26814    __cil_tmp84 = (unsigned long )crtc;
26815#line 1348
26816    __cil_tmp85 = __cil_tmp84 + 32;
26817#line 1348
26818    __cil_tmp86 = *((struct drm_framebuffer **)__cil_tmp85);
26819#line 1348
26820    __cil_tmp87 = (unsigned long )__cil_tmp86;
26821#line 1348
26822    if (__cil_tmp87 != __cil_tmp83) {
26823#line 1349
26824      goto __Cont;
26825    } else {
26826
26827    }
26828    }
26829#line 1350
26830    tmp___7 = num_units;
26831#line 1350
26832    num_units = num_units + 1;
26833#line 1350
26834    __mptr___2 = (struct drm_crtc    *)crtc;
26835#line 1350
26836    __cil_tmp88 = tmp___7 * 8UL;
26837#line 1350
26838    __cil_tmp89 = (unsigned long )(units) + __cil_tmp88;
26839#line 1350
26840    __cil_tmp90 = (struct vmw_display_unit *)0;
26841#line 1350
26842    __cil_tmp91 = (struct drm_crtc *)__cil_tmp90;
26843#line 1350
26844    __cil_tmp92 = (unsigned int )__cil_tmp91;
26845#line 1350
26846    __cil_tmp93 = (char *)__mptr___2;
26847#line 1350
26848    __cil_tmp94 = __cil_tmp93 - __cil_tmp92;
26849#line 1350
26850    *((struct vmw_display_unit **)__cil_tmp89) = (struct vmw_display_unit *)__cil_tmp94;
26851    __Cont: /* CIL Label */ 
26852#line 1347
26853    __cil_tmp95 = (unsigned long )crtc;
26854#line 1347
26855    __cil_tmp96 = __cil_tmp95 + 8;
26856#line 1347
26857    __cil_tmp97 = *((struct list_head **)__cil_tmp96);
26858#line 1347
26859    __mptr___1 = (struct list_head    *)__cil_tmp97;
26860#line 1347
26861    __cil_tmp98 = (struct drm_crtc *)0;
26862#line 1347
26863    __cil_tmp99 = (unsigned long )__cil_tmp98;
26864#line 1347
26865    __cil_tmp100 = __cil_tmp99 + 8;
26866#line 1347
26867    __cil_tmp101 = (struct list_head *)__cil_tmp100;
26868#line 1347
26869    __cil_tmp102 = (unsigned int )__cil_tmp101;
26870#line 1347
26871    __cil_tmp103 = (char *)__mptr___1;
26872#line 1347
26873    __cil_tmp104 = __cil_tmp103 - __cil_tmp102;
26874#line 1347
26875    crtc = (struct drm_crtc *)__cil_tmp104;
26876  }
26877  while_break: /* CIL Label */ ;
26878  }
26879  {
26880#line 1353
26881  while (1) {
26882    while_continue___0: /* CIL Label */ ;
26883    {
26884#line 1353
26885    __cil_tmp105 = (void *)0;
26886#line 1353
26887    __cil_tmp106 = (unsigned long )__cil_tmp105;
26888#line 1353
26889    __cil_tmp107 = (unsigned long )dmabuf;
26890#line 1353
26891    __cil_tmp108 = __cil_tmp107 == __cil_tmp106;
26892#line 1353
26893    __cil_tmp109 = ! __cil_tmp108;
26894#line 1353
26895    __cil_tmp110 = ! __cil_tmp109;
26896#line 1353
26897    __cil_tmp111 = (long )__cil_tmp110;
26898#line 1353
26899    tmp___8 = __builtin_expect(__cil_tmp111, 0L);
26900    }
26901#line 1353
26902    if (tmp___8) {
26903      {
26904#line 1353
26905      while (1) {
26906        while_continue___1: /* CIL Label */ ;
26907#line 1353
26908        __asm__  volatile   ("1:\tud2\n"
26909                             ".pushsection __bug_table,\"a\"\n"
26910                             "2:\t.long 1b - 2b, %c0 - 2b\n"
26911                             "\t.word %c1, 0\n"
26912                             "\t.org 2b+%c2\n"
26913                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
26914                             "i" (1353), "i" (12UL));
26915        {
26916#line 1353
26917        while (1) {
26918          while_continue___2: /* CIL Label */ ;
26919        }
26920        while_break___2: /* CIL Label */ ;
26921        }
26922#line 1353
26923        goto while_break___1;
26924      }
26925      while_break___1: /* CIL Label */ ;
26926      }
26927    } else {
26928
26929    }
26930#line 1353
26931    goto while_break___0;
26932  }
26933  while_break___0: /* CIL Label */ ;
26934  }
26935  {
26936#line 1354
26937  while (1) {
26938    while_continue___3: /* CIL Label */ ;
26939#line 1354
26940    if (! clips) {
26941#line 1354
26942      tmp___9 = 1;
26943    } else
26944#line 1354
26945    if (! num_clips) {
26946#line 1354
26947      tmp___9 = 1;
26948    } else {
26949#line 1354
26950      tmp___9 = 0;
26951    }
26952    {
26953#line 1354
26954    __cil_tmp112 = (long )tmp___9;
26955#line 1354
26956    tmp___10 = __builtin_expect(__cil_tmp112, 0L);
26957    }
26958#line 1354
26959    if (tmp___10) {
26960      {
26961#line 1354
26962      while (1) {
26963        while_continue___4: /* CIL Label */ ;
26964#line 1354
26965        __asm__  volatile   ("1:\tud2\n"
26966                             ".pushsection __bug_table,\"a\"\n"
26967                             "2:\t.long 1b - 2b, %c0 - 2b\n"
26968                             "\t.word %c1, 0\n"
26969                             "\t.org 2b+%c2\n"
26970                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"),
26971                             "i" (1354), "i" (12UL));
26972        {
26973#line 1354
26974        while (1) {
26975          while_continue___5: /* CIL Label */ ;
26976        }
26977        while_break___5: /* CIL Label */ ;
26978        }
26979#line 1354
26980        goto while_break___4;
26981      }
26982      while_break___4: /* CIL Label */ ;
26983      }
26984    } else {
26985
26986    }
26987#line 1354
26988    goto while_break___3;
26989  }
26990  while_break___3: /* CIL Label */ ;
26991  }
26992  {
26993#line 1357
26994  __cil_tmp113 = (unsigned long )num_units;
26995#line 1357
26996  __cil_tmp114 = (unsigned long )num_clips;
26997#line 1357
26998  __cil_tmp115 = 32UL * __cil_tmp114;
26999#line 1357
27000  __cil_tmp116 = __cil_tmp115 * __cil_tmp113;
27001#line 1357
27002  fifo_size = 20UL + __cil_tmp116;
27003#line 1358
27004  tmp___11 = kmalloc(fifo_size, 208U);
27005#line 1358
27006  cmd = (struct __anonstruct_cmd_435 *)tmp___11;
27007#line 1359
27008  __cil_tmp117 = (void *)0;
27009#line 1359
27010  __cil_tmp118 = (unsigned long )__cil_tmp117;
27011#line 1359
27012  __cil_tmp119 = (unsigned long )cmd;
27013#line 1359
27014  __cil_tmp120 = __cil_tmp119 == __cil_tmp118;
27015#line 1359
27016  __cil_tmp121 = ! __cil_tmp120;
27017#line 1359
27018  __cil_tmp122 = ! __cil_tmp121;
27019#line 1359
27020  __cil_tmp123 = (long )__cil_tmp122;
27021#line 1359
27022  tmp___12 = __builtin_expect(__cil_tmp123, 0L);
27023  }
27024#line 1359
27025  if (tmp___12) {
27026    {
27027#line 1360
27028    drm_err("vmw_kms_readback", "Failed to allocate temporary fifo memory.\n");
27029    }
27030#line 1361
27031    return (-12);
27032  } else {
27033
27034  }
27035  {
27036#line 1364
27037  __cil_tmp124 = (void *)cmd;
27038#line 1364
27039  memset(__cil_tmp124, 0, fifo_size);
27040#line 1365
27041  *((uint32_t *)cmd) = (uint32_t )36;
27042#line 1366
27043  __cil_tmp125 = 4 + 12;
27044#line 1366
27045  __cil_tmp126 = (unsigned long )cmd;
27046#line 1366
27047  __cil_tmp127 = __cil_tmp126 + __cil_tmp125;
27048#line 1366
27049  __cil_tmp128 = 0 + 84;
27050#line 1366
27051  __cil_tmp129 = (unsigned long )vfb;
27052#line 1366
27053  __cil_tmp130 = __cil_tmp129 + __cil_tmp128;
27054#line 1366
27055  __cil_tmp131 = *((int *)__cil_tmp130);
27056#line 1366
27057  *((uint32 *)__cil_tmp127) = (uint32 )__cil_tmp131;
27058#line 1367
27059  __cil_tmp132 = 0 + 1;
27060#line 1367
27061  __cil_tmp133 = 0 + __cil_tmp132;
27062#line 1367
27063  __cil_tmp134 = 12 + __cil_tmp133;
27064#line 1367
27065  __cil_tmp135 = 4 + __cil_tmp134;
27066#line 1367
27067  __cil_tmp136 = (unsigned long )cmd;
27068#line 1367
27069  __cil_tmp137 = __cil_tmp136 + __cil_tmp135;
27070#line 1367
27071  __cil_tmp138 = 0 + 80;
27072#line 1367
27073  __cil_tmp139 = (unsigned long )vfb;
27074#line 1367
27075  __cil_tmp140 = __cil_tmp139 + __cil_tmp138;
27076#line 1367
27077  *((uint32 *)__cil_tmp137) = *((unsigned int *)__cil_tmp140);
27078#line 1368
27079  __cil_tmp141 = 0 + 2;
27080#line 1368
27081  __cil_tmp142 = 0 + __cil_tmp141;
27082#line 1368
27083  __cil_tmp143 = 12 + __cil_tmp142;
27084#line 1368
27085  __cil_tmp144 = 4 + __cil_tmp143;
27086#line 1368
27087  __cil_tmp145 = (unsigned long )cmd;
27088#line 1368
27089  __cil_tmp146 = __cil_tmp145 + __cil_tmp144;
27090#line 1368
27091  *((uint32 *)__cil_tmp146) = (uint32 )0;
27092#line 1369
27093  __cil_tmp147 = 4 + 8;
27094#line 1369
27095  __cil_tmp148 = (unsigned long )cmd;
27096#line 1369
27097  __cil_tmp149 = __cil_tmp148 + __cil_tmp147;
27098#line 1369
27099  __cil_tmp150 = 0 * 4UL;
27100#line 1369
27101  __cil_tmp151 = 40 + __cil_tmp150;
27102#line 1369
27103  __cil_tmp152 = 0 + __cil_tmp151;
27104#line 1369
27105  __cil_tmp153 = (unsigned long )vfb;
27106#line 1369
27107  __cil_tmp154 = __cil_tmp153 + __cil_tmp152;
27108#line 1369
27109  *((uint32 *)__cil_tmp149) = *((unsigned int *)__cil_tmp154);
27110#line 1370
27111  __cil_tmp155 = (unsigned long )cmd;
27112#line 1370
27113  __cil_tmp156 = __cil_tmp155 + 4;
27114#line 1370
27115  __cil_tmp157 = (unsigned long )vfb;
27116#line 1370
27117  __cil_tmp158 = __cil_tmp157 + 152;
27118#line 1370
27119  *((uint32 *)__cil_tmp156) = *((uint32_t *)__cil_tmp158);
27120#line 1371
27121  __cil_tmp159 = 0 + 4;
27122#line 1371
27123  __cil_tmp160 = 4 + __cil_tmp159;
27124#line 1371
27125  __cil_tmp161 = (unsigned long )cmd;
27126#line 1371
27127  __cil_tmp162 = __cil_tmp161 + __cil_tmp160;
27128#line 1371
27129  *((uint32 *)__cil_tmp162) = (uint32 )0;
27130#line 1373
27131  __cil_tmp163 = cmd + 1;
27132#line 1373
27133  __cil_tmp164 = (void *)__cil_tmp163;
27134#line 1373
27135  blits = (struct __anonstruct_blits_436 *)__cil_tmp164;
27136#line 1374
27137  blits_pos = 0;
27138#line 1375
27139  i = 0;
27140  }
27141  {
27142#line 1375
27143  while (1) {
27144    while_continue___6: /* CIL Label */ ;
27145#line 1375
27146    if (i < num_units) {
27147
27148    } else {
27149#line 1375
27150      goto while_break___6;
27151    }
27152#line 1376
27153    c = clips;
27154#line 1377
27155    k = 0;
27156    {
27157#line 1377
27158    while (1) {
27159      while_continue___7: /* CIL Label */ ;
27160      {
27161#line 1377
27162      __cil_tmp165 = (uint32_t )k;
27163#line 1377
27164      if (__cil_tmp165 < num_clips) {
27165
27166      } else {
27167#line 1377
27168        goto while_break___7;
27169      }
27170      }
27171#line 1379
27172      __cil_tmp166 = 0 + 480;
27173#line 1379
27174      __cil_tmp167 = i * 8UL;
27175#line 1379
27176      __cil_tmp168 = (unsigned long )(units) + __cil_tmp167;
27177#line 1379
27178      __cil_tmp169 = *((struct vmw_display_unit **)__cil_tmp168);
27179#line 1379
27180      __cil_tmp170 = (unsigned long )__cil_tmp169;
27181#line 1379
27182      __cil_tmp171 = __cil_tmp170 + __cil_tmp166;
27183#line 1379
27184      __cil_tmp172 = *((int *)__cil_tmp171);
27185#line 1379
27186      __cil_tmp173 = *((int32_t *)c);
27187#line 1379
27188      clip_x1 = __cil_tmp173 - __cil_tmp172;
27189#line 1380
27190      __cil_tmp174 = (unsigned long )c;
27191#line 1380
27192      __cil_tmp175 = __cil_tmp174 + 8;
27193#line 1380
27194      __cil_tmp176 = *((uint32_t *)__cil_tmp175);
27195#line 1380
27196      __cil_tmp177 = 0 + 480;
27197#line 1380
27198      __cil_tmp178 = i * 8UL;
27199#line 1380
27200      __cil_tmp179 = (unsigned long )(units) + __cil_tmp178;
27201#line 1380
27202      __cil_tmp180 = *((struct vmw_display_unit **)__cil_tmp179);
27203#line 1380
27204      __cil_tmp181 = (unsigned long )__cil_tmp180;
27205#line 1380
27206      __cil_tmp182 = __cil_tmp181 + __cil_tmp177;
27207#line 1380
27208      __cil_tmp183 = *((int *)__cil_tmp182);
27209#line 1380
27210      __cil_tmp184 = *((int32_t *)c);
27211#line 1380
27212      __cil_tmp185 = __cil_tmp184 - __cil_tmp183;
27213#line 1380
27214      __cil_tmp186 = (uint32_t )__cil_tmp185;
27215#line 1380
27216      __cil_tmp187 = __cil_tmp186 + __cil_tmp176;
27217#line 1380
27218      clip_x2 = (int )__cil_tmp187;
27219#line 1381
27220      __cil_tmp188 = 0 + 484;
27221#line 1381
27222      __cil_tmp189 = i * 8UL;
27223#line 1381
27224      __cil_tmp190 = (unsigned long )(units) + __cil_tmp189;
27225#line 1381
27226      __cil_tmp191 = *((struct vmw_display_unit **)__cil_tmp190);
27227#line 1381
27228      __cil_tmp192 = (unsigned long )__cil_tmp191;
27229#line 1381
27230      __cil_tmp193 = __cil_tmp192 + __cil_tmp188;
27231#line 1381
27232      __cil_tmp194 = *((int *)__cil_tmp193);
27233#line 1381
27234      __cil_tmp195 = (unsigned long )c;
27235#line 1381
27236      __cil_tmp196 = __cil_tmp195 + 4;
27237#line 1381
27238      __cil_tmp197 = *((int32_t *)__cil_tmp196);
27239#line 1381
27240      clip_y1 = __cil_tmp197 - __cil_tmp194;
27241#line 1382
27242      __cil_tmp198 = (unsigned long )c;
27243#line 1382
27244      __cil_tmp199 = __cil_tmp198 + 12;
27245#line 1382
27246      __cil_tmp200 = *((uint32_t *)__cil_tmp199);
27247#line 1382
27248      __cil_tmp201 = 0 + 484;
27249#line 1382
27250      __cil_tmp202 = i * 8UL;
27251#line 1382
27252      __cil_tmp203 = (unsigned long )(units) + __cil_tmp202;
27253#line 1382
27254      __cil_tmp204 = *((struct vmw_display_unit **)__cil_tmp203);
27255#line 1382
27256      __cil_tmp205 = (unsigned long )__cil_tmp204;
27257#line 1382
27258      __cil_tmp206 = __cil_tmp205 + __cil_tmp201;
27259#line 1382
27260      __cil_tmp207 = *((int *)__cil_tmp206);
27261#line 1382
27262      __cil_tmp208 = (unsigned long )c;
27263#line 1382
27264      __cil_tmp209 = __cil_tmp208 + 4;
27265#line 1382
27266      __cil_tmp210 = *((int32_t *)__cil_tmp209);
27267#line 1382
27268      __cil_tmp211 = __cil_tmp210 - __cil_tmp207;
27269#line 1382
27270      __cil_tmp212 = (uint32_t )__cil_tmp211;
27271#line 1382
27272      __cil_tmp213 = __cil_tmp212 + __cil_tmp200;
27273#line 1382
27274      clip_y2 = (int )__cil_tmp213;
27275#line 1383
27276      dest_x = *((int32_t *)c);
27277#line 1384
27278      __cil_tmp214 = (unsigned long )c;
27279#line 1384
27280      __cil_tmp215 = __cil_tmp214 + 4;
27281#line 1384
27282      dest_y = *((int32_t *)__cil_tmp215);
27283#line 1389
27284      if (clip_x1 < 0) {
27285#line 1390
27286        __cil_tmp216 = - clip_x1;
27287#line 1390
27288        dest_x = dest_x + __cil_tmp216;
27289      } else {
27290
27291      }
27292#line 1391
27293      if (clip_y1 < 0) {
27294#line 1392
27295        __cil_tmp217 = - clip_y1;
27296#line 1392
27297        dest_y = dest_y + __cil_tmp217;
27298      } else {
27299
27300      }
27301#line 1395
27302      __cil_tmp218 = & _max1;
27303#line 1395
27304      *__cil_tmp218 = clip_x1;
27305#line 1395
27306      __cil_tmp219 = & _max2;
27307#line 1395
27308      *__cil_tmp219 = 0;
27309      {
27310#line 1395
27311      __cil_tmp220 = & _max2;
27312#line 1395
27313      __cil_tmp221 = *__cil_tmp220;
27314#line 1395
27315      __cil_tmp222 = & _max1;
27316#line 1395
27317      __cil_tmp223 = *__cil_tmp222;
27318#line 1395
27319      if (__cil_tmp223 > __cil_tmp221) {
27320#line 1395
27321        __cil_tmp224 = & _max1;
27322#line 1395
27323        tmp___13 = *__cil_tmp224;
27324      } else {
27325#line 1395
27326        __cil_tmp225 = & _max2;
27327#line 1395
27328        tmp___13 = *__cil_tmp225;
27329      }
27330      }
27331#line 1395
27332      clip_x1 = tmp___13;
27333#line 1396
27334      __cil_tmp226 = & _max1___0;
27335#line 1396
27336      *__cil_tmp226 = clip_y1;
27337#line 1396
27338      __cil_tmp227 = & _max2___0;
27339#line 1396
27340      *__cil_tmp227 = 0;
27341      {
27342#line 1396
27343      __cil_tmp228 = & _max2___0;
27344#line 1396
27345      __cil_tmp229 = *__cil_tmp228;
27346#line 1396
27347      __cil_tmp230 = & _max1___0;
27348#line 1396
27349      __cil_tmp231 = *__cil_tmp230;
27350#line 1396
27351      if (__cil_tmp231 > __cil_tmp229) {
27352#line 1396
27353        __cil_tmp232 = & _max1___0;
27354#line 1396
27355        tmp___14 = *__cil_tmp232;
27356      } else {
27357#line 1396
27358        __cil_tmp233 = & _max2___0;
27359#line 1396
27360        tmp___14 = *__cil_tmp233;
27361      }
27362      }
27363#line 1396
27364      clip_y1 = tmp___14;
27365#line 1397
27366      __cil_tmp234 = & _min1;
27367#line 1397
27368      *__cil_tmp234 = clip_x2;
27369#line 1397
27370      __cil_tmp235 = & _min2;
27371#line 1397
27372      __cil_tmp236 = 48 + 68;
27373#line 1397
27374      __cil_tmp237 = 0 + __cil_tmp236;
27375#line 1397
27376      __cil_tmp238 = i * 8UL;
27377#line 1397
27378      __cil_tmp239 = (unsigned long )(units) + __cil_tmp238;
27379#line 1397
27380      __cil_tmp240 = *((struct vmw_display_unit **)__cil_tmp239);
27381#line 1397
27382      __cil_tmp241 = (unsigned long )__cil_tmp240;
27383#line 1397
27384      __cil_tmp242 = __cil_tmp241 + __cil_tmp237;
27385#line 1397
27386      *__cil_tmp235 = *((int *)__cil_tmp242);
27387      {
27388#line 1397
27389      __cil_tmp243 = & _min2;
27390#line 1397
27391      __cil_tmp244 = *__cil_tmp243;
27392#line 1397
27393      __cil_tmp245 = & _min1;
27394#line 1397
27395      __cil_tmp246 = *__cil_tmp245;
27396#line 1397
27397      if (__cil_tmp246 < __cil_tmp244) {
27398#line 1397
27399        __cil_tmp247 = & _min1;
27400#line 1397
27401        tmp___15 = *__cil_tmp247;
27402      } else {
27403#line 1397
27404        __cil_tmp248 = & _min2;
27405#line 1397
27406        tmp___15 = *__cil_tmp248;
27407      }
27408      }
27409#line 1397
27410      clip_x2 = tmp___15;
27411#line 1398
27412      __cil_tmp249 = & _min1___0;
27413#line 1398
27414      *__cil_tmp249 = clip_y2;
27415#line 1398
27416      __cil_tmp250 = & _min2___0;
27417#line 1398
27418      __cil_tmp251 = 48 + 88;
27419#line 1398
27420      __cil_tmp252 = 0 + __cil_tmp251;
27421#line 1398
27422      __cil_tmp253 = i * 8UL;
27423#line 1398
27424      __cil_tmp254 = (unsigned long )(units) + __cil_tmp253;
27425#line 1398
27426      __cil_tmp255 = *((struct vmw_display_unit **)__cil_tmp254);
27427#line 1398
27428      __cil_tmp256 = (unsigned long )__cil_tmp255;
27429#line 1398
27430      __cil_tmp257 = __cil_tmp256 + __cil_tmp252;
27431#line 1398
27432      *__cil_tmp250 = *((int *)__cil_tmp257);
27433      {
27434#line 1398
27435      __cil_tmp258 = & _min2___0;
27436#line 1398
27437      __cil_tmp259 = *__cil_tmp258;
27438#line 1398
27439      __cil_tmp260 = & _min1___0;
27440#line 1398
27441      __cil_tmp261 = *__cil_tmp260;
27442#line 1398
27443      if (__cil_tmp261 < __cil_tmp259) {
27444#line 1398
27445        __cil_tmp262 = & _min1___0;
27446#line 1398
27447        tmp___16 = *__cil_tmp262;
27448      } else {
27449#line 1398
27450        __cil_tmp263 = & _min2___0;
27451#line 1398
27452        tmp___16 = *__cil_tmp263;
27453      }
27454      }
27455#line 1398
27456      clip_y2 = tmp___16;
27457      {
27458#line 1401
27459      __cil_tmp264 = 48 + 68;
27460#line 1401
27461      __cil_tmp265 = 0 + __cil_tmp264;
27462#line 1401
27463      __cil_tmp266 = i * 8UL;
27464#line 1401
27465      __cil_tmp267 = (unsigned long )(units) + __cil_tmp266;
27466#line 1401
27467      __cil_tmp268 = *((struct vmw_display_unit **)__cil_tmp267);
27468#line 1401
27469      __cil_tmp269 = (unsigned long )__cil_tmp268;
27470#line 1401
27471      __cil_tmp270 = __cil_tmp269 + __cil_tmp265;
27472#line 1401
27473      __cil_tmp271 = *((int *)__cil_tmp270);
27474#line 1401
27475      if (clip_x1 >= __cil_tmp271) {
27476#line 1404
27477        goto __Cont___0;
27478      } else {
27479        {
27480#line 1401
27481        __cil_tmp272 = 48 + 88;
27482#line 1401
27483        __cil_tmp273 = 0 + __cil_tmp272;
27484#line 1401
27485        __cil_tmp274 = i * 8UL;
27486#line 1401
27487        __cil_tmp275 = (unsigned long )(units) + __cil_tmp274;
27488#line 1401
27489        __cil_tmp276 = *((struct vmw_display_unit **)__cil_tmp275);
27490#line 1401
27491        __cil_tmp277 = (unsigned long )__cil_tmp276;
27492#line 1401
27493        __cil_tmp278 = __cil_tmp277 + __cil_tmp273;
27494#line 1401
27495        __cil_tmp279 = *((int *)__cil_tmp278);
27496#line 1401
27497        if (clip_y1 >= __cil_tmp279) {
27498#line 1404
27499          goto __Cont___0;
27500        } else
27501#line 1401
27502        if (clip_x2 <= 0) {
27503#line 1404
27504          goto __Cont___0;
27505        } else
27506#line 1401
27507        if (clip_y2 <= 0) {
27508#line 1404
27509          goto __Cont___0;
27510        } else {
27511
27512        }
27513        }
27514      }
27515      }
27516#line 1406
27517      __cil_tmp280 = blits + blits_pos;
27518#line 1406
27519      *((uint32_t *)__cil_tmp280) = (uint32_t )38;
27520#line 1407
27521      __cil_tmp281 = 4 + 24;
27522#line 1407
27523      __cil_tmp282 = blits + blits_pos;
27524#line 1407
27525      __cil_tmp283 = (unsigned long )__cil_tmp282;
27526#line 1407
27527      __cil_tmp284 = __cil_tmp283 + __cil_tmp281;
27528#line 1407
27529      __cil_tmp285 = i * 8UL;
27530#line 1407
27531      __cil_tmp286 = (unsigned long )(units) + __cil_tmp285;
27532#line 1407
27533      __cil_tmp287 = *((struct vmw_display_unit **)__cil_tmp286);
27534#line 1407
27535      __cil_tmp288 = (unsigned long )__cil_tmp287;
27536#line 1407
27537      __cil_tmp289 = __cil_tmp288 + 2032;
27538#line 1407
27539      *((uint32 *)__cil_tmp284) = *((unsigned int *)__cil_tmp289);
27540#line 1408
27541      __cil_tmp290 = blits + blits_pos;
27542#line 1408
27543      __cil_tmp291 = (unsigned long )__cil_tmp290;
27544#line 1408
27545      __cil_tmp292 = __cil_tmp291 + 4;
27546#line 1408
27547      *((int32 *)__cil_tmp292) = dest_x;
27548#line 1409
27549      __cil_tmp293 = 0 + 4;
27550#line 1409
27551      __cil_tmp294 = 4 + __cil_tmp293;
27552#line 1409
27553      __cil_tmp295 = blits + blits_pos;
27554#line 1409
27555      __cil_tmp296 = (unsigned long )__cil_tmp295;
27556#line 1409
27557      __cil_tmp297 = __cil_tmp296 + __cil_tmp294;
27558#line 1409
27559      *((int32 *)__cil_tmp297) = dest_y;
27560#line 1411
27561      __cil_tmp298 = 4 + 8;
27562#line 1411
27563      __cil_tmp299 = blits + blits_pos;
27564#line 1411
27565      __cil_tmp300 = (unsigned long )__cil_tmp299;
27566#line 1411
27567      __cil_tmp301 = __cil_tmp300 + __cil_tmp298;
27568#line 1411
27569      *((int32 *)__cil_tmp301) = clip_x1;
27570#line 1412
27571      __cil_tmp302 = 8 + 4;
27572#line 1412
27573      __cil_tmp303 = 4 + __cil_tmp302;
27574#line 1412
27575      __cil_tmp304 = blits + blits_pos;
27576#line 1412
27577      __cil_tmp305 = (unsigned long )__cil_tmp304;
27578#line 1412
27579      __cil_tmp306 = __cil_tmp305 + __cil_tmp303;
27580#line 1412
27581      *((int32 *)__cil_tmp306) = clip_y1;
27582#line 1413
27583      __cil_tmp307 = 8 + 8;
27584#line 1413
27585      __cil_tmp308 = 4 + __cil_tmp307;
27586#line 1413
27587      __cil_tmp309 = blits + blits_pos;
27588#line 1413
27589      __cil_tmp310 = (unsigned long )__cil_tmp309;
27590#line 1413
27591      __cil_tmp311 = __cil_tmp310 + __cil_tmp308;
27592#line 1413
27593      *((int32 *)__cil_tmp311) = clip_x2;
27594#line 1414
27595      __cil_tmp312 = 8 + 12;
27596#line 1414
27597      __cil_tmp313 = 4 + __cil_tmp312;
27598#line 1414
27599      __cil_tmp314 = blits + blits_pos;
27600#line 1414
27601      __cil_tmp315 = (unsigned long )__cil_tmp314;
27602#line 1414
27603      __cil_tmp316 = __cil_tmp315 + __cil_tmp313;
27604#line 1414
27605      *((int32 *)__cil_tmp316) = clip_y2;
27606#line 1415
27607      blits_pos = blits_pos + 1;
27608      __Cont___0: /* CIL Label */ 
27609#line 1377
27610      k = k + 1;
27611#line 1377
27612      c = c + 1;
27613    }
27614    while_break___7: /* CIL Label */ ;
27615    }
27616#line 1375
27617    i = i + 1;
27618  }
27619  while_break___6: /* CIL Label */ ;
27620  }
27621  {
27622#line 1419
27623  __cil_tmp317 = (unsigned long )blits_pos;
27624#line 1419
27625  __cil_tmp318 = 32UL * __cil_tmp317;
27626#line 1419
27627  fifo_size = 20UL + __cil_tmp318;
27628#line 1421
27629  __cil_tmp319 = (void *)0;
27630#line 1421
27631  __cil_tmp320 = (void *)cmd;
27632#line 1421
27633  __cil_tmp321 = (uint32_t )fifo_size;
27634#line 1421
27635  __cil_tmp322 = (uint64_t )0;
27636#line 1421
27637  __cil_tmp323 = (void *)0;
27638#line 1421
27639  __cil_tmp324 = (struct vmw_fence_obj **)__cil_tmp323;
27640#line 1421
27641  ret = vmw_execbuf_process(file_priv, dev_priv, __cil_tmp319, __cil_tmp320, __cil_tmp321,
27642                            __cil_tmp322, user_fence_rep, __cil_tmp324);
27643#line 1424
27644  __cil_tmp325 = (void    *)cmd;
27645#line 1424
27646  kfree(__cil_tmp325);
27647  }
27648#line 1426
27649  return (ret);
27650}
27651}
27652#line 1429 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
27653int vmw_kms_init(struct vmw_private *dev_priv ) 
27654{ struct drm_device *dev ;
27655  int ret ;
27656  unsigned long __cil_tmp4 ;
27657  unsigned long __cil_tmp5 ;
27658  unsigned long __cil_tmp6 ;
27659  unsigned long __cil_tmp7 ;
27660  unsigned long __cil_tmp8 ;
27661  unsigned long __cil_tmp9 ;
27662  unsigned long __cil_tmp10 ;
27663  unsigned long __cil_tmp11 ;
27664  unsigned long __cil_tmp12 ;
27665  unsigned long __cil_tmp13 ;
27666  unsigned long __cil_tmp14 ;
27667  unsigned long __cil_tmp15 ;
27668  unsigned long __cil_tmp16 ;
27669  unsigned long __cil_tmp17 ;
27670  unsigned long __cil_tmp18 ;
27671  unsigned long __cil_tmp19 ;
27672  unsigned long __cil_tmp20 ;
27673
27674  {
27675  {
27676#line 1431
27677  __cil_tmp4 = (unsigned long )dev_priv;
27678#line 1431
27679  __cil_tmp5 = __cil_tmp4 + 2088;
27680#line 1431
27681  dev = *((struct drm_device **)__cil_tmp5);
27682#line 1434
27683  drm_mode_config_init(dev);
27684#line 1435
27685  __cil_tmp6 = 1152 + 344;
27686#line 1435
27687  __cil_tmp7 = (unsigned long )dev;
27688#line 1435
27689  __cil_tmp8 = __cil_tmp7 + __cil_tmp6;
27690#line 1435
27691  *((struct drm_mode_config_funcs **)__cil_tmp8) = & vmw_kms_funcs;
27692#line 1436
27693  __cil_tmp9 = 1152 + 328;
27694#line 1436
27695  __cil_tmp10 = (unsigned long )dev;
27696#line 1436
27697  __cil_tmp11 = __cil_tmp10 + __cil_tmp9;
27698#line 1436
27699  *((int *)__cil_tmp11) = 1;
27700#line 1437
27701  __cil_tmp12 = 1152 + 332;
27702#line 1437
27703  __cil_tmp13 = (unsigned long )dev;
27704#line 1437
27705  __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
27706#line 1437
27707  *((int *)__cil_tmp14) = 1;
27708#line 1439
27709  __cil_tmp15 = 1152 + 336;
27710#line 1439
27711  __cil_tmp16 = (unsigned long )dev;
27712#line 1439
27713  __cil_tmp17 = __cil_tmp16 + __cil_tmp15;
27714#line 1439
27715  *((int *)__cil_tmp17) = 8192;
27716#line 1440
27717  __cil_tmp18 = 1152 + 340;
27718#line 1440
27719  __cil_tmp19 = (unsigned long )dev;
27720#line 1440
27721  __cil_tmp20 = __cil_tmp19 + __cil_tmp18;
27722#line 1440
27723  *((int *)__cil_tmp20) = 8192;
27724#line 1442
27725  ret = vmw_kms_init_screen_object_display(dev_priv);
27726  }
27727#line 1443
27728  if (ret) {
27729    {
27730#line 1444
27731    vmw_kms_init_legacy_display_system(dev_priv);
27732    }
27733  } else {
27734
27735  }
27736#line 1446
27737  return (0);
27738}
27739}
27740#line 1449 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
27741int vmw_kms_close(struct vmw_private *dev_priv ) 
27742{ unsigned long __cil_tmp2 ;
27743  unsigned long __cil_tmp3 ;
27744  struct drm_device *__cil_tmp4 ;
27745  unsigned long __cil_tmp5 ;
27746  unsigned long __cil_tmp6 ;
27747
27748  {
27749  {
27750#line 1456
27751  __cil_tmp2 = (unsigned long )dev_priv;
27752#line 1456
27753  __cil_tmp3 = __cil_tmp2 + 2088;
27754#line 1456
27755  __cil_tmp4 = *((struct drm_device **)__cil_tmp3);
27756#line 1456
27757  drm_mode_config_cleanup(__cil_tmp4);
27758  }
27759  {
27760#line 1457
27761  __cil_tmp5 = (unsigned long )dev_priv;
27762#line 1457
27763  __cil_tmp6 = __cil_tmp5 + 2616;
27764#line 1457
27765  if (*((struct vmw_screen_object_display **)__cil_tmp6)) {
27766    {
27767#line 1458
27768    vmw_kms_close_screen_object_display(dev_priv);
27769    }
27770  } else {
27771    {
27772#line 1460
27773    vmw_kms_close_legacy_display_system(dev_priv);
27774    }
27775  }
27776  }
27777#line 1461
27778  return (0);
27779}
27780}
27781#line 1464 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
27782int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
27783{ struct drm_vmw_cursor_bypass_arg *arg ;
27784  struct vmw_display_unit *du ;
27785  struct drm_mode_object *obj ;
27786  struct drm_crtc *crtc ;
27787  int ret ;
27788  struct list_head    *__mptr ;
27789  struct list_head    *__mptr___0 ;
27790  struct drm_crtc    *__mptr___1 ;
27791  struct drm_mode_object    *__mptr___2 ;
27792  struct drm_crtc    *__mptr___3 ;
27793  unsigned long __cil_tmp14 ;
27794  unsigned long __cil_tmp15 ;
27795  struct mutex *__cil_tmp16 ;
27796  uint32_t __cil_tmp17 ;
27797  unsigned long __cil_tmp18 ;
27798  unsigned long __cil_tmp19 ;
27799  unsigned long __cil_tmp20 ;
27800  struct list_head *__cil_tmp21 ;
27801  struct drm_crtc *__cil_tmp22 ;
27802  unsigned long __cil_tmp23 ;
27803  unsigned long __cil_tmp24 ;
27804  struct list_head *__cil_tmp25 ;
27805  unsigned int __cil_tmp26 ;
27806  char *__cil_tmp27 ;
27807  char *__cil_tmp28 ;
27808  unsigned long __cil_tmp29 ;
27809  unsigned long __cil_tmp30 ;
27810  unsigned long __cil_tmp31 ;
27811  struct list_head *__cil_tmp32 ;
27812  unsigned long __cil_tmp33 ;
27813  unsigned long __cil_tmp34 ;
27814  unsigned long __cil_tmp35 ;
27815  struct list_head *__cil_tmp36 ;
27816  unsigned long __cil_tmp37 ;
27817  struct vmw_display_unit *__cil_tmp38 ;
27818  struct drm_crtc *__cil_tmp39 ;
27819  unsigned int __cil_tmp40 ;
27820  char *__cil_tmp41 ;
27821  char *__cil_tmp42 ;
27822  unsigned long __cil_tmp43 ;
27823  unsigned long __cil_tmp44 ;
27824  unsigned long __cil_tmp45 ;
27825  unsigned long __cil_tmp46 ;
27826  unsigned long __cil_tmp47 ;
27827  unsigned long __cil_tmp48 ;
27828  unsigned long __cil_tmp49 ;
27829  unsigned long __cil_tmp50 ;
27830  unsigned long __cil_tmp51 ;
27831  unsigned long __cil_tmp52 ;
27832  struct list_head *__cil_tmp53 ;
27833  struct drm_crtc *__cil_tmp54 ;
27834  unsigned long __cil_tmp55 ;
27835  unsigned long __cil_tmp56 ;
27836  struct list_head *__cil_tmp57 ;
27837  unsigned int __cil_tmp58 ;
27838  char *__cil_tmp59 ;
27839  char *__cil_tmp60 ;
27840  unsigned long __cil_tmp61 ;
27841  unsigned long __cil_tmp62 ;
27842  struct mutex *__cil_tmp63 ;
27843  unsigned long __cil_tmp64 ;
27844  unsigned long __cil_tmp65 ;
27845  uint32_t __cil_tmp66 ;
27846  struct drm_crtc *__cil_tmp67 ;
27847  unsigned long __cil_tmp68 ;
27848  unsigned long __cil_tmp69 ;
27849  struct drm_mode_object *__cil_tmp70 ;
27850  unsigned int __cil_tmp71 ;
27851  char *__cil_tmp72 ;
27852  char *__cil_tmp73 ;
27853  struct vmw_display_unit *__cil_tmp74 ;
27854  struct drm_crtc *__cil_tmp75 ;
27855  unsigned int __cil_tmp76 ;
27856  char *__cil_tmp77 ;
27857  char *__cil_tmp78 ;
27858  unsigned long __cil_tmp79 ;
27859  unsigned long __cil_tmp80 ;
27860  unsigned long __cil_tmp81 ;
27861  unsigned long __cil_tmp82 ;
27862  unsigned long __cil_tmp83 ;
27863  unsigned long __cil_tmp84 ;
27864  unsigned long __cil_tmp85 ;
27865  unsigned long __cil_tmp86 ;
27866  unsigned long __cil_tmp87 ;
27867  unsigned long __cil_tmp88 ;
27868  struct mutex *__cil_tmp89 ;
27869
27870  {
27871  {
27872#line 1467
27873  arg = (struct drm_vmw_cursor_bypass_arg *)data;
27874#line 1471
27875  ret = 0;
27876#line 1474
27877  __cil_tmp14 = (unsigned long )dev;
27878#line 1474
27879  __cil_tmp15 = __cil_tmp14 + 1152;
27880#line 1474
27881  __cil_tmp16 = (struct mutex *)__cil_tmp15;
27882#line 1474
27883  mutex_lock(__cil_tmp16);
27884  }
27885  {
27886#line 1475
27887  __cil_tmp17 = *((uint32_t *)arg);
27888#line 1475
27889  if (__cil_tmp17 & 1U) {
27890#line 1477
27891    __cil_tmp18 = 1152 + 296;
27892#line 1477
27893    __cil_tmp19 = (unsigned long )dev;
27894#line 1477
27895    __cil_tmp20 = __cil_tmp19 + __cil_tmp18;
27896#line 1477
27897    __cil_tmp21 = *((struct list_head **)__cil_tmp20);
27898#line 1477
27899    __mptr = (struct list_head    *)__cil_tmp21;
27900#line 1477
27901    __cil_tmp22 = (struct drm_crtc *)0;
27902#line 1477
27903    __cil_tmp23 = (unsigned long )__cil_tmp22;
27904#line 1477
27905    __cil_tmp24 = __cil_tmp23 + 8;
27906#line 1477
27907    __cil_tmp25 = (struct list_head *)__cil_tmp24;
27908#line 1477
27909    __cil_tmp26 = (unsigned int )__cil_tmp25;
27910#line 1477
27911    __cil_tmp27 = (char *)__mptr;
27912#line 1477
27913    __cil_tmp28 = __cil_tmp27 - __cil_tmp26;
27914#line 1477
27915    crtc = (struct drm_crtc *)__cil_tmp28;
27916    {
27917#line 1477
27918    while (1) {
27919      while_continue: /* CIL Label */ ;
27920      {
27921#line 1477
27922      __cil_tmp29 = 1152 + 296;
27923#line 1477
27924      __cil_tmp30 = (unsigned long )dev;
27925#line 1477
27926      __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
27927#line 1477
27928      __cil_tmp32 = (struct list_head *)__cil_tmp31;
27929#line 1477
27930      __cil_tmp33 = (unsigned long )__cil_tmp32;
27931#line 1477
27932      __cil_tmp34 = (unsigned long )crtc;
27933#line 1477
27934      __cil_tmp35 = __cil_tmp34 + 8;
27935#line 1477
27936      __cil_tmp36 = (struct list_head *)__cil_tmp35;
27937#line 1477
27938      __cil_tmp37 = (unsigned long )__cil_tmp36;
27939#line 1477
27940      if (__cil_tmp37 != __cil_tmp33) {
27941
27942      } else {
27943#line 1477
27944        goto while_break;
27945      }
27946      }
27947#line 1478
27948      __mptr___1 = (struct drm_crtc    *)crtc;
27949#line 1478
27950      __cil_tmp38 = (struct vmw_display_unit *)0;
27951#line 1478
27952      __cil_tmp39 = (struct drm_crtc *)__cil_tmp38;
27953#line 1478
27954      __cil_tmp40 = (unsigned int )__cil_tmp39;
27955#line 1478
27956      __cil_tmp41 = (char *)__mptr___1;
27957#line 1478
27958      __cil_tmp42 = __cil_tmp41 - __cil_tmp40;
27959#line 1478
27960      du = (struct vmw_display_unit *)__cil_tmp42;
27961#line 1479
27962      __cil_tmp43 = (unsigned long )du;
27963#line 1479
27964      __cil_tmp44 = __cil_tmp43 + 2024;
27965#line 1479
27966      __cil_tmp45 = (unsigned long )arg;
27967#line 1479
27968      __cil_tmp46 = __cil_tmp45 + 16;
27969#line 1479
27970      *((int *)__cil_tmp44) = *((int32_t *)__cil_tmp46);
27971#line 1480
27972      __cil_tmp47 = (unsigned long )du;
27973#line 1480
27974      __cil_tmp48 = __cil_tmp47 + 2028;
27975#line 1480
27976      __cil_tmp49 = (unsigned long )arg;
27977#line 1480
27978      __cil_tmp50 = __cil_tmp49 + 20;
27979#line 1480
27980      *((int *)__cil_tmp48) = *((int32_t *)__cil_tmp50);
27981#line 1477
27982      __cil_tmp51 = (unsigned long )crtc;
27983#line 1477
27984      __cil_tmp52 = __cil_tmp51 + 8;
27985#line 1477
27986      __cil_tmp53 = *((struct list_head **)__cil_tmp52);
27987#line 1477
27988      __mptr___0 = (struct list_head    *)__cil_tmp53;
27989#line 1477
27990      __cil_tmp54 = (struct drm_crtc *)0;
27991#line 1477
27992      __cil_tmp55 = (unsigned long )__cil_tmp54;
27993#line 1477
27994      __cil_tmp56 = __cil_tmp55 + 8;
27995#line 1477
27996      __cil_tmp57 = (struct list_head *)__cil_tmp56;
27997#line 1477
27998      __cil_tmp58 = (unsigned int )__cil_tmp57;
27999#line 1477
28000      __cil_tmp59 = (char *)__mptr___0;
28001#line 1477
28002      __cil_tmp60 = __cil_tmp59 - __cil_tmp58;
28003#line 1477
28004      crtc = (struct drm_crtc *)__cil_tmp60;
28005    }
28006    while_break: /* CIL Label */ ;
28007    }
28008    {
28009#line 1483
28010    __cil_tmp61 = (unsigned long )dev;
28011#line 1483
28012    __cil_tmp62 = __cil_tmp61 + 1152;
28013#line 1483
28014    __cil_tmp63 = (struct mutex *)__cil_tmp62;
28015#line 1483
28016    mutex_unlock(__cil_tmp63);
28017    }
28018#line 1484
28019    return (0);
28020  } else {
28021
28022  }
28023  }
28024  {
28025#line 1487
28026  __cil_tmp64 = (unsigned long )arg;
28027#line 1487
28028  __cil_tmp65 = __cil_tmp64 + 4;
28029#line 1487
28030  __cil_tmp66 = *((uint32_t *)__cil_tmp65);
28031#line 1487
28032  obj = drm_mode_object_find(dev, __cil_tmp66, 3435973836U);
28033  }
28034#line 1488
28035  if (! obj) {
28036#line 1489
28037    ret = -22;
28038#line 1490
28039    goto out;
28040  } else {
28041
28042  }
28043#line 1493
28044  __mptr___2 = (struct drm_mode_object    *)obj;
28045#line 1493
28046  __cil_tmp67 = (struct drm_crtc *)0;
28047#line 1493
28048  __cil_tmp68 = (unsigned long )__cil_tmp67;
28049#line 1493
28050  __cil_tmp69 = __cil_tmp68 + 24;
28051#line 1493
28052  __cil_tmp70 = (struct drm_mode_object *)__cil_tmp69;
28053#line 1493
28054  __cil_tmp71 = (unsigned int )__cil_tmp70;
28055#line 1493
28056  __cil_tmp72 = (char *)__mptr___2;
28057#line 1493
28058  __cil_tmp73 = __cil_tmp72 - __cil_tmp71;
28059#line 1493
28060  crtc = (struct drm_crtc *)__cil_tmp73;
28061#line 1494
28062  __mptr___3 = (struct drm_crtc    *)crtc;
28063#line 1494
28064  __cil_tmp74 = (struct vmw_display_unit *)0;
28065#line 1494
28066  __cil_tmp75 = (struct drm_crtc *)__cil_tmp74;
28067#line 1494
28068  __cil_tmp76 = (unsigned int )__cil_tmp75;
28069#line 1494
28070  __cil_tmp77 = (char *)__mptr___3;
28071#line 1494
28072  __cil_tmp78 = __cil_tmp77 - __cil_tmp76;
28073#line 1494
28074  du = (struct vmw_display_unit *)__cil_tmp78;
28075#line 1496
28076  __cil_tmp79 = (unsigned long )du;
28077#line 1496
28078  __cil_tmp80 = __cil_tmp79 + 2024;
28079#line 1496
28080  __cil_tmp81 = (unsigned long )arg;
28081#line 1496
28082  __cil_tmp82 = __cil_tmp81 + 16;
28083#line 1496
28084  *((int *)__cil_tmp80) = *((int32_t *)__cil_tmp82);
28085#line 1497
28086  __cil_tmp83 = (unsigned long )du;
28087#line 1497
28088  __cil_tmp84 = __cil_tmp83 + 2028;
28089#line 1497
28090  __cil_tmp85 = (unsigned long )arg;
28091#line 1497
28092  __cil_tmp86 = __cil_tmp85 + 20;
28093#line 1497
28094  *((int *)__cil_tmp84) = *((int32_t *)__cil_tmp86);
28095  out: 
28096  {
28097#line 1500
28098  __cil_tmp87 = (unsigned long )dev;
28099#line 1500
28100  __cil_tmp88 = __cil_tmp87 + 1152;
28101#line 1500
28102  __cil_tmp89 = (struct mutex *)__cil_tmp88;
28103#line 1500
28104  mutex_unlock(__cil_tmp89);
28105  }
28106#line 1502
28107  return (ret);
28108}
28109}
28110#line 1505 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28111int vmw_kms_write_svga(struct vmw_private *vmw_priv___0 , unsigned int width , unsigned int height ,
28112                       unsigned int pitch , unsigned int bpp , unsigned int depth ) 
28113{ bool tmp___7 ;
28114  uint32_t tmp___8 ;
28115  uint32_t tmp___9 ;
28116  unsigned long __cil_tmp10 ;
28117  unsigned long __cil_tmp11 ;
28118  uint32_t __cil_tmp12 ;
28119  unsigned long __cil_tmp13 ;
28120  unsigned long __cil_tmp14 ;
28121  __le32 *__cil_tmp15 ;
28122  __le32 *__cil_tmp16 ;
28123  void *__cil_tmp17 ;
28124
28125  {
28126  {
28127#line 1509
28128  __cil_tmp10 = (unsigned long )vmw_priv___0;
28129#line 1509
28130  __cil_tmp11 = __cil_tmp10 + 2156;
28131#line 1509
28132  __cil_tmp12 = *((uint32_t *)__cil_tmp11);
28133#line 1509
28134  if (__cil_tmp12 & 131072U) {
28135    {
28136#line 1510
28137    vmw_write(vmw_priv___0, 32U, pitch);
28138    }
28139  } else {
28140    {
28141#line 1511
28142    tmp___7 = vmw_fifo_have_pitchlock(vmw_priv___0);
28143    }
28144#line 1511
28145    if (tmp___7) {
28146      {
28147#line 1512
28148      __cil_tmp13 = (unsigned long )vmw_priv___0;
28149#line 1512
28150      __cil_tmp14 = __cil_tmp13 + 2144;
28151#line 1512
28152      __cil_tmp15 = *((__le32 **)__cil_tmp14);
28153#line 1512
28154      __cil_tmp16 = __cil_tmp15 + 8;
28155#line 1512
28156      __cil_tmp17 = (void *)__cil_tmp16;
28157#line 1512
28158      iowrite32(pitch, __cil_tmp17);
28159      }
28160    } else {
28161
28162    }
28163  }
28164  }
28165  {
28166#line 1513
28167  vmw_write(vmw_priv___0, 2U, width);
28168#line 1514
28169  vmw_write(vmw_priv___0, 3U, height);
28170#line 1515
28171  vmw_write(vmw_priv___0, 7U, bpp);
28172#line 1517
28173  tmp___9 = vmw_read(vmw_priv___0, 6U);
28174  }
28175#line 1517
28176  if (tmp___9 != depth) {
28177    {
28178#line 1518
28179    tmp___8 = vmw_read(vmw_priv___0, 6U);
28180#line 1518
28181    drm_err("vmw_kms_write_svga", "Invalid depth %u for %u bpp, host expects %u\n",
28182            depth, bpp, tmp___8);
28183    }
28184#line 1520
28185    return (-22);
28186  } else {
28187
28188  }
28189#line 1523
28190  return (0);
28191}
28192}
28193#line 1526 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28194int vmw_kms_save_vga(struct vmw_private *vmw_priv___0 ) 
28195{ struct vmw_vga_topology_state *save ;
28196  uint32_t i ;
28197  bool tmp___7 ;
28198  unsigned long __cil_tmp5 ;
28199  unsigned long __cil_tmp6 ;
28200  unsigned long __cil_tmp7 ;
28201  unsigned long __cil_tmp8 ;
28202  unsigned long __cil_tmp9 ;
28203  unsigned long __cil_tmp10 ;
28204  unsigned long __cil_tmp11 ;
28205  unsigned long __cil_tmp12 ;
28206  uint32_t __cil_tmp13 ;
28207  unsigned long __cil_tmp14 ;
28208  unsigned long __cil_tmp15 ;
28209  unsigned long __cil_tmp16 ;
28210  unsigned long __cil_tmp17 ;
28211  unsigned long __cil_tmp18 ;
28212  unsigned long __cil_tmp19 ;
28213  __le32 *__cil_tmp20 ;
28214  __le32 *__cil_tmp21 ;
28215  void *__cil_tmp22 ;
28216  unsigned long __cil_tmp23 ;
28217  unsigned long __cil_tmp24 ;
28218  uint32_t __cil_tmp25 ;
28219  unsigned int __cil_tmp26 ;
28220  unsigned long __cil_tmp27 ;
28221  unsigned long __cil_tmp28 ;
28222  unsigned long __cil_tmp29 ;
28223  unsigned long __cil_tmp30 ;
28224  uint32_t __cil_tmp31 ;
28225  unsigned long __cil_tmp32 ;
28226  unsigned long __cil_tmp33 ;
28227  unsigned long __cil_tmp34 ;
28228  unsigned long __cil_tmp35 ;
28229  uint32_t __cil_tmp36 ;
28230  unsigned long __cil_tmp37 ;
28231  unsigned long __cil_tmp38 ;
28232  unsigned long __cil_tmp39 ;
28233  unsigned long __cil_tmp40 ;
28234  unsigned long __cil_tmp41 ;
28235  unsigned long __cil_tmp42 ;
28236  unsigned long __cil_tmp43 ;
28237  unsigned long __cil_tmp44 ;
28238  unsigned long __cil_tmp45 ;
28239  unsigned long __cil_tmp46 ;
28240  unsigned long __cil_tmp47 ;
28241  unsigned long __cil_tmp48 ;
28242  unsigned long __cil_tmp49 ;
28243  unsigned long __cil_tmp50 ;
28244  uint32_t __cil_tmp51 ;
28245  uint32_t __cil_tmp52 ;
28246  unsigned long __cil_tmp53 ;
28247  unsigned long __cil_tmp54 ;
28248  uint32_t __cil_tmp55 ;
28249  unsigned long __cil_tmp56 ;
28250  unsigned long __cil_tmp57 ;
28251  uint32_t __cil_tmp58 ;
28252  unsigned long __cil_tmp59 ;
28253  unsigned long __cil_tmp60 ;
28254  uint32_t __cil_tmp61 ;
28255  unsigned long __cil_tmp62 ;
28256  unsigned long __cil_tmp63 ;
28257  unsigned long __cil_tmp64 ;
28258  unsigned long __cil_tmp65 ;
28259  uint32_t __cil_tmp66 ;
28260  unsigned long __cil_tmp67 ;
28261  unsigned long __cil_tmp68 ;
28262  uint32_t __cil_tmp69 ;
28263
28264  {
28265  {
28266#line 1531
28267  __cil_tmp5 = (unsigned long )vmw_priv___0;
28268#line 1531
28269  __cil_tmp6 = __cil_tmp5 + 2576;
28270#line 1531
28271  *((uint32_t *)__cil_tmp6) = vmw_read(vmw_priv___0, 2U);
28272#line 1532
28273  __cil_tmp7 = (unsigned long )vmw_priv___0;
28274#line 1532
28275  __cil_tmp8 = __cil_tmp7 + 2580;
28276#line 1532
28277  *((uint32_t *)__cil_tmp8) = vmw_read(vmw_priv___0, 3U);
28278#line 1533
28279  __cil_tmp9 = (unsigned long )vmw_priv___0;
28280#line 1533
28281  __cil_tmp10 = __cil_tmp9 + 2584;
28282#line 1533
28283  *((uint32_t *)__cil_tmp10) = vmw_read(vmw_priv___0, 7U);
28284  }
28285  {
28286#line 1534
28287  __cil_tmp11 = (unsigned long )vmw_priv___0;
28288#line 1534
28289  __cil_tmp12 = __cil_tmp11 + 2156;
28290#line 1534
28291  __cil_tmp13 = *((uint32_t *)__cil_tmp12);
28292#line 1534
28293  if (__cil_tmp13 & 131072U) {
28294    {
28295#line 1535
28296    __cil_tmp14 = (unsigned long )vmw_priv___0;
28297#line 1535
28298    __cil_tmp15 = __cil_tmp14 + 2592;
28299#line 1535
28300    *((uint32_t *)__cil_tmp15) = vmw_read(vmw_priv___0, 32U);
28301    }
28302  } else {
28303    {
28304#line 1537
28305    tmp___7 = vmw_fifo_have_pitchlock(vmw_priv___0);
28306    }
28307#line 1537
28308    if (tmp___7) {
28309      {
28310#line 1538
28311      __cil_tmp16 = (unsigned long )vmw_priv___0;
28312#line 1538
28313      __cil_tmp17 = __cil_tmp16 + 2592;
28314#line 1538
28315      __cil_tmp18 = (unsigned long )vmw_priv___0;
28316#line 1538
28317      __cil_tmp19 = __cil_tmp18 + 2144;
28318#line 1538
28319      __cil_tmp20 = *((__le32 **)__cil_tmp19);
28320#line 1538
28321      __cil_tmp21 = __cil_tmp20 + 8;
28322#line 1538
28323      __cil_tmp22 = (void *)__cil_tmp21;
28324#line 1538
28325      *((uint32_t *)__cil_tmp17) = ioread32(__cil_tmp22);
28326      }
28327    } else {
28328
28329    }
28330  }
28331  }
28332  {
28333#line 1541
28334  __cil_tmp23 = (unsigned long )vmw_priv___0;
28335#line 1541
28336  __cil_tmp24 = __cil_tmp23 + 2156;
28337#line 1541
28338  __cil_tmp25 = *((uint32_t *)__cil_tmp24);
28339#line 1541
28340  __cil_tmp26 = __cil_tmp25 & 524288U;
28341#line 1541
28342  if (! __cil_tmp26) {
28343#line 1542
28344    return (0);
28345  } else {
28346
28347  }
28348  }
28349  {
28350#line 1544
28351  __cil_tmp27 = (unsigned long )vmw_priv___0;
28352#line 1544
28353  __cil_tmp28 = __cil_tmp27 + 2596;
28354#line 1544
28355  *((uint32_t *)__cil_tmp28) = vmw_read(vmw_priv___0, 34U);
28356  }
28357  {
28358#line 1547
28359  __cil_tmp29 = (unsigned long )vmw_priv___0;
28360#line 1547
28361  __cil_tmp30 = __cil_tmp29 + 2596;
28362#line 1547
28363  __cil_tmp31 = *((uint32_t *)__cil_tmp30);
28364#line 1547
28365  if (__cil_tmp31 == 0U) {
28366#line 1548
28367    __cil_tmp32 = (unsigned long )vmw_priv___0;
28368#line 1548
28369    __cil_tmp33 = __cil_tmp32 + 2596;
28370#line 1548
28371    *((uint32_t *)__cil_tmp33) = (uint32_t )1;
28372  } else {
28373
28374  }
28375  }
28376#line 1550
28377  i = (uint32_t )0;
28378  {
28379#line 1550
28380  while (1) {
28381    while_continue: /* CIL Label */ ;
28382    {
28383#line 1550
28384    __cil_tmp34 = (unsigned long )vmw_priv___0;
28385#line 1550
28386    __cil_tmp35 = __cil_tmp34 + 2596;
28387#line 1550
28388    __cil_tmp36 = *((uint32_t *)__cil_tmp35);
28389#line 1550
28390    if (i < __cil_tmp36) {
28391
28392    } else {
28393#line 1550
28394      goto while_break;
28395    }
28396    }
28397    {
28398#line 1551
28399    __cil_tmp37 = i * 20UL;
28400#line 1551
28401    __cil_tmp38 = 2256 + __cil_tmp37;
28402#line 1551
28403    __cil_tmp39 = (unsigned long )vmw_priv___0;
28404#line 1551
28405    __cil_tmp40 = __cil_tmp39 + __cil_tmp38;
28406#line 1551
28407    save = (struct vmw_vga_topology_state *)__cil_tmp40;
28408#line 1552
28409    vmw_write(vmw_priv___0, 35U, i);
28410#line 1553
28411    __cil_tmp41 = (unsigned long )save;
28412#line 1553
28413    __cil_tmp42 = __cil_tmp41 + 8;
28414#line 1553
28415    *((uint32_t *)__cil_tmp42) = vmw_read(vmw_priv___0, 36U);
28416#line 1554
28417    __cil_tmp43 = (unsigned long )save;
28418#line 1554
28419    __cil_tmp44 = __cil_tmp43 + 12;
28420#line 1554
28421    *((uint32_t *)__cil_tmp44) = vmw_read(vmw_priv___0, 37U);
28422#line 1555
28423    __cil_tmp45 = (unsigned long )save;
28424#line 1555
28425    __cil_tmp46 = __cil_tmp45 + 16;
28426#line 1555
28427    *((uint32_t *)__cil_tmp46) = vmw_read(vmw_priv___0, 38U);
28428#line 1556
28429    *((uint32_t *)save) = vmw_read(vmw_priv___0, 39U);
28430#line 1557
28431    __cil_tmp47 = (unsigned long )save;
28432#line 1557
28433    __cil_tmp48 = __cil_tmp47 + 4;
28434#line 1557
28435    *((uint32_t *)__cil_tmp48) = vmw_read(vmw_priv___0, 40U);
28436#line 1558
28437    vmw_write(vmw_priv___0, 35U, 4294967295U);
28438    }
28439#line 1559
28440    if (i == 0U) {
28441      {
28442#line 1559
28443      __cil_tmp49 = (unsigned long )vmw_priv___0;
28444#line 1559
28445      __cil_tmp50 = __cil_tmp49 + 2596;
28446#line 1559
28447      __cil_tmp51 = *((uint32_t *)__cil_tmp50);
28448#line 1559
28449      if (__cil_tmp51 == 1U) {
28450        {
28451#line 1559
28452        __cil_tmp52 = *((uint32_t *)save);
28453#line 1559
28454        if (__cil_tmp52 == 0U) {
28455          {
28456#line 1559
28457          __cil_tmp53 = (unsigned long )save;
28458#line 1559
28459          __cil_tmp54 = __cil_tmp53 + 4;
28460#line 1559
28461          __cil_tmp55 = *((uint32_t *)__cil_tmp54);
28462#line 1559
28463          if (__cil_tmp55 == 0U) {
28464#line 1567
28465            __cil_tmp56 = (unsigned long )save;
28466#line 1567
28467            __cil_tmp57 = __cil_tmp56 + 12;
28468#line 1567
28469            __cil_tmp58 = *((uint32_t *)__cil_tmp57);
28470#line 1567
28471            __cil_tmp59 = (unsigned long )vmw_priv___0;
28472#line 1567
28473            __cil_tmp60 = __cil_tmp59 + 2576;
28474#line 1567
28475            __cil_tmp61 = *((uint32_t *)__cil_tmp60);
28476#line 1567
28477            *((uint32_t *)save) = __cil_tmp61 - __cil_tmp58;
28478#line 1568
28479            __cil_tmp62 = (unsigned long )save;
28480#line 1568
28481            __cil_tmp63 = __cil_tmp62 + 4;
28482#line 1568
28483            __cil_tmp64 = (unsigned long )save;
28484#line 1568
28485            __cil_tmp65 = __cil_tmp64 + 16;
28486#line 1568
28487            __cil_tmp66 = *((uint32_t *)__cil_tmp65);
28488#line 1568
28489            __cil_tmp67 = (unsigned long )vmw_priv___0;
28490#line 1568
28491            __cil_tmp68 = __cil_tmp67 + 2580;
28492#line 1568
28493            __cil_tmp69 = *((uint32_t *)__cil_tmp68);
28494#line 1568
28495            *((uint32_t *)__cil_tmp63) = __cil_tmp69 - __cil_tmp66;
28496          } else {
28497
28498          }
28499          }
28500        } else {
28501
28502        }
28503        }
28504      } else {
28505
28506      }
28507      }
28508    } else {
28509
28510    }
28511#line 1550
28512    i = i + 1U;
28513  }
28514  while_break: /* CIL Label */ ;
28515  }
28516#line 1572
28517  return (0);
28518}
28519}
28520#line 1575 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28521int vmw_kms_restore_vga(struct vmw_private *vmw_priv___0 ) 
28522{ struct vmw_vga_topology_state *save ;
28523  uint32_t i ;
28524  bool tmp___7 ;
28525  unsigned long __cil_tmp5 ;
28526  unsigned long __cil_tmp6 ;
28527  uint32_t __cil_tmp7 ;
28528  unsigned long __cil_tmp8 ;
28529  unsigned long __cil_tmp9 ;
28530  uint32_t __cil_tmp10 ;
28531  unsigned long __cil_tmp11 ;
28532  unsigned long __cil_tmp12 ;
28533  uint32_t __cil_tmp13 ;
28534  unsigned long __cil_tmp14 ;
28535  unsigned long __cil_tmp15 ;
28536  uint32_t __cil_tmp16 ;
28537  unsigned long __cil_tmp17 ;
28538  unsigned long __cil_tmp18 ;
28539  uint32_t __cil_tmp19 ;
28540  unsigned long __cil_tmp20 ;
28541  unsigned long __cil_tmp21 ;
28542  uint32_t __cil_tmp22 ;
28543  unsigned long __cil_tmp23 ;
28544  unsigned long __cil_tmp24 ;
28545  __le32 *__cil_tmp25 ;
28546  __le32 *__cil_tmp26 ;
28547  void *__cil_tmp27 ;
28548  unsigned long __cil_tmp28 ;
28549  unsigned long __cil_tmp29 ;
28550  uint32_t __cil_tmp30 ;
28551  unsigned int __cil_tmp31 ;
28552  unsigned long __cil_tmp32 ;
28553  unsigned long __cil_tmp33 ;
28554  uint32_t __cil_tmp34 ;
28555  unsigned long __cil_tmp35 ;
28556  unsigned long __cil_tmp36 ;
28557  unsigned long __cil_tmp37 ;
28558  unsigned long __cil_tmp38 ;
28559  unsigned long __cil_tmp39 ;
28560  unsigned long __cil_tmp40 ;
28561  uint32_t __cil_tmp41 ;
28562  unsigned long __cil_tmp42 ;
28563  unsigned long __cil_tmp43 ;
28564  uint32_t __cil_tmp44 ;
28565  unsigned long __cil_tmp45 ;
28566  unsigned long __cil_tmp46 ;
28567  uint32_t __cil_tmp47 ;
28568  uint32_t __cil_tmp48 ;
28569  unsigned long __cil_tmp49 ;
28570  unsigned long __cil_tmp50 ;
28571  uint32_t __cil_tmp51 ;
28572
28573  {
28574  {
28575#line 1580
28576  __cil_tmp5 = (unsigned long )vmw_priv___0;
28577#line 1580
28578  __cil_tmp6 = __cil_tmp5 + 2576;
28579#line 1580
28580  __cil_tmp7 = *((uint32_t *)__cil_tmp6);
28581#line 1580
28582  vmw_write(vmw_priv___0, 2U, __cil_tmp7);
28583#line 1581
28584  __cil_tmp8 = (unsigned long )vmw_priv___0;
28585#line 1581
28586  __cil_tmp9 = __cil_tmp8 + 2580;
28587#line 1581
28588  __cil_tmp10 = *((uint32_t *)__cil_tmp9);
28589#line 1581
28590  vmw_write(vmw_priv___0, 3U, __cil_tmp10);
28591#line 1582
28592  __cil_tmp11 = (unsigned long )vmw_priv___0;
28593#line 1582
28594  __cil_tmp12 = __cil_tmp11 + 2584;
28595#line 1582
28596  __cil_tmp13 = *((uint32_t *)__cil_tmp12);
28597#line 1582
28598  vmw_write(vmw_priv___0, 7U, __cil_tmp13);
28599  }
28600  {
28601#line 1583
28602  __cil_tmp14 = (unsigned long )vmw_priv___0;
28603#line 1583
28604  __cil_tmp15 = __cil_tmp14 + 2156;
28605#line 1583
28606  __cil_tmp16 = *((uint32_t *)__cil_tmp15);
28607#line 1583
28608  if (__cil_tmp16 & 131072U) {
28609    {
28610#line 1584
28611    __cil_tmp17 = (unsigned long )vmw_priv___0;
28612#line 1584
28613    __cil_tmp18 = __cil_tmp17 + 2592;
28614#line 1584
28615    __cil_tmp19 = *((uint32_t *)__cil_tmp18);
28616#line 1584
28617    vmw_write(vmw_priv___0, 32U, __cil_tmp19);
28618    }
28619  } else {
28620    {
28621#line 1586
28622    tmp___7 = vmw_fifo_have_pitchlock(vmw_priv___0);
28623    }
28624#line 1586
28625    if (tmp___7) {
28626      {
28627#line 1587
28628      __cil_tmp20 = (unsigned long )vmw_priv___0;
28629#line 1587
28630      __cil_tmp21 = __cil_tmp20 + 2592;
28631#line 1587
28632      __cil_tmp22 = *((uint32_t *)__cil_tmp21);
28633#line 1587
28634      __cil_tmp23 = (unsigned long )vmw_priv___0;
28635#line 1587
28636      __cil_tmp24 = __cil_tmp23 + 2144;
28637#line 1587
28638      __cil_tmp25 = *((__le32 **)__cil_tmp24);
28639#line 1587
28640      __cil_tmp26 = __cil_tmp25 + 8;
28641#line 1587
28642      __cil_tmp27 = (void *)__cil_tmp26;
28643#line 1587
28644      iowrite32(__cil_tmp22, __cil_tmp27);
28645      }
28646    } else {
28647
28648    }
28649  }
28650  }
28651  {
28652#line 1590
28653  __cil_tmp28 = (unsigned long )vmw_priv___0;
28654#line 1590
28655  __cil_tmp29 = __cil_tmp28 + 2156;
28656#line 1590
28657  __cil_tmp30 = *((uint32_t *)__cil_tmp29);
28658#line 1590
28659  __cil_tmp31 = __cil_tmp30 & 524288U;
28660#line 1590
28661  if (! __cil_tmp31) {
28662#line 1591
28663    return (0);
28664  } else {
28665
28666  }
28667  }
28668#line 1593
28669  i = (uint32_t )0;
28670  {
28671#line 1593
28672  while (1) {
28673    while_continue: /* CIL Label */ ;
28674    {
28675#line 1593
28676    __cil_tmp32 = (unsigned long )vmw_priv___0;
28677#line 1593
28678    __cil_tmp33 = __cil_tmp32 + 2596;
28679#line 1593
28680    __cil_tmp34 = *((uint32_t *)__cil_tmp33);
28681#line 1593
28682    if (i < __cil_tmp34) {
28683
28684    } else {
28685#line 1593
28686      goto while_break;
28687    }
28688    }
28689    {
28690#line 1594
28691    __cil_tmp35 = i * 20UL;
28692#line 1594
28693    __cil_tmp36 = 2256 + __cil_tmp35;
28694#line 1594
28695    __cil_tmp37 = (unsigned long )vmw_priv___0;
28696#line 1594
28697    __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
28698#line 1594
28699    save = (struct vmw_vga_topology_state *)__cil_tmp38;
28700#line 1595
28701    vmw_write(vmw_priv___0, 35U, i);
28702#line 1596
28703    __cil_tmp39 = (unsigned long )save;
28704#line 1596
28705    __cil_tmp40 = __cil_tmp39 + 8;
28706#line 1596
28707    __cil_tmp41 = *((uint32_t *)__cil_tmp40);
28708#line 1596
28709    vmw_write(vmw_priv___0, 36U, __cil_tmp41);
28710#line 1597
28711    __cil_tmp42 = (unsigned long )save;
28712#line 1597
28713    __cil_tmp43 = __cil_tmp42 + 12;
28714#line 1597
28715    __cil_tmp44 = *((uint32_t *)__cil_tmp43);
28716#line 1597
28717    vmw_write(vmw_priv___0, 37U, __cil_tmp44);
28718#line 1598
28719    __cil_tmp45 = (unsigned long )save;
28720#line 1598
28721    __cil_tmp46 = __cil_tmp45 + 16;
28722#line 1598
28723    __cil_tmp47 = *((uint32_t *)__cil_tmp46);
28724#line 1598
28725    vmw_write(vmw_priv___0, 38U, __cil_tmp47);
28726#line 1599
28727    __cil_tmp48 = *((uint32_t *)save);
28728#line 1599
28729    vmw_write(vmw_priv___0, 39U, __cil_tmp48);
28730#line 1600
28731    __cil_tmp49 = (unsigned long )save;
28732#line 1600
28733    __cil_tmp50 = __cil_tmp49 + 4;
28734#line 1600
28735    __cil_tmp51 = *((uint32_t *)__cil_tmp50);
28736#line 1600
28737    vmw_write(vmw_priv___0, 40U, __cil_tmp51);
28738#line 1601
28739    vmw_write(vmw_priv___0, 35U, 4294967295U);
28740#line 1593
28741    i = i + 1U;
28742    }
28743  }
28744  while_break: /* CIL Label */ ;
28745  }
28746#line 1604
28747  return (0);
28748}
28749}
28750#line 1607 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28751bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv , uint32_t pitch , uint32_t height ) 
28752{ unsigned long __cil_tmp4 ;
28753  unsigned long __cil_tmp5 ;
28754  uint32_t __cil_tmp6 ;
28755  u64 __cil_tmp7 ;
28756  u64 __cil_tmp8 ;
28757  u64 __cil_tmp9 ;
28758  u64 __cil_tmp10 ;
28759  int __cil_tmp11 ;
28760
28761  {
28762  {
28763#line 1611
28764  __cil_tmp4 = (unsigned long )dev_priv;
28765#line 1611
28766  __cil_tmp5 = __cil_tmp4 + 2112;
28767#line 1611
28768  __cil_tmp6 = *((uint32_t *)__cil_tmp5);
28769#line 1611
28770  __cil_tmp7 = (u64 )__cil_tmp6;
28771#line 1611
28772  __cil_tmp8 = (u64 )height;
28773#line 1611
28774  __cil_tmp9 = (u64 )pitch;
28775#line 1611
28776  __cil_tmp10 = __cil_tmp9 * __cil_tmp8;
28777#line 1611
28778  __cil_tmp11 = __cil_tmp10 < __cil_tmp7;
28779#line 1611
28780  return ((bool )__cil_tmp11);
28781  }
28782}
28783}
28784#line 1618 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28785u32 vmw_get_vblank_counter(struct drm_device *dev , int crtc ) 
28786{ 
28787
28788  {
28789#line 1620
28790  return ((u32 )0);
28791}
28792}
28793#line 1626 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28794int vmw_enable_vblank(struct drm_device *dev , int crtc ) 
28795{ 
28796
28797  {
28798#line 1628
28799  return (-38);
28800}
28801}
28802#line 1634 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28803void vmw_disable_vblank(struct drm_device *dev , int crtc ) 
28804{ 
28805
28806  {
28807#line 1636
28808  return;
28809}
28810}
28811#line 1643 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
28812int vmw_du_update_layout(struct vmw_private *dev_priv , unsigned int num , struct drm_vmw_rect *rects ) 
28813{ struct drm_device *dev ;
28814  struct vmw_display_unit *du ;
28815  struct drm_connector *con ;
28816  struct list_head    *__mptr ;
28817  struct list_head    *__mptr___0 ;
28818  struct drm_connector    *__mptr___1 ;
28819  unsigned long __cil_tmp10 ;
28820  unsigned long __cil_tmp11 ;
28821  unsigned long __cil_tmp12 ;
28822  unsigned long __cil_tmp13 ;
28823  struct mutex *__cil_tmp14 ;
28824  unsigned long __cil_tmp15 ;
28825  unsigned long __cil_tmp16 ;
28826  unsigned long __cil_tmp17 ;
28827  struct list_head *__cil_tmp18 ;
28828  struct drm_connector *__cil_tmp19 ;
28829  unsigned long __cil_tmp20 ;
28830  unsigned long __cil_tmp21 ;
28831  struct list_head *__cil_tmp22 ;
28832  unsigned int __cil_tmp23 ;
28833  char *__cil_tmp24 ;
28834  char *__cil_tmp25 ;
28835  unsigned long __cil_tmp26 ;
28836  unsigned long __cil_tmp27 ;
28837  unsigned long __cil_tmp28 ;
28838  struct list_head *__cil_tmp29 ;
28839  unsigned long __cil_tmp30 ;
28840  unsigned long __cil_tmp31 ;
28841  unsigned long __cil_tmp32 ;
28842  struct list_head *__cil_tmp33 ;
28843  unsigned long __cil_tmp34 ;
28844  struct vmw_display_unit *__cil_tmp35 ;
28845  unsigned long __cil_tmp36 ;
28846  unsigned long __cil_tmp37 ;
28847  struct drm_connector *__cil_tmp38 ;
28848  unsigned int __cil_tmp39 ;
28849  char *__cil_tmp40 ;
28850  char *__cil_tmp41 ;
28851  unsigned long __cil_tmp42 ;
28852  unsigned long __cil_tmp43 ;
28853  unsigned int __cil_tmp44 ;
28854  unsigned long __cil_tmp45 ;
28855  unsigned long __cil_tmp46 ;
28856  unsigned long __cil_tmp47 ;
28857  unsigned long __cil_tmp48 ;
28858  unsigned int __cil_tmp49 ;
28859  struct drm_vmw_rect *__cil_tmp50 ;
28860  unsigned long __cil_tmp51 ;
28861  unsigned long __cil_tmp52 ;
28862  unsigned long __cil_tmp53 ;
28863  unsigned long __cil_tmp54 ;
28864  unsigned long __cil_tmp55 ;
28865  unsigned long __cil_tmp56 ;
28866  unsigned int __cil_tmp57 ;
28867  struct drm_vmw_rect *__cil_tmp58 ;
28868  unsigned long __cil_tmp59 ;
28869  unsigned long __cil_tmp60 ;
28870  unsigned long __cil_tmp61 ;
28871  unsigned long __cil_tmp62 ;
28872  unsigned long __cil_tmp63 ;
28873  unsigned long __cil_tmp64 ;
28874  unsigned long __cil_tmp65 ;
28875  unsigned long __cil_tmp66 ;
28876  unsigned int __cil_tmp67 ;
28877  struct drm_vmw_rect *__cil_tmp68 ;
28878  unsigned long __cil_tmp69 ;
28879  unsigned long __cil_tmp70 ;
28880  unsigned long __cil_tmp71 ;
28881  unsigned long __cil_tmp72 ;
28882  unsigned int __cil_tmp73 ;
28883  struct drm_vmw_rect *__cil_tmp74 ;
28884  unsigned long __cil_tmp75 ;
28885  unsigned long __cil_tmp76 ;
28886  unsigned long __cil_tmp77 ;
28887  unsigned long __cil_tmp78 ;
28888  unsigned long __cil_tmp79 ;
28889  unsigned long __cil_tmp80 ;
28890  unsigned long __cil_tmp81 ;
28891  unsigned long __cil_tmp82 ;
28892  unsigned long __cil_tmp83 ;
28893  unsigned long __cil_tmp84 ;
28894  bool __cil_tmp85 ;
28895  unsigned long __cil_tmp86 ;
28896  unsigned long __cil_tmp87 ;
28897  struct list_head *__cil_tmp88 ;
28898  struct drm_connector *__cil_tmp89 ;
28899  unsigned long __cil_tmp90 ;
28900  unsigned long __cil_tmp91 ;
28901  struct list_head *__cil_tmp92 ;
28902  unsigned int __cil_tmp93 ;
28903  char *__cil_tmp94 ;
28904  char *__cil_tmp95 ;
28905  unsigned long __cil_tmp96 ;
28906  unsigned long __cil_tmp97 ;
28907  struct mutex *__cil_tmp98 ;
28908
28909  {
28910  {
28911#line 1646
28912  __cil_tmp10 = (unsigned long )dev_priv;
28913#line 1646
28914  __cil_tmp11 = __cil_tmp10 + 2088;
28915#line 1646
28916  dev = *((struct drm_device **)__cil_tmp11);
28917#line 1650
28918  __cil_tmp12 = (unsigned long )dev;
28919#line 1650
28920  __cil_tmp13 = __cil_tmp12 + 1152;
28921#line 1650
28922  __cil_tmp14 = (struct mutex *)__cil_tmp13;
28923#line 1650
28924  mutex_lock(__cil_tmp14);
28925#line 1664
28926  __cil_tmp15 = 1152 + 224;
28927#line 1664
28928  __cil_tmp16 = (unsigned long )dev;
28929#line 1664
28930  __cil_tmp17 = __cil_tmp16 + __cil_tmp15;
28931#line 1664
28932  __cil_tmp18 = *((struct list_head **)__cil_tmp17);
28933#line 1664
28934  __mptr = (struct list_head    *)__cil_tmp18;
28935#line 1664
28936  __cil_tmp19 = (struct drm_connector *)0;
28937#line 1664
28938  __cil_tmp20 = (unsigned long )__cil_tmp19;
28939#line 1664
28940  __cil_tmp21 = __cil_tmp20 + 784;
28941#line 1664
28942  __cil_tmp22 = (struct list_head *)__cil_tmp21;
28943#line 1664
28944  __cil_tmp23 = (unsigned int )__cil_tmp22;
28945#line 1664
28946  __cil_tmp24 = (char *)__mptr;
28947#line 1664
28948  __cil_tmp25 = __cil_tmp24 - __cil_tmp23;
28949#line 1664
28950  con = (struct drm_connector *)__cil_tmp25;
28951  }
28952  {
28953#line 1664
28954  while (1) {
28955    while_continue: /* CIL Label */ ;
28956    {
28957#line 1664
28958    __cil_tmp26 = 1152 + 224;
28959#line 1664
28960    __cil_tmp27 = (unsigned long )dev;
28961#line 1664
28962    __cil_tmp28 = __cil_tmp27 + __cil_tmp26;
28963#line 1664
28964    __cil_tmp29 = (struct list_head *)__cil_tmp28;
28965#line 1664
28966    __cil_tmp30 = (unsigned long )__cil_tmp29;
28967#line 1664
28968    __cil_tmp31 = (unsigned long )con;
28969#line 1664
28970    __cil_tmp32 = __cil_tmp31 + 784;
28971#line 1664
28972    __cil_tmp33 = (struct list_head *)__cil_tmp32;
28973#line 1664
28974    __cil_tmp34 = (unsigned long )__cil_tmp33;
28975#line 1664
28976    if (__cil_tmp34 != __cil_tmp30) {
28977
28978    } else {
28979#line 1664
28980      goto while_break;
28981    }
28982    }
28983#line 1665
28984    __mptr___1 = (struct drm_connector    *)con;
28985#line 1665
28986    __cil_tmp35 = (struct vmw_display_unit *)0;
28987#line 1665
28988    __cil_tmp36 = (unsigned long )__cil_tmp35;
28989#line 1665
28990    __cil_tmp37 = __cil_tmp36 + 616;
28991#line 1665
28992    __cil_tmp38 = (struct drm_connector *)__cil_tmp37;
28993#line 1665
28994    __cil_tmp39 = (unsigned int )__cil_tmp38;
28995#line 1665
28996    __cil_tmp40 = (char *)__mptr___1;
28997#line 1665
28998    __cil_tmp41 = __cil_tmp40 - __cil_tmp39;
28999#line 1665
29000    du = (struct vmw_display_unit *)__cil_tmp41;
29001    {
29002#line 1666
29003    __cil_tmp42 = (unsigned long )du;
29004#line 1666
29005    __cil_tmp43 = __cil_tmp42 + 2032;
29006#line 1666
29007    __cil_tmp44 = *((unsigned int *)__cil_tmp43);
29008#line 1666
29009    if (num > __cil_tmp44) {
29010#line 1667
29011      __cil_tmp45 = (unsigned long )du;
29012#line 1667
29013      __cil_tmp46 = __cil_tmp45 + 2036;
29014#line 1667
29015      __cil_tmp47 = (unsigned long )du;
29016#line 1667
29017      __cil_tmp48 = __cil_tmp47 + 2032;
29018#line 1667
29019      __cil_tmp49 = *((unsigned int *)__cil_tmp48);
29020#line 1667
29021      __cil_tmp50 = rects + __cil_tmp49;
29022#line 1667
29023      __cil_tmp51 = (unsigned long )__cil_tmp50;
29024#line 1667
29025      __cil_tmp52 = __cil_tmp51 + 8;
29026#line 1667
29027      *((unsigned int *)__cil_tmp46) = *((uint32_t *)__cil_tmp52);
29028#line 1668
29029      __cil_tmp53 = (unsigned long )du;
29030#line 1668
29031      __cil_tmp54 = __cil_tmp53 + 2040;
29032#line 1668
29033      __cil_tmp55 = (unsigned long )du;
29034#line 1668
29035      __cil_tmp56 = __cil_tmp55 + 2032;
29036#line 1668
29037      __cil_tmp57 = *((unsigned int *)__cil_tmp56);
29038#line 1668
29039      __cil_tmp58 = rects + __cil_tmp57;
29040#line 1668
29041      __cil_tmp59 = (unsigned long )__cil_tmp58;
29042#line 1668
29043      __cil_tmp60 = __cil_tmp59 + 12;
29044#line 1668
29045      *((unsigned int *)__cil_tmp54) = *((uint32_t *)__cil_tmp60);
29046#line 1669
29047      __cil_tmp61 = (unsigned long )du;
29048#line 1669
29049      __cil_tmp62 = __cil_tmp61 + 2044;
29050#line 1669
29051      *((bool *)__cil_tmp62) = (bool )1;
29052#line 1670
29053      __cil_tmp63 = (unsigned long )du;
29054#line 1670
29055      __cil_tmp64 = __cil_tmp63 + 2056;
29056#line 1670
29057      __cil_tmp65 = (unsigned long )du;
29058#line 1670
29059      __cil_tmp66 = __cil_tmp65 + 2032;
29060#line 1670
29061      __cil_tmp67 = *((unsigned int *)__cil_tmp66);
29062#line 1670
29063      __cil_tmp68 = rects + __cil_tmp67;
29064#line 1670
29065      *((int *)__cil_tmp64) = *((int32_t *)__cil_tmp68);
29066#line 1671
29067      __cil_tmp69 = (unsigned long )du;
29068#line 1671
29069      __cil_tmp70 = __cil_tmp69 + 2060;
29070#line 1671
29071      __cil_tmp71 = (unsigned long )du;
29072#line 1671
29073      __cil_tmp72 = __cil_tmp71 + 2032;
29074#line 1671
29075      __cil_tmp73 = *((unsigned int *)__cil_tmp72);
29076#line 1671
29077      __cil_tmp74 = rects + __cil_tmp73;
29078#line 1671
29079      __cil_tmp75 = (unsigned long )__cil_tmp74;
29080#line 1671
29081      __cil_tmp76 = __cil_tmp75 + 4;
29082#line 1671
29083      *((int *)__cil_tmp70) = *((int32_t *)__cil_tmp76);
29084    } else {
29085#line 1673
29086      __cil_tmp77 = (unsigned long )du;
29087#line 1673
29088      __cil_tmp78 = __cil_tmp77 + 2036;
29089#line 1673
29090      *((unsigned int *)__cil_tmp78) = 800U;
29091#line 1674
29092      __cil_tmp79 = (unsigned long )du;
29093#line 1674
29094      __cil_tmp80 = __cil_tmp79 + 2040;
29095#line 1674
29096      *((unsigned int *)__cil_tmp80) = 600U;
29097#line 1675
29098      __cil_tmp81 = (unsigned long )du;
29099#line 1675
29100      __cil_tmp82 = __cil_tmp81 + 2044;
29101#line 1675
29102      *((bool *)__cil_tmp82) = (bool )0;
29103    }
29104    }
29105    {
29106#line 1677
29107    __cil_tmp83 = (unsigned long )con;
29108#line 1677
29109    __cil_tmp84 = __cil_tmp83 + 840;
29110#line 1677
29111    __cil_tmp85 = (bool )1;
29112#line 1677
29113    *((enum drm_connector_status *)__cil_tmp84) = vmw_du_connector_detect(con, __cil_tmp85);
29114#line 1664
29115    __cil_tmp86 = (unsigned long )con;
29116#line 1664
29117    __cil_tmp87 = __cil_tmp86 + 784;
29118#line 1664
29119    __cil_tmp88 = *((struct list_head **)__cil_tmp87);
29120#line 1664
29121    __mptr___0 = (struct list_head    *)__cil_tmp88;
29122#line 1664
29123    __cil_tmp89 = (struct drm_connector *)0;
29124#line 1664
29125    __cil_tmp90 = (unsigned long )__cil_tmp89;
29126#line 1664
29127    __cil_tmp91 = __cil_tmp90 + 784;
29128#line 1664
29129    __cil_tmp92 = (struct list_head *)__cil_tmp91;
29130#line 1664
29131    __cil_tmp93 = (unsigned int )__cil_tmp92;
29132#line 1664
29133    __cil_tmp94 = (char *)__mptr___0;
29134#line 1664
29135    __cil_tmp95 = __cil_tmp94 - __cil_tmp93;
29136#line 1664
29137    con = (struct drm_connector *)__cil_tmp95;
29138    }
29139  }
29140  while_break: /* CIL Label */ ;
29141  }
29142  {
29143#line 1680
29144  __cil_tmp96 = (unsigned long )dev;
29145#line 1680
29146  __cil_tmp97 = __cil_tmp96 + 1152;
29147#line 1680
29148  __cil_tmp98 = (struct mutex *)__cil_tmp97;
29149#line 1680
29150  mutex_unlock(__cil_tmp98);
29151  }
29152#line 1682
29153  return (0);
29154}
29155}
29156#line 1685 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29157int vmw_du_page_flip(struct drm_crtc *crtc , struct drm_framebuffer *fb , struct drm_pending_vblank_event *event ) 
29158{ struct vmw_private *dev_priv ;
29159  struct vmw_private *tmp___7 ;
29160  struct drm_framebuffer *old_fb ;
29161  struct vmw_framebuffer *vfb ;
29162  struct drm_framebuffer    *__mptr ;
29163  struct drm_file *file_priv ;
29164  struct vmw_fence_obj *fence ;
29165  struct drm_clip_rect clips ;
29166  int ret ;
29167  bool tmp___8 ;
29168  struct drm_crtc    *__mptr___0 ;
29169  struct drm_device *__cil_tmp15 ;
29170  unsigned long __cil_tmp16 ;
29171  unsigned long __cil_tmp17 ;
29172  struct vmw_framebuffer *__cil_tmp18 ;
29173  struct drm_framebuffer *__cil_tmp19 ;
29174  unsigned int __cil_tmp20 ;
29175  char *__cil_tmp21 ;
29176  char *__cil_tmp22 ;
29177  unsigned long __cil_tmp23 ;
29178  unsigned long __cil_tmp24 ;
29179  unsigned long __cil_tmp25 ;
29180  struct vmw_fence_obj **__cil_tmp26 ;
29181  void *__cil_tmp27 ;
29182  unsigned long __cil_tmp28 ;
29183  unsigned long __cil_tmp29 ;
29184  struct vmw_screen_object_display *__cil_tmp30 ;
29185  unsigned long __cil_tmp31 ;
29186  unsigned long __cil_tmp32 ;
29187  unsigned long __cil_tmp33 ;
29188  struct drm_clip_rect *__cil_tmp34 ;
29189  unsigned long __cil_tmp35 ;
29190  unsigned long __cil_tmp36 ;
29191  unsigned long __cil_tmp37 ;
29192  unsigned long __cil_tmp38 ;
29193  unsigned int __cil_tmp39 ;
29194  unsigned long __cil_tmp40 ;
29195  unsigned long __cil_tmp41 ;
29196  unsigned long __cil_tmp42 ;
29197  unsigned int __cil_tmp43 ;
29198  unsigned long __cil_tmp44 ;
29199  unsigned long __cil_tmp45 ;
29200  struct vmw_fence_obj **__cil_tmp46 ;
29201  struct vmw_fence_obj *__cil_tmp47 ;
29202  struct vmw_fence_obj **__cil_tmp48 ;
29203  struct vmw_fence_obj *__cil_tmp49 ;
29204  struct drm_pending_event *__cil_tmp50 ;
29205  unsigned long __cil_tmp51 ;
29206  unsigned long __cil_tmp52 ;
29207  unsigned long __cil_tmp53 ;
29208  __u32 *__cil_tmp54 ;
29209  unsigned long __cil_tmp55 ;
29210  unsigned long __cil_tmp56 ;
29211  unsigned long __cil_tmp57 ;
29212  __u32 *__cil_tmp58 ;
29213  bool __cil_tmp59 ;
29214  struct vmw_display_unit *__cil_tmp60 ;
29215  struct drm_crtc *__cil_tmp61 ;
29216  unsigned int __cil_tmp62 ;
29217  char *__cil_tmp63 ;
29218  char *__cil_tmp64 ;
29219  struct vmw_display_unit *__cil_tmp65 ;
29220  unsigned long __cil_tmp66 ;
29221  unsigned long __cil_tmp67 ;
29222  unsigned long __cil_tmp68 ;
29223  unsigned long __cil_tmp69 ;
29224
29225  {
29226  {
29227#line 1689
29228  __cil_tmp15 = *((struct drm_device **)crtc);
29229#line 1689
29230  tmp___7 = vmw_priv(__cil_tmp15);
29231#line 1689
29232  dev_priv = tmp___7;
29233#line 1690
29234  __cil_tmp16 = (unsigned long )crtc;
29235#line 1690
29236  __cil_tmp17 = __cil_tmp16 + 32;
29237#line 1690
29238  old_fb = *((struct drm_framebuffer **)__cil_tmp17);
29239#line 1691
29240  __mptr = (struct drm_framebuffer    *)fb;
29241#line 1691
29242  __cil_tmp18 = (struct vmw_framebuffer *)0;
29243#line 1691
29244  __cil_tmp19 = (struct drm_framebuffer *)__cil_tmp18;
29245#line 1691
29246  __cil_tmp20 = (unsigned int )__cil_tmp19;
29247#line 1691
29248  __cil_tmp21 = (char *)__mptr;
29249#line 1691
29250  __cil_tmp22 = __cil_tmp21 - __cil_tmp20;
29251#line 1691
29252  vfb = (struct vmw_framebuffer *)__cil_tmp22;
29253#line 1692
29254  __cil_tmp23 = 0 + 24;
29255#line 1692
29256  __cil_tmp24 = (unsigned long )event;
29257#line 1692
29258  __cil_tmp25 = __cil_tmp24 + __cil_tmp23;
29259#line 1692
29260  file_priv = *((struct drm_file **)__cil_tmp25);
29261#line 1693
29262  __cil_tmp26 = & fence;
29263#line 1693
29264  __cil_tmp27 = (void *)0;
29265#line 1693
29266  *__cil_tmp26 = (struct vmw_fence_obj *)__cil_tmp27;
29267  }
29268  {
29269#line 1698
29270  __cil_tmp28 = (unsigned long )dev_priv;
29271#line 1698
29272  __cil_tmp29 = __cil_tmp28 + 2616;
29273#line 1698
29274  __cil_tmp30 = *((struct vmw_screen_object_display **)__cil_tmp29);
29275#line 1698
29276  if (! __cil_tmp30) {
29277#line 1699
29278    return (-38);
29279  } else {
29280
29281  }
29282  }
29283  {
29284#line 1701
29285  tmp___8 = vmw_kms_screen_object_flippable(dev_priv, crtc);
29286  }
29287#line 1701
29288  if (tmp___8) {
29289
29290  } else {
29291#line 1702
29292    return (-22);
29293  }
29294#line 1704
29295  __cil_tmp31 = (unsigned long )crtc;
29296#line 1704
29297  __cil_tmp32 = __cil_tmp31 + 32;
29298#line 1704
29299  *((struct drm_framebuffer **)__cil_tmp32) = fb;
29300#line 1707
29301  __cil_tmp33 = (unsigned long )(& clips) + 2;
29302#line 1707
29303  *((unsigned short *)__cil_tmp33) = (unsigned short)0;
29304#line 1707
29305  __cil_tmp34 = & clips;
29306#line 1707
29307  __cil_tmp35 = (unsigned long )(& clips) + 2;
29308#line 1707
29309  *((unsigned short *)__cil_tmp34) = *((unsigned short *)__cil_tmp35);
29310#line 1708
29311  __cil_tmp36 = (unsigned long )(& clips) + 4;
29312#line 1708
29313  __cil_tmp37 = (unsigned long )fb;
29314#line 1708
29315  __cil_tmp38 = __cil_tmp37 + 72;
29316#line 1708
29317  __cil_tmp39 = *((unsigned int *)__cil_tmp38);
29318#line 1708
29319  *((unsigned short *)__cil_tmp36) = (unsigned short )__cil_tmp39;
29320#line 1709
29321  __cil_tmp40 = (unsigned long )(& clips) + 6;
29322#line 1709
29323  __cil_tmp41 = (unsigned long )fb;
29324#line 1709
29325  __cil_tmp42 = __cil_tmp41 + 76;
29326#line 1709
29327  __cil_tmp43 = *((unsigned int *)__cil_tmp42);
29328#line 1709
29329  *((unsigned short *)__cil_tmp40) = (unsigned short )__cil_tmp43;
29330  {
29331#line 1711
29332  __cil_tmp44 = (unsigned long )vfb;
29333#line 1711
29334  __cil_tmp45 = __cil_tmp44 + 136;
29335#line 1711
29336  if (*((bool *)__cil_tmp45)) {
29337    {
29338#line 1712
29339    ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb, 0U, 0U, & clips, 1U, 1, & fence);
29340    }
29341  } else {
29342    {
29343#line 1715
29344    ret = do_surface_dirty_sou(dev_priv, file_priv, vfb, 0U, 0U, & clips, 1U, 1, & fence);
29345    }
29346  }
29347  }
29348#line 1719
29349  if (ret != 0) {
29350#line 1720
29351    goto out_no_fence;
29352  } else {
29353
29354  }
29355  {
29356#line 1721
29357  __cil_tmp46 = & fence;
29358#line 1721
29359  __cil_tmp47 = *__cil_tmp46;
29360#line 1721
29361  if (! __cil_tmp47) {
29362#line 1722
29363    ret = -22;
29364#line 1723
29365    goto out_no_fence;
29366  } else {
29367
29368  }
29369  }
29370  {
29371#line 1726
29372  __cil_tmp48 = & fence;
29373#line 1726
29374  __cil_tmp49 = *__cil_tmp48;
29375#line 1726
29376  __cil_tmp50 = (struct drm_pending_event *)event;
29377#line 1726
29378  __cil_tmp51 = 56 + 16;
29379#line 1726
29380  __cil_tmp52 = (unsigned long )event;
29381#line 1726
29382  __cil_tmp53 = __cil_tmp52 + __cil_tmp51;
29383#line 1726
29384  __cil_tmp54 = (__u32 *)__cil_tmp53;
29385#line 1726
29386  __cil_tmp55 = 56 + 20;
29387#line 1726
29388  __cil_tmp56 = (unsigned long )event;
29389#line 1726
29390  __cil_tmp57 = __cil_tmp56 + __cil_tmp55;
29391#line 1726
29392  __cil_tmp58 = (__u32 *)__cil_tmp57;
29393#line 1726
29394  __cil_tmp59 = (bool )1;
29395#line 1726
29396  ret = vmw_event_fence_action_queue(file_priv, __cil_tmp49, __cil_tmp50, __cil_tmp54,
29397                                     __cil_tmp58, __cil_tmp59);
29398#line 1736
29399  vmw_fence_obj_unreference(& fence);
29400#line 1738
29401  __mptr___0 = (struct drm_crtc    *)crtc;
29402  }
29403  {
29404#line 1738
29405  __cil_tmp60 = (struct vmw_display_unit *)0;
29406#line 1738
29407  __cil_tmp61 = (struct drm_crtc *)__cil_tmp60;
29408#line 1738
29409  __cil_tmp62 = (unsigned int )__cil_tmp61;
29410#line 1738
29411  __cil_tmp63 = (char *)__mptr___0;
29412#line 1738
29413  __cil_tmp64 = __cil_tmp63 - __cil_tmp62;
29414#line 1738
29415  __cil_tmp65 = (struct vmw_display_unit *)__cil_tmp64;
29416#line 1738
29417  __cil_tmp66 = (unsigned long )__cil_tmp65;
29418#line 1738
29419  __cil_tmp67 = __cil_tmp66 + 2064;
29420#line 1738
29421  if (*((bool *)__cil_tmp67)) {
29422    {
29423#line 1739
29424    vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
29425    }
29426  } else {
29427
29428  }
29429  }
29430#line 1741
29431  return (ret);
29432  out_no_fence: 
29433#line 1744
29434  __cil_tmp68 = (unsigned long )crtc;
29435#line 1744
29436  __cil_tmp69 = __cil_tmp68 + 32;
29437#line 1744
29438  *((struct drm_framebuffer **)__cil_tmp69) = old_fb;
29439#line 1745
29440  return (ret);
29441}
29442}
29443#line 1749 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29444void vmw_du_crtc_save(struct drm_crtc *crtc ) 
29445{ 
29446
29447  {
29448#line 1751
29449  return;
29450}
29451}
29452#line 1753 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29453void vmw_du_crtc_restore(struct drm_crtc *crtc ) 
29454{ 
29455
29456  {
29457#line 1755
29458  return;
29459}
29460}
29461#line 1757 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29462void vmw_du_crtc_gamma_set(struct drm_crtc *crtc , u16 *r , u16 *g , u16 *b , uint32_t start ,
29463                           uint32_t size ) 
29464{ struct vmw_private *dev_priv ;
29465  struct vmw_private *tmp___7 ;
29466  int i ;
29467  struct drm_device *__cil_tmp10 ;
29468  uint32_t __cil_tmp11 ;
29469  u16 *__cil_tmp12 ;
29470  u16 __cil_tmp13 ;
29471  int __cil_tmp14 ;
29472  u16 *__cil_tmp15 ;
29473  u16 __cil_tmp16 ;
29474  int __cil_tmp17 ;
29475  u16 *__cil_tmp18 ;
29476  u16 __cil_tmp19 ;
29477  int __cil_tmp20 ;
29478  int __cil_tmp21 ;
29479  int __cil_tmp22 ;
29480  unsigned int __cil_tmp23 ;
29481  u16 *__cil_tmp24 ;
29482  u16 __cil_tmp25 ;
29483  int __cil_tmp26 ;
29484  int __cil_tmp27 ;
29485  uint32_t __cil_tmp28 ;
29486  int __cil_tmp29 ;
29487  int __cil_tmp30 ;
29488  int __cil_tmp31 ;
29489  unsigned int __cil_tmp32 ;
29490  u16 *__cil_tmp33 ;
29491  u16 __cil_tmp34 ;
29492  int __cil_tmp35 ;
29493  int __cil_tmp36 ;
29494  uint32_t __cil_tmp37 ;
29495  int __cil_tmp38 ;
29496  int __cil_tmp39 ;
29497  int __cil_tmp40 ;
29498  unsigned int __cil_tmp41 ;
29499  u16 *__cil_tmp42 ;
29500  u16 __cil_tmp43 ;
29501  int __cil_tmp44 ;
29502  int __cil_tmp45 ;
29503  uint32_t __cil_tmp46 ;
29504
29505  {
29506  {
29507#line 1761
29508  __cil_tmp10 = *((struct drm_device **)crtc);
29509#line 1761
29510  tmp___7 = vmw_priv(__cil_tmp10);
29511#line 1761
29512  dev_priv = tmp___7;
29513#line 1764
29514  i = 0;
29515  }
29516  {
29517#line 1764
29518  while (1) {
29519    while_continue: /* CIL Label */ ;
29520    {
29521#line 1764
29522    __cil_tmp11 = (uint32_t )i;
29523#line 1764
29524    if (__cil_tmp11 < size) {
29525
29526    } else {
29527#line 1764
29528      goto while_break;
29529    }
29530    }
29531    {
29532#line 1765
29533    while (1) {
29534      while_continue___0: /* CIL Label */ ;
29535      {
29536#line 1765
29537      __cil_tmp12 = r + i;
29538#line 1765
29539      __cil_tmp13 = *__cil_tmp12;
29540#line 1765
29541      __cil_tmp14 = (int )__cil_tmp13;
29542#line 1765
29543      __cil_tmp15 = g + i;
29544#line 1765
29545      __cil_tmp16 = *__cil_tmp15;
29546#line 1765
29547      __cil_tmp17 = (int )__cil_tmp16;
29548#line 1765
29549      __cil_tmp18 = b + i;
29550#line 1765
29551      __cil_tmp19 = *__cil_tmp18;
29552#line 1765
29553      __cil_tmp20 = (int )__cil_tmp19;
29554#line 1765
29555      drm_ut_debug_printk(1U, "drm", "vmw_du_crtc_gamma_set", "%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n",
29556                          i, __cil_tmp14, __cil_tmp17, __cil_tmp20);
29557      }
29558#line 1765
29559      goto while_break___0;
29560    }
29561    while_break___0: /* CIL Label */ ;
29562    }
29563    {
29564#line 1767
29565    __cil_tmp21 = i * 3;
29566#line 1767
29567    __cil_tmp22 = 1024 + __cil_tmp21;
29568#line 1767
29569    __cil_tmp23 = (unsigned int )__cil_tmp22;
29570#line 1767
29571    __cil_tmp24 = r + i;
29572#line 1767
29573    __cil_tmp25 = *__cil_tmp24;
29574#line 1767
29575    __cil_tmp26 = (int )__cil_tmp25;
29576#line 1767
29577    __cil_tmp27 = __cil_tmp26 >> 8;
29578#line 1767
29579    __cil_tmp28 = (uint32_t )__cil_tmp27;
29580#line 1767
29581    vmw_write(dev_priv, __cil_tmp23, __cil_tmp28);
29582#line 1768
29583    __cil_tmp29 = i * 3;
29584#line 1768
29585    __cil_tmp30 = 1024 + __cil_tmp29;
29586#line 1768
29587    __cil_tmp31 = __cil_tmp30 + 1;
29588#line 1768
29589    __cil_tmp32 = (unsigned int )__cil_tmp31;
29590#line 1768
29591    __cil_tmp33 = g + i;
29592#line 1768
29593    __cil_tmp34 = *__cil_tmp33;
29594#line 1768
29595    __cil_tmp35 = (int )__cil_tmp34;
29596#line 1768
29597    __cil_tmp36 = __cil_tmp35 >> 8;
29598#line 1768
29599    __cil_tmp37 = (uint32_t )__cil_tmp36;
29600#line 1768
29601    vmw_write(dev_priv, __cil_tmp32, __cil_tmp37);
29602#line 1769
29603    __cil_tmp38 = i * 3;
29604#line 1769
29605    __cil_tmp39 = 1024 + __cil_tmp38;
29606#line 1769
29607    __cil_tmp40 = __cil_tmp39 + 2;
29608#line 1769
29609    __cil_tmp41 = (unsigned int )__cil_tmp40;
29610#line 1769
29611    __cil_tmp42 = b + i;
29612#line 1769
29613    __cil_tmp43 = *__cil_tmp42;
29614#line 1769
29615    __cil_tmp44 = (int )__cil_tmp43;
29616#line 1769
29617    __cil_tmp45 = __cil_tmp44 >> 8;
29618#line 1769
29619    __cil_tmp46 = (uint32_t )__cil_tmp45;
29620#line 1769
29621    vmw_write(dev_priv, __cil_tmp41, __cil_tmp46);
29622#line 1764
29623    i = i + 1;
29624    }
29625  }
29626  while_break: /* CIL Label */ ;
29627  }
29628#line 1771
29629  return;
29630}
29631}
29632#line 1773 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29633void vmw_du_connector_dpms(struct drm_connector *connector , int mode ) 
29634{ 
29635
29636  {
29637#line 1775
29638  return;
29639}
29640}
29641#line 1777 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29642void vmw_du_connector_save(struct drm_connector *connector ) 
29643{ 
29644
29645  {
29646#line 1779
29647  return;
29648}
29649}
29650#line 1781 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29651void vmw_du_connector_restore(struct drm_connector *connector ) 
29652{ 
29653
29654  {
29655#line 1783
29656  return;
29657}
29658}
29659#line 1785 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29660enum drm_connector_status vmw_du_connector_detect(struct drm_connector *connector ,
29661                                                  bool force ) 
29662{ uint32_t num_displays ;
29663  struct drm_device *dev ;
29664  struct vmw_private *dev_priv ;
29665  struct vmw_private *tmp___7 ;
29666  struct vmw_display_unit *du ;
29667  struct drm_connector    *__mptr ;
29668  int tmp___8 ;
29669  struct drm_connector    *__mptr___1 ;
29670  struct vmw_display_unit *__cil_tmp12 ;
29671  unsigned long __cil_tmp13 ;
29672  unsigned long __cil_tmp14 ;
29673  struct drm_connector *__cil_tmp15 ;
29674  unsigned int __cil_tmp16 ;
29675  char *__cil_tmp17 ;
29676  char *__cil_tmp18 ;
29677  unsigned long __cil_tmp19 ;
29678  unsigned long __cil_tmp20 ;
29679  struct mutex *__cil_tmp21 ;
29680  unsigned long __cil_tmp22 ;
29681  unsigned long __cil_tmp23 ;
29682  struct mutex *__cil_tmp24 ;
29683  struct vmw_display_unit *__cil_tmp25 ;
29684  unsigned long __cil_tmp26 ;
29685  unsigned long __cil_tmp27 ;
29686  struct drm_connector *__cil_tmp28 ;
29687  unsigned int __cil_tmp29 ;
29688  char *__cil_tmp30 ;
29689  char *__cil_tmp31 ;
29690  struct vmw_display_unit *__cil_tmp32 ;
29691  unsigned long __cil_tmp33 ;
29692  unsigned long __cil_tmp34 ;
29693  unsigned int __cil_tmp35 ;
29694  unsigned long __cil_tmp36 ;
29695  unsigned long __cil_tmp37 ;
29696
29697  {
29698  {
29699#line 1789
29700  dev = *((struct drm_device **)connector);
29701#line 1790
29702  tmp___7 = vmw_priv(dev);
29703#line 1790
29704  dev_priv = tmp___7;
29705#line 1791
29706  __mptr = (struct drm_connector    *)connector;
29707#line 1791
29708  __cil_tmp12 = (struct vmw_display_unit *)0;
29709#line 1791
29710  __cil_tmp13 = (unsigned long )__cil_tmp12;
29711#line 1791
29712  __cil_tmp14 = __cil_tmp13 + 616;
29713#line 1791
29714  __cil_tmp15 = (struct drm_connector *)__cil_tmp14;
29715#line 1791
29716  __cil_tmp16 = (unsigned int )__cil_tmp15;
29717#line 1791
29718  __cil_tmp17 = (char *)__mptr;
29719#line 1791
29720  __cil_tmp18 = __cil_tmp17 - __cil_tmp16;
29721#line 1791
29722  du = (struct vmw_display_unit *)__cil_tmp18;
29723#line 1793
29724  __cil_tmp19 = (unsigned long )dev_priv;
29725#line 1793
29726  __cil_tmp20 = __cil_tmp19 + 2184;
29727#line 1793
29728  __cil_tmp21 = (struct mutex *)__cil_tmp20;
29729#line 1793
29730  mutex_lock(__cil_tmp21);
29731#line 1794
29732  num_displays = vmw_read(dev_priv, 31U);
29733#line 1795
29734  __cil_tmp22 = (unsigned long )dev_priv;
29735#line 1795
29736  __cil_tmp23 = __cil_tmp22 + 2184;
29737#line 1795
29738  __cil_tmp24 = (struct mutex *)__cil_tmp23;
29739#line 1795
29740  mutex_unlock(__cil_tmp24);
29741#line 1797
29742  __mptr___1 = (struct drm_connector    *)connector;
29743  }
29744  {
29745#line 1797
29746  __cil_tmp25 = (struct vmw_display_unit *)0;
29747#line 1797
29748  __cil_tmp26 = (unsigned long )__cil_tmp25;
29749#line 1797
29750  __cil_tmp27 = __cil_tmp26 + 616;
29751#line 1797
29752  __cil_tmp28 = (struct drm_connector *)__cil_tmp27;
29753#line 1797
29754  __cil_tmp29 = (unsigned int )__cil_tmp28;
29755#line 1797
29756  __cil_tmp30 = (char *)__mptr___1;
29757#line 1797
29758  __cil_tmp31 = __cil_tmp30 - __cil_tmp29;
29759#line 1797
29760  __cil_tmp32 = (struct vmw_display_unit *)__cil_tmp31;
29761#line 1797
29762  __cil_tmp33 = (unsigned long )__cil_tmp32;
29763#line 1797
29764  __cil_tmp34 = __cil_tmp33 + 2032;
29765#line 1797
29766  __cil_tmp35 = *((unsigned int *)__cil_tmp34);
29767#line 1797
29768  if (__cil_tmp35 < num_displays) {
29769    {
29770#line 1797
29771    __cil_tmp36 = (unsigned long )du;
29772#line 1797
29773    __cil_tmp37 = __cil_tmp36 + 2044;
29774#line 1797
29775    if (*((bool *)__cil_tmp37)) {
29776#line 1797
29777      tmp___8 = 1;
29778    } else {
29779#line 1797
29780      tmp___8 = 2;
29781    }
29782    }
29783  } else {
29784#line 1797
29785    tmp___8 = 2;
29786  }
29787  }
29788#line 1797
29789  return ((enum drm_connector_status )tmp___8);
29790}
29791}
29792#line 1802 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29793static struct drm_display_mode vmw_kms_connector_builtin[19]  = 
29794#line 1802
29795  {      {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'6', (char )'4',
29796                                                                 (char )'0', (char )'x',
29797                                                                 (char )'4', (char )'8',
29798                                                                 (char )'0', (char )'\000'},
29799      (enum drm_mode_status )0, (unsigned int )(1 << 6), 25175, 640, 656, 752, 800,
29800      0, 480, 489, 492, 525, 0, (unsigned int )((1 << 1) | (1 << 3)), 0, 0, 0, 0,
29801      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29802        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'8', (char )'0',
29803                                                                 (char )'0', (char )'x',
29804                                                                 (char )'6', (char )'0',
29805                                                                 (char )'0', (char )'\000'},
29806      (enum drm_mode_status )0, (unsigned int )(1 << 6), 40000, 800, 840, 968, 1056,
29807      0, 600, 601, 605, 628, 0, (unsigned int )(1 | (1 << 2)), 0, 0, 0, 0, 0, 0, 0,
29808      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29809        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'0',
29810                                                                 (char )'2', (char )'4',
29811                                                                 (char )'x', (char )'7',
29812                                                                 (char )'6', (char )'8',
29813                                                                 (char )'\000'}, (enum drm_mode_status )0,
29814      (unsigned int )(1 << 6), 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806,
29815      0, (unsigned int )((1 << 1) | (1 << 3)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29816      0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29817        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'1',
29818                                                                 (char )'5', (char )'2',
29819                                                                 (char )'x', (char )'8',
29820                                                                 (char )'6', (char )'4',
29821                                                                 (char )'\000'}, (enum drm_mode_status )0,
29822      (unsigned int )(1 << 6), 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900,
29823      0, (unsigned int )(1 | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29824      0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29825        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'2',
29826                                                                 (char )'8', (char )'0',
29827                                                                 (char )'x', (char )'7',
29828                                                                 (char )'6', (char )'8',
29829                                                                 (char )'\000'}, (enum drm_mode_status )0,
29830      (unsigned int )(1 << 6), 79500, 1280, 1344, 1472, 1664, 0, 768, 771, 778, 798,
29831      0, (unsigned int )((1 << 1) | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29832      0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29833        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'2',
29834                                                                 (char )'8', (char )'0',
29835                                                                 (char )'x', (char )'8',
29836                                                                 (char )'0', (char )'0',
29837                                                                 (char )'\000'}, (enum drm_mode_status )0,
29838      (unsigned int )(1 << 6), 83500, 1280, 1352, 1480, 1680, 0, 800, 803, 809, 831,
29839      0, (unsigned int )(1 | (1 << 3)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29840      0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29841        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'2',
29842                                                                 (char )'8', (char )'0',
29843                                                                 (char )'x', (char )'9',
29844                                                                 (char )'6', (char )'0',
29845                                                                 (char )'\000'}, (enum drm_mode_status )0,
29846      (unsigned int )(1 << 6), 108000, 1280, 1376, 1488, 1800, 0, 960, 961, 964, 1000,
29847      0, (unsigned int )(1 | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29848      0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29849        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'2',
29850                                                                 (char )'8', (char )'0',
29851                                                                 (char )'x', (char )'1',
29852                                                                 (char )'0', (char )'2',
29853                                                                 (char )'4', (char )'\000'},
29854      (enum drm_mode_status )0, (unsigned int )(1 << 6), 108000, 1280, 1328, 1440,
29855      1688, 0, 1024, 1025, 1028, 1066, 0, (unsigned int )(1 | (1 << 2)), 0, 0, 0,
29856      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29857        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'3',
29858                                                                 (char )'6', (char )'0',
29859                                                                 (char )'x', (char )'7',
29860                                                                 (char )'6', (char )'8',
29861                                                                 (char )'\000'}, (enum drm_mode_status )0,
29862      (unsigned int )(1 << 6), 85500, 1360, 1424, 1536, 1792, 0, 768, 771, 777, 795,
29863      0, (unsigned int )(1 | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29864      0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29865        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'4',
29866                                                                 (char )'0', (char )'0',
29867                                                                 (char )'x', (char )'1',
29868                                                                 (char )'0', (char )'5',
29869                                                                 (char )'0', (char )'\000'},
29870      (enum drm_mode_status )0, (unsigned int )(1 << 6), 121750, 1400, 1488, 1632,
29871      1864, 0, 1050, 1053, 1057, 1089, 0, (unsigned int )((1 << 1) | (1 << 2)), 0,
29872      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29873        {{(struct list_head *)0,
29874       (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'4', (char )'4', (char )'0',
29875                                          (char )'x', (char )'9', (char )'0', (char )'0',
29876                                          (char )'\000'}, (enum drm_mode_status )0,
29877      (unsigned int )(1 << 6), 106500, 1440, 1520, 1672, 1904, 0, 900, 903, 909, 934,
29878      0, (unsigned int )((1 << 1) | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29879      0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29880        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'6',
29881                                                                 (char )'0', (char )'0',
29882                                                                 (char )'x', (char )'1',
29883                                                                 (char )'2', (char )'0',
29884                                                                 (char )'0', (char )'\000'},
29885      (enum drm_mode_status )0, (unsigned int )(1 << 6), 162000, 1600, 1664, 1856,
29886      2160, 0, 1200, 1201, 1204, 1250, 0, (unsigned int )(1 | (1 << 2)), 0, 0, 0,
29887      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29888        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'6',
29889                                                                 (char )'8', (char )'0',
29890                                                                 (char )'x', (char )'1',
29891                                                                 (char )'0', (char )'5',
29892                                                                 (char )'0', (char )'\000'},
29893      (enum drm_mode_status )0, (unsigned int )(1 << 6), 146250, 1680, 1784, 1960,
29894      2240, 0, 1050, 1053, 1059, 1089, 0, (unsigned int )((1 << 1) | (1 << 2)), 0,
29895      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29896        {{(struct list_head *)0,
29897       (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'7', (char )'9', (char )'2',
29898                                          (char )'x', (char )'1', (char )'3', (char )'4',
29899                                          (char )'4', (char )'\000'}, (enum drm_mode_status )0,
29900      (unsigned int )(1 << 6), 204750, 1792, 1920, 2120, 2448, 0, 1344, 1345, 1348,
29901      1394, 0, (unsigned int )((1 << 1) | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29902      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29903        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'8',
29904                                                                 (char )'5', (char )'6',
29905                                                                 (char )'x', (char )'1',
29906                                                                 (char )'3', (char )'9',
29907                                                                 (char )'2', (char )'\000'},
29908      (enum drm_mode_status )0, (unsigned int )(1 << 6), 218250, 1856, 1952, 2176,
29909      2528, 0, 1392, 1393, 1396, 1439, 0, (unsigned int )((1 << 1) | (1 << 2)), 0,
29910      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29911        {{(struct list_head *)0,
29912       (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'9', (char )'2', (char )'0',
29913                                          (char )'x', (char )'1', (char )'2', (char )'0',
29914                                          (char )'0', (char )'\000'}, (enum drm_mode_status )0,
29915      (unsigned int )(1 << 6), 193250, 1920, 2056, 2256, 2592, 0, 1200, 1203, 1209,
29916      1245, 0, (unsigned int )((1 << 1) | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29917      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29918        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'1', (char )'9',
29919                                                                 (char )'2', (char )'0',
29920                                                                 (char )'x', (char )'1',
29921                                                                 (char )'4', (char )'4',
29922                                                                 (char )'0', (char )'\000'},
29923      (enum drm_mode_status )0, (unsigned int )(1 << 6), 234000, 1920, 2048, 2256,
29924      2600, 0, 1440, 1441, 1444, 1500, 0, (unsigned int )((1 << 1) | (1 << 2)), 0,
29925      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29926        {{(struct list_head *)0,
29927       (struct list_head *)0}, {0U, 0U}, {(char )'2', (char )'5', (char )'6', (char )'0',
29928                                          (char )'x', (char )'1', (char )'6', (char )'0',
29929                                          (char )'0', (char )'\000'}, (enum drm_mode_status )0,
29930      (unsigned int )(1 << 6), 348500, 2560, 2752, 3032, 3504, 0, 1600, 1603, 1609,
29931      1658, 0, (unsigned int )((1 << 1) | (1 << 2)), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29932      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}, 
29933        {{(struct list_head *)0, (struct list_head *)0}, {0U, 0U}, {(char )'\000'}, (enum drm_mode_status )0,
29934      0U, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0U, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29935      0, 0, 0, 0, 0, 0, 0, 0, (int *)0, 0, 0, 0}};
29936#line 1886 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
29937static void vmw_guess_mode_timing(struct drm_display_mode *mode ) 
29938{ unsigned long __cil_tmp2 ;
29939  unsigned long __cil_tmp3 ;
29940  unsigned long __cil_tmp4 ;
29941  unsigned long __cil_tmp5 ;
29942  int __cil_tmp6 ;
29943  unsigned long __cil_tmp7 ;
29944  unsigned long __cil_tmp8 ;
29945  unsigned long __cil_tmp9 ;
29946  unsigned long __cil_tmp10 ;
29947  int __cil_tmp11 ;
29948  unsigned long __cil_tmp12 ;
29949  unsigned long __cil_tmp13 ;
29950  unsigned long __cil_tmp14 ;
29951  unsigned long __cil_tmp15 ;
29952  int __cil_tmp16 ;
29953  unsigned long __cil_tmp17 ;
29954  unsigned long __cil_tmp18 ;
29955  unsigned long __cil_tmp19 ;
29956  unsigned long __cil_tmp20 ;
29957  int __cil_tmp21 ;
29958  unsigned long __cil_tmp22 ;
29959  unsigned long __cil_tmp23 ;
29960  unsigned long __cil_tmp24 ;
29961  unsigned long __cil_tmp25 ;
29962  int __cil_tmp26 ;
29963  unsigned long __cil_tmp27 ;
29964  unsigned long __cil_tmp28 ;
29965  unsigned long __cil_tmp29 ;
29966  unsigned long __cil_tmp30 ;
29967  int __cil_tmp31 ;
29968  unsigned long __cil_tmp32 ;
29969  unsigned long __cil_tmp33 ;
29970  unsigned long __cil_tmp34 ;
29971  unsigned long __cil_tmp35 ;
29972  int __cil_tmp36 ;
29973  u32 __cil_tmp37 ;
29974  unsigned long __cil_tmp38 ;
29975  unsigned long __cil_tmp39 ;
29976  int __cil_tmp40 ;
29977  u32 __cil_tmp41 ;
29978  u32 __cil_tmp42 ;
29979  u32 __cil_tmp43 ;
29980  u32 __cil_tmp44 ;
29981  unsigned long __cil_tmp45 ;
29982  unsigned long __cil_tmp46 ;
29983  struct drm_display_mode    *__cil_tmp47 ;
29984
29985  {
29986  {
29987#line 1888
29988  __cil_tmp2 = (unsigned long )mode;
29989#line 1888
29990  __cil_tmp3 = __cil_tmp2 + 72;
29991#line 1888
29992  __cil_tmp4 = (unsigned long )mode;
29993#line 1888
29994  __cil_tmp5 = __cil_tmp4 + 68;
29995#line 1888
29996  __cil_tmp6 = *((int *)__cil_tmp5);
29997#line 1888
29998  *((int *)__cil_tmp3) = __cil_tmp6 + 50;
29999#line 1889
30000  __cil_tmp7 = (unsigned long )mode;
30001#line 1889
30002  __cil_tmp8 = __cil_tmp7 + 76;
30003#line 1889
30004  __cil_tmp9 = (unsigned long )mode;
30005#line 1889
30006  __cil_tmp10 = __cil_tmp9 + 72;
30007#line 1889
30008  __cil_tmp11 = *((int *)__cil_tmp10);
30009#line 1889
30010  *((int *)__cil_tmp8) = __cil_tmp11 + 50;
30011#line 1890
30012  __cil_tmp12 = (unsigned long )mode;
30013#line 1890
30014  __cil_tmp13 = __cil_tmp12 + 80;
30015#line 1890
30016  __cil_tmp14 = (unsigned long )mode;
30017#line 1890
30018  __cil_tmp15 = __cil_tmp14 + 76;
30019#line 1890
30020  __cil_tmp16 = *((int *)__cil_tmp15);
30021#line 1890
30022  *((int *)__cil_tmp13) = __cil_tmp16 + 50;
30023#line 1892
30024  __cil_tmp17 = (unsigned long )mode;
30025#line 1892
30026  __cil_tmp18 = __cil_tmp17 + 92;
30027#line 1892
30028  __cil_tmp19 = (unsigned long )mode;
30029#line 1892
30030  __cil_tmp20 = __cil_tmp19 + 88;
30031#line 1892
30032  __cil_tmp21 = *((int *)__cil_tmp20);
30033#line 1892
30034  *((int *)__cil_tmp18) = __cil_tmp21 + 50;
30035#line 1893
30036  __cil_tmp22 = (unsigned long )mode;
30037#line 1893
30038  __cil_tmp23 = __cil_tmp22 + 96;
30039#line 1893
30040  __cil_tmp24 = (unsigned long )mode;
30041#line 1893
30042  __cil_tmp25 = __cil_tmp24 + 92;
30043#line 1893
30044  __cil_tmp26 = *((int *)__cil_tmp25);
30045#line 1893
30046  *((int *)__cil_tmp23) = __cil_tmp26 + 50;
30047#line 1894
30048  __cil_tmp27 = (unsigned long )mode;
30049#line 1894
30050  __cil_tmp28 = __cil_tmp27 + 100;
30051#line 1894
30052  __cil_tmp29 = (unsigned long )mode;
30053#line 1894
30054  __cil_tmp30 = __cil_tmp29 + 96;
30055#line 1894
30056  __cil_tmp31 = *((int *)__cil_tmp30);
30057#line 1894
30058  *((int *)__cil_tmp28) = __cil_tmp31 + 50;
30059#line 1896
30060  __cil_tmp32 = (unsigned long )mode;
30061#line 1896
30062  __cil_tmp33 = __cil_tmp32 + 64;
30063#line 1896
30064  __cil_tmp34 = (unsigned long )mode;
30065#line 1896
30066  __cil_tmp35 = __cil_tmp34 + 100;
30067#line 1896
30068  __cil_tmp36 = *((int *)__cil_tmp35);
30069#line 1896
30070  __cil_tmp37 = (u32 )__cil_tmp36;
30071#line 1896
30072  __cil_tmp38 = (unsigned long )mode;
30073#line 1896
30074  __cil_tmp39 = __cil_tmp38 + 80;
30075#line 1896
30076  __cil_tmp40 = *((int *)__cil_tmp39);
30077#line 1896
30078  __cil_tmp41 = (u32 )__cil_tmp40;
30079#line 1896
30080  __cil_tmp42 = __cil_tmp41 * __cil_tmp37;
30081#line 1896
30082  __cil_tmp43 = __cil_tmp42 / 100U;
30083#line 1896
30084  __cil_tmp44 = __cil_tmp43 * 6U;
30085#line 1896
30086  *((int *)__cil_tmp33) = (int )__cil_tmp44;
30087#line 1897
30088  __cil_tmp45 = (unsigned long )mode;
30089#line 1897
30090  __cil_tmp46 = __cil_tmp45 + 204;
30091#line 1897
30092  __cil_tmp47 = (struct drm_display_mode    *)mode;
30093#line 1897
30094  *((int *)__cil_tmp46) = drm_mode_vrefresh(__cil_tmp47);
30095  }
30096#line 1898
30097  return;
30098}
30099}
30100#line 1901 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
30101int vmw_du_connector_fill_modes(struct drm_connector *connector , uint32_t max_width ,
30102                                uint32_t max_height ) 
30103{ struct vmw_display_unit *du ;
30104  struct drm_connector    *__mptr ;
30105  struct drm_device *dev ;
30106  struct vmw_private *dev_priv ;
30107  struct vmw_private *tmp___7 ;
30108  struct drm_display_mode *mode ;
30109  struct drm_display_mode *bmode ;
30110  struct drm_display_mode prefmode ;
30111  int i ;
30112  bool tmp___8 ;
30113  bool tmp___9 ;
30114  struct vmw_display_unit *__cil_tmp15 ;
30115  unsigned long __cil_tmp16 ;
30116  unsigned long __cil_tmp17 ;
30117  struct drm_connector *__cil_tmp18 ;
30118  unsigned int __cil_tmp19 ;
30119  char *__cil_tmp20 ;
30120  char *__cil_tmp21 ;
30121  void *__cil_tmp22 ;
30122  struct drm_display_mode *__cil_tmp23 ;
30123  unsigned long __cil_tmp24 ;
30124  unsigned long __cil_tmp25 ;
30125  unsigned long __cil_tmp26 ;
30126  unsigned long __cil_tmp27 ;
30127  unsigned long __cil_tmp28 ;
30128  unsigned long __cil_tmp29 ;
30129  unsigned long __cil_tmp30 ;
30130  unsigned long __cil_tmp31 ;
30131  unsigned long __cil_tmp32 ;
30132  unsigned long __cil_tmp33 ;
30133  unsigned long __cil_tmp34 ;
30134  unsigned long __cil_tmp35 ;
30135  unsigned long __cil_tmp36 ;
30136  unsigned long __cil_tmp37 ;
30137  unsigned long __cil_tmp38 ;
30138  unsigned long __cil_tmp39 ;
30139  unsigned long __cil_tmp40 ;
30140  unsigned long __cil_tmp41 ;
30141  unsigned long __cil_tmp42 ;
30142  unsigned long __cil_tmp43 ;
30143  unsigned long __cil_tmp44 ;
30144  unsigned long __cil_tmp45 ;
30145  unsigned long __cil_tmp46 ;
30146  unsigned long __cil_tmp47 ;
30147  unsigned long __cil_tmp48 ;
30148  unsigned long __cil_tmp49 ;
30149  unsigned long __cil_tmp50 ;
30150  unsigned long __cil_tmp51 ;
30151  unsigned long __cil_tmp52 ;
30152  unsigned long __cil_tmp53 ;
30153  unsigned long __cil_tmp54 ;
30154  unsigned long __cil_tmp55 ;
30155  unsigned long __cil_tmp56 ;
30156  unsigned long __cil_tmp57 ;
30157  unsigned long __cil_tmp58 ;
30158  unsigned long __cil_tmp59 ;
30159  unsigned long __cil_tmp60 ;
30160  int __cil_tmp61 ;
30161  int __cil_tmp62 ;
30162  int __cil_tmp63 ;
30163  unsigned long __cil_tmp64 ;
30164  unsigned long __cil_tmp65 ;
30165  unsigned long __cil_tmp66 ;
30166  unsigned long __cil_tmp67 ;
30167  unsigned long __cil_tmp68 ;
30168  unsigned long __cil_tmp69 ;
30169  unsigned long __cil_tmp70 ;
30170  unsigned long __cil_tmp71 ;
30171  unsigned long __cil_tmp72 ;
30172  unsigned long __cil_tmp73 ;
30173  unsigned long __cil_tmp74 ;
30174  unsigned long __cil_tmp75 ;
30175  int __cil_tmp76 ;
30176  int __cil_tmp77 ;
30177  int __cil_tmp78 ;
30178  unsigned long __cil_tmp79 ;
30179  unsigned long __cil_tmp80 ;
30180  unsigned long __cil_tmp81 ;
30181  unsigned long __cil_tmp82 ;
30182  unsigned long __cil_tmp83 ;
30183  unsigned long __cil_tmp84 ;
30184  unsigned long __cil_tmp85 ;
30185  unsigned long __cil_tmp86 ;
30186  unsigned long __cil_tmp87 ;
30187  unsigned long __cil_tmp88 ;
30188  unsigned long __cil_tmp89 ;
30189  unsigned long __cil_tmp90 ;
30190  unsigned long __cil_tmp91 ;
30191  unsigned long __cil_tmp92 ;
30192  unsigned long __cil_tmp93 ;
30193  unsigned long __cil_tmp94 ;
30194  unsigned long __cil_tmp95 ;
30195  unsigned long __cil_tmp96 ;
30196  unsigned long __cil_tmp97 ;
30197  unsigned long __cil_tmp98 ;
30198  unsigned long __cil_tmp99 ;
30199  unsigned long __cil_tmp100 ;
30200  unsigned long __cil_tmp101 ;
30201  unsigned long __cil_tmp102 ;
30202  struct drm_display_mode    *__cil_tmp103 ;
30203  unsigned long __cil_tmp104 ;
30204  unsigned long __cil_tmp105 ;
30205  unsigned long __cil_tmp106 ;
30206  unsigned long __cil_tmp107 ;
30207  unsigned int __cil_tmp108 ;
30208  unsigned long __cil_tmp109 ;
30209  unsigned long __cil_tmp110 ;
30210  unsigned long __cil_tmp111 ;
30211  unsigned long __cil_tmp112 ;
30212  unsigned int __cil_tmp113 ;
30213  unsigned long __cil_tmp114 ;
30214  unsigned long __cil_tmp115 ;
30215  int __cil_tmp116 ;
30216  int __cil_tmp117 ;
30217  uint32_t __cil_tmp118 ;
30218  unsigned long __cil_tmp119 ;
30219  unsigned long __cil_tmp120 ;
30220  int __cil_tmp121 ;
30221  uint32_t __cil_tmp122 ;
30222  void *__cil_tmp123 ;
30223  unsigned long __cil_tmp124 ;
30224  unsigned long __cil_tmp125 ;
30225  unsigned long __cil_tmp126 ;
30226  unsigned long __cil_tmp127 ;
30227  struct drm_display_mode *__cil_tmp128 ;
30228  struct list_head *__cil_tmp129 ;
30229  unsigned long __cil_tmp130 ;
30230  unsigned long __cil_tmp131 ;
30231  struct drm_display_mode *__cil_tmp132 ;
30232  unsigned long __cil_tmp133 ;
30233  unsigned long __cil_tmp134 ;
30234  unsigned long __cil_tmp135 ;
30235  unsigned long __cil_tmp136 ;
30236  unsigned long __cil_tmp137 ;
30237  unsigned int __cil_tmp138 ;
30238  unsigned long __cil_tmp139 ;
30239  unsigned long __cil_tmp140 ;
30240  unsigned long __cil_tmp141 ;
30241  unsigned long __cil_tmp142 ;
30242  int __cil_tmp143 ;
30243  uint32_t __cil_tmp144 ;
30244  unsigned long __cil_tmp145 ;
30245  unsigned long __cil_tmp146 ;
30246  int __cil_tmp147 ;
30247  uint32_t __cil_tmp148 ;
30248  unsigned long __cil_tmp149 ;
30249  unsigned long __cil_tmp150 ;
30250  int __cil_tmp151 ;
30251  int __cil_tmp152 ;
30252  uint32_t __cil_tmp153 ;
30253  unsigned long __cil_tmp154 ;
30254  unsigned long __cil_tmp155 ;
30255  int __cil_tmp156 ;
30256  uint32_t __cil_tmp157 ;
30257  struct drm_display_mode    *__cil_tmp158 ;
30258  unsigned long __cil_tmp159 ;
30259  unsigned long __cil_tmp160 ;
30260  struct drm_display_mode    *__cil_tmp161 ;
30261  unsigned long __cil_tmp162 ;
30262  unsigned long __cil_tmp163 ;
30263  unsigned long __cil_tmp164 ;
30264  unsigned long __cil_tmp165 ;
30265  struct drm_display_mode *__cil_tmp166 ;
30266  struct list_head *__cil_tmp167 ;
30267  unsigned long __cil_tmp168 ;
30268  unsigned long __cil_tmp169 ;
30269  struct list_head *__cil_tmp170 ;
30270
30271  {
30272  {
30273#line 1904
30274  __mptr = (struct drm_connector    *)connector;
30275#line 1904
30276  __cil_tmp15 = (struct vmw_display_unit *)0;
30277#line 1904
30278  __cil_tmp16 = (unsigned long )__cil_tmp15;
30279#line 1904
30280  __cil_tmp17 = __cil_tmp16 + 616;
30281#line 1904
30282  __cil_tmp18 = (struct drm_connector *)__cil_tmp17;
30283#line 1904
30284  __cil_tmp19 = (unsigned int )__cil_tmp18;
30285#line 1904
30286  __cil_tmp20 = (char *)__mptr;
30287#line 1904
30288  __cil_tmp21 = __cil_tmp20 - __cil_tmp19;
30289#line 1904
30290  du = (struct vmw_display_unit *)__cil_tmp21;
30291#line 1905
30292  dev = *((struct drm_device **)connector);
30293#line 1906
30294  tmp___7 = vmw_priv(dev);
30295#line 1906
30296  dev_priv = tmp___7;
30297#line 1907
30298  __cil_tmp22 = (void *)0;
30299#line 1907
30300  mode = (struct drm_display_mode *)__cil_tmp22;
30301#line 1909
30302  __cil_tmp23 = & prefmode;
30303#line 1909
30304  *((struct list_head **)__cil_tmp23) = (struct list_head *)0;
30305#line 1909
30306  __cil_tmp24 = 0 + 8;
30307#line 1909
30308  __cil_tmp25 = (unsigned long )(& prefmode) + __cil_tmp24;
30309#line 1909
30310  *((struct list_head **)__cil_tmp25) = (struct list_head *)0;
30311#line 1909
30312  __cil_tmp26 = (unsigned long )(& prefmode) + 16;
30313#line 1909
30314  *((uint32_t *)__cil_tmp26) = 0U;
30315#line 1909
30316  __cil_tmp27 = 16 + 4;
30317#line 1909
30318  __cil_tmp28 = (unsigned long )(& prefmode) + __cil_tmp27;
30319#line 1909
30320  *((uint32_t *)__cil_tmp28) = 0U;
30321#line 1909
30322  __cil_tmp29 = 0 * 1UL;
30323#line 1909
30324  __cil_tmp30 = 24 + __cil_tmp29;
30325#line 1909
30326  __cil_tmp31 = (unsigned long )(& prefmode) + __cil_tmp30;
30327#line 1909
30328  *((char *)__cil_tmp31) = (char )'p';
30329#line 1909
30330  __cil_tmp32 = 1 * 1UL;
30331#line 1909
30332  __cil_tmp33 = 24 + __cil_tmp32;
30333#line 1909
30334  __cil_tmp34 = (unsigned long )(& prefmode) + __cil_tmp33;
30335#line 1909
30336  *((char *)__cil_tmp34) = (char )'r';
30337#line 1909
30338  __cil_tmp35 = 2 * 1UL;
30339#line 1909
30340  __cil_tmp36 = 24 + __cil_tmp35;
30341#line 1909
30342  __cil_tmp37 = (unsigned long )(& prefmode) + __cil_tmp36;
30343#line 1909
30344  *((char *)__cil_tmp37) = (char )'e';
30345#line 1909
30346  __cil_tmp38 = 3 * 1UL;
30347#line 1909
30348  __cil_tmp39 = 24 + __cil_tmp38;
30349#line 1909
30350  __cil_tmp40 = (unsigned long )(& prefmode) + __cil_tmp39;
30351#line 1909
30352  *((char *)__cil_tmp40) = (char )'f';
30353#line 1909
30354  __cil_tmp41 = 4 * 1UL;
30355#line 1909
30356  __cil_tmp42 = 24 + __cil_tmp41;
30357#line 1909
30358  __cil_tmp43 = (unsigned long )(& prefmode) + __cil_tmp42;
30359#line 1909
30360  *((char *)__cil_tmp43) = (char )'e';
30361#line 1909
30362  __cil_tmp44 = 5 * 1UL;
30363#line 1909
30364  __cil_tmp45 = 24 + __cil_tmp44;
30365#line 1909
30366  __cil_tmp46 = (unsigned long )(& prefmode) + __cil_tmp45;
30367#line 1909
30368  *((char *)__cil_tmp46) = (char )'r';
30369#line 1909
30370  __cil_tmp47 = 6 * 1UL;
30371#line 1909
30372  __cil_tmp48 = 24 + __cil_tmp47;
30373#line 1909
30374  __cil_tmp49 = (unsigned long )(& prefmode) + __cil_tmp48;
30375#line 1909
30376  *((char *)__cil_tmp49) = (char )'r';
30377#line 1909
30378  __cil_tmp50 = 7 * 1UL;
30379#line 1909
30380  __cil_tmp51 = 24 + __cil_tmp50;
30381#line 1909
30382  __cil_tmp52 = (unsigned long )(& prefmode) + __cil_tmp51;
30383#line 1909
30384  *((char *)__cil_tmp52) = (char )'e';
30385#line 1909
30386  __cil_tmp53 = 8 * 1UL;
30387#line 1909
30388  __cil_tmp54 = 24 + __cil_tmp53;
30389#line 1909
30390  __cil_tmp55 = (unsigned long )(& prefmode) + __cil_tmp54;
30391#line 1909
30392  *((char *)__cil_tmp55) = (char )'d';
30393#line 1909
30394  __cil_tmp56 = 9 * 1UL;
30395#line 1909
30396  __cil_tmp57 = 24 + __cil_tmp56;
30397#line 1909
30398  __cil_tmp58 = (unsigned long )(& prefmode) + __cil_tmp57;
30399#line 1909
30400  *((char *)__cil_tmp58) = (char )'\000';
30401#line 1909
30402  __cil_tmp59 = (unsigned long )(& prefmode) + 56;
30403#line 1909
30404  *((enum drm_mode_status *)__cil_tmp59) = (enum drm_mode_status )0;
30405#line 1909
30406  __cil_tmp60 = (unsigned long )(& prefmode) + 60;
30407#line 1909
30408  __cil_tmp61 = 1 << 3;
30409#line 1909
30410  __cil_tmp62 = 1 << 6;
30411#line 1909
30412  __cil_tmp63 = __cil_tmp62 | __cil_tmp61;
30413#line 1909
30414  *((unsigned int *)__cil_tmp60) = (unsigned int )__cil_tmp63;
30415#line 1909
30416  __cil_tmp64 = (unsigned long )(& prefmode) + 64;
30417#line 1909
30418  *((int *)__cil_tmp64) = 0;
30419#line 1909
30420  __cil_tmp65 = (unsigned long )(& prefmode) + 68;
30421#line 1909
30422  *((int *)__cil_tmp65) = 0;
30423#line 1909
30424  __cil_tmp66 = (unsigned long )(& prefmode) + 72;
30425#line 1909
30426  *((int *)__cil_tmp66) = 0;
30427#line 1909
30428  __cil_tmp67 = (unsigned long )(& prefmode) + 76;
30429#line 1909
30430  *((int *)__cil_tmp67) = 0;
30431#line 1909
30432  __cil_tmp68 = (unsigned long )(& prefmode) + 80;
30433#line 1909
30434  *((int *)__cil_tmp68) = 0;
30435#line 1909
30436  __cil_tmp69 = (unsigned long )(& prefmode) + 84;
30437#line 1909
30438  *((int *)__cil_tmp69) = 0;
30439#line 1909
30440  __cil_tmp70 = (unsigned long )(& prefmode) + 88;
30441#line 1909
30442  *((int *)__cil_tmp70) = 0;
30443#line 1909
30444  __cil_tmp71 = (unsigned long )(& prefmode) + 92;
30445#line 1909
30446  *((int *)__cil_tmp71) = 0;
30447#line 1909
30448  __cil_tmp72 = (unsigned long )(& prefmode) + 96;
30449#line 1909
30450  *((int *)__cil_tmp72) = 0;
30451#line 1909
30452  __cil_tmp73 = (unsigned long )(& prefmode) + 100;
30453#line 1909
30454  *((int *)__cil_tmp73) = 0;
30455#line 1909
30456  __cil_tmp74 = (unsigned long )(& prefmode) + 104;
30457#line 1909
30458  *((int *)__cil_tmp74) = 0;
30459#line 1909
30460  __cil_tmp75 = (unsigned long )(& prefmode) + 108;
30461#line 1909
30462  __cil_tmp76 = 1 << 2;
30463#line 1909
30464  __cil_tmp77 = 1 << 1;
30465#line 1909
30466  __cil_tmp78 = __cil_tmp77 | __cil_tmp76;
30467#line 1909
30468  *((unsigned int *)__cil_tmp75) = (unsigned int )__cil_tmp78;
30469#line 1909
30470  __cil_tmp79 = (unsigned long )(& prefmode) + 112;
30471#line 1909
30472  *((int *)__cil_tmp79) = 0;
30473#line 1909
30474  __cil_tmp80 = (unsigned long )(& prefmode) + 116;
30475#line 1909
30476  *((int *)__cil_tmp80) = 0;
30477#line 1909
30478  __cil_tmp81 = (unsigned long )(& prefmode) + 120;
30479#line 1909
30480  *((int *)__cil_tmp81) = 0;
30481#line 1909
30482  __cil_tmp82 = (unsigned long )(& prefmode) + 124;
30483#line 1909
30484  *((int *)__cil_tmp82) = 0;
30485#line 1909
30486  __cil_tmp83 = (unsigned long )(& prefmode) + 128;
30487#line 1909
30488  *((int *)__cil_tmp83) = 0;
30489#line 1909
30490  __cil_tmp84 = (unsigned long )(& prefmode) + 132;
30491#line 1909
30492  *((int *)__cil_tmp84) = 0;
30493#line 1909
30494  __cil_tmp85 = (unsigned long )(& prefmode) + 136;
30495#line 1909
30496  *((int *)__cil_tmp85) = 0;
30497#line 1909
30498  __cil_tmp86 = (unsigned long )(& prefmode) + 140;
30499#line 1909
30500  *((int *)__cil_tmp86) = 0;
30501#line 1909
30502  __cil_tmp87 = (unsigned long )(& prefmode) + 144;
30503#line 1909
30504  *((int *)__cil_tmp87) = 0;
30505#line 1909
30506  __cil_tmp88 = (unsigned long )(& prefmode) + 148;
30507#line 1909
30508  *((int *)__cil_tmp88) = 0;
30509#line 1909
30510  __cil_tmp89 = (unsigned long )(& prefmode) + 152;
30511#line 1909
30512  *((int *)__cil_tmp89) = 0;
30513#line 1909
30514  __cil_tmp90 = (unsigned long )(& prefmode) + 156;
30515#line 1909
30516  *((int *)__cil_tmp90) = 0;
30517#line 1909
30518  __cil_tmp91 = (unsigned long )(& prefmode) + 160;
30519#line 1909
30520  *((int *)__cil_tmp91) = 0;
30521#line 1909
30522  __cil_tmp92 = (unsigned long )(& prefmode) + 164;
30523#line 1909
30524  *((int *)__cil_tmp92) = 0;
30525#line 1909
30526  __cil_tmp93 = (unsigned long )(& prefmode) + 168;
30527#line 1909
30528  *((int *)__cil_tmp93) = 0;
30529#line 1909
30530  __cil_tmp94 = (unsigned long )(& prefmode) + 172;
30531#line 1909
30532  *((int *)__cil_tmp94) = 0;
30533#line 1909
30534  __cil_tmp95 = (unsigned long )(& prefmode) + 176;
30535#line 1909
30536  *((int *)__cil_tmp95) = 0;
30537#line 1909
30538  __cil_tmp96 = (unsigned long )(& prefmode) + 180;
30539#line 1909
30540  *((int *)__cil_tmp96) = 0;
30541#line 1909
30542  __cil_tmp97 = (unsigned long )(& prefmode) + 184;
30543#line 1909
30544  *((int *)__cil_tmp97) = 0;
30545#line 1909
30546  __cil_tmp98 = (unsigned long )(& prefmode) + 188;
30547#line 1909
30548  *((int *)__cil_tmp98) = 0;
30549#line 1909
30550  __cil_tmp99 = (unsigned long )(& prefmode) + 192;
30551#line 1909
30552  *((int **)__cil_tmp99) = (int *)0;
30553#line 1909
30554  __cil_tmp100 = (unsigned long )(& prefmode) + 200;
30555#line 1909
30556  *((int *)__cil_tmp100) = 0;
30557#line 1909
30558  __cil_tmp101 = (unsigned long )(& prefmode) + 204;
30559#line 1909
30560  *((int *)__cil_tmp101) = 0;
30561#line 1909
30562  __cil_tmp102 = (unsigned long )(& prefmode) + 208;
30563#line 1909
30564  *((int *)__cil_tmp102) = 0;
30565#line 1918
30566  __cil_tmp103 = (struct drm_display_mode    *)(& prefmode);
30567#line 1918
30568  mode = drm_mode_duplicate(dev, __cil_tmp103);
30569  }
30570#line 1919
30571  if (! mode) {
30572#line 1920
30573    return (0);
30574  } else {
30575
30576  }
30577  {
30578#line 1921
30579  __cil_tmp104 = (unsigned long )mode;
30580#line 1921
30581  __cil_tmp105 = __cil_tmp104 + 68;
30582#line 1921
30583  __cil_tmp106 = (unsigned long )du;
30584#line 1921
30585  __cil_tmp107 = __cil_tmp106 + 2036;
30586#line 1921
30587  __cil_tmp108 = *((unsigned int *)__cil_tmp107);
30588#line 1921
30589  *((int *)__cil_tmp105) = (int )__cil_tmp108;
30590#line 1922
30591  __cil_tmp109 = (unsigned long )mode;
30592#line 1922
30593  __cil_tmp110 = __cil_tmp109 + 88;
30594#line 1922
30595  __cil_tmp111 = (unsigned long )du;
30596#line 1922
30597  __cil_tmp112 = __cil_tmp111 + 2040;
30598#line 1922
30599  __cil_tmp113 = *((unsigned int *)__cil_tmp112);
30600#line 1922
30601  *((int *)__cil_tmp110) = (int )__cil_tmp113;
30602#line 1923
30603  vmw_guess_mode_timing(mode);
30604#line 1925
30605  __cil_tmp114 = (unsigned long )mode;
30606#line 1925
30607  __cil_tmp115 = __cil_tmp114 + 68;
30608#line 1925
30609  __cil_tmp116 = *((int *)__cil_tmp115);
30610#line 1925
30611  __cil_tmp117 = __cil_tmp116 * 2;
30612#line 1925
30613  __cil_tmp118 = (uint32_t )__cil_tmp117;
30614#line 1925
30615  __cil_tmp119 = (unsigned long )mode;
30616#line 1925
30617  __cil_tmp120 = __cil_tmp119 + 88;
30618#line 1925
30619  __cil_tmp121 = *((int *)__cil_tmp120);
30620#line 1925
30621  __cil_tmp122 = (uint32_t )__cil_tmp121;
30622#line 1925
30623  tmp___8 = vmw_kms_validate_mode_vram(dev_priv, __cil_tmp118, __cil_tmp122);
30624  }
30625#line 1925
30626  if (tmp___8) {
30627    {
30628#line 1927
30629    drm_mode_probed_add(connector, mode);
30630    }
30631  } else {
30632    {
30633#line 1929
30634    drm_mode_destroy(dev, mode);
30635#line 1930
30636    __cil_tmp123 = (void *)0;
30637#line 1930
30638    mode = (struct drm_display_mode *)__cil_tmp123;
30639    }
30640  }
30641  {
30642#line 1933
30643  __cil_tmp124 = (unsigned long )du;
30644#line 1933
30645  __cil_tmp125 = __cil_tmp124 + 2048;
30646#line 1933
30647  if (*((struct drm_display_mode **)__cil_tmp125)) {
30648    {
30649#line 1934
30650    __cil_tmp126 = (unsigned long )du;
30651#line 1934
30652    __cil_tmp127 = __cil_tmp126 + 2048;
30653#line 1934
30654    __cil_tmp128 = *((struct drm_display_mode **)__cil_tmp127);
30655#line 1934
30656    __cil_tmp129 = (struct list_head *)__cil_tmp128;
30657#line 1934
30658    list_del_init(__cil_tmp129);
30659#line 1935
30660    __cil_tmp130 = (unsigned long )du;
30661#line 1935
30662    __cil_tmp131 = __cil_tmp130 + 2048;
30663#line 1935
30664    __cil_tmp132 = *((struct drm_display_mode **)__cil_tmp131);
30665#line 1935
30666    drm_mode_destroy(dev, __cil_tmp132);
30667    }
30668  } else {
30669
30670  }
30671  }
30672#line 1939
30673  __cil_tmp133 = (unsigned long )du;
30674#line 1939
30675  __cil_tmp134 = __cil_tmp133 + 2048;
30676#line 1939
30677  *((struct drm_display_mode **)__cil_tmp134) = mode;
30678#line 1942
30679  i = 0;
30680  {
30681#line 1942
30682  while (1) {
30683    while_continue: /* CIL Label */ ;
30684    {
30685#line 1942
30686    __cil_tmp135 = i * 216UL;
30687#line 1942
30688    __cil_tmp136 = __cil_tmp135 + 60;
30689#line 1942
30690    __cil_tmp137 = (unsigned long )(vmw_kms_connector_builtin) + __cil_tmp136;
30691#line 1942
30692    __cil_tmp138 = *((unsigned int *)__cil_tmp137);
30693#line 1942
30694    if (__cil_tmp138 != 0U) {
30695
30696    } else {
30697#line 1942
30698      goto while_break;
30699    }
30700    }
30701#line 1943
30702    __cil_tmp139 = i * 216UL;
30703#line 1943
30704    __cil_tmp140 = (unsigned long )(vmw_kms_connector_builtin) + __cil_tmp139;
30705#line 1943
30706    bmode = (struct drm_display_mode *)__cil_tmp140;
30707    {
30708#line 1944
30709    __cil_tmp141 = (unsigned long )bmode;
30710#line 1944
30711    __cil_tmp142 = __cil_tmp141 + 68;
30712#line 1944
30713    __cil_tmp143 = *((int *)__cil_tmp142);
30714#line 1944
30715    __cil_tmp144 = (uint32_t )__cil_tmp143;
30716#line 1944
30717    if (__cil_tmp144 > max_width) {
30718#line 1946
30719      goto __Cont;
30720    } else {
30721      {
30722#line 1944
30723      __cil_tmp145 = (unsigned long )bmode;
30724#line 1944
30725      __cil_tmp146 = __cil_tmp145 + 88;
30726#line 1944
30727      __cil_tmp147 = *((int *)__cil_tmp146);
30728#line 1944
30729      __cil_tmp148 = (uint32_t )__cil_tmp147;
30730#line 1944
30731      if (__cil_tmp148 > max_height) {
30732#line 1946
30733        goto __Cont;
30734      } else {
30735
30736      }
30737      }
30738    }
30739    }
30740    {
30741#line 1948
30742    __cil_tmp149 = (unsigned long )bmode;
30743#line 1948
30744    __cil_tmp150 = __cil_tmp149 + 68;
30745#line 1948
30746    __cil_tmp151 = *((int *)__cil_tmp150);
30747#line 1948
30748    __cil_tmp152 = __cil_tmp151 * 2;
30749#line 1948
30750    __cil_tmp153 = (uint32_t )__cil_tmp152;
30751#line 1948
30752    __cil_tmp154 = (unsigned long )bmode;
30753#line 1948
30754    __cil_tmp155 = __cil_tmp154 + 88;
30755#line 1948
30756    __cil_tmp156 = *((int *)__cil_tmp155);
30757#line 1948
30758    __cil_tmp157 = (uint32_t )__cil_tmp156;
30759#line 1948
30760    tmp___9 = vmw_kms_validate_mode_vram(dev_priv, __cil_tmp153, __cil_tmp157);
30761    }
30762#line 1948
30763    if (tmp___9) {
30764
30765    } else {
30766#line 1950
30767      goto __Cont;
30768    }
30769    {
30770#line 1952
30771    __cil_tmp158 = (struct drm_display_mode    *)bmode;
30772#line 1952
30773    mode = drm_mode_duplicate(dev, __cil_tmp158);
30774    }
30775#line 1953
30776    if (! mode) {
30777#line 1954
30778      return (0);
30779    } else {
30780
30781    }
30782    {
30783#line 1955
30784    __cil_tmp159 = (unsigned long )mode;
30785#line 1955
30786    __cil_tmp160 = __cil_tmp159 + 204;
30787#line 1955
30788    __cil_tmp161 = (struct drm_display_mode    *)mode;
30789#line 1955
30790    *((int *)__cil_tmp160) = drm_mode_vrefresh(__cil_tmp161);
30791#line 1957
30792    drm_mode_probed_add(connector, mode);
30793    }
30794    __Cont: /* CIL Label */ 
30795#line 1942
30796    i = i + 1;
30797  }
30798  while_break: /* CIL Label */ ;
30799  }
30800  {
30801#line 1961
30802  __cil_tmp162 = (unsigned long )du;
30803#line 1961
30804  __cil_tmp163 = __cil_tmp162 + 2048;
30805#line 1961
30806  if (*((struct drm_display_mode **)__cil_tmp163)) {
30807    {
30808#line 1962
30809    __cil_tmp164 = (unsigned long )du;
30810#line 1962
30811    __cil_tmp165 = __cil_tmp164 + 2048;
30812#line 1962
30813    __cil_tmp166 = *((struct drm_display_mode **)__cil_tmp165);
30814#line 1962
30815    __cil_tmp167 = (struct list_head *)__cil_tmp166;
30816#line 1962
30817    __cil_tmp168 = (unsigned long )connector;
30818#line 1962
30819    __cil_tmp169 = __cil_tmp168 + 848;
30820#line 1962
30821    __cil_tmp170 = (struct list_head *)__cil_tmp169;
30822#line 1962
30823    list_move(__cil_tmp167, __cil_tmp170);
30824    }
30825  } else {
30826
30827  }
30828  }
30829  {
30830#line 1964
30831  drm_mode_connector_list_update(connector);
30832  }
30833#line 1966
30834  return (1);
30835}
30836}
30837#line 1969 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
30838int vmw_du_connector_set_property(struct drm_connector *connector , struct drm_property *property ,
30839                                  uint64_t val ) 
30840{ 
30841
30842  {
30843#line 1973
30844  return (0);
30845}
30846}
30847#line 1977 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
30848int vmw_kms_update_layout_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
30849{ struct vmw_private *dev_priv ;
30850  struct vmw_private *tmp___7 ;
30851  struct drm_vmw_update_layout_arg *arg ;
30852  struct vmw_master *vmaster ;
30853  struct vmw_master *tmp___8 ;
30854  void *user_rects ;
30855  struct drm_vmw_rect *rects ;
30856  unsigned int rects_size ;
30857  int ret ;
30858  int i ;
30859  struct drm_mode_config *mode_config ;
30860  long tmp___9 ;
30861  struct drm_vmw_rect def_rect ;
30862  void *tmp___10 ;
30863  long tmp___11 ;
30864  unsigned long tmp___12 ;
30865  long tmp___13 ;
30866  unsigned long __cil_tmp21 ;
30867  unsigned long __cil_tmp22 ;
30868  struct drm_master *__cil_tmp23 ;
30869  unsigned long __cil_tmp24 ;
30870  unsigned long __cil_tmp25 ;
30871  struct ttm_lock *__cil_tmp26 ;
30872  bool __cil_tmp27 ;
30873  int __cil_tmp28 ;
30874  int __cil_tmp29 ;
30875  int __cil_tmp30 ;
30876  long __cil_tmp31 ;
30877  uint32_t __cil_tmp32 ;
30878  struct drm_vmw_rect *__cil_tmp33 ;
30879  unsigned long __cil_tmp34 ;
30880  unsigned long __cil_tmp35 ;
30881  unsigned long __cil_tmp36 ;
30882  uint32_t __cil_tmp37 ;
30883  unsigned long __cil_tmp38 ;
30884  unsigned long __cil_tmp39 ;
30885  uint32_t __cil_tmp40 ;
30886  size_t __cil_tmp41 ;
30887  int __cil_tmp42 ;
30888  int __cil_tmp43 ;
30889  int __cil_tmp44 ;
30890  long __cil_tmp45 ;
30891  unsigned long __cil_tmp46 ;
30892  unsigned long __cil_tmp47 ;
30893  uint64_t __cil_tmp48 ;
30894  unsigned long __cil_tmp49 ;
30895  void *__cil_tmp50 ;
30896  void    *__cil_tmp51 ;
30897  unsigned long __cil_tmp52 ;
30898  int __cil_tmp53 ;
30899  int __cil_tmp54 ;
30900  int __cil_tmp55 ;
30901  long __cil_tmp56 ;
30902  uint32_t __cil_tmp57 ;
30903  uint32_t __cil_tmp58 ;
30904  struct drm_vmw_rect *__cil_tmp59 ;
30905  int32_t __cil_tmp60 ;
30906  struct drm_vmw_rect *__cil_tmp61 ;
30907  unsigned long __cil_tmp62 ;
30908  unsigned long __cil_tmp63 ;
30909  int32_t __cil_tmp64 ;
30910  unsigned long __cil_tmp65 ;
30911  unsigned long __cil_tmp66 ;
30912  int __cil_tmp67 ;
30913  uint32_t __cil_tmp68 ;
30914  struct drm_vmw_rect *__cil_tmp69 ;
30915  unsigned long __cil_tmp70 ;
30916  unsigned long __cil_tmp71 ;
30917  uint32_t __cil_tmp72 ;
30918  struct drm_vmw_rect *__cil_tmp73 ;
30919  int32_t __cil_tmp74 ;
30920  uint32_t __cil_tmp75 ;
30921  uint32_t __cil_tmp76 ;
30922  unsigned long __cil_tmp77 ;
30923  unsigned long __cil_tmp78 ;
30924  int __cil_tmp79 ;
30925  uint32_t __cil_tmp80 ;
30926  struct drm_vmw_rect *__cil_tmp81 ;
30927  unsigned long __cil_tmp82 ;
30928  unsigned long __cil_tmp83 ;
30929  uint32_t __cil_tmp84 ;
30930  struct drm_vmw_rect *__cil_tmp85 ;
30931  unsigned long __cil_tmp86 ;
30932  unsigned long __cil_tmp87 ;
30933  int32_t __cil_tmp88 ;
30934  uint32_t __cil_tmp89 ;
30935  uint32_t __cil_tmp90 ;
30936  uint32_t __cil_tmp91 ;
30937  void    *__cil_tmp92 ;
30938  struct ttm_lock *__cil_tmp93 ;
30939
30940  {
30941  {
30942#line 1980
30943  tmp___7 = vmw_priv(dev);
30944#line 1980
30945  dev_priv = tmp___7;
30946#line 1981
30947  arg = (struct drm_vmw_update_layout_arg *)data;
30948#line 1983
30949  __cil_tmp21 = (unsigned long )file_priv;
30950#line 1983
30951  __cil_tmp22 = __cil_tmp21 + 152;
30952#line 1983
30953  __cil_tmp23 = *((struct drm_master **)__cil_tmp22);
30954#line 1983
30955  tmp___8 = vmw_master(__cil_tmp23);
30956#line 1983
30957  vmaster = tmp___8;
30958#line 1989
30959  __cil_tmp24 = (unsigned long )dev;
30960#line 1989
30961  __cil_tmp25 = __cil_tmp24 + 1152;
30962#line 1989
30963  mode_config = (struct drm_mode_config *)__cil_tmp25;
30964#line 1991
30965  __cil_tmp26 = (struct ttm_lock *)vmaster;
30966#line 1991
30967  __cil_tmp27 = (bool )1;
30968#line 1991
30969  ret = ttm_read_lock(__cil_tmp26, __cil_tmp27);
30970#line 1992
30971  __cil_tmp28 = ret != 0;
30972#line 1992
30973  __cil_tmp29 = ! __cil_tmp28;
30974#line 1992
30975  __cil_tmp30 = ! __cil_tmp29;
30976#line 1992
30977  __cil_tmp31 = (long )__cil_tmp30;
30978#line 1992
30979  tmp___9 = __builtin_expect(__cil_tmp31, 0L);
30980  }
30981#line 1992
30982  if (tmp___9) {
30983#line 1993
30984    return (ret);
30985  } else {
30986
30987  }
30988  {
30989#line 1995
30990  __cil_tmp32 = *((uint32_t *)arg);
30991#line 1995
30992  if (! __cil_tmp32) {
30993    {
30994#line 1996
30995    __cil_tmp33 = & def_rect;
30996#line 1996
30997    *((int32_t *)__cil_tmp33) = 0;
30998#line 1996
30999    __cil_tmp34 = (unsigned long )(& def_rect) + 4;
31000#line 1996
31001    *((int32_t *)__cil_tmp34) = 0;
31002#line 1996
31003    __cil_tmp35 = (unsigned long )(& def_rect) + 8;
31004#line 1996
31005    *((uint32_t *)__cil_tmp35) = (uint32_t )800;
31006#line 1996
31007    __cil_tmp36 = (unsigned long )(& def_rect) + 12;
31008#line 1996
31009    *((uint32_t *)__cil_tmp36) = (uint32_t )600;
31010#line 1997
31011    vmw_du_update_layout(dev_priv, 1U, & def_rect);
31012    }
31013#line 1998
31014    goto out_unlock;
31015  } else {
31016
31017  }
31018  }
31019  {
31020#line 2001
31021  __cil_tmp37 = *((uint32_t *)arg);
31022#line 2001
31023  __cil_tmp38 = (unsigned long )__cil_tmp37;
31024#line 2001
31025  __cil_tmp39 = __cil_tmp38 * 16UL;
31026#line 2001
31027  rects_size = (unsigned int )__cil_tmp39;
31028#line 2002
31029  __cil_tmp40 = *((uint32_t *)arg);
31030#line 2002
31031  __cil_tmp41 = (size_t )__cil_tmp40;
31032#line 2002
31033  tmp___10 = kcalloc(__cil_tmp41, 16UL, 208U);
31034#line 2002
31035  rects = (struct drm_vmw_rect *)tmp___10;
31036#line 2004
31037  __cil_tmp42 = ! rects;
31038#line 2004
31039  __cil_tmp43 = ! __cil_tmp42;
31040#line 2004
31041  __cil_tmp44 = ! __cil_tmp43;
31042#line 2004
31043  __cil_tmp45 = (long )__cil_tmp44;
31044#line 2004
31045  tmp___11 = __builtin_expect(__cil_tmp45, 0L);
31046  }
31047#line 2004
31048  if (tmp___11) {
31049#line 2005
31050    ret = -12;
31051#line 2006
31052    goto out_unlock;
31053  } else {
31054
31055  }
31056  {
31057#line 2009
31058  __cil_tmp46 = (unsigned long )arg;
31059#line 2009
31060  __cil_tmp47 = __cil_tmp46 + 8;
31061#line 2009
31062  __cil_tmp48 = *((uint64_t *)__cil_tmp47);
31063#line 2009
31064  __cil_tmp49 = (unsigned long )__cil_tmp48;
31065#line 2009
31066  user_rects = (void *)__cil_tmp49;
31067#line 2010
31068  __cil_tmp50 = (void *)rects;
31069#line 2010
31070  __cil_tmp51 = (void    *)user_rects;
31071#line 2010
31072  __cil_tmp52 = (unsigned long )rects_size;
31073#line 2010
31074  tmp___12 = (unsigned long )copy_from_user(__cil_tmp50, __cil_tmp51, __cil_tmp52);
31075#line 2010
31076  ret = (int )tmp___12;
31077#line 2011
31078  __cil_tmp53 = ret != 0;
31079#line 2011
31080  __cil_tmp54 = ! __cil_tmp53;
31081#line 2011
31082  __cil_tmp55 = ! __cil_tmp54;
31083#line 2011
31084  __cil_tmp56 = (long )__cil_tmp55;
31085#line 2011
31086  tmp___13 = __builtin_expect(__cil_tmp56, 0L);
31087  }
31088#line 2011
31089  if (tmp___13) {
31090    {
31091#line 2012
31092    drm_err("vmw_kms_update_layout_ioctl", "Failed to get rects.\n");
31093#line 2013
31094    ret = -14;
31095    }
31096#line 2014
31097    goto out_free;
31098  } else {
31099
31100  }
31101#line 2017
31102  i = 0;
31103  {
31104#line 2017
31105  while (1) {
31106    while_continue: /* CIL Label */ ;
31107    {
31108#line 2017
31109    __cil_tmp57 = *((uint32_t *)arg);
31110#line 2017
31111    __cil_tmp58 = (uint32_t )i;
31112#line 2017
31113    if (__cil_tmp58 < __cil_tmp57) {
31114
31115    } else {
31116#line 2017
31117      goto while_break;
31118    }
31119    }
31120    {
31121#line 2018
31122    __cil_tmp59 = rects + i;
31123#line 2018
31124    __cil_tmp60 = *((int32_t *)__cil_tmp59);
31125#line 2018
31126    if (__cil_tmp60 < 0) {
31127      {
31128#line 2022
31129      drm_err("vmw_kms_update_layout_ioctl", "Invalid GUI layout.\n");
31130#line 2023
31131      ret = -22;
31132      }
31133#line 2024
31134      goto out_free;
31135    } else {
31136      {
31137#line 2018
31138      __cil_tmp61 = rects + i;
31139#line 2018
31140      __cil_tmp62 = (unsigned long )__cil_tmp61;
31141#line 2018
31142      __cil_tmp63 = __cil_tmp62 + 4;
31143#line 2018
31144      __cil_tmp64 = *((int32_t *)__cil_tmp63);
31145#line 2018
31146      if (__cil_tmp64 < 0) {
31147        {
31148#line 2022
31149        drm_err("vmw_kms_update_layout_ioctl", "Invalid GUI layout.\n");
31150#line 2023
31151        ret = -22;
31152        }
31153#line 2024
31154        goto out_free;
31155      } else {
31156        {
31157#line 2018
31158        __cil_tmp65 = (unsigned long )mode_config;
31159#line 2018
31160        __cil_tmp66 = __cil_tmp65 + 336;
31161#line 2018
31162        __cil_tmp67 = *((int *)__cil_tmp66);
31163#line 2018
31164        __cil_tmp68 = (uint32_t )__cil_tmp67;
31165#line 2018
31166        __cil_tmp69 = rects + i;
31167#line 2018
31168        __cil_tmp70 = (unsigned long )__cil_tmp69;
31169#line 2018
31170        __cil_tmp71 = __cil_tmp70 + 8;
31171#line 2018
31172        __cil_tmp72 = *((uint32_t *)__cil_tmp71);
31173#line 2018
31174        __cil_tmp73 = rects + i;
31175#line 2018
31176        __cil_tmp74 = *((int32_t *)__cil_tmp73);
31177#line 2018
31178        __cil_tmp75 = (uint32_t )__cil_tmp74;
31179#line 2018
31180        __cil_tmp76 = __cil_tmp75 + __cil_tmp72;
31181#line 2018
31182        if (__cil_tmp76 > __cil_tmp68) {
31183          {
31184#line 2022
31185          drm_err("vmw_kms_update_layout_ioctl", "Invalid GUI layout.\n");
31186#line 2023
31187          ret = -22;
31188          }
31189#line 2024
31190          goto out_free;
31191        } else {
31192          {
31193#line 2018
31194          __cil_tmp77 = (unsigned long )mode_config;
31195#line 2018
31196          __cil_tmp78 = __cil_tmp77 + 340;
31197#line 2018
31198          __cil_tmp79 = *((int *)__cil_tmp78);
31199#line 2018
31200          __cil_tmp80 = (uint32_t )__cil_tmp79;
31201#line 2018
31202          __cil_tmp81 = rects + i;
31203#line 2018
31204          __cil_tmp82 = (unsigned long )__cil_tmp81;
31205#line 2018
31206          __cil_tmp83 = __cil_tmp82 + 12;
31207#line 2018
31208          __cil_tmp84 = *((uint32_t *)__cil_tmp83);
31209#line 2018
31210          __cil_tmp85 = rects + i;
31211#line 2018
31212          __cil_tmp86 = (unsigned long )__cil_tmp85;
31213#line 2018
31214          __cil_tmp87 = __cil_tmp86 + 4;
31215#line 2018
31216          __cil_tmp88 = *((int32_t *)__cil_tmp87);
31217#line 2018
31218          __cil_tmp89 = (uint32_t )__cil_tmp88;
31219#line 2018
31220          __cil_tmp90 = __cil_tmp89 + __cil_tmp84;
31221#line 2018
31222          if (__cil_tmp90 > __cil_tmp80) {
31223            {
31224#line 2022
31225            drm_err("vmw_kms_update_layout_ioctl", "Invalid GUI layout.\n");
31226#line 2023
31227            ret = -22;
31228            }
31229#line 2024
31230            goto out_free;
31231          } else {
31232
31233          }
31234          }
31235        }
31236        }
31237      }
31238      }
31239    }
31240    }
31241#line 2017
31242    i = i + 1;
31243  }
31244  while_break: /* CIL Label */ ;
31245  }
31246  {
31247#line 2028
31248  __cil_tmp91 = *((uint32_t *)arg);
31249#line 2028
31250  vmw_du_update_layout(dev_priv, __cil_tmp91, rects);
31251  }
31252  out_free: 
31253  {
31254#line 2031
31255  __cil_tmp92 = (void    *)rects;
31256#line 2031
31257  kfree(__cil_tmp92);
31258  }
31259  out_unlock: 
31260  {
31261#line 2033
31262  __cil_tmp93 = (struct ttm_lock *)vmaster;
31263#line 2033
31264  ttm_read_unlock(__cil_tmp93);
31265  }
31266#line 2034
31267  return (ret);
31268}
31269}
31270#line 2059
31271extern void ldv_initialize(void) ;
31272#line 2062
31273extern int __VERIFIER_nondet_int(void) ;
31274#line 2065 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
31275int LDV_IN_INTERRUPT  ;
31276#line 2068 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c"
31277void ldv_main2_sequence_infinite_withcheck_stateful(void) 
31278{ struct drm_framebuffer *var_group1 ;
31279  struct drm_file *var_group2 ;
31280  unsigned int var_vmw_framebuffer_surface_dirty_12_p2 ;
31281  unsigned int var_vmw_framebuffer_surface_dirty_12_p3 ;
31282  struct drm_clip_rect *var_vmw_framebuffer_surface_dirty_12_p4 ;
31283  unsigned int var_vmw_framebuffer_surface_dirty_12_p5 ;
31284  unsigned int *var_vmw_framebuffer_create_handle_9_p2 ;
31285  unsigned int var_vmw_framebuffer_dmabuf_dirty_18_p2 ;
31286  unsigned int var_vmw_framebuffer_dmabuf_dirty_18_p3 ;
31287  struct drm_clip_rect *var_vmw_framebuffer_dmabuf_dirty_18_p4 ;
31288  unsigned int var_vmw_framebuffer_dmabuf_dirty_18_p5 ;
31289  struct drm_device *var_group3 ;
31290  struct drm_mode_fb_cmd2 *var_vmw_kms_fb_create_22_p2 ;
31291  int tmp___7 ;
31292  int tmp___8 ;
31293
31294  {
31295  {
31296#line 2196
31297  LDV_IN_INTERRUPT = 1;
31298#line 2205
31299  ldv_initialize();
31300  }
31301  {
31302#line 2213
31303  while (1) {
31304    while_continue: /* CIL Label */ ;
31305    {
31306#line 2213
31307    tmp___8 = __VERIFIER_nondet_int();
31308    }
31309#line 2213
31310    if (tmp___8) {
31311
31312    } else {
31313#line 2213
31314      goto while_break;
31315    }
31316    {
31317#line 2216
31318    tmp___7 = __VERIFIER_nondet_int();
31319    }
31320#line 2218
31321    if (tmp___7 == 0) {
31322#line 2218
31323      goto case_0;
31324    } else
31325#line 2244
31326    if (tmp___7 == 1) {
31327#line 2244
31328      goto case_1;
31329    } else
31330#line 2270
31331    if (tmp___7 == 2) {
31332#line 2270
31333      goto case_2;
31334    } else
31335#line 2296
31336    if (tmp___7 == 3) {
31337#line 2296
31338      goto case_3;
31339    } else
31340#line 2322
31341    if (tmp___7 == 4) {
31342#line 2322
31343      goto case_4;
31344    } else
31345#line 2348
31346    if (tmp___7 == 5) {
31347#line 2348
31348      goto case_5;
31349    } else
31350#line 2374
31351    if (tmp___7 == 6) {
31352#line 2374
31353      goto case_6;
31354    } else {
31355      {
31356#line 2400
31357      goto switch_default;
31358#line 2216
31359      if (0) {
31360        case_0: /* CIL Label */ 
31361        {
31362#line 2230
31363        vmw_framebuffer_surface_destroy(var_group1);
31364        }
31365#line 2243
31366        goto switch_break;
31367        case_1: /* CIL Label */ 
31368        {
31369#line 2256
31370        vmw_framebuffer_surface_dirty(var_group1, var_group2, var_vmw_framebuffer_surface_dirty_12_p2,
31371                                      var_vmw_framebuffer_surface_dirty_12_p3, var_vmw_framebuffer_surface_dirty_12_p4,
31372                                      var_vmw_framebuffer_surface_dirty_12_p5);
31373        }
31374#line 2269
31375        goto switch_break;
31376        case_2: /* CIL Label */ 
31377        {
31378#line 2280
31379        vmw_framebuffer_create_handle(var_group1, var_group2, var_vmw_framebuffer_create_handle_9_p2);
31380        }
31381#line 2295
31382        goto switch_break;
31383        case_3: /* CIL Label */ 
31384        {
31385#line 2310
31386        vmw_framebuffer_dmabuf_destroy(var_group1);
31387        }
31388#line 2321
31389        goto switch_break;
31390        case_4: /* CIL Label */ 
31391        {
31392#line 2336
31393        vmw_framebuffer_dmabuf_dirty(var_group1, var_group2, var_vmw_framebuffer_dmabuf_dirty_18_p2,
31394                                     var_vmw_framebuffer_dmabuf_dirty_18_p3, var_vmw_framebuffer_dmabuf_dirty_18_p4,
31395                                     var_vmw_framebuffer_dmabuf_dirty_18_p5);
31396        }
31397#line 2347
31398        goto switch_break;
31399        case_5: /* CIL Label */ 
31400        {
31401#line 2358
31402        vmw_framebuffer_create_handle(var_group1, var_group2, var_vmw_framebuffer_create_handle_9_p2);
31403        }
31404#line 2373
31405        goto switch_break;
31406        case_6: /* CIL Label */ 
31407        {
31408#line 2388
31409        vmw_kms_fb_create(var_group3, var_group2, var_vmw_kms_fb_create_22_p2);
31410        }
31411#line 2399
31412        goto switch_break;
31413        switch_default: /* CIL Label */ 
31414#line 2400
31415        goto switch_break;
31416      } else {
31417        switch_break: /* CIL Label */ ;
31418      }
31419      }
31420    }
31421  }
31422  while_break: /* CIL Label */ ;
31423  }
31424  {
31425#line 2409
31426  ldv_check_final_state();
31427  }
31428#line 2412
31429  return;
31430}
31431}
31432#line 35 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
31433__inline static void atomic_set(atomic_t *v , int i )  __attribute__((__no_instrument_function__)) ;
31434#line 35 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
31435__inline static void atomic_set(atomic_t *v , int i ) 
31436{ 
31437
31438  {
31439#line 37
31440  *((int *)v) = i;
31441#line 38
31442  return;
31443}
31444}
31445#line 18 "include/linux/rwlock.h"
31446extern void __rwlock_init(rwlock_t *lock , char    *name , struct lock_class_key *key ) ;
31447#line 22 "include/linux/spinlock_api_smp.h"
31448extern void _raw_spin_lock(raw_spinlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
31449#line 39
31450extern void _raw_spin_unlock(raw_spinlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
31451#line 283 "include/linux/spinlock.h"
31452__inline static void spin_lock(spinlock_t *lock )  __attribute__((__no_instrument_function__)) ;
31453#line 283 "include/linux/spinlock.h"
31454__inline static void spin_lock(spinlock_t *lock ) 
31455{ struct raw_spinlock *__cil_tmp2 ;
31456
31457  {
31458  {
31459#line 285
31460  __cil_tmp2 = (struct raw_spinlock *)lock;
31461#line 285
31462  _raw_spin_lock(__cil_tmp2);
31463  }
31464#line 286
31465  return;
31466}
31467}
31468#line 323
31469__inline static void spin_unlock(spinlock_t *lock )  __attribute__((__no_instrument_function__)) ;
31470#line 323 "include/linux/spinlock.h"
31471__inline static void spin_unlock(spinlock_t *lock ) 
31472{ struct raw_spinlock *__cil_tmp2 ;
31473
31474  {
31475  {
31476#line 325
31477  __cil_tmp2 = (struct raw_spinlock *)lock;
31478#line 325
31479  _raw_spin_unlock(__cil_tmp2);
31480  }
31481#line 326
31482  return;
31483}
31484}
31485#line 79 "include/linux/wait.h"
31486extern void __init_waitqueue_head(wait_queue_head_t *q , char    *name , struct lock_class_key * ) ;
31487#line 115 "include/linux/mutex.h"
31488extern void __mutex_init(struct mutex *lock , char    *name , struct lock_class_key *key ) ;
31489#line 187 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
31490extern void iounmap(void volatile   *addr ) ;
31491#line 317
31492extern void *ioremap_wc(resource_size_t offset , unsigned long size ) ;
31493#line 356 "include/linux/moduleparam.h"
31494extern struct kernel_param_ops param_ops_int ;
31495#line 26 "include/linux/export.h"
31496extern struct module __this_module ;
31497#line 67 "include/linux/module.h"
31498int init_module(void) ;
31499#line 68
31500void cleanup_module(void) ;
31501#line 2401 "include/linux/fs.h"
31502extern loff_t noop_llseek(struct file *file , loff_t offset , int origin ) ;
31503#line 792 "include/linux/device.h"
31504extern void *dev_get_drvdata(struct device    *dev ) ;
31505#line 773 "include/linux/pci.h"
31506extern int __attribute__((__warn_unused_result__))  pci_enable_device(struct pci_dev *dev ) ;
31507#line 790
31508extern void pci_disable_device(struct pci_dev *dev ) ;
31509#line 793
31510extern void pci_set_master(struct pci_dev *dev ) ;
31511#line 832
31512extern int pci_save_state(struct pci_dev *dev ) ;
31513#line 833
31514extern void pci_restore_state(struct pci_dev *dev ) ;
31515#line 839
31516extern int pci_set_power_state(struct pci_dev *dev , pci_power_t state ) ;
31517#line 904
31518extern int __attribute__((__warn_unused_result__))  pci_request_regions(struct pci_dev * ,
31519                                                                        char    * ) ;
31520#line 906
31521extern void pci_release_regions(struct pci_dev * ) ;
31522#line 907
31523extern int __attribute__((__warn_unused_result__))  pci_request_region(struct pci_dev * ,
31524                                                                       int  , char    * ) ;
31525#line 909
31526extern void pci_release_region(struct pci_dev * , int  ) ;
31527#line 1358
31528__inline static void *pci_get_drvdata(struct pci_dev *pdev )  __attribute__((__no_instrument_function__)) ;
31529#line 1358 "include/linux/pci.h"
31530__inline static void *pci_get_drvdata(struct pci_dev *pdev ) 
31531{ void *tmp ;
31532  unsigned long __cil_tmp3 ;
31533  unsigned long __cil_tmp4 ;
31534  struct device *__cil_tmp5 ;
31535  struct device    *__cil_tmp6 ;
31536
31537  {
31538  {
31539#line 1360
31540  __cil_tmp3 = (unsigned long )pdev;
31541#line 1360
31542  __cil_tmp4 = __cil_tmp3 + 144;
31543#line 1360
31544  __cil_tmp5 = (struct device *)__cil_tmp4;
31545#line 1360
31546  __cil_tmp6 = (struct device    *)__cil_tmp5;
31547#line 1360
31548  tmp = dev_get_drvdata(__cil_tmp6);
31549  }
31550#line 1360
31551  return (tmp);
31552}
31553}
31554#line 123 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/mtrr.h"
31555extern int mtrr_add(unsigned long base , unsigned long size , unsigned int type ,
31556                    bool increment ) ;
31557#line 127
31558extern int mtrr_del(int reg , unsigned long base , unsigned long size ) ;
31559#line 114 "include/linux/idr.h"
31560extern void idr_destroy(struct idr *idp ) ;
31561#line 115
31562extern void idr_init(struct idr *idp ) ;
31563#line 1246 "include/drm/drmP.h"
31564__inline static int drm_mtrr_add(unsigned long offset , unsigned long size , unsigned int flags )  __attribute__((__no_instrument_function__)) ;
31565#line 1246 "include/drm/drmP.h"
31566__inline static int drm_mtrr_add(unsigned long offset , unsigned long size , unsigned int flags ) 
31567{ int tmp___7 ;
31568  bool __cil_tmp5 ;
31569
31570  {
31571  {
31572#line 1249
31573  __cil_tmp5 = (bool )1;
31574#line 1249
31575  tmp___7 = mtrr_add(offset, size, flags, __cil_tmp5);
31576  }
31577#line 1249
31578  return (tmp___7);
31579}
31580}
31581#line 1252
31582__inline static int drm_mtrr_del(int handle , unsigned long offset , unsigned long size ,
31583                                 unsigned int flags )  __attribute__((__no_instrument_function__)) ;
31584#line 1252 "include/drm/drmP.h"
31585__inline static int drm_mtrr_del(int handle , unsigned long offset , unsigned long size ,
31586                                 unsigned int flags ) 
31587{ int tmp___7 ;
31588
31589  {
31590  {
31591#line 1255
31592  tmp___7 = mtrr_del(handle, offset, size);
31593  }
31594#line 1255
31595  return (tmp___7);
31596}
31597}
31598#line 1294
31599extern long drm_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
31600#line 1296
31601extern long drm_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
31602#line 1302
31603extern int drm_open(struct inode *inode , struct file *filp ) ;
31604#line 1304
31605extern int drm_fasync(int fd , struct file *filp , int on ) ;
31606#line 1307
31607extern int drm_release(struct inode *inode , struct file *filp ) ;
31608#line 1432
31609extern int drm_irq_install(struct drm_device *dev ) ;
31610#line 1433
31611extern int drm_irq_uninstall(struct drm_device *dev ) ;
31612#line 1507
31613extern void drm_put_dev(struct drm_device *dev ) ;
31614#line 1755
31615extern int drm_pci_init(struct drm_driver *driver , struct pci_driver *pdriver ) ;
31616#line 1756
31617extern void drm_pci_exit(struct drm_driver *driver , struct pci_driver *pdriver ) ;
31618#line 1757
31619extern int drm_get_pci_dev(struct pci_dev *pdev , struct pci_device_id    *ent ,
31620                           struct drm_driver *driver ) ;
31621#line 346 "include/linux/suspend.h"
31622extern int register_pm_notifier(struct notifier_block *nb ) ;
31623#line 347
31624extern int unregister_pm_notifier(struct notifier_block *nb ) ;
31625#line 331 "include/drm/ttm/ttm_bo_api.h"
31626extern int ttm_bo_wait(struct ttm_buffer_object *bo , bool lazy , bool interruptible ,
31627                       bool no_wait ) ;
31628#line 536
31629extern int ttm_bo_create(struct ttm_bo_device *bdev , unsigned long size , enum ttm_bo_type type ,
31630                         struct ttm_placement *placement , uint32_t page_alignment ,
31631                         unsigned long buffer_start , bool interruptible , struct file *persistent_swap_storage ,
31632                         struct ttm_buffer_object **p_bo ) ;
31633#line 576
31634extern int ttm_bo_init_mm(struct ttm_bo_device *bdev , unsigned int type , unsigned long p_size ) ;
31635#line 605
31636extern int ttm_bo_clean_mm(struct ttm_bo_device *bdev , unsigned int mem_type ) ;
31637#line 626
31638extern int ttm_bo_evict_mm(struct ttm_bo_device *bdev , unsigned int mem_type ) ;
31639#line 730
31640extern void ttm_bo_swapout_all(struct ttm_bo_device *bdev ) ;
31641#line 750 "include/drm/ttm/ttm_bo_driver.h"
31642extern int ttm_bo_device_release(struct ttm_bo_device *bdev ) ;
31643#line 766
31644extern int ttm_bo_device_init(struct ttm_bo_device *bdev , struct ttm_bo_global *glob ,
31645                              struct ttm_bo_driver *driver , uint64_t file_page_offset ,
31646                              bool need_dma32 ) ;
31647#line 229 "include/drm/ttm/ttm_object.h"
31648extern struct ttm_object_file *ttm_object_file_init(struct ttm_object_device *tdev ,
31649                                                    unsigned int hash_order ) ;
31650#line 244
31651extern void ttm_object_file_release(struct ttm_object_file **p_tfile ) ;
31652#line 255
31653extern struct ttm_object_device *ttm_object_device_init(struct ttm_mem_global *mem_glob ,
31654                                                        unsigned int hash_order ) ;
31655#line 269
31656extern void ttm_object_device_release(struct ttm_object_device **p_tdev ) ;
31657#line 87 "include/drm/ttm/ttm_lock.h"
31658extern void ttm_lock_init(struct ttm_lock *lock ) ;
31659#line 164
31660extern void ttm_suspend_lock(struct ttm_lock *lock ) ;
31661#line 173
31662extern void ttm_suspend_unlock(struct ttm_lock *lock ) ;
31663#line 187
31664extern int ttm_vt_lock(struct ttm_lock *lock , bool interruptible , struct ttm_object_file *tfile ) ;
31665#line 199
31666extern int ttm_vt_unlock(struct ttm_lock *lock ) ;
31667#line 239
31668__inline static void ttm_lock_set_kill(struct ttm_lock *lock , bool val , int signal )  __attribute__((__no_instrument_function__)) ;
31669#line 239 "include/drm/ttm/ttm_lock.h"
31670__inline static void ttm_lock_set_kill(struct ttm_lock *lock , bool val , int signal ) 
31671{ unsigned long __cil_tmp4 ;
31672  unsigned long __cil_tmp5 ;
31673  unsigned long __cil_tmp6 ;
31674  unsigned long __cil_tmp7 ;
31675
31676  {
31677#line 242
31678  __cil_tmp4 = (unsigned long )lock;
31679#line 242
31680  __cil_tmp5 = __cil_tmp4 + 136;
31681#line 242
31682  *((bool *)__cil_tmp5) = val;
31683#line 243
31684  if (val) {
31685#line 244
31686    __cil_tmp6 = (unsigned long )lock;
31687#line 244
31688    __cil_tmp7 = __cil_tmp6 + 140;
31689#line 244
31690    *((int *)__cil_tmp7) = signal;
31691  } else {
31692
31693  }
31694#line 245
31695  return;
31696}
31697}
31698#line 65 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
31699struct vmw_fence_manager *vmw_fence_manager_init(struct vmw_private *dev_priv ) ;
31700#line 68
31701void vmw_fence_manager_takedown(struct vmw_fence_manager *fman ) ;
31702#line 98
31703void vmw_fence_fifo_up(struct vmw_fence_manager *fman ) ;
31704#line 100
31705void vmw_fence_fifo_down(struct vmw_fence_manager *fman ) ;
31706#line 102
31707int vmw_fence_obj_wait_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31708#line 105
31709int vmw_fence_obj_signaled_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31710#line 108
31711int vmw_fence_obj_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31712#line 110
31713int vmw_fence_event_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31714#line 112
31715void vmw_event_fence_fpriv_gone(struct vmw_fence_manager *fman , struct list_head *event_list ) ;
31716#line 368 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
31717int vmw_3d_resource_inc(struct vmw_private *dev_priv , bool unhide_svga ) ;
31718#line 369
31719void vmw_3d_resource_dec(struct vmw_private *dev_priv , bool hide_svga ) ;
31720#line 388
31721int vmw_context_destroy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31722#line 390
31723int vmw_context_define_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31724#line 409
31725int vmw_surface_destroy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31726#line 411
31727int vmw_surface_define_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31728#line 413
31729int vmw_surface_reference_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31730#line 426
31731int vmw_dmabuf_alloc_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31732#line 428
31733int vmw_dmabuf_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31734#line 435
31735int vmw_stream_claim_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31736#line 437
31737int vmw_stream_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31738#line 472
31739int vmw_getparam_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31740#line 474
31741int vmw_get_cap_3d_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31742#line 476
31743int vmw_present_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31744#line 478
31745int vmw_present_readback_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31746#line 480
31747unsigned int vmw_fops_poll(struct file *filp , struct poll_table_struct *wait ) ;
31748#line 482
31749ssize_t vmw_fops_read(struct file *filp , char *buffer , size_t count , loff_t *offset ) ;
31750#line 489
31751int vmw_fifo_init(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo ) ;
31752#line 491
31753void vmw_fifo_release(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo ) ;
31754#line 498
31755bool vmw_fifo_have_3d(struct vmw_private *dev_priv ) ;
31756#line 507
31757int vmw_ttm_global_init(struct vmw_private *dev_priv ) ;
31758#line 508
31759void vmw_ttm_global_release(struct vmw_private *dev_priv ) ;
31760#line 509
31761int vmw_mmap(struct file *filp , struct vm_area_struct *vma ) ;
31762#line 517
31763struct ttm_placement vmw_vram_sys_placement ;
31764#line 523
31765struct ttm_bo_driver vmw_bo_driver ;
31766#line 562
31767irqreturn_t vmw_irq_handler(int irq , void *arg ) ;
31768#line 566
31769void vmw_irq_preinstall(struct drm_device *dev ) ;
31770#line 567
31771int vmw_irq_postinstall(struct drm_device *dev ) ;
31772#line 568
31773void vmw_irq_uninstall(struct drm_device *dev ) ;
31774#line 602
31775int vmw_fb_init(struct vmw_private *vmw_priv___0 ) ;
31776#line 603
31777int vmw_fb_close(struct vmw_private *vmw_priv___0 ) ;
31778#line 605
31779int vmw_fb_on(struct vmw_private *vmw_priv___0 ) ;
31780#line 652
31781int vmw_overlay_init(struct vmw_private *dev_priv ) ;
31782#line 653
31783int vmw_overlay_close(struct vmw_private *dev_priv ) ;
31784#line 654
31785int vmw_overlay_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
31786#line 128 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31787static struct drm_ioctl_desc vmw_ioctls[21]  = 
31788#line 128 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31789  {      {0U, 17, & vmw_getparam_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 64U) | (sizeof(struct drm_vmw_getparam_arg ) << 16))}, 
31790        {1U,
31791      17, & vmw_dmabuf_alloc_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 65U) | (sizeof(union drm_vmw_alloc_dmabuf_arg ) << 16))}, 
31792        {2U,
31793      17, & vmw_dmabuf_unref_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 66U) | (sizeof(struct drm_vmw_unref_dmabuf_arg ) << 16))}, 
31794        {3U,
31795      26, & vmw_kms_cursor_bypass_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 67U) | (sizeof(struct drm_vmw_cursor_bypass_arg ) << 16))}, 
31796        {4U,
31797      26, & vmw_overlay_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 68U) | (sizeof(struct drm_vmw_control_stream_arg ) << 16))}, 
31798        {5U,
31799      26, & vmw_stream_claim_ioctl, (unsigned int )((unsigned long )(((2U << 30) | (unsigned int )(100 << 8)) | 69U) | (sizeof(struct drm_vmw_stream_arg ) << 16))}, 
31800        {6U,
31801      26, & vmw_stream_unref_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 70U) | (sizeof(struct drm_vmw_stream_arg ) << 16))}, 
31802        {7U,
31803      17, & vmw_context_define_ioctl, (unsigned int )((unsigned long )(((2U << 30) | (unsigned int )(100 << 8)) | 71U) | (sizeof(struct drm_vmw_context_arg ) << 16))}, 
31804        {8U,
31805      17, & vmw_context_destroy_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 72U) | (sizeof(struct drm_vmw_context_arg ) << 16))}, 
31806        {9U,
31807      17, & vmw_surface_define_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 73U) | (sizeof(union drm_vmw_surface_create_arg ) << 16))}, 
31808        {10U,
31809      17, & vmw_surface_destroy_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 74U) | (sizeof(struct drm_vmw_surface_arg ) << 16))}, 
31810        {11U,
31811      17, & vmw_surface_reference_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 75U) | (sizeof(union drm_vmw_surface_reference_arg ) << 16))}, 
31812        {12U,
31813      17, & vmw_execbuf_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 76U) | (sizeof(struct drm_vmw_execbuf_arg ) << 16))}, 
31814        {13U,
31815      17, & vmw_get_cap_3d_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 77U) | (sizeof(struct drm_vmw_get_3d_cap_arg ) << 16))}, 
31816        {14U,
31817      17, & vmw_fence_obj_wait_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 78U) | (sizeof(struct drm_vmw_fence_wait_arg ) << 16))}, 
31818        {15U,
31819      17, & vmw_fence_obj_signaled_ioctl, (unsigned int )((unsigned long )(((3U << 30) | (unsigned int )(100 << 8)) | 79U) | (sizeof(struct drm_vmw_fence_signaled_arg ) << 16))}, 
31820        {16U,
31821      17, & vmw_fence_obj_unref_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 80U) | (sizeof(struct drm_vmw_fence_arg ) << 16))}, 
31822        {17U,
31823      17, & vmw_fence_event_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 81U) | (sizeof(struct drm_vmw_fence_event_arg ) << 16))}, 
31824        {18U,
31825      19, & vmw_present_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 82U) | (sizeof(struct drm_vmw_present_arg ) << 16))}, 
31826        {19U,
31827      19, & vmw_present_readback_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 83U) | (sizeof(struct drm_vmw_present_readback_arg ) << 16))}, 
31828        {20U,
31829      18, & vmw_kms_update_layout_ioctl, (unsigned int )((unsigned long )(((1U << 30) | (unsigned int )(100 << 8)) | 84U) | (sizeof(struct drm_vmw_update_layout_arg ) << 16))}};
31830#line 182 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31831static struct pci_device_id vmw_pci_id_list[2]  = {      {(__u32 )5549, (__u32 )1029, (__u32 )(~ 0), (__u32 )(~ 0), (__u32 )0, (__u32 )0,
31832      (kernel_ulong_t )0}, 
31833        {(__u32 )0, (__u32 )0, (__u32 )0, 0U, 0U, 0U, 0UL}};
31834#line 187 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31835static int enable_fbdev  ;
31836#line 189
31837static int vmw_probe(struct pci_dev *pdev , struct pci_device_id    *ent ) ;
31838#line 190
31839static void vmw_master_init(struct vmw_master *vmaster ) ;
31840#line 191
31841static int vmwgfx_pm_notifier(struct notifier_block *nb , unsigned long val , void *ptr ) ;
31842#line 194 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31843static char    __mod_enable_fbdev194[38]  __attribute__((__used__, __unused__,
31844__section__(".modinfo"), __aligned__(1)))  = 
31845#line 194
31846  {      (char    )'p',      (char    )'a',      (char const   )'r',      (char const   )'m', 
31847        (char    )'=',      (char    )'e',      (char const   )'n',      (char const   )'a', 
31848        (char    )'b',      (char    )'l',      (char const   )'e',      (char const   )'_', 
31849        (char    )'f',      (char    )'b',      (char const   )'d',      (char const   )'e', 
31850        (char    )'v',      (char    )':',      (char const   )'E',      (char const   )'n', 
31851        (char    )'a',      (char    )'b',      (char const   )'l',      (char const   )'e', 
31852        (char    )' ',      (char    )'v',      (char const   )'m',      (char const   )'w', 
31853        (char    )'g',      (char    )'f',      (char const   )'x',      (char const   )' ', 
31854        (char    )'f',      (char    )'b',      (char const   )'d',      (char const   )'e', 
31855        (char    )'v',      (char    )'\000'};
31856#line 195 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31857static char    __param_str_enable_fbdev[13]  = 
31858#line 195
31859  {      (char    )'e',      (char    )'n',      (char const   )'a',      (char const   )'b', 
31860        (char    )'l',      (char    )'e',      (char const   )'_',      (char const   )'f', 
31861        (char    )'b',      (char    )'d',      (char const   )'e',      (char const   )'v', 
31862        (char    )'\000'};
31863#line 195 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31864static struct kernel_param    __param_enable_fbdev  __attribute__((__used__,
31865__unused__, __section__("__param"), __aligned__(sizeof(void *))))  =    {__param_str_enable_fbdev, (struct kernel_param_ops    *)(& param_ops_int),
31866    (u16 )384, (s16 )0, {(void *)(& enable_fbdev)}};
31867#line 195 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31868static char    __mod_enable_fbdevtype195[26]  __attribute__((__used__, __unused__,
31869__section__(".modinfo"), __aligned__(1)))  = 
31870#line 195
31871  {      (char    )'p',      (char    )'a',      (char const   )'r',      (char const   )'m', 
31872        (char    )'t',      (char    )'y',      (char const   )'p',      (char const   )'e', 
31873        (char    )'=',      (char    )'e',      (char const   )'n',      (char const   )'a', 
31874        (char    )'b',      (char    )'l',      (char const   )'e',      (char const   )'_', 
31875        (char    )'f',      (char    )'b',      (char const   )'d',      (char const   )'e', 
31876        (char    )'v',      (char    )':',      (char const   )'i',      (char const   )'n', 
31877        (char    )'t',      (char    )'\000'};
31878#line 197 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
31879static void vmw_print_capabilities(uint32_t capabilities ) 
31880{ 
31881
31882  {
31883  {
31884#line 199
31885  printk("<6>[drm] Capabilities:\n");
31886  }
31887#line 200
31888  if (capabilities & 2U) {
31889    {
31890#line 201
31891    printk("<6>[drm]   Rect copy.\n");
31892    }
31893  } else {
31894
31895  }
31896#line 202
31897  if (capabilities & 32U) {
31898    {
31899#line 203
31900    printk("<6>[drm]   Cursor.\n");
31901    }
31902  } else {
31903
31904  }
31905#line 204
31906  if (capabilities & 64U) {
31907    {
31908#line 205
31909    printk("<6>[drm]   Cursor bypass.\n");
31910    }
31911  } else {
31912
31913  }
31914#line 206
31915  if (capabilities & 128U) {
31916    {
31917#line 207
31918    printk("<6>[drm]   Cursor bypass 2.\n");
31919    }
31920  } else {
31921
31922  }
31923#line 208
31924  if (capabilities & 256U) {
31925    {
31926#line 209
31927    printk("<6>[drm]   8bit emulation.\n");
31928    }
31929  } else {
31930
31931  }
31932#line 210
31933  if (capabilities & 512U) {
31934    {
31935#line 211
31936    printk("<6>[drm]   Alpha cursor.\n");
31937    }
31938  } else {
31939
31940  }
31941#line 212
31942  if (capabilities & 16384U) {
31943    {
31944#line 213
31945    printk("<6>[drm]   3D.\n");
31946    }
31947  } else {
31948
31949  }
31950#line 214
31951  if (capabilities & 32768U) {
31952    {
31953#line 215
31954    printk("<6>[drm]   Extended Fifo.\n");
31955    }
31956  } else {
31957
31958  }
31959#line 216
31960  if (capabilities & 65536U) {
31961    {
31962#line 217
31963    printk("<6>[drm]   Multimon.\n");
31964    }
31965  } else {
31966
31967  }
31968#line 218
31969  if (capabilities & 131072U) {
31970    {
31971#line 219
31972    printk("<6>[drm]   Pitchlock.\n");
31973    }
31974  } else {
31975
31976  }
31977#line 220
31978  if (capabilities & 262144U) {
31979    {
31980#line 221
31981    printk("<6>[drm]   Irq mask.\n");
31982    }
31983  } else {
31984
31985  }
31986#line 222
31987  if (capabilities & 524288U) {
31988    {
31989#line 223
31990    printk("<6>[drm]   Display Topology.\n");
31991    }
31992  } else {
31993
31994  }
31995#line 224
31996  if (capabilities & 1048576U) {
31997    {
31998#line 225
31999    printk("<6>[drm]   GMR.\n");
32000    }
32001  } else {
32002
32003  }
32004#line 226
32005  if (capabilities & 2097152U) {
32006    {
32007#line 227
32008    printk("<6>[drm]   Traces.\n");
32009    }
32010  } else {
32011
32012  }
32013#line 228
32014  if (capabilities & 4194304U) {
32015    {
32016#line 229
32017    printk("<6>[drm]   GMR2.\n");
32018    }
32019  } else {
32020
32021  }
32022#line 230
32023  if (capabilities & 8388608U) {
32024    {
32025#line 231
32026    printk("<6>[drm]   Screen Object 2.\n");
32027    }
32028  } else {
32029
32030  }
32031#line 232
32032  return;
32033}
32034}
32035#line 248 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32036static void vmw_dummy_query_bo_prepare(struct vmw_private *dev_priv ) 
32037{ struct ttm_bo_kmap_obj map ;
32038  SVGA3dQueryResult volatile   *result ;
32039  bool dummy ;
32040  int ret ;
32041  struct ttm_bo_device *bdev ;
32042  struct ttm_buffer_object *bo ;
32043  long tmp___7 ;
32044  void *tmp___8 ;
32045  long tmp___9 ;
32046  unsigned long __cil_tmp11 ;
32047  unsigned long __cil_tmp12 ;
32048  bool __cil_tmp13 ;
32049  bool __cil_tmp14 ;
32050  bool __cil_tmp15 ;
32051  uint32_t __cil_tmp16 ;
32052  unsigned long __cil_tmp17 ;
32053  unsigned long __cil_tmp18 ;
32054  spinlock_t *__cil_tmp19 ;
32055  bool __cil_tmp20 ;
32056  bool __cil_tmp21 ;
32057  bool __cil_tmp22 ;
32058  unsigned long __cil_tmp23 ;
32059  unsigned long __cil_tmp24 ;
32060  spinlock_t *__cil_tmp25 ;
32061  int __cil_tmp26 ;
32062  int __cil_tmp27 ;
32063  int __cil_tmp28 ;
32064  long __cil_tmp29 ;
32065  bool __cil_tmp30 ;
32066  bool __cil_tmp31 ;
32067  uint32_t __cil_tmp32 ;
32068  bool __cil_tmp33 ;
32069  int __cil_tmp34 ;
32070  int __cil_tmp35 ;
32071  int __cil_tmp36 ;
32072  long __cil_tmp37 ;
32073  unsigned long __cil_tmp38 ;
32074  unsigned long __cil_tmp39 ;
32075  unsigned long __cil_tmp40 ;
32076  unsigned long __cil_tmp41 ;
32077
32078  {
32079  {
32080#line 254
32081  bdev = (struct ttm_bo_device *)dev_priv;
32082#line 255
32083  __cil_tmp11 = (unsigned long )dev_priv;
32084#line 255
32085  __cil_tmp12 = __cil_tmp11 + 134744;
32086#line 255
32087  bo = *((struct ttm_buffer_object **)__cil_tmp12);
32088#line 257
32089  __cil_tmp13 = (bool )0;
32090#line 257
32091  __cil_tmp14 = (bool )0;
32092#line 257
32093  __cil_tmp15 = (bool )0;
32094#line 257
32095  __cil_tmp16 = (uint32_t )0;
32096#line 257
32097  ttm_bo_reserve(bo, __cil_tmp13, __cil_tmp14, __cil_tmp15, __cil_tmp16);
32098#line 258
32099  __cil_tmp17 = (unsigned long )bdev;
32100#line 258
32101  __cil_tmp18 = __cil_tmp17 + 1400;
32102#line 258
32103  __cil_tmp19 = (spinlock_t *)__cil_tmp18;
32104#line 258
32105  spin_lock(__cil_tmp19);
32106#line 259
32107  __cil_tmp20 = (bool )0;
32108#line 259
32109  __cil_tmp21 = (bool )0;
32110#line 259
32111  __cil_tmp22 = (bool )0;
32112#line 259
32113  ret = ttm_bo_wait(bo, __cil_tmp20, __cil_tmp21, __cil_tmp22);
32114#line 260
32115  __cil_tmp23 = (unsigned long )bdev;
32116#line 260
32117  __cil_tmp24 = __cil_tmp23 + 1400;
32118#line 260
32119  __cil_tmp25 = (spinlock_t *)__cil_tmp24;
32120#line 260
32121  spin_unlock(__cil_tmp25);
32122#line 261
32123  __cil_tmp26 = ret != 0;
32124#line 261
32125  __cil_tmp27 = ! __cil_tmp26;
32126#line 261
32127  __cil_tmp28 = ! __cil_tmp27;
32128#line 261
32129  __cil_tmp29 = (long )__cil_tmp28;
32130#line 261
32131  tmp___7 = __builtin_expect(__cil_tmp29, 0L);
32132  }
32133#line 261
32134  if (tmp___7) {
32135    {
32136#line 262
32137    __cil_tmp30 = (bool )0;
32138#line 262
32139    __cil_tmp31 = (bool )1;
32140#line 262
32141    __cil_tmp32 = (uint32_t )0;
32142#line 262
32143    __cil_tmp33 = (bool )0;
32144#line 262
32145    vmw_fallback_wait(dev_priv, __cil_tmp30, __cil_tmp31, __cil_tmp32, __cil_tmp33,
32146                      2500UL);
32147    }
32148  } else {
32149
32150  }
32151  {
32152#line 265
32153  ret = ttm_bo_kmap(bo, 0UL, 1UL, & map);
32154#line 266
32155  __cil_tmp34 = ret == 0;
32156#line 266
32157  __cil_tmp35 = ! __cil_tmp34;
32158#line 266
32159  __cil_tmp36 = ! __cil_tmp35;
32160#line 266
32161  __cil_tmp37 = (long )__cil_tmp36;
32162#line 266
32163  tmp___9 = __builtin_expect(__cil_tmp37, 1L);
32164  }
32165#line 266
32166  if (tmp___9) {
32167    {
32168#line 267
32169    tmp___8 = ttm_kmap_obj_virtual(& map, & dummy);
32170#line 267
32171    result = (SVGA3dQueryResult volatile   *)tmp___8;
32172#line 268
32173    *((uint32 volatile   *)result) = (uint32 volatile   )12UL;
32174#line 269
32175    __cil_tmp38 = (unsigned long )result;
32176#line 269
32177    __cil_tmp39 = __cil_tmp38 + 4;
32178#line 269
32179    *((SVGA3dQueryState volatile   *)__cil_tmp39) = (SVGA3dQueryState volatile   )0;
32180#line 270
32181    __cil_tmp40 = (unsigned long )result;
32182#line 270
32183    __cil_tmp41 = __cil_tmp40 + 8;
32184#line 270
32185    *((uint32 volatile   *)__cil_tmp41) = (uint32 volatile   )255;
32186#line 271
32187    ttm_bo_kunmap(& map);
32188    }
32189  } else {
32190    {
32191#line 273
32192    drm_err("vmw_dummy_query_bo_prepare", "Dummy query buffer map failed.\n");
32193    }
32194  }
32195  {
32196#line 274
32197  ttm_bo_unreserve(bo);
32198  }
32199#line 275
32200  return;
32201}
32202}
32203#line 289 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32204static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv ) 
32205{ int tmp___7 ;
32206  struct ttm_bo_device *__cil_tmp3 ;
32207  unsigned long __cil_tmp4 ;
32208  enum ttm_bo_type __cil_tmp5 ;
32209  uint32_t __cil_tmp6 ;
32210  bool __cil_tmp7 ;
32211  void *__cil_tmp8 ;
32212  struct file *__cil_tmp9 ;
32213  unsigned long __cil_tmp10 ;
32214  unsigned long __cil_tmp11 ;
32215  struct ttm_buffer_object **__cil_tmp12 ;
32216
32217  {
32218  {
32219#line 291
32220  __cil_tmp3 = (struct ttm_bo_device *)dev_priv;
32221#line 291
32222  __cil_tmp4 = 1UL << 12;
32223#line 291
32224  __cil_tmp5 = (enum ttm_bo_type )0;
32225#line 291
32226  __cil_tmp6 = (uint32_t )0;
32227#line 291
32228  __cil_tmp7 = (bool )0;
32229#line 291
32230  __cil_tmp8 = (void *)0;
32231#line 291
32232  __cil_tmp9 = (struct file *)__cil_tmp8;
32233#line 291
32234  __cil_tmp10 = (unsigned long )dev_priv;
32235#line 291
32236  __cil_tmp11 = __cil_tmp10 + 134744;
32237#line 291
32238  __cil_tmp12 = (struct ttm_buffer_object **)__cil_tmp11;
32239#line 291
32240  tmp___7 = ttm_bo_create(__cil_tmp3, __cil_tmp4, __cil_tmp5, & vmw_vram_sys_placement,
32241                          __cil_tmp6, 0UL, __cil_tmp7, __cil_tmp9, __cil_tmp12);
32242  }
32243#line 291
32244  return (tmp___7);
32245}
32246}
32247#line 300 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32248static int vmw_request_device(struct vmw_private *dev_priv ) 
32249{ int ret ;
32250  long tmp___7 ;
32251  long tmp___8 ;
32252  unsigned long __cil_tmp5 ;
32253  unsigned long __cil_tmp6 ;
32254  struct vmw_fifo_state *__cil_tmp7 ;
32255  int __cil_tmp8 ;
32256  int __cil_tmp9 ;
32257  int __cil_tmp10 ;
32258  long __cil_tmp11 ;
32259  unsigned long __cil_tmp12 ;
32260  unsigned long __cil_tmp13 ;
32261  struct vmw_fence_manager *__cil_tmp14 ;
32262  int __cil_tmp15 ;
32263  int __cil_tmp16 ;
32264  int __cil_tmp17 ;
32265  long __cil_tmp18 ;
32266  unsigned long __cil_tmp19 ;
32267  unsigned long __cil_tmp20 ;
32268  struct vmw_fence_manager *__cil_tmp21 ;
32269  unsigned long __cil_tmp22 ;
32270  unsigned long __cil_tmp23 ;
32271  struct vmw_fifo_state *__cil_tmp24 ;
32272
32273  {
32274  {
32275#line 304
32276  __cil_tmp5 = (unsigned long )dev_priv;
32277#line 304
32278  __cil_tmp6 = __cil_tmp5 + 1856;
32279#line 304
32280  __cil_tmp7 = (struct vmw_fifo_state *)__cil_tmp6;
32281#line 304
32282  ret = vmw_fifo_init(dev_priv, __cil_tmp7);
32283#line 305
32284  __cil_tmp8 = ret != 0;
32285#line 305
32286  __cil_tmp9 = ! __cil_tmp8;
32287#line 305
32288  __cil_tmp10 = ! __cil_tmp9;
32289#line 305
32290  __cil_tmp11 = (long )__cil_tmp10;
32291#line 305
32292  tmp___7 = __builtin_expect(__cil_tmp11, 0L);
32293  }
32294#line 305
32295  if (tmp___7) {
32296    {
32297#line 306
32298    drm_err("vmw_request_device", "Unable to initialize FIFO.\n");
32299    }
32300#line 307
32301    return (ret);
32302  } else {
32303
32304  }
32305  {
32306#line 309
32307  __cil_tmp12 = (unsigned long )dev_priv;
32308#line 309
32309  __cil_tmp13 = __cil_tmp12 + 3008;
32310#line 309
32311  __cil_tmp14 = *((struct vmw_fence_manager **)__cil_tmp13);
32312#line 309
32313  vmw_fence_fifo_up(__cil_tmp14);
32314#line 310
32315  ret = vmw_dummy_query_bo_create(dev_priv);
32316#line 311
32317  __cil_tmp15 = ret != 0;
32318#line 311
32319  __cil_tmp16 = ! __cil_tmp15;
32320#line 311
32321  __cil_tmp17 = ! __cil_tmp16;
32322#line 311
32323  __cil_tmp18 = (long )__cil_tmp17;
32324#line 311
32325  tmp___8 = __builtin_expect(__cil_tmp18, 0L);
32326  }
32327#line 311
32328  if (tmp___8) {
32329#line 312
32330    goto out_no_query_bo;
32331  } else {
32332
32333  }
32334  {
32335#line 313
32336  vmw_dummy_query_bo_prepare(dev_priv);
32337  }
32338#line 315
32339  return (0);
32340  out_no_query_bo: 
32341  {
32342#line 318
32343  __cil_tmp19 = (unsigned long )dev_priv;
32344#line 318
32345  __cil_tmp20 = __cil_tmp19 + 3008;
32346#line 318
32347  __cil_tmp21 = *((struct vmw_fence_manager **)__cil_tmp20);
32348#line 318
32349  vmw_fence_fifo_down(__cil_tmp21);
32350#line 319
32351  __cil_tmp22 = (unsigned long )dev_priv;
32352#line 319
32353  __cil_tmp23 = __cil_tmp22 + 1856;
32354#line 319
32355  __cil_tmp24 = (struct vmw_fifo_state *)__cil_tmp23;
32356#line 319
32357  vmw_fifo_release(dev_priv, __cil_tmp24);
32358  }
32359#line 320
32360  return (ret);
32361}
32362}
32363#line 323 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32364static void vmw_release_device(struct vmw_private *dev_priv ) 
32365{ long tmp___7 ;
32366  void *__cil_tmp3 ;
32367  unsigned long __cil_tmp4 ;
32368  unsigned long __cil_tmp5 ;
32369  unsigned long __cil_tmp6 ;
32370  struct ttm_buffer_object *__cil_tmp7 ;
32371  unsigned long __cil_tmp8 ;
32372  int __cil_tmp9 ;
32373  int __cil_tmp10 ;
32374  int __cil_tmp11 ;
32375  long __cil_tmp12 ;
32376  unsigned long __cil_tmp13 ;
32377  unsigned long __cil_tmp14 ;
32378  struct ttm_buffer_object **__cil_tmp15 ;
32379  unsigned long __cil_tmp16 ;
32380  unsigned long __cil_tmp17 ;
32381  struct vmw_fence_manager *__cil_tmp18 ;
32382  unsigned long __cil_tmp19 ;
32383  unsigned long __cil_tmp20 ;
32384  struct vmw_fifo_state *__cil_tmp21 ;
32385
32386  {
32387  {
32388#line 330
32389  while (1) {
32390    while_continue: /* CIL Label */ ;
32391    {
32392#line 330
32393    __cil_tmp3 = (void *)0;
32394#line 330
32395    __cil_tmp4 = (unsigned long )__cil_tmp3;
32396#line 330
32397    __cil_tmp5 = (unsigned long )dev_priv;
32398#line 330
32399    __cil_tmp6 = __cil_tmp5 + 134752;
32400#line 330
32401    __cil_tmp7 = *((struct ttm_buffer_object **)__cil_tmp6);
32402#line 330
32403    __cil_tmp8 = (unsigned long )__cil_tmp7;
32404#line 330
32405    __cil_tmp9 = __cil_tmp8 != __cil_tmp4;
32406#line 330
32407    __cil_tmp10 = ! __cil_tmp9;
32408#line 330
32409    __cil_tmp11 = ! __cil_tmp10;
32410#line 330
32411    __cil_tmp12 = (long )__cil_tmp11;
32412#line 330
32413    tmp___7 = __builtin_expect(__cil_tmp12, 0L);
32414    }
32415#line 330
32416    if (tmp___7) {
32417      {
32418#line 330
32419      while (1) {
32420        while_continue___0: /* CIL Label */ ;
32421#line 330
32422        __asm__  volatile   ("1:\tud2\n"
32423                             ".pushsection __bug_table,\"a\"\n"
32424                             "2:\t.long 1b - 2b, %c0 - 2b\n"
32425                             "\t.word %c1, 0\n"
32426                             "\t.org 2b+%c2\n"
32427                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"),
32428                             "i" (330), "i" (12UL));
32429        {
32430#line 330
32431        while (1) {
32432          while_continue___1: /* CIL Label */ ;
32433        }
32434        while_break___1: /* CIL Label */ ;
32435        }
32436#line 330
32437        goto while_break___0;
32438      }
32439      while_break___0: /* CIL Label */ ;
32440      }
32441    } else {
32442
32443    }
32444#line 330
32445    goto while_break;
32446  }
32447  while_break: /* CIL Label */ ;
32448  }
32449  {
32450#line 332
32451  __cil_tmp13 = (unsigned long )dev_priv;
32452#line 332
32453  __cil_tmp14 = __cil_tmp13 + 134744;
32454#line 332
32455  __cil_tmp15 = (struct ttm_buffer_object **)__cil_tmp14;
32456#line 332
32457  ttm_bo_unref(__cil_tmp15);
32458#line 333
32459  __cil_tmp16 = (unsigned long )dev_priv;
32460#line 333
32461  __cil_tmp17 = __cil_tmp16 + 3008;
32462#line 333
32463  __cil_tmp18 = *((struct vmw_fence_manager **)__cil_tmp17);
32464#line 333
32465  vmw_fence_fifo_down(__cil_tmp18);
32466#line 334
32467  __cil_tmp19 = (unsigned long )dev_priv;
32468#line 334
32469  __cil_tmp20 = __cil_tmp19 + 1856;
32470#line 334
32471  __cil_tmp21 = (struct vmw_fifo_state *)__cil_tmp20;
32472#line 334
32473  vmw_fifo_release(dev_priv, __cil_tmp21);
32474  }
32475#line 335
32476  return;
32477}
32478}
32479#line 343 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32480int vmw_3d_resource_inc(struct vmw_private *dev_priv , bool unhide_svga ) 
32481{ int ret ;
32482  long tmp___7 ;
32483  uint32_t tmp___8 ;
32484  uint32_t tmp___9 ;
32485  int tmp___10 ;
32486  long tmp___11 ;
32487  unsigned long __cil_tmp9 ;
32488  unsigned long __cil_tmp10 ;
32489  struct mutex *__cil_tmp11 ;
32490  unsigned long __cil_tmp12 ;
32491  unsigned long __cil_tmp13 ;
32492  unsigned long __cil_tmp14 ;
32493  unsigned long __cil_tmp15 ;
32494  unsigned long __cil_tmp16 ;
32495  unsigned long __cil_tmp17 ;
32496  uint32_t __cil_tmp18 ;
32497  long __cil_tmp19 ;
32498  int __cil_tmp20 ;
32499  int __cil_tmp21 ;
32500  int __cil_tmp22 ;
32501  long __cil_tmp23 ;
32502  unsigned long __cil_tmp24 ;
32503  unsigned long __cil_tmp25 ;
32504  unsigned long __cil_tmp26 ;
32505  unsigned long __cil_tmp27 ;
32506  uint32_t __cil_tmp28 ;
32507  unsigned long __cil_tmp29 ;
32508  unsigned long __cil_tmp30 ;
32509  struct mutex *__cil_tmp31 ;
32510  unsigned int __cil_tmp32 ;
32511  unsigned long __cil_tmp33 ;
32512  unsigned long __cil_tmp34 ;
32513  struct mutex *__cil_tmp35 ;
32514  unsigned long __cil_tmp36 ;
32515  unsigned long __cil_tmp37 ;
32516  struct mutex *__cil_tmp38 ;
32517
32518  {
32519  {
32520#line 346
32521  ret = 0;
32522#line 348
32523  __cil_tmp9 = (unsigned long )dev_priv;
32524#line 348
32525  __cil_tmp10 = __cil_tmp9 + 134664;
32526#line 348
32527  __cil_tmp11 = (struct mutex *)__cil_tmp10;
32528#line 348
32529  mutex_lock(__cil_tmp11);
32530#line 349
32531  __cil_tmp12 = (unsigned long )dev_priv;
32532#line 349
32533  __cil_tmp13 = __cil_tmp12 + 134736;
32534#line 349
32535  tmp___9 = *((uint32_t *)__cil_tmp13);
32536#line 349
32537  __cil_tmp14 = (unsigned long )dev_priv;
32538#line 349
32539  __cil_tmp15 = __cil_tmp14 + 134736;
32540#line 349
32541  __cil_tmp16 = (unsigned long )dev_priv;
32542#line 349
32543  __cil_tmp17 = __cil_tmp16 + 134736;
32544#line 349
32545  __cil_tmp18 = *((uint32_t *)__cil_tmp17);
32546#line 349
32547  *((uint32_t *)__cil_tmp15) = __cil_tmp18 + 1U;
32548  }
32549#line 349
32550  if (tmp___9 == 0U) {
32551#line 349
32552    tmp___10 = 1;
32553  } else {
32554#line 349
32555    tmp___10 = 0;
32556  }
32557  {
32558#line 349
32559  __cil_tmp19 = (long )tmp___10;
32560#line 349
32561  tmp___11 = __builtin_expect(__cil_tmp19, 0L);
32562  }
32563#line 349
32564  if (tmp___11) {
32565    {
32566#line 350
32567    ret = vmw_request_device(dev_priv);
32568#line 351
32569    __cil_tmp20 = ret != 0;
32570#line 351
32571    __cil_tmp21 = ! __cil_tmp20;
32572#line 351
32573    __cil_tmp22 = ! __cil_tmp21;
32574#line 351
32575    __cil_tmp23 = (long )__cil_tmp22;
32576#line 351
32577    tmp___7 = __builtin_expect(__cil_tmp23, 0L);
32578    }
32579#line 351
32580    if (tmp___7) {
32581#line 352
32582      __cil_tmp24 = (unsigned long )dev_priv;
32583#line 352
32584      __cil_tmp25 = __cil_tmp24 + 134736;
32585#line 352
32586      __cil_tmp26 = (unsigned long )dev_priv;
32587#line 352
32588      __cil_tmp27 = __cil_tmp26 + 134736;
32589#line 352
32590      __cil_tmp28 = *((uint32_t *)__cil_tmp27);
32591#line 352
32592      *((uint32_t *)__cil_tmp25) = __cil_tmp28 - 1U;
32593    } else {
32594
32595    }
32596  } else
32597#line 353
32598  if (unhide_svga) {
32599    {
32600#line 354
32601    __cil_tmp29 = (unsigned long )dev_priv;
32602#line 354
32603    __cil_tmp30 = __cil_tmp29 + 2184;
32604#line 354
32605    __cil_tmp31 = (struct mutex *)__cil_tmp30;
32606#line 354
32607    mutex_lock(__cil_tmp31);
32608#line 355
32609    tmp___8 = vmw_read(dev_priv, 1U);
32610#line 355
32611    __cil_tmp32 = tmp___8 & 4294967293U;
32612#line 355
32613    vmw_write(dev_priv, 1U, __cil_tmp32);
32614#line 358
32615    __cil_tmp33 = (unsigned long )dev_priv;
32616#line 358
32617    __cil_tmp34 = __cil_tmp33 + 2184;
32618#line 358
32619    __cil_tmp35 = (struct mutex *)__cil_tmp34;
32620#line 358
32621    mutex_unlock(__cil_tmp35);
32622    }
32623  } else {
32624
32625  }
32626  {
32627#line 361
32628  __cil_tmp36 = (unsigned long )dev_priv;
32629#line 361
32630  __cil_tmp37 = __cil_tmp36 + 134664;
32631#line 361
32632  __cil_tmp38 = (struct mutex *)__cil_tmp37;
32633#line 361
32634  mutex_unlock(__cil_tmp38);
32635  }
32636#line 362
32637  return (ret);
32638}
32639}
32640#line 373 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32641void vmw_3d_resource_dec(struct vmw_private *dev_priv , bool hide_svga ) 
32642{ int32_t n3d ;
32643  uint32_t tmp___7 ;
32644  int tmp___8 ;
32645  long tmp___9 ;
32646  long tmp___10 ;
32647  unsigned long __cil_tmp8 ;
32648  unsigned long __cil_tmp9 ;
32649  struct mutex *__cil_tmp10 ;
32650  unsigned long __cil_tmp11 ;
32651  unsigned long __cil_tmp12 ;
32652  unsigned long __cil_tmp13 ;
32653  unsigned long __cil_tmp14 ;
32654  uint32_t __cil_tmp15 ;
32655  unsigned long __cil_tmp16 ;
32656  unsigned long __cil_tmp17 ;
32657  uint32_t __cil_tmp18 ;
32658  long __cil_tmp19 ;
32659  unsigned long __cil_tmp20 ;
32660  unsigned long __cil_tmp21 ;
32661  struct mutex *__cil_tmp22 ;
32662  unsigned int __cil_tmp23 ;
32663  unsigned long __cil_tmp24 ;
32664  unsigned long __cil_tmp25 ;
32665  struct mutex *__cil_tmp26 ;
32666  unsigned long __cil_tmp27 ;
32667  unsigned long __cil_tmp28 ;
32668  uint32_t __cil_tmp29 ;
32669  unsigned long __cil_tmp30 ;
32670  unsigned long __cil_tmp31 ;
32671  struct mutex *__cil_tmp32 ;
32672  int __cil_tmp33 ;
32673  int __cil_tmp34 ;
32674  int __cil_tmp35 ;
32675  long __cil_tmp36 ;
32676
32677  {
32678  {
32679#line 378
32680  __cil_tmp8 = (unsigned long )dev_priv;
32681#line 378
32682  __cil_tmp9 = __cil_tmp8 + 134664;
32683#line 378
32684  __cil_tmp10 = (struct mutex *)__cil_tmp9;
32685#line 378
32686  mutex_lock(__cil_tmp10);
32687#line 379
32688  __cil_tmp11 = (unsigned long )dev_priv;
32689#line 379
32690  __cil_tmp12 = __cil_tmp11 + 134736;
32691#line 379
32692  __cil_tmp13 = (unsigned long )dev_priv;
32693#line 379
32694  __cil_tmp14 = __cil_tmp13 + 134736;
32695#line 379
32696  __cil_tmp15 = *((uint32_t *)__cil_tmp14);
32697#line 379
32698  *((uint32_t *)__cil_tmp12) = __cil_tmp15 - 1U;
32699  }
32700  {
32701#line 379
32702  __cil_tmp16 = (unsigned long )dev_priv;
32703#line 379
32704  __cil_tmp17 = __cil_tmp16 + 134736;
32705#line 379
32706  __cil_tmp18 = *((uint32_t *)__cil_tmp17);
32707#line 379
32708  if (__cil_tmp18 == 0U) {
32709#line 379
32710    tmp___8 = 1;
32711  } else {
32712#line 379
32713    tmp___8 = 0;
32714  }
32715  }
32716  {
32717#line 379
32718  __cil_tmp19 = (long )tmp___8;
32719#line 379
32720  tmp___9 = __builtin_expect(__cil_tmp19, 0L);
32721  }
32722#line 379
32723  if (tmp___9) {
32724    {
32725#line 380
32726    vmw_release_device(dev_priv);
32727    }
32728  } else
32729#line 381
32730  if (hide_svga) {
32731    {
32732#line 382
32733    __cil_tmp20 = (unsigned long )dev_priv;
32734#line 382
32735    __cil_tmp21 = __cil_tmp20 + 2184;
32736#line 382
32737    __cil_tmp22 = (struct mutex *)__cil_tmp21;
32738#line 382
32739    mutex_lock(__cil_tmp22);
32740#line 383
32741    tmp___7 = vmw_read(dev_priv, 1U);
32742#line 383
32743    __cil_tmp23 = tmp___7 | 2U;
32744#line 383
32745    vmw_write(dev_priv, 1U, __cil_tmp23);
32746#line 386
32747    __cil_tmp24 = (unsigned long )dev_priv;
32748#line 386
32749    __cil_tmp25 = __cil_tmp24 + 2184;
32750#line 386
32751    __cil_tmp26 = (struct mutex *)__cil_tmp25;
32752#line 386
32753    mutex_unlock(__cil_tmp26);
32754    }
32755  } else {
32756
32757  }
32758  {
32759#line 389
32760  __cil_tmp27 = (unsigned long )dev_priv;
32761#line 389
32762  __cil_tmp28 = __cil_tmp27 + 134736;
32763#line 389
32764  __cil_tmp29 = *((uint32_t *)__cil_tmp28);
32765#line 389
32766  n3d = (int32_t )__cil_tmp29;
32767#line 390
32768  __cil_tmp30 = (unsigned long )dev_priv;
32769#line 390
32770  __cil_tmp31 = __cil_tmp30 + 134664;
32771#line 390
32772  __cil_tmp32 = (struct mutex *)__cil_tmp31;
32773#line 390
32774  mutex_unlock(__cil_tmp32);
32775  }
32776  {
32777#line 392
32778  while (1) {
32779    while_continue: /* CIL Label */ ;
32780    {
32781#line 392
32782    __cil_tmp33 = n3d < 0;
32783#line 392
32784    __cil_tmp34 = ! __cil_tmp33;
32785#line 392
32786    __cil_tmp35 = ! __cil_tmp34;
32787#line 392
32788    __cil_tmp36 = (long )__cil_tmp35;
32789#line 392
32790    tmp___10 = __builtin_expect(__cil_tmp36, 0L);
32791    }
32792#line 392
32793    if (tmp___10) {
32794      {
32795#line 392
32796      while (1) {
32797        while_continue___0: /* CIL Label */ ;
32798#line 392
32799        __asm__  volatile   ("1:\tud2\n"
32800                             ".pushsection __bug_table,\"a\"\n"
32801                             "2:\t.long 1b - 2b, %c0 - 2b\n"
32802                             "\t.word %c1, 0\n"
32803                             "\t.org 2b+%c2\n"
32804                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"),
32805                             "i" (392), "i" (12UL));
32806        {
32807#line 392
32808        while (1) {
32809          while_continue___1: /* CIL Label */ ;
32810        }
32811        while_break___1: /* CIL Label */ ;
32812        }
32813#line 392
32814        goto while_break___0;
32815      }
32816      while_break___0: /* CIL Label */ ;
32817      }
32818    } else {
32819
32820    }
32821#line 392
32822    goto while_break;
32823  }
32824  while_break: /* CIL Label */ ;
32825  }
32826#line 393
32827  return;
32828}
32829}
32830#line 404 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32831static void vmw_get_initial_size(struct vmw_private *dev_priv ) 
32832{ uint32_t width ;
32833  uint32_t height ;
32834  uint32_t __max1 ;
32835  uint32_t __max2 ;
32836  uint32_t tmp___7 ;
32837  uint32_t __max1___0 ;
32838  uint32_t __max2___0 ;
32839  uint32_t tmp___8 ;
32840  unsigned long __cil_tmp10 ;
32841  unsigned long __cil_tmp11 ;
32842  uint32_t __cil_tmp12 ;
32843  unsigned long __cil_tmp13 ;
32844  unsigned long __cil_tmp14 ;
32845  uint32_t __cil_tmp15 ;
32846  unsigned long __cil_tmp16 ;
32847  unsigned long __cil_tmp17 ;
32848  unsigned long __cil_tmp18 ;
32849  unsigned long __cil_tmp19 ;
32850
32851  {
32852  {
32853#line 409
32854  width = vmw_read(dev_priv, 2U);
32855#line 410
32856  height = vmw_read(dev_priv, 3U);
32857#line 412
32858  __max1 = width;
32859#line 412
32860  __max2 = (uint32_t )800;
32861  }
32862#line 412
32863  if (__max1 > __max2) {
32864#line 412
32865    tmp___7 = __max1;
32866  } else {
32867#line 412
32868    tmp___7 = __max2;
32869  }
32870#line 412
32871  width = tmp___7;
32872#line 413
32873  __max1___0 = height;
32874#line 413
32875  __max2___0 = (uint32_t )600;
32876#line 413
32877  if (__max1___0 > __max2___0) {
32878#line 413
32879    tmp___8 = __max1___0;
32880  } else {
32881#line 413
32882    tmp___8 = __max2___0;
32883  }
32884#line 413
32885  height = tmp___8;
32886  {
32887#line 415
32888  __cil_tmp10 = (unsigned long )dev_priv;
32889#line 415
32890  __cil_tmp11 = __cil_tmp10 + 2124;
32891#line 415
32892  __cil_tmp12 = *((uint32_t *)__cil_tmp11);
32893#line 415
32894  if (width > __cil_tmp12) {
32895#line 422
32896    width = (uint32_t )800;
32897#line 423
32898    height = (uint32_t )600;
32899  } else {
32900    {
32901#line 415
32902    __cil_tmp13 = (unsigned long )dev_priv;
32903#line 415
32904    __cil_tmp14 = __cil_tmp13 + 2128;
32905#line 415
32906    __cil_tmp15 = *((uint32_t *)__cil_tmp14);
32907#line 415
32908    if (height > __cil_tmp15) {
32909#line 422
32910      width = (uint32_t )800;
32911#line 423
32912      height = (uint32_t )600;
32913    } else {
32914
32915    }
32916    }
32917  }
32918  }
32919#line 426
32920  __cil_tmp16 = (unsigned long )dev_priv;
32921#line 426
32922  __cil_tmp17 = __cil_tmp16 + 2132;
32923#line 426
32924  *((uint32_t *)__cil_tmp17) = width;
32925#line 427
32926  __cil_tmp18 = (unsigned long )dev_priv;
32927#line 427
32928  __cil_tmp19 = __cil_tmp18 + 2136;
32929#line 427
32930  *((uint32_t *)__cil_tmp19) = height;
32931#line 428
32932  return;
32933}
32934}
32935#line 448 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32936static struct lock_class_key __key___4  ;
32937#line 449 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32938static struct lock_class_key __key___5  ;
32939#line 450 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32940static struct lock_class_key __key___6  ;
32941#line 451 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32942static struct lock_class_key __key___7  ;
32943#line 455 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32944static struct lock_class_key __key___8  ;
32945#line 456 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32946static struct lock_class_key __key___9  ;
32947#line 457 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32948static struct lock_class_key __key___10  ;
32949#line 430 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
32950static int vmw_driver_load(struct drm_device *dev , unsigned long chipset ) 
32951{ struct vmw_private *dev_priv ;
32952  int ret ;
32953  uint32_t svga_id ;
32954  void *tmp___7 ;
32955  long tmp___8 ;
32956  long tmp___9 ;
32957  long tmp___10 ;
32958  long tmp___11 ;
32959  int tmp___12 ;
32960  void *tmp___13 ;
32961  long tmp___14 ;
32962  bool tmp___15 ;
32963  long tmp___16 ;
32964  long tmp___17 ;
32965  long tmp___18 ;
32966  long tmp___19 ;
32967  long tmp___20 ;
32968  char    *tmp___22 ;
32969  bool tmp___23 ;
32970  long tmp___24 ;
32971  void *__cil_tmp24 ;
32972  unsigned long __cil_tmp25 ;
32973  unsigned long __cil_tmp26 ;
32974  int __cil_tmp27 ;
32975  int __cil_tmp28 ;
32976  int __cil_tmp29 ;
32977  long __cil_tmp30 ;
32978  void *__cil_tmp31 ;
32979  unsigned long __cil_tmp32 ;
32980  unsigned long __cil_tmp33 ;
32981  struct pci_dev *__cil_tmp34 ;
32982  unsigned long __cil_tmp35 ;
32983  unsigned long __cil_tmp36 ;
32984  unsigned long __cil_tmp37 ;
32985  unsigned long __cil_tmp38 ;
32986  unsigned long __cil_tmp39 ;
32987  unsigned long __cil_tmp40 ;
32988  unsigned long __cil_tmp41 ;
32989  unsigned long __cil_tmp42 ;
32990  struct mutex *__cil_tmp43 ;
32991  unsigned long __cil_tmp44 ;
32992  unsigned long __cil_tmp45 ;
32993  struct mutex *__cil_tmp46 ;
32994  unsigned long __cil_tmp47 ;
32995  unsigned long __cil_tmp48 ;
32996  struct mutex *__cil_tmp49 ;
32997  unsigned long __cil_tmp50 ;
32998  unsigned long __cil_tmp51 ;
32999  rwlock_t *__cil_tmp52 ;
33000  unsigned long __cil_tmp53 ;
33001  unsigned long __cil_tmp54 ;
33002  struct idr *__cil_tmp55 ;
33003  unsigned long __cil_tmp56 ;
33004  unsigned long __cil_tmp57 ;
33005  struct idr *__cil_tmp58 ;
33006  unsigned long __cil_tmp59 ;
33007  unsigned long __cil_tmp60 ;
33008  struct idr *__cil_tmp61 ;
33009  unsigned long __cil_tmp62 ;
33010  unsigned long __cil_tmp63 ;
33011  struct mutex *__cil_tmp64 ;
33012  unsigned long __cil_tmp65 ;
33013  unsigned long __cil_tmp66 ;
33014  wait_queue_head_t *__cil_tmp67 ;
33015  unsigned long __cil_tmp68 ;
33016  unsigned long __cil_tmp69 ;
33017  wait_queue_head_t *__cil_tmp70 ;
33018  unsigned long __cil_tmp71 ;
33019  unsigned long __cil_tmp72 ;
33020  unsigned long __cil_tmp73 ;
33021  unsigned long __cil_tmp74 ;
33022  atomic_t *__cil_tmp75 ;
33023  unsigned long __cil_tmp76 ;
33024  unsigned long __cil_tmp77 ;
33025  struct list_head *__cil_tmp78 ;
33026  unsigned long __cil_tmp79 ;
33027  unsigned long __cil_tmp80 ;
33028  unsigned long __cil_tmp81 ;
33029  unsigned long __cil_tmp82 ;
33030  unsigned long __cil_tmp83 ;
33031  unsigned long __cil_tmp84 ;
33032  unsigned long __cil_tmp85 ;
33033  unsigned long __cil_tmp86 ;
33034  struct pci_dev *__cil_tmp87 ;
33035  unsigned long __cil_tmp88 ;
33036  unsigned long __cil_tmp89 ;
33037  resource_size_t __cil_tmp90 ;
33038  unsigned long __cil_tmp91 ;
33039  unsigned long __cil_tmp92 ;
33040  unsigned long __cil_tmp93 ;
33041  unsigned long __cil_tmp94 ;
33042  unsigned long __cil_tmp95 ;
33043  unsigned long __cil_tmp96 ;
33044  struct pci_dev *__cil_tmp97 ;
33045  unsigned long __cil_tmp98 ;
33046  unsigned long __cil_tmp99 ;
33047  resource_size_t __cil_tmp100 ;
33048  unsigned long __cil_tmp101 ;
33049  unsigned long __cil_tmp102 ;
33050  unsigned long __cil_tmp103 ;
33051  unsigned long __cil_tmp104 ;
33052  unsigned long __cil_tmp105 ;
33053  unsigned long __cil_tmp106 ;
33054  struct pci_dev *__cil_tmp107 ;
33055  unsigned long __cil_tmp108 ;
33056  unsigned long __cil_tmp109 ;
33057  resource_size_t __cil_tmp110 ;
33058  unsigned long __cil_tmp111 ;
33059  unsigned long __cil_tmp112 ;
33060  int *__cil_tmp113 ;
33061  int __cil_tmp114 ;
33062  unsigned long __cil_tmp115 ;
33063  unsigned long __cil_tmp116 ;
33064  struct mutex *__cil_tmp117 ;
33065  unsigned long __cil_tmp118 ;
33066  unsigned long __cil_tmp119 ;
33067  uint32_t __cil_tmp120 ;
33068  unsigned long __cil_tmp121 ;
33069  unsigned long __cil_tmp122 ;
33070  unsigned long __cil_tmp123 ;
33071  unsigned long __cil_tmp124 ;
33072  unsigned long __cil_tmp125 ;
33073  struct mutex *__cil_tmp126 ;
33074  unsigned long __cil_tmp127 ;
33075  unsigned long __cil_tmp128 ;
33076  unsigned long __cil_tmp129 ;
33077  unsigned long __cil_tmp130 ;
33078  unsigned long __cil_tmp131 ;
33079  unsigned long __cil_tmp132 ;
33080  unsigned long __cil_tmp133 ;
33081  unsigned long __cil_tmp134 ;
33082  unsigned long __cil_tmp135 ;
33083  unsigned long __cil_tmp136 ;
33084  unsigned long __cil_tmp137 ;
33085  unsigned long __cil_tmp138 ;
33086  uint32_t __cil_tmp139 ;
33087  unsigned long __cil_tmp140 ;
33088  unsigned long __cil_tmp141 ;
33089  unsigned long __cil_tmp142 ;
33090  unsigned long __cil_tmp143 ;
33091  unsigned long __cil_tmp144 ;
33092  unsigned long __cil_tmp145 ;
33093  uint32_t __cil_tmp146 ;
33094  unsigned long __cil_tmp147 ;
33095  unsigned long __cil_tmp148 ;
33096  unsigned long __cil_tmp149 ;
33097  unsigned long __cil_tmp150 ;
33098  unsigned long __cil_tmp151 ;
33099  unsigned long __cil_tmp152 ;
33100  unsigned long __cil_tmp153 ;
33101  unsigned long __cil_tmp154 ;
33102  uint32_t __cil_tmp155 ;
33103  unsigned long __cil_tmp156 ;
33104  unsigned long __cil_tmp157 ;
33105  uint32_t __cil_tmp158 ;
33106  unsigned long __cil_tmp159 ;
33107  unsigned long __cil_tmp160 ;
33108  unsigned long __cil_tmp161 ;
33109  unsigned long __cil_tmp162 ;
33110  struct mutex *__cil_tmp163 ;
33111  unsigned long __cil_tmp164 ;
33112  unsigned long __cil_tmp165 ;
33113  uint32_t __cil_tmp166 ;
33114  unsigned long __cil_tmp167 ;
33115  unsigned long __cil_tmp168 ;
33116  uint32_t __cil_tmp169 ;
33117  unsigned long __cil_tmp170 ;
33118  unsigned long __cil_tmp171 ;
33119  uint32_t __cil_tmp172 ;
33120  unsigned long __cil_tmp173 ;
33121  unsigned long __cil_tmp174 ;
33122  uint32_t __cil_tmp175 ;
33123  unsigned long __cil_tmp176 ;
33124  unsigned long __cil_tmp177 ;
33125  uint32_t __cil_tmp178 ;
33126  unsigned long __cil_tmp179 ;
33127  unsigned long __cil_tmp180 ;
33128  uint32_t __cil_tmp181 ;
33129  unsigned long __cil_tmp182 ;
33130  unsigned long __cil_tmp183 ;
33131  uint32_t __cil_tmp184 ;
33132  unsigned int __cil_tmp185 ;
33133  unsigned long __cil_tmp186 ;
33134  unsigned long __cil_tmp187 ;
33135  uint32_t __cil_tmp188 ;
33136  unsigned long __cil_tmp189 ;
33137  unsigned long __cil_tmp190 ;
33138  uint32_t __cil_tmp191 ;
33139  uint32_t __cil_tmp192 ;
33140  unsigned long __cil_tmp193 ;
33141  unsigned long __cil_tmp194 ;
33142  uint32_t __cil_tmp195 ;
33143  unsigned long __cil_tmp196 ;
33144  unsigned long __cil_tmp197 ;
33145  uint32_t __cil_tmp198 ;
33146  uint32_t __cil_tmp199 ;
33147  int __cil_tmp200 ;
33148  int __cil_tmp201 ;
33149  int __cil_tmp202 ;
33150  long __cil_tmp203 ;
33151  unsigned long __cil_tmp204 ;
33152  unsigned long __cil_tmp205 ;
33153  struct vmw_master *__cil_tmp206 ;
33154  unsigned long __cil_tmp207 ;
33155  unsigned long __cil_tmp208 ;
33156  struct ttm_lock *__cil_tmp209 ;
33157  bool __cil_tmp210 ;
33158  unsigned long __cil_tmp211 ;
33159  unsigned long __cil_tmp212 ;
33160  unsigned long __cil_tmp213 ;
33161  unsigned long __cil_tmp214 ;
33162  struct ttm_bo_device *__cil_tmp215 ;
33163  unsigned long __cil_tmp216 ;
33164  unsigned long __cil_tmp217 ;
33165  unsigned long __cil_tmp218 ;
33166  unsigned long __cil_tmp219 ;
33167  void *__cil_tmp220 ;
33168  struct ttm_bo_global *__cil_tmp221 ;
33169  uint64_t __cil_tmp222 ;
33170  bool __cil_tmp223 ;
33171  int __cil_tmp224 ;
33172  int __cil_tmp225 ;
33173  int __cil_tmp226 ;
33174  long __cil_tmp227 ;
33175  struct ttm_bo_device *__cil_tmp228 ;
33176  unsigned long __cil_tmp229 ;
33177  unsigned long __cil_tmp230 ;
33178  uint32_t __cil_tmp231 ;
33179  uint32_t __cil_tmp232 ;
33180  unsigned long __cil_tmp233 ;
33181  int __cil_tmp234 ;
33182  int __cil_tmp235 ;
33183  int __cil_tmp236 ;
33184  long __cil_tmp237 ;
33185  unsigned long __cil_tmp238 ;
33186  unsigned long __cil_tmp239 ;
33187  struct ttm_bo_device *__cil_tmp240 ;
33188  unsigned long __cil_tmp241 ;
33189  unsigned long __cil_tmp242 ;
33190  uint32_t __cil_tmp243 ;
33191  unsigned long __cil_tmp244 ;
33192  unsigned long __cil_tmp245 ;
33193  unsigned long __cil_tmp246 ;
33194  unsigned long __cil_tmp247 ;
33195  unsigned long __cil_tmp248 ;
33196  unsigned long __cil_tmp249 ;
33197  unsigned long __cil_tmp250 ;
33198  uint32_t __cil_tmp251 ;
33199  unsigned long __cil_tmp252 ;
33200  unsigned long __cil_tmp253 ;
33201  unsigned long __cil_tmp254 ;
33202  uint32_t __cil_tmp255 ;
33203  unsigned long __cil_tmp256 ;
33204  unsigned long __cil_tmp257 ;
33205  unsigned long __cil_tmp258 ;
33206  uint32_t __cil_tmp259 ;
33207  resource_size_t __cil_tmp260 ;
33208  unsigned long __cil_tmp261 ;
33209  unsigned long __cil_tmp262 ;
33210  uint32_t __cil_tmp263 ;
33211  unsigned long __cil_tmp264 ;
33212  unsigned long __cil_tmp265 ;
33213  unsigned long __cil_tmp266 ;
33214  void *__cil_tmp267 ;
33215  unsigned long __cil_tmp268 ;
33216  unsigned long __cil_tmp269 ;
33217  unsigned long __cil_tmp270 ;
33218  __le32 *__cil_tmp271 ;
33219  unsigned long __cil_tmp272 ;
33220  int __cil_tmp273 ;
33221  int __cil_tmp274 ;
33222  int __cil_tmp275 ;
33223  long __cil_tmp276 ;
33224  unsigned long __cil_tmp277 ;
33225  unsigned long __cil_tmp278 ;
33226  uint32_t __cil_tmp279 ;
33227  unsigned int __cil_tmp280 ;
33228  unsigned long __cil_tmp281 ;
33229  unsigned long __cil_tmp282 ;
33230  uint32_t __cil_tmp283 ;
33231  unsigned int __cil_tmp284 ;
33232  unsigned long __cil_tmp285 ;
33233  unsigned long __cil_tmp286 ;
33234  unsigned long __cil_tmp287 ;
33235  unsigned long __cil_tmp288 ;
33236  unsigned long __cil_tmp289 ;
33237  void *__cil_tmp290 ;
33238  struct ttm_mem_global *__cil_tmp291 ;
33239  void *__cil_tmp292 ;
33240  unsigned long __cil_tmp293 ;
33241  unsigned long __cil_tmp294 ;
33242  unsigned long __cil_tmp295 ;
33243  struct ttm_object_device *__cil_tmp296 ;
33244  unsigned long __cil_tmp297 ;
33245  int __cil_tmp298 ;
33246  int __cil_tmp299 ;
33247  int __cil_tmp300 ;
33248  long __cil_tmp301 ;
33249  unsigned long __cil_tmp302 ;
33250  unsigned long __cil_tmp303 ;
33251  unsigned long __cil_tmp304 ;
33252  unsigned long __cil_tmp305 ;
33253  struct pci_dev *__cil_tmp306 ;
33254  unsigned long __cil_tmp307 ;
33255  unsigned long __cil_tmp308 ;
33256  int __cil_tmp309 ;
33257  unsigned long __cil_tmp310 ;
33258  unsigned long __cil_tmp311 ;
33259  unsigned long __cil_tmp312 ;
33260  unsigned long __cil_tmp313 ;
33261  struct pci_dev *__cil_tmp314 ;
33262  int __cil_tmp315 ;
33263  int __cil_tmp316 ;
33264  int __cil_tmp317 ;
33265  long __cil_tmp318 ;
33266  unsigned long __cil_tmp319 ;
33267  unsigned long __cil_tmp320 ;
33268  void *__cil_tmp321 ;
33269  unsigned long __cil_tmp322 ;
33270  unsigned long __cil_tmp323 ;
33271  unsigned long __cil_tmp324 ;
33272  struct vmw_fence_manager *__cil_tmp325 ;
33273  unsigned long __cil_tmp326 ;
33274  int __cil_tmp327 ;
33275  int __cil_tmp328 ;
33276  int __cil_tmp329 ;
33277  long __cil_tmp330 ;
33278  bool __cil_tmp331 ;
33279  int __cil_tmp332 ;
33280  int __cil_tmp333 ;
33281  int __cil_tmp334 ;
33282  long __cil_tmp335 ;
33283  int __cil_tmp336 ;
33284  int __cil_tmp337 ;
33285  int __cil_tmp338 ;
33286  long __cil_tmp339 ;
33287  unsigned long __cil_tmp340 ;
33288  unsigned long __cil_tmp341 ;
33289  bool __cil_tmp342 ;
33290  unsigned long __cil_tmp343 ;
33291  unsigned long __cil_tmp344 ;
33292  uint32_t __cil_tmp345 ;
33293  int __cil_tmp346 ;
33294  int __cil_tmp347 ;
33295  int __cil_tmp348 ;
33296  long __cil_tmp349 ;
33297  unsigned long __cil_tmp350 ;
33298  unsigned long __cil_tmp351 ;
33299  unsigned long __cil_tmp352 ;
33300  unsigned long __cil_tmp353 ;
33301  struct notifier_block *__cil_tmp354 ;
33302  unsigned long __cil_tmp355 ;
33303  unsigned long __cil_tmp356 ;
33304  unsigned long __cil_tmp357 ;
33305  unsigned long __cil_tmp358 ;
33306  bool __cil_tmp359 ;
33307  unsigned long __cil_tmp360 ;
33308  unsigned long __cil_tmp361 ;
33309  struct vmw_fence_manager *__cil_tmp362 ;
33310  unsigned long __cil_tmp363 ;
33311  unsigned long __cil_tmp364 ;
33312  unsigned long __cil_tmp365 ;
33313  unsigned long __cil_tmp366 ;
33314  struct pci_dev *__cil_tmp367 ;
33315  unsigned long __cil_tmp368 ;
33316  unsigned long __cil_tmp369 ;
33317  struct pci_dev *__cil_tmp370 ;
33318  unsigned long __cil_tmp371 ;
33319  unsigned long __cil_tmp372 ;
33320  struct ttm_object_device **__cil_tmp373 ;
33321  unsigned long __cil_tmp374 ;
33322  unsigned long __cil_tmp375 ;
33323  __le32 *__cil_tmp376 ;
33324  void volatile   *__cil_tmp377 ;
33325  unsigned long __cil_tmp378 ;
33326  unsigned long __cil_tmp379 ;
33327  int __cil_tmp380 ;
33328  unsigned long __cil_tmp381 ;
33329  unsigned long __cil_tmp382 ;
33330  uint32_t __cil_tmp383 ;
33331  unsigned long __cil_tmp384 ;
33332  unsigned long __cil_tmp385 ;
33333  unsigned long __cil_tmp386 ;
33334  uint32_t __cil_tmp387 ;
33335  unsigned long __cil_tmp388 ;
33336  unsigned long __cil_tmp389 ;
33337  unsigned long __cil_tmp390 ;
33338  struct ttm_bo_device *__cil_tmp391 ;
33339  struct ttm_bo_device *__cil_tmp392 ;
33340  struct ttm_bo_device *__cil_tmp393 ;
33341  unsigned long __cil_tmp394 ;
33342  unsigned long __cil_tmp395 ;
33343  struct idr *__cil_tmp396 ;
33344  unsigned long __cil_tmp397 ;
33345  unsigned long __cil_tmp398 ;
33346  struct idr *__cil_tmp399 ;
33347  unsigned long __cil_tmp400 ;
33348  unsigned long __cil_tmp401 ;
33349  struct idr *__cil_tmp402 ;
33350  void    *__cil_tmp403 ;
33351
33352  {
33353  {
33354#line 436
33355  tmp___7 = kzalloc(134792UL, 208U);
33356#line 436
33357  dev_priv = (struct vmw_private *)tmp___7;
33358#line 437
33359  __cil_tmp24 = (void *)0;
33360#line 437
33361  __cil_tmp25 = (unsigned long )__cil_tmp24;
33362#line 437
33363  __cil_tmp26 = (unsigned long )dev_priv;
33364#line 437
33365  __cil_tmp27 = __cil_tmp26 == __cil_tmp25;
33366#line 437
33367  __cil_tmp28 = ! __cil_tmp27;
33368#line 437
33369  __cil_tmp29 = ! __cil_tmp28;
33370#line 437
33371  __cil_tmp30 = (long )__cil_tmp29;
33372#line 437
33373  tmp___8 = __builtin_expect(__cil_tmp30, 0L);
33374  }
33375#line 437
33376  if (tmp___8) {
33377    {
33378#line 438
33379    drm_err("vmw_driver_load", "Failed allocating a device private struct.\n");
33380    }
33381#line 439
33382    return (-12);
33383  } else {
33384
33385  }
33386  {
33387#line 441
33388  __cil_tmp31 = (void *)dev_priv;
33389#line 441
33390  memset(__cil_tmp31, 0, 134792UL);
33391#line 443
33392  __cil_tmp32 = (unsigned long )dev;
33393#line 443
33394  __cil_tmp33 = __cil_tmp32 + 1016;
33395#line 443
33396  __cil_tmp34 = *((struct pci_dev **)__cil_tmp33);
33397#line 443
33398  pci_set_master(__cil_tmp34);
33399#line 445
33400  __cil_tmp35 = (unsigned long )dev_priv;
33401#line 445
33402  __cil_tmp36 = __cil_tmp35 + 2088;
33403#line 445
33404  *((struct drm_device **)__cil_tmp36) = dev;
33405#line 446
33406  __cil_tmp37 = (unsigned long )dev_priv;
33407#line 446
33408  __cil_tmp38 = __cil_tmp37 + 2096;
33409#line 446
33410  *((unsigned long *)__cil_tmp38) = chipset;
33411#line 447
33412  __cil_tmp39 = (unsigned long )dev_priv;
33413#line 447
33414  __cil_tmp40 = __cil_tmp39 + 2980;
33415#line 447
33416  *((uint32_t *)__cil_tmp40) = (uint32_t )-100;
33417  }
33418  {
33419#line 448
33420  while (1) {
33421    while_continue: /* CIL Label */ ;
33422    {
33423#line 448
33424    __cil_tmp41 = (unsigned long )dev_priv;
33425#line 448
33426    __cil_tmp42 = __cil_tmp41 + 2184;
33427#line 448
33428    __cil_tmp43 = (struct mutex *)__cil_tmp42;
33429#line 448
33430    __mutex_init(__cil_tmp43, "&dev_priv->hw_mutex", & __key___4);
33431    }
33432#line 448
33433    goto while_break;
33434  }
33435  while_break: /* CIL Label */ ;
33436  }
33437  {
33438#line 449
33439  while (1) {
33440    while_continue___0: /* CIL Label */ ;
33441    {
33442#line 449
33443    __cil_tmp44 = (unsigned long )dev_priv;
33444#line 449
33445    __cil_tmp45 = __cil_tmp44 + 134304;
33446#line 449
33447    __cil_tmp46 = (struct mutex *)__cil_tmp45;
33448#line 449
33449    __mutex_init(__cil_tmp46, "&dev_priv->cmdbuf_mutex", & __key___5);
33450    }
33451#line 449
33452    goto while_break___0;
33453  }
33454  while_break___0: /* CIL Label */ ;
33455  }
33456  {
33457#line 450
33458  while (1) {
33459    while_continue___1: /* CIL Label */ ;
33460    {
33461#line 450
33462    __cil_tmp47 = (unsigned long )dev_priv;
33463#line 450
33464    __cil_tmp48 = __cil_tmp47 + 134664;
33465#line 450
33466    __cil_tmp49 = (struct mutex *)__cil_tmp48;
33467#line 450
33468    __mutex_init(__cil_tmp49, "&dev_priv->release_mutex", & __key___6);
33469    }
33470#line 450
33471    goto while_break___1;
33472  }
33473  while_break___1: /* CIL Label */ ;
33474  }
33475  {
33476#line 451
33477  while (1) {
33478    while_continue___2: /* CIL Label */ ;
33479    {
33480#line 451
33481    __cil_tmp50 = (unsigned long )dev_priv;
33482#line 451
33483    __cil_tmp51 = __cil_tmp50 + 2632;
33484#line 451
33485    __cil_tmp52 = (rwlock_t *)__cil_tmp51;
33486#line 451
33487    __rwlock_init(__cil_tmp52, "&dev_priv->resource_lock", & __key___7);
33488    }
33489#line 451
33490    goto while_break___2;
33491  }
33492  while_break___2: /* CIL Label */ ;
33493  }
33494  {
33495#line 452
33496  __cil_tmp53 = (unsigned long )dev_priv;
33497#line 452
33498  __cil_tmp54 = __cil_tmp53 + 2656;
33499#line 452
33500  __cil_tmp55 = (struct idr *)__cil_tmp54;
33501#line 452
33502  idr_init(__cil_tmp55);
33503#line 453
33504  __cil_tmp56 = (unsigned long )dev_priv;
33505#line 453
33506  __cil_tmp57 = __cil_tmp56 + 2704;
33507#line 453
33508  __cil_tmp58 = (struct idr *)__cil_tmp57;
33509#line 453
33510  idr_init(__cil_tmp58);
33511#line 454
33512  __cil_tmp59 = (unsigned long )dev_priv;
33513#line 454
33514  __cil_tmp60 = __cil_tmp59 + 2752;
33515#line 454
33516  __cil_tmp61 = (struct idr *)__cil_tmp60;
33517#line 454
33518  idr_init(__cil_tmp61);
33519  }
33520  {
33521#line 455
33522  while (1) {
33523    while_continue___3: /* CIL Label */ ;
33524    {
33525#line 455
33526    __cil_tmp62 = (unsigned long )dev_priv;
33527#line 455
33528    __cil_tmp63 = __cil_tmp62 + 2800;
33529#line 455
33530    __cil_tmp64 = (struct mutex *)__cil_tmp63;
33531#line 455
33532    __mutex_init(__cil_tmp64, "&dev_priv->init_mutex", & __key___8);
33533    }
33534#line 455
33535    goto while_break___3;
33536  }
33537  while_break___3: /* CIL Label */ ;
33538  }
33539  {
33540#line 456
33541  while (1) {
33542    while_continue___4: /* CIL Label */ ;
33543    {
33544#line 456
33545    __cil_tmp65 = (unsigned long )dev_priv;
33546#line 456
33547    __cil_tmp66 = __cil_tmp65 + 2888;
33548#line 456
33549    __cil_tmp67 = (wait_queue_head_t *)__cil_tmp66;
33550#line 456
33551    __init_waitqueue_head(__cil_tmp67, "&dev_priv->fence_queue", & __key___9);
33552    }
33553#line 456
33554    goto while_break___4;
33555  }
33556  while_break___4: /* CIL Label */ ;
33557  }
33558  {
33559#line 457
33560  while (1) {
33561    while_continue___5: /* CIL Label */ ;
33562    {
33563#line 457
33564    __cil_tmp68 = (unsigned long )dev_priv;
33565#line 457
33566    __cil_tmp69 = __cil_tmp68 + 2928;
33567#line 457
33568    __cil_tmp70 = (wait_queue_head_t *)__cil_tmp69;
33569#line 457
33570    __init_waitqueue_head(__cil_tmp70, "&dev_priv->fifo_queue", & __key___10);
33571    }
33572#line 457
33573    goto while_break___5;
33574  }
33575  while_break___5: /* CIL Label */ ;
33576  }
33577  {
33578#line 458
33579  __cil_tmp71 = (unsigned long )dev_priv;
33580#line 458
33581  __cil_tmp72 = __cil_tmp71 + 2968;
33582#line 458
33583  *((int *)__cil_tmp72) = 0;
33584#line 459
33585  __cil_tmp73 = (unsigned long )dev_priv;
33586#line 459
33587  __cil_tmp74 = __cil_tmp73 + 2976;
33588#line 459
33589  __cil_tmp75 = (atomic_t *)__cil_tmp74;
33590#line 459
33591  atomic_set(__cil_tmp75, 0);
33592#line 460
33593  __cil_tmp76 = (unsigned long )dev_priv;
33594#line 460
33595  __cil_tmp77 = __cil_tmp76 + 134768;
33596#line 460
33597  __cil_tmp78 = (struct list_head *)__cil_tmp77;
33598#line 460
33599  INIT_LIST_HEAD(__cil_tmp78);
33600#line 461
33601  __cil_tmp79 = (unsigned long )dev_priv;
33602#line 461
33603  __cil_tmp80 = __cil_tmp79 + 134784;
33604#line 461
33605  *((uint32_t *)__cil_tmp80) = (uint32_t )0;
33606#line 463
33607  __cil_tmp81 = (unsigned long )dev_priv;
33608#line 463
33609  __cil_tmp82 = __cil_tmp81 + 2104;
33610#line 463
33611  __cil_tmp83 = 0 * 56UL;
33612#line 463
33613  __cil_tmp84 = 920 + __cil_tmp83;
33614#line 463
33615  __cil_tmp85 = (unsigned long )dev;
33616#line 463
33617  __cil_tmp86 = __cil_tmp85 + 1016;
33618#line 463
33619  __cil_tmp87 = *((struct pci_dev **)__cil_tmp86);
33620#line 463
33621  __cil_tmp88 = (unsigned long )__cil_tmp87;
33622#line 463
33623  __cil_tmp89 = __cil_tmp88 + __cil_tmp84;
33624#line 463
33625  __cil_tmp90 = *((resource_size_t *)__cil_tmp89);
33626#line 463
33627  *((unsigned int *)__cil_tmp82) = (unsigned int )__cil_tmp90;
33628#line 464
33629  __cil_tmp91 = (unsigned long )dev_priv;
33630#line 464
33631  __cil_tmp92 = __cil_tmp91 + 2108;
33632#line 464
33633  __cil_tmp93 = 1 * 56UL;
33634#line 464
33635  __cil_tmp94 = 920 + __cil_tmp93;
33636#line 464
33637  __cil_tmp95 = (unsigned long )dev;
33638#line 464
33639  __cil_tmp96 = __cil_tmp95 + 1016;
33640#line 464
33641  __cil_tmp97 = *((struct pci_dev **)__cil_tmp96);
33642#line 464
33643  __cil_tmp98 = (unsigned long )__cil_tmp97;
33644#line 464
33645  __cil_tmp99 = __cil_tmp98 + __cil_tmp94;
33646#line 464
33647  __cil_tmp100 = *((resource_size_t *)__cil_tmp99);
33648#line 464
33649  *((uint32_t *)__cil_tmp92) = (uint32_t )__cil_tmp100;
33650#line 465
33651  __cil_tmp101 = (unsigned long )dev_priv;
33652#line 465
33653  __cil_tmp102 = __cil_tmp101 + 2116;
33654#line 465
33655  __cil_tmp103 = 2 * 56UL;
33656#line 465
33657  __cil_tmp104 = 920 + __cil_tmp103;
33658#line 465
33659  __cil_tmp105 = (unsigned long )dev;
33660#line 465
33661  __cil_tmp106 = __cil_tmp105 + 1016;
33662#line 465
33663  __cil_tmp107 = *((struct pci_dev **)__cil_tmp106);
33664#line 465
33665  __cil_tmp108 = (unsigned long )__cil_tmp107;
33666#line 465
33667  __cil_tmp109 = __cil_tmp108 + __cil_tmp104;
33668#line 465
33669  __cil_tmp110 = *((resource_size_t *)__cil_tmp109);
33670#line 465
33671  *((uint32_t *)__cil_tmp102) = (uint32_t )__cil_tmp110;
33672#line 467
33673  __cil_tmp111 = (unsigned long )dev_priv;
33674#line 467
33675  __cil_tmp112 = __cil_tmp111 + 134378;
33676#line 467
33677  __cil_tmp113 = & enable_fbdev;
33678#line 467
33679  __cil_tmp114 = *__cil_tmp113;
33680#line 467
33681  *((bool *)__cil_tmp112) = (bool )__cil_tmp114;
33682#line 469
33683  __cil_tmp115 = (unsigned long )dev_priv;
33684#line 469
33685  __cil_tmp116 = __cil_tmp115 + 2184;
33686#line 469
33687  __cil_tmp117 = (struct mutex *)__cil_tmp116;
33688#line 469
33689  mutex_lock(__cil_tmp117);
33690#line 471
33691  __cil_tmp118 = 9437184UL << 8;
33692#line 471
33693  __cil_tmp119 = __cil_tmp118 | 2UL;
33694#line 471
33695  __cil_tmp120 = (uint32_t )__cil_tmp119;
33696#line 471
33697  vmw_write(dev_priv, 0U, __cil_tmp120);
33698#line 472
33699  svga_id = vmw_read(dev_priv, 0U);
33700  }
33701  {
33702#line 473
33703  __cil_tmp121 = 9437184UL << 8;
33704#line 473
33705  __cil_tmp122 = __cil_tmp121 | 2UL;
33706#line 473
33707  __cil_tmp123 = (unsigned long )svga_id;
33708#line 473
33709  if (__cil_tmp123 != __cil_tmp122) {
33710    {
33711#line 474
33712    ret = -38;
33713#line 475
33714    drm_err("vmw_driver_load", "Unsupported SVGA ID 0x%x\n", svga_id);
33715#line 476
33716    __cil_tmp124 = (unsigned long )dev_priv;
33717#line 476
33718    __cil_tmp125 = __cil_tmp124 + 2184;
33719#line 476
33720    __cil_tmp126 = (struct mutex *)__cil_tmp125;
33721#line 476
33722    mutex_unlock(__cil_tmp126);
33723    }
33724#line 477
33725    goto out_err0;
33726  } else {
33727
33728  }
33729  }
33730  {
33731#line 480
33732  __cil_tmp127 = (unsigned long )dev_priv;
33733#line 480
33734  __cil_tmp128 = __cil_tmp127 + 2156;
33735#line 480
33736  *((uint32_t *)__cil_tmp128) = vmw_read(dev_priv, 17U);
33737#line 482
33738  __cil_tmp129 = (unsigned long )dev_priv;
33739#line 482
33740  __cil_tmp130 = __cil_tmp129 + 2112;
33741#line 482
33742  *((uint32_t *)__cil_tmp130) = vmw_read(dev_priv, 15U);
33743#line 483
33744  __cil_tmp131 = (unsigned long )dev_priv;
33745#line 483
33746  __cil_tmp132 = __cil_tmp131 + 2120;
33747#line 483
33748  *((uint32_t *)__cil_tmp132) = vmw_read(dev_priv, 19U);
33749#line 484
33750  __cil_tmp133 = (unsigned long )dev_priv;
33751#line 484
33752  __cil_tmp134 = __cil_tmp133 + 2124;
33753#line 484
33754  *((uint32_t *)__cil_tmp134) = vmw_read(dev_priv, 4U);
33755#line 485
33756  __cil_tmp135 = (unsigned long )dev_priv;
33757#line 485
33758  __cil_tmp136 = __cil_tmp135 + 2128;
33759#line 485
33760  *((uint32_t *)__cil_tmp136) = vmw_read(dev_priv, 5U);
33761#line 487
33762  vmw_get_initial_size(dev_priv);
33763  }
33764  {
33765#line 489
33766  __cil_tmp137 = (unsigned long )dev_priv;
33767#line 489
33768  __cil_tmp138 = __cil_tmp137 + 2156;
33769#line 489
33770  __cil_tmp139 = *((uint32_t *)__cil_tmp138);
33771#line 489
33772  if (__cil_tmp139 & 1048576U) {
33773    {
33774#line 490
33775    __cil_tmp140 = (unsigned long )dev_priv;
33776#line 490
33777    __cil_tmp141 = __cil_tmp140 + 2160;
33778#line 490
33779    *((uint32_t *)__cil_tmp141) = vmw_read(dev_priv, 44U);
33780#line 493
33781    __cil_tmp142 = (unsigned long )dev_priv;
33782#line 493
33783    __cil_tmp143 = __cil_tmp142 + 2164;
33784#line 493
33785    *((uint32_t *)__cil_tmp143) = vmw_read(dev_priv, 43U);
33786    }
33787  } else {
33788
33789  }
33790  }
33791  {
33792#line 496
33793  __cil_tmp144 = (unsigned long )dev_priv;
33794#line 496
33795  __cil_tmp145 = __cil_tmp144 + 2156;
33796#line 496
33797  __cil_tmp146 = *((uint32_t *)__cil_tmp145);
33798#line 496
33799  if (__cil_tmp146 & 4194304U) {
33800    {
33801#line 497
33802    __cil_tmp147 = (unsigned long )dev_priv;
33803#line 497
33804    __cil_tmp148 = __cil_tmp147 + 2168;
33805#line 497
33806    *((uint32_t *)__cil_tmp148) = vmw_read(dev_priv, 46U);
33807#line 499
33808    __cil_tmp149 = (unsigned long )dev_priv;
33809#line 499
33810    __cil_tmp150 = __cil_tmp149 + 2172;
33811#line 499
33812    *((uint32_t *)__cil_tmp150) = vmw_read(dev_priv, 47U);
33813#line 501
33814    __cil_tmp151 = (unsigned long )dev_priv;
33815#line 501
33816    __cil_tmp152 = __cil_tmp151 + 2172;
33817#line 501
33818    __cil_tmp153 = (unsigned long )dev_priv;
33819#line 501
33820    __cil_tmp154 = __cil_tmp153 + 2112;
33821#line 501
33822    __cil_tmp155 = *((uint32_t *)__cil_tmp154);
33823#line 501
33824    __cil_tmp156 = (unsigned long )dev_priv;
33825#line 501
33826    __cil_tmp157 = __cil_tmp156 + 2172;
33827#line 501
33828    __cil_tmp158 = *((uint32_t *)__cil_tmp157);
33829#line 501
33830    *((uint32_t *)__cil_tmp152) = __cil_tmp158 - __cil_tmp155;
33831    }
33832  } else {
33833#line 507
33834    __cil_tmp159 = (unsigned long )dev_priv;
33835#line 507
33836    __cil_tmp160 = __cil_tmp159 + 2172;
33837#line 507
33838    *((uint32_t *)__cil_tmp160) = (uint32_t )536870912;
33839  }
33840  }
33841  {
33842#line 510
33843  __cil_tmp161 = (unsigned long )dev_priv;
33844#line 510
33845  __cil_tmp162 = __cil_tmp161 + 2184;
33846#line 510
33847  __cil_tmp163 = (struct mutex *)__cil_tmp162;
33848#line 510
33849  mutex_unlock(__cil_tmp163);
33850#line 512
33851  __cil_tmp164 = (unsigned long )dev_priv;
33852#line 512
33853  __cil_tmp165 = __cil_tmp164 + 2156;
33854#line 512
33855  __cil_tmp166 = *((uint32_t *)__cil_tmp165);
33856#line 512
33857  vmw_print_capabilities(__cil_tmp166);
33858  }
33859  {
33860#line 514
33861  __cil_tmp167 = (unsigned long )dev_priv;
33862#line 514
33863  __cil_tmp168 = __cil_tmp167 + 2156;
33864#line 514
33865  __cil_tmp169 = *((uint32_t *)__cil_tmp168);
33866#line 514
33867  if (__cil_tmp169 & 1048576U) {
33868    {
33869#line 515
33870    __cil_tmp170 = (unsigned long )dev_priv;
33871#line 515
33872    __cil_tmp171 = __cil_tmp170 + 2164;
33873#line 515
33874    __cil_tmp172 = *((uint32_t *)__cil_tmp171);
33875#line 515
33876    printk("<6>[drm] Max GMR ids is %u\n", __cil_tmp172);
33877#line 517
33878    __cil_tmp173 = (unsigned long )dev_priv;
33879#line 517
33880    __cil_tmp174 = __cil_tmp173 + 2160;
33881#line 517
33882    __cil_tmp175 = *((uint32_t *)__cil_tmp174);
33883#line 517
33884    printk("<6>[drm] Max GMR descriptors is %u\n", __cil_tmp175);
33885    }
33886  } else {
33887
33888  }
33889  }
33890  {
33891#line 520
33892  __cil_tmp176 = (unsigned long )dev_priv;
33893#line 520
33894  __cil_tmp177 = __cil_tmp176 + 2156;
33895#line 520
33896  __cil_tmp178 = *((uint32_t *)__cil_tmp177);
33897#line 520
33898  if (__cil_tmp178 & 4194304U) {
33899    {
33900#line 521
33901    __cil_tmp179 = (unsigned long )dev_priv;
33902#line 521
33903    __cil_tmp180 = __cil_tmp179 + 2168;
33904#line 521
33905    __cil_tmp181 = *((uint32_t *)__cil_tmp180);
33906#line 521
33907    printk("<6>[drm] Max number of GMR pages is %u\n", __cil_tmp181);
33908#line 523
33909    __cil_tmp182 = (unsigned long )dev_priv;
33910#line 523
33911    __cil_tmp183 = __cil_tmp182 + 2172;
33912#line 523
33913    __cil_tmp184 = *((uint32_t *)__cil_tmp183);
33914#line 523
33915    __cil_tmp185 = __cil_tmp184 / 1024U;
33916#line 523
33917    printk("<6>[drm] Max dedicated hypervisor surface memory is %u kiB\n", __cil_tmp185);
33918    }
33919  } else {
33920
33921  }
33922  }
33923  {
33924#line 526
33925  __cil_tmp186 = (unsigned long )dev_priv;
33926#line 526
33927  __cil_tmp187 = __cil_tmp186 + 2108;
33928#line 526
33929  __cil_tmp188 = *((uint32_t *)__cil_tmp187);
33930#line 526
33931  __cil_tmp189 = (unsigned long )dev_priv;
33932#line 526
33933  __cil_tmp190 = __cil_tmp189 + 2112;
33934#line 526
33935  __cil_tmp191 = *((uint32_t *)__cil_tmp190);
33936#line 526
33937  __cil_tmp192 = __cil_tmp191 / 1024U;
33938#line 526
33939  printk("<6>[drm] VRAM at 0x%08x size is %u kiB\n", __cil_tmp188, __cil_tmp192);
33940#line 528
33941  __cil_tmp193 = (unsigned long )dev_priv;
33942#line 528
33943  __cil_tmp194 = __cil_tmp193 + 2116;
33944#line 528
33945  __cil_tmp195 = *((uint32_t *)__cil_tmp194);
33946#line 528
33947  __cil_tmp196 = (unsigned long )dev_priv;
33948#line 528
33949  __cil_tmp197 = __cil_tmp196 + 2120;
33950#line 528
33951  __cil_tmp198 = *((uint32_t *)__cil_tmp197);
33952#line 528
33953  __cil_tmp199 = __cil_tmp198 / 1024U;
33954#line 528
33955  printk("<6>[drm] MMIO at 0x%08x size is %u kiB\n", __cil_tmp195, __cil_tmp199);
33956#line 531
33957  ret = vmw_ttm_global_init(dev_priv);
33958#line 532
33959  __cil_tmp200 = ret != 0;
33960#line 532
33961  __cil_tmp201 = ! __cil_tmp200;
33962#line 532
33963  __cil_tmp202 = ! __cil_tmp201;
33964#line 532
33965  __cil_tmp203 = (long )__cil_tmp202;
33966#line 532
33967  tmp___9 = __builtin_expect(__cil_tmp203, 0L);
33968  }
33969#line 532
33970  if (tmp___9) {
33971#line 533
33972    goto out_err0;
33973  } else {
33974
33975  }
33976  {
33977#line 536
33978  __cil_tmp204 = (unsigned long )dev_priv;
33979#line 536
33980  __cil_tmp205 = __cil_tmp204 + 134392;
33981#line 536
33982  __cil_tmp206 = (struct vmw_master *)__cil_tmp205;
33983#line 536
33984  vmw_master_init(__cil_tmp206);
33985#line 537
33986  __cil_tmp207 = (unsigned long )dev_priv;
33987#line 537
33988  __cil_tmp208 = __cil_tmp207 + 134392;
33989#line 537
33990  __cil_tmp209 = (struct ttm_lock *)__cil_tmp208;
33991#line 537
33992  __cil_tmp210 = (bool )0;
33993#line 537
33994  ttm_lock_set_kill(__cil_tmp209, __cil_tmp210, 15);
33995#line 538
33996  __cil_tmp211 = (unsigned long )dev_priv;
33997#line 538
33998  __cil_tmp212 = __cil_tmp211 + 134384;
33999#line 538
34000  __cil_tmp213 = (unsigned long )dev_priv;
34001#line 538
34002  __cil_tmp214 = __cil_tmp213 + 134392;
34003#line 538
34004  *((struct vmw_master **)__cil_tmp212) = (struct vmw_master *)__cil_tmp214;
34005#line 541
34006  __cil_tmp215 = (struct ttm_bo_device *)dev_priv;
34007#line 541
34008  __cil_tmp216 = 0 + 16;
34009#line 541
34010  __cil_tmp217 = 1768 + __cil_tmp216;
34011#line 541
34012  __cil_tmp218 = (unsigned long )dev_priv;
34013#line 541
34014  __cil_tmp219 = __cil_tmp218 + __cil_tmp217;
34015#line 541
34016  __cil_tmp220 = *((void **)__cil_tmp219);
34017#line 541
34018  __cil_tmp221 = (struct ttm_bo_global *)__cil_tmp220;
34019#line 541
34020  __cil_tmp222 = (uint64_t )1048576;
34021#line 541
34022  __cil_tmp223 = (bool )0;
34023#line 541
34024  ret = ttm_bo_device_init(__cil_tmp215, __cil_tmp221, & vmw_bo_driver, __cil_tmp222,
34025                           __cil_tmp223);
34026#line 545
34027  __cil_tmp224 = ret != 0;
34028#line 545
34029  __cil_tmp225 = ! __cil_tmp224;
34030#line 545
34031  __cil_tmp226 = ! __cil_tmp225;
34032#line 545
34033  __cil_tmp227 = (long )__cil_tmp226;
34034#line 545
34035  tmp___10 = __builtin_expect(__cil_tmp227, 0L);
34036  }
34037#line 545
34038  if (tmp___10) {
34039    {
34040#line 546
34041    drm_err("vmw_driver_load", "Failed initializing TTM buffer object driver.\n");
34042    }
34043#line 547
34044    goto out_err1;
34045  } else {
34046
34047  }
34048  {
34049#line 550
34050  __cil_tmp228 = (struct ttm_bo_device *)dev_priv;
34051#line 550
34052  __cil_tmp229 = (unsigned long )dev_priv;
34053#line 550
34054  __cil_tmp230 = __cil_tmp229 + 2112;
34055#line 550
34056  __cil_tmp231 = *((uint32_t *)__cil_tmp230);
34057#line 550
34058  __cil_tmp232 = __cil_tmp231 >> 12;
34059#line 550
34060  __cil_tmp233 = (unsigned long )__cil_tmp232;
34061#line 550
34062  ret = ttm_bo_init_mm(__cil_tmp228, 2U, __cil_tmp233);
34063#line 552
34064  __cil_tmp234 = ret != 0;
34065#line 552
34066  __cil_tmp235 = ! __cil_tmp234;
34067#line 552
34068  __cil_tmp236 = ! __cil_tmp235;
34069#line 552
34070  __cil_tmp237 = (long )__cil_tmp236;
34071#line 552
34072  tmp___11 = __builtin_expect(__cil_tmp237, 0L);
34073  }
34074#line 552
34075  if (tmp___11) {
34076    {
34077#line 553
34078    drm_err("vmw_driver_load", "Failed initializing memory manager for VRAM.\n");
34079    }
34080#line 554
34081    goto out_err2;
34082  } else {
34083
34084  }
34085  {
34086#line 557
34087  __cil_tmp238 = (unsigned long )dev_priv;
34088#line 557
34089  __cil_tmp239 = __cil_tmp238 + 2176;
34090#line 557
34091  *((bool *)__cil_tmp239) = (bool )1;
34092#line 558
34093  __cil_tmp240 = (struct ttm_bo_device *)dev_priv;
34094#line 558
34095  __cil_tmp241 = (unsigned long )dev_priv;
34096#line 558
34097  __cil_tmp242 = __cil_tmp241 + 2164;
34098#line 558
34099  __cil_tmp243 = *((uint32_t *)__cil_tmp242);
34100#line 558
34101  __cil_tmp244 = (unsigned long )__cil_tmp243;
34102#line 558
34103  tmp___12 = ttm_bo_init_mm(__cil_tmp240, 3U, __cil_tmp244);
34104  }
34105#line 558
34106  if (tmp___12 != 0) {
34107    {
34108#line 560
34109    printk("<6>[drm] No GMR memory available. Graphics memory resources are very limited.\n");
34110#line 562
34111    __cil_tmp245 = (unsigned long )dev_priv;
34112#line 562
34113    __cil_tmp246 = __cil_tmp245 + 2176;
34114#line 562
34115    *((bool *)__cil_tmp246) = (bool )0;
34116    }
34117  } else {
34118
34119  }
34120  {
34121#line 565
34122  __cil_tmp247 = (unsigned long )dev_priv;
34123#line 565
34124  __cil_tmp248 = __cil_tmp247 + 2152;
34125#line 565
34126  __cil_tmp249 = (unsigned long )dev_priv;
34127#line 565
34128  __cil_tmp250 = __cil_tmp249 + 2116;
34129#line 565
34130  __cil_tmp251 = *((uint32_t *)__cil_tmp250);
34131#line 565
34132  __cil_tmp252 = (unsigned long )__cil_tmp251;
34133#line 565
34134  __cil_tmp253 = (unsigned long )dev_priv;
34135#line 565
34136  __cil_tmp254 = __cil_tmp253 + 2120;
34137#line 565
34138  __cil_tmp255 = *((uint32_t *)__cil_tmp254);
34139#line 565
34140  __cil_tmp256 = (unsigned long )__cil_tmp255;
34141#line 565
34142  *((int *)__cil_tmp248) = drm_mtrr_add(__cil_tmp252, __cil_tmp256, 1U);
34143#line 568
34144  __cil_tmp257 = (unsigned long )dev_priv;
34145#line 568
34146  __cil_tmp258 = __cil_tmp257 + 2116;
34147#line 568
34148  __cil_tmp259 = *((uint32_t *)__cil_tmp258);
34149#line 568
34150  __cil_tmp260 = (resource_size_t )__cil_tmp259;
34151#line 568
34152  __cil_tmp261 = (unsigned long )dev_priv;
34153#line 568
34154  __cil_tmp262 = __cil_tmp261 + 2120;
34155#line 568
34156  __cil_tmp263 = *((uint32_t *)__cil_tmp262);
34157#line 568
34158  __cil_tmp264 = (unsigned long )__cil_tmp263;
34159#line 568
34160  tmp___13 = ioremap_wc(__cil_tmp260, __cil_tmp264);
34161#line 568
34162  __cil_tmp265 = (unsigned long )dev_priv;
34163#line 568
34164  __cil_tmp266 = __cil_tmp265 + 2144;
34165#line 568
34166  *((__le32 **)__cil_tmp266) = (__le32 *)tmp___13;
34167#line 571
34168  __cil_tmp267 = (void *)0;
34169#line 571
34170  __cil_tmp268 = (unsigned long )__cil_tmp267;
34171#line 571
34172  __cil_tmp269 = (unsigned long )dev_priv;
34173#line 571
34174  __cil_tmp270 = __cil_tmp269 + 2144;
34175#line 571
34176  __cil_tmp271 = *((__le32 **)__cil_tmp270);
34177#line 571
34178  __cil_tmp272 = (unsigned long )__cil_tmp271;
34179#line 571
34180  __cil_tmp273 = __cil_tmp272 == __cil_tmp268;
34181#line 571
34182  __cil_tmp274 = ! __cil_tmp273;
34183#line 571
34184  __cil_tmp275 = ! __cil_tmp274;
34185#line 571
34186  __cil_tmp276 = (long )__cil_tmp275;
34187#line 571
34188  tmp___14 = __builtin_expect(__cil_tmp276, 0L);
34189  }
34190#line 571
34191  if (tmp___14) {
34192    {
34193#line 572
34194    ret = -12;
34195#line 573
34196    drm_err("vmw_driver_load", "Failed mapping MMIO.\n");
34197    }
34198#line 574
34199    goto out_err3;
34200  } else {
34201
34202  }
34203  {
34204#line 578
34205  __cil_tmp277 = (unsigned long )dev_priv;
34206#line 578
34207  __cil_tmp278 = __cil_tmp277 + 2156;
34208#line 578
34209  __cil_tmp279 = *((uint32_t *)__cil_tmp278);
34210#line 578
34211  __cil_tmp280 = __cil_tmp279 & 524288U;
34212#line 578
34213  if (! __cil_tmp280) {
34214    {
34215#line 578
34216    __cil_tmp281 = (unsigned long )dev_priv;
34217#line 578
34218    __cil_tmp282 = __cil_tmp281 + 2156;
34219#line 578
34220    __cil_tmp283 = *((uint32_t *)__cil_tmp282);
34221#line 578
34222    __cil_tmp284 = __cil_tmp283 & 131072U;
34223#line 578
34224    if (! __cil_tmp284) {
34225      {
34226#line 578
34227      tmp___15 = vmw_fifo_have_pitchlock(dev_priv);
34228      }
34229#line 578
34230      if (tmp___15) {
34231
34232      } else {
34233        {
34234#line 581
34235        ret = -38;
34236#line 582
34237        drm_err("vmw_driver_load", "Hardware has no pitchlock\n");
34238        }
34239#line 583
34240        goto out_err4;
34241      }
34242    } else {
34243
34244    }
34245    }
34246  } else {
34247
34248  }
34249  }
34250  {
34251#line 586
34252  __cil_tmp285 = (unsigned long )dev_priv;
34253#line 586
34254  __cil_tmp286 = __cil_tmp285 + 2872;
34255#line 586
34256  __cil_tmp287 = 1816 + 16;
34257#line 586
34258  __cil_tmp288 = (unsigned long )dev_priv;
34259#line 586
34260  __cil_tmp289 = __cil_tmp288 + __cil_tmp287;
34261#line 586
34262  __cil_tmp290 = *((void **)__cil_tmp289);
34263#line 586
34264  __cil_tmp291 = (struct ttm_mem_global *)__cil_tmp290;
34265#line 586
34266  *((struct ttm_object_device **)__cil_tmp286) = ttm_object_device_init(__cil_tmp291,
34267                                                                        12U);
34268#line 589
34269  __cil_tmp292 = (void *)0;
34270#line 589
34271  __cil_tmp293 = (unsigned long )__cil_tmp292;
34272#line 589
34273  __cil_tmp294 = (unsigned long )dev_priv;
34274#line 589
34275  __cil_tmp295 = __cil_tmp294 + 2872;
34276#line 589
34277  __cil_tmp296 = *((struct ttm_object_device **)__cil_tmp295);
34278#line 589
34279  __cil_tmp297 = (unsigned long )__cil_tmp296;
34280#line 589
34281  __cil_tmp298 = __cil_tmp297 == __cil_tmp293;
34282#line 589
34283  __cil_tmp299 = ! __cil_tmp298;
34284#line 589
34285  __cil_tmp300 = ! __cil_tmp299;
34286#line 589
34287  __cil_tmp301 = (long )__cil_tmp300;
34288#line 589
34289  tmp___16 = __builtin_expect(__cil_tmp301, 0L);
34290  }
34291#line 589
34292  if (tmp___16) {
34293    {
34294#line 590
34295    drm_err("vmw_driver_load", "Unable to initialize TTM object management.\n");
34296#line 591
34297    ret = -12;
34298    }
34299#line 592
34300    goto out_err4;
34301  } else {
34302
34303  }
34304  {
34305#line 595
34306  __cil_tmp302 = (unsigned long )dev;
34307#line 595
34308  __cil_tmp303 = __cil_tmp302 + 1064;
34309#line 595
34310  *((void **)__cil_tmp303) = (void *)dev_priv;
34311#line 597
34312  __cil_tmp304 = (unsigned long )dev;
34313#line 597
34314  __cil_tmp305 = __cil_tmp304 + 1016;
34315#line 597
34316  __cil_tmp306 = *((struct pci_dev **)__cil_tmp305);
34317#line 597
34318  ret = (int )pci_request_regions(__cil_tmp306, "vmwgfx probe");
34319#line 598
34320  __cil_tmp307 = (unsigned long )dev_priv;
34321#line 598
34322  __cil_tmp308 = __cil_tmp307 + 134376;
34323#line 598
34324  __cil_tmp309 = ret != 0;
34325#line 598
34326  *((bool *)__cil_tmp308) = (bool )__cil_tmp309;
34327  }
34328  {
34329#line 599
34330  __cil_tmp310 = (unsigned long )dev_priv;
34331#line 599
34332  __cil_tmp311 = __cil_tmp310 + 134376;
34333#line 599
34334  if (*((bool *)__cil_tmp311)) {
34335    {
34336#line 604
34337    printk("<6>[drm] It appears like vesafb is loaded. Ignore above error if any.\n");
34338#line 606
34339    __cil_tmp312 = (unsigned long )dev;
34340#line 606
34341    __cil_tmp313 = __cil_tmp312 + 1016;
34342#line 606
34343    __cil_tmp314 = *((struct pci_dev **)__cil_tmp313);
34344#line 606
34345    ret = (int )pci_request_region(__cil_tmp314, 2, "vmwgfx stealth probe");
34346#line 607
34347    __cil_tmp315 = ret != 0;
34348#line 607
34349    __cil_tmp316 = ! __cil_tmp315;
34350#line 607
34351    __cil_tmp317 = ! __cil_tmp316;
34352#line 607
34353    __cil_tmp318 = (long )__cil_tmp317;
34354#line 607
34355    tmp___17 = __builtin_expect(__cil_tmp318, 0L);
34356    }
34357#line 607
34358    if (tmp___17) {
34359      {
34360#line 608
34361      drm_err("vmw_driver_load", "Failed reserving the SVGA MMIO resource.\n");
34362      }
34363#line 609
34364      goto out_no_device;
34365    } else {
34366
34367    }
34368  } else {
34369
34370  }
34371  }
34372  {
34373#line 613
34374  __cil_tmp319 = (unsigned long )dev_priv;
34375#line 613
34376  __cil_tmp320 = __cil_tmp319 + 3008;
34377#line 613
34378  *((struct vmw_fence_manager **)__cil_tmp320) = vmw_fence_manager_init(dev_priv);
34379#line 614
34380  __cil_tmp321 = (void *)0;
34381#line 614
34382  __cil_tmp322 = (unsigned long )__cil_tmp321;
34383#line 614
34384  __cil_tmp323 = (unsigned long )dev_priv;
34385#line 614
34386  __cil_tmp324 = __cil_tmp323 + 3008;
34387#line 614
34388  __cil_tmp325 = *((struct vmw_fence_manager **)__cil_tmp324);
34389#line 614
34390  __cil_tmp326 = (unsigned long )__cil_tmp325;
34391#line 614
34392  __cil_tmp327 = __cil_tmp326 == __cil_tmp322;
34393#line 614
34394  __cil_tmp328 = ! __cil_tmp327;
34395#line 614
34396  __cil_tmp329 = ! __cil_tmp328;
34397#line 614
34398  __cil_tmp330 = (long )__cil_tmp329;
34399#line 614
34400  tmp___18 = __builtin_expect(__cil_tmp330, 0L);
34401  }
34402#line 614
34403  if (tmp___18) {
34404#line 615
34405    goto out_no_fman;
34406  } else {
34407
34408  }
34409  {
34410#line 618
34411  __cil_tmp331 = (bool )1;
34412#line 618
34413  ret = vmw_3d_resource_inc(dev_priv, __cil_tmp331);
34414#line 619
34415  __cil_tmp332 = ret != 0;
34416#line 619
34417  __cil_tmp333 = ! __cil_tmp332;
34418#line 619
34419  __cil_tmp334 = ! __cil_tmp333;
34420#line 619
34421  __cil_tmp335 = (long )__cil_tmp334;
34422#line 619
34423  tmp___19 = __builtin_expect(__cil_tmp335, 0L);
34424  }
34425#line 619
34426  if (tmp___19) {
34427#line 620
34428    goto out_no_fifo;
34429  } else {
34430
34431  }
34432  {
34433#line 621
34434  vmw_kms_save_vga(dev_priv);
34435#line 624
34436  ret = vmw_kms_init(dev_priv);
34437#line 625
34438  __cil_tmp336 = ret != 0;
34439#line 625
34440  __cil_tmp337 = ! __cil_tmp336;
34441#line 625
34442  __cil_tmp338 = ! __cil_tmp337;
34443#line 625
34444  __cil_tmp339 = (long )__cil_tmp338;
34445#line 625
34446  tmp___20 = __builtin_expect(__cil_tmp339, 0L);
34447  }
34448#line 625
34449  if (tmp___20) {
34450#line 626
34451    goto out_no_kms;
34452  } else {
34453
34454  }
34455  {
34456#line 627
34457  vmw_overlay_init(dev_priv);
34458#line 630
34459  tmp___23 = vmw_fifo_have_3d(dev_priv);
34460  }
34461#line 630
34462  if (tmp___23) {
34463#line 630
34464    tmp___22 = "";
34465  } else {
34466#line 630
34467    tmp___22 = "no ";
34468  }
34469  {
34470#line 630
34471  printk("<6>[drm] Detected %sdevice 3D availability.\n", tmp___22);
34472  }
34473  {
34474#line 635
34475  __cil_tmp340 = (unsigned long )dev_priv;
34476#line 635
34477  __cil_tmp341 = __cil_tmp340 + 134378;
34478#line 635
34479  if (*((bool *)__cil_tmp341)) {
34480    {
34481#line 636
34482    vmw_fb_init(dev_priv);
34483    }
34484  } else {
34485    {
34486#line 638
34487    vmw_kms_restore_vga(dev_priv);
34488#line 639
34489    __cil_tmp342 = (bool )1;
34490#line 639
34491    vmw_3d_resource_dec(dev_priv, __cil_tmp342);
34492    }
34493  }
34494  }
34495  {
34496#line 642
34497  __cil_tmp343 = (unsigned long )dev_priv;
34498#line 642
34499  __cil_tmp344 = __cil_tmp343 + 2156;
34500#line 642
34501  __cil_tmp345 = *((uint32_t *)__cil_tmp344);
34502#line 642
34503  if (__cil_tmp345 & 262144U) {
34504    {
34505#line 643
34506    ret = drm_irq_install(dev);
34507#line 644
34508    __cil_tmp346 = ret != 0;
34509#line 644
34510    __cil_tmp347 = ! __cil_tmp346;
34511#line 644
34512    __cil_tmp348 = ! __cil_tmp347;
34513#line 644
34514    __cil_tmp349 = (long )__cil_tmp348;
34515#line 644
34516    tmp___24 = __builtin_expect(__cil_tmp349, 0L);
34517    }
34518#line 644
34519    if (tmp___24) {
34520      {
34521#line 645
34522      drm_err("vmw_driver_load", "Failed installing irq: %d\n", ret);
34523      }
34524#line 646
34525      goto out_no_irq;
34526    } else {
34527
34528    }
34529  } else {
34530
34531  }
34532  }
34533  {
34534#line 650
34535  __cil_tmp350 = (unsigned long )dev_priv;
34536#line 650
34537  __cil_tmp351 = __cil_tmp350 + 134632;
34538#line 650
34539  *((int (**)(struct notifier_block * , unsigned long  , void * ))__cil_tmp351) = & vmwgfx_pm_notifier;
34540#line 651
34541  __cil_tmp352 = (unsigned long )dev_priv;
34542#line 651
34543  __cil_tmp353 = __cil_tmp352 + 134632;
34544#line 651
34545  __cil_tmp354 = (struct notifier_block *)__cil_tmp353;
34546#line 651
34547  register_pm_notifier(__cil_tmp354);
34548  }
34549#line 653
34550  return (0);
34551  out_no_irq: 
34552  {
34553#line 656
34554  __cil_tmp355 = (unsigned long )dev_priv;
34555#line 656
34556  __cil_tmp356 = __cil_tmp355 + 134378;
34557#line 656
34558  if (*((bool *)__cil_tmp356)) {
34559    {
34560#line 657
34561    vmw_fb_close(dev_priv);
34562    }
34563  } else {
34564
34565  }
34566  }
34567  {
34568#line 658
34569  vmw_overlay_close(dev_priv);
34570#line 659
34571  vmw_kms_close(dev_priv);
34572  }
34573  out_no_kms: 
34574  {
34575#line 662
34576  __cil_tmp357 = (unsigned long )dev_priv;
34577#line 662
34578  __cil_tmp358 = __cil_tmp357 + 134378;
34579#line 662
34580  if (*((bool *)__cil_tmp358)) {
34581    {
34582#line 663
34583    vmw_kms_restore_vga(dev_priv);
34584#line 664
34585    __cil_tmp359 = (bool )0;
34586#line 664
34587    vmw_3d_resource_dec(dev_priv, __cil_tmp359);
34588    }
34589  } else {
34590
34591  }
34592  }
34593  out_no_fifo: 
34594  {
34595#line 667
34596  __cil_tmp360 = (unsigned long )dev_priv;
34597#line 667
34598  __cil_tmp361 = __cil_tmp360 + 3008;
34599#line 667
34600  __cil_tmp362 = *((struct vmw_fence_manager **)__cil_tmp361);
34601#line 667
34602  vmw_fence_manager_takedown(__cil_tmp362);
34603  }
34604  out_no_fman: 
34605  {
34606#line 669
34607  __cil_tmp363 = (unsigned long )dev_priv;
34608#line 669
34609  __cil_tmp364 = __cil_tmp363 + 134376;
34610#line 669
34611  if (*((bool *)__cil_tmp364)) {
34612    {
34613#line 670
34614    __cil_tmp365 = (unsigned long )dev;
34615#line 670
34616    __cil_tmp366 = __cil_tmp365 + 1016;
34617#line 670
34618    __cil_tmp367 = *((struct pci_dev **)__cil_tmp366);
34619#line 670
34620    pci_release_region(__cil_tmp367, 2);
34621    }
34622  } else {
34623    {
34624#line 672
34625    __cil_tmp368 = (unsigned long )dev;
34626#line 672
34627    __cil_tmp369 = __cil_tmp368 + 1016;
34628#line 672
34629    __cil_tmp370 = *((struct pci_dev **)__cil_tmp369);
34630#line 672
34631    pci_release_regions(__cil_tmp370);
34632    }
34633  }
34634  }
34635  out_no_device: 
34636  {
34637#line 674
34638  __cil_tmp371 = (unsigned long )dev_priv;
34639#line 674
34640  __cil_tmp372 = __cil_tmp371 + 2872;
34641#line 674
34642  __cil_tmp373 = (struct ttm_object_device **)__cil_tmp372;
34643#line 674
34644  ttm_object_device_release(__cil_tmp373);
34645  }
34646  out_err4: 
34647  {
34648#line 676
34649  __cil_tmp374 = (unsigned long )dev_priv;
34650#line 676
34651  __cil_tmp375 = __cil_tmp374 + 2144;
34652#line 676
34653  __cil_tmp376 = *((__le32 **)__cil_tmp375);
34654#line 676
34655  __cil_tmp377 = (void volatile   *)__cil_tmp376;
34656#line 676
34657  iounmap(__cil_tmp377);
34658  }
34659  out_err3: 
34660  {
34661#line 678
34662  __cil_tmp378 = (unsigned long )dev_priv;
34663#line 678
34664  __cil_tmp379 = __cil_tmp378 + 2152;
34665#line 678
34666  __cil_tmp380 = *((int *)__cil_tmp379);
34667#line 678
34668  __cil_tmp381 = (unsigned long )dev_priv;
34669#line 678
34670  __cil_tmp382 = __cil_tmp381 + 2116;
34671#line 678
34672  __cil_tmp383 = *((uint32_t *)__cil_tmp382);
34673#line 678
34674  __cil_tmp384 = (unsigned long )__cil_tmp383;
34675#line 678
34676  __cil_tmp385 = (unsigned long )dev_priv;
34677#line 678
34678  __cil_tmp386 = __cil_tmp385 + 2120;
34679#line 678
34680  __cil_tmp387 = *((uint32_t *)__cil_tmp386);
34681#line 678
34682  __cil_tmp388 = (unsigned long )__cil_tmp387;
34683#line 678
34684  drm_mtrr_del(__cil_tmp380, __cil_tmp384, __cil_tmp388, 1U);
34685  }
34686  {
34687#line 680
34688  __cil_tmp389 = (unsigned long )dev_priv;
34689#line 680
34690  __cil_tmp390 = __cil_tmp389 + 2176;
34691#line 680
34692  if (*((bool *)__cil_tmp390)) {
34693    {
34694#line 681
34695    __cil_tmp391 = (struct ttm_bo_device *)dev_priv;
34696#line 681
34697    ttm_bo_clean_mm(__cil_tmp391, 3U);
34698    }
34699  } else {
34700
34701  }
34702  }
34703  {
34704#line 682
34705  __cil_tmp392 = (struct ttm_bo_device *)dev_priv;
34706#line 682
34707  ttm_bo_clean_mm(__cil_tmp392, 2U);
34708  }
34709  out_err2: 
34710  {
34711#line 684
34712  __cil_tmp393 = (struct ttm_bo_device *)dev_priv;
34713#line 684
34714  ttm_bo_device_release(__cil_tmp393);
34715  }
34716  out_err1: 
34717  {
34718#line 686
34719  vmw_ttm_global_release(dev_priv);
34720  }
34721  out_err0: 
34722  {
34723#line 688
34724  __cil_tmp394 = (unsigned long )dev_priv;
34725#line 688
34726  __cil_tmp395 = __cil_tmp394 + 2704;
34727#line 688
34728  __cil_tmp396 = (struct idr *)__cil_tmp395;
34729#line 688
34730  idr_destroy(__cil_tmp396);
34731#line 689
34732  __cil_tmp397 = (unsigned long )dev_priv;
34733#line 689
34734  __cil_tmp398 = __cil_tmp397 + 2656;
34735#line 689
34736  __cil_tmp399 = (struct idr *)__cil_tmp398;
34737#line 689
34738  idr_destroy(__cil_tmp399);
34739#line 690
34740  __cil_tmp400 = (unsigned long )dev_priv;
34741#line 690
34742  __cil_tmp401 = __cil_tmp400 + 2752;
34743#line 690
34744  __cil_tmp402 = (struct idr *)__cil_tmp401;
34745#line 690
34746  idr_destroy(__cil_tmp402);
34747#line 691
34748  __cil_tmp403 = (void    *)dev_priv;
34749#line 691
34750  kfree(__cil_tmp403);
34751  }
34752#line 692
34753  return (ret);
34754}
34755}
34756#line 695 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
34757static int vmw_driver_unload(struct drm_device *dev ) 
34758{ struct vmw_private *dev_priv ;
34759  struct vmw_private *tmp___7 ;
34760  unsigned long __cil_tmp4 ;
34761  unsigned long __cil_tmp5 ;
34762  struct notifier_block *__cil_tmp6 ;
34763  unsigned long __cil_tmp7 ;
34764  unsigned long __cil_tmp8 ;
34765  unsigned long __cil_tmp9 ;
34766  unsigned long __cil_tmp10 ;
34767  unsigned long __cil_tmp11 ;
34768  unsigned long __cil_tmp12 ;
34769  uint32_t *__cil_tmp13 ;
34770  void    *__cil_tmp14 ;
34771  unsigned long __cil_tmp15 ;
34772  unsigned long __cil_tmp16 ;
34773  uint32_t __cil_tmp17 ;
34774  unsigned long __cil_tmp18 ;
34775  unsigned long __cil_tmp19 ;
34776  struct drm_device *__cil_tmp20 ;
34777  unsigned long __cil_tmp21 ;
34778  unsigned long __cil_tmp22 ;
34779  bool __cil_tmp23 ;
34780  unsigned long __cil_tmp24 ;
34781  unsigned long __cil_tmp25 ;
34782  struct vmw_fence_manager *__cil_tmp26 ;
34783  unsigned long __cil_tmp27 ;
34784  unsigned long __cil_tmp28 ;
34785  unsigned long __cil_tmp29 ;
34786  unsigned long __cil_tmp30 ;
34787  struct pci_dev *__cil_tmp31 ;
34788  unsigned long __cil_tmp32 ;
34789  unsigned long __cil_tmp33 ;
34790  struct pci_dev *__cil_tmp34 ;
34791  unsigned long __cil_tmp35 ;
34792  unsigned long __cil_tmp36 ;
34793  struct ttm_object_device **__cil_tmp37 ;
34794  unsigned long __cil_tmp38 ;
34795  unsigned long __cil_tmp39 ;
34796  __le32 *__cil_tmp40 ;
34797  void volatile   *__cil_tmp41 ;
34798  unsigned long __cil_tmp42 ;
34799  unsigned long __cil_tmp43 ;
34800  int __cil_tmp44 ;
34801  unsigned long __cil_tmp45 ;
34802  unsigned long __cil_tmp46 ;
34803  uint32_t __cil_tmp47 ;
34804  unsigned long __cil_tmp48 ;
34805  unsigned long __cil_tmp49 ;
34806  unsigned long __cil_tmp50 ;
34807  uint32_t __cil_tmp51 ;
34808  unsigned long __cil_tmp52 ;
34809  unsigned long __cil_tmp53 ;
34810  unsigned long __cil_tmp54 ;
34811  struct ttm_bo_device *__cil_tmp55 ;
34812  struct ttm_bo_device *__cil_tmp56 ;
34813  struct ttm_bo_device *__cil_tmp57 ;
34814  unsigned long __cil_tmp58 ;
34815  unsigned long __cil_tmp59 ;
34816  struct idr *__cil_tmp60 ;
34817  unsigned long __cil_tmp61 ;
34818  unsigned long __cil_tmp62 ;
34819  struct idr *__cil_tmp63 ;
34820  unsigned long __cil_tmp64 ;
34821  unsigned long __cil_tmp65 ;
34822  struct idr *__cil_tmp66 ;
34823  void    *__cil_tmp67 ;
34824
34825  {
34826  {
34827#line 697
34828  tmp___7 = vmw_priv(dev);
34829#line 697
34830  dev_priv = tmp___7;
34831#line 699
34832  __cil_tmp4 = (unsigned long )dev_priv;
34833#line 699
34834  __cil_tmp5 = __cil_tmp4 + 134632;
34835#line 699
34836  __cil_tmp6 = (struct notifier_block *)__cil_tmp5;
34837#line 699
34838  unregister_pm_notifier(__cil_tmp6);
34839  }
34840  {
34841#line 701
34842  __cil_tmp7 = 3032 + 131200;
34843#line 701
34844  __cil_tmp8 = (unsigned long )dev_priv;
34845#line 701
34846  __cil_tmp9 = __cil_tmp8 + __cil_tmp7;
34847#line 701
34848  if (*((uint32_t **)__cil_tmp9)) {
34849    {
34850#line 702
34851    __cil_tmp10 = 3032 + 131200;
34852#line 702
34853    __cil_tmp11 = (unsigned long )dev_priv;
34854#line 702
34855    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
34856#line 702
34857    __cil_tmp13 = *((uint32_t **)__cil_tmp12);
34858#line 702
34859    __cil_tmp14 = (void    *)__cil_tmp13;
34860#line 702
34861    vfree(__cil_tmp14);
34862    }
34863  } else {
34864
34865  }
34866  }
34867  {
34868#line 703
34869  __cil_tmp15 = (unsigned long )dev_priv;
34870#line 703
34871  __cil_tmp16 = __cil_tmp15 + 2156;
34872#line 703
34873  __cil_tmp17 = *((uint32_t *)__cil_tmp16);
34874#line 703
34875  if (__cil_tmp17 & 262144U) {
34876    {
34877#line 704
34878    __cil_tmp18 = (unsigned long )dev_priv;
34879#line 704
34880    __cil_tmp19 = __cil_tmp18 + 2088;
34881#line 704
34882    __cil_tmp20 = *((struct drm_device **)__cil_tmp19);
34883#line 704
34884    drm_irq_uninstall(__cil_tmp20);
34885    }
34886  } else {
34887
34888  }
34889  }
34890  {
34891#line 705
34892  __cil_tmp21 = (unsigned long )dev_priv;
34893#line 705
34894  __cil_tmp22 = __cil_tmp21 + 134378;
34895#line 705
34896  if (*((bool *)__cil_tmp22)) {
34897    {
34898#line 706
34899    vmw_fb_close(dev_priv);
34900#line 707
34901    vmw_kms_restore_vga(dev_priv);
34902#line 708
34903    __cil_tmp23 = (bool )0;
34904#line 708
34905    vmw_3d_resource_dec(dev_priv, __cil_tmp23);
34906    }
34907  } else {
34908
34909  }
34910  }
34911  {
34912#line 710
34913  vmw_kms_close(dev_priv);
34914#line 711
34915  vmw_overlay_close(dev_priv);
34916#line 712
34917  __cil_tmp24 = (unsigned long )dev_priv;
34918#line 712
34919  __cil_tmp25 = __cil_tmp24 + 3008;
34920#line 712
34921  __cil_tmp26 = *((struct vmw_fence_manager **)__cil_tmp25);
34922#line 712
34923  vmw_fence_manager_takedown(__cil_tmp26);
34924  }
34925  {
34926#line 713
34927  __cil_tmp27 = (unsigned long )dev_priv;
34928#line 713
34929  __cil_tmp28 = __cil_tmp27 + 134376;
34930#line 713
34931  if (*((bool *)__cil_tmp28)) {
34932    {
34933#line 714
34934    __cil_tmp29 = (unsigned long )dev;
34935#line 714
34936    __cil_tmp30 = __cil_tmp29 + 1016;
34937#line 714
34938    __cil_tmp31 = *((struct pci_dev **)__cil_tmp30);
34939#line 714
34940    pci_release_region(__cil_tmp31, 2);
34941    }
34942  } else {
34943    {
34944#line 716
34945    __cil_tmp32 = (unsigned long )dev;
34946#line 716
34947    __cil_tmp33 = __cil_tmp32 + 1016;
34948#line 716
34949    __cil_tmp34 = *((struct pci_dev **)__cil_tmp33);
34950#line 716
34951    pci_release_regions(__cil_tmp34);
34952    }
34953  }
34954  }
34955  {
34956#line 718
34957  __cil_tmp35 = (unsigned long )dev_priv;
34958#line 718
34959  __cil_tmp36 = __cil_tmp35 + 2872;
34960#line 718
34961  __cil_tmp37 = (struct ttm_object_device **)__cil_tmp36;
34962#line 718
34963  ttm_object_device_release(__cil_tmp37);
34964#line 719
34965  __cil_tmp38 = (unsigned long )dev_priv;
34966#line 719
34967  __cil_tmp39 = __cil_tmp38 + 2144;
34968#line 719
34969  __cil_tmp40 = *((__le32 **)__cil_tmp39);
34970#line 719
34971  __cil_tmp41 = (void volatile   *)__cil_tmp40;
34972#line 719
34973  iounmap(__cil_tmp41);
34974#line 720
34975  __cil_tmp42 = (unsigned long )dev_priv;
34976#line 720
34977  __cil_tmp43 = __cil_tmp42 + 2152;
34978#line 720
34979  __cil_tmp44 = *((int *)__cil_tmp43);
34980#line 720
34981  __cil_tmp45 = (unsigned long )dev_priv;
34982#line 720
34983  __cil_tmp46 = __cil_tmp45 + 2116;
34984#line 720
34985  __cil_tmp47 = *((uint32_t *)__cil_tmp46);
34986#line 720
34987  __cil_tmp48 = (unsigned long )__cil_tmp47;
34988#line 720
34989  __cil_tmp49 = (unsigned long )dev_priv;
34990#line 720
34991  __cil_tmp50 = __cil_tmp49 + 2120;
34992#line 720
34993  __cil_tmp51 = *((uint32_t *)__cil_tmp50);
34994#line 720
34995  __cil_tmp52 = (unsigned long )__cil_tmp51;
34996#line 720
34997  drm_mtrr_del(__cil_tmp44, __cil_tmp48, __cil_tmp52, 1U);
34998  }
34999  {
35000#line 722
35001  __cil_tmp53 = (unsigned long )dev_priv;
35002#line 722
35003  __cil_tmp54 = __cil_tmp53 + 2176;
35004#line 722
35005  if (*((bool *)__cil_tmp54)) {
35006    {
35007#line 723
35008    __cil_tmp55 = (struct ttm_bo_device *)dev_priv;
35009#line 723
35010    ttm_bo_clean_mm(__cil_tmp55, 3U);
35011    }
35012  } else {
35013
35014  }
35015  }
35016  {
35017#line 724
35018  __cil_tmp56 = (struct ttm_bo_device *)dev_priv;
35019#line 724
35020  ttm_bo_clean_mm(__cil_tmp56, 2U);
35021#line 725
35022  __cil_tmp57 = (struct ttm_bo_device *)dev_priv;
35023#line 725
35024  ttm_bo_device_release(__cil_tmp57);
35025#line 726
35026  vmw_ttm_global_release(dev_priv);
35027#line 727
35028  __cil_tmp58 = (unsigned long )dev_priv;
35029#line 727
35030  __cil_tmp59 = __cil_tmp58 + 2704;
35031#line 727
35032  __cil_tmp60 = (struct idr *)__cil_tmp59;
35033#line 727
35034  idr_destroy(__cil_tmp60);
35035#line 728
35036  __cil_tmp61 = (unsigned long )dev_priv;
35037#line 728
35038  __cil_tmp62 = __cil_tmp61 + 2656;
35039#line 728
35040  __cil_tmp63 = (struct idr *)__cil_tmp62;
35041#line 728
35042  idr_destroy(__cil_tmp63);
35043#line 729
35044  __cil_tmp64 = (unsigned long )dev_priv;
35045#line 729
35046  __cil_tmp65 = __cil_tmp64 + 2752;
35047#line 729
35048  __cil_tmp66 = (struct idr *)__cil_tmp65;
35049#line 729
35050  idr_destroy(__cil_tmp66);
35051#line 731
35052  __cil_tmp67 = (void    *)dev_priv;
35053#line 731
35054  kfree(__cil_tmp67);
35055  }
35056#line 733
35057  return (0);
35058}
35059}
35060#line 736 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35061static void vmw_preclose(struct drm_device *dev , struct drm_file *file_priv ) 
35062{ struct vmw_fpriv *vmw_fp ;
35063  struct vmw_fpriv *tmp___7 ;
35064  struct vmw_private *dev_priv ;
35065  struct vmw_private *tmp___8 ;
35066  unsigned long __cil_tmp7 ;
35067  unsigned long __cil_tmp8 ;
35068  struct vmw_fence_manager *__cil_tmp9 ;
35069  unsigned long __cil_tmp10 ;
35070  unsigned long __cil_tmp11 ;
35071  struct list_head *__cil_tmp12 ;
35072
35073  {
35074  {
35075#line 739
35076  tmp___7 = vmw_fpriv(file_priv);
35077#line 739
35078  vmw_fp = tmp___7;
35079#line 740
35080  tmp___8 = vmw_priv(dev);
35081#line 740
35082  dev_priv = tmp___8;
35083#line 742
35084  __cil_tmp7 = (unsigned long )dev_priv;
35085#line 742
35086  __cil_tmp8 = __cil_tmp7 + 3008;
35087#line 742
35088  __cil_tmp9 = *((struct vmw_fence_manager **)__cil_tmp8);
35089#line 742
35090  __cil_tmp10 = (unsigned long )vmw_fp;
35091#line 742
35092  __cil_tmp11 = __cil_tmp10 + 16;
35093#line 742
35094  __cil_tmp12 = (struct list_head *)__cil_tmp11;
35095#line 742
35096  vmw_event_fence_fpriv_gone(__cil_tmp9, __cil_tmp12);
35097  }
35098#line 743
35099  return;
35100}
35101}
35102#line 745 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35103static void vmw_postclose(struct drm_device *dev , struct drm_file *file_priv ) 
35104{ struct vmw_fpriv *vmw_fp ;
35105  unsigned long __cil_tmp4 ;
35106  unsigned long __cil_tmp5 ;
35107  struct ttm_object_file **__cil_tmp6 ;
35108  struct drm_master **__cil_tmp7 ;
35109  void    *__cil_tmp8 ;
35110
35111  {
35112  {
35113#line 750
35114  vmw_fp = vmw_fpriv(file_priv);
35115#line 751
35116  __cil_tmp4 = (unsigned long )vmw_fp;
35117#line 751
35118  __cil_tmp5 = __cil_tmp4 + 8;
35119#line 751
35120  __cil_tmp6 = (struct ttm_object_file **)__cil_tmp5;
35121#line 751
35122  ttm_object_file_release(__cil_tmp6);
35123  }
35124#line 752
35125  if (*((struct drm_master **)vmw_fp)) {
35126    {
35127#line 753
35128    __cil_tmp7 = (struct drm_master **)vmw_fp;
35129#line 753
35130    drm_master_put(__cil_tmp7);
35131    }
35132  } else {
35133
35134  }
35135  {
35136#line 754
35137  __cil_tmp8 = (void    *)vmw_fp;
35138#line 754
35139  kfree(__cil_tmp8);
35140  }
35141#line 755
35142  return;
35143}
35144}
35145#line 757 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35146static int vmw_driver_open(struct drm_device *dev , struct drm_file *file_priv ) 
35147{ struct vmw_private *dev_priv ;
35148  struct vmw_private *tmp___7 ;
35149  struct vmw_fpriv *vmw_fp ;
35150  int ret ;
35151  void *tmp___8 ;
35152  long tmp___9 ;
35153  long tmp___10 ;
35154  long tmp___11 ;
35155  void *__cil_tmp11 ;
35156  unsigned long __cil_tmp12 ;
35157  unsigned long __cil_tmp13 ;
35158  int __cil_tmp14 ;
35159  int __cil_tmp15 ;
35160  int __cil_tmp16 ;
35161  long __cil_tmp17 ;
35162  unsigned long __cil_tmp18 ;
35163  unsigned long __cil_tmp19 ;
35164  struct list_head *__cil_tmp20 ;
35165  unsigned long __cil_tmp21 ;
35166  unsigned long __cil_tmp22 ;
35167  unsigned long __cil_tmp23 ;
35168  unsigned long __cil_tmp24 ;
35169  struct ttm_object_device *__cil_tmp25 ;
35170  void *__cil_tmp26 ;
35171  unsigned long __cil_tmp27 ;
35172  unsigned long __cil_tmp28 ;
35173  unsigned long __cil_tmp29 ;
35174  struct ttm_object_file *__cil_tmp30 ;
35175  unsigned long __cil_tmp31 ;
35176  int __cil_tmp32 ;
35177  int __cil_tmp33 ;
35178  int __cil_tmp34 ;
35179  long __cil_tmp35 ;
35180  unsigned long __cil_tmp36 ;
35181  unsigned long __cil_tmp37 ;
35182  void *__cil_tmp38 ;
35183  unsigned long __cil_tmp39 ;
35184  unsigned long __cil_tmp40 ;
35185  unsigned long __cil_tmp41 ;
35186  unsigned long __cil_tmp42 ;
35187  struct address_space *__cil_tmp43 ;
35188  unsigned long __cil_tmp44 ;
35189  int __cil_tmp45 ;
35190  int __cil_tmp46 ;
35191  int __cil_tmp47 ;
35192  long __cil_tmp48 ;
35193  unsigned long __cil_tmp49 ;
35194  unsigned long __cil_tmp50 ;
35195  unsigned long __cil_tmp51 ;
35196  unsigned long __cil_tmp52 ;
35197  unsigned long __cil_tmp53 ;
35198  unsigned long __cil_tmp54 ;
35199  struct file *__cil_tmp55 ;
35200  unsigned long __cil_tmp56 ;
35201  unsigned long __cil_tmp57 ;
35202  struct dentry *__cil_tmp58 ;
35203  unsigned long __cil_tmp59 ;
35204  unsigned long __cil_tmp60 ;
35205  struct inode *__cil_tmp61 ;
35206  unsigned long __cil_tmp62 ;
35207  unsigned long __cil_tmp63 ;
35208  void    *__cil_tmp64 ;
35209
35210  {
35211  {
35212#line 759
35213  tmp___7 = vmw_priv(dev);
35214#line 759
35215  dev_priv = tmp___7;
35216#line 761
35217  ret = -12;
35218#line 763
35219  tmp___8 = kzalloc(32UL, 208U);
35220#line 763
35221  vmw_fp = (struct vmw_fpriv *)tmp___8;
35222#line 764
35223  __cil_tmp11 = (void *)0;
35224#line 764
35225  __cil_tmp12 = (unsigned long )__cil_tmp11;
35226#line 764
35227  __cil_tmp13 = (unsigned long )vmw_fp;
35228#line 764
35229  __cil_tmp14 = __cil_tmp13 == __cil_tmp12;
35230#line 764
35231  __cil_tmp15 = ! __cil_tmp14;
35232#line 764
35233  __cil_tmp16 = ! __cil_tmp15;
35234#line 764
35235  __cil_tmp17 = (long )__cil_tmp16;
35236#line 764
35237  tmp___9 = __builtin_expect(__cil_tmp17, 0L);
35238  }
35239#line 764
35240  if (tmp___9) {
35241#line 765
35242    return (ret);
35243  } else {
35244
35245  }
35246  {
35247#line 767
35248  __cil_tmp18 = (unsigned long )vmw_fp;
35249#line 767
35250  __cil_tmp19 = __cil_tmp18 + 16;
35251#line 767
35252  __cil_tmp20 = (struct list_head *)__cil_tmp19;
35253#line 767
35254  INIT_LIST_HEAD(__cil_tmp20);
35255#line 768
35256  __cil_tmp21 = (unsigned long )vmw_fp;
35257#line 768
35258  __cil_tmp22 = __cil_tmp21 + 8;
35259#line 768
35260  __cil_tmp23 = (unsigned long )dev_priv;
35261#line 768
35262  __cil_tmp24 = __cil_tmp23 + 2872;
35263#line 768
35264  __cil_tmp25 = *((struct ttm_object_device **)__cil_tmp24);
35265#line 768
35266  *((struct ttm_object_file **)__cil_tmp22) = ttm_object_file_init(__cil_tmp25, 10U);
35267#line 769
35268  __cil_tmp26 = (void *)0;
35269#line 769
35270  __cil_tmp27 = (unsigned long )__cil_tmp26;
35271#line 769
35272  __cil_tmp28 = (unsigned long )vmw_fp;
35273#line 769
35274  __cil_tmp29 = __cil_tmp28 + 8;
35275#line 769
35276  __cil_tmp30 = *((struct ttm_object_file **)__cil_tmp29);
35277#line 769
35278  __cil_tmp31 = (unsigned long )__cil_tmp30;
35279#line 769
35280  __cil_tmp32 = __cil_tmp31 == __cil_tmp27;
35281#line 769
35282  __cil_tmp33 = ! __cil_tmp32;
35283#line 769
35284  __cil_tmp34 = ! __cil_tmp33;
35285#line 769
35286  __cil_tmp35 = (long )__cil_tmp34;
35287#line 769
35288  tmp___10 = __builtin_expect(__cil_tmp35, 0L);
35289  }
35290#line 769
35291  if (tmp___10) {
35292#line 770
35293    goto out_no_tfile;
35294  } else {
35295
35296  }
35297  {
35298#line 772
35299  __cil_tmp36 = (unsigned long )file_priv;
35300#line 772
35301  __cil_tmp37 = __cil_tmp36 + 136;
35302#line 772
35303  *((void **)__cil_tmp37) = (void *)vmw_fp;
35304#line 774
35305  __cil_tmp38 = (void *)0;
35306#line 774
35307  __cil_tmp39 = (unsigned long )__cil_tmp38;
35308#line 774
35309  __cil_tmp40 = 0 + 1640;
35310#line 774
35311  __cil_tmp41 = (unsigned long )dev_priv;
35312#line 774
35313  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
35314#line 774
35315  __cil_tmp43 = *((struct address_space **)__cil_tmp42);
35316#line 774
35317  __cil_tmp44 = (unsigned long )__cil_tmp43;
35318#line 774
35319  __cil_tmp45 = __cil_tmp44 == __cil_tmp39;
35320#line 774
35321  __cil_tmp46 = ! __cil_tmp45;
35322#line 774
35323  __cil_tmp47 = ! __cil_tmp46;
35324#line 774
35325  __cil_tmp48 = (long )__cil_tmp47;
35326#line 774
35327  tmp___11 = __builtin_expect(__cil_tmp48, 0L);
35328  }
35329#line 774
35330  if (tmp___11) {
35331#line 775
35332    __cil_tmp49 = 0 + 1640;
35333#line 775
35334    __cil_tmp50 = (unsigned long )dev_priv;
35335#line 775
35336    __cil_tmp51 = __cil_tmp50 + __cil_tmp49;
35337#line 775
35338    __cil_tmp52 = 16 + 8;
35339#line 775
35340    __cil_tmp53 = (unsigned long )file_priv;
35341#line 775
35342    __cil_tmp54 = __cil_tmp53 + 128;
35343#line 775
35344    __cil_tmp55 = *((struct file **)__cil_tmp54);
35345#line 775
35346    __cil_tmp56 = (unsigned long )__cil_tmp55;
35347#line 775
35348    __cil_tmp57 = __cil_tmp56 + __cil_tmp52;
35349#line 775
35350    __cil_tmp58 = *((struct dentry **)__cil_tmp57);
35351#line 775
35352    __cil_tmp59 = (unsigned long )__cil_tmp58;
35353#line 775
35354    __cil_tmp60 = __cil_tmp59 + 48;
35355#line 775
35356    __cil_tmp61 = *((struct inode **)__cil_tmp60);
35357#line 775
35358    __cil_tmp62 = (unsigned long )__cil_tmp61;
35359#line 775
35360    __cil_tmp63 = __cil_tmp62 + 48;
35361#line 775
35362    *((struct address_space **)__cil_tmp51) = *((struct address_space **)__cil_tmp63);
35363  } else {
35364
35365  }
35366#line 778
35367  return (0);
35368  out_no_tfile: 
35369  {
35370#line 781
35371  __cil_tmp64 = (void    *)vmw_fp;
35372#line 781
35373  kfree(__cil_tmp64);
35374  }
35375#line 782
35376  return (ret);
35377}
35378}
35379#line 785 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35380static long vmw_unlocked_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) 
35381{ struct drm_file *file_priv ;
35382  struct drm_device *dev ;
35383  unsigned int nr ;
35384  struct drm_ioctl_desc *ioctl ;
35385  long tmp___7 ;
35386  long tmp___8 ;
35387  unsigned long __cil_tmp10 ;
35388  unsigned long __cil_tmp11 ;
35389  void *__cil_tmp12 ;
35390  unsigned long __cil_tmp13 ;
35391  unsigned long __cil_tmp14 ;
35392  struct drm_minor *__cil_tmp15 ;
35393  unsigned long __cil_tmp16 ;
35394  unsigned long __cil_tmp17 ;
35395  int __cil_tmp18 ;
35396  int __cil_tmp19 ;
35397  unsigned int __cil_tmp20 ;
35398  unsigned long __cil_tmp21 ;
35399  unsigned long __cil_tmp22 ;
35400  struct drm_driver *__cil_tmp23 ;
35401  unsigned long __cil_tmp24 ;
35402  unsigned long __cil_tmp25 ;
35403  int __cil_tmp26 ;
35404  int __cil_tmp27 ;
35405  unsigned int __cil_tmp28 ;
35406  unsigned int __cil_tmp29 ;
35407  unsigned long __cil_tmp30 ;
35408  unsigned long __cil_tmp31 ;
35409  unsigned long __cil_tmp32 ;
35410  unsigned long __cil_tmp33 ;
35411  unsigned int __cil_tmp34 ;
35412  int __cil_tmp35 ;
35413  int __cil_tmp36 ;
35414  int __cil_tmp37 ;
35415  long __cil_tmp38 ;
35416  unsigned int __cil_tmp39 ;
35417
35418  {
35419#line 788
35420  __cil_tmp10 = (unsigned long )filp;
35421#line 788
35422  __cil_tmp11 = __cil_tmp10 + 200;
35423#line 788
35424  __cil_tmp12 = *((void **)__cil_tmp11);
35425#line 788
35426  file_priv = (struct drm_file *)__cil_tmp12;
35427#line 789
35428  __cil_tmp13 = (unsigned long )file_priv;
35429#line 789
35430  __cil_tmp14 = __cil_tmp13 + 40;
35431#line 789
35432  __cil_tmp15 = *((struct drm_minor **)__cil_tmp14);
35433#line 789
35434  __cil_tmp16 = (unsigned long )__cil_tmp15;
35435#line 789
35436  __cil_tmp17 = __cil_tmp16 + 784;
35437#line 789
35438  dev = *((struct drm_device **)__cil_tmp17);
35439#line 790
35440  __cil_tmp18 = 1 << 8;
35441#line 790
35442  __cil_tmp19 = __cil_tmp18 - 1;
35443#line 790
35444  __cil_tmp20 = (unsigned int )__cil_tmp19;
35445#line 790
35446  nr = cmd & __cil_tmp20;
35447#line 796
35448  if (nr >= 64U) {
35449#line 796
35450    if (nr < 160U) {
35451      {
35452#line 796
35453      __cil_tmp21 = (unsigned long )dev;
35454#line 796
35455      __cil_tmp22 = __cil_tmp21 + 1112;
35456#line 796
35457      __cil_tmp23 = *((struct drm_driver **)__cil_tmp22);
35458#line 796
35459      __cil_tmp24 = (unsigned long )__cil_tmp23;
35460#line 796
35461      __cil_tmp25 = __cil_tmp24 + 416;
35462#line 796
35463      __cil_tmp26 = *((int *)__cil_tmp25);
35464#line 796
35465      __cil_tmp27 = 64 + __cil_tmp26;
35466#line 796
35467      __cil_tmp28 = (unsigned int )__cil_tmp27;
35468#line 796
35469      if (nr < __cil_tmp28) {
35470        {
35471#line 798
35472        __cil_tmp29 = nr - 64U;
35473#line 798
35474        __cil_tmp30 = __cil_tmp29 * 24UL;
35475#line 798
35476        __cil_tmp31 = (unsigned long )(vmw_ioctls) + __cil_tmp30;
35477#line 798
35478        ioctl = (struct drm_ioctl_desc *)__cil_tmp31;
35479#line 801
35480        __cil_tmp32 = (unsigned long )ioctl;
35481#line 801
35482        __cil_tmp33 = __cil_tmp32 + 16;
35483#line 801
35484        __cil_tmp34 = *((unsigned int *)__cil_tmp33);
35485#line 801
35486        __cil_tmp35 = __cil_tmp34 != cmd;
35487#line 801
35488        __cil_tmp36 = ! __cil_tmp35;
35489#line 801
35490        __cil_tmp37 = ! __cil_tmp36;
35491#line 801
35492        __cil_tmp38 = (long )__cil_tmp37;
35493#line 801
35494        tmp___7 = __builtin_expect(__cil_tmp38, 0L);
35495        }
35496#line 801
35497        if (tmp___7) {
35498          {
35499#line 802
35500          __cil_tmp39 = nr - 64U;
35501#line 802
35502          drm_err("vmw_unlocked_ioctl", "Invalid command format, ioctl %d\n", __cil_tmp39);
35503          }
35504#line 804
35505          return (-22L);
35506        } else {
35507
35508        }
35509      } else {
35510
35511      }
35512      }
35513    } else {
35514
35515    }
35516  } else {
35517
35518  }
35519  {
35520#line 808
35521  tmp___8 = drm_ioctl(filp, cmd, arg);
35522  }
35523#line 808
35524  return (tmp___8);
35525}
35526}
35527#line 811 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35528static int vmw_firstopen(struct drm_device *dev ) 
35529{ struct vmw_private *dev_priv ;
35530  struct vmw_private *tmp___7 ;
35531  unsigned long __cil_tmp4 ;
35532  unsigned long __cil_tmp5 ;
35533
35534  {
35535  {
35536#line 813
35537  tmp___7 = vmw_priv(dev);
35538#line 813
35539  dev_priv = tmp___7;
35540#line 814
35541  __cil_tmp4 = (unsigned long )dev_priv;
35542#line 814
35543  __cil_tmp5 = __cil_tmp4 + 134377;
35544#line 814
35545  *((bool *)__cil_tmp5) = (bool )1;
35546  }
35547#line 816
35548  return (0);
35549}
35550}
35551#line 819 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35552static void vmw_lastclose(struct drm_device *dev ) 
35553{ struct vmw_private *dev_priv ;
35554  struct vmw_private *tmp___7 ;
35555  struct drm_crtc *crtc ;
35556  struct drm_mode_set set ;
35557  int ret ;
35558  struct list_head    *__mptr ;
35559  struct list_head    *__mptr___0 ;
35560  int __ret_warn_on ;
35561  long tmp___8 ;
35562  unsigned long __cil_tmp11 ;
35563  unsigned long __cil_tmp12 ;
35564  bool __cil_tmp13 ;
35565  unsigned long __cil_tmp14 ;
35566  unsigned long __cil_tmp15 ;
35567  unsigned long __cil_tmp16 ;
35568  unsigned long __cil_tmp17 ;
35569  unsigned long __cil_tmp18 ;
35570  void *__cil_tmp19 ;
35571  unsigned long __cil_tmp20 ;
35572  void *__cil_tmp21 ;
35573  unsigned long __cil_tmp22 ;
35574  void *__cil_tmp23 ;
35575  unsigned long __cil_tmp24 ;
35576  unsigned long __cil_tmp25 ;
35577  unsigned long __cil_tmp26 ;
35578  unsigned long __cil_tmp27 ;
35579  struct list_head *__cil_tmp28 ;
35580  struct drm_crtc *__cil_tmp29 ;
35581  unsigned long __cil_tmp30 ;
35582  unsigned long __cil_tmp31 ;
35583  struct list_head *__cil_tmp32 ;
35584  unsigned int __cil_tmp33 ;
35585  char *__cil_tmp34 ;
35586  char *__cil_tmp35 ;
35587  unsigned long __cil_tmp36 ;
35588  unsigned long __cil_tmp37 ;
35589  unsigned long __cil_tmp38 ;
35590  struct list_head *__cil_tmp39 ;
35591  unsigned long __cil_tmp40 ;
35592  unsigned long __cil_tmp41 ;
35593  unsigned long __cil_tmp42 ;
35594  struct list_head *__cil_tmp43 ;
35595  unsigned long __cil_tmp44 ;
35596  unsigned long __cil_tmp45 ;
35597  unsigned long __cil_tmp46 ;
35598  unsigned long __cil_tmp47 ;
35599  struct drm_crtc_funcs    *__cil_tmp48 ;
35600  unsigned long __cil_tmp49 ;
35601  unsigned long __cil_tmp50 ;
35602  int (*   __cil_tmp51)(struct drm_mode_set *set ) ;
35603  int (*__cil_tmp52)(struct drm_mode_set *set ) ;
35604  int __cil_tmp53 ;
35605  int __cil_tmp54 ;
35606  int __cil_tmp55 ;
35607  int __cil_tmp56 ;
35608  long __cil_tmp57 ;
35609  int    __cil_tmp58 ;
35610  int __cil_tmp59 ;
35611  int __cil_tmp60 ;
35612  long __cil_tmp61 ;
35613  unsigned long __cil_tmp62 ;
35614  unsigned long __cil_tmp63 ;
35615  struct list_head *__cil_tmp64 ;
35616  struct drm_crtc *__cil_tmp65 ;
35617  unsigned long __cil_tmp66 ;
35618  unsigned long __cil_tmp67 ;
35619  struct list_head *__cil_tmp68 ;
35620  unsigned int __cil_tmp69 ;
35621  char *__cil_tmp70 ;
35622  char *__cil_tmp71 ;
35623
35624  {
35625  {
35626#line 821
35627  tmp___7 = vmw_priv(dev);
35628#line 821
35629  dev_priv = tmp___7;
35630  }
35631  {
35632#line 830
35633  __cil_tmp11 = (unsigned long )dev_priv;
35634#line 830
35635  __cil_tmp12 = __cil_tmp11 + 134377;
35636#line 830
35637  __cil_tmp13 = *((bool *)__cil_tmp12);
35638#line 830
35639  if (! __cil_tmp13) {
35640#line 831
35641    return;
35642  } else {
35643
35644  }
35645  }
35646#line 833
35647  __cil_tmp14 = (unsigned long )dev_priv;
35648#line 833
35649  __cil_tmp15 = __cil_tmp14 + 134377;
35650#line 833
35651  *((bool *)__cil_tmp15) = (bool )0;
35652#line 834
35653  __cil_tmp16 = (unsigned long )(& set) + 40;
35654#line 834
35655  *((uint32_t *)__cil_tmp16) = (uint32_t )0;
35656#line 835
35657  __cil_tmp17 = (unsigned long )(& set) + 44;
35658#line 835
35659  *((uint32_t *)__cil_tmp17) = (uint32_t )0;
35660#line 836
35661  __cil_tmp18 = (unsigned long )(& set) + 16;
35662#line 836
35663  __cil_tmp19 = (void *)0;
35664#line 836
35665  *((struct drm_framebuffer **)__cil_tmp18) = (struct drm_framebuffer *)__cil_tmp19;
35666#line 837
35667  __cil_tmp20 = (unsigned long )(& set) + 32;
35668#line 837
35669  __cil_tmp21 = (void *)0;
35670#line 837
35671  *((struct drm_display_mode **)__cil_tmp20) = (struct drm_display_mode *)__cil_tmp21;
35672#line 838
35673  __cil_tmp22 = (unsigned long )(& set) + 48;
35674#line 838
35675  __cil_tmp23 = (void *)0;
35676#line 838
35677  *((struct drm_connector ***)__cil_tmp22) = (struct drm_connector **)__cil_tmp23;
35678#line 839
35679  __cil_tmp24 = (unsigned long )(& set) + 56;
35680#line 839
35681  *((size_t *)__cil_tmp24) = (size_t )0;
35682#line 841
35683  __cil_tmp25 = 1152 + 296;
35684#line 841
35685  __cil_tmp26 = (unsigned long )dev;
35686#line 841
35687  __cil_tmp27 = __cil_tmp26 + __cil_tmp25;
35688#line 841
35689  __cil_tmp28 = *((struct list_head **)__cil_tmp27);
35690#line 841
35691  __mptr = (struct list_head    *)__cil_tmp28;
35692#line 841
35693  __cil_tmp29 = (struct drm_crtc *)0;
35694#line 841
35695  __cil_tmp30 = (unsigned long )__cil_tmp29;
35696#line 841
35697  __cil_tmp31 = __cil_tmp30 + 8;
35698#line 841
35699  __cil_tmp32 = (struct list_head *)__cil_tmp31;
35700#line 841
35701  __cil_tmp33 = (unsigned int )__cil_tmp32;
35702#line 841
35703  __cil_tmp34 = (char *)__mptr;
35704#line 841
35705  __cil_tmp35 = __cil_tmp34 - __cil_tmp33;
35706#line 841
35707  crtc = (struct drm_crtc *)__cil_tmp35;
35708  {
35709#line 841
35710  while (1) {
35711    while_continue: /* CIL Label */ ;
35712    {
35713#line 841
35714    __cil_tmp36 = 1152 + 296;
35715#line 841
35716    __cil_tmp37 = (unsigned long )dev;
35717#line 841
35718    __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
35719#line 841
35720    __cil_tmp39 = (struct list_head *)__cil_tmp38;
35721#line 841
35722    __cil_tmp40 = (unsigned long )__cil_tmp39;
35723#line 841
35724    __cil_tmp41 = (unsigned long )crtc;
35725#line 841
35726    __cil_tmp42 = __cil_tmp41 + 8;
35727#line 841
35728    __cil_tmp43 = (struct list_head *)__cil_tmp42;
35729#line 841
35730    __cil_tmp44 = (unsigned long )__cil_tmp43;
35731#line 841
35732    if (__cil_tmp44 != __cil_tmp40) {
35733
35734    } else {
35735#line 841
35736      goto while_break;
35737    }
35738    }
35739    {
35740#line 842
35741    __cil_tmp45 = (unsigned long )(& set) + 24;
35742#line 842
35743    *((struct drm_crtc **)__cil_tmp45) = crtc;
35744#line 843
35745    __cil_tmp46 = (unsigned long )crtc;
35746#line 843
35747    __cil_tmp47 = __cil_tmp46 + 488;
35748#line 843
35749    __cil_tmp48 = *((struct drm_crtc_funcs    **)__cil_tmp47);
35750#line 843
35751    __cil_tmp49 = (unsigned long )__cil_tmp48;
35752#line 843
35753    __cil_tmp50 = __cil_tmp49 + 56;
35754#line 843
35755    __cil_tmp51 = *((int (*   *)(struct drm_mode_set *set ))__cil_tmp50);
35756#line 843
35757    __cil_tmp52 = (int (*)(struct drm_mode_set *set ))__cil_tmp51;
35758#line 843
35759    ret = (*__cil_tmp52)(& set);
35760#line 844
35761    __cil_tmp53 = ret != 0;
35762#line 844
35763    __cil_tmp54 = ! __cil_tmp53;
35764#line 844
35765    __ret_warn_on = ! __cil_tmp54;
35766#line 844
35767    __cil_tmp55 = ! __ret_warn_on;
35768#line 844
35769    __cil_tmp56 = ! __cil_tmp55;
35770#line 844
35771    __cil_tmp57 = (long )__cil_tmp56;
35772#line 844
35773    tmp___8 = __builtin_expect(__cil_tmp57, 0L);
35774    }
35775#line 844
35776    if (tmp___8) {
35777      {
35778#line 844
35779      __cil_tmp58 = (int    )844;
35780#line 844
35781      warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c",
35782                         __cil_tmp58);
35783      }
35784    } else {
35785
35786    }
35787    {
35788#line 844
35789    __cil_tmp59 = ! __ret_warn_on;
35790#line 844
35791    __cil_tmp60 = ! __cil_tmp59;
35792#line 844
35793    __cil_tmp61 = (long )__cil_tmp60;
35794#line 844
35795    __builtin_expect(__cil_tmp61, 0L);
35796#line 841
35797    __cil_tmp62 = (unsigned long )crtc;
35798#line 841
35799    __cil_tmp63 = __cil_tmp62 + 8;
35800#line 841
35801    __cil_tmp64 = *((struct list_head **)__cil_tmp63);
35802#line 841
35803    __mptr___0 = (struct list_head    *)__cil_tmp64;
35804#line 841
35805    __cil_tmp65 = (struct drm_crtc *)0;
35806#line 841
35807    __cil_tmp66 = (unsigned long )__cil_tmp65;
35808#line 841
35809    __cil_tmp67 = __cil_tmp66 + 8;
35810#line 841
35811    __cil_tmp68 = (struct list_head *)__cil_tmp67;
35812#line 841
35813    __cil_tmp69 = (unsigned int )__cil_tmp68;
35814#line 841
35815    __cil_tmp70 = (char *)__mptr___0;
35816#line 841
35817    __cil_tmp71 = __cil_tmp70 - __cil_tmp69;
35818#line 841
35819    crtc = (struct drm_crtc *)__cil_tmp71;
35820    }
35821  }
35822  while_break: /* CIL Label */ ;
35823  }
35824#line 847
35825  return;
35826}
35827}
35828#line 853 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35829static struct lock_class_key __key___11  ;
35830#line 849 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35831static void vmw_master_init(struct vmw_master *vmaster ) 
35832{ struct ttm_lock *__cil_tmp2 ;
35833  unsigned long __cil_tmp3 ;
35834  unsigned long __cil_tmp4 ;
35835  struct list_head *__cil_tmp5 ;
35836  unsigned long __cil_tmp6 ;
35837  unsigned long __cil_tmp7 ;
35838  struct mutex *__cil_tmp8 ;
35839
35840  {
35841  {
35842#line 851
35843  __cil_tmp2 = (struct ttm_lock *)vmaster;
35844#line 851
35845  ttm_lock_init(__cil_tmp2);
35846#line 852
35847  __cil_tmp3 = (unsigned long )vmaster;
35848#line 852
35849  __cil_tmp4 = __cil_tmp3 + 224;
35850#line 852
35851  __cil_tmp5 = (struct list_head *)__cil_tmp4;
35852#line 852
35853  INIT_LIST_HEAD(__cil_tmp5);
35854  }
35855  {
35856#line 853
35857  while (1) {
35858    while_continue: /* CIL Label */ ;
35859    {
35860#line 853
35861    __cil_tmp6 = (unsigned long )vmaster;
35862#line 853
35863    __cil_tmp7 = __cil_tmp6 + 152;
35864#line 853
35865    __cil_tmp8 = (struct mutex *)__cil_tmp7;
35866#line 853
35867    __mutex_init(__cil_tmp8, "&vmaster->fb_surf_mutex", & __key___11);
35868    }
35869#line 853
35870    goto while_break;
35871  }
35872  while_break: /* CIL Label */ ;
35873  }
35874#line 854
35875  return;
35876}
35877}
35878#line 856 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35879static int vmw_master_create(struct drm_device *dev , struct drm_master *master ) 
35880{ struct vmw_master *vmaster ;
35881  void *tmp___7 ;
35882  long tmp___8 ;
35883  void *__cil_tmp6 ;
35884  unsigned long __cil_tmp7 ;
35885  unsigned long __cil_tmp8 ;
35886  int __cil_tmp9 ;
35887  int __cil_tmp10 ;
35888  int __cil_tmp11 ;
35889  long __cil_tmp12 ;
35890  struct ttm_lock *__cil_tmp13 ;
35891  bool __cil_tmp14 ;
35892  unsigned long __cil_tmp15 ;
35893  unsigned long __cil_tmp16 ;
35894
35895  {
35896  {
35897#line 861
35898  tmp___7 = kzalloc(240UL, 208U);
35899#line 861
35900  vmaster = (struct vmw_master *)tmp___7;
35901#line 862
35902  __cil_tmp6 = (void *)0;
35903#line 862
35904  __cil_tmp7 = (unsigned long )__cil_tmp6;
35905#line 862
35906  __cil_tmp8 = (unsigned long )vmaster;
35907#line 862
35908  __cil_tmp9 = __cil_tmp8 == __cil_tmp7;
35909#line 862
35910  __cil_tmp10 = ! __cil_tmp9;
35911#line 862
35912  __cil_tmp11 = ! __cil_tmp10;
35913#line 862
35914  __cil_tmp12 = (long )__cil_tmp11;
35915#line 862
35916  tmp___8 = __builtin_expect(__cil_tmp12, 0L);
35917  }
35918#line 862
35919  if (tmp___8) {
35920#line 863
35921    return (-12);
35922  } else {
35923
35924  }
35925  {
35926#line 865
35927  vmw_master_init(vmaster);
35928#line 866
35929  __cil_tmp13 = (struct ttm_lock *)vmaster;
35930#line 866
35931  __cil_tmp14 = (bool )1;
35932#line 866
35933  ttm_lock_set_kill(__cil_tmp13, __cil_tmp14, 15);
35934#line 867
35935  __cil_tmp15 = (unsigned long )master;
35936#line 867
35937  __cil_tmp16 = __cil_tmp15 + 192;
35938#line 867
35939  *((void **)__cil_tmp16) = (void *)vmaster;
35940  }
35941#line 869
35942  return (0);
35943}
35944}
35945#line 872 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35946static void vmw_master_destroy(struct drm_device *dev , struct drm_master *master ) 
35947{ struct vmw_master *vmaster ;
35948  struct vmw_master *tmp___7 ;
35949  unsigned long __cil_tmp5 ;
35950  unsigned long __cil_tmp6 ;
35951  void    *__cil_tmp7 ;
35952
35953  {
35954  {
35955#line 875
35956  tmp___7 = vmw_master(master);
35957#line 875
35958  vmaster = tmp___7;
35959#line 877
35960  __cil_tmp5 = (unsigned long )master;
35961#line 877
35962  __cil_tmp6 = __cil_tmp5 + 192;
35963#line 877
35964  *((void **)__cil_tmp6) = (void *)0;
35965#line 878
35966  __cil_tmp7 = (void    *)vmaster;
35967#line 878
35968  kfree(__cil_tmp7);
35969  }
35970#line 879
35971  return;
35972}
35973}
35974#line 882 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
35975static int vmw_master_set(struct drm_device *dev , struct drm_file *file_priv , bool from_open ) 
35976{ struct vmw_private *dev_priv ;
35977  struct vmw_private *tmp___7 ;
35978  struct vmw_fpriv *vmw_fp ;
35979  struct vmw_fpriv *tmp___8 ;
35980  struct vmw_master *active ;
35981  struct vmw_master *vmaster ;
35982  struct vmw_master *tmp___9 ;
35983  int ret ;
35984  long tmp___10 ;
35985  long tmp___11 ;
35986  long tmp___12 ;
35987  long tmp___13 ;
35988  long tmp___14 ;
35989  unsigned long __cil_tmp17 ;
35990  unsigned long __cil_tmp18 ;
35991  unsigned long __cil_tmp19 ;
35992  unsigned long __cil_tmp20 ;
35993  struct drm_master *__cil_tmp21 ;
35994  unsigned long __cil_tmp22 ;
35995  unsigned long __cil_tmp23 ;
35996  bool __cil_tmp24 ;
35997  bool __cil_tmp25 ;
35998  int __cil_tmp26 ;
35999  int __cil_tmp27 ;
36000  int __cil_tmp28 ;
36001  long __cil_tmp29 ;
36002  unsigned long __cil_tmp30 ;
36003  unsigned long __cil_tmp31 ;
36004  struct mutex *__cil_tmp32 ;
36005  uint32_t __cil_tmp33 ;
36006  unsigned long __cil_tmp34 ;
36007  unsigned long __cil_tmp35 ;
36008  struct mutex *__cil_tmp36 ;
36009  unsigned long __cil_tmp37 ;
36010  unsigned long __cil_tmp38 ;
36011  struct vmw_master *__cil_tmp39 ;
36012  unsigned long __cil_tmp40 ;
36013  unsigned long __cil_tmp41 ;
36014  int __cil_tmp42 ;
36015  int __cil_tmp43 ;
36016  int __cil_tmp44 ;
36017  long __cil_tmp45 ;
36018  struct ttm_lock *__cil_tmp46 ;
36019  bool __cil_tmp47 ;
36020  unsigned long __cil_tmp48 ;
36021  unsigned long __cil_tmp49 ;
36022  struct ttm_object_file *__cil_tmp50 ;
36023  int __cil_tmp51 ;
36024  int __cil_tmp52 ;
36025  int __cil_tmp53 ;
36026  long __cil_tmp54 ;
36027  struct ttm_lock *__cil_tmp55 ;
36028  bool __cil_tmp56 ;
36029  struct ttm_bo_device *__cil_tmp57 ;
36030  int __cil_tmp58 ;
36031  int __cil_tmp59 ;
36032  int __cil_tmp60 ;
36033  long __cil_tmp61 ;
36034  unsigned long __cil_tmp62 ;
36035  unsigned long __cil_tmp63 ;
36036  void *__cil_tmp64 ;
36037  struct ttm_lock *__cil_tmp65 ;
36038  bool __cil_tmp66 ;
36039  struct ttm_lock *__cil_tmp67 ;
36040  unsigned long __cil_tmp68 ;
36041  unsigned long __cil_tmp69 ;
36042  struct drm_master *__cil_tmp70 ;
36043  unsigned long __cil_tmp71 ;
36044  struct drm_master *__cil_tmp72 ;
36045  unsigned long __cil_tmp73 ;
36046  int __cil_tmp74 ;
36047  int __cil_tmp75 ;
36048  int __cil_tmp76 ;
36049  long __cil_tmp77 ;
36050  struct drm_master **__cil_tmp78 ;
36051  unsigned long __cil_tmp79 ;
36052  unsigned long __cil_tmp80 ;
36053  unsigned long __cil_tmp81 ;
36054  unsigned long __cil_tmp82 ;
36055  bool __cil_tmp83 ;
36056  unsigned long __cil_tmp84 ;
36057  unsigned long __cil_tmp85 ;
36058  struct mutex *__cil_tmp86 ;
36059  uint32_t __cil_tmp87 ;
36060  unsigned long __cil_tmp88 ;
36061  unsigned long __cil_tmp89 ;
36062  struct mutex *__cil_tmp90 ;
36063  bool __cil_tmp91 ;
36064
36065  {
36066  {
36067#line 886
36068  tmp___7 = vmw_priv(dev);
36069#line 886
36070  dev_priv = tmp___7;
36071#line 887
36072  tmp___8 = vmw_fpriv(file_priv);
36073#line 887
36074  vmw_fp = tmp___8;
36075#line 888
36076  __cil_tmp17 = (unsigned long )dev_priv;
36077#line 888
36078  __cil_tmp18 = __cil_tmp17 + 134384;
36079#line 888
36080  active = *((struct vmw_master **)__cil_tmp18);
36081#line 889
36082  __cil_tmp19 = (unsigned long )file_priv;
36083#line 889
36084  __cil_tmp20 = __cil_tmp19 + 152;
36085#line 889
36086  __cil_tmp21 = *((struct drm_master **)__cil_tmp20);
36087#line 889
36088  tmp___9 = vmw_master(__cil_tmp21);
36089#line 889
36090  vmaster = tmp___9;
36091#line 890
36092  ret = 0;
36093  }
36094  {
36095#line 892
36096  __cil_tmp22 = (unsigned long )dev_priv;
36097#line 892
36098  __cil_tmp23 = __cil_tmp22 + 134378;
36099#line 892
36100  __cil_tmp24 = *((bool *)__cil_tmp23);
36101#line 892
36102  if (! __cil_tmp24) {
36103    {
36104#line 893
36105    __cil_tmp25 = (bool )1;
36106#line 893
36107    ret = vmw_3d_resource_inc(dev_priv, __cil_tmp25);
36108#line 894
36109    __cil_tmp26 = ret != 0;
36110#line 894
36111    __cil_tmp27 = ! __cil_tmp26;
36112#line 894
36113    __cil_tmp28 = ! __cil_tmp27;
36114#line 894
36115    __cil_tmp29 = (long )__cil_tmp28;
36116#line 894
36117    tmp___10 = __builtin_expect(__cil_tmp29, 0L);
36118    }
36119#line 894
36120    if (tmp___10) {
36121#line 895
36122      return (ret);
36123    } else {
36124
36125    }
36126    {
36127#line 896
36128    vmw_kms_save_vga(dev_priv);
36129#line 897
36130    __cil_tmp30 = (unsigned long )dev_priv;
36131#line 897
36132    __cil_tmp31 = __cil_tmp30 + 2184;
36133#line 897
36134    __cil_tmp32 = (struct mutex *)__cil_tmp31;
36135#line 897
36136    mutex_lock(__cil_tmp32);
36137#line 898
36138    __cil_tmp33 = (uint32_t )0;
36139#line 898
36140    vmw_write(dev_priv, 45U, __cil_tmp33);
36141#line 899
36142    __cil_tmp34 = (unsigned long )dev_priv;
36143#line 899
36144    __cil_tmp35 = __cil_tmp34 + 2184;
36145#line 899
36146    __cil_tmp36 = (struct mutex *)__cil_tmp35;
36147#line 899
36148    mutex_unlock(__cil_tmp36);
36149    }
36150  } else {
36151
36152  }
36153  }
36154#line 902
36155  if (active) {
36156    {
36157#line 903
36158    while (1) {
36159      while_continue: /* CIL Label */ ;
36160      {
36161#line 903
36162      __cil_tmp37 = (unsigned long )dev_priv;
36163#line 903
36164      __cil_tmp38 = __cil_tmp37 + 134392;
36165#line 903
36166      __cil_tmp39 = (struct vmw_master *)__cil_tmp38;
36167#line 903
36168      __cil_tmp40 = (unsigned long )__cil_tmp39;
36169#line 903
36170      __cil_tmp41 = (unsigned long )active;
36171#line 903
36172      __cil_tmp42 = __cil_tmp41 != __cil_tmp40;
36173#line 903
36174      __cil_tmp43 = ! __cil_tmp42;
36175#line 903
36176      __cil_tmp44 = ! __cil_tmp43;
36177#line 903
36178      __cil_tmp45 = (long )__cil_tmp44;
36179#line 903
36180      tmp___11 = __builtin_expect(__cil_tmp45, 0L);
36181      }
36182#line 903
36183      if (tmp___11) {
36184        {
36185#line 903
36186        while (1) {
36187          while_continue___0: /* CIL Label */ ;
36188#line 903
36189          __asm__  volatile   ("1:\tud2\n"
36190                               ".pushsection __bug_table,\"a\"\n"
36191                               "2:\t.long 1b - 2b, %c0 - 2b\n"
36192                               "\t.word %c1, 0\n"
36193                               "\t.org 2b+%c2\n"
36194                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"),
36195                               "i" (903), "i" (12UL));
36196          {
36197#line 903
36198          while (1) {
36199            while_continue___1: /* CIL Label */ ;
36200          }
36201          while_break___1: /* CIL Label */ ;
36202          }
36203#line 903
36204          goto while_break___0;
36205        }
36206        while_break___0: /* CIL Label */ ;
36207        }
36208      } else {
36209
36210      }
36211#line 903
36212      goto while_break;
36213    }
36214    while_break: /* CIL Label */ ;
36215    }
36216    {
36217#line 904
36218    __cil_tmp46 = (struct ttm_lock *)active;
36219#line 904
36220    __cil_tmp47 = (bool )0;
36221#line 904
36222    __cil_tmp48 = (unsigned long )vmw_fp;
36223#line 904
36224    __cil_tmp49 = __cil_tmp48 + 8;
36225#line 904
36226    __cil_tmp50 = *((struct ttm_object_file **)__cil_tmp49);
36227#line 904
36228    ret = ttm_vt_lock(__cil_tmp46, __cil_tmp47, __cil_tmp50);
36229#line 905
36230    __cil_tmp51 = ret != 0;
36231#line 905
36232    __cil_tmp52 = ! __cil_tmp51;
36233#line 905
36234    __cil_tmp53 = ! __cil_tmp52;
36235#line 905
36236    __cil_tmp54 = (long )__cil_tmp53;
36237#line 905
36238    tmp___12 = __builtin_expect(__cil_tmp54, 0L);
36239    }
36240#line 905
36241    if (tmp___12) {
36242#line 906
36243      goto out_no_active_lock;
36244    } else {
36245
36246    }
36247    {
36248#line 908
36249    __cil_tmp55 = (struct ttm_lock *)active;
36250#line 908
36251    __cil_tmp56 = (bool )1;
36252#line 908
36253    ttm_lock_set_kill(__cil_tmp55, __cil_tmp56, 15);
36254#line 909
36255    __cil_tmp57 = (struct ttm_bo_device *)dev_priv;
36256#line 909
36257    ret = ttm_bo_evict_mm(__cil_tmp57, 2U);
36258#line 910
36259    __cil_tmp58 = ret != 0;
36260#line 910
36261    __cil_tmp59 = ! __cil_tmp58;
36262#line 910
36263    __cil_tmp60 = ! __cil_tmp59;
36264#line 910
36265    __cil_tmp61 = (long )__cil_tmp60;
36266#line 910
36267    tmp___13 = __builtin_expect(__cil_tmp61, 0L);
36268    }
36269#line 910
36270    if (tmp___13) {
36271      {
36272#line 911
36273      drm_err("vmw_master_set", "Unable to clean VRAM on master drop.\n");
36274      }
36275    } else {
36276
36277    }
36278#line 915
36279    __cil_tmp62 = (unsigned long )dev_priv;
36280#line 915
36281    __cil_tmp63 = __cil_tmp62 + 134384;
36282#line 915
36283    __cil_tmp64 = (void *)0;
36284#line 915
36285    *((struct vmw_master **)__cil_tmp63) = (struct vmw_master *)__cil_tmp64;
36286  } else {
36287
36288  }
36289  {
36290#line 918
36291  __cil_tmp65 = (struct ttm_lock *)vmaster;
36292#line 918
36293  __cil_tmp66 = (bool )0;
36294#line 918
36295  ttm_lock_set_kill(__cil_tmp65, __cil_tmp66, 15);
36296  }
36297#line 919
36298  if (! from_open) {
36299    {
36300#line 920
36301    __cil_tmp67 = (struct ttm_lock *)vmaster;
36302#line 920
36303    ttm_vt_unlock(__cil_tmp67);
36304    }
36305    {
36306#line 921
36307    while (1) {
36308      while_continue___2: /* CIL Label */ ;
36309      {
36310#line 921
36311      __cil_tmp68 = (unsigned long )file_priv;
36312#line 921
36313      __cil_tmp69 = __cil_tmp68 + 152;
36314#line 921
36315      __cil_tmp70 = *((struct drm_master **)__cil_tmp69);
36316#line 921
36317      __cil_tmp71 = (unsigned long )__cil_tmp70;
36318#line 921
36319      __cil_tmp72 = *((struct drm_master **)vmw_fp);
36320#line 921
36321      __cil_tmp73 = (unsigned long )__cil_tmp72;
36322#line 921
36323      __cil_tmp74 = __cil_tmp73 != __cil_tmp71;
36324#line 921
36325      __cil_tmp75 = ! __cil_tmp74;
36326#line 921
36327      __cil_tmp76 = ! __cil_tmp75;
36328#line 921
36329      __cil_tmp77 = (long )__cil_tmp76;
36330#line 921
36331      tmp___14 = __builtin_expect(__cil_tmp77, 0L);
36332      }
36333#line 921
36334      if (tmp___14) {
36335        {
36336#line 921
36337        while (1) {
36338          while_continue___3: /* CIL Label */ ;
36339#line 921
36340          __asm__  volatile   ("1:\tud2\n"
36341                               ".pushsection __bug_table,\"a\"\n"
36342                               "2:\t.long 1b - 2b, %c0 - 2b\n"
36343                               "\t.word %c1, 0\n"
36344                               "\t.org 2b+%c2\n"
36345                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"),
36346                               "i" (921), "i" (12UL));
36347          {
36348#line 921
36349          while (1) {
36350            while_continue___4: /* CIL Label */ ;
36351          }
36352          while_break___4: /* CIL Label */ ;
36353          }
36354#line 921
36355          goto while_break___3;
36356        }
36357        while_break___3: /* CIL Label */ ;
36358        }
36359      } else {
36360
36361      }
36362#line 921
36363      goto while_break___2;
36364    }
36365    while_break___2: /* CIL Label */ ;
36366    }
36367    {
36368#line 922
36369    __cil_tmp78 = (struct drm_master **)vmw_fp;
36370#line 922
36371    drm_master_put(__cil_tmp78);
36372    }
36373  } else {
36374
36375  }
36376#line 925
36377  __cil_tmp79 = (unsigned long )dev_priv;
36378#line 925
36379  __cil_tmp80 = __cil_tmp79 + 134384;
36380#line 925
36381  *((struct vmw_master **)__cil_tmp80) = vmaster;
36382#line 927
36383  return (0);
36384  out_no_active_lock: 
36385  {
36386#line 930
36387  __cil_tmp81 = (unsigned long )dev_priv;
36388#line 930
36389  __cil_tmp82 = __cil_tmp81 + 134378;
36390#line 930
36391  __cil_tmp83 = *((bool *)__cil_tmp82);
36392#line 930
36393  if (! __cil_tmp83) {
36394    {
36395#line 931
36396    __cil_tmp84 = (unsigned long )dev_priv;
36397#line 931
36398    __cil_tmp85 = __cil_tmp84 + 2184;
36399#line 931
36400    __cil_tmp86 = (struct mutex *)__cil_tmp85;
36401#line 931
36402    mutex_lock(__cil_tmp86);
36403#line 932
36404    __cil_tmp87 = (uint32_t )1;
36405#line 932
36406    vmw_write(dev_priv, 45U, __cil_tmp87);
36407#line 933
36408    __cil_tmp88 = (unsigned long )dev_priv;
36409#line 933
36410    __cil_tmp89 = __cil_tmp88 + 2184;
36411#line 933
36412    __cil_tmp90 = (struct mutex *)__cil_tmp89;
36413#line 933
36414    mutex_unlock(__cil_tmp90);
36415#line 934
36416    vmw_kms_restore_vga(dev_priv);
36417#line 935
36418    __cil_tmp91 = (bool )1;
36419#line 935
36420    vmw_3d_resource_dec(dev_priv, __cil_tmp91);
36421    }
36422  } else {
36423
36424  }
36425  }
36426#line 937
36427  return (ret);
36428}
36429}
36430#line 940 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36431static void vmw_master_drop(struct drm_device *dev , struct drm_file *file_priv ,
36432                            bool from_release ) 
36433{ struct vmw_private *dev_priv ;
36434  struct vmw_private *tmp___7 ;
36435  struct vmw_fpriv *vmw_fp ;
36436  struct vmw_fpriv *tmp___8 ;
36437  struct vmw_master *vmaster ;
36438  struct vmw_master *tmp___9 ;
36439  int ret ;
36440  long tmp___10 ;
36441  long tmp___11 ;
36442  unsigned long __cil_tmp13 ;
36443  unsigned long __cil_tmp14 ;
36444  struct drm_master *__cil_tmp15 ;
36445  unsigned long __cil_tmp16 ;
36446  unsigned long __cil_tmp17 ;
36447  struct drm_master *__cil_tmp18 ;
36448  struct ttm_lock *__cil_tmp19 ;
36449  bool __cil_tmp20 ;
36450  unsigned long __cil_tmp21 ;
36451  unsigned long __cil_tmp22 ;
36452  struct ttm_object_file *__cil_tmp23 ;
36453  bool __cil_tmp24 ;
36454  uint32_t __cil_tmp25 ;
36455  int __cil_tmp26 ;
36456  int __cil_tmp27 ;
36457  int __cil_tmp28 ;
36458  long __cil_tmp29 ;
36459  struct drm_master **__cil_tmp30 ;
36460  struct ttm_lock *__cil_tmp31 ;
36461  bool __cil_tmp32 ;
36462  unsigned long __cil_tmp33 ;
36463  unsigned long __cil_tmp34 ;
36464  bool __cil_tmp35 ;
36465  struct ttm_bo_device *__cil_tmp36 ;
36466  int __cil_tmp37 ;
36467  int __cil_tmp38 ;
36468  int __cil_tmp39 ;
36469  long __cil_tmp40 ;
36470  unsigned long __cil_tmp41 ;
36471  unsigned long __cil_tmp42 ;
36472  struct mutex *__cil_tmp43 ;
36473  uint32_t __cil_tmp44 ;
36474  unsigned long __cil_tmp45 ;
36475  unsigned long __cil_tmp46 ;
36476  struct mutex *__cil_tmp47 ;
36477  bool __cil_tmp48 ;
36478  unsigned long __cil_tmp49 ;
36479  unsigned long __cil_tmp50 ;
36480  unsigned long __cil_tmp51 ;
36481  unsigned long __cil_tmp52 ;
36482  unsigned long __cil_tmp53 ;
36483  unsigned long __cil_tmp54 ;
36484  struct ttm_lock *__cil_tmp55 ;
36485  bool __cil_tmp56 ;
36486  unsigned long __cil_tmp57 ;
36487  unsigned long __cil_tmp58 ;
36488  struct ttm_lock *__cil_tmp59 ;
36489  unsigned long __cil_tmp60 ;
36490  unsigned long __cil_tmp61 ;
36491
36492  {
36493  {
36494#line 944
36495  tmp___7 = vmw_priv(dev);
36496#line 944
36497  dev_priv = tmp___7;
36498#line 945
36499  tmp___8 = vmw_fpriv(file_priv);
36500#line 945
36501  vmw_fp = tmp___8;
36502#line 946
36503  __cil_tmp13 = (unsigned long )file_priv;
36504#line 946
36505  __cil_tmp14 = __cil_tmp13 + 152;
36506#line 946
36507  __cil_tmp15 = *((struct drm_master **)__cil_tmp14);
36508#line 946
36509  tmp___9 = vmw_master(__cil_tmp15);
36510#line 946
36511  vmaster = tmp___9;
36512#line 954
36513  __cil_tmp16 = (unsigned long )file_priv;
36514#line 954
36515  __cil_tmp17 = __cil_tmp16 + 152;
36516#line 954
36517  __cil_tmp18 = *((struct drm_master **)__cil_tmp17);
36518#line 954
36519  *((struct drm_master **)vmw_fp) = drm_master_get(__cil_tmp18);
36520#line 955
36521  __cil_tmp19 = (struct ttm_lock *)vmaster;
36522#line 955
36523  __cil_tmp20 = (bool )0;
36524#line 955
36525  __cil_tmp21 = (unsigned long )vmw_fp;
36526#line 955
36527  __cil_tmp22 = __cil_tmp21 + 8;
36528#line 955
36529  __cil_tmp23 = *((struct ttm_object_file **)__cil_tmp22);
36530#line 955
36531  ret = ttm_vt_lock(__cil_tmp19, __cil_tmp20, __cil_tmp23);
36532#line 956
36533  __cil_tmp24 = (bool )0;
36534#line 956
36535  __cil_tmp25 = (uint32_t )0;
36536#line 956
36537  vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp24, __cil_tmp25);
36538#line 958
36539  __cil_tmp26 = ret != 0;
36540#line 958
36541  __cil_tmp27 = ! __cil_tmp26;
36542#line 958
36543  __cil_tmp28 = ! __cil_tmp27;
36544#line 958
36545  __cil_tmp29 = (long )__cil_tmp28;
36546#line 958
36547  tmp___10 = __builtin_expect(__cil_tmp29, 0L);
36548  }
36549#line 958
36550  if (tmp___10) {
36551    {
36552#line 959
36553    drm_err("vmw_master_drop", "Unable to lock TTM at VT switch.\n");
36554#line 960
36555    __cil_tmp30 = (struct drm_master **)vmw_fp;
36556#line 960
36557    drm_master_put(__cil_tmp30);
36558    }
36559  } else {
36560
36561  }
36562  {
36563#line 963
36564  __cil_tmp31 = (struct ttm_lock *)vmaster;
36565#line 963
36566  __cil_tmp32 = (bool )1;
36567#line 963
36568  ttm_lock_set_kill(__cil_tmp31, __cil_tmp32, 15);
36569  }
36570  {
36571#line 965
36572  __cil_tmp33 = (unsigned long )dev_priv;
36573#line 965
36574  __cil_tmp34 = __cil_tmp33 + 134378;
36575#line 965
36576  __cil_tmp35 = *((bool *)__cil_tmp34);
36577#line 965
36578  if (! __cil_tmp35) {
36579    {
36580#line 966
36581    __cil_tmp36 = (struct ttm_bo_device *)dev_priv;
36582#line 966
36583    ret = ttm_bo_evict_mm(__cil_tmp36, 2U);
36584#line 967
36585    __cil_tmp37 = ret != 0;
36586#line 967
36587    __cil_tmp38 = ! __cil_tmp37;
36588#line 967
36589    __cil_tmp39 = ! __cil_tmp38;
36590#line 967
36591    __cil_tmp40 = (long )__cil_tmp39;
36592#line 967
36593    tmp___11 = __builtin_expect(__cil_tmp40, 0L);
36594    }
36595#line 967
36596    if (tmp___11) {
36597      {
36598#line 968
36599      drm_err("vmw_master_drop", "Unable to clean VRAM on master drop.\n");
36600      }
36601    } else {
36602
36603    }
36604    {
36605#line 969
36606    __cil_tmp41 = (unsigned long )dev_priv;
36607#line 969
36608    __cil_tmp42 = __cil_tmp41 + 2184;
36609#line 969
36610    __cil_tmp43 = (struct mutex *)__cil_tmp42;
36611#line 969
36612    mutex_lock(__cil_tmp43);
36613#line 970
36614    __cil_tmp44 = (uint32_t )1;
36615#line 970
36616    vmw_write(dev_priv, 45U, __cil_tmp44);
36617#line 971
36618    __cil_tmp45 = (unsigned long )dev_priv;
36619#line 971
36620    __cil_tmp46 = __cil_tmp45 + 2184;
36621#line 971
36622    __cil_tmp47 = (struct mutex *)__cil_tmp46;
36623#line 971
36624    mutex_unlock(__cil_tmp47);
36625#line 972
36626    vmw_kms_restore_vga(dev_priv);
36627#line 973
36628    __cil_tmp48 = (bool )1;
36629#line 973
36630    vmw_3d_resource_dec(dev_priv, __cil_tmp48);
36631    }
36632  } else {
36633
36634  }
36635  }
36636  {
36637#line 976
36638  __cil_tmp49 = (unsigned long )dev_priv;
36639#line 976
36640  __cil_tmp50 = __cil_tmp49 + 134384;
36641#line 976
36642  __cil_tmp51 = (unsigned long )dev_priv;
36643#line 976
36644  __cil_tmp52 = __cil_tmp51 + 134392;
36645#line 976
36646  *((struct vmw_master **)__cil_tmp50) = (struct vmw_master *)__cil_tmp52;
36647#line 977
36648  __cil_tmp53 = (unsigned long )dev_priv;
36649#line 977
36650  __cil_tmp54 = __cil_tmp53 + 134392;
36651#line 977
36652  __cil_tmp55 = (struct ttm_lock *)__cil_tmp54;
36653#line 977
36654  __cil_tmp56 = (bool )0;
36655#line 977
36656  ttm_lock_set_kill(__cil_tmp55, __cil_tmp56, 15);
36657#line 978
36658  __cil_tmp57 = (unsigned long )dev_priv;
36659#line 978
36660  __cil_tmp58 = __cil_tmp57 + 134392;
36661#line 978
36662  __cil_tmp59 = (struct ttm_lock *)__cil_tmp58;
36663#line 978
36664  ttm_vt_unlock(__cil_tmp59);
36665  }
36666  {
36667#line 980
36668  __cil_tmp60 = (unsigned long )dev_priv;
36669#line 980
36670  __cil_tmp61 = __cil_tmp60 + 134378;
36671#line 980
36672  if (*((bool *)__cil_tmp61)) {
36673    {
36674#line 981
36675    vmw_fb_on(dev_priv);
36676    }
36677  } else {
36678
36679  }
36680  }
36681#line 982
36682  return;
36683}
36684}
36685#line 985 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36686static void vmw_remove(struct pci_dev *pdev ) 
36687{ struct drm_device *dev ;
36688  void *tmp___7 ;
36689
36690  {
36691  {
36692#line 987
36693  tmp___7 = pci_get_drvdata(pdev);
36694#line 987
36695  dev = (struct drm_device *)tmp___7;
36696#line 989
36697  drm_put_dev(dev);
36698  }
36699#line 990
36700  return;
36701}
36702}
36703#line 992 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36704static int vmwgfx_pm_notifier(struct notifier_block *nb , unsigned long val , void *ptr ) 
36705{ struct vmw_private *dev_priv ;
36706  struct notifier_block    *__mptr ;
36707  struct vmw_master *vmaster ;
36708  struct vmw_private *__cil_tmp7 ;
36709  unsigned long __cil_tmp8 ;
36710  unsigned long __cil_tmp9 ;
36711  struct notifier_block *__cil_tmp10 ;
36712  unsigned int __cil_tmp11 ;
36713  char *__cil_tmp12 ;
36714  char *__cil_tmp13 ;
36715  unsigned long __cil_tmp14 ;
36716  unsigned long __cil_tmp15 ;
36717  struct ttm_lock *__cil_tmp16 ;
36718  bool __cil_tmp17 ;
36719  uint32_t __cil_tmp18 ;
36720  struct ttm_bo_device *__cil_tmp19 ;
36721  struct ttm_lock *__cil_tmp20 ;
36722
36723  {
36724#line 996
36725  __mptr = (struct notifier_block    *)nb;
36726#line 996
36727  __cil_tmp7 = (struct vmw_private *)0;
36728#line 996
36729  __cil_tmp8 = (unsigned long )__cil_tmp7;
36730#line 996
36731  __cil_tmp9 = __cil_tmp8 + 134632;
36732#line 996
36733  __cil_tmp10 = (struct notifier_block *)__cil_tmp9;
36734#line 996
36735  __cil_tmp11 = (unsigned int )__cil_tmp10;
36736#line 996
36737  __cil_tmp12 = (char *)__mptr;
36738#line 996
36739  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
36740#line 996
36741  dev_priv = (struct vmw_private *)__cil_tmp13;
36742#line 997
36743  __cil_tmp14 = (unsigned long )dev_priv;
36744#line 997
36745  __cil_tmp15 = __cil_tmp14 + 134384;
36746#line 997
36747  vmaster = *((struct vmw_master **)__cil_tmp15);
36748#line 1000
36749  if ((int )val == 1) {
36750#line 1000
36751    goto case_1;
36752  } else
36753#line 1001
36754  if ((int )val == 3) {
36755#line 1001
36756    goto case_1;
36757  } else
36758#line 1012
36759  if ((int )val == 2) {
36760#line 1012
36761    goto case_2;
36762  } else
36763#line 1013
36764  if ((int )val == 4) {
36765#line 1013
36766    goto case_2;
36767  } else
36768#line 1014
36769  if ((int )val == 6) {
36770#line 1014
36771    goto case_2;
36772  } else
36773#line 1018
36774  if ((int )val == 5) {
36775#line 1018
36776    goto case_5;
36777  } else {
36778    {
36779#line 1020
36780    goto switch_default;
36781#line 999
36782    if (0) {
36783      case_1: /* CIL Label */ 
36784      case_3: /* CIL Label */ 
36785      {
36786#line 1002
36787      __cil_tmp16 = (struct ttm_lock *)vmaster;
36788#line 1002
36789      ttm_suspend_lock(__cil_tmp16);
36790#line 1008
36791      __cil_tmp17 = (bool )0;
36792#line 1008
36793      __cil_tmp18 = (uint32_t )0;
36794#line 1008
36795      vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp17, __cil_tmp18);
36796#line 1009
36797      __cil_tmp19 = (struct ttm_bo_device *)dev_priv;
36798#line 1009
36799      ttm_bo_swapout_all(__cil_tmp19);
36800      }
36801#line 1011
36802      goto switch_break;
36803      case_2: /* CIL Label */ 
36804      case_4: /* CIL Label */ 
36805      case_6: /* CIL Label */ 
36806      {
36807#line 1015
36808      __cil_tmp20 = (struct ttm_lock *)vmaster;
36809#line 1015
36810      ttm_suspend_unlock(__cil_tmp20);
36811      }
36812#line 1017
36813      goto switch_break;
36814      case_5: /* CIL Label */ 
36815#line 1019
36816      goto switch_break;
36817      switch_default: /* CIL Label */ 
36818#line 1021
36819      goto switch_break;
36820    } else {
36821      switch_break: /* CIL Label */ ;
36822    }
36823    }
36824  }
36825#line 1023
36826  return (0);
36827}
36828}
36829#line 1030 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36830static int vmw_pci_suspend(struct pci_dev *pdev , int state_event10 ) 
36831{ struct drm_device *dev ;
36832  void *tmp___7 ;
36833  struct vmw_private *dev_priv ;
36834  struct vmw_private *tmp___8 ;
36835  unsigned long __cil_tmp7 ;
36836  unsigned long __cil_tmp8 ;
36837  uint32_t __cil_tmp9 ;
36838
36839  {
36840  {
36841#line 1032
36842  tmp___7 = pci_get_drvdata(pdev);
36843#line 1032
36844  dev = (struct drm_device *)tmp___7;
36845#line 1033
36846  tmp___8 = vmw_priv(dev);
36847#line 1033
36848  dev_priv = tmp___8;
36849  }
36850  {
36851#line 1035
36852  __cil_tmp7 = (unsigned long )dev_priv;
36853#line 1035
36854  __cil_tmp8 = __cil_tmp7 + 134736;
36855#line 1035
36856  __cil_tmp9 = *((uint32_t *)__cil_tmp8);
36857#line 1035
36858  if (__cil_tmp9 != 0U) {
36859    {
36860#line 1036
36861    printk("<6>[drm] Can\'t suspend or hibernate while 3D resources are active.\n");
36862    }
36863#line 1038
36864    return (-16);
36865  } else {
36866
36867  }
36868  }
36869  {
36870#line 1041
36871  pci_save_state(pdev);
36872#line 1042
36873  pci_disable_device(pdev);
36874#line 1043
36875  pci_set_power_state(pdev, 3);
36876  }
36877#line 1044
36878  return (0);
36879}
36880}
36881#line 1047 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36882static int vmw_pci_resume(struct pci_dev *pdev ) 
36883{ int tmp___7 ;
36884
36885  {
36886  {
36887#line 1049
36888  pci_set_power_state(pdev, 0);
36889#line 1050
36890  pci_restore_state(pdev);
36891#line 1051
36892  tmp___7 = (int )pci_enable_device(pdev);
36893  }
36894#line 1051
36895  return (tmp___7);
36896}
36897}
36898#line 1054 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36899static int vmw_pm_suspend(struct device *kdev ) 
36900{ struct pci_dev *pdev ;
36901  struct device    *__mptr ;
36902  struct pm_message dummy ;
36903  int tmp___7 ;
36904  struct pci_dev *__cil_tmp6 ;
36905  unsigned long __cil_tmp7 ;
36906  unsigned long __cil_tmp8 ;
36907  struct device *__cil_tmp9 ;
36908  unsigned int __cil_tmp10 ;
36909  char *__cil_tmp11 ;
36910  char *__cil_tmp12 ;
36911  int dummy_event13 ;
36912
36913  {
36914  {
36915#line 1056
36916  __mptr = (struct device    *)kdev;
36917#line 1056
36918  __cil_tmp6 = (struct pci_dev *)0;
36919#line 1056
36920  __cil_tmp7 = (unsigned long )__cil_tmp6;
36921#line 1056
36922  __cil_tmp8 = __cil_tmp7 + 144;
36923#line 1056
36924  __cil_tmp9 = (struct device *)__cil_tmp8;
36925#line 1056
36926  __cil_tmp10 = (unsigned int )__cil_tmp9;
36927#line 1056
36928  __cil_tmp11 = (char *)__mptr;
36929#line 1056
36930  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
36931#line 1056
36932  pdev = (struct pci_dev *)__cil_tmp12;
36933#line 1059
36934  dummy_event13 = 0;
36935#line 1061
36936  tmp___7 = vmw_pci_suspend(pdev, dummy_event13);
36937  }
36938#line 1061
36939  return (tmp___7);
36940}
36941}
36942#line 1064 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36943static int vmw_pm_resume(struct device *kdev ) 
36944{ struct pci_dev *pdev ;
36945  struct device    *__mptr ;
36946  int tmp___7 ;
36947  struct pci_dev *__cil_tmp5 ;
36948  unsigned long __cil_tmp6 ;
36949  unsigned long __cil_tmp7 ;
36950  struct device *__cil_tmp8 ;
36951  unsigned int __cil_tmp9 ;
36952  char *__cil_tmp10 ;
36953  char *__cil_tmp11 ;
36954
36955  {
36956  {
36957#line 1066
36958  __mptr = (struct device    *)kdev;
36959#line 1066
36960  __cil_tmp5 = (struct pci_dev *)0;
36961#line 1066
36962  __cil_tmp6 = (unsigned long )__cil_tmp5;
36963#line 1066
36964  __cil_tmp7 = __cil_tmp6 + 144;
36965#line 1066
36966  __cil_tmp8 = (struct device *)__cil_tmp7;
36967#line 1066
36968  __cil_tmp9 = (unsigned int )__cil_tmp8;
36969#line 1066
36970  __cil_tmp10 = (char *)__mptr;
36971#line 1066
36972  __cil_tmp11 = __cil_tmp10 - __cil_tmp9;
36973#line 1066
36974  pdev = (struct pci_dev *)__cil_tmp11;
36975#line 1068
36976  tmp___7 = vmw_pci_resume(pdev);
36977  }
36978#line 1068
36979  return (tmp___7);
36980}
36981}
36982#line 1071 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
36983static int vmw_pm_prepare(struct device *kdev ) 
36984{ struct pci_dev *pdev ;
36985  struct device    *__mptr ;
36986  struct drm_device *dev ;
36987  void *tmp___7 ;
36988  struct vmw_private *dev_priv ;
36989  struct vmw_private *tmp___8 ;
36990  struct pci_dev *__cil_tmp8 ;
36991  unsigned long __cil_tmp9 ;
36992  unsigned long __cil_tmp10 ;
36993  struct device *__cil_tmp11 ;
36994  unsigned int __cil_tmp12 ;
36995  char *__cil_tmp13 ;
36996  char *__cil_tmp14 ;
36997  unsigned long __cil_tmp15 ;
36998  unsigned long __cil_tmp16 ;
36999  unsigned long __cil_tmp17 ;
37000  unsigned long __cil_tmp18 ;
37001  bool __cil_tmp19 ;
37002  unsigned long __cil_tmp20 ;
37003  unsigned long __cil_tmp21 ;
37004  uint32_t __cil_tmp22 ;
37005  unsigned long __cil_tmp23 ;
37006  unsigned long __cil_tmp24 ;
37007  bool __cil_tmp25 ;
37008  unsigned long __cil_tmp26 ;
37009  unsigned long __cil_tmp27 ;
37010
37011  {
37012  {
37013#line 1073
37014  __mptr = (struct device    *)kdev;
37015#line 1073
37016  __cil_tmp8 = (struct pci_dev *)0;
37017#line 1073
37018  __cil_tmp9 = (unsigned long )__cil_tmp8;
37019#line 1073
37020  __cil_tmp10 = __cil_tmp9 + 144;
37021#line 1073
37022  __cil_tmp11 = (struct device *)__cil_tmp10;
37023#line 1073
37024  __cil_tmp12 = (unsigned int )__cil_tmp11;
37025#line 1073
37026  __cil_tmp13 = (char *)__mptr;
37027#line 1073
37028  __cil_tmp14 = __cil_tmp13 - __cil_tmp12;
37029#line 1073
37030  pdev = (struct pci_dev *)__cil_tmp14;
37031#line 1074
37032  tmp___7 = pci_get_drvdata(pdev);
37033#line 1074
37034  dev = (struct drm_device *)tmp___7;
37035#line 1075
37036  tmp___8 = vmw_priv(dev);
37037#line 1075
37038  dev_priv = tmp___8;
37039#line 1081
37040  __cil_tmp15 = (unsigned long )dev_priv;
37041#line 1081
37042  __cil_tmp16 = __cil_tmp15 + 134656;
37043#line 1081
37044  *((bool *)__cil_tmp16) = (bool )1;
37045  }
37046  {
37047#line 1082
37048  __cil_tmp17 = (unsigned long )dev_priv;
37049#line 1082
37050  __cil_tmp18 = __cil_tmp17 + 134378;
37051#line 1082
37052  if (*((bool *)__cil_tmp18)) {
37053    {
37054#line 1083
37055    __cil_tmp19 = (bool )1;
37056#line 1083
37057    vmw_3d_resource_dec(dev_priv, __cil_tmp19);
37058    }
37059  } else {
37060
37061  }
37062  }
37063  {
37064#line 1085
37065  __cil_tmp20 = (unsigned long )dev_priv;
37066#line 1085
37067  __cil_tmp21 = __cil_tmp20 + 134736;
37068#line 1085
37069  __cil_tmp22 = *((uint32_t *)__cil_tmp21);
37070#line 1085
37071  if (__cil_tmp22 != 0U) {
37072    {
37073#line 1087
37074    printk("<6>[drm] Can\'t suspend or hibernate while 3D resources are active.\n");
37075    }
37076    {
37077#line 1090
37078    __cil_tmp23 = (unsigned long )dev_priv;
37079#line 1090
37080    __cil_tmp24 = __cil_tmp23 + 134378;
37081#line 1090
37082    if (*((bool *)__cil_tmp24)) {
37083      {
37084#line 1091
37085      __cil_tmp25 = (bool )1;
37086#line 1091
37087      vmw_3d_resource_inc(dev_priv, __cil_tmp25);
37088      }
37089    } else {
37090
37091    }
37092    }
37093#line 1092
37094    __cil_tmp26 = (unsigned long )dev_priv;
37095#line 1092
37096    __cil_tmp27 = __cil_tmp26 + 134656;
37097#line 1092
37098    *((bool *)__cil_tmp27) = (bool )0;
37099#line 1093
37100    return (-16);
37101  } else {
37102
37103  }
37104  }
37105#line 1096
37106  return (0);
37107}
37108}
37109#line 1099 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37110static void vmw_pm_complete(struct device *kdev ) 
37111{ struct pci_dev *pdev ;
37112  struct device    *__mptr ;
37113  struct drm_device *dev ;
37114  void *tmp___7 ;
37115  struct vmw_private *dev_priv ;
37116  struct vmw_private *tmp___8 ;
37117  struct pci_dev *__cil_tmp8 ;
37118  unsigned long __cil_tmp9 ;
37119  unsigned long __cil_tmp10 ;
37120  struct device *__cil_tmp11 ;
37121  unsigned int __cil_tmp12 ;
37122  char *__cil_tmp13 ;
37123  char *__cil_tmp14 ;
37124  unsigned long __cil_tmp15 ;
37125  unsigned long __cil_tmp16 ;
37126  bool __cil_tmp17 ;
37127  unsigned long __cil_tmp18 ;
37128  unsigned long __cil_tmp19 ;
37129
37130  {
37131  {
37132#line 1101
37133  __mptr = (struct device    *)kdev;
37134#line 1101
37135  __cil_tmp8 = (struct pci_dev *)0;
37136#line 1101
37137  __cil_tmp9 = (unsigned long )__cil_tmp8;
37138#line 1101
37139  __cil_tmp10 = __cil_tmp9 + 144;
37140#line 1101
37141  __cil_tmp11 = (struct device *)__cil_tmp10;
37142#line 1101
37143  __cil_tmp12 = (unsigned int )__cil_tmp11;
37144#line 1101
37145  __cil_tmp13 = (char *)__mptr;
37146#line 1101
37147  __cil_tmp14 = __cil_tmp13 - __cil_tmp12;
37148#line 1101
37149  pdev = (struct pci_dev *)__cil_tmp14;
37150#line 1102
37151  tmp___7 = pci_get_drvdata(pdev);
37152#line 1102
37153  dev = (struct drm_device *)tmp___7;
37154#line 1103
37155  tmp___8 = vmw_priv(dev);
37156#line 1103
37157  dev_priv = tmp___8;
37158  }
37159  {
37160#line 1109
37161  __cil_tmp15 = (unsigned long )dev_priv;
37162#line 1109
37163  __cil_tmp16 = __cil_tmp15 + 134378;
37164#line 1109
37165  if (*((bool *)__cil_tmp16)) {
37166    {
37167#line 1110
37168    __cil_tmp17 = (bool )0;
37169#line 1110
37170    vmw_3d_resource_inc(dev_priv, __cil_tmp17);
37171    }
37172  } else {
37173
37174  }
37175  }
37176#line 1112
37177  __cil_tmp18 = (unsigned long )dev_priv;
37178#line 1112
37179  __cil_tmp19 = __cil_tmp18 + 134656;
37180#line 1112
37181  *((bool *)__cil_tmp19) = (bool )0;
37182#line 1113
37183  return;
37184}
37185}
37186#line 1115 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37187static struct dev_pm_ops    vmw_pm_ops  = 
37188#line 1115
37189     {& vmw_pm_prepare, & vmw_pm_complete, & vmw_pm_suspend, & vmw_pm_resume, (int (*)(struct device *dev ))0,
37190    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0,
37191    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0,
37192    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0,
37193    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0,
37194    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0,
37195    (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0, (int (*)(struct device *dev ))0};
37196#line 1122 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37197static struct file_operations    vmwgfx_driver_fops  = 
37198#line 1122
37199     {& __this_module, & noop_llseek, & vmw_fops_read, (ssize_t (*)(struct file * ,
37200                                                                  char    * ,
37201                                                                  size_t  , loff_t * ))0,
37202    (ssize_t (*)(struct kiocb * , struct iovec    * , unsigned long  , loff_t  ))0,
37203    (ssize_t (*)(struct kiocb * , struct iovec    * , unsigned long  , loff_t  ))0,
37204    (int (*)(struct file * , void * , int (*)(void * , char    * , int  , loff_t  ,
37205                                              u64  , unsigned int  ) ))0, & vmw_fops_poll,
37206    & vmw_unlocked_ioctl, & drm_compat_ioctl, & vmw_mmap, & drm_open, (int (*)(struct file * ,
37207                                                                               fl_owner_t id ))0,
37208    & drm_release, (int (*)(struct file * , loff_t  , loff_t  , int datasync ))0,
37209    (int (*)(struct kiocb * , int datasync ))0, & drm_fasync, (int (*)(struct file * ,
37210                                                                       int  , struct file_lock * ))0,
37211    (ssize_t (*)(struct file * , struct page * , int  , size_t  , loff_t * , int  ))0,
37212    (unsigned long (*)(struct file * , unsigned long  , unsigned long  , unsigned long  ,
37213                       unsigned long  ))0, (int (*)(int  ))0, (int (*)(struct file * ,
37214                                                                       int  , struct file_lock * ))0,
37215    (ssize_t (*)(struct pipe_inode_info * , struct file * , loff_t * , size_t  , unsigned int  ))0,
37216    (ssize_t (*)(struct file * , loff_t * , struct pipe_inode_info * , size_t  , unsigned int  ))0,
37217    (int (*)(struct file * , long  , struct file_lock ** ))0, (long (*)(struct file *file ,
37218                                                                        int mode ,
37219                                                                        loff_t offset ,
37220                                                                        loff_t len ))0};
37221#line 1137 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37222static struct drm_driver driver  = 
37223#line 1137
37224     {& vmw_driver_load, & vmw_firstopen, & vmw_driver_open, & vmw_preclose, & vmw_postclose,
37225    & vmw_lastclose, & vmw_driver_unload, (int (*)(struct drm_device * , pm_message_t state ))0,
37226    (int (*)(struct drm_device * ))0, (int (*)(struct drm_device *dev , void *data ,
37227                                               struct drm_file *file_priv ))0, (int (*)(struct drm_device * ))((void *)0),
37228    (int (*)(struct drm_device *dev , int context ))0, & vmw_get_vblank_counter, & vmw_enable_vblank,
37229    & vmw_disable_vblank, (int (*)(struct drm_device *dev ))0, (int (*)(struct drm_device *dev ,
37230                                                                        int crtc ,
37231                                                                        int *vpos ,
37232                                                                        int *hpos ))0,
37233    (int (*)(struct drm_device *dev , int crtc , int *max_error , struct timeval *vblank_time ,
37234             unsigned int flags ))0, & vmw_irq_handler, & vmw_irq_preinstall, & vmw_irq_postinstall,
37235    & vmw_irq_uninstall, (void (*)(struct drm_device *dev , struct drm_file *file_priv ))0,
37236    (void (*)(struct drm_device *dev , struct drm_file *file_priv ))((void *)0), (void (*)(struct drm_device *dev ,
37237                                                                                           struct drm_file *file_priv ))0,
37238    (void (*)(struct drm_device *dev , struct drm_set_version *sv ))0, & vmw_master_create,
37239    & vmw_master_destroy, & vmw_master_set, & vmw_master_drop, (int (*)(struct drm_minor *minor ))0,
37240    (void (*)(struct drm_minor *minor ))0, (int (*)(struct drm_gem_object *obj ))0,
37241    (void (*)(struct drm_gem_object *obj ))0, (int (*)(struct drm_gem_object * , struct drm_file * ))0,
37242    (void (*)(struct drm_gem_object * , struct drm_file * ))0, (int (*)(struct drm_device *dev ,
37243                                                                        struct drm_file *file_priv ,
37244                                                                        uint32_t handle ,
37245                                                                        uint32_t flags ,
37246                                                                        int *prime_fd ))0,
37247    (int (*)(struct drm_device *dev , struct drm_file *file_priv , int prime_fd ,
37248             uint32_t *handle ))0, (struct dma_buf *(*)(struct drm_device *dev , struct drm_gem_object *obj ,
37249                                                        int flags ))0, (struct drm_gem_object *(*)(struct drm_device *dev ,
37250                                                                                                   struct dma_buf *dma_buf ))0,
37251    (void (*)(struct drm_device *dev , bool state ))0, (int (*)(struct drm_file *file_priv ,
37252                                                                struct drm_device *dev ,
37253                                                                struct drm_mode_create_dumb *args ))0,
37254    (int (*)(struct drm_file *file_priv , struct drm_device *dev , uint32_t handle ,
37255             uint64_t *offset ))0, (int (*)(struct drm_file *file_priv , struct drm_device *dev ,
37256                                            uint32_t handle ))0, (struct vm_operations_struct *)0,
37257    2, 4, 0, (char *)"vmwgfx", (char *)"Linux drm driver for VMware graphics devices",
37258    (char *)"20120209", (u32 )8384, 0, vmw_ioctls, (int )(sizeof(vmw_ioctls) / sizeof(vmw_ioctls[0]) + sizeof(struct __anonstruct_437 )),
37259    & vmwgfx_driver_fops, {(struct pci_driver *)0}, (struct drm_bus *)0, {(struct list_head *)0,
37260                                                                          (struct list_head *)0}};
37261#line 1171 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37262static struct pci_driver vmw_pci_driver  = 
37263#line 1171
37264     {{(struct list_head *)0, (struct list_head *)0}, "vmwgfx", (struct pci_device_id    *)(vmw_pci_id_list),
37265    & vmw_probe, & vmw_remove, (int (*)(struct pci_dev *dev , pm_message_t state ))0,
37266    (int (*)(struct pci_dev *dev , pm_message_t state ))0, (int (*)(struct pci_dev *dev ))0,
37267    (int (*)(struct pci_dev *dev ))0, (void (*)(struct pci_dev *dev ))0, (struct pci_error_handlers *)0,
37268    {(char    *)0, (struct bus_type *)0, (struct module *)0, (char    *)0,
37269     (_Bool)0, (struct of_device_id    *)0, (int (*)(struct device *dev ))0,
37270     (int (*)(struct device *dev ))0, (void (*)(struct device *dev ))0, (int (*)(struct device *dev ,
37271                                                                                 pm_message_t state ))0,
37272     (int (*)(struct device *dev ))0, (struct attribute_group    **)0, & vmw_pm_ops,
37273     (struct driver_private *)0}, {{{{{{0U}}, 0U, 0U, (void *)0}}}, {(struct list_head *)0,
37274                                                                     (struct list_head *)0}}};
37275#line 1181 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37276static int vmw_probe(struct pci_dev *pdev , struct pci_device_id    *ent ) 
37277{ int tmp___7 ;
37278
37279  {
37280  {
37281#line 1183
37282  tmp___7 = drm_get_pci_dev(pdev, ent, & driver);
37283  }
37284#line 1183
37285  return (tmp___7);
37286}
37287}
37288#line 1186
37289static int vmwgfx_init(void)  __attribute__((__section__(".init.text"), __no_instrument_function__)) ;
37290#line 1186 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37291static int vmwgfx_init(void) 
37292{ int ret ;
37293
37294  {
37295  {
37296#line 1189
37297  ret = drm_pci_init(& driver, & vmw_pci_driver);
37298  }
37299#line 1190
37300  if (ret) {
37301    {
37302#line 1191
37303    drm_err("vmwgfx_init", "Failed initializing DRM.\n");
37304    }
37305  } else {
37306
37307  }
37308#line 1192
37309  return (ret);
37310}
37311}
37312#line 1195
37313static void vmwgfx_exit(void)  __attribute__((__section__(".exit.text"), __no_instrument_function__)) ;
37314#line 1195 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37315static void vmwgfx_exit(void) 
37316{ 
37317
37318  {
37319  {
37320#line 1197
37321  drm_pci_exit(& driver, & vmw_pci_driver);
37322  }
37323#line 1198
37324  return;
37325}
37326}
37327#line 1200 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37328int init_module(void) 
37329{ int tmp___7 ;
37330
37331  {
37332  {
37333#line 1200
37334  tmp___7 = vmwgfx_init();
37335  }
37336#line 1200
37337  return (tmp___7);
37338}
37339}
37340#line 1201 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37341void cleanup_module(void) 
37342{ 
37343
37344  {
37345  {
37346#line 1201
37347  vmwgfx_exit();
37348  }
37349#line 1201
37350  return;
37351}
37352}
37353#line 1203 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37354static char    __mod_author1203[30]  __attribute__((__used__, __unused__, __section__(".modinfo"),
37355__aligned__(1)))  = 
37356#line 1203
37357  {      (char    )'a',      (char    )'u',      (char const   )'t',      (char const   )'h', 
37358        (char    )'o',      (char    )'r',      (char const   )'=',      (char const   )'V', 
37359        (char    )'M',      (char    )'w',      (char const   )'a',      (char const   )'r', 
37360        (char    )'e',      (char    )' ',      (char const   )'I',      (char const   )'n', 
37361        (char    )'c',      (char    )'.',      (char const   )' ',      (char const   )'a', 
37362        (char    )'n',      (char    )'d',      (char const   )' ',      (char const   )'o', 
37363        (char    )'t',      (char    )'h',      (char const   )'e',      (char const   )'r', 
37364        (char    )'s',      (char    )'\000'};
37365#line 1204 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37366static char    __mod_description1204[61]  __attribute__((__used__, __unused__,
37367__section__(".modinfo"), __aligned__(1)))  = 
37368#line 1204
37369  {      (char    )'d',      (char    )'e',      (char const   )'s',      (char const   )'c', 
37370        (char    )'r',      (char    )'i',      (char const   )'p',      (char const   )'t', 
37371        (char    )'i',      (char    )'o',      (char const   )'n',      (char const   )'=', 
37372        (char    )'S',      (char    )'t',      (char const   )'a',      (char const   )'n', 
37373        (char    )'d',      (char    )'a',      (char const   )'l',      (char const   )'o', 
37374        (char    )'n',      (char    )'e',      (char const   )' ',      (char const   )'d', 
37375        (char    )'r',      (char    )'m',      (char const   )' ',      (char const   )'d', 
37376        (char    )'r',      (char    )'i',      (char const   )'v',      (char const   )'e', 
37377        (char    )'r',      (char    )' ',      (char const   )'f',      (char const   )'o', 
37378        (char    )'r',      (char    )' ',      (char const   )'t',      (char const   )'h', 
37379        (char    )'e',      (char    )' ',      (char const   )'V',      (char const   )'M', 
37380        (char    )'w',      (char    )'a',      (char const   )'r',      (char const   )'e', 
37381        (char    )' ',      (char    )'S',      (char const   )'V',      (char const   )'G', 
37382        (char    )'A',      (char    )' ',      (char const   )'d',      (char const   )'e', 
37383        (char    )'v',      (char    )'i',      (char const   )'c',      (char const   )'e', 
37384        (char    )'\000'};
37385#line 1205 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37386static char    __mod_license1205[34]  __attribute__((__used__, __unused__, __section__(".modinfo"),
37387__aligned__(1)))  = 
37388#line 1205
37389  {      (char    )'l',      (char    )'i',      (char const   )'c',      (char const   )'e', 
37390        (char    )'n',      (char    )'s',      (char const   )'e',      (char const   )'=', 
37391        (char    )'G',      (char    )'P',      (char const   )'L',      (char const   )' ', 
37392        (char    )'a',      (char    )'n',      (char const   )'d',      (char const   )' ', 
37393        (char    )'a',      (char    )'d',      (char const   )'d',      (char const   )'i', 
37394        (char    )'t',      (char    )'i',      (char const   )'o',      (char const   )'n', 
37395        (char    )'a',      (char    )'l',      (char const   )' ',      (char const   )'r', 
37396        (char    )'i',      (char    )'g',      (char const   )'h',      (char const   )'t', 
37397        (char    )'s',      (char    )'\000'};
37398#line 1206 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37399static char    __mod_version1209[16]  __attribute__((__used__, __unused__, __section__(".modinfo"),
37400__aligned__(1)))  = 
37401#line 1206
37402  {      (char    )'v',      (char    )'e',      (char const   )'r',      (char const   )'s', 
37403        (char    )'i',      (char    )'o',      (char const   )'n',      (char const   )'=', 
37404        (char    )'2',      (char    )'.',      (char const   )'4',      (char const   )'.', 
37405        (char    )'0',      (char    )'.',      (char const   )'0',      (char const   )'\000'};
37406#line 1230
37407extern void ldv_check_return_value(int res ) ;
37408#line 2362 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37409static int res_vmw_driver_open_12  ;
37410#line 2606 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37411static int res_vmw_probe_29  ;
37412#line 1242 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c"
37413void main(void) 
37414{ struct device *var_group1 ;
37415  struct file *var_group2 ;
37416  unsigned int var_vmw_unlocked_ioctl_13_p1 ;
37417  unsigned long var_vmw_unlocked_ioctl_13_p2 ;
37418  struct drm_device *var_group3 ;
37419  unsigned long var_vmw_driver_load_8_p1 ;
37420  struct drm_master *var_group4 ;
37421  struct drm_file *var_group5 ;
37422  bool var_vmw_master_set_19_p2 ;
37423  bool var_vmw_master_drop_20_p2 ;
37424  struct pci_dev *var_group6 ;
37425  struct pci_device_id    *var_vmw_probe_29_p1 ;
37426  int tmp___7 ;
37427  int ldv_s_driver_drm_driver ;
37428  int ldv_s_vmw_pci_driver_pci_driver ;
37429  int tmp___8 ;
37430  int tmp___9 ;
37431  int __cil_tmp18 ;
37432  int __cil_tmp19 ;
37433
37434  {
37435  {
37436#line 2692
37437  LDV_IN_INTERRUPT = 1;
37438#line 2701
37439  ldv_initialize();
37440#line 2781
37441  tmp___7 = vmwgfx_init();
37442  }
37443#line 2781
37444  if (tmp___7) {
37445#line 2782
37446    goto ldv_final;
37447  } else {
37448
37449  }
37450#line 2787
37451  ldv_s_driver_drm_driver = 0;
37452#line 2790
37453  ldv_s_vmw_pci_driver_pci_driver = 0;
37454  {
37455#line 2794
37456  while (1) {
37457    while_continue: /* CIL Label */ ;
37458    {
37459#line 2794
37460    tmp___9 = __VERIFIER_nondet_int();
37461    }
37462#line 2794
37463    if (tmp___9) {
37464
37465    } else {
37466      {
37467#line 2794
37468      __cil_tmp18 = ldv_s_driver_drm_driver == 0;
37469#line 2794
37470      if (! __cil_tmp18) {
37471
37472      } else {
37473        {
37474#line 2794
37475        __cil_tmp19 = ldv_s_vmw_pci_driver_pci_driver == 0;
37476#line 2794
37477        if (! __cil_tmp19) {
37478
37479        } else {
37480#line 2794
37481          goto while_break;
37482        }
37483        }
37484      }
37485      }
37486    }
37487    {
37488#line 2799
37489    tmp___8 = __VERIFIER_nondet_int();
37490    }
37491#line 2801
37492    if (tmp___8 == 0) {
37493#line 2801
37494      goto case_0;
37495    } else
37496#line 2893
37497    if (tmp___8 == 1) {
37498#line 2893
37499      goto case_1;
37500    } else
37501#line 2985
37502    if (tmp___8 == 2) {
37503#line 2985
37504      goto case_2;
37505    } else
37506#line 3077
37507    if (tmp___8 == 3) {
37508#line 3077
37509      goto case_3;
37510    } else
37511#line 3169
37512    if (tmp___8 == 4) {
37513#line 3169
37514      goto case_4;
37515    } else
37516#line 3261
37517    if (tmp___8 == 5) {
37518#line 3261
37519      goto case_5;
37520    } else
37521#line 3356
37522    if (tmp___8 == 6) {
37523#line 3356
37524      goto case_6;
37525    } else
37526#line 3448
37527    if (tmp___8 == 7) {
37528#line 3448
37529      goto case_7;
37530    } else
37531#line 3540
37532    if (tmp___8 == 8) {
37533#line 3540
37534      goto case_8;
37535    } else
37536#line 3632
37537    if (tmp___8 == 9) {
37538#line 3632
37539      goto case_9;
37540    } else
37541#line 3724
37542    if (tmp___8 == 10) {
37543#line 3724
37544      goto case_10;
37545    } else
37546#line 3816
37547    if (tmp___8 == 11) {
37548#line 3816
37549      goto case_11;
37550    } else
37551#line 3908
37552    if (tmp___8 == 12) {
37553#line 3908
37554      goto case_12;
37555    } else
37556#line 4000
37557    if (tmp___8 == 13) {
37558#line 4000
37559      goto case_13;
37560    } else
37561#line 4092
37562    if (tmp___8 == 14) {
37563#line 4092
37564      goto case_14;
37565    } else
37566#line 4184
37567    if (tmp___8 == 15) {
37568#line 4184
37569      goto case_15;
37570    } else
37571#line 4276
37572    if (tmp___8 == 16) {
37573#line 4276
37574      goto case_16;
37575    } else
37576#line 4369
37577    if (tmp___8 == 17) {
37578#line 4369
37579      goto case_17;
37580    } else {
37581      {
37582#line 4461
37583      goto switch_default;
37584#line 2799
37585      if (0) {
37586        case_0: /* CIL Label */ 
37587        {
37588#line 2881
37589        vmw_pm_prepare(var_group1);
37590        }
37591#line 2892
37592        goto switch_break;
37593        case_1: /* CIL Label */ 
37594        {
37595#line 2973
37596        vmw_pm_complete(var_group1);
37597        }
37598#line 2984
37599        goto switch_break;
37600        case_2: /* CIL Label */ 
37601        {
37602#line 3065
37603        vmw_pm_suspend(var_group1);
37604        }
37605#line 3076
37606        goto switch_break;
37607        case_3: /* CIL Label */ 
37608        {
37609#line 3157
37610        vmw_pm_resume(var_group1);
37611        }
37612#line 3168
37613        goto switch_break;
37614        case_4: /* CIL Label */ 
37615        {
37616#line 3249
37617        vmw_unlocked_ioctl(var_group2, var_vmw_unlocked_ioctl_13_p1, var_vmw_unlocked_ioctl_13_p2);
37618        }
37619#line 3260
37620        goto switch_break;
37621        case_5: /* CIL Label */ 
37622#line 3264
37623        if (ldv_s_driver_drm_driver == 0) {
37624          {
37625#line 3341
37626          res_vmw_driver_open_12 = vmw_driver_open(var_group3, var_group5);
37627#line 3342
37628          ldv_check_return_value(res_vmw_driver_open_12);
37629          }
37630#line 3343
37631          if (res_vmw_driver_open_12) {
37632#line 3344
37633            goto ldv_module_exit;
37634          } else {
37635
37636          }
37637#line 3349
37638          ldv_s_driver_drm_driver = 0;
37639        } else {
37640
37641        }
37642#line 3355
37643        goto switch_break;
37644        case_6: /* CIL Label */ 
37645        {
37646#line 3436
37647        vmw_driver_load(var_group3, var_vmw_driver_load_8_p1);
37648        }
37649#line 3447
37650        goto switch_break;
37651        case_7: /* CIL Label */ 
37652        {
37653#line 3528
37654        vmw_driver_unload(var_group3);
37655        }
37656#line 3539
37657        goto switch_break;
37658        case_8: /* CIL Label */ 
37659        {
37660#line 3620
37661        vmw_firstopen(var_group3);
37662        }
37663#line 3631
37664        goto switch_break;
37665        case_9: /* CIL Label */ 
37666        {
37667#line 3712
37668        vmw_lastclose(var_group3);
37669        }
37670#line 3723
37671        goto switch_break;
37672        case_10: /* CIL Label */ 
37673        {
37674#line 3804
37675        vmw_master_create(var_group3, var_group4);
37676        }
37677#line 3815
37678        goto switch_break;
37679        case_11: /* CIL Label */ 
37680        {
37681#line 3896
37682        vmw_master_destroy(var_group3, var_group4);
37683        }
37684#line 3907
37685        goto switch_break;
37686        case_12: /* CIL Label */ 
37687        {
37688#line 3988
37689        vmw_master_set(var_group3, var_group5, var_vmw_master_set_19_p2);
37690        }
37691#line 3999
37692        goto switch_break;
37693        case_13: /* CIL Label */ 
37694        {
37695#line 4080
37696        vmw_master_drop(var_group3, var_group5, var_vmw_master_drop_20_p2);
37697        }
37698#line 4091
37699        goto switch_break;
37700        case_14: /* CIL Label */ 
37701        {
37702#line 4172
37703        vmw_preclose(var_group3, var_group5);
37704        }
37705#line 4183
37706        goto switch_break;
37707        case_15: /* CIL Label */ 
37708        {
37709#line 4264
37710        vmw_postclose(var_group3, var_group5);
37711        }
37712#line 4275
37713        goto switch_break;
37714        case_16: /* CIL Label */ 
37715#line 4279
37716        if (ldv_s_vmw_pci_driver_pci_driver == 0) {
37717          {
37718#line 4358
37719          res_vmw_probe_29 = vmw_probe(var_group6, var_vmw_probe_29_p1);
37720#line 4359
37721          ldv_check_return_value(res_vmw_probe_29);
37722          }
37723#line 4360
37724          if (res_vmw_probe_29) {
37725#line 4361
37726            goto ldv_module_exit;
37727          } else {
37728
37729          }
37730#line 4362
37731          ldv_s_vmw_pci_driver_pci_driver = 0;
37732        } else {
37733
37734        }
37735#line 4368
37736        goto switch_break;
37737        case_17: /* CIL Label */ 
37738        {
37739#line 4449
37740        vmw_remove(var_group6);
37741        }
37742#line 4460
37743        goto switch_break;
37744        switch_default: /* CIL Label */ 
37745#line 4461
37746        goto switch_break;
37747      } else {
37748        switch_break: /* CIL Label */ ;
37749      }
37750      }
37751    }
37752  }
37753  while_break: /* CIL Label */ ;
37754  }
37755  ldv_module_exit: 
37756  {
37757#line 4547
37758  vmwgfx_exit();
37759  }
37760  ldv_final: 
37761  {
37762#line 4550
37763  ldv_check_final_state();
37764  }
37765#line 4553
37766  return;
37767}
37768}
37769#line 62 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/string_64.h"
37770extern char *strcpy(char *dest , char    *src ) ;
37771#line 93 "include/linux/spinlock.h"
37772extern void __raw_spin_lock_init(raw_spinlock_t *lock , char    *name , struct lock_class_key *key ) ;
37773#line 32 "include/linux/spinlock_api_smp.h"
37774extern unsigned long _raw_spin_lock_irqsave(raw_spinlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
37775#line 42
37776extern void _raw_spin_unlock_irqrestore(raw_spinlock_t *lock , unsigned long flags )  __attribute__((__section__(".spinlock.text"))) ;
37777#line 272 "include/linux/spinlock.h"
37778__inline static raw_spinlock_t *spinlock_check(spinlock_t *lock )  __attribute__((__no_instrument_function__)) ;
37779#line 272 "include/linux/spinlock.h"
37780__inline static raw_spinlock_t *spinlock_check(spinlock_t *lock ) 
37781{ 
37782
37783  {
37784#line 274
37785  return ((struct raw_spinlock *)lock);
37786}
37787}
37788#line 338
37789__inline static void spin_unlock_irqrestore(spinlock_t *lock , unsigned long flags )  __attribute__((__no_instrument_function__)) ;
37790#line 338 "include/linux/spinlock.h"
37791__inline static void spin_unlock_irqrestore(spinlock_t *lock , unsigned long flags ) 
37792{ struct raw_spinlock *__cil_tmp5 ;
37793
37794  {
37795  {
37796#line 340
37797  while (1) {
37798    while_continue: /* CIL Label */ ;
37799    {
37800#line 340
37801    __cil_tmp5 = (struct raw_spinlock *)lock;
37802#line 340
37803    _raw_spin_unlock_irqrestore(__cil_tmp5, flags);
37804    }
37805#line 340
37806    goto while_break;
37807  }
37808  while_break: /* CIL Label */ ;
37809  }
37810#line 341
37811  return;
37812}
37813}
37814#line 382 "include/linux/workqueue.h"
37815extern int schedule_delayed_work(struct delayed_work *work , unsigned long delay ) ;
37816#line 395
37817extern bool flush_delayed_work_sync(struct delayed_work *work ) ;
37818#line 898 "include/linux/fb.h"
37819__inline static struct apertures_struct *alloc_apertures(unsigned int max_num )  __attribute__((__no_instrument_function__)) ;
37820#line 898 "include/linux/fb.h"
37821__inline static struct apertures_struct *alloc_apertures(unsigned int max_num ) 
37822{ struct apertures_struct *a ;
37823  void *tmp___7 ;
37824  unsigned long __cil_tmp4 ;
37825  unsigned long __cil_tmp5 ;
37826  unsigned long __cil_tmp6 ;
37827  void *__cil_tmp7 ;
37828
37829  {
37830  {
37831#line 899
37832  __cil_tmp4 = (unsigned long )max_num;
37833#line 899
37834  __cil_tmp5 = __cil_tmp4 * 16UL;
37835#line 899
37836  __cil_tmp6 = 8UL + __cil_tmp5;
37837#line 899
37838  tmp___7 = kzalloc(__cil_tmp6, 208U);
37839#line 899
37840  a = (struct apertures_struct *)tmp___7;
37841  }
37842#line 901
37843  if (! a) {
37844    {
37845#line 902
37846    __cil_tmp7 = (void *)0;
37847#line 902
37848    return ((struct apertures_struct *)__cil_tmp7);
37849    }
37850  } else {
37851
37852  }
37853#line 903
37854  *((unsigned int *)a) = max_num;
37855#line 904
37856  return (a);
37857}
37858}
37859#line 988
37860extern void cfb_fillrect(struct fb_info *info , struct fb_fillrect    *rect ) ;
37861#line 989
37862extern void cfb_copyarea(struct fb_info *info , struct fb_copyarea    *area ) ;
37863#line 990
37864extern void cfb_imageblit(struct fb_info *info , struct fb_image    *image ) ;
37865#line 1003
37866extern int register_framebuffer(struct fb_info *fb_info ) ;
37867#line 1004
37868extern int unregister_framebuffer(struct fb_info *fb_info ) ;
37869#line 1047
37870extern void fb_deferred_io_init(struct fb_info *info ) ;
37871#line 1051
37872extern void fb_deferred_io_cleanup(struct fb_info *info ) ;
37873#line 1075
37874extern struct fb_info *framebuffer_alloc(size_t size , struct device *dev ) ;
37875#line 1076
37876extern void framebuffer_release(struct fb_info *info ) ;
37877#line 134 "include/drm/ttm/ttm_lock.h"
37878extern void ttm_write_unlock(struct ttm_lock *lock ) ;
37879#line 146
37880extern int ttm_write_lock(struct ttm_lock *lock , bool interruptible ) ;
37881#line 420 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
37882void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo ) ;
37883#line 421
37884int vmw_dmabuf_init(struct vmw_private *dev_priv , struct vmw_dma_buffer *vmw_bo ,
37885                    size_t size , struct ttm_placement *placement , bool interruptible ,
37886                    void (*bo_free)(struct ttm_buffer_object *bo ) ) ;
37887#line 516
37888struct ttm_placement vmw_vram_ne_placement ;
37889#line 604
37890int vmw_fb_off(struct vmw_private *vmw_priv___0 ) ;
37891#line 656
37892int vmw_overlay_stop_all(struct vmw_private *dev_priv ) ;
37893#line 69 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
37894static int vmw_fb_setcolreg(unsigned int regno , unsigned int red , unsigned int green ,
37895                            unsigned int blue , unsigned int transp , struct fb_info *info ) 
37896{ struct vmw_fb_par *par ;
37897  u32 *pal ;
37898  unsigned long __cil_tmp9 ;
37899  unsigned long __cil_tmp10 ;
37900  void *__cil_tmp11 ;
37901  unsigned long __cil_tmp12 ;
37902  unsigned long __cil_tmp13 ;
37903  unsigned long __cil_tmp14 ;
37904  unsigned long __cil_tmp15 ;
37905  unsigned long __cil_tmp16 ;
37906  unsigned long __cil_tmp17 ;
37907  unsigned int __cil_tmp18 ;
37908  u32 *__cil_tmp19 ;
37909  unsigned int __cil_tmp20 ;
37910  unsigned int __cil_tmp21 ;
37911  unsigned int __cil_tmp22 ;
37912  unsigned int __cil_tmp23 ;
37913  unsigned int __cil_tmp24 ;
37914  unsigned int __cil_tmp25 ;
37915  unsigned long __cil_tmp26 ;
37916  unsigned long __cil_tmp27 ;
37917  unsigned int __cil_tmp28 ;
37918  unsigned long __cil_tmp29 ;
37919  unsigned long __cil_tmp30 ;
37920  unsigned int __cil_tmp31 ;
37921
37922  {
37923#line 73
37924  __cil_tmp9 = (unsigned long )info;
37925#line 73
37926  __cil_tmp10 = __cil_tmp9 + 1160;
37927#line 73
37928  __cil_tmp11 = *((void **)__cil_tmp10);
37929#line 73
37930  par = (struct vmw_fb_par *)__cil_tmp11;
37931#line 74
37932  __cil_tmp12 = 0 * 4UL;
37933#line 74
37934  __cil_tmp13 = 56 + __cil_tmp12;
37935#line 74
37936  __cil_tmp14 = (unsigned long )par;
37937#line 74
37938  __cil_tmp15 = __cil_tmp14 + __cil_tmp13;
37939#line 74
37940  pal = (u32 *)__cil_tmp15;
37941#line 76
37942  if (regno > 15U) {
37943    {
37944#line 77
37945    drm_err("vmw_fb_setcolreg", "Bad regno %u.\n", regno);
37946    }
37947#line 78
37948    return (1);
37949  } else {
37950
37951  }
37952  {
37953#line 81
37954  __cil_tmp16 = (unsigned long )par;
37955#line 81
37956  __cil_tmp17 = __cil_tmp16 + 124;
37957#line 81
37958  __cil_tmp18 = *((unsigned int *)__cil_tmp17);
37959#line 82
37960  if ((int )__cil_tmp18 == 24) {
37961#line 82
37962    goto case_24;
37963  } else
37964#line 83
37965  if ((int )__cil_tmp18 == 32) {
37966#line 83
37967    goto case_24;
37968  } else {
37969    {
37970#line 88
37971    goto switch_default;
37972#line 81
37973    if (0) {
37974      case_24: /* CIL Label */ 
37975      case_32: /* CIL Label */ 
37976#line 84
37977      __cil_tmp19 = pal + regno;
37978#line 84
37979      __cil_tmp20 = blue & 65280U;
37980#line 84
37981      __cil_tmp21 = __cil_tmp20 >> 8;
37982#line 84
37983      __cil_tmp22 = green & 65280U;
37984#line 84
37985      __cil_tmp23 = red & 65280U;
37986#line 84
37987      __cil_tmp24 = __cil_tmp23 << 8;
37988#line 84
37989      __cil_tmp25 = __cil_tmp24 | __cil_tmp22;
37990#line 84
37991      *__cil_tmp19 = __cil_tmp25 | __cil_tmp21;
37992#line 87
37993      goto switch_break;
37994      switch_default: /* CIL Label */ 
37995      {
37996#line 89
37997      __cil_tmp26 = (unsigned long )par;
37998#line 89
37999      __cil_tmp27 = __cil_tmp26 + 124;
38000#line 89
38001      __cil_tmp28 = *((unsigned int *)__cil_tmp27);
38002#line 89
38003      __cil_tmp29 = (unsigned long )par;
38004#line 89
38005      __cil_tmp30 = __cil_tmp29 + 128;
38006#line 89
38007      __cil_tmp31 = *((unsigned int *)__cil_tmp30);
38008#line 89
38009      drm_err("vmw_fb_setcolreg", "Bad depth %u, bpp %u.\n", __cil_tmp28, __cil_tmp31);
38010      }
38011#line 90
38012      return (1);
38013    } else {
38014      switch_break: /* CIL Label */ ;
38015    }
38016    }
38017  }
38018  }
38019#line 93
38020  return (0);
38021}
38022}
38023#line 96 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
38024static int vmw_fb_check_var(struct fb_var_screeninfo *var , struct fb_info *info ) 
38025{ int depth ;
38026  struct vmw_fb_par *par ;
38027  struct vmw_private *vmw_priv___0 ;
38028  bool tmp___7 ;
38029  unsigned long __cil_tmp7 ;
38030  unsigned long __cil_tmp8 ;
38031  __u32 __cil_tmp9 ;
38032  unsigned long __cil_tmp10 ;
38033  unsigned long __cil_tmp11 ;
38034  void *__cil_tmp12 ;
38035  unsigned long __cil_tmp13 ;
38036  unsigned long __cil_tmp14 ;
38037  __u32 __cil_tmp15 ;
38038  unsigned long __cil_tmp16 ;
38039  unsigned long __cil_tmp17 ;
38040  unsigned long __cil_tmp18 ;
38041  __u32 __cil_tmp19 ;
38042  unsigned long __cil_tmp20 ;
38043  unsigned long __cil_tmp21 ;
38044  __u32 __cil_tmp22 ;
38045  unsigned long __cil_tmp23 ;
38046  unsigned long __cil_tmp24 ;
38047  unsigned long __cil_tmp25 ;
38048  unsigned long __cil_tmp26 ;
38049  unsigned long __cil_tmp27 ;
38050  unsigned long __cil_tmp28 ;
38051  unsigned long __cil_tmp29 ;
38052  unsigned long __cil_tmp30 ;
38053  unsigned long __cil_tmp31 ;
38054  unsigned long __cil_tmp32 ;
38055  unsigned long __cil_tmp33 ;
38056  unsigned long __cil_tmp34 ;
38057  unsigned long __cil_tmp35 ;
38058  unsigned long __cil_tmp36 ;
38059  unsigned long __cil_tmp37 ;
38060  unsigned long __cil_tmp38 ;
38061  unsigned long __cil_tmp39 ;
38062  unsigned long __cil_tmp40 ;
38063  unsigned long __cil_tmp41 ;
38064  unsigned long __cil_tmp42 ;
38065  unsigned long __cil_tmp43 ;
38066  unsigned long __cil_tmp44 ;
38067  unsigned long __cil_tmp45 ;
38068  unsigned long __cil_tmp46 ;
38069  unsigned long __cil_tmp47 ;
38070  unsigned long __cil_tmp48 ;
38071  unsigned long __cil_tmp49 ;
38072  unsigned long __cil_tmp50 ;
38073  unsigned long __cil_tmp51 ;
38074  unsigned long __cil_tmp52 ;
38075  unsigned long __cil_tmp53 ;
38076  unsigned long __cil_tmp54 ;
38077  unsigned long __cil_tmp55 ;
38078  unsigned long __cil_tmp56 ;
38079  unsigned long __cil_tmp57 ;
38080  unsigned long __cil_tmp58 ;
38081  unsigned long __cil_tmp59 ;
38082  unsigned long __cil_tmp60 ;
38083  unsigned long __cil_tmp61 ;
38084  unsigned long __cil_tmp62 ;
38085  unsigned long __cil_tmp63 ;
38086  unsigned long __cil_tmp64 ;
38087  uint32_t __cil_tmp65 ;
38088  unsigned int __cil_tmp66 ;
38089  unsigned long __cil_tmp67 ;
38090  unsigned long __cil_tmp68 ;
38091  __u32 __cil_tmp69 ;
38092  unsigned long __cil_tmp70 ;
38093  unsigned long __cil_tmp71 ;
38094  __u32 __cil_tmp72 ;
38095  unsigned long __cil_tmp73 ;
38096  unsigned long __cil_tmp74 ;
38097  unsigned int __cil_tmp75 ;
38098  __u32 __cil_tmp76 ;
38099  unsigned long __cil_tmp77 ;
38100  unsigned long __cil_tmp78 ;
38101  __u32 __cil_tmp79 ;
38102  __u32 __cil_tmp80 ;
38103  unsigned long __cil_tmp81 ;
38104  unsigned long __cil_tmp82 ;
38105  unsigned int __cil_tmp83 ;
38106  unsigned long __cil_tmp84 ;
38107  unsigned long __cil_tmp85 ;
38108  __u32 __cil_tmp86 ;
38109  unsigned long __cil_tmp87 ;
38110  unsigned long __cil_tmp88 ;
38111  __u32 __cil_tmp89 ;
38112  __u32 __cil_tmp90 ;
38113  unsigned long __cil_tmp91 ;
38114  unsigned long __cil_tmp92 ;
38115  unsigned long __cil_tmp93 ;
38116  __u32 __cil_tmp94 ;
38117  unsigned long __cil_tmp95 ;
38118  unsigned long __cil_tmp96 ;
38119  __u32 __cil_tmp97 ;
38120  unsigned long __cil_tmp98 ;
38121  unsigned long __cil_tmp99 ;
38122  __u32 __cil_tmp100 ;
38123  __u32 __cil_tmp101 ;
38124
38125  {
38126#line 99
38127  __cil_tmp7 = (unsigned long )var;
38128#line 99
38129  __cil_tmp8 = __cil_tmp7 + 24;
38130#line 99
38131  __cil_tmp9 = *((__u32 *)__cil_tmp8);
38132#line 99
38133  depth = (int )__cil_tmp9;
38134#line 100
38135  __cil_tmp10 = (unsigned long )info;
38136#line 100
38137  __cil_tmp11 = __cil_tmp10 + 1160;
38138#line 100
38139  __cil_tmp12 = *((void **)__cil_tmp11);
38140#line 100
38141  par = (struct vmw_fb_par *)__cil_tmp12;
38142#line 101
38143  vmw_priv___0 = *((struct vmw_private **)par);
38144  {
38145#line 103
38146  __cil_tmp13 = (unsigned long )var;
38147#line 103
38148  __cil_tmp14 = __cil_tmp13 + 24;
38149#line 103
38150  __cil_tmp15 = *((__u32 *)__cil_tmp14);
38151#line 104
38152  if ((int )__cil_tmp15 == 32) {
38153#line 104
38154    goto case_32;
38155  } else {
38156    {
38157#line 107
38158    goto switch_default;
38159#line 103
38160    if (0) {
38161      case_32: /* CIL Label */ 
38162      {
38163#line 105
38164      __cil_tmp16 = 68 + 4;
38165#line 105
38166      __cil_tmp17 = (unsigned long )var;
38167#line 105
38168      __cil_tmp18 = __cil_tmp17 + __cil_tmp16;
38169#line 105
38170      __cil_tmp19 = *((__u32 *)__cil_tmp18);
38171#line 105
38172      if (__cil_tmp19 > 0U) {
38173#line 105
38174        depth = 32;
38175      } else {
38176#line 105
38177        depth = 24;
38178      }
38179      }
38180#line 106
38181      goto switch_break;
38182      switch_default: /* CIL Label */ 
38183      {
38184#line 108
38185      __cil_tmp20 = (unsigned long )var;
38186#line 108
38187      __cil_tmp21 = __cil_tmp20 + 24;
38188#line 108
38189      __cil_tmp22 = *((__u32 *)__cil_tmp21);
38190#line 108
38191      drm_err("vmw_fb_check_var", "Bad bpp %u.\n", __cil_tmp22);
38192      }
38193#line 109
38194      return (-22);
38195    } else {
38196      switch_break: /* CIL Label */ ;
38197    }
38198    }
38199  }
38200  }
38201#line 113
38202  if (depth == 24) {
38203#line 113
38204    goto case_24;
38205  } else
38206#line 123
38207  if (depth == 32) {
38208#line 123
38209    goto case_32___0;
38210  } else {
38211    {
38212#line 133
38213    goto switch_default___0;
38214#line 112
38215    if (0) {
38216      case_24: /* CIL Label */ 
38217#line 114
38218      __cil_tmp23 = (unsigned long )var;
38219#line 114
38220      __cil_tmp24 = __cil_tmp23 + 32;
38221#line 114
38222      *((__u32 *)__cil_tmp24) = (__u32 )16;
38223#line 115
38224      __cil_tmp25 = (unsigned long )var;
38225#line 115
38226      __cil_tmp26 = __cil_tmp25 + 44;
38227#line 115
38228      *((__u32 *)__cil_tmp26) = (__u32 )8;
38229#line 116
38230      __cil_tmp27 = (unsigned long )var;
38231#line 116
38232      __cil_tmp28 = __cil_tmp27 + 56;
38233#line 116
38234      *((__u32 *)__cil_tmp28) = (__u32 )0;
38235#line 117
38236      __cil_tmp29 = 32 + 4;
38237#line 117
38238      __cil_tmp30 = (unsigned long )var;
38239#line 117
38240      __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
38241#line 117
38242      *((__u32 *)__cil_tmp31) = (__u32 )8;
38243#line 118
38244      __cil_tmp32 = 44 + 4;
38245#line 118
38246      __cil_tmp33 = (unsigned long )var;
38247#line 118
38248      __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
38249#line 118
38250      *((__u32 *)__cil_tmp34) = (__u32 )8;
38251#line 119
38252      __cil_tmp35 = 56 + 4;
38253#line 119
38254      __cil_tmp36 = (unsigned long )var;
38255#line 119
38256      __cil_tmp37 = __cil_tmp36 + __cil_tmp35;
38257#line 119
38258      *((__u32 *)__cil_tmp37) = (__u32 )8;
38259#line 120
38260      __cil_tmp38 = 68 + 4;
38261#line 120
38262      __cil_tmp39 = (unsigned long )var;
38263#line 120
38264      __cil_tmp40 = __cil_tmp39 + __cil_tmp38;
38265#line 120
38266      *((__u32 *)__cil_tmp40) = (__u32 )0;
38267#line 121
38268      __cil_tmp41 = (unsigned long )var;
38269#line 121
38270      __cil_tmp42 = __cil_tmp41 + 68;
38271#line 121
38272      *((__u32 *)__cil_tmp42) = (__u32 )0;
38273#line 122
38274      goto switch_break___0;
38275      case_32___0: /* CIL Label */ 
38276#line 124
38277      __cil_tmp43 = (unsigned long )var;
38278#line 124
38279      __cil_tmp44 = __cil_tmp43 + 32;
38280#line 124
38281      *((__u32 *)__cil_tmp44) = (__u32 )16;
38282#line 125
38283      __cil_tmp45 = (unsigned long )var;
38284#line 125
38285      __cil_tmp46 = __cil_tmp45 + 44;
38286#line 125
38287      *((__u32 *)__cil_tmp46) = (__u32 )8;
38288#line 126
38289      __cil_tmp47 = (unsigned long )var;
38290#line 126
38291      __cil_tmp48 = __cil_tmp47 + 56;
38292#line 126
38293      *((__u32 *)__cil_tmp48) = (__u32 )0;
38294#line 127
38295      __cil_tmp49 = 32 + 4;
38296#line 127
38297      __cil_tmp50 = (unsigned long )var;
38298#line 127
38299      __cil_tmp51 = __cil_tmp50 + __cil_tmp49;
38300#line 127
38301      *((__u32 *)__cil_tmp51) = (__u32 )8;
38302#line 128
38303      __cil_tmp52 = 44 + 4;
38304#line 128
38305      __cil_tmp53 = (unsigned long )var;
38306#line 128
38307      __cil_tmp54 = __cil_tmp53 + __cil_tmp52;
38308#line 128
38309      *((__u32 *)__cil_tmp54) = (__u32 )8;
38310#line 129
38311      __cil_tmp55 = 56 + 4;
38312#line 129
38313      __cil_tmp56 = (unsigned long )var;
38314#line 129
38315      __cil_tmp57 = __cil_tmp56 + __cil_tmp55;
38316#line 129
38317      *((__u32 *)__cil_tmp57) = (__u32 )8;
38318#line 130
38319      __cil_tmp58 = 68 + 4;
38320#line 130
38321      __cil_tmp59 = (unsigned long )var;
38322#line 130
38323      __cil_tmp60 = __cil_tmp59 + __cil_tmp58;
38324#line 130
38325      *((__u32 *)__cil_tmp60) = (__u32 )8;
38326#line 131
38327      __cil_tmp61 = (unsigned long )var;
38328#line 131
38329      __cil_tmp62 = __cil_tmp61 + 68;
38330#line 131
38331      *((__u32 *)__cil_tmp62) = (__u32 )24;
38332#line 132
38333      goto switch_break___0;
38334      switch_default___0: /* CIL Label */ 
38335      {
38336#line 134
38337      drm_err("vmw_fb_check_var", "Bad depth %u.\n", depth);
38338      }
38339#line 135
38340      return (-22);
38341    } else {
38342      switch_break___0: /* CIL Label */ ;
38343    }
38344    }
38345  }
38346  {
38347#line 138
38348  __cil_tmp63 = (unsigned long )vmw_priv___0;
38349#line 138
38350  __cil_tmp64 = __cil_tmp63 + 2156;
38351#line 138
38352  __cil_tmp65 = *((uint32_t *)__cil_tmp64);
38353#line 138
38354  __cil_tmp66 = __cil_tmp65 & 524288U;
38355#line 138
38356  if (! __cil_tmp66) {
38357    {
38358#line 138
38359    __cil_tmp67 = (unsigned long )var;
38360#line 138
38361    __cil_tmp68 = __cil_tmp67 + 16;
38362#line 138
38363    __cil_tmp69 = *((__u32 *)__cil_tmp68);
38364#line 138
38365    if (__cil_tmp69 != 0U) {
38366      {
38367#line 140
38368      drm_err("vmw_fb_check_var", "Can not handle panning without display topology\n");
38369      }
38370#line 141
38371      return (-22);
38372    } else {
38373      {
38374#line 138
38375      __cil_tmp70 = (unsigned long )var;
38376#line 138
38377      __cil_tmp71 = __cil_tmp70 + 20;
38378#line 138
38379      __cil_tmp72 = *((__u32 *)__cil_tmp71);
38380#line 138
38381      if (__cil_tmp72 != 0U) {
38382        {
38383#line 140
38384        drm_err("vmw_fb_check_var", "Can not handle panning without display topology\n");
38385        }
38386#line 141
38387        return (-22);
38388      } else {
38389
38390      }
38391      }
38392    }
38393    }
38394  } else {
38395
38396  }
38397  }
38398  {
38399#line 144
38400  __cil_tmp73 = (unsigned long )par;
38401#line 144
38402  __cil_tmp74 = __cil_tmp73 + 132;
38403#line 144
38404  __cil_tmp75 = *((unsigned int *)__cil_tmp74);
38405#line 144
38406  __cil_tmp76 = *((__u32 *)var);
38407#line 144
38408  __cil_tmp77 = (unsigned long )var;
38409#line 144
38410  __cil_tmp78 = __cil_tmp77 + 16;
38411#line 144
38412  __cil_tmp79 = *((__u32 *)__cil_tmp78);
38413#line 144
38414  __cil_tmp80 = __cil_tmp79 + __cil_tmp76;
38415#line 144
38416  if (__cil_tmp80 > __cil_tmp75) {
38417    {
38418#line 146
38419    drm_err("vmw_fb_check_var", "Requested geom can not fit in framebuffer\n");
38420    }
38421#line 147
38422    return (-22);
38423  } else {
38424    {
38425#line 144
38426    __cil_tmp81 = (unsigned long )par;
38427#line 144
38428    __cil_tmp82 = __cil_tmp81 + 136;
38429#line 144
38430    __cil_tmp83 = *((unsigned int *)__cil_tmp82);
38431#line 144
38432    __cil_tmp84 = (unsigned long )var;
38433#line 144
38434    __cil_tmp85 = __cil_tmp84 + 4;
38435#line 144
38436    __cil_tmp86 = *((__u32 *)__cil_tmp85);
38437#line 144
38438    __cil_tmp87 = (unsigned long )var;
38439#line 144
38440    __cil_tmp88 = __cil_tmp87 + 20;
38441#line 144
38442    __cil_tmp89 = *((__u32 *)__cil_tmp88);
38443#line 144
38444    __cil_tmp90 = __cil_tmp89 + __cil_tmp86;
38445#line 144
38446    if (__cil_tmp90 > __cil_tmp83) {
38447      {
38448#line 146
38449      drm_err("vmw_fb_check_var", "Requested geom can not fit in framebuffer\n");
38450      }
38451#line 147
38452      return (-22);
38453    } else {
38454
38455    }
38456    }
38457  }
38458  }
38459  {
38460#line 150
38461  __cil_tmp91 = 320 + 48;
38462#line 150
38463  __cil_tmp92 = (unsigned long )info;
38464#line 150
38465  __cil_tmp93 = __cil_tmp92 + __cil_tmp91;
38466#line 150
38467  __cil_tmp94 = *((__u32 *)__cil_tmp93);
38468#line 150
38469  __cil_tmp95 = (unsigned long )var;
38470#line 150
38471  __cil_tmp96 = __cil_tmp95 + 4;
38472#line 150
38473  __cil_tmp97 = *((__u32 *)__cil_tmp96);
38474#line 150
38475  __cil_tmp98 = (unsigned long )var;
38476#line 150
38477  __cil_tmp99 = __cil_tmp98 + 20;
38478#line 150
38479  __cil_tmp100 = *((__u32 *)__cil_tmp99);
38480#line 150
38481  __cil_tmp101 = __cil_tmp100 + __cil_tmp97;
38482#line 150
38483  tmp___7 = vmw_kms_validate_mode_vram(vmw_priv___0, __cil_tmp94, __cil_tmp101);
38484  }
38485#line 150
38486  if (tmp___7) {
38487
38488  } else {
38489    {
38490#line 153
38491    drm_err("vmw_fb_check_var", "Requested geom can not fit in framebuffer\n");
38492    }
38493#line 154
38494    return (-22);
38495  }
38496#line 157
38497  return (0);
38498}
38499}
38500#line 160 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
38501static int vmw_fb_set_par(struct fb_info *info ) 
38502{ struct vmw_fb_par *par ;
38503  struct vmw_private *vmw_priv___0 ;
38504  int ret ;
38505  int __ret_warn_on ;
38506  uint32_t tmp___7 ;
38507  int tmp___8 ;
38508  long tmp___9 ;
38509  unsigned long __cil_tmp9 ;
38510  unsigned long __cil_tmp10 ;
38511  void *__cil_tmp11 ;
38512  unsigned long __cil_tmp12 ;
38513  unsigned long __cil_tmp13 ;
38514  __u32 __cil_tmp14 ;
38515  unsigned long __cil_tmp15 ;
38516  unsigned long __cil_tmp16 ;
38517  unsigned long __cil_tmp17 ;
38518  __u32 __cil_tmp18 ;
38519  unsigned long __cil_tmp19 ;
38520  unsigned long __cil_tmp20 ;
38521  unsigned long __cil_tmp21 ;
38522  __u32 __cil_tmp22 ;
38523  unsigned long __cil_tmp23 ;
38524  unsigned long __cil_tmp24 ;
38525  unsigned int __cil_tmp25 ;
38526  unsigned long __cil_tmp26 ;
38527  unsigned long __cil_tmp27 ;
38528  unsigned int __cil_tmp28 ;
38529  unsigned long __cil_tmp29 ;
38530  unsigned long __cil_tmp30 ;
38531  uint32_t __cil_tmp31 ;
38532  uint32_t __cil_tmp32 ;
38533  uint32_t __cil_tmp33 ;
38534  uint32_t __cil_tmp34 ;
38535  unsigned long __cil_tmp35 ;
38536  unsigned long __cil_tmp36 ;
38537  unsigned long __cil_tmp37 ;
38538  __u32 __cil_tmp38 ;
38539  unsigned long __cil_tmp39 ;
38540  unsigned long __cil_tmp40 ;
38541  unsigned long __cil_tmp41 ;
38542  __u32 __cil_tmp42 ;
38543  unsigned long __cil_tmp43 ;
38544  unsigned long __cil_tmp44 ;
38545  __u32 __cil_tmp45 ;
38546  unsigned long __cil_tmp46 ;
38547  unsigned long __cil_tmp47 ;
38548  unsigned long __cil_tmp48 ;
38549  __u32 __cil_tmp49 ;
38550  int __cil_tmp50 ;
38551  int __cil_tmp51 ;
38552  long __cil_tmp52 ;
38553  int    __cil_tmp53 ;
38554  int __cil_tmp54 ;
38555  int __cil_tmp55 ;
38556  long __cil_tmp56 ;
38557
38558  {
38559  {
38560#line 162
38561  __cil_tmp9 = (unsigned long )info;
38562#line 162
38563  __cil_tmp10 = __cil_tmp9 + 1160;
38564#line 162
38565  __cil_tmp11 = *((void **)__cil_tmp10);
38566#line 162
38567  par = (struct vmw_fb_par *)__cil_tmp11;
38568#line 163
38569  vmw_priv___0 = *((struct vmw_private **)par);
38570#line 166
38571  __cil_tmp12 = (unsigned long )info;
38572#line 166
38573  __cil_tmp13 = __cil_tmp12 + 160;
38574#line 166
38575  __cil_tmp14 = *((__u32 *)__cil_tmp13);
38576#line 166
38577  __cil_tmp15 = 160 + 4;
38578#line 166
38579  __cil_tmp16 = (unsigned long )info;
38580#line 166
38581  __cil_tmp17 = __cil_tmp16 + __cil_tmp15;
38582#line 166
38583  __cil_tmp18 = *((__u32 *)__cil_tmp17);
38584#line 166
38585  __cil_tmp19 = 320 + 48;
38586#line 166
38587  __cil_tmp20 = (unsigned long )info;
38588#line 166
38589  __cil_tmp21 = __cil_tmp20 + __cil_tmp19;
38590#line 166
38591  __cil_tmp22 = *((__u32 *)__cil_tmp21);
38592#line 166
38593  __cil_tmp23 = (unsigned long )par;
38594#line 166
38595  __cil_tmp24 = __cil_tmp23 + 128;
38596#line 166
38597  __cil_tmp25 = *((unsigned int *)__cil_tmp24);
38598#line 166
38599  __cil_tmp26 = (unsigned long )par;
38600#line 166
38601  __cil_tmp27 = __cil_tmp26 + 124;
38602#line 166
38603  __cil_tmp28 = *((unsigned int *)__cil_tmp27);
38604#line 166
38605  ret = vmw_kms_write_svga(vmw_priv___0, __cil_tmp14, __cil_tmp18, __cil_tmp22, __cil_tmp25,
38606                           __cil_tmp28);
38607  }
38608#line 169
38609  if (ret) {
38610#line 170
38611    return (ret);
38612  } else {
38613
38614  }
38615  {
38616#line 172
38617  __cil_tmp29 = (unsigned long )vmw_priv___0;
38618#line 172
38619  __cil_tmp30 = __cil_tmp29 + 2156;
38620#line 172
38621  __cil_tmp31 = *((uint32_t *)__cil_tmp30);
38622#line 172
38623  if (__cil_tmp31 & 524288U) {
38624    {
38625#line 174
38626    __cil_tmp32 = (uint32_t )1;
38627#line 174
38628    vmw_write(vmw_priv___0, 34U, __cil_tmp32);
38629#line 175
38630    __cil_tmp33 = (uint32_t )0;
38631#line 175
38632    vmw_write(vmw_priv___0, 35U, __cil_tmp33);
38633#line 176
38634    __cil_tmp34 = (uint32_t )1;
38635#line 176
38636    vmw_write(vmw_priv___0, 36U, __cil_tmp34);
38637#line 177
38638    __cil_tmp35 = 160 + 16;
38639#line 177
38640    __cil_tmp36 = (unsigned long )info;
38641#line 177
38642    __cil_tmp37 = __cil_tmp36 + __cil_tmp35;
38643#line 177
38644    __cil_tmp38 = *((__u32 *)__cil_tmp37);
38645#line 177
38646    vmw_write(vmw_priv___0, 37U, __cil_tmp38);
38647#line 178
38648    __cil_tmp39 = 160 + 20;
38649#line 178
38650    __cil_tmp40 = (unsigned long )info;
38651#line 178
38652    __cil_tmp41 = __cil_tmp40 + __cil_tmp39;
38653#line 178
38654    __cil_tmp42 = *((__u32 *)__cil_tmp41);
38655#line 178
38656    vmw_write(vmw_priv___0, 38U, __cil_tmp42);
38657#line 179
38658    __cil_tmp43 = (unsigned long )info;
38659#line 179
38660    __cil_tmp44 = __cil_tmp43 + 160;
38661#line 179
38662    __cil_tmp45 = *((__u32 *)__cil_tmp44);
38663#line 179
38664    vmw_write(vmw_priv___0, 39U, __cil_tmp45);
38665#line 180
38666    __cil_tmp46 = 160 + 4;
38667#line 180
38668    __cil_tmp47 = (unsigned long )info;
38669#line 180
38670    __cil_tmp48 = __cil_tmp47 + __cil_tmp46;
38671#line 180
38672    __cil_tmp49 = *((__u32 *)__cil_tmp48);
38673#line 180
38674    vmw_write(vmw_priv___0, 40U, __cil_tmp49);
38675#line 181
38676    vmw_write(vmw_priv___0, 35U, 4294967295U);
38677    }
38678  } else {
38679
38680  }
38681  }
38682  {
38683#line 187
38684  tmp___7 = vmw_read(vmw_priv___0, 14U);
38685  }
38686#line 187
38687  if (tmp___7 != 0U) {
38688#line 187
38689    tmp___8 = 1;
38690  } else {
38691#line 187
38692    tmp___8 = 0;
38693  }
38694  {
38695#line 187
38696  __ret_warn_on = tmp___8;
38697#line 187
38698  __cil_tmp50 = ! __ret_warn_on;
38699#line 187
38700  __cil_tmp51 = ! __cil_tmp50;
38701#line 187
38702  __cil_tmp52 = (long )__cil_tmp51;
38703#line 187
38704  tmp___9 = __builtin_expect(__cil_tmp52, 0L);
38705  }
38706#line 187
38707  if (tmp___9) {
38708    {
38709#line 187
38710    __cil_tmp53 = (int    )187;
38711#line 187
38712    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c",
38713                       __cil_tmp53);
38714    }
38715  } else {
38716
38717  }
38718  {
38719#line 187
38720  __cil_tmp54 = ! __ret_warn_on;
38721#line 187
38722  __cil_tmp55 = ! __cil_tmp54;
38723#line 187
38724  __cil_tmp56 = (long )__cil_tmp55;
38725#line 187
38726  __builtin_expect(__cil_tmp56, 0L);
38727  }
38728#line 189
38729  return (0);
38730}
38731}
38732#line 192 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
38733static int vmw_fb_pan_display(struct fb_var_screeninfo *var , struct fb_info *info ) 
38734{ 
38735
38736  {
38737#line 195
38738  return (0);
38739}
38740}
38741#line 198 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
38742static int vmw_fb_blank(int blank , struct fb_info *info ) 
38743{ 
38744
38745  {
38746#line 200
38747  return (0);
38748}
38749}
38750#line 207 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
38751static void vmw_fb_dirty_flush(struct vmw_fb_par *par ) 
38752{ struct vmw_private *vmw_priv___0 ;
38753  struct fb_info *info ;
38754  int stride ;
38755  int *src ;
38756  __le32 *vram_mem ;
38757  unsigned long flags ;
38758  unsigned int x ;
38759  unsigned int y ;
38760  unsigned int w ;
38761  unsigned int h ;
38762  int i ;
38763  int k ;
38764  struct __anonstruct_cmd_430___0 *cmd ;
38765  raw_spinlock_t *tmp___7 ;
38766  unsigned int _min1 ;
38767  __u32 _min2 ;
38768  unsigned int tmp___8 ;
38769  unsigned int _min1___0 ;
38770  __u32 _min2___0 ;
38771  unsigned int tmp___9 ;
38772  unsigned int tmp___10 ;
38773  unsigned int tmp___11 ;
38774  void *tmp___12 ;
38775  long tmp___13 ;
38776  unsigned long __cil_tmp28 ;
38777  unsigned long __cil_tmp29 ;
38778  void *__cil_tmp30 ;
38779  unsigned long __cil_tmp31 ;
38780  unsigned long __cil_tmp32 ;
38781  unsigned long __cil_tmp33 ;
38782  __u32 __cil_tmp34 ;
38783  __u32 __cil_tmp35 ;
38784  unsigned long __cil_tmp36 ;
38785  unsigned long __cil_tmp37 ;
38786  char *__cil_tmp38 ;
38787  unsigned long __cil_tmp39 ;
38788  unsigned long __cil_tmp40 ;
38789  void *__cil_tmp41 ;
38790  unsigned long __cil_tmp42 ;
38791  unsigned long __cil_tmp43 ;
38792  unsigned long __cil_tmp44 ;
38793  unsigned long __cil_tmp45 ;
38794  spinlock_t *__cil_tmp46 ;
38795  unsigned long __cil_tmp47 ;
38796  unsigned long __cil_tmp48 ;
38797  unsigned long __cil_tmp49 ;
38798  bool __cil_tmp50 ;
38799  unsigned long __cil_tmp51 ;
38800  unsigned long __cil_tmp52 ;
38801  spinlock_t *__cil_tmp53 ;
38802  unsigned long __cil_tmp54 ;
38803  unsigned long __cil_tmp55 ;
38804  unsigned long __cil_tmp56 ;
38805  unsigned long __cil_tmp57 ;
38806  unsigned long __cil_tmp58 ;
38807  unsigned long __cil_tmp59 ;
38808  unsigned int *__cil_tmp60 ;
38809  unsigned long __cil_tmp61 ;
38810  unsigned long __cil_tmp62 ;
38811  unsigned long __cil_tmp63 ;
38812  __u32 *__cil_tmp64 ;
38813  unsigned long __cil_tmp65 ;
38814  unsigned long __cil_tmp66 ;
38815  __u32 *__cil_tmp67 ;
38816  __u32 __cil_tmp68 ;
38817  unsigned int *__cil_tmp69 ;
38818  unsigned int __cil_tmp70 ;
38819  unsigned int *__cil_tmp71 ;
38820  __u32 *__cil_tmp72 ;
38821  unsigned int *__cil_tmp73 ;
38822  unsigned long __cil_tmp74 ;
38823  unsigned long __cil_tmp75 ;
38824  unsigned long __cil_tmp76 ;
38825  __u32 *__cil_tmp77 ;
38826  unsigned long __cil_tmp78 ;
38827  unsigned long __cil_tmp79 ;
38828  unsigned long __cil_tmp80 ;
38829  __u32 *__cil_tmp81 ;
38830  __u32 __cil_tmp82 ;
38831  unsigned int *__cil_tmp83 ;
38832  unsigned int __cil_tmp84 ;
38833  unsigned int *__cil_tmp85 ;
38834  __u32 *__cil_tmp86 ;
38835  unsigned long __cil_tmp87 ;
38836  unsigned long __cil_tmp88 ;
38837  unsigned long __cil_tmp89 ;
38838  unsigned long __cil_tmp90 ;
38839  unsigned long __cil_tmp91 ;
38840  unsigned long __cil_tmp92 ;
38841  unsigned long __cil_tmp93 ;
38842  unsigned long __cil_tmp94 ;
38843  unsigned long __cil_tmp95 ;
38844  unsigned long __cil_tmp96 ;
38845  unsigned long __cil_tmp97 ;
38846  unsigned long __cil_tmp98 ;
38847  unsigned long __cil_tmp99 ;
38848  unsigned long __cil_tmp100 ;
38849  spinlock_t *__cil_tmp101 ;
38850  unsigned int __cil_tmp102 ;
38851  unsigned int __cil_tmp103 ;
38852  unsigned long __cil_tmp104 ;
38853  unsigned long __cil_tmp105 ;
38854  unsigned long __cil_tmp106 ;
38855  __u32 __cil_tmp107 ;
38856  __u32 __cil_tmp108 ;
38857  __u32 __cil_tmp109 ;
38858  unsigned int __cil_tmp110 ;
38859  unsigned int __cil_tmp111 ;
38860  unsigned int __cil_tmp112 ;
38861  unsigned int __cil_tmp113 ;
38862  unsigned int __cil_tmp114 ;
38863  unsigned int __cil_tmp115 ;
38864  unsigned long __cil_tmp116 ;
38865  unsigned long __cil_tmp117 ;
38866  unsigned long __cil_tmp118 ;
38867  __u32 __cil_tmp119 ;
38868  __u32 __cil_tmp120 ;
38869  __u32 __cil_tmp121 ;
38870  int *__cil_tmp122 ;
38871  int __cil_tmp123 ;
38872  u32 __cil_tmp124 ;
38873  __le32 *__cil_tmp125 ;
38874  void *__cil_tmp126 ;
38875  uint32_t __cil_tmp127 ;
38876  void *__cil_tmp128 ;
38877  unsigned long __cil_tmp129 ;
38878  unsigned long __cil_tmp130 ;
38879  int __cil_tmp131 ;
38880  int __cil_tmp132 ;
38881  int __cil_tmp133 ;
38882  long __cil_tmp134 ;
38883  unsigned long __cil_tmp135 ;
38884  unsigned long __cil_tmp136 ;
38885  unsigned long __cil_tmp137 ;
38886  unsigned long __cil_tmp138 ;
38887  unsigned long __cil_tmp139 ;
38888  unsigned long __cil_tmp140 ;
38889  unsigned long __cil_tmp141 ;
38890  unsigned long __cil_tmp142 ;
38891  unsigned long __cil_tmp143 ;
38892  unsigned long __cil_tmp144 ;
38893  unsigned long __cil_tmp145 ;
38894  uint32_t __cil_tmp146 ;
38895
38896  {
38897#line 209
38898  vmw_priv___0 = *((struct vmw_private **)par);
38899#line 210
38900  __cil_tmp28 = (unsigned long )vmw_priv___0;
38901#line 210
38902  __cil_tmp29 = __cil_tmp28 + 2600;
38903#line 210
38904  __cil_tmp30 = *((void **)__cil_tmp29);
38905#line 210
38906  info = (struct fb_info *)__cil_tmp30;
38907#line 211
38908  __cil_tmp31 = 320 + 48;
38909#line 211
38910  __cil_tmp32 = (unsigned long )info;
38911#line 211
38912  __cil_tmp33 = __cil_tmp32 + __cil_tmp31;
38913#line 211
38914  __cil_tmp34 = *((__u32 *)__cil_tmp33);
38915#line 211
38916  __cil_tmp35 = __cil_tmp34 / 4U;
38917#line 211
38918  stride = (int )__cil_tmp35;
38919#line 212
38920  __cil_tmp36 = (unsigned long )info;
38921#line 212
38922  __cil_tmp37 = __cil_tmp36 + 1120;
38923#line 212
38924  __cil_tmp38 = *((char **)__cil_tmp37);
38925#line 212
38926  src = (int *)__cil_tmp38;
38927#line 213
38928  __cil_tmp39 = (unsigned long )par;
38929#line 213
38930  __cil_tmp40 = __cil_tmp39 + 144;
38931#line 213
38932  __cil_tmp41 = *((void **)__cil_tmp40);
38933#line 213
38934  vram_mem = (__le32 *)__cil_tmp41;
38935  {
38936#line 222
38937  __cil_tmp42 = (unsigned long )vmw_priv___0;
38938#line 222
38939  __cil_tmp43 = __cil_tmp42 + 134656;
38940#line 222
38941  if (*((bool *)__cil_tmp43)) {
38942#line 223
38943    return;
38944  } else {
38945
38946  }
38947  }
38948  {
38949#line 225
38950  while (1) {
38951    while_continue: /* CIL Label */ ;
38952    {
38953#line 225
38954    while (1) {
38955      while_continue___0: /* CIL Label */ ;
38956      {
38957#line 225
38958      __cil_tmp44 = (unsigned long )par;
38959#line 225
38960      __cil_tmp45 = __cil_tmp44 + 160;
38961#line 225
38962      __cil_tmp46 = (spinlock_t *)__cil_tmp45;
38963#line 225
38964      tmp___7 = spinlock_check(__cil_tmp46);
38965#line 225
38966      flags = _raw_spin_lock_irqsave(tmp___7);
38967      }
38968#line 225
38969      goto while_break___0;
38970    }
38971    while_break___0: /* CIL Label */ ;
38972    }
38973#line 225
38974    goto while_break;
38975  }
38976  while_break: /* CIL Label */ ;
38977  }
38978  {
38979#line 226
38980  __cil_tmp47 = 160 + 24;
38981#line 226
38982  __cil_tmp48 = (unsigned long )par;
38983#line 226
38984  __cil_tmp49 = __cil_tmp48 + __cil_tmp47;
38985#line 226
38986  __cil_tmp50 = *((bool *)__cil_tmp49);
38987#line 226
38988  if (! __cil_tmp50) {
38989    {
38990#line 227
38991    __cil_tmp51 = (unsigned long )par;
38992#line 227
38993    __cil_tmp52 = __cil_tmp51 + 160;
38994#line 227
38995    __cil_tmp53 = (spinlock_t *)__cil_tmp52;
38996#line 227
38997    spin_unlock_irqrestore(__cil_tmp53, flags);
38998    }
38999#line 228
39000    return;
39001  } else {
39002
39003  }
39004  }
39005#line 230
39006  __cil_tmp54 = 160 + 28;
39007#line 230
39008  __cil_tmp55 = (unsigned long )par;
39009#line 230
39010  __cil_tmp56 = __cil_tmp55 + __cil_tmp54;
39011#line 230
39012  x = *((unsigned int *)__cil_tmp56);
39013#line 231
39014  __cil_tmp57 = 160 + 32;
39015#line 231
39016  __cil_tmp58 = (unsigned long )par;
39017#line 231
39018  __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
39019#line 231
39020  y = *((unsigned int *)__cil_tmp59);
39021#line 232
39022  __cil_tmp60 = & _min1;
39023#line 232
39024  __cil_tmp61 = 160 + 36;
39025#line 232
39026  __cil_tmp62 = (unsigned long )par;
39027#line 232
39028  __cil_tmp63 = __cil_tmp62 + __cil_tmp61;
39029#line 232
39030  *__cil_tmp60 = *((unsigned int *)__cil_tmp63);
39031#line 232
39032  __cil_tmp64 = & _min2;
39033#line 232
39034  __cil_tmp65 = (unsigned long )info;
39035#line 232
39036  __cil_tmp66 = __cil_tmp65 + 160;
39037#line 232
39038  *__cil_tmp64 = *((__u32 *)__cil_tmp66);
39039  {
39040#line 232
39041  __cil_tmp67 = & _min2;
39042#line 232
39043  __cil_tmp68 = *__cil_tmp67;
39044#line 232
39045  __cil_tmp69 = & _min1;
39046#line 232
39047  __cil_tmp70 = *__cil_tmp69;
39048#line 232
39049  if (__cil_tmp70 < __cil_tmp68) {
39050#line 232
39051    __cil_tmp71 = & _min1;
39052#line 232
39053    tmp___8 = *__cil_tmp71;
39054  } else {
39055#line 232
39056    __cil_tmp72 = & _min2;
39057#line 232
39058    tmp___8 = *__cil_tmp72;
39059  }
39060  }
39061#line 232
39062  w = tmp___8 - x;
39063#line 233
39064  __cil_tmp73 = & _min1___0;
39065#line 233
39066  __cil_tmp74 = 160 + 40;
39067#line 233
39068  __cil_tmp75 = (unsigned long )par;
39069#line 233
39070  __cil_tmp76 = __cil_tmp75 + __cil_tmp74;
39071#line 233
39072  *__cil_tmp73 = *((unsigned int *)__cil_tmp76);
39073#line 233
39074  __cil_tmp77 = & _min2___0;
39075#line 233
39076  __cil_tmp78 = 160 + 4;
39077#line 233
39078  __cil_tmp79 = (unsigned long )info;
39079#line 233
39080  __cil_tmp80 = __cil_tmp79 + __cil_tmp78;
39081#line 233
39082  *__cil_tmp77 = *((__u32 *)__cil_tmp80);
39083  {
39084#line 233
39085  __cil_tmp81 = & _min2___0;
39086#line 233
39087  __cil_tmp82 = *__cil_tmp81;
39088#line 233
39089  __cil_tmp83 = & _min1___0;
39090#line 233
39091  __cil_tmp84 = *__cil_tmp83;
39092#line 233
39093  if (__cil_tmp84 < __cil_tmp82) {
39094#line 233
39095    __cil_tmp85 = & _min1___0;
39096#line 233
39097    tmp___9 = *__cil_tmp85;
39098  } else {
39099#line 233
39100    __cil_tmp86 = & _min2___0;
39101#line 233
39102    tmp___9 = *__cil_tmp86;
39103  }
39104  }
39105  {
39106#line 233
39107  h = tmp___9 - y;
39108#line 234
39109  tmp___10 = 0U;
39110#line 234
39111  __cil_tmp87 = 160 + 36;
39112#line 234
39113  __cil_tmp88 = (unsigned long )par;
39114#line 234
39115  __cil_tmp89 = __cil_tmp88 + __cil_tmp87;
39116#line 234
39117  *((unsigned int *)__cil_tmp89) = tmp___10;
39118#line 234
39119  __cil_tmp90 = 160 + 28;
39120#line 234
39121  __cil_tmp91 = (unsigned long )par;
39122#line 234
39123  __cil_tmp92 = __cil_tmp91 + __cil_tmp90;
39124#line 234
39125  *((unsigned int *)__cil_tmp92) = tmp___10;
39126#line 235
39127  tmp___11 = 0U;
39128#line 235
39129  __cil_tmp93 = 160 + 40;
39130#line 235
39131  __cil_tmp94 = (unsigned long )par;
39132#line 235
39133  __cil_tmp95 = __cil_tmp94 + __cil_tmp93;
39134#line 235
39135  *((unsigned int *)__cil_tmp95) = tmp___11;
39136#line 235
39137  __cil_tmp96 = 160 + 32;
39138#line 235
39139  __cil_tmp97 = (unsigned long )par;
39140#line 235
39141  __cil_tmp98 = __cil_tmp97 + __cil_tmp96;
39142#line 235
39143  *((unsigned int *)__cil_tmp98) = tmp___11;
39144#line 236
39145  __cil_tmp99 = (unsigned long )par;
39146#line 236
39147  __cil_tmp100 = __cil_tmp99 + 160;
39148#line 236
39149  __cil_tmp101 = (spinlock_t *)__cil_tmp100;
39150#line 236
39151  spin_unlock_irqrestore(__cil_tmp101, flags);
39152#line 238
39153  __cil_tmp102 = (unsigned int )stride;
39154#line 238
39155  __cil_tmp103 = y * __cil_tmp102;
39156#line 238
39157  i = (int )__cil_tmp103;
39158  }
39159  {
39160#line 238
39161  while (1) {
39162    while_continue___1: /* CIL Label */ ;
39163    {
39164#line 238
39165    __cil_tmp104 = 320 + 24;
39166#line 238
39167    __cil_tmp105 = (unsigned long )info;
39168#line 238
39169    __cil_tmp106 = __cil_tmp105 + __cil_tmp104;
39170#line 238
39171    __cil_tmp107 = *((__u32 *)__cil_tmp106);
39172#line 238
39173    __cil_tmp108 = __cil_tmp107 / 4U;
39174#line 238
39175    __cil_tmp109 = (__u32 )i;
39176#line 238
39177    if (__cil_tmp109 < __cil_tmp108) {
39178
39179    } else {
39180#line 238
39181      goto while_break___1;
39182    }
39183    }
39184#line 239
39185    __cil_tmp110 = (unsigned int )i;
39186#line 239
39187    __cil_tmp111 = __cil_tmp110 + x;
39188#line 239
39189    k = (int )__cil_tmp111;
39190    {
39191#line 239
39192    while (1) {
39193      while_continue___2: /* CIL Label */ ;
39194      {
39195#line 239
39196      __cil_tmp112 = (unsigned int )i;
39197#line 239
39198      __cil_tmp113 = __cil_tmp112 + x;
39199#line 239
39200      __cil_tmp114 = __cil_tmp113 + w;
39201#line 239
39202      __cil_tmp115 = (unsigned int )k;
39203#line 239
39204      if (__cil_tmp115 < __cil_tmp114) {
39205        {
39206#line 239
39207        __cil_tmp116 = 320 + 24;
39208#line 239
39209        __cil_tmp117 = (unsigned long )info;
39210#line 239
39211        __cil_tmp118 = __cil_tmp117 + __cil_tmp116;
39212#line 239
39213        __cil_tmp119 = *((__u32 *)__cil_tmp118);
39214#line 239
39215        __cil_tmp120 = __cil_tmp119 / 4U;
39216#line 239
39217        __cil_tmp121 = (__u32 )k;
39218#line 239
39219        if (__cil_tmp121 < __cil_tmp120) {
39220
39221        } else {
39222#line 239
39223          goto while_break___2;
39224        }
39225        }
39226      } else {
39227#line 239
39228        goto while_break___2;
39229      }
39230      }
39231      {
39232#line 240
39233      __cil_tmp122 = src + k;
39234#line 240
39235      __cil_tmp123 = *__cil_tmp122;
39236#line 240
39237      __cil_tmp124 = (u32 )__cil_tmp123;
39238#line 240
39239      __cil_tmp125 = vram_mem + k;
39240#line 240
39241      __cil_tmp126 = (void *)__cil_tmp125;
39242#line 240
39243      iowrite32(__cil_tmp124, __cil_tmp126);
39244#line 239
39245      k = k + 1;
39246      }
39247    }
39248    while_break___2: /* CIL Label */ ;
39249    }
39250#line 238
39251    i = i + stride;
39252  }
39253  while_break___1: /* CIL Label */ ;
39254  }
39255  {
39256#line 247
39257  __cil_tmp127 = (uint32_t )20UL;
39258#line 247
39259  tmp___12 = vmw_fifo_reserve(vmw_priv___0, __cil_tmp127);
39260#line 247
39261  cmd = (struct __anonstruct_cmd_430___0 *)tmp___12;
39262#line 248
39263  __cil_tmp128 = (void *)0;
39264#line 248
39265  __cil_tmp129 = (unsigned long )__cil_tmp128;
39266#line 248
39267  __cil_tmp130 = (unsigned long )cmd;
39268#line 248
39269  __cil_tmp131 = __cil_tmp130 == __cil_tmp129;
39270#line 248
39271  __cil_tmp132 = ! __cil_tmp131;
39272#line 248
39273  __cil_tmp133 = ! __cil_tmp132;
39274#line 248
39275  __cil_tmp134 = (long )__cil_tmp133;
39276#line 248
39277  tmp___13 = __builtin_expect(__cil_tmp134, 0L);
39278  }
39279#line 248
39280  if (tmp___13) {
39281    {
39282#line 249
39283    drm_err("vmw_fb_dirty_flush", "Fifo reserve failed.\n");
39284    }
39285#line 250
39286    return;
39287  } else {
39288
39289  }
39290  {
39291#line 253
39292  *((uint32_t *)cmd) = (__u32 )1;
39293#line 254
39294  __cil_tmp135 = (unsigned long )cmd;
39295#line 254
39296  __cil_tmp136 = __cil_tmp135 + 4;
39297#line 254
39298  *((uint32 *)__cil_tmp136) = x;
39299#line 255
39300  __cil_tmp137 = 4 + 4;
39301#line 255
39302  __cil_tmp138 = (unsigned long )cmd;
39303#line 255
39304  __cil_tmp139 = __cil_tmp138 + __cil_tmp137;
39305#line 255
39306  *((uint32 *)__cil_tmp139) = y;
39307#line 256
39308  __cil_tmp140 = 4 + 8;
39309#line 256
39310  __cil_tmp141 = (unsigned long )cmd;
39311#line 256
39312  __cil_tmp142 = __cil_tmp141 + __cil_tmp140;
39313#line 256
39314  *((uint32 *)__cil_tmp142) = w;
39315#line 257
39316  __cil_tmp143 = 4 + 12;
39317#line 257
39318  __cil_tmp144 = (unsigned long )cmd;
39319#line 257
39320  __cil_tmp145 = __cil_tmp144 + __cil_tmp143;
39321#line 257
39322  *((uint32 *)__cil_tmp145) = h;
39323#line 258
39324  __cil_tmp146 = (uint32_t )20UL;
39325#line 258
39326  vmw_fifo_commit(vmw_priv___0, __cil_tmp146);
39327  }
39328#line 259
39329  return;
39330}
39331}
39332#line 261 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
39333static void vmw_fb_dirty_mark(struct vmw_fb_par *par , unsigned int x1 , unsigned int y1 ,
39334                              unsigned int width , unsigned int height ) 
39335{ struct fb_info *info ;
39336  unsigned long flags ;
39337  unsigned int x2 ;
39338  unsigned int y2 ;
39339  raw_spinlock_t *tmp___7 ;
39340  struct vmw_private *__cil_tmp13 ;
39341  unsigned long __cil_tmp14 ;
39342  unsigned long __cil_tmp15 ;
39343  void *__cil_tmp16 ;
39344  unsigned long __cil_tmp17 ;
39345  unsigned long __cil_tmp18 ;
39346  spinlock_t *__cil_tmp19 ;
39347  unsigned long __cil_tmp20 ;
39348  unsigned long __cil_tmp21 ;
39349  unsigned long __cil_tmp22 ;
39350  unsigned int __cil_tmp23 ;
39351  unsigned long __cil_tmp24 ;
39352  unsigned long __cil_tmp25 ;
39353  unsigned long __cil_tmp26 ;
39354  unsigned int __cil_tmp27 ;
39355  unsigned long __cil_tmp28 ;
39356  unsigned long __cil_tmp29 ;
39357  unsigned long __cil_tmp30 ;
39358  unsigned long __cil_tmp31 ;
39359  unsigned long __cil_tmp32 ;
39360  unsigned long __cil_tmp33 ;
39361  unsigned long __cil_tmp34 ;
39362  unsigned long __cil_tmp35 ;
39363  unsigned long __cil_tmp36 ;
39364  unsigned long __cil_tmp37 ;
39365  unsigned long __cil_tmp38 ;
39366  unsigned long __cil_tmp39 ;
39367  unsigned long __cil_tmp40 ;
39368  unsigned long __cil_tmp41 ;
39369  unsigned long __cil_tmp42 ;
39370  unsigned long __cil_tmp43 ;
39371  unsigned long __cil_tmp44 ;
39372  struct delayed_work *__cil_tmp45 ;
39373  unsigned long __cil_tmp46 ;
39374  unsigned long __cil_tmp47 ;
39375  unsigned long __cil_tmp48 ;
39376  unsigned int __cil_tmp49 ;
39377  unsigned long __cil_tmp50 ;
39378  unsigned long __cil_tmp51 ;
39379  unsigned long __cil_tmp52 ;
39380  unsigned long __cil_tmp53 ;
39381  unsigned long __cil_tmp54 ;
39382  unsigned long __cil_tmp55 ;
39383  unsigned int __cil_tmp56 ;
39384  unsigned long __cil_tmp57 ;
39385  unsigned long __cil_tmp58 ;
39386  unsigned long __cil_tmp59 ;
39387  unsigned long __cil_tmp60 ;
39388  unsigned long __cil_tmp61 ;
39389  unsigned long __cil_tmp62 ;
39390  unsigned int __cil_tmp63 ;
39391  unsigned long __cil_tmp64 ;
39392  unsigned long __cil_tmp65 ;
39393  unsigned long __cil_tmp66 ;
39394  unsigned long __cil_tmp67 ;
39395  unsigned long __cil_tmp68 ;
39396  unsigned long __cil_tmp69 ;
39397  unsigned int __cil_tmp70 ;
39398  unsigned long __cil_tmp71 ;
39399  unsigned long __cil_tmp72 ;
39400  unsigned long __cil_tmp73 ;
39401  unsigned long __cil_tmp74 ;
39402  unsigned long __cil_tmp75 ;
39403  spinlock_t *__cil_tmp76 ;
39404
39405  {
39406#line 265
39407  __cil_tmp13 = *((struct vmw_private **)par);
39408#line 265
39409  __cil_tmp14 = (unsigned long )__cil_tmp13;
39410#line 265
39411  __cil_tmp15 = __cil_tmp14 + 2600;
39412#line 265
39413  __cil_tmp16 = *((void **)__cil_tmp15);
39414#line 265
39415  info = (struct fb_info *)__cil_tmp16;
39416#line 267
39417  x2 = x1 + width;
39418#line 268
39419  y2 = y1 + height;
39420  {
39421#line 270
39422  while (1) {
39423    while_continue: /* CIL Label */ ;
39424    {
39425#line 270
39426    while (1) {
39427      while_continue___0: /* CIL Label */ ;
39428      {
39429#line 270
39430      __cil_tmp17 = (unsigned long )par;
39431#line 270
39432      __cil_tmp18 = __cil_tmp17 + 160;
39433#line 270
39434      __cil_tmp19 = (spinlock_t *)__cil_tmp18;
39435#line 270
39436      tmp___7 = spinlock_check(__cil_tmp19);
39437#line 270
39438      flags = _raw_spin_lock_irqsave(tmp___7);
39439      }
39440#line 270
39441      goto while_break___0;
39442    }
39443    while_break___0: /* CIL Label */ ;
39444    }
39445#line 270
39446    goto while_break;
39447  }
39448  while_break: /* CIL Label */ ;
39449  }
39450  {
39451#line 271
39452  __cil_tmp20 = 160 + 36;
39453#line 271
39454  __cil_tmp21 = (unsigned long )par;
39455#line 271
39456  __cil_tmp22 = __cil_tmp21 + __cil_tmp20;
39457#line 271
39458  __cil_tmp23 = *((unsigned int *)__cil_tmp22);
39459#line 271
39460  __cil_tmp24 = 160 + 28;
39461#line 271
39462  __cil_tmp25 = (unsigned long )par;
39463#line 271
39464  __cil_tmp26 = __cil_tmp25 + __cil_tmp24;
39465#line 271
39466  __cil_tmp27 = *((unsigned int *)__cil_tmp26);
39467#line 271
39468  if (__cil_tmp27 == __cil_tmp23) {
39469#line 272
39470    __cil_tmp28 = 160 + 28;
39471#line 272
39472    __cil_tmp29 = (unsigned long )par;
39473#line 272
39474    __cil_tmp30 = __cil_tmp29 + __cil_tmp28;
39475#line 272
39476    *((unsigned int *)__cil_tmp30) = x1;
39477#line 273
39478    __cil_tmp31 = 160 + 32;
39479#line 273
39480    __cil_tmp32 = (unsigned long )par;
39481#line 273
39482    __cil_tmp33 = __cil_tmp32 + __cil_tmp31;
39483#line 273
39484    *((unsigned int *)__cil_tmp33) = y1;
39485#line 274
39486    __cil_tmp34 = 160 + 36;
39487#line 274
39488    __cil_tmp35 = (unsigned long )par;
39489#line 274
39490    __cil_tmp36 = __cil_tmp35 + __cil_tmp34;
39491#line 274
39492    *((unsigned int *)__cil_tmp36) = x2;
39493#line 275
39494    __cil_tmp37 = 160 + 40;
39495#line 275
39496    __cil_tmp38 = (unsigned long )par;
39497#line 275
39498    __cil_tmp39 = __cil_tmp38 + __cil_tmp37;
39499#line 275
39500    *((unsigned int *)__cil_tmp39) = y2;
39501    {
39502#line 278
39503    __cil_tmp40 = 160 + 24;
39504#line 278
39505    __cil_tmp41 = (unsigned long )par;
39506#line 278
39507    __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
39508#line 278
39509    if (*((bool *)__cil_tmp42)) {
39510      {
39511#line 279
39512      __cil_tmp43 = (unsigned long )info;
39513#line 279
39514      __cil_tmp44 = __cil_tmp43 + 960;
39515#line 279
39516      __cil_tmp45 = (struct delayed_work *)__cil_tmp44;
39517#line 279
39518      schedule_delayed_work(__cil_tmp45, 8UL);
39519      }
39520    } else {
39521
39522    }
39523    }
39524  } else {
39525    {
39526#line 281
39527    __cil_tmp46 = 160 + 28;
39528#line 281
39529    __cil_tmp47 = (unsigned long )par;
39530#line 281
39531    __cil_tmp48 = __cil_tmp47 + __cil_tmp46;
39532#line 281
39533    __cil_tmp49 = *((unsigned int *)__cil_tmp48);
39534#line 281
39535    if (x1 < __cil_tmp49) {
39536#line 282
39537      __cil_tmp50 = 160 + 28;
39538#line 282
39539      __cil_tmp51 = (unsigned long )par;
39540#line 282
39541      __cil_tmp52 = __cil_tmp51 + __cil_tmp50;
39542#line 282
39543      *((unsigned int *)__cil_tmp52) = x1;
39544    } else {
39545
39546    }
39547    }
39548    {
39549#line 283
39550    __cil_tmp53 = 160 + 32;
39551#line 283
39552    __cil_tmp54 = (unsigned long )par;
39553#line 283
39554    __cil_tmp55 = __cil_tmp54 + __cil_tmp53;
39555#line 283
39556    __cil_tmp56 = *((unsigned int *)__cil_tmp55);
39557#line 283
39558    if (y1 < __cil_tmp56) {
39559#line 284
39560      __cil_tmp57 = 160 + 32;
39561#line 284
39562      __cil_tmp58 = (unsigned long )par;
39563#line 284
39564      __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
39565#line 284
39566      *((unsigned int *)__cil_tmp59) = y1;
39567    } else {
39568
39569    }
39570    }
39571    {
39572#line 285
39573    __cil_tmp60 = 160 + 36;
39574#line 285
39575    __cil_tmp61 = (unsigned long )par;
39576#line 285
39577    __cil_tmp62 = __cil_tmp61 + __cil_tmp60;
39578#line 285
39579    __cil_tmp63 = *((unsigned int *)__cil_tmp62);
39580#line 285
39581    if (x2 > __cil_tmp63) {
39582#line 286
39583      __cil_tmp64 = 160 + 36;
39584#line 286
39585      __cil_tmp65 = (unsigned long )par;
39586#line 286
39587      __cil_tmp66 = __cil_tmp65 + __cil_tmp64;
39588#line 286
39589      *((unsigned int *)__cil_tmp66) = x2;
39590    } else {
39591
39592    }
39593    }
39594    {
39595#line 287
39596    __cil_tmp67 = 160 + 40;
39597#line 287
39598    __cil_tmp68 = (unsigned long )par;
39599#line 287
39600    __cil_tmp69 = __cil_tmp68 + __cil_tmp67;
39601#line 287
39602    __cil_tmp70 = *((unsigned int *)__cil_tmp69);
39603#line 287
39604    if (y2 > __cil_tmp70) {
39605#line 288
39606      __cil_tmp71 = 160 + 40;
39607#line 288
39608      __cil_tmp72 = (unsigned long )par;
39609#line 288
39610      __cil_tmp73 = __cil_tmp72 + __cil_tmp71;
39611#line 288
39612      *((unsigned int *)__cil_tmp73) = y2;
39613    } else {
39614
39615    }
39616    }
39617  }
39618  }
39619  {
39620#line 290
39621  __cil_tmp74 = (unsigned long )par;
39622#line 290
39623  __cil_tmp75 = __cil_tmp74 + 160;
39624#line 290
39625  __cil_tmp76 = (spinlock_t *)__cil_tmp75;
39626#line 290
39627  spin_unlock_irqrestore(__cil_tmp76, flags);
39628  }
39629#line 291
39630  return;
39631}
39632}
39633#line 293 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
39634static void vmw_deferred_io(struct fb_info *info , struct list_head *pagelist ) 
39635{ struct vmw_fb_par *par ;
39636  unsigned long start ;
39637  unsigned long end ;
39638  unsigned long min ;
39639  unsigned long max ;
39640  unsigned long flags ;
39641  struct page *page ;
39642  int y1 ;
39643  int y2 ;
39644  struct list_head    *__mptr ;
39645  struct list_head    *__mptr___0 ;
39646  unsigned long _min1 ;
39647  unsigned long _min2 ;
39648  unsigned long tmp___7 ;
39649  unsigned long _max1 ;
39650  unsigned long _max2 ;
39651  unsigned long tmp___8 ;
39652  raw_spinlock_t *tmp___9 ;
39653  unsigned long __cil_tmp23 ;
39654  unsigned long __cil_tmp24 ;
39655  void *__cil_tmp25 ;
39656  struct list_head *__cil_tmp26 ;
39657  struct page *__cil_tmp27 ;
39658  unsigned long __cil_tmp28 ;
39659  unsigned long __cil_tmp29 ;
39660  struct list_head *__cil_tmp30 ;
39661  unsigned int __cil_tmp31 ;
39662  char *__cil_tmp32 ;
39663  char *__cil_tmp33 ;
39664  unsigned long __cil_tmp34 ;
39665  unsigned long __cil_tmp35 ;
39666  unsigned long __cil_tmp36 ;
39667  struct list_head *__cil_tmp37 ;
39668  unsigned long __cil_tmp38 ;
39669  unsigned long __cil_tmp39 ;
39670  unsigned long __cil_tmp40 ;
39671  unsigned long __cil_tmp41 ;
39672  unsigned long __cil_tmp42 ;
39673  unsigned long __cil_tmp43 ;
39674  unsigned long *__cil_tmp44 ;
39675  unsigned long *__cil_tmp45 ;
39676  unsigned long *__cil_tmp46 ;
39677  unsigned long __cil_tmp47 ;
39678  unsigned long *__cil_tmp48 ;
39679  unsigned long __cil_tmp49 ;
39680  unsigned long *__cil_tmp50 ;
39681  unsigned long *__cil_tmp51 ;
39682  unsigned long *__cil_tmp52 ;
39683  unsigned long *__cil_tmp53 ;
39684  unsigned long *__cil_tmp54 ;
39685  unsigned long __cil_tmp55 ;
39686  unsigned long *__cil_tmp56 ;
39687  unsigned long __cil_tmp57 ;
39688  unsigned long *__cil_tmp58 ;
39689  unsigned long *__cil_tmp59 ;
39690  unsigned long __cil_tmp60 ;
39691  unsigned long __cil_tmp61 ;
39692  struct list_head *__cil_tmp62 ;
39693  struct page *__cil_tmp63 ;
39694  unsigned long __cil_tmp64 ;
39695  unsigned long __cil_tmp65 ;
39696  struct list_head *__cil_tmp66 ;
39697  unsigned int __cil_tmp67 ;
39698  char *__cil_tmp68 ;
39699  char *__cil_tmp69 ;
39700  unsigned long __cil_tmp70 ;
39701  unsigned long __cil_tmp71 ;
39702  unsigned long __cil_tmp72 ;
39703  __u32 __cil_tmp73 ;
39704  unsigned long __cil_tmp74 ;
39705  unsigned long __cil_tmp75 ;
39706  unsigned long __cil_tmp76 ;
39707  unsigned long __cil_tmp77 ;
39708  unsigned long __cil_tmp78 ;
39709  __u32 __cil_tmp79 ;
39710  unsigned long __cil_tmp80 ;
39711  unsigned long __cil_tmp81 ;
39712  unsigned long __cil_tmp82 ;
39713  unsigned long __cil_tmp83 ;
39714  unsigned long __cil_tmp84 ;
39715  spinlock_t *__cil_tmp85 ;
39716  unsigned long __cil_tmp86 ;
39717  unsigned long __cil_tmp87 ;
39718  unsigned long __cil_tmp88 ;
39719  unsigned long __cil_tmp89 ;
39720  unsigned long __cil_tmp90 ;
39721  unsigned long __cil_tmp91 ;
39722  unsigned long __cil_tmp92 ;
39723  unsigned long __cil_tmp93 ;
39724  unsigned long __cil_tmp94 ;
39725  unsigned long __cil_tmp95 ;
39726  unsigned long __cil_tmp96 ;
39727  unsigned long __cil_tmp97 ;
39728  unsigned long __cil_tmp98 ;
39729  unsigned long __cil_tmp99 ;
39730  unsigned long __cil_tmp100 ;
39731  unsigned long __cil_tmp101 ;
39732  spinlock_t *__cil_tmp102 ;
39733
39734  {
39735#line 296
39736  __cil_tmp23 = (unsigned long )info;
39737#line 296
39738  __cil_tmp24 = __cil_tmp23 + 1160;
39739#line 296
39740  __cil_tmp25 = *((void **)__cil_tmp24);
39741#line 296
39742  par = (struct vmw_fb_par *)__cil_tmp25;
39743#line 302
39744  min = ~ 0UL;
39745#line 303
39746  max = 0UL;
39747#line 304
39748  __cil_tmp26 = *((struct list_head **)pagelist);
39749#line 304
39750  __mptr = (struct list_head    *)__cil_tmp26;
39751#line 304
39752  __cil_tmp27 = (struct page *)0;
39753#line 304
39754  __cil_tmp28 = (unsigned long )__cil_tmp27;
39755#line 304
39756  __cil_tmp29 = __cil_tmp28 + 32;
39757#line 304
39758  __cil_tmp30 = (struct list_head *)__cil_tmp29;
39759#line 304
39760  __cil_tmp31 = (unsigned int )__cil_tmp30;
39761#line 304
39762  __cil_tmp32 = (char *)__mptr;
39763#line 304
39764  __cil_tmp33 = __cil_tmp32 - __cil_tmp31;
39765#line 304
39766  page = (struct page *)__cil_tmp33;
39767  {
39768#line 304
39769  while (1) {
39770    while_continue: /* CIL Label */ ;
39771    {
39772#line 304
39773    __cil_tmp34 = (unsigned long )pagelist;
39774#line 304
39775    __cil_tmp35 = (unsigned long )page;
39776#line 304
39777    __cil_tmp36 = __cil_tmp35 + 32;
39778#line 304
39779    __cil_tmp37 = (struct list_head *)__cil_tmp36;
39780#line 304
39781    __cil_tmp38 = (unsigned long )__cil_tmp37;
39782#line 304
39783    if (__cil_tmp38 != __cil_tmp34) {
39784
39785    } else {
39786#line 304
39787      goto while_break;
39788    }
39789    }
39790#line 305
39791    __cil_tmp39 = (unsigned long )page;
39792#line 305
39793    __cil_tmp40 = __cil_tmp39 + 16;
39794#line 305
39795    __cil_tmp41 = *((unsigned long *)__cil_tmp40);
39796#line 305
39797    start = __cil_tmp41 << 12;
39798#line 306
39799    __cil_tmp42 = 1UL << 12;
39800#line 306
39801    __cil_tmp43 = start + __cil_tmp42;
39802#line 306
39803    end = __cil_tmp43 - 1UL;
39804#line 307
39805    __cil_tmp44 = & _min1;
39806#line 307
39807    *__cil_tmp44 = min;
39808#line 307
39809    __cil_tmp45 = & _min2;
39810#line 307
39811    *__cil_tmp45 = start;
39812    {
39813#line 307
39814    __cil_tmp46 = & _min2;
39815#line 307
39816    __cil_tmp47 = *__cil_tmp46;
39817#line 307
39818    __cil_tmp48 = & _min1;
39819#line 307
39820    __cil_tmp49 = *__cil_tmp48;
39821#line 307
39822    if (__cil_tmp49 < __cil_tmp47) {
39823#line 307
39824      __cil_tmp50 = & _min1;
39825#line 307
39826      tmp___7 = *__cil_tmp50;
39827    } else {
39828#line 307
39829      __cil_tmp51 = & _min2;
39830#line 307
39831      tmp___7 = *__cil_tmp51;
39832    }
39833    }
39834#line 307
39835    min = tmp___7;
39836#line 308
39837    __cil_tmp52 = & _max1;
39838#line 308
39839    *__cil_tmp52 = max;
39840#line 308
39841    __cil_tmp53 = & _max2;
39842#line 308
39843    *__cil_tmp53 = end;
39844    {
39845#line 308
39846    __cil_tmp54 = & _max2;
39847#line 308
39848    __cil_tmp55 = *__cil_tmp54;
39849#line 308
39850    __cil_tmp56 = & _max1;
39851#line 308
39852    __cil_tmp57 = *__cil_tmp56;
39853#line 308
39854    if (__cil_tmp57 > __cil_tmp55) {
39855#line 308
39856      __cil_tmp58 = & _max1;
39857#line 308
39858      tmp___8 = *__cil_tmp58;
39859    } else {
39860#line 308
39861      __cil_tmp59 = & _max2;
39862#line 308
39863      tmp___8 = *__cil_tmp59;
39864    }
39865    }
39866#line 308
39867    max = tmp___8;
39868#line 304
39869    __cil_tmp60 = (unsigned long )page;
39870#line 304
39871    __cil_tmp61 = __cil_tmp60 + 32;
39872#line 304
39873    __cil_tmp62 = *((struct list_head **)__cil_tmp61);
39874#line 304
39875    __mptr___0 = (struct list_head    *)__cil_tmp62;
39876#line 304
39877    __cil_tmp63 = (struct page *)0;
39878#line 304
39879    __cil_tmp64 = (unsigned long )__cil_tmp63;
39880#line 304
39881    __cil_tmp65 = __cil_tmp64 + 32;
39882#line 304
39883    __cil_tmp66 = (struct list_head *)__cil_tmp65;
39884#line 304
39885    __cil_tmp67 = (unsigned int )__cil_tmp66;
39886#line 304
39887    __cil_tmp68 = (char *)__mptr___0;
39888#line 304
39889    __cil_tmp69 = __cil_tmp68 - __cil_tmp67;
39890#line 304
39891    page = (struct page *)__cil_tmp69;
39892  }
39893  while_break: /* CIL Label */ ;
39894  }
39895#line 311
39896  if (min < max) {
39897#line 312
39898    __cil_tmp70 = 320 + 48;
39899#line 312
39900    __cil_tmp71 = (unsigned long )info;
39901#line 312
39902    __cil_tmp72 = __cil_tmp71 + __cil_tmp70;
39903#line 312
39904    __cil_tmp73 = *((__u32 *)__cil_tmp72);
39905#line 312
39906    __cil_tmp74 = (unsigned long )__cil_tmp73;
39907#line 312
39908    __cil_tmp75 = min / __cil_tmp74;
39909#line 312
39910    y1 = (int )__cil_tmp75;
39911#line 313
39912    __cil_tmp76 = 320 + 48;
39913#line 313
39914    __cil_tmp77 = (unsigned long )info;
39915#line 313
39916    __cil_tmp78 = __cil_tmp77 + __cil_tmp76;
39917#line 313
39918    __cil_tmp79 = *((__u32 *)__cil_tmp78);
39919#line 313
39920    __cil_tmp80 = (unsigned long )__cil_tmp79;
39921#line 313
39922    __cil_tmp81 = max / __cil_tmp80;
39923#line 313
39924    __cil_tmp82 = __cil_tmp81 + 1UL;
39925#line 313
39926    y2 = (int )__cil_tmp82;
39927    {
39928#line 315
39929    while (1) {
39930      while_continue___0: /* CIL Label */ ;
39931      {
39932#line 315
39933      while (1) {
39934        while_continue___1: /* CIL Label */ ;
39935        {
39936#line 315
39937        __cil_tmp83 = (unsigned long )par;
39938#line 315
39939        __cil_tmp84 = __cil_tmp83 + 160;
39940#line 315
39941        __cil_tmp85 = (spinlock_t *)__cil_tmp84;
39942#line 315
39943        tmp___9 = spinlock_check(__cil_tmp85);
39944#line 315
39945        flags = _raw_spin_lock_irqsave(tmp___9);
39946        }
39947#line 315
39948        goto while_break___1;
39949      }
39950      while_break___1: /* CIL Label */ ;
39951      }
39952#line 315
39953      goto while_break___0;
39954    }
39955    while_break___0: /* CIL Label */ ;
39956    }
39957    {
39958#line 316
39959    __cil_tmp86 = 160 + 28;
39960#line 316
39961    __cil_tmp87 = (unsigned long )par;
39962#line 316
39963    __cil_tmp88 = __cil_tmp87 + __cil_tmp86;
39964#line 316
39965    *((unsigned int *)__cil_tmp88) = 0U;
39966#line 317
39967    __cil_tmp89 = 160 + 32;
39968#line 317
39969    __cil_tmp90 = (unsigned long )par;
39970#line 317
39971    __cil_tmp91 = __cil_tmp90 + __cil_tmp89;
39972#line 317
39973    *((unsigned int *)__cil_tmp91) = (unsigned int )y1;
39974#line 318
39975    __cil_tmp92 = 160 + 36;
39976#line 318
39977    __cil_tmp93 = (unsigned long )par;
39978#line 318
39979    __cil_tmp94 = __cil_tmp93 + __cil_tmp92;
39980#line 318
39981    __cil_tmp95 = (unsigned long )info;
39982#line 318
39983    __cil_tmp96 = __cil_tmp95 + 160;
39984#line 318
39985    *((unsigned int *)__cil_tmp94) = *((__u32 *)__cil_tmp96);
39986#line 319
39987    __cil_tmp97 = 160 + 40;
39988#line 319
39989    __cil_tmp98 = (unsigned long )par;
39990#line 319
39991    __cil_tmp99 = __cil_tmp98 + __cil_tmp97;
39992#line 319
39993    *((unsigned int *)__cil_tmp99) = (unsigned int )y2;
39994#line 320
39995    __cil_tmp100 = (unsigned long )par;
39996#line 320
39997    __cil_tmp101 = __cil_tmp100 + 160;
39998#line 320
39999    __cil_tmp102 = (spinlock_t *)__cil_tmp101;
40000#line 320
40001    spin_unlock_irqrestore(__cil_tmp102, flags);
40002    }
40003  } else {
40004
40005  }
40006  {
40007#line 323
40008  vmw_fb_dirty_flush(par);
40009  }
40010#line 324
40011  return;
40012}
40013}
40014#line 326 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40015struct fb_deferred_io vmw_defio  =    {8UL, {{0}, {{{{{0U}}, 0U, 0U, (void *)0}}}, {(struct list_head *)0, (struct list_head *)0},
40016          (struct task_struct *)0, (char    *)0, (void *)0}, {(struct list_head *)0,
40017                                                                   (struct list_head *)0},
40018    & vmw_deferred_io};
40019#line 335 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40020static void vmw_fb_fillrect(struct fb_info *info , struct fb_fillrect    *rect ) 
40021{ unsigned long __cil_tmp3 ;
40022  unsigned long __cil_tmp4 ;
40023  void *__cil_tmp5 ;
40024  struct vmw_fb_par *__cil_tmp6 ;
40025  __u32    __cil_tmp7 ;
40026  unsigned int __cil_tmp8 ;
40027  unsigned long __cil_tmp9 ;
40028  unsigned long __cil_tmp10 ;
40029  __u32    __cil_tmp11 ;
40030  unsigned int __cil_tmp12 ;
40031  unsigned long __cil_tmp13 ;
40032  unsigned long __cil_tmp14 ;
40033  __u32    __cil_tmp15 ;
40034  unsigned int __cil_tmp16 ;
40035  unsigned long __cil_tmp17 ;
40036  unsigned long __cil_tmp18 ;
40037  __u32    __cil_tmp19 ;
40038  unsigned int __cil_tmp20 ;
40039
40040  {
40041  {
40042#line 337
40043  cfb_fillrect(info, rect);
40044#line 338
40045  __cil_tmp3 = (unsigned long )info;
40046#line 338
40047  __cil_tmp4 = __cil_tmp3 + 1160;
40048#line 338
40049  __cil_tmp5 = *((void **)__cil_tmp4);
40050#line 338
40051  __cil_tmp6 = (struct vmw_fb_par *)__cil_tmp5;
40052#line 338
40053  __cil_tmp7 = *((__u32    *)rect);
40054#line 338
40055  __cil_tmp8 = (unsigned int )__cil_tmp7;
40056#line 338
40057  __cil_tmp9 = (unsigned long )rect;
40058#line 338
40059  __cil_tmp10 = __cil_tmp9 + 4;
40060#line 338
40061  __cil_tmp11 = *((__u32    *)__cil_tmp10);
40062#line 338
40063  __cil_tmp12 = (unsigned int )__cil_tmp11;
40064#line 338
40065  __cil_tmp13 = (unsigned long )rect;
40066#line 338
40067  __cil_tmp14 = __cil_tmp13 + 8;
40068#line 338
40069  __cil_tmp15 = *((__u32    *)__cil_tmp14);
40070#line 338
40071  __cil_tmp16 = (unsigned int )__cil_tmp15;
40072#line 338
40073  __cil_tmp17 = (unsigned long )rect;
40074#line 338
40075  __cil_tmp18 = __cil_tmp17 + 12;
40076#line 338
40077  __cil_tmp19 = *((__u32    *)__cil_tmp18);
40078#line 338
40079  __cil_tmp20 = (unsigned int )__cil_tmp19;
40080#line 338
40081  vmw_fb_dirty_mark(__cil_tmp6, __cil_tmp8, __cil_tmp12, __cil_tmp16, __cil_tmp20);
40082  }
40083#line 340
40084  return;
40085}
40086}
40087#line 342 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40088static void vmw_fb_copyarea(struct fb_info *info , struct fb_copyarea    *region ) 
40089{ unsigned long __cil_tmp3 ;
40090  unsigned long __cil_tmp4 ;
40091  void *__cil_tmp5 ;
40092  struct vmw_fb_par *__cil_tmp6 ;
40093  __u32    __cil_tmp7 ;
40094  unsigned int __cil_tmp8 ;
40095  unsigned long __cil_tmp9 ;
40096  unsigned long __cil_tmp10 ;
40097  __u32    __cil_tmp11 ;
40098  unsigned int __cil_tmp12 ;
40099  unsigned long __cil_tmp13 ;
40100  unsigned long __cil_tmp14 ;
40101  __u32    __cil_tmp15 ;
40102  unsigned int __cil_tmp16 ;
40103  unsigned long __cil_tmp17 ;
40104  unsigned long __cil_tmp18 ;
40105  __u32    __cil_tmp19 ;
40106  unsigned int __cil_tmp20 ;
40107
40108  {
40109  {
40110#line 344
40111  cfb_copyarea(info, region);
40112#line 345
40113  __cil_tmp3 = (unsigned long )info;
40114#line 345
40115  __cil_tmp4 = __cil_tmp3 + 1160;
40116#line 345
40117  __cil_tmp5 = *((void **)__cil_tmp4);
40118#line 345
40119  __cil_tmp6 = (struct vmw_fb_par *)__cil_tmp5;
40120#line 345
40121  __cil_tmp7 = *((__u32    *)region);
40122#line 345
40123  __cil_tmp8 = (unsigned int )__cil_tmp7;
40124#line 345
40125  __cil_tmp9 = (unsigned long )region;
40126#line 345
40127  __cil_tmp10 = __cil_tmp9 + 4;
40128#line 345
40129  __cil_tmp11 = *((__u32    *)__cil_tmp10);
40130#line 345
40131  __cil_tmp12 = (unsigned int )__cil_tmp11;
40132#line 345
40133  __cil_tmp13 = (unsigned long )region;
40134#line 345
40135  __cil_tmp14 = __cil_tmp13 + 8;
40136#line 345
40137  __cil_tmp15 = *((__u32    *)__cil_tmp14);
40138#line 345
40139  __cil_tmp16 = (unsigned int )__cil_tmp15;
40140#line 345
40141  __cil_tmp17 = (unsigned long )region;
40142#line 345
40143  __cil_tmp18 = __cil_tmp17 + 12;
40144#line 345
40145  __cil_tmp19 = *((__u32    *)__cil_tmp18);
40146#line 345
40147  __cil_tmp20 = (unsigned int )__cil_tmp19;
40148#line 345
40149  vmw_fb_dirty_mark(__cil_tmp6, __cil_tmp8, __cil_tmp12, __cil_tmp16, __cil_tmp20);
40150  }
40151#line 347
40152  return;
40153}
40154}
40155#line 349 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40156static void vmw_fb_imageblit(struct fb_info *info , struct fb_image    *image ) 
40157{ unsigned long __cil_tmp3 ;
40158  unsigned long __cil_tmp4 ;
40159  void *__cil_tmp5 ;
40160  struct vmw_fb_par *__cil_tmp6 ;
40161  __u32    __cil_tmp7 ;
40162  unsigned int __cil_tmp8 ;
40163  unsigned long __cil_tmp9 ;
40164  unsigned long __cil_tmp10 ;
40165  __u32    __cil_tmp11 ;
40166  unsigned int __cil_tmp12 ;
40167  unsigned long __cil_tmp13 ;
40168  unsigned long __cil_tmp14 ;
40169  __u32    __cil_tmp15 ;
40170  unsigned int __cil_tmp16 ;
40171  unsigned long __cil_tmp17 ;
40172  unsigned long __cil_tmp18 ;
40173  __u32    __cil_tmp19 ;
40174  unsigned int __cil_tmp20 ;
40175
40176  {
40177  {
40178#line 351
40179  cfb_imageblit(info, image);
40180#line 352
40181  __cil_tmp3 = (unsigned long )info;
40182#line 352
40183  __cil_tmp4 = __cil_tmp3 + 1160;
40184#line 352
40185  __cil_tmp5 = *((void **)__cil_tmp4);
40186#line 352
40187  __cil_tmp6 = (struct vmw_fb_par *)__cil_tmp5;
40188#line 352
40189  __cil_tmp7 = *((__u32    *)image);
40190#line 352
40191  __cil_tmp8 = (unsigned int )__cil_tmp7;
40192#line 352
40193  __cil_tmp9 = (unsigned long )image;
40194#line 352
40195  __cil_tmp10 = __cil_tmp9 + 4;
40196#line 352
40197  __cil_tmp11 = *((__u32    *)__cil_tmp10);
40198#line 352
40199  __cil_tmp12 = (unsigned int )__cil_tmp11;
40200#line 352
40201  __cil_tmp13 = (unsigned long )image;
40202#line 352
40203  __cil_tmp14 = __cil_tmp13 + 8;
40204#line 352
40205  __cil_tmp15 = *((__u32    *)__cil_tmp14);
40206#line 352
40207  __cil_tmp16 = (unsigned int )__cil_tmp15;
40208#line 352
40209  __cil_tmp17 = (unsigned long )image;
40210#line 352
40211  __cil_tmp18 = __cil_tmp17 + 12;
40212#line 352
40213  __cil_tmp19 = *((__u32    *)__cil_tmp18);
40214#line 352
40215  __cil_tmp20 = (unsigned int )__cil_tmp19;
40216#line 352
40217  vmw_fb_dirty_mark(__cil_tmp6, __cil_tmp8, __cil_tmp12, __cil_tmp16, __cil_tmp20);
40218  }
40219#line 354
40220  return;
40221}
40222}
40223#line 360 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40224static struct fb_ops vmw_fb_ops  = 
40225#line 360
40226     {& __this_module, (int (*)(struct fb_info *info , int user ))0, (int (*)(struct fb_info *info ,
40227                                                                            int user ))0,
40228    (ssize_t (*)(struct fb_info *info , char *buf , size_t count , loff_t *ppos ))0,
40229    (ssize_t (*)(struct fb_info *info , char    *buf , size_t count , loff_t *ppos ))0,
40230    & vmw_fb_check_var, & vmw_fb_set_par, & vmw_fb_setcolreg, (int (*)(struct fb_cmap *cmap ,
40231                                                                       struct fb_info *info ))0,
40232    & vmw_fb_blank, & vmw_fb_pan_display, & vmw_fb_fillrect, & vmw_fb_copyarea, & vmw_fb_imageblit,
40233    (int (*)(struct fb_info *info , struct fb_cursor *cursor ))0, (void (*)(struct fb_info *info ,
40234                                                                            int angle ))0,
40235    (int (*)(struct fb_info *info ))0, (int (*)(struct fb_info *info , unsigned int cmd ,
40236                                                unsigned long arg ))0, (int (*)(struct fb_info *info ,
40237                                                                                unsigned int cmd ,
40238                                                                                unsigned long arg ))0,
40239    (int (*)(struct fb_info *info , struct vm_area_struct *vma ))0, (void (*)(struct fb_info *info ,
40240                                                                              struct fb_blit_caps *caps ,
40241                                                                              struct fb_var_screeninfo *var ))0,
40242    (void (*)(struct fb_info *info ))0, (int (*)(struct fb_info *info ))0, (int (*)(struct fb_info *info ))0};
40243#line 372 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40244static int vmw_fb_create_bo(struct vmw_private *vmw_priv___0 , size_t size , struct vmw_dma_buffer **out ) 
40245{ struct vmw_dma_buffer *vmw_bo ;
40246  struct ttm_placement ne_placement ;
40247  int ret ;
40248  long tmp___7 ;
40249  void *tmp___8 ;
40250  long tmp___9 ;
40251  struct ttm_placement *__cil_tmp10 ;
40252  struct ttm_placement *__cil_tmp11 ;
40253  unsigned long __cil_tmp12 ;
40254  unsigned long __cil_tmp13 ;
40255  size_t __cil_tmp14 ;
40256  size_t __cil_tmp15 ;
40257  size_t __cil_tmp16 ;
40258  unsigned long __cil_tmp17 ;
40259  unsigned long __cil_tmp18 ;
40260  struct ttm_lock *__cil_tmp19 ;
40261  bool __cil_tmp20 ;
40262  int __cil_tmp21 ;
40263  int __cil_tmp22 ;
40264  int __cil_tmp23 ;
40265  long __cil_tmp24 ;
40266  bool __cil_tmp25 ;
40267  int __cil_tmp26 ;
40268  int __cil_tmp27 ;
40269  int __cil_tmp28 ;
40270  long __cil_tmp29 ;
40271  unsigned long __cil_tmp30 ;
40272  unsigned long __cil_tmp31 ;
40273  struct ttm_lock *__cil_tmp32 ;
40274  unsigned long __cil_tmp33 ;
40275  unsigned long __cil_tmp34 ;
40276  struct ttm_lock *__cil_tmp35 ;
40277
40278  {
40279  {
40280#line 376
40281  __cil_tmp10 = & ne_placement;
40282#line 376
40283  __cil_tmp11 = & vmw_vram_ne_placement;
40284#line 376
40285  *__cil_tmp10 = *__cil_tmp11;
40286#line 379
40287  __cil_tmp12 = (unsigned long )(& ne_placement) + 4;
40288#line 379
40289  __cil_tmp13 = 1UL << 12;
40290#line 379
40291  __cil_tmp14 = size + __cil_tmp13;
40292#line 379
40293  __cil_tmp15 = __cil_tmp14 - 1UL;
40294#line 379
40295  __cil_tmp16 = __cil_tmp15 >> 12;
40296#line 379
40297  *((unsigned int *)__cil_tmp12) = (unsigned int )__cil_tmp16;
40298#line 382
40299  __cil_tmp17 = (unsigned long )vmw_priv___0;
40300#line 382
40301  __cil_tmp18 = __cil_tmp17 + 134392;
40302#line 382
40303  __cil_tmp19 = (struct ttm_lock *)__cil_tmp18;
40304#line 382
40305  __cil_tmp20 = (bool )0;
40306#line 382
40307  ret = ttm_write_lock(__cil_tmp19, __cil_tmp20);
40308#line 383
40309  __cil_tmp21 = ret != 0;
40310#line 383
40311  __cil_tmp22 = ! __cil_tmp21;
40312#line 383
40313  __cil_tmp23 = ! __cil_tmp22;
40314#line 383
40315  __cil_tmp24 = (long )__cil_tmp23;
40316#line 383
40317  tmp___7 = __builtin_expect(__cil_tmp24, 0L);
40318  }
40319#line 383
40320  if (tmp___7) {
40321#line 384
40322    return (ret);
40323  } else {
40324
40325  }
40326  {
40327#line 386
40328  tmp___8 = kmalloc(416UL, 208U);
40329#line 386
40330  vmw_bo = (struct vmw_dma_buffer *)tmp___8;
40331  }
40332#line 387
40333  if (! vmw_bo) {
40334#line 388
40335    goto err_unlock;
40336  } else {
40337
40338  }
40339  {
40340#line 390
40341  __cil_tmp25 = (bool )0;
40342#line 390
40343  ret = vmw_dmabuf_init(vmw_priv___0, vmw_bo, size, & ne_placement, __cil_tmp25, & vmw_dmabuf_bo_free);
40344#line 394
40345  __cil_tmp26 = ret != 0;
40346#line 394
40347  __cil_tmp27 = ! __cil_tmp26;
40348#line 394
40349  __cil_tmp28 = ! __cil_tmp27;
40350#line 394
40351  __cil_tmp29 = (long )__cil_tmp28;
40352#line 394
40353  tmp___9 = __builtin_expect(__cil_tmp29, 0L);
40354  }
40355#line 394
40356  if (tmp___9) {
40357#line 395
40358    goto err_unlock;
40359  } else {
40360
40361  }
40362  {
40363#line 397
40364  *out = vmw_bo;
40365#line 399
40366  __cil_tmp30 = (unsigned long )vmw_priv___0;
40367#line 399
40368  __cil_tmp31 = __cil_tmp30 + 134392;
40369#line 399
40370  __cil_tmp32 = (struct ttm_lock *)__cil_tmp31;
40371#line 399
40372  ttm_write_unlock(__cil_tmp32);
40373  }
40374#line 401
40375  return (0);
40376  err_unlock: 
40377  {
40378#line 404
40379  __cil_tmp33 = (unsigned long )vmw_priv___0;
40380#line 404
40381  __cil_tmp34 = __cil_tmp33 + 134392;
40382#line 404
40383  __cil_tmp35 = (struct ttm_lock *)__cil_tmp34;
40384#line 404
40385  ttm_write_unlock(__cil_tmp35);
40386  }
40387#line 405
40388  return (ret);
40389}
40390}
40391#line 531 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40392static struct lock_class_key __key___12  ;
40393#line 408 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
40394int vmw_fb_init(struct vmw_private *vmw_priv___0 ) 
40395{ struct device *device ;
40396  struct vmw_fb_par *par ;
40397  struct fb_info *info ;
40398  unsigned int initial_width ;
40399  unsigned int initial_height ;
40400  unsigned int fb_width ;
40401  unsigned int fb_height ;
40402  unsigned int fb_bpp ;
40403  unsigned int fb_depth ;
40404  unsigned int fb_offset ;
40405  unsigned int fb_pitch ;
40406  unsigned int fb_size ;
40407  int ret ;
40408  uint32_t _min1 ;
40409  unsigned int _min2 ;
40410  uint32_t tmp___7 ;
40411  uint32_t _min1___0 ;
40412  unsigned int _min2___0 ;
40413  uint32_t tmp___8 ;
40414  uint32_t _min1___1 ;
40415  unsigned int _min2___1 ;
40416  uint32_t tmp___9 ;
40417  uint32_t _min1___2 ;
40418  unsigned int _min2___2 ;
40419  uint32_t tmp___10 ;
40420  long tmp___11 ;
40421  long tmp___12 ;
40422  long tmp___13 ;
40423  unsigned int tmp___14 ;
40424  unsigned int tmp___15 ;
40425  long tmp___16 ;
40426  unsigned long __cil_tmp33 ;
40427  unsigned long __cil_tmp34 ;
40428  struct drm_device *__cil_tmp35 ;
40429  unsigned long __cil_tmp36 ;
40430  unsigned long __cil_tmp37 ;
40431  struct pci_dev *__cil_tmp38 ;
40432  unsigned long __cil_tmp39 ;
40433  unsigned long __cil_tmp40 ;
40434  uint32_t *__cil_tmp41 ;
40435  unsigned long __cil_tmp42 ;
40436  unsigned long __cil_tmp43 ;
40437  unsigned int *__cil_tmp44 ;
40438  unsigned int *__cil_tmp45 ;
40439  unsigned int __cil_tmp46 ;
40440  uint32_t *__cil_tmp47 ;
40441  uint32_t __cil_tmp48 ;
40442  uint32_t *__cil_tmp49 ;
40443  unsigned int *__cil_tmp50 ;
40444  uint32_t *__cil_tmp51 ;
40445  unsigned long __cil_tmp52 ;
40446  unsigned long __cil_tmp53 ;
40447  unsigned int *__cil_tmp54 ;
40448  unsigned int *__cil_tmp55 ;
40449  unsigned int __cil_tmp56 ;
40450  uint32_t *__cil_tmp57 ;
40451  uint32_t __cil_tmp58 ;
40452  uint32_t *__cil_tmp59 ;
40453  unsigned int *__cil_tmp60 ;
40454  uint32_t *__cil_tmp61 ;
40455  unsigned long __cil_tmp62 ;
40456  unsigned long __cil_tmp63 ;
40457  unsigned int *__cil_tmp64 ;
40458  unsigned int *__cil_tmp65 ;
40459  unsigned int __cil_tmp66 ;
40460  uint32_t *__cil_tmp67 ;
40461  uint32_t __cil_tmp68 ;
40462  uint32_t *__cil_tmp69 ;
40463  unsigned int *__cil_tmp70 ;
40464  uint32_t *__cil_tmp71 ;
40465  unsigned long __cil_tmp72 ;
40466  unsigned long __cil_tmp73 ;
40467  unsigned int *__cil_tmp74 ;
40468  unsigned int *__cil_tmp75 ;
40469  unsigned int __cil_tmp76 ;
40470  uint32_t *__cil_tmp77 ;
40471  uint32_t __cil_tmp78 ;
40472  uint32_t *__cil_tmp79 ;
40473  unsigned int *__cil_tmp80 ;
40474  unsigned int __cil_tmp81 ;
40475  unsigned long __cil_tmp82 ;
40476  unsigned long __cil_tmp83 ;
40477  unsigned long __cil_tmp84 ;
40478  unsigned long __cil_tmp85 ;
40479  void *__cil_tmp86 ;
40480  unsigned long __cil_tmp87 ;
40481  unsigned long __cil_tmp88 ;
40482  unsigned long __cil_tmp89 ;
40483  unsigned long __cil_tmp90 ;
40484  unsigned long __cil_tmp91 ;
40485  unsigned long __cil_tmp92 ;
40486  unsigned long __cil_tmp93 ;
40487  unsigned long __cil_tmp94 ;
40488  unsigned long __cil_tmp95 ;
40489  unsigned long __cil_tmp96 ;
40490  unsigned long __cil_tmp97 ;
40491  unsigned long __cil_tmp98 ;
40492  unsigned long __cil_tmp99 ;
40493  void *__cil_tmp100 ;
40494  unsigned long __cil_tmp101 ;
40495  unsigned long __cil_tmp102 ;
40496  unsigned long __cil_tmp103 ;
40497  void *__cil_tmp104 ;
40498  unsigned long __cil_tmp105 ;
40499  int __cil_tmp106 ;
40500  int __cil_tmp107 ;
40501  int __cil_tmp108 ;
40502  long __cil_tmp109 ;
40503  size_t __cil_tmp110 ;
40504  unsigned long __cil_tmp111 ;
40505  unsigned long __cil_tmp112 ;
40506  struct vmw_dma_buffer **__cil_tmp113 ;
40507  int __cil_tmp114 ;
40508  int __cil_tmp115 ;
40509  int __cil_tmp116 ;
40510  long __cil_tmp117 ;
40511  unsigned long __cil_tmp118 ;
40512  unsigned long __cil_tmp119 ;
40513  struct vmw_dma_buffer *__cil_tmp120 ;
40514  struct ttm_buffer_object *__cil_tmp121 ;
40515  unsigned long __cil_tmp122 ;
40516  unsigned long __cil_tmp123 ;
40517  unsigned long __cil_tmp124 ;
40518  struct vmw_dma_buffer *__cil_tmp125 ;
40519  unsigned long __cil_tmp126 ;
40520  unsigned long __cil_tmp127 ;
40521  unsigned long __cil_tmp128 ;
40522  unsigned long __cil_tmp129 ;
40523  unsigned long __cil_tmp130 ;
40524  struct ttm_bo_kmap_obj *__cil_tmp131 ;
40525  int __cil_tmp132 ;
40526  int __cil_tmp133 ;
40527  int __cil_tmp134 ;
40528  long __cil_tmp135 ;
40529  unsigned long __cil_tmp136 ;
40530  unsigned long __cil_tmp137 ;
40531  unsigned long __cil_tmp138 ;
40532  unsigned long __cil_tmp139 ;
40533  struct ttm_bo_kmap_obj *__cil_tmp140 ;
40534  unsigned long __cil_tmp141 ;
40535  unsigned long __cil_tmp142 ;
40536  bool *__cil_tmp143 ;
40537  unsigned long __cil_tmp144 ;
40538  unsigned long __cil_tmp145 ;
40539  unsigned long __cil_tmp146 ;
40540  unsigned long __cil_tmp147 ;
40541  unsigned long __cil_tmp148 ;
40542  unsigned long __cil_tmp149 ;
40543  unsigned long __cil_tmp150 ;
40544  char *__cil_tmp151 ;
40545  unsigned long __cil_tmp152 ;
40546  unsigned long __cil_tmp153 ;
40547  unsigned long __cil_tmp154 ;
40548  unsigned long __cil_tmp155 ;
40549  unsigned long __cil_tmp156 ;
40550  unsigned long __cil_tmp157 ;
40551  unsigned long __cil_tmp158 ;
40552  unsigned long __cil_tmp159 ;
40553  unsigned long __cil_tmp160 ;
40554  unsigned long __cil_tmp161 ;
40555  unsigned long __cil_tmp162 ;
40556  unsigned long __cil_tmp163 ;
40557  unsigned long __cil_tmp164 ;
40558  unsigned long __cil_tmp165 ;
40559  unsigned long __cil_tmp166 ;
40560  unsigned long __cil_tmp167 ;
40561  unsigned long __cil_tmp168 ;
40562  unsigned long __cil_tmp169 ;
40563  unsigned long __cil_tmp170 ;
40564  unsigned long __cil_tmp171 ;
40565  unsigned long __cil_tmp172 ;
40566  unsigned long __cil_tmp173 ;
40567  unsigned long __cil_tmp174 ;
40568  unsigned long __cil_tmp175 ;
40569  unsigned long __cil_tmp176 ;
40570  unsigned long __cil_tmp177 ;
40571  unsigned long __cil_tmp178 ;
40572  unsigned long __cil_tmp179 ;
40573  unsigned long __cil_tmp180 ;
40574  unsigned long __cil_tmp181 ;
40575  unsigned long __cil_tmp182 ;
40576  unsigned long __cil_tmp183 ;
40577  unsigned long __cil_tmp184 ;
40578  unsigned long __cil_tmp185 ;
40579  unsigned long __cil_tmp186 ;
40580  unsigned long __cil_tmp187 ;
40581  u32 *__cil_tmp188 ;
40582  unsigned long __cil_tmp189 ;
40583  unsigned long __cil_tmp190 ;
40584  unsigned long __cil_tmp191 ;
40585  unsigned long __cil_tmp192 ;
40586  void *__cil_tmp193 ;
40587  unsigned long __cil_tmp194 ;
40588  unsigned long __cil_tmp195 ;
40589  unsigned long __cil_tmp196 ;
40590  unsigned long __cil_tmp197 ;
40591  unsigned long __cil_tmp198 ;
40592  unsigned long __cil_tmp199 ;
40593  unsigned long __cil_tmp200 ;
40594  unsigned long __cil_tmp201 ;
40595  unsigned long __cil_tmp202 ;
40596  unsigned long __cil_tmp203 ;
40597  unsigned long __cil_tmp204 ;
40598  unsigned long __cil_tmp205 ;
40599  unsigned long __cil_tmp206 ;
40600  unsigned long __cil_tmp207 ;
40601  unsigned long __cil_tmp208 ;
40602  unsigned long __cil_tmp209 ;
40603  unsigned long __cil_tmp210 ;
40604  unsigned long __cil_tmp211 ;
40605  unsigned long __cil_tmp212 ;
40606  unsigned long __cil_tmp213 ;
40607  unsigned long __cil_tmp214 ;
40608  unsigned long __cil_tmp215 ;
40609  unsigned long __cil_tmp216 ;
40610  unsigned long __cil_tmp217 ;
40611  unsigned long __cil_tmp218 ;
40612  unsigned long __cil_tmp219 ;
40613  unsigned long __cil_tmp220 ;
40614  unsigned long __cil_tmp221 ;
40615  unsigned long __cil_tmp222 ;
40616  unsigned long __cil_tmp223 ;
40617  unsigned long __cil_tmp224 ;
40618  unsigned long __cil_tmp225 ;
40619  unsigned long __cil_tmp226 ;
40620  unsigned long __cil_tmp227 ;
40621  unsigned long __cil_tmp228 ;
40622  unsigned long __cil_tmp229 ;
40623  unsigned long __cil_tmp230 ;
40624  unsigned long __cil_tmp231 ;
40625  unsigned long __cil_tmp232 ;
40626  unsigned long __cil_tmp233 ;
40627  unsigned long __cil_tmp234 ;
40628  unsigned long __cil_tmp235 ;
40629  unsigned long __cil_tmp236 ;
40630  unsigned long __cil_tmp237 ;
40631  unsigned long __cil_tmp238 ;
40632  unsigned long __cil_tmp239 ;
40633  unsigned long __cil_tmp240 ;
40634  unsigned long __cil_tmp241 ;
40635  unsigned long __cil_tmp242 ;
40636  unsigned long __cil_tmp243 ;
40637  unsigned long __cil_tmp244 ;
40638  unsigned long __cil_tmp245 ;
40639  unsigned long __cil_tmp246 ;
40640  unsigned long __cil_tmp247 ;
40641  unsigned long __cil_tmp248 ;
40642  unsigned long __cil_tmp249 ;
40643  unsigned long __cil_tmp250 ;
40644  unsigned long __cil_tmp251 ;
40645  unsigned long __cil_tmp252 ;
40646  unsigned long __cil_tmp253 ;
40647  unsigned long __cil_tmp254 ;
40648  unsigned long __cil_tmp255 ;
40649  unsigned long __cil_tmp256 ;
40650  unsigned long __cil_tmp257 ;
40651  unsigned long __cil_tmp258 ;
40652  unsigned long __cil_tmp259 ;
40653  unsigned long __cil_tmp260 ;
40654  unsigned long __cil_tmp261 ;
40655  unsigned long __cil_tmp262 ;
40656  struct apertures_struct *__cil_tmp263 ;
40657  unsigned long __cil_tmp264 ;
40658  unsigned long __cil_tmp265 ;
40659  unsigned long __cil_tmp266 ;
40660  unsigned long __cil_tmp267 ;
40661  struct apertures_struct *__cil_tmp268 ;
40662  unsigned long __cil_tmp269 ;
40663  unsigned long __cil_tmp270 ;
40664  unsigned long __cil_tmp271 ;
40665  unsigned long __cil_tmp272 ;
40666  uint32_t __cil_tmp273 ;
40667  unsigned long __cil_tmp274 ;
40668  unsigned long __cil_tmp275 ;
40669  unsigned long __cil_tmp276 ;
40670  unsigned long __cil_tmp277 ;
40671  unsigned long __cil_tmp278 ;
40672  struct apertures_struct *__cil_tmp279 ;
40673  unsigned long __cil_tmp280 ;
40674  unsigned long __cil_tmp281 ;
40675  unsigned long __cil_tmp282 ;
40676  unsigned long __cil_tmp283 ;
40677  uint32_t __cil_tmp284 ;
40678  unsigned long __cil_tmp285 ;
40679  unsigned long __cil_tmp286 ;
40680  unsigned long __cil_tmp287 ;
40681  unsigned long __cil_tmp288 ;
40682  unsigned long __cil_tmp289 ;
40683  unsigned long __cil_tmp290 ;
40684  unsigned long __cil_tmp291 ;
40685  unsigned long __cil_tmp292 ;
40686  unsigned long __cil_tmp293 ;
40687  unsigned long __cil_tmp294 ;
40688  unsigned long __cil_tmp295 ;
40689  unsigned long __cil_tmp296 ;
40690  unsigned long __cil_tmp297 ;
40691  unsigned long __cil_tmp298 ;
40692  unsigned long __cil_tmp299 ;
40693  unsigned long __cil_tmp300 ;
40694  unsigned long __cil_tmp301 ;
40695  spinlock_t *__cil_tmp302 ;
40696  unsigned long __cil_tmp303 ;
40697  unsigned long __cil_tmp304 ;
40698  struct raw_spinlock *__cil_tmp305 ;
40699  unsigned long __cil_tmp306 ;
40700  unsigned long __cil_tmp307 ;
40701  int __cil_tmp308 ;
40702  int __cil_tmp309 ;
40703  int __cil_tmp310 ;
40704  long __cil_tmp311 ;
40705  unsigned long __cil_tmp312 ;
40706  unsigned long __cil_tmp313 ;
40707  struct ttm_bo_kmap_obj *__cil_tmp314 ;
40708  unsigned long __cil_tmp315 ;
40709  unsigned long __cil_tmp316 ;
40710  struct vmw_dma_buffer **__cil_tmp317 ;
40711  struct ttm_buffer_object **__cil_tmp318 ;
40712  unsigned long __cil_tmp319 ;
40713  unsigned long __cil_tmp320 ;
40714  void *__cil_tmp321 ;
40715  void    *__cil_tmp322 ;
40716  unsigned long __cil_tmp323 ;
40717  unsigned long __cil_tmp324 ;
40718
40719  {
40720#line 410
40721  __cil_tmp33 = (unsigned long )vmw_priv___0;
40722#line 410
40723  __cil_tmp34 = __cil_tmp33 + 2088;
40724#line 410
40725  __cil_tmp35 = *((struct drm_device **)__cil_tmp34);
40726#line 410
40727  __cil_tmp36 = (unsigned long )__cil_tmp35;
40728#line 410
40729  __cil_tmp37 = __cil_tmp36 + 1016;
40730#line 410
40731  __cil_tmp38 = *((struct pci_dev **)__cil_tmp37);
40732#line 410
40733  __cil_tmp39 = (unsigned long )__cil_tmp38;
40734#line 410
40735  __cil_tmp40 = __cil_tmp39 + 144;
40736#line 410
40737  device = (struct device *)__cil_tmp40;
40738#line 418
40739  fb_bpp = 32U;
40740#line 419
40741  fb_depth = 24U;
40742#line 422
40743  __cil_tmp41 = & _min1;
40744#line 422
40745  __cil_tmp42 = (unsigned long )vmw_priv___0;
40746#line 422
40747  __cil_tmp43 = __cil_tmp42 + 2124;
40748#line 422
40749  *__cil_tmp41 = *((uint32_t *)__cil_tmp43);
40750#line 422
40751  __cil_tmp44 = & _min2;
40752#line 422
40753  *__cil_tmp44 = 2048U;
40754  {
40755#line 422
40756  __cil_tmp45 = & _min2;
40757#line 422
40758  __cil_tmp46 = *__cil_tmp45;
40759#line 422
40760  __cil_tmp47 = & _min1;
40761#line 422
40762  __cil_tmp48 = *__cil_tmp47;
40763#line 422
40764  if (__cil_tmp48 < __cil_tmp46) {
40765#line 422
40766    __cil_tmp49 = & _min1;
40767#line 422
40768    tmp___7 = *__cil_tmp49;
40769  } else {
40770#line 422
40771    __cil_tmp50 = & _min2;
40772#line 422
40773    tmp___7 = *__cil_tmp50;
40774  }
40775  }
40776#line 422
40777  fb_width = tmp___7;
40778#line 423
40779  __cil_tmp51 = & _min1___0;
40780#line 423
40781  __cil_tmp52 = (unsigned long )vmw_priv___0;
40782#line 423
40783  __cil_tmp53 = __cil_tmp52 + 2128;
40784#line 423
40785  *__cil_tmp51 = *((uint32_t *)__cil_tmp53);
40786#line 423
40787  __cil_tmp54 = & _min2___0;
40788#line 423
40789  *__cil_tmp54 = 2048U;
40790  {
40791#line 423
40792  __cil_tmp55 = & _min2___0;
40793#line 423
40794  __cil_tmp56 = *__cil_tmp55;
40795#line 423
40796  __cil_tmp57 = & _min1___0;
40797#line 423
40798  __cil_tmp58 = *__cil_tmp57;
40799#line 423
40800  if (__cil_tmp58 < __cil_tmp56) {
40801#line 423
40802    __cil_tmp59 = & _min1___0;
40803#line 423
40804    tmp___8 = *__cil_tmp59;
40805  } else {
40806#line 423
40807    __cil_tmp60 = & _min2___0;
40808#line 423
40809    tmp___8 = *__cil_tmp60;
40810  }
40811  }
40812#line 423
40813  fb_height = tmp___8;
40814#line 425
40815  __cil_tmp61 = & _min1___1;
40816#line 425
40817  __cil_tmp62 = (unsigned long )vmw_priv___0;
40818#line 425
40819  __cil_tmp63 = __cil_tmp62 + 2132;
40820#line 425
40821  *__cil_tmp61 = *((uint32_t *)__cil_tmp63);
40822#line 425
40823  __cil_tmp64 = & _min2___1;
40824#line 425
40825  *__cil_tmp64 = fb_width;
40826  {
40827#line 425
40828  __cil_tmp65 = & _min2___1;
40829#line 425
40830  __cil_tmp66 = *__cil_tmp65;
40831#line 425
40832  __cil_tmp67 = & _min1___1;
40833#line 425
40834  __cil_tmp68 = *__cil_tmp67;
40835#line 425
40836  if (__cil_tmp68 < __cil_tmp66) {
40837#line 425
40838    __cil_tmp69 = & _min1___1;
40839#line 425
40840    tmp___9 = *__cil_tmp69;
40841  } else {
40842#line 425
40843    __cil_tmp70 = & _min2___1;
40844#line 425
40845    tmp___9 = *__cil_tmp70;
40846  }
40847  }
40848#line 425
40849  initial_width = tmp___9;
40850#line 426
40851  __cil_tmp71 = & _min1___2;
40852#line 426
40853  __cil_tmp72 = (unsigned long )vmw_priv___0;
40854#line 426
40855  __cil_tmp73 = __cil_tmp72 + 2136;
40856#line 426
40857  *__cil_tmp71 = *((uint32_t *)__cil_tmp73);
40858#line 426
40859  __cil_tmp74 = & _min2___2;
40860#line 426
40861  *__cil_tmp74 = fb_height;
40862  {
40863#line 426
40864  __cil_tmp75 = & _min2___2;
40865#line 426
40866  __cil_tmp76 = *__cil_tmp75;
40867#line 426
40868  __cil_tmp77 = & _min1___2;
40869#line 426
40870  __cil_tmp78 = *__cil_tmp77;
40871#line 426
40872  if (__cil_tmp78 < __cil_tmp76) {
40873#line 426
40874    __cil_tmp79 = & _min1___2;
40875#line 426
40876    tmp___10 = *__cil_tmp79;
40877  } else {
40878#line 426
40879    __cil_tmp80 = & _min2___2;
40880#line 426
40881    tmp___10 = *__cil_tmp80;
40882  }
40883  }
40884  {
40885#line 426
40886  initial_height = tmp___10;
40887#line 428
40888  __cil_tmp81 = fb_width * fb_bpp;
40889#line 428
40890  fb_pitch = __cil_tmp81 / 8U;
40891#line 429
40892  fb_size = fb_pitch * fb_height;
40893#line 430
40894  fb_offset = vmw_read(vmw_priv___0, 14U);
40895#line 432
40896  info = framebuffer_alloc(208UL, device);
40897  }
40898#line 433
40899  if (! info) {
40900#line 434
40901    return (-12);
40902  } else {
40903
40904  }
40905  {
40906#line 439
40907  __cil_tmp82 = (unsigned long )vmw_priv___0;
40908#line 439
40909  __cil_tmp83 = __cil_tmp82 + 2600;
40910#line 439
40911  *((void **)__cil_tmp83) = (void *)info;
40912#line 440
40913  __cil_tmp84 = (unsigned long )info;
40914#line 440
40915  __cil_tmp85 = __cil_tmp84 + 1160;
40916#line 440
40917  __cil_tmp86 = *((void **)__cil_tmp85);
40918#line 440
40919  par = (struct vmw_fb_par *)__cil_tmp86;
40920#line 441
40921  *((struct vmw_private **)par) = vmw_priv___0;
40922#line 442
40923  __cil_tmp87 = (unsigned long )par;
40924#line 442
40925  __cil_tmp88 = __cil_tmp87 + 124;
40926#line 442
40927  *((unsigned int *)__cil_tmp88) = fb_depth;
40928#line 443
40929  __cil_tmp89 = (unsigned long )par;
40930#line 443
40931  __cil_tmp90 = __cil_tmp89 + 128;
40932#line 443
40933  *((unsigned int *)__cil_tmp90) = fb_bpp;
40934#line 444
40935  __cil_tmp91 = (unsigned long )par;
40936#line 444
40937  __cil_tmp92 = __cil_tmp91 + 8;
40938#line 444
40939  *((void **)__cil_tmp92) = (void *)0;
40940#line 445
40941  __cil_tmp93 = (unsigned long )par;
40942#line 445
40943  __cil_tmp94 = __cil_tmp93 + 132;
40944#line 445
40945  *((unsigned int *)__cil_tmp94) = fb_width;
40946#line 446
40947  __cil_tmp95 = (unsigned long )par;
40948#line 446
40949  __cil_tmp96 = __cil_tmp95 + 136;
40950#line 446
40951  *((unsigned int *)__cil_tmp96) = fb_height;
40952#line 451
40953  __cil_tmp97 = (unsigned long )par;
40954#line 451
40955  __cil_tmp98 = __cil_tmp97 + 8;
40956#line 451
40957  __cil_tmp99 = (unsigned long )fb_size;
40958#line 451
40959  *((void **)__cil_tmp98) = vmalloc(__cil_tmp99);
40960#line 452
40961  __cil_tmp100 = (void *)0;
40962#line 452
40963  __cil_tmp101 = (unsigned long )__cil_tmp100;
40964#line 452
40965  __cil_tmp102 = (unsigned long )par;
40966#line 452
40967  __cil_tmp103 = __cil_tmp102 + 8;
40968#line 452
40969  __cil_tmp104 = *((void **)__cil_tmp103);
40970#line 452
40971  __cil_tmp105 = (unsigned long )__cil_tmp104;
40972#line 452
40973  __cil_tmp106 = __cil_tmp105 == __cil_tmp101;
40974#line 452
40975  __cil_tmp107 = ! __cil_tmp106;
40976#line 452
40977  __cil_tmp108 = ! __cil_tmp107;
40978#line 452
40979  __cil_tmp109 = (long )__cil_tmp108;
40980#line 452
40981  tmp___11 = __builtin_expect(__cil_tmp109, 0L);
40982  }
40983#line 452
40984  if (tmp___11) {
40985#line 453
40986    ret = -12;
40987#line 454
40988    goto err_free;
40989  } else {
40990
40991  }
40992  {
40993#line 457
40994  __cil_tmp110 = (size_t )fb_size;
40995#line 457
40996  __cil_tmp111 = (unsigned long )par;
40997#line 457
40998  __cil_tmp112 = __cil_tmp111 + 16;
40999#line 457
41000  __cil_tmp113 = (struct vmw_dma_buffer **)__cil_tmp112;
41001#line 457
41002  ret = vmw_fb_create_bo(vmw_priv___0, __cil_tmp110, __cil_tmp113);
41003#line 458
41004  __cil_tmp114 = ret != 0;
41005#line 458
41006  __cil_tmp115 = ! __cil_tmp114;
41007#line 458
41008  __cil_tmp116 = ! __cil_tmp115;
41009#line 458
41010  __cil_tmp117 = (long )__cil_tmp116;
41011#line 458
41012  tmp___12 = __builtin_expect(__cil_tmp117, 0L);
41013  }
41014#line 458
41015  if (tmp___12) {
41016#line 459
41017    goto err_free;
41018  } else {
41019
41020  }
41021  {
41022#line 461
41023  __cil_tmp118 = (unsigned long )par;
41024#line 461
41025  __cil_tmp119 = __cil_tmp118 + 16;
41026#line 461
41027  __cil_tmp120 = *((struct vmw_dma_buffer **)__cil_tmp119);
41028#line 461
41029  __cil_tmp121 = (struct ttm_buffer_object *)__cil_tmp120;
41030#line 461
41031  __cil_tmp122 = 0 + 40;
41032#line 461
41033  __cil_tmp123 = (unsigned long )par;
41034#line 461
41035  __cil_tmp124 = __cil_tmp123 + 16;
41036#line 461
41037  __cil_tmp125 = *((struct vmw_dma_buffer **)__cil_tmp124);
41038#line 461
41039  __cil_tmp126 = (unsigned long )__cil_tmp125;
41040#line 461
41041  __cil_tmp127 = __cil_tmp126 + __cil_tmp122;
41042#line 461
41043  __cil_tmp128 = *((unsigned long *)__cil_tmp127);
41044#line 461
41045  __cil_tmp129 = (unsigned long )par;
41046#line 461
41047  __cil_tmp130 = __cil_tmp129 + 24;
41048#line 461
41049  __cil_tmp131 = (struct ttm_bo_kmap_obj *)__cil_tmp130;
41050#line 461
41051  ret = ttm_bo_kmap(__cil_tmp121, 0UL, __cil_tmp128, __cil_tmp131);
41052#line 465
41053  __cil_tmp132 = ret != 0;
41054#line 465
41055  __cil_tmp133 = ! __cil_tmp132;
41056#line 465
41057  __cil_tmp134 = ! __cil_tmp133;
41058#line 465
41059  __cil_tmp135 = (long )__cil_tmp134;
41060#line 465
41061  tmp___13 = __builtin_expect(__cil_tmp135, 0L);
41062  }
41063#line 465
41064  if (tmp___13) {
41065#line 466
41066    goto err_unref;
41067  } else {
41068
41069  }
41070  {
41071#line 467
41072  __cil_tmp136 = (unsigned long )par;
41073#line 467
41074  __cil_tmp137 = __cil_tmp136 + 144;
41075#line 467
41076  __cil_tmp138 = (unsigned long )par;
41077#line 467
41078  __cil_tmp139 = __cil_tmp138 + 24;
41079#line 467
41080  __cil_tmp140 = (struct ttm_bo_kmap_obj *)__cil_tmp139;
41081#line 467
41082  __cil_tmp141 = (unsigned long )par;
41083#line 467
41084  __cil_tmp142 = __cil_tmp141 + 156;
41085#line 467
41086  __cil_tmp143 = (bool *)__cil_tmp142;
41087#line 467
41088  *((void **)__cil_tmp137) = ttm_kmap_obj_virtual(__cil_tmp140, __cil_tmp143);
41089#line 468
41090  __cil_tmp144 = (unsigned long )par;
41091#line 468
41092  __cil_tmp145 = __cil_tmp144 + 152;
41093#line 468
41094  *((unsigned int *)__cil_tmp145) = fb_size;
41095#line 473
41096  __cil_tmp146 = 0 * 1UL;
41097#line 473
41098  __cil_tmp147 = 0 + __cil_tmp146;
41099#line 473
41100  __cil_tmp148 = 320 + __cil_tmp147;
41101#line 473
41102  __cil_tmp149 = (unsigned long )info;
41103#line 473
41104  __cil_tmp150 = __cil_tmp149 + __cil_tmp148;
41105#line 473
41106  __cil_tmp151 = (char *)__cil_tmp150;
41107#line 473
41108  strcpy(__cil_tmp151, "svgadrmfb");
41109#line 474
41110  __cil_tmp152 = 320 + 28;
41111#line 474
41112  __cil_tmp153 = (unsigned long )info;
41113#line 474
41114  __cil_tmp154 = __cil_tmp153 + __cil_tmp152;
41115#line 474
41116  *((__u32 *)__cil_tmp154) = (__u32 )0;
41117#line 475
41118  __cil_tmp155 = 320 + 36;
41119#line 475
41120  __cil_tmp156 = (unsigned long )info;
41121#line 475
41122  __cil_tmp157 = __cil_tmp156 + __cil_tmp155;
41123#line 475
41124  *((__u32 *)__cil_tmp157) = (__u32 )2;
41125#line 476
41126  __cil_tmp158 = 320 + 32;
41127#line 476
41128  __cil_tmp159 = (unsigned long )info;
41129#line 476
41130  __cil_tmp160 = __cil_tmp159 + __cil_tmp158;
41131#line 476
41132  *((__u32 *)__cil_tmp160) = (__u32 )0;
41133#line 477
41134  __cil_tmp161 = 320 + 40;
41135#line 477
41136  __cil_tmp162 = (unsigned long )info;
41137#line 477
41138  __cil_tmp163 = __cil_tmp162 + __cil_tmp161;
41139#line 477
41140  *((__u16 *)__cil_tmp163) = (__u16 )1;
41141#line 478
41142  __cil_tmp164 = 320 + 42;
41143#line 478
41144  __cil_tmp165 = (unsigned long )info;
41145#line 478
41146  __cil_tmp166 = __cil_tmp165 + __cil_tmp164;
41147#line 478
41148  *((__u16 *)__cil_tmp166) = (__u16 )1;
41149#line 479
41150  __cil_tmp167 = 320 + 44;
41151#line 479
41152  __cil_tmp168 = (unsigned long )info;
41153#line 479
41154  __cil_tmp169 = __cil_tmp168 + __cil_tmp167;
41155#line 479
41156  *((__u16 *)__cil_tmp169) = (__u16 )0;
41157#line 480
41158  __cil_tmp170 = 320 + 68;
41159#line 480
41160  __cil_tmp171 = (unsigned long )info;
41161#line 480
41162  __cil_tmp172 = __cil_tmp171 + __cil_tmp170;
41163#line 480
41164  *((__u32 *)__cil_tmp172) = (__u32 )0;
41165#line 481
41166  __cil_tmp173 = 320 + 48;
41167#line 481
41168  __cil_tmp174 = (unsigned long )info;
41169#line 481
41170  __cil_tmp175 = __cil_tmp174 + __cil_tmp173;
41171#line 481
41172  *((__u32 *)__cil_tmp175) = fb_pitch;
41173#line 483
41174  __cil_tmp176 = 320 + 16;
41175#line 483
41176  __cil_tmp177 = (unsigned long )info;
41177#line 483
41178  __cil_tmp178 = __cil_tmp177 + __cil_tmp176;
41179#line 483
41180  *((unsigned long *)__cil_tmp178) = 0UL;
41181#line 484
41182  __cil_tmp179 = 320 + 24;
41183#line 484
41184  __cil_tmp180 = (unsigned long )info;
41185#line 484
41186  __cil_tmp181 = __cil_tmp180 + __cil_tmp179;
41187#line 484
41188  *((__u32 *)__cil_tmp181) = fb_size;
41189#line 486
41190  __cil_tmp182 = (unsigned long )info;
41191#line 486
41192  __cil_tmp183 = __cil_tmp182 + 1136;
41193#line 486
41194  __cil_tmp184 = 0 * 4UL;
41195#line 486
41196  __cil_tmp185 = 56 + __cil_tmp184;
41197#line 486
41198  __cil_tmp186 = (unsigned long )par;
41199#line 486
41200  __cil_tmp187 = __cil_tmp186 + __cil_tmp185;
41201#line 486
41202  __cil_tmp188 = (u32 *)__cil_tmp187;
41203#line 486
41204  *((void **)__cil_tmp183) = (void *)__cil_tmp188;
41205#line 487
41206  __cil_tmp189 = (unsigned long )info;
41207#line 487
41208  __cil_tmp190 = __cil_tmp189 + 1120;
41209#line 487
41210  __cil_tmp191 = (unsigned long )par;
41211#line 487
41212  __cil_tmp192 = __cil_tmp191 + 8;
41213#line 487
41214  __cil_tmp193 = *((void **)__cil_tmp192);
41215#line 487
41216  *((char **)__cil_tmp190) = (char *)__cil_tmp193;
41217#line 488
41218  __cil_tmp194 = (unsigned long )info;
41219#line 488
41220  __cil_tmp195 = __cil_tmp194 + 1128;
41221#line 488
41222  *((unsigned long *)__cil_tmp195) = (unsigned long )fb_size;
41223#line 490
41224  __cil_tmp196 = (unsigned long )info;
41225#line 490
41226  __cil_tmp197 = __cil_tmp196 + 8;
41227#line 490
41228  *((int *)__cil_tmp197) = 1;
41229#line 491
41230  __cil_tmp198 = (unsigned long )info;
41231#line 491
41232  __cil_tmp199 = __cil_tmp198 + 1080;
41233#line 491
41234  *((struct fb_ops **)__cil_tmp199) = & vmw_fb_ops;
41235#line 494
41236  __cil_tmp200 = 160 + 32;
41237#line 494
41238  __cil_tmp201 = (unsigned long )info;
41239#line 494
41240  __cil_tmp202 = __cil_tmp201 + __cil_tmp200;
41241#line 494
41242  *((__u32 *)__cil_tmp202) = (__u32 )16;
41243#line 495
41244  __cil_tmp203 = 160 + 44;
41245#line 495
41246  __cil_tmp204 = (unsigned long )info;
41247#line 495
41248  __cil_tmp205 = __cil_tmp204 + __cil_tmp203;
41249#line 495
41250  *((__u32 *)__cil_tmp205) = (__u32 )8;
41251#line 496
41252  __cil_tmp206 = 160 + 56;
41253#line 496
41254  __cil_tmp207 = (unsigned long )info;
41255#line 496
41256  __cil_tmp208 = __cil_tmp207 + __cil_tmp206;
41257#line 496
41258  *((__u32 *)__cil_tmp208) = (__u32 )0;
41259#line 497
41260  __cil_tmp209 = 32 + 4;
41261#line 497
41262  __cil_tmp210 = 160 + __cil_tmp209;
41263#line 497
41264  __cil_tmp211 = (unsigned long )info;
41265#line 497
41266  __cil_tmp212 = __cil_tmp211 + __cil_tmp210;
41267#line 497
41268  *((__u32 *)__cil_tmp212) = (__u32 )8;
41269#line 498
41270  __cil_tmp213 = 44 + 4;
41271#line 498
41272  __cil_tmp214 = 160 + __cil_tmp213;
41273#line 498
41274  __cil_tmp215 = (unsigned long )info;
41275#line 498
41276  __cil_tmp216 = __cil_tmp215 + __cil_tmp214;
41277#line 498
41278  *((__u32 *)__cil_tmp216) = (__u32 )8;
41279#line 499
41280  __cil_tmp217 = 56 + 4;
41281#line 499
41282  __cil_tmp218 = 160 + __cil_tmp217;
41283#line 499
41284  __cil_tmp219 = (unsigned long )info;
41285#line 499
41286  __cil_tmp220 = __cil_tmp219 + __cil_tmp218;
41287#line 499
41288  *((__u32 *)__cil_tmp220) = (__u32 )8;
41289#line 500
41290  __cil_tmp221 = 160 + 68;
41291#line 500
41292  __cil_tmp222 = (unsigned long )info;
41293#line 500
41294  __cil_tmp223 = __cil_tmp222 + __cil_tmp221;
41295#line 500
41296  *((__u32 *)__cil_tmp223) = (__u32 )0;
41297#line 501
41298  __cil_tmp224 = 68 + 4;
41299#line 501
41300  __cil_tmp225 = 160 + __cil_tmp224;
41301#line 501
41302  __cil_tmp226 = (unsigned long )info;
41303#line 501
41304  __cil_tmp227 = __cil_tmp226 + __cil_tmp225;
41305#line 501
41306  *((__u32 *)__cil_tmp227) = (__u32 )0;
41307#line 503
41308  __cil_tmp228 = 160 + 8;
41309#line 503
41310  __cil_tmp229 = (unsigned long )info;
41311#line 503
41312  __cil_tmp230 = __cil_tmp229 + __cil_tmp228;
41313#line 503
41314  *((__u32 *)__cil_tmp230) = fb_width;
41315#line 504
41316  __cil_tmp231 = 160 + 12;
41317#line 504
41318  __cil_tmp232 = (unsigned long )info;
41319#line 504
41320  __cil_tmp233 = __cil_tmp232 + __cil_tmp231;
41321#line 504
41322  *((__u32 *)__cil_tmp233) = fb_height;
41323#line 505
41324  __cil_tmp234 = 160 + 24;
41325#line 505
41326  __cil_tmp235 = (unsigned long )info;
41327#line 505
41328  __cil_tmp236 = __cil_tmp235 + __cil_tmp234;
41329#line 505
41330  __cil_tmp237 = (unsigned long )par;
41331#line 505
41332  __cil_tmp238 = __cil_tmp237 + 128;
41333#line 505
41334  *((__u32 *)__cil_tmp236) = *((unsigned int *)__cil_tmp238);
41335#line 506
41336  __cil_tmp239 = 160 + 16;
41337#line 506
41338  __cil_tmp240 = (unsigned long )info;
41339#line 506
41340  __cil_tmp241 = __cil_tmp240 + __cil_tmp239;
41341#line 506
41342  *((__u32 *)__cil_tmp241) = (__u32 )0;
41343#line 507
41344  __cil_tmp242 = 160 + 20;
41345#line 507
41346  __cil_tmp243 = (unsigned long )info;
41347#line 507
41348  __cil_tmp244 = __cil_tmp243 + __cil_tmp242;
41349#line 507
41350  *((__u32 *)__cil_tmp244) = (__u32 )0;
41351#line 508
41352  __cil_tmp245 = 160 + 84;
41353#line 508
41354  __cil_tmp246 = (unsigned long )info;
41355#line 508
41356  __cil_tmp247 = __cil_tmp246 + __cil_tmp245;
41357#line 508
41358  *((__u32 *)__cil_tmp247) = (__u32 )0;
41359#line 509
41360  __cil_tmp248 = 160 + 88;
41361#line 509
41362  __cil_tmp249 = (unsigned long )info;
41363#line 509
41364  __cil_tmp250 = __cil_tmp249 + __cil_tmp248;
41365#line 509
41366  *((__u32 *)__cil_tmp250) = (__u32 )-1;
41367#line 510
41368  __cil_tmp251 = 160 + 92;
41369#line 510
41370  __cil_tmp252 = (unsigned long )info;
41371#line 510
41372  __cil_tmp253 = __cil_tmp252 + __cil_tmp251;
41373#line 510
41374  *((__u32 *)__cil_tmp253) = (__u32 )-1;
41375#line 512
41376  __cil_tmp254 = (unsigned long )info;
41377#line 512
41378  __cil_tmp255 = __cil_tmp254 + 160;
41379#line 512
41380  *((__u32 *)__cil_tmp255) = initial_width;
41381#line 513
41382  __cil_tmp256 = 160 + 4;
41383#line 513
41384  __cil_tmp257 = (unsigned long )info;
41385#line 513
41386  __cil_tmp258 = __cil_tmp257 + __cil_tmp256;
41387#line 513
41388  *((__u32 *)__cil_tmp258) = initial_height;
41389#line 517
41390  __cil_tmp259 = (unsigned long )info;
41391#line 517
41392  __cil_tmp260 = __cil_tmp259 + 1168;
41393#line 517
41394  *((struct apertures_struct **)__cil_tmp260) = alloc_apertures(1U);
41395  }
41396  {
41397#line 518
41398  __cil_tmp261 = (unsigned long )info;
41399#line 518
41400  __cil_tmp262 = __cil_tmp261 + 1168;
41401#line 518
41402  __cil_tmp263 = *((struct apertures_struct **)__cil_tmp262);
41403#line 518
41404  if (! __cil_tmp263) {
41405#line 519
41406    ret = -12;
41407#line 520
41408    goto err_aper;
41409  } else {
41410
41411  }
41412  }
41413#line 522
41414  __cil_tmp264 = 0 * 16UL;
41415#line 522
41416  __cil_tmp265 = 8 + __cil_tmp264;
41417#line 522
41418  __cil_tmp266 = (unsigned long )info;
41419#line 522
41420  __cil_tmp267 = __cil_tmp266 + 1168;
41421#line 522
41422  __cil_tmp268 = *((struct apertures_struct **)__cil_tmp267);
41423#line 522
41424  __cil_tmp269 = (unsigned long )__cil_tmp268;
41425#line 522
41426  __cil_tmp270 = __cil_tmp269 + __cil_tmp265;
41427#line 522
41428  __cil_tmp271 = (unsigned long )vmw_priv___0;
41429#line 522
41430  __cil_tmp272 = __cil_tmp271 + 2108;
41431#line 522
41432  __cil_tmp273 = *((uint32_t *)__cil_tmp272);
41433#line 522
41434  *((resource_size_t *)__cil_tmp270) = (resource_size_t )__cil_tmp273;
41435#line 523
41436  __cil_tmp274 = 0 * 16UL;
41437#line 523
41438  __cil_tmp275 = __cil_tmp274 + 8;
41439#line 523
41440  __cil_tmp276 = 8 + __cil_tmp275;
41441#line 523
41442  __cil_tmp277 = (unsigned long )info;
41443#line 523
41444  __cil_tmp278 = __cil_tmp277 + 1168;
41445#line 523
41446  __cil_tmp279 = *((struct apertures_struct **)__cil_tmp278);
41447#line 523
41448  __cil_tmp280 = (unsigned long )__cil_tmp279;
41449#line 523
41450  __cil_tmp281 = __cil_tmp280 + __cil_tmp276;
41451#line 523
41452  __cil_tmp282 = (unsigned long )vmw_priv___0;
41453#line 523
41454  __cil_tmp283 = __cil_tmp282 + 2112;
41455#line 523
41456  __cil_tmp284 = *((uint32_t *)__cil_tmp283);
41457#line 523
41458  *((resource_size_t *)__cil_tmp281) = (resource_size_t )__cil_tmp284;
41459#line 528
41460  tmp___14 = 0U;
41461#line 528
41462  __cil_tmp285 = 160 + 36;
41463#line 528
41464  __cil_tmp286 = (unsigned long )par;
41465#line 528
41466  __cil_tmp287 = __cil_tmp286 + __cil_tmp285;
41467#line 528
41468  *((unsigned int *)__cil_tmp287) = tmp___14;
41469#line 528
41470  __cil_tmp288 = 160 + 28;
41471#line 528
41472  __cil_tmp289 = (unsigned long )par;
41473#line 528
41474  __cil_tmp290 = __cil_tmp289 + __cil_tmp288;
41475#line 528
41476  *((unsigned int *)__cil_tmp290) = tmp___14;
41477#line 529
41478  tmp___15 = 0U;
41479#line 529
41480  __cil_tmp291 = 160 + 40;
41481#line 529
41482  __cil_tmp292 = (unsigned long )par;
41483#line 529
41484  __cil_tmp293 = __cil_tmp292 + __cil_tmp291;
41485#line 529
41486  *((unsigned int *)__cil_tmp293) = tmp___15;
41487#line 529
41488  __cil_tmp294 = 160 + 32;
41489#line 529
41490  __cil_tmp295 = (unsigned long )par;
41491#line 529
41492  __cil_tmp296 = __cil_tmp295 + __cil_tmp294;
41493#line 529
41494  *((unsigned int *)__cil_tmp296) = tmp___15;
41495#line 530
41496  __cil_tmp297 = 160 + 24;
41497#line 530
41498  __cil_tmp298 = (unsigned long )par;
41499#line 530
41500  __cil_tmp299 = __cil_tmp298 + __cil_tmp297;
41501#line 530
41502  *((bool *)__cil_tmp299) = (bool )1;
41503  {
41504#line 531
41505  while (1) {
41506    while_continue: /* CIL Label */ ;
41507    {
41508#line 531
41509    __cil_tmp300 = (unsigned long )par;
41510#line 531
41511    __cil_tmp301 = __cil_tmp300 + 160;
41512#line 531
41513    __cil_tmp302 = (spinlock_t *)__cil_tmp301;
41514#line 531
41515    spinlock_check(__cil_tmp302);
41516    }
41517    {
41518#line 531
41519    while (1) {
41520      while_continue___0: /* CIL Label */ ;
41521      {
41522#line 531
41523      __cil_tmp303 = (unsigned long )par;
41524#line 531
41525      __cil_tmp304 = __cil_tmp303 + 160;
41526#line 531
41527      __cil_tmp305 = (struct raw_spinlock *)__cil_tmp304;
41528#line 531
41529      __raw_spin_lock_init(__cil_tmp305, "&(&par->dirty.lock)->rlock", & __key___12);
41530      }
41531#line 531
41532      goto while_break___0;
41533    }
41534    while_break___0: /* CIL Label */ ;
41535    }
41536#line 531
41537    goto while_break;
41538  }
41539  while_break: /* CIL Label */ ;
41540  }
41541  {
41542#line 532
41543  __cil_tmp306 = (unsigned long )info;
41544#line 532
41545  __cil_tmp307 = __cil_tmp306 + 1072;
41546#line 532
41547  *((struct fb_deferred_io **)__cil_tmp307) = & vmw_defio;
41548#line 533
41549  fb_deferred_io_init(info);
41550#line 535
41551  ret = register_framebuffer(info);
41552#line 536
41553  __cil_tmp308 = ret != 0;
41554#line 536
41555  __cil_tmp309 = ! __cil_tmp308;
41556#line 536
41557  __cil_tmp310 = ! __cil_tmp309;
41558#line 536
41559  __cil_tmp311 = (long )__cil_tmp310;
41560#line 536
41561  tmp___16 = __builtin_expect(__cil_tmp311, 0L);
41562  }
41563#line 536
41564  if (tmp___16) {
41565#line 537
41566    goto err_defio;
41567  } else {
41568
41569  }
41570#line 539
41571  return (0);
41572  err_defio: 
41573  {
41574#line 542
41575  fb_deferred_io_cleanup(info);
41576  }
41577  err_aper: 
41578  {
41579#line 544
41580  __cil_tmp312 = (unsigned long )par;
41581#line 544
41582  __cil_tmp313 = __cil_tmp312 + 24;
41583#line 544
41584  __cil_tmp314 = (struct ttm_bo_kmap_obj *)__cil_tmp313;
41585#line 544
41586  ttm_bo_kunmap(__cil_tmp314);
41587  }
41588  err_unref: 
41589  {
41590#line 546
41591  __cil_tmp315 = (unsigned long )par;
41592#line 546
41593  __cil_tmp316 = __cil_tmp315 + 16;
41594#line 546
41595  __cil_tmp317 = (struct vmw_dma_buffer **)__cil_tmp316;
41596#line 546
41597  __cil_tmp318 = (struct ttm_buffer_object **)__cil_tmp317;
41598#line 546
41599  ttm_bo_unref(__cil_tmp318);
41600  }
41601  err_free: 
41602  {
41603#line 548
41604  __cil_tmp319 = (unsigned long )par;
41605#line 548
41606  __cil_tmp320 = __cil_tmp319 + 8;
41607#line 548
41608  __cil_tmp321 = *((void **)__cil_tmp320);
41609#line 548
41610  __cil_tmp322 = (void    *)__cil_tmp321;
41611#line 548
41612  vfree(__cil_tmp322);
41613#line 549
41614  framebuffer_release(info);
41615#line 550
41616  __cil_tmp323 = (unsigned long )vmw_priv___0;
41617#line 550
41618  __cil_tmp324 = __cil_tmp323 + 2600;
41619#line 550
41620  *((void **)__cil_tmp324) = (void *)0;
41621  }
41622#line 552
41623  return (ret);
41624}
41625}
41626#line 555 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
41627int vmw_fb_close(struct vmw_private *vmw_priv___0 ) 
41628{ struct fb_info *info ;
41629  struct vmw_fb_par *par ;
41630  struct ttm_buffer_object *bo ;
41631  unsigned long __cil_tmp5 ;
41632  unsigned long __cil_tmp6 ;
41633  void *__cil_tmp7 ;
41634  unsigned long __cil_tmp8 ;
41635  unsigned long __cil_tmp9 ;
41636  void *__cil_tmp10 ;
41637  unsigned long __cil_tmp11 ;
41638  unsigned long __cil_tmp12 ;
41639  void *__cil_tmp13 ;
41640  struct ttm_buffer_object **__cil_tmp14 ;
41641  unsigned long __cil_tmp15 ;
41642  unsigned long __cil_tmp16 ;
41643  struct vmw_dma_buffer *__cil_tmp17 ;
41644  unsigned long __cil_tmp18 ;
41645  unsigned long __cil_tmp19 ;
41646  void *__cil_tmp20 ;
41647  unsigned long __cil_tmp21 ;
41648  unsigned long __cil_tmp22 ;
41649  struct ttm_bo_kmap_obj *__cil_tmp23 ;
41650  unsigned long __cil_tmp24 ;
41651  unsigned long __cil_tmp25 ;
41652  void *__cil_tmp26 ;
41653  void    *__cil_tmp27 ;
41654
41655  {
41656  {
41657#line 561
41658  __cil_tmp5 = (unsigned long )vmw_priv___0;
41659#line 561
41660  __cil_tmp6 = __cil_tmp5 + 2600;
41661#line 561
41662  __cil_tmp7 = *((void **)__cil_tmp6);
41663#line 561
41664  if (! __cil_tmp7) {
41665#line 562
41666    return (0);
41667  } else {
41668
41669  }
41670  }
41671  {
41672#line 564
41673  __cil_tmp8 = (unsigned long )vmw_priv___0;
41674#line 564
41675  __cil_tmp9 = __cil_tmp8 + 2600;
41676#line 564
41677  __cil_tmp10 = *((void **)__cil_tmp9);
41678#line 564
41679  info = (struct fb_info *)__cil_tmp10;
41680#line 565
41681  __cil_tmp11 = (unsigned long )info;
41682#line 565
41683  __cil_tmp12 = __cil_tmp11 + 1160;
41684#line 565
41685  __cil_tmp13 = *((void **)__cil_tmp12);
41686#line 565
41687  par = (struct vmw_fb_par *)__cil_tmp13;
41688#line 566
41689  __cil_tmp14 = & bo;
41690#line 566
41691  __cil_tmp15 = (unsigned long )par;
41692#line 566
41693  __cil_tmp16 = __cil_tmp15 + 16;
41694#line 566
41695  __cil_tmp17 = *((struct vmw_dma_buffer **)__cil_tmp16);
41696#line 566
41697  *__cil_tmp14 = (struct ttm_buffer_object *)__cil_tmp17;
41698#line 567
41699  __cil_tmp18 = (unsigned long )par;
41700#line 567
41701  __cil_tmp19 = __cil_tmp18 + 16;
41702#line 567
41703  __cil_tmp20 = (void *)0;
41704#line 567
41705  *((struct vmw_dma_buffer **)__cil_tmp19) = (struct vmw_dma_buffer *)__cil_tmp20;
41706#line 570
41707  fb_deferred_io_cleanup(info);
41708#line 571
41709  unregister_framebuffer(info);
41710#line 573
41711  __cil_tmp21 = (unsigned long )par;
41712#line 573
41713  __cil_tmp22 = __cil_tmp21 + 24;
41714#line 573
41715  __cil_tmp23 = (struct ttm_bo_kmap_obj *)__cil_tmp22;
41716#line 573
41717  ttm_bo_kunmap(__cil_tmp23);
41718#line 574
41719  ttm_bo_unref(& bo);
41720#line 576
41721  __cil_tmp24 = (unsigned long )par;
41722#line 576
41723  __cil_tmp25 = __cil_tmp24 + 8;
41724#line 576
41725  __cil_tmp26 = *((void **)__cil_tmp25);
41726#line 576
41727  __cil_tmp27 = (void    *)__cil_tmp26;
41728#line 576
41729  vfree(__cil_tmp27);
41730#line 577
41731  framebuffer_release(info);
41732  }
41733#line 579
41734  return (0);
41735}
41736}
41737#line 582 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
41738int vmw_fb_off(struct vmw_private *vmw_priv___0 ) 
41739{ struct fb_info *info ;
41740  struct vmw_fb_par *par ;
41741  unsigned long flags ;
41742  raw_spinlock_t *tmp___7 ;
41743  unsigned long __cil_tmp8 ;
41744  unsigned long __cil_tmp9 ;
41745  void *__cil_tmp10 ;
41746  unsigned long __cil_tmp11 ;
41747  unsigned long __cil_tmp12 ;
41748  void *__cil_tmp13 ;
41749  unsigned long __cil_tmp14 ;
41750  unsigned long __cil_tmp15 ;
41751  void *__cil_tmp16 ;
41752  unsigned long __cil_tmp17 ;
41753  unsigned long __cil_tmp18 ;
41754  spinlock_t *__cil_tmp19 ;
41755  unsigned long __cil_tmp20 ;
41756  unsigned long __cil_tmp21 ;
41757  unsigned long __cil_tmp22 ;
41758  unsigned long __cil_tmp23 ;
41759  unsigned long __cil_tmp24 ;
41760  spinlock_t *__cil_tmp25 ;
41761  unsigned long __cil_tmp26 ;
41762  unsigned long __cil_tmp27 ;
41763  struct delayed_work *__cil_tmp28 ;
41764  unsigned long __cil_tmp29 ;
41765  unsigned long __cil_tmp30 ;
41766  unsigned long __cil_tmp31 ;
41767  unsigned long __cil_tmp32 ;
41768  struct ttm_bo_kmap_obj *__cil_tmp33 ;
41769  unsigned long __cil_tmp34 ;
41770  unsigned long __cil_tmp35 ;
41771  struct vmw_dma_buffer *__cil_tmp36 ;
41772  bool __cil_tmp37 ;
41773
41774  {
41775  {
41776#line 588
41777  __cil_tmp8 = (unsigned long )vmw_priv___0;
41778#line 588
41779  __cil_tmp9 = __cil_tmp8 + 2600;
41780#line 588
41781  __cil_tmp10 = *((void **)__cil_tmp9);
41782#line 588
41783  if (! __cil_tmp10) {
41784#line 589
41785    return (-22);
41786  } else {
41787
41788  }
41789  }
41790#line 591
41791  __cil_tmp11 = (unsigned long )vmw_priv___0;
41792#line 591
41793  __cil_tmp12 = __cil_tmp11 + 2600;
41794#line 591
41795  __cil_tmp13 = *((void **)__cil_tmp12);
41796#line 591
41797  info = (struct fb_info *)__cil_tmp13;
41798#line 592
41799  __cil_tmp14 = (unsigned long )info;
41800#line 592
41801  __cil_tmp15 = __cil_tmp14 + 1160;
41802#line 592
41803  __cil_tmp16 = *((void **)__cil_tmp15);
41804#line 592
41805  par = (struct vmw_fb_par *)__cil_tmp16;
41806  {
41807#line 594
41808  while (1) {
41809    while_continue: /* CIL Label */ ;
41810    {
41811#line 594
41812    while (1) {
41813      while_continue___0: /* CIL Label */ ;
41814      {
41815#line 594
41816      __cil_tmp17 = (unsigned long )par;
41817#line 594
41818      __cil_tmp18 = __cil_tmp17 + 160;
41819#line 594
41820      __cil_tmp19 = (spinlock_t *)__cil_tmp18;
41821#line 594
41822      tmp___7 = spinlock_check(__cil_tmp19);
41823#line 594
41824      flags = _raw_spin_lock_irqsave(tmp___7);
41825      }
41826#line 594
41827      goto while_break___0;
41828    }
41829    while_break___0: /* CIL Label */ ;
41830    }
41831#line 594
41832    goto while_break;
41833  }
41834  while_break: /* CIL Label */ ;
41835  }
41836  {
41837#line 595
41838  __cil_tmp20 = 160 + 24;
41839#line 595
41840  __cil_tmp21 = (unsigned long )par;
41841#line 595
41842  __cil_tmp22 = __cil_tmp21 + __cil_tmp20;
41843#line 595
41844  *((bool *)__cil_tmp22) = (bool )0;
41845#line 596
41846  __cil_tmp23 = (unsigned long )par;
41847#line 596
41848  __cil_tmp24 = __cil_tmp23 + 160;
41849#line 596
41850  __cil_tmp25 = (spinlock_t *)__cil_tmp24;
41851#line 596
41852  spin_unlock_irqrestore(__cil_tmp25, flags);
41853#line 598
41854  __cil_tmp26 = (unsigned long )info;
41855#line 598
41856  __cil_tmp27 = __cil_tmp26 + 960;
41857#line 598
41858  __cil_tmp28 = (struct delayed_work *)__cil_tmp27;
41859#line 598
41860  flush_delayed_work_sync(__cil_tmp28);
41861#line 600
41862  __cil_tmp29 = (unsigned long )par;
41863#line 600
41864  __cil_tmp30 = __cil_tmp29 + 144;
41865#line 600
41866  *((void **)__cil_tmp30) = (void *)0;
41867#line 601
41868  __cil_tmp31 = (unsigned long )par;
41869#line 601
41870  __cil_tmp32 = __cil_tmp31 + 24;
41871#line 601
41872  __cil_tmp33 = (struct ttm_bo_kmap_obj *)__cil_tmp32;
41873#line 601
41874  ttm_bo_kunmap(__cil_tmp33);
41875#line 603
41876  __cil_tmp34 = (unsigned long )par;
41877#line 603
41878  __cil_tmp35 = __cil_tmp34 + 16;
41879#line 603
41880  __cil_tmp36 = *((struct vmw_dma_buffer **)__cil_tmp35);
41881#line 603
41882  __cil_tmp37 = (bool )0;
41883#line 603
41884  vmw_dmabuf_unpin(vmw_priv___0, __cil_tmp36, __cil_tmp37);
41885  }
41886#line 605
41887  return (0);
41888}
41889}
41890#line 608 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
41891int vmw_fb_on(struct vmw_private *vmw_priv___0 ) 
41892{ struct fb_info *info ;
41893  struct vmw_fb_par *par ;
41894  unsigned long flags ;
41895  bool dummy ;
41896  int ret ;
41897  long tmp___7 ;
41898  long tmp___8 ;
41899  raw_spinlock_t *tmp___9 ;
41900  unsigned long __cil_tmp12 ;
41901  unsigned long __cil_tmp13 ;
41902  void *__cil_tmp14 ;
41903  unsigned long __cil_tmp15 ;
41904  unsigned long __cil_tmp16 ;
41905  void *__cil_tmp17 ;
41906  unsigned long __cil_tmp18 ;
41907  unsigned long __cil_tmp19 ;
41908  void *__cil_tmp20 ;
41909  void *__cil_tmp21 ;
41910  unsigned long __cil_tmp22 ;
41911  unsigned long __cil_tmp23 ;
41912  unsigned long __cil_tmp24 ;
41913  void *__cil_tmp25 ;
41914  unsigned long __cil_tmp26 ;
41915  unsigned long __cil_tmp27 ;
41916  unsigned long __cil_tmp28 ;
41917  struct vmw_dma_buffer *__cil_tmp29 ;
41918  bool __cil_tmp30 ;
41919  bool __cil_tmp31 ;
41920  int __cil_tmp32 ;
41921  int __cil_tmp33 ;
41922  int __cil_tmp34 ;
41923  long __cil_tmp35 ;
41924  unsigned long __cil_tmp36 ;
41925  unsigned long __cil_tmp37 ;
41926  struct vmw_dma_buffer *__cil_tmp38 ;
41927  struct ttm_buffer_object *__cil_tmp39 ;
41928  unsigned long __cil_tmp40 ;
41929  unsigned long __cil_tmp41 ;
41930  unsigned long __cil_tmp42 ;
41931  struct vmw_dma_buffer *__cil_tmp43 ;
41932  unsigned long __cil_tmp44 ;
41933  unsigned long __cil_tmp45 ;
41934  unsigned long __cil_tmp46 ;
41935  unsigned long __cil_tmp47 ;
41936  unsigned long __cil_tmp48 ;
41937  struct ttm_bo_kmap_obj *__cil_tmp49 ;
41938  int __cil_tmp50 ;
41939  int __cil_tmp51 ;
41940  int __cil_tmp52 ;
41941  long __cil_tmp53 ;
41942  unsigned long __cil_tmp54 ;
41943  unsigned long __cil_tmp55 ;
41944  unsigned long __cil_tmp56 ;
41945  unsigned long __cil_tmp57 ;
41946  struct ttm_bo_kmap_obj *__cil_tmp58 ;
41947  unsigned long __cil_tmp59 ;
41948  unsigned long __cil_tmp60 ;
41949  spinlock_t *__cil_tmp61 ;
41950  unsigned long __cil_tmp62 ;
41951  unsigned long __cil_tmp63 ;
41952  unsigned long __cil_tmp64 ;
41953  unsigned long __cil_tmp65 ;
41954  unsigned long __cil_tmp66 ;
41955  spinlock_t *__cil_tmp67 ;
41956  unsigned long __cil_tmp68 ;
41957  unsigned long __cil_tmp69 ;
41958  __u32 __cil_tmp70 ;
41959  unsigned long __cil_tmp71 ;
41960  unsigned long __cil_tmp72 ;
41961  unsigned long __cil_tmp73 ;
41962  __u32 __cil_tmp74 ;
41963  unsigned long __cil_tmp75 ;
41964  unsigned long __cil_tmp76 ;
41965  struct delayed_work *__cil_tmp77 ;
41966
41967  {
41968  {
41969#line 616
41970  __cil_tmp12 = (unsigned long )vmw_priv___0;
41971#line 616
41972  __cil_tmp13 = __cil_tmp12 + 2600;
41973#line 616
41974  __cil_tmp14 = *((void **)__cil_tmp13);
41975#line 616
41976  if (! __cil_tmp14) {
41977#line 617
41978    return (-22);
41979  } else {
41980
41981  }
41982  }
41983#line 619
41984  __cil_tmp15 = (unsigned long )vmw_priv___0;
41985#line 619
41986  __cil_tmp16 = __cil_tmp15 + 2600;
41987#line 619
41988  __cil_tmp17 = *((void **)__cil_tmp16);
41989#line 619
41990  info = (struct fb_info *)__cil_tmp17;
41991#line 620
41992  __cil_tmp18 = (unsigned long )info;
41993#line 620
41994  __cil_tmp19 = __cil_tmp18 + 1160;
41995#line 620
41996  __cil_tmp20 = *((void **)__cil_tmp19);
41997#line 620
41998  par = (struct vmw_fb_par *)__cil_tmp20;
41999  {
42000#line 623
42001  __cil_tmp21 = (void *)0;
42002#line 623
42003  __cil_tmp22 = (unsigned long )__cil_tmp21;
42004#line 623
42005  __cil_tmp23 = (unsigned long )par;
42006#line 623
42007  __cil_tmp24 = __cil_tmp23 + 144;
42008#line 623
42009  __cil_tmp25 = *((void **)__cil_tmp24);
42010#line 623
42011  __cil_tmp26 = (unsigned long )__cil_tmp25;
42012#line 623
42013  if (__cil_tmp26 != __cil_tmp22) {
42014#line 624
42015    return (0);
42016  } else {
42017
42018  }
42019  }
42020  {
42021#line 627
42022  vmw_overlay_stop_all(vmw_priv___0);
42023#line 629
42024  __cil_tmp27 = (unsigned long )par;
42025#line 629
42026  __cil_tmp28 = __cil_tmp27 + 16;
42027#line 629
42028  __cil_tmp29 = *((struct vmw_dma_buffer **)__cil_tmp28);
42029#line 629
42030  __cil_tmp30 = (bool )1;
42031#line 629
42032  __cil_tmp31 = (bool )0;
42033#line 629
42034  ret = vmw_dmabuf_to_start_of_vram(vmw_priv___0, __cil_tmp29, __cil_tmp30, __cil_tmp31);
42035#line 630
42036  __cil_tmp32 = ret != 0;
42037#line 630
42038  __cil_tmp33 = ! __cil_tmp32;
42039#line 630
42040  __cil_tmp34 = ! __cil_tmp33;
42041#line 630
42042  __cil_tmp35 = (long )__cil_tmp34;
42043#line 630
42044  tmp___7 = __builtin_expect(__cil_tmp35, 0L);
42045  }
42046#line 630
42047  if (tmp___7) {
42048    {
42049#line 631
42050    drm_err("vmw_fb_on", "could not move buffer to start of VRAM\n");
42051    }
42052#line 632
42053    goto err_no_buffer;
42054  } else {
42055
42056  }
42057  {
42058#line 635
42059  __cil_tmp36 = (unsigned long )par;
42060#line 635
42061  __cil_tmp37 = __cil_tmp36 + 16;
42062#line 635
42063  __cil_tmp38 = *((struct vmw_dma_buffer **)__cil_tmp37);
42064#line 635
42065  __cil_tmp39 = (struct ttm_buffer_object *)__cil_tmp38;
42066#line 635
42067  __cil_tmp40 = 0 + 40;
42068#line 635
42069  __cil_tmp41 = (unsigned long )par;
42070#line 635
42071  __cil_tmp42 = __cil_tmp41 + 16;
42072#line 635
42073  __cil_tmp43 = *((struct vmw_dma_buffer **)__cil_tmp42);
42074#line 635
42075  __cil_tmp44 = (unsigned long )__cil_tmp43;
42076#line 635
42077  __cil_tmp45 = __cil_tmp44 + __cil_tmp40;
42078#line 635
42079  __cil_tmp46 = *((unsigned long *)__cil_tmp45);
42080#line 635
42081  __cil_tmp47 = (unsigned long )par;
42082#line 635
42083  __cil_tmp48 = __cil_tmp47 + 24;
42084#line 635
42085  __cil_tmp49 = (struct ttm_bo_kmap_obj *)__cil_tmp48;
42086#line 635
42087  ret = ttm_bo_kmap(__cil_tmp39, 0UL, __cil_tmp46, __cil_tmp49);
42088  }
42089  {
42090#line 639
42091  while (1) {
42092    while_continue: /* CIL Label */ ;
42093    {
42094#line 639
42095    __cil_tmp50 = ret != 0;
42096#line 639
42097    __cil_tmp51 = ! __cil_tmp50;
42098#line 639
42099    __cil_tmp52 = ! __cil_tmp51;
42100#line 639
42101    __cil_tmp53 = (long )__cil_tmp52;
42102#line 639
42103    tmp___8 = __builtin_expect(__cil_tmp53, 0L);
42104    }
42105#line 639
42106    if (tmp___8) {
42107      {
42108#line 639
42109      while (1) {
42110        while_continue___0: /* CIL Label */ ;
42111#line 639
42112        __asm__  volatile   ("1:\tud2\n"
42113                             ".pushsection __bug_table,\"a\"\n"
42114                             "2:\t.long 1b - 2b, %c0 - 2b\n"
42115                             "\t.word %c1, 0\n"
42116                             "\t.org 2b+%c2\n"
42117                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"),
42118                             "i" (639), "i" (12UL));
42119        {
42120#line 639
42121        while (1) {
42122          while_continue___1: /* CIL Label */ ;
42123        }
42124        while_break___1: /* CIL Label */ ;
42125        }
42126#line 639
42127        goto while_break___0;
42128      }
42129      while_break___0: /* CIL Label */ ;
42130      }
42131    } else {
42132
42133    }
42134#line 639
42135    goto while_break;
42136  }
42137  while_break: /* CIL Label */ ;
42138  }
42139  {
42140#line 640
42141  __cil_tmp54 = (unsigned long )par;
42142#line 640
42143  __cil_tmp55 = __cil_tmp54 + 144;
42144#line 640
42145  __cil_tmp56 = (unsigned long )par;
42146#line 640
42147  __cil_tmp57 = __cil_tmp56 + 24;
42148#line 640
42149  __cil_tmp58 = (struct ttm_bo_kmap_obj *)__cil_tmp57;
42150#line 640
42151  *((void **)__cil_tmp55) = ttm_kmap_obj_virtual(__cil_tmp58, & dummy);
42152  }
42153  {
42154#line 642
42155  while (1) {
42156    while_continue___2: /* CIL Label */ ;
42157    {
42158#line 642
42159    while (1) {
42160      while_continue___3: /* CIL Label */ ;
42161      {
42162#line 642
42163      __cil_tmp59 = (unsigned long )par;
42164#line 642
42165      __cil_tmp60 = __cil_tmp59 + 160;
42166#line 642
42167      __cil_tmp61 = (spinlock_t *)__cil_tmp60;
42168#line 642
42169      tmp___9 = spinlock_check(__cil_tmp61);
42170#line 642
42171      flags = _raw_spin_lock_irqsave(tmp___9);
42172      }
42173#line 642
42174      goto while_break___3;
42175    }
42176    while_break___3: /* CIL Label */ ;
42177    }
42178#line 642
42179    goto while_break___2;
42180  }
42181  while_break___2: /* CIL Label */ ;
42182  }
42183  {
42184#line 643
42185  __cil_tmp62 = 160 + 24;
42186#line 643
42187  __cil_tmp63 = (unsigned long )par;
42188#line 643
42189  __cil_tmp64 = __cil_tmp63 + __cil_tmp62;
42190#line 643
42191  *((bool *)__cil_tmp64) = (bool )1;
42192#line 644
42193  __cil_tmp65 = (unsigned long )par;
42194#line 644
42195  __cil_tmp66 = __cil_tmp65 + 160;
42196#line 644
42197  __cil_tmp67 = (spinlock_t *)__cil_tmp66;
42198#line 644
42199  spin_unlock_irqrestore(__cil_tmp67, flags);
42200  }
42201  err_no_buffer: 
42202  {
42203#line 647
42204  vmw_fb_set_par(info);
42205#line 649
42206  __cil_tmp68 = (unsigned long )info;
42207#line 649
42208  __cil_tmp69 = __cil_tmp68 + 160;
42209#line 649
42210  __cil_tmp70 = *((__u32 *)__cil_tmp69);
42211#line 649
42212  __cil_tmp71 = 160 + 4;
42213#line 649
42214  __cil_tmp72 = (unsigned long )info;
42215#line 649
42216  __cil_tmp73 = __cil_tmp72 + __cil_tmp71;
42217#line 649
42218  __cil_tmp74 = *((__u32 *)__cil_tmp73);
42219#line 649
42220  vmw_fb_dirty_mark(par, 0U, 0U, __cil_tmp70, __cil_tmp74);
42221#line 653
42222  __cil_tmp75 = (unsigned long )info;
42223#line 653
42224  __cil_tmp76 = __cil_tmp75 + 960;
42225#line 653
42226  __cil_tmp77 = (struct delayed_work *)__cil_tmp76;
42227#line 653
42228  schedule_delayed_work(__cil_tmp77, 0UL);
42229  }
42230#line 655
42231  return (0);
42232}
42233}
42234#line 689 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c"
42235void ldv_main4_sequence_infinite_withcheck_stateful(void) 
42236{ struct fb_info *var_group1 ;
42237  struct list_head *var_group2 ;
42238  struct fb_var_screeninfo *var_group3 ;
42239  unsigned int var_vmw_fb_setcolreg_0_p0 ;
42240  unsigned int var_vmw_fb_setcolreg_0_p1 ;
42241  unsigned int var_vmw_fb_setcolreg_0_p2 ;
42242  unsigned int var_vmw_fb_setcolreg_0_p3 ;
42243  unsigned int var_vmw_fb_setcolreg_0_p4 ;
42244  struct fb_info *var_vmw_fb_setcolreg_0_p5 ;
42245  struct fb_fillrect    *var_vmw_fb_fillrect_8_p1 ;
42246  struct fb_copyarea    *var_vmw_fb_copyarea_9_p1 ;
42247  struct fb_image    *var_vmw_fb_imageblit_10_p1 ;
42248  int var_vmw_fb_blank_4_p0 ;
42249  int tmp___7 ;
42250  int tmp___8 ;
42251
42252  {
42253  {
42254#line 795
42255  LDV_IN_INTERRUPT = 1;
42256#line 804
42257  ldv_initialize();
42258  }
42259  {
42260#line 810
42261  while (1) {
42262    while_continue: /* CIL Label */ ;
42263    {
42264#line 810
42265    tmp___8 = __VERIFIER_nondet_int();
42266    }
42267#line 810
42268    if (tmp___8) {
42269
42270    } else {
42271#line 810
42272      goto while_break;
42273    }
42274    {
42275#line 813
42276    tmp___7 = __VERIFIER_nondet_int();
42277    }
42278#line 815
42279    if (tmp___7 == 0) {
42280#line 815
42281      goto case_0;
42282    } else
42283#line 835
42284    if (tmp___7 == 1) {
42285#line 835
42286      goto case_1;
42287    } else
42288#line 857
42289    if (tmp___7 == 2) {
42290#line 857
42291      goto case_2;
42292    } else
42293#line 879
42294    if (tmp___7 == 3) {
42295#line 879
42296      goto case_3;
42297    } else
42298#line 901
42299    if (tmp___7 == 4) {
42300#line 901
42301      goto case_4;
42302    } else
42303#line 921
42304    if (tmp___7 == 5) {
42305#line 921
42306      goto case_5;
42307    } else
42308#line 941
42309    if (tmp___7 == 6) {
42310#line 941
42311      goto case_6;
42312    } else
42313#line 961
42314    if (tmp___7 == 7) {
42315#line 961
42316      goto case_7;
42317    } else
42318#line 983
42319    if (tmp___7 == 8) {
42320#line 983
42321      goto case_8;
42322    } else {
42323      {
42324#line 1005
42325      goto switch_default;
42326#line 813
42327      if (0) {
42328        case_0: /* CIL Label */ 
42329        {
42330#line 827
42331        vmw_deferred_io(var_group1, var_group2);
42332        }
42333#line 834
42334        goto switch_break;
42335        case_1: /* CIL Label */ 
42336        {
42337#line 845
42338        vmw_fb_check_var(var_group3, var_group1);
42339        }
42340#line 856
42341        goto switch_break;
42342        case_2: /* CIL Label */ 
42343        {
42344#line 867
42345        vmw_fb_set_par(var_group1);
42346        }
42347#line 878
42348        goto switch_break;
42349        case_3: /* CIL Label */ 
42350        {
42351#line 889
42352        vmw_fb_setcolreg(var_vmw_fb_setcolreg_0_p0, var_vmw_fb_setcolreg_0_p1, var_vmw_fb_setcolreg_0_p2,
42353                         var_vmw_fb_setcolreg_0_p3, var_vmw_fb_setcolreg_0_p4, var_vmw_fb_setcolreg_0_p5);
42354        }
42355#line 900
42356        goto switch_break;
42357        case_4: /* CIL Label */ 
42358        {
42359#line 913
42360        vmw_fb_fillrect(var_group1, var_vmw_fb_fillrect_8_p1);
42361        }
42362#line 920
42363        goto switch_break;
42364        case_5: /* CIL Label */ 
42365        {
42366#line 933
42367        vmw_fb_copyarea(var_group1, var_vmw_fb_copyarea_9_p1);
42368        }
42369#line 940
42370        goto switch_break;
42371        case_6: /* CIL Label */ 
42372        {
42373#line 953
42374        vmw_fb_imageblit(var_group1, var_vmw_fb_imageblit_10_p1);
42375        }
42376#line 960
42377        goto switch_break;
42378        case_7: /* CIL Label */ 
42379        {
42380#line 971
42381        vmw_fb_pan_display(var_group3, var_group1);
42382        }
42383#line 982
42384        goto switch_break;
42385        case_8: /* CIL Label */ 
42386        {
42387#line 993
42388        vmw_fb_blank(var_vmw_fb_blank_4_p0, var_group1);
42389        }
42390#line 1004
42391        goto switch_break;
42392        switch_default: /* CIL Label */ 
42393#line 1005
42394        goto switch_break;
42395      } else {
42396        switch_break: /* CIL Label */ ;
42397      }
42398      }
42399    }
42400  }
42401  while_break: /* CIL Label */ ;
42402  }
42403  {
42404#line 1014
42405  ldv_check_final_state();
42406  }
42407#line 1017
42408  return;
42409}
42410}
42411#line 208 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
42412__inline static void memcpy_fromio(void *dst , void  volatile   *src , size_t count )  __attribute__((__no_instrument_function__)) ;
42413#line 208 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
42414__inline static void memcpy_fromio(void *dst , void  volatile   *src , size_t count ) 
42415{ size_t __len ;
42416  void *__ret ;
42417  void    *__cil_tmp6 ;
42418
42419  {
42420  {
42421#line 211
42422  __len = count;
42423#line 211
42424  __cil_tmp6 = (void    *)src;
42425#line 211
42426  __ret = __builtin_memcpy(dst, __cil_tmp6, __len);
42427  }
42428#line 212
42429  return;
42430}
42431}
42432#line 1305 "include/drm/drmP.h"
42433extern ssize_t drm_read(struct file *filp , char *buffer , size_t count , loff_t *offset ) ;
42434#line 1314
42435extern unsigned int drm_poll(struct file *filp , struct poll_table_struct *wait ) ;
42436#line 497 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
42437void vmw_fifo_ping_host(struct vmw_private *dev_priv , uint32_t reason ) ;
42438#line 661
42439int vmw_overlay_num_overlays(struct vmw_private *dev_priv ) ;
42440#line 662
42441int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv ) ;
42442#line 32 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
42443int vmw_getparam_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
42444{ struct vmw_private *dev_priv ;
42445  struct vmw_private *tmp___7 ;
42446  struct drm_vmw_getparam_arg *param ;
42447  int tmp___8 ;
42448  int tmp___9 ;
42449  bool tmp___11 ;
42450  __le32 *fifo_mem ;
42451  struct vmw_fifo_state    *fifo ;
42452  int tmp___12 ;
42453  unsigned int tmp___13 ;
42454  unsigned long __cil_tmp15 ;
42455  unsigned long __cil_tmp16 ;
42456  uint32_t __cil_tmp17 ;
42457  unsigned long __cil_tmp18 ;
42458  unsigned long __cil_tmp19 ;
42459  uint32_t __cil_tmp20 ;
42460  unsigned long __cil_tmp21 ;
42461  unsigned long __cil_tmp22 ;
42462  unsigned long __cil_tmp23 ;
42463  uint32_t __cil_tmp24 ;
42464  unsigned long __cil_tmp25 ;
42465  unsigned long __cil_tmp26 ;
42466  uint32_t __cil_tmp27 ;
42467  unsigned long __cil_tmp28 ;
42468  unsigned long __cil_tmp29 ;
42469  unsigned long __cil_tmp30 ;
42470  unsigned long __cil_tmp31 ;
42471  struct vmw_fifo_state *__cil_tmp32 ;
42472  int __cil_tmp33 ;
42473  unsigned int    __cil_tmp34 ;
42474  unsigned long __cil_tmp35 ;
42475  unsigned long __cil_tmp36 ;
42476  uint32_t    __cil_tmp37 ;
42477  __le32 *__cil_tmp38 ;
42478  void *__cil_tmp39 ;
42479  unsigned long __cil_tmp40 ;
42480  unsigned long __cil_tmp41 ;
42481  uint32_t __cil_tmp42 ;
42482
42483  {
42484  {
42485#line 35
42486  tmp___7 = vmw_priv(dev);
42487#line 35
42488  dev_priv = tmp___7;
42489#line 36
42490  param = (struct drm_vmw_getparam_arg *)data;
42491  }
42492  {
42493#line 39
42494  __cil_tmp15 = (unsigned long )param;
42495#line 39
42496  __cil_tmp16 = __cil_tmp15 + 8;
42497#line 39
42498  __cil_tmp17 = *((uint32_t *)__cil_tmp16);
42499#line 40
42500  if ((int )__cil_tmp17 == 0) {
42501#line 40
42502    goto case_0;
42503  } else
42504#line 43
42505  if ((int )__cil_tmp17 == 1) {
42506#line 43
42507    goto case_1;
42508  } else
42509#line 46
42510  if ((int )__cil_tmp17 == 2) {
42511#line 46
42512    goto case_2;
42513  } else
42514#line 49
42515  if ((int )__cil_tmp17 == 3) {
42516#line 49
42517    goto case_3;
42518  } else
42519#line 52
42520  if ((int )__cil_tmp17 == 4) {
42521#line 52
42522    goto case_4;
42523  } else
42524#line 55
42525  if ((int )__cil_tmp17 == 5) {
42526#line 55
42527    goto case_5;
42528  } else
42529#line 58
42530  if ((int )__cil_tmp17 == 6) {
42531#line 58
42532    goto case_6;
42533  } else {
42534    {
42535#line 71
42536    goto switch_default;
42537#line 39
42538    if (0) {
42539      case_0: /* CIL Label */ 
42540      {
42541#line 41
42542      tmp___8 = vmw_overlay_num_overlays(dev_priv);
42543#line 41
42544      *((uint64_t *)param) = (uint64_t )tmp___8;
42545      }
42546#line 42
42547      goto switch_break;
42548      case_1: /* CIL Label */ 
42549      {
42550#line 44
42551      tmp___9 = vmw_overlay_num_free_overlays(dev_priv);
42552#line 44
42553      *((uint64_t *)param) = (uint64_t )tmp___9;
42554      }
42555#line 45
42556      goto switch_break;
42557      case_2: /* CIL Label */ 
42558      {
42559#line 47
42560      tmp___11 = vmw_fifo_have_3d(dev_priv);
42561      }
42562#line 47
42563      if (tmp___11) {
42564#line 47
42565        *((uint64_t *)param) = (uint64_t )1;
42566      } else {
42567#line 47
42568        *((uint64_t *)param) = (uint64_t )0;
42569      }
42570#line 48
42571      goto switch_break;
42572      case_3: /* CIL Label */ 
42573#line 50
42574      __cil_tmp18 = (unsigned long )dev_priv;
42575#line 50
42576      __cil_tmp19 = __cil_tmp18 + 2156;
42577#line 50
42578      __cil_tmp20 = *((uint32_t *)__cil_tmp19);
42579#line 50
42580      *((uint64_t *)param) = (uint64_t )__cil_tmp20;
42581#line 51
42582      goto switch_break;
42583      case_4: /* CIL Label */ 
42584#line 53
42585      __cil_tmp21 = 1856 + 36;
42586#line 53
42587      __cil_tmp22 = (unsigned long )dev_priv;
42588#line 53
42589      __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
42590#line 53
42591      __cil_tmp24 = *((uint32_t *)__cil_tmp23);
42592#line 53
42593      *((uint64_t *)param) = (uint64_t )__cil_tmp24;
42594#line 54
42595      goto switch_break;
42596      case_5: /* CIL Label */ 
42597#line 56
42598      __cil_tmp25 = (unsigned long )dev_priv;
42599#line 56
42600      __cil_tmp26 = __cil_tmp25 + 2112;
42601#line 56
42602      __cil_tmp27 = *((uint32_t *)__cil_tmp26);
42603#line 56
42604      *((uint64_t *)param) = (uint64_t )__cil_tmp27;
42605#line 57
42606      goto switch_break;
42607      case_6: /* CIL Label */ 
42608#line 60
42609      __cil_tmp28 = (unsigned long )dev_priv;
42610#line 60
42611      __cil_tmp29 = __cil_tmp28 + 2144;
42612#line 60
42613      fifo_mem = *((__le32 **)__cil_tmp29);
42614#line 61
42615      __cil_tmp30 = (unsigned long )dev_priv;
42616#line 61
42617      __cil_tmp31 = __cil_tmp30 + 1856;
42618#line 61
42619      __cil_tmp32 = (struct vmw_fifo_state *)__cil_tmp31;
42620#line 61
42621      fifo = (struct vmw_fifo_state    *)__cil_tmp32;
42622      {
42623#line 63
42624      __cil_tmp33 = 1 << 8;
42625#line 63
42626      __cil_tmp34 = (unsigned int    )__cil_tmp33;
42627#line 63
42628      __cil_tmp35 = (unsigned long )fifo;
42629#line 63
42630      __cil_tmp36 = __cil_tmp35 + 36;
42631#line 63
42632      __cil_tmp37 = *((uint32_t    *)__cil_tmp36);
42633#line 63
42634      if (__cil_tmp37 & __cil_tmp34) {
42635#line 63
42636        tmp___12 = 17;
42637      } else {
42638#line 63
42639        tmp___12 = 7;
42640      }
42641      }
42642      {
42643#line 63
42644      __cil_tmp38 = fifo_mem + tmp___12;
42645#line 63
42646      __cil_tmp39 = (void *)__cil_tmp38;
42647#line 63
42648      tmp___13 = ioread32(__cil_tmp39);
42649#line 63
42650      *((uint64_t *)param) = (uint64_t )tmp___13;
42651      }
42652#line 69
42653      goto switch_break;
42654      switch_default: /* CIL Label */ 
42655      {
42656#line 72
42657      __cil_tmp40 = (unsigned long )param;
42658#line 72
42659      __cil_tmp41 = __cil_tmp40 + 8;
42660#line 72
42661      __cil_tmp42 = *((uint32_t *)__cil_tmp41);
42662#line 72
42663      drm_err("vmw_getparam_ioctl", "Illegal vmwgfx get param request: %d\n", __cil_tmp42);
42664      }
42665#line 74
42666      return (-22);
42667    } else {
42668      switch_break: /* CIL Label */ ;
42669    }
42670    }
42671  }
42672  }
42673#line 77
42674  return (0);
42675}
42676}
42677#line 81 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
42678int vmw_get_cap_3d_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
42679{ struct drm_vmw_get_3d_cap_arg *arg ;
42680  struct vmw_private *dev_priv ;
42681  struct vmw_private *tmp___7 ;
42682  uint32_t size ;
42683  __le32 *fifo_mem ;
42684  void *buffer ;
42685  void *bounce ;
42686  int ret ;
42687  long tmp___8 ;
42688  long tmp___9 ;
42689  long tmp___10 ;
42690  uint64_t __cil_tmp15 ;
42691  unsigned long __cil_tmp16 ;
42692  unsigned long __cil_tmp17 ;
42693  unsigned long __cil_tmp18 ;
42694  uint32_t __cil_tmp19 ;
42695  int __cil_tmp20 ;
42696  int __cil_tmp21 ;
42697  int __cil_tmp22 ;
42698  long __cil_tmp23 ;
42699  int __cil_tmp24 ;
42700  unsigned long __cil_tmp25 ;
42701  unsigned long __cil_tmp26 ;
42702  uint32_t __cil_tmp27 ;
42703  unsigned long __cil_tmp28 ;
42704  unsigned long __cil_tmp29 ;
42705  unsigned long __cil_tmp30 ;
42706  void *__cil_tmp31 ;
42707  unsigned long __cil_tmp32 ;
42708  unsigned long __cil_tmp33 ;
42709  int __cil_tmp34 ;
42710  int __cil_tmp35 ;
42711  int __cil_tmp36 ;
42712  long __cil_tmp37 ;
42713  unsigned long __cil_tmp38 ;
42714  unsigned long __cil_tmp39 ;
42715  __le32 *__cil_tmp40 ;
42716  void  volatile   *__cil_tmp41 ;
42717  size_t __cil_tmp42 ;
42718  void    *__cil_tmp43 ;
42719  void    *__cil_tmp44 ;
42720  int __cil_tmp45 ;
42721  int __cil_tmp46 ;
42722  int __cil_tmp47 ;
42723  long __cil_tmp48 ;
42724
42725  {
42726  {
42727#line 84
42728  arg = (struct drm_vmw_get_3d_cap_arg *)data;
42729#line 86
42730  tmp___7 = vmw_priv(dev);
42731#line 86
42732  dev_priv = tmp___7;
42733#line 89
42734  __cil_tmp15 = *((uint64_t *)arg);
42735#line 89
42736  __cil_tmp16 = (unsigned long )__cil_tmp15;
42737#line 89
42738  buffer = (void *)__cil_tmp16;
42739#line 93
42740  __cil_tmp17 = (unsigned long )arg;
42741#line 93
42742  __cil_tmp18 = __cil_tmp17 + 12;
42743#line 93
42744  __cil_tmp19 = *((uint32_t *)__cil_tmp18);
42745#line 93
42746  __cil_tmp20 = __cil_tmp19 != 0U;
42747#line 93
42748  __cil_tmp21 = ! __cil_tmp20;
42749#line 93
42750  __cil_tmp22 = ! __cil_tmp21;
42751#line 93
42752  __cil_tmp23 = (long )__cil_tmp22;
42753#line 93
42754  tmp___8 = __builtin_expect(__cil_tmp23, 0L);
42755  }
42756#line 93
42757  if (tmp___8) {
42758    {
42759#line 94
42760    drm_err("vmw_get_cap_3d_ioctl", "Illegal GET_3D_CAP argument.\n");
42761    }
42762#line 95
42763    return (-22);
42764  } else {
42765
42766  }
42767#line 98
42768  __cil_tmp24 = 256 << 2;
42769#line 98
42770  size = (uint32_t )__cil_tmp24;
42771  {
42772#line 100
42773  __cil_tmp25 = (unsigned long )arg;
42774#line 100
42775  __cil_tmp26 = __cil_tmp25 + 8;
42776#line 100
42777  __cil_tmp27 = *((uint32_t *)__cil_tmp26);
42778#line 100
42779  if (__cil_tmp27 < size) {
42780#line 101
42781    __cil_tmp28 = (unsigned long )arg;
42782#line 101
42783    __cil_tmp29 = __cil_tmp28 + 8;
42784#line 101
42785    size = *((uint32_t *)__cil_tmp29);
42786  } else {
42787
42788  }
42789  }
42790  {
42791#line 103
42792  __cil_tmp30 = (unsigned long )size;
42793#line 103
42794  bounce = vmalloc(__cil_tmp30);
42795#line 104
42796  __cil_tmp31 = (void *)0;
42797#line 104
42798  __cil_tmp32 = (unsigned long )__cil_tmp31;
42799#line 104
42800  __cil_tmp33 = (unsigned long )bounce;
42801#line 104
42802  __cil_tmp34 = __cil_tmp33 == __cil_tmp32;
42803#line 104
42804  __cil_tmp35 = ! __cil_tmp34;
42805#line 104
42806  __cil_tmp36 = ! __cil_tmp35;
42807#line 104
42808  __cil_tmp37 = (long )__cil_tmp36;
42809#line 104
42810  tmp___9 = __builtin_expect(__cil_tmp37, 0L);
42811  }
42812#line 104
42813  if (tmp___9) {
42814    {
42815#line 105
42816    drm_err("vmw_get_cap_3d_ioctl", "Failed to allocate bounce buffer for 3D caps.\n");
42817    }
42818#line 106
42819    return (-12);
42820  } else {
42821
42822  }
42823  {
42824#line 109
42825  __cil_tmp38 = (unsigned long )dev_priv;
42826#line 109
42827  __cil_tmp39 = __cil_tmp38 + 2144;
42828#line 109
42829  fifo_mem = *((__le32 **)__cil_tmp39);
42830#line 110
42831  __cil_tmp40 = fifo_mem + 32;
42832#line 110
42833  __cil_tmp41 = (void  volatile   *)__cil_tmp40;
42834#line 110
42835  __cil_tmp42 = (size_t )size;
42836#line 110
42837  memcpy_fromio(bounce, __cil_tmp41, __cil_tmp42);
42838#line 112
42839  __cil_tmp43 = (void    *)bounce;
42840#line 112
42841  ret = (int )copy_to_user(buffer, __cil_tmp43, size);
42842#line 113
42843  __cil_tmp44 = (void    *)bounce;
42844#line 113
42845  vfree(__cil_tmp44);
42846#line 115
42847  __cil_tmp45 = ret != 0;
42848#line 115
42849  __cil_tmp46 = ! __cil_tmp45;
42850#line 115
42851  __cil_tmp47 = ! __cil_tmp46;
42852#line 115
42853  __cil_tmp48 = (long )__cil_tmp47;
42854#line 115
42855  tmp___10 = __builtin_expect(__cil_tmp48, 0L);
42856  }
42857#line 115
42858  if (tmp___10) {
42859    {
42860#line 116
42861    drm_err("vmw_get_cap_3d_ioctl", "Failed to report 3D caps info.\n");
42862    }
42863  } else {
42864
42865  }
42866#line 118
42867  return (ret);
42868}
42869}
42870#line 121 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
42871int vmw_present_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
42872{ struct ttm_object_file *tfile ;
42873  struct vmw_fpriv *tmp___7 ;
42874  struct vmw_private *dev_priv ;
42875  struct vmw_private *tmp___8 ;
42876  struct drm_vmw_present_arg *arg ;
42877  struct vmw_surface *surface ;
42878  struct vmw_master *vmaster ;
42879  struct vmw_master *tmp___9 ;
42880  struct drm_vmw_rect *clips_ptr ;
42881  struct drm_vmw_rect *clips ;
42882  struct drm_mode_object *obj ;
42883  struct vmw_framebuffer *vfb ;
42884  uint32_t num_clips ;
42885  int ret ;
42886  long tmp___10 ;
42887  void *tmp___11 ;
42888  unsigned long tmp___12 ;
42889  long tmp___13 ;
42890  struct drm_framebuffer    *__mptr ;
42891  struct drm_mode_object    *__mptr___0 ;
42892  long tmp___14 ;
42893  unsigned long __cil_tmp25 ;
42894  unsigned long __cil_tmp26 ;
42895  unsigned long __cil_tmp27 ;
42896  unsigned long __cil_tmp28 ;
42897  struct drm_master *__cil_tmp29 ;
42898  void *__cil_tmp30 ;
42899  unsigned long __cil_tmp31 ;
42900  unsigned long __cil_tmp32 ;
42901  unsigned long __cil_tmp33 ;
42902  unsigned long __cil_tmp34 ;
42903  uint64_t __cil_tmp35 ;
42904  unsigned long __cil_tmp36 ;
42905  int __cil_tmp37 ;
42906  int __cil_tmp38 ;
42907  int __cil_tmp39 ;
42908  long __cil_tmp40 ;
42909  void *__cil_tmp41 ;
42910  unsigned long __cil_tmp42 ;
42911  unsigned long __cil_tmp43 ;
42912  size_t __cil_tmp44 ;
42913  void *__cil_tmp45 ;
42914  unsigned long __cil_tmp46 ;
42915  unsigned long __cil_tmp47 ;
42916  void *__cil_tmp48 ;
42917  void    *__cil_tmp49 ;
42918  unsigned long __cil_tmp50 ;
42919  unsigned long __cil_tmp51 ;
42920  unsigned long __cil_tmp52 ;
42921  unsigned long __cil_tmp53 ;
42922  struct mutex *__cil_tmp54 ;
42923  int __cil_tmp55 ;
42924  int __cil_tmp56 ;
42925  int __cil_tmp57 ;
42926  long __cil_tmp58 ;
42927  uint32_t __cil_tmp59 ;
42928  struct drm_framebuffer *__cil_tmp60 ;
42929  unsigned long __cil_tmp61 ;
42930  unsigned long __cil_tmp62 ;
42931  struct drm_mode_object *__cil_tmp63 ;
42932  unsigned int __cil_tmp64 ;
42933  char *__cil_tmp65 ;
42934  char *__cil_tmp66 ;
42935  struct drm_framebuffer *__cil_tmp67 ;
42936  struct vmw_framebuffer *__cil_tmp68 ;
42937  struct drm_framebuffer *__cil_tmp69 ;
42938  unsigned int __cil_tmp70 ;
42939  char *__cil_tmp71 ;
42940  char *__cil_tmp72 ;
42941  struct ttm_lock *__cil_tmp73 ;
42942  bool __cil_tmp74 ;
42943  int __cil_tmp75 ;
42944  int __cil_tmp76 ;
42945  int __cil_tmp77 ;
42946  long __cil_tmp78 ;
42947  unsigned long __cil_tmp79 ;
42948  unsigned long __cil_tmp80 ;
42949  uint32_t __cil_tmp81 ;
42950  struct vmw_surface **__cil_tmp82 ;
42951  struct vmw_surface *__cil_tmp83 ;
42952  unsigned long __cil_tmp84 ;
42953  unsigned long __cil_tmp85 ;
42954  uint32_t __cil_tmp86 ;
42955  unsigned long __cil_tmp87 ;
42956  unsigned long __cil_tmp88 ;
42957  int32_t __cil_tmp89 ;
42958  unsigned long __cil_tmp90 ;
42959  unsigned long __cil_tmp91 ;
42960  int32_t __cil_tmp92 ;
42961  struct ttm_lock *__cil_tmp93 ;
42962  unsigned long __cil_tmp94 ;
42963  unsigned long __cil_tmp95 ;
42964  struct mutex *__cil_tmp96 ;
42965  void    *__cil_tmp97 ;
42966
42967  {
42968  {
42969#line 124
42970  tmp___7 = vmw_fpriv(file_priv);
42971#line 124
42972  __cil_tmp25 = (unsigned long )tmp___7;
42973#line 124
42974  __cil_tmp26 = __cil_tmp25 + 8;
42975#line 124
42976  tfile = *((struct ttm_object_file **)__cil_tmp26);
42977#line 125
42978  tmp___8 = vmw_priv(dev);
42979#line 125
42980  dev_priv = tmp___8;
42981#line 126
42982  arg = (struct drm_vmw_present_arg *)data;
42983#line 129
42984  __cil_tmp27 = (unsigned long )file_priv;
42985#line 129
42986  __cil_tmp28 = __cil_tmp27 + 152;
42987#line 129
42988  __cil_tmp29 = *((struct drm_master **)__cil_tmp28);
42989#line 129
42990  tmp___9 = vmw_master(__cil_tmp29);
42991#line 129
42992  vmaster = tmp___9;
42993#line 131
42994  __cil_tmp30 = (void *)0;
42995#line 131
42996  clips = (struct drm_vmw_rect *)__cil_tmp30;
42997#line 137
42998  __cil_tmp31 = (unsigned long )arg;
42999#line 137
43000  __cil_tmp32 = __cil_tmp31 + 24;
43001#line 137
43002  num_clips = *((uint32_t *)__cil_tmp32);
43003#line 138
43004  __cil_tmp33 = (unsigned long )arg;
43005#line 138
43006  __cil_tmp34 = __cil_tmp33 + 16;
43007#line 138
43008  __cil_tmp35 = *((uint64_t *)__cil_tmp34);
43009#line 138
43010  __cil_tmp36 = (unsigned long )__cil_tmp35;
43011#line 138
43012  clips_ptr = (struct drm_vmw_rect *)__cil_tmp36;
43013#line 140
43014  __cil_tmp37 = num_clips == 0U;
43015#line 140
43016  __cil_tmp38 = ! __cil_tmp37;
43017#line 140
43018  __cil_tmp39 = ! __cil_tmp38;
43019#line 140
43020  __cil_tmp40 = (long )__cil_tmp39;
43021#line 140
43022  tmp___10 = __builtin_expect(__cil_tmp40, 0L);
43023  }
43024#line 140
43025  if (tmp___10) {
43026#line 141
43027    return (0);
43028  } else {
43029
43030  }
43031  {
43032#line 143
43033  __cil_tmp41 = (void *)0;
43034#line 143
43035  __cil_tmp42 = (unsigned long )__cil_tmp41;
43036#line 143
43037  __cil_tmp43 = (unsigned long )clips_ptr;
43038#line 143
43039  if (__cil_tmp43 == __cil_tmp42) {
43040    {
43041#line 144
43042    drm_err("vmw_present_ioctl", "Variable clips_ptr must be specified.\n");
43043#line 145
43044    ret = -22;
43045    }
43046#line 146
43047    goto out_clips;
43048  } else {
43049
43050  }
43051  }
43052  {
43053#line 149
43054  __cil_tmp44 = (size_t )num_clips;
43055#line 149
43056  tmp___11 = kcalloc(__cil_tmp44, 16UL, 208U);
43057#line 149
43058  clips = (struct drm_vmw_rect *)tmp___11;
43059  }
43060  {
43061#line 150
43062  __cil_tmp45 = (void *)0;
43063#line 150
43064  __cil_tmp46 = (unsigned long )__cil_tmp45;
43065#line 150
43066  __cil_tmp47 = (unsigned long )clips;
43067#line 150
43068  if (__cil_tmp47 == __cil_tmp46) {
43069    {
43070#line 151
43071    drm_err("vmw_present_ioctl", "Failed to allocate clip rect list.\n");
43072#line 152
43073    ret = -12;
43074    }
43075#line 153
43076    goto out_clips;
43077  } else {
43078
43079  }
43080  }
43081  {
43082#line 156
43083  __cil_tmp48 = (void *)clips;
43084#line 156
43085  __cil_tmp49 = (void    *)clips_ptr;
43086#line 156
43087  __cil_tmp50 = (unsigned long )num_clips;
43088#line 156
43089  __cil_tmp51 = __cil_tmp50 * 16UL;
43090#line 156
43091  tmp___12 = (unsigned long )copy_from_user(__cil_tmp48, __cil_tmp49, __cil_tmp51);
43092#line 156
43093  ret = (int )tmp___12;
43094  }
43095#line 157
43096  if (ret) {
43097    {
43098#line 158
43099    drm_err("vmw_present_ioctl", "Failed to copy clip rects from userspace.\n");
43100#line 159
43101    ret = -14;
43102    }
43103#line 160
43104    goto out_no_mode_mutex;
43105  } else {
43106
43107  }
43108  {
43109#line 163
43110  __cil_tmp52 = (unsigned long )dev;
43111#line 163
43112  __cil_tmp53 = __cil_tmp52 + 1152;
43113#line 163
43114  __cil_tmp54 = (struct mutex *)__cil_tmp53;
43115#line 163
43116  ret = (int )mutex_lock_interruptible(__cil_tmp54);
43117#line 164
43118  __cil_tmp55 = ret != 0;
43119#line 164
43120  __cil_tmp56 = ! __cil_tmp55;
43121#line 164
43122  __cil_tmp57 = ! __cil_tmp56;
43123#line 164
43124  __cil_tmp58 = (long )__cil_tmp57;
43125#line 164
43126  tmp___13 = __builtin_expect(__cil_tmp58, 0L);
43127  }
43128#line 164
43129  if (tmp___13) {
43130#line 165
43131    ret = -512;
43132#line 166
43133    goto out_no_mode_mutex;
43134  } else {
43135
43136  }
43137  {
43138#line 169
43139  __cil_tmp59 = *((uint32_t *)arg);
43140#line 169
43141  obj = drm_mode_object_find(dev, __cil_tmp59, 4227595259U);
43142  }
43143#line 170
43144  if (! obj) {
43145    {
43146#line 171
43147    drm_err("vmw_present_ioctl", "Invalid framebuffer id.\n");
43148#line 172
43149    ret = -22;
43150    }
43151#line 173
43152    goto out_no_ttm_lock;
43153  } else {
43154
43155  }
43156  {
43157#line 175
43158  __mptr___0 = (struct drm_mode_object    *)obj;
43159#line 175
43160  __cil_tmp60 = (struct drm_framebuffer *)0;
43161#line 175
43162  __cil_tmp61 = (unsigned long )__cil_tmp60;
43163#line 175
43164  __cil_tmp62 = __cil_tmp61 + 24;
43165#line 175
43166  __cil_tmp63 = (struct drm_mode_object *)__cil_tmp62;
43167#line 175
43168  __cil_tmp64 = (unsigned int )__cil_tmp63;
43169#line 175
43170  __cil_tmp65 = (char *)__mptr___0;
43171#line 175
43172  __cil_tmp66 = __cil_tmp65 - __cil_tmp64;
43173#line 175
43174  __cil_tmp67 = (struct drm_framebuffer *)__cil_tmp66;
43175#line 175
43176  __mptr = (struct drm_framebuffer    *)__cil_tmp67;
43177#line 175
43178  __cil_tmp68 = (struct vmw_framebuffer *)0;
43179#line 175
43180  __cil_tmp69 = (struct drm_framebuffer *)__cil_tmp68;
43181#line 175
43182  __cil_tmp70 = (unsigned int )__cil_tmp69;
43183#line 175
43184  __cil_tmp71 = (char *)__mptr;
43185#line 175
43186  __cil_tmp72 = __cil_tmp71 - __cil_tmp70;
43187#line 175
43188  vfb = (struct vmw_framebuffer *)__cil_tmp72;
43189#line 177
43190  __cil_tmp73 = (struct ttm_lock *)vmaster;
43191#line 177
43192  __cil_tmp74 = (bool )1;
43193#line 177
43194  ret = ttm_read_lock(__cil_tmp73, __cil_tmp74);
43195#line 178
43196  __cil_tmp75 = ret != 0;
43197#line 178
43198  __cil_tmp76 = ! __cil_tmp75;
43199#line 178
43200  __cil_tmp77 = ! __cil_tmp76;
43201#line 178
43202  __cil_tmp78 = (long )__cil_tmp77;
43203#line 178
43204  tmp___14 = __builtin_expect(__cil_tmp78, 0L);
43205  }
43206#line 178
43207  if (tmp___14) {
43208#line 179
43209    goto out_no_ttm_lock;
43210  } else {
43211
43212  }
43213  {
43214#line 181
43215  __cil_tmp79 = (unsigned long )arg;
43216#line 181
43217  __cil_tmp80 = __cil_tmp79 + 4;
43218#line 181
43219  __cil_tmp81 = *((uint32_t *)__cil_tmp80);
43220#line 181
43221  ret = vmw_user_surface_lookup_handle(dev_priv, tfile, __cil_tmp81, & surface);
43222  }
43223#line 183
43224  if (ret) {
43225#line 184
43226    goto out_no_surface;
43227  } else {
43228
43229  }
43230  {
43231#line 186
43232  __cil_tmp82 = & surface;
43233#line 186
43234  __cil_tmp83 = *__cil_tmp82;
43235#line 186
43236  __cil_tmp84 = (unsigned long )arg;
43237#line 186
43238  __cil_tmp85 = __cil_tmp84 + 4;
43239#line 186
43240  __cil_tmp86 = *((uint32_t *)__cil_tmp85);
43241#line 186
43242  __cil_tmp87 = (unsigned long )arg;
43243#line 186
43244  __cil_tmp88 = __cil_tmp87 + 8;
43245#line 186
43246  __cil_tmp89 = *((int32_t *)__cil_tmp88);
43247#line 186
43248  __cil_tmp90 = (unsigned long )arg;
43249#line 186
43250  __cil_tmp91 = __cil_tmp90 + 12;
43251#line 186
43252  __cil_tmp92 = *((int32_t *)__cil_tmp91);
43253#line 186
43254  ret = vmw_kms_present(dev_priv, file_priv, vfb, __cil_tmp83, __cil_tmp86, __cil_tmp89,
43255                        __cil_tmp92, clips, num_clips);
43256#line 192
43257  vmw_surface_unreference(& surface);
43258  }
43259  out_no_surface: 
43260  {
43261#line 195
43262  __cil_tmp93 = (struct ttm_lock *)vmaster;
43263#line 195
43264  ttm_read_unlock(__cil_tmp93);
43265  }
43266  out_no_ttm_lock: 
43267  {
43268#line 198
43269  __cil_tmp94 = (unsigned long )dev;
43270#line 198
43271  __cil_tmp95 = __cil_tmp94 + 1152;
43272#line 198
43273  __cil_tmp96 = (struct mutex *)__cil_tmp95;
43274#line 198
43275  mutex_unlock(__cil_tmp96);
43276  }
43277  out_no_mode_mutex: 
43278  {
43279#line 201
43280  __cil_tmp97 = (void    *)clips;
43281#line 201
43282  kfree(__cil_tmp97);
43283  }
43284  out_clips: 
43285#line 203
43286  return (ret);
43287}
43288}
43289#line 206 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
43290int vmw_present_readback_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
43291{ struct vmw_private *dev_priv ;
43292  struct vmw_private *tmp___7 ;
43293  struct drm_vmw_present_readback_arg *arg ;
43294  struct drm_vmw_fence_rep *user_fence_rep ;
43295  struct vmw_master *vmaster ;
43296  struct vmw_master *tmp___8 ;
43297  struct drm_vmw_rect *clips_ptr ;
43298  struct drm_vmw_rect *clips ;
43299  struct drm_mode_object *obj ;
43300  struct vmw_framebuffer *vfb ;
43301  uint32_t num_clips ;
43302  int ret ;
43303  long tmp___9 ;
43304  void *tmp___10 ;
43305  unsigned long tmp___11 ;
43306  long tmp___12 ;
43307  struct drm_framebuffer    *__mptr ;
43308  struct drm_mode_object    *__mptr___0 ;
43309  long tmp___13 ;
43310  unsigned long __cil_tmp23 ;
43311  unsigned long __cil_tmp24 ;
43312  uint64_t __cil_tmp25 ;
43313  unsigned long __cil_tmp26 ;
43314  unsigned long __cil_tmp27 ;
43315  unsigned long __cil_tmp28 ;
43316  struct drm_master *__cil_tmp29 ;
43317  void *__cil_tmp30 ;
43318  unsigned long __cil_tmp31 ;
43319  unsigned long __cil_tmp32 ;
43320  unsigned long __cil_tmp33 ;
43321  unsigned long __cil_tmp34 ;
43322  uint64_t __cil_tmp35 ;
43323  unsigned long __cil_tmp36 ;
43324  int __cil_tmp37 ;
43325  int __cil_tmp38 ;
43326  int __cil_tmp39 ;
43327  long __cil_tmp40 ;
43328  void *__cil_tmp41 ;
43329  unsigned long __cil_tmp42 ;
43330  unsigned long __cil_tmp43 ;
43331  size_t __cil_tmp44 ;
43332  void *__cil_tmp45 ;
43333  unsigned long __cil_tmp46 ;
43334  unsigned long __cil_tmp47 ;
43335  void *__cil_tmp48 ;
43336  void    *__cil_tmp49 ;
43337  unsigned long __cil_tmp50 ;
43338  unsigned long __cil_tmp51 ;
43339  unsigned long __cil_tmp52 ;
43340  unsigned long __cil_tmp53 ;
43341  struct mutex *__cil_tmp54 ;
43342  int __cil_tmp55 ;
43343  int __cil_tmp56 ;
43344  int __cil_tmp57 ;
43345  long __cil_tmp58 ;
43346  uint32_t __cil_tmp59 ;
43347  struct drm_framebuffer *__cil_tmp60 ;
43348  unsigned long __cil_tmp61 ;
43349  unsigned long __cil_tmp62 ;
43350  struct drm_mode_object *__cil_tmp63 ;
43351  unsigned int __cil_tmp64 ;
43352  char *__cil_tmp65 ;
43353  char *__cil_tmp66 ;
43354  struct drm_framebuffer *__cil_tmp67 ;
43355  struct vmw_framebuffer *__cil_tmp68 ;
43356  struct drm_framebuffer *__cil_tmp69 ;
43357  unsigned int __cil_tmp70 ;
43358  char *__cil_tmp71 ;
43359  char *__cil_tmp72 ;
43360  unsigned long __cil_tmp73 ;
43361  unsigned long __cil_tmp74 ;
43362  bool __cil_tmp75 ;
43363  struct ttm_lock *__cil_tmp76 ;
43364  bool __cil_tmp77 ;
43365  int __cil_tmp78 ;
43366  int __cil_tmp79 ;
43367  int __cil_tmp80 ;
43368  long __cil_tmp81 ;
43369  struct ttm_lock *__cil_tmp82 ;
43370  unsigned long __cil_tmp83 ;
43371  unsigned long __cil_tmp84 ;
43372  struct mutex *__cil_tmp85 ;
43373  void    *__cil_tmp86 ;
43374
43375  {
43376  {
43377#line 209
43378  tmp___7 = vmw_priv(dev);
43379#line 209
43380  dev_priv = tmp___7;
43381#line 210
43382  arg = (struct drm_vmw_present_readback_arg *)data;
43383#line 212
43384  __cil_tmp23 = (unsigned long )arg;
43385#line 212
43386  __cil_tmp24 = __cil_tmp23 + 16;
43387#line 212
43388  __cil_tmp25 = *((uint64_t *)__cil_tmp24);
43389#line 212
43390  __cil_tmp26 = (unsigned long )__cil_tmp25;
43391#line 212
43392  user_fence_rep = (struct drm_vmw_fence_rep *)__cil_tmp26;
43393#line 215
43394  __cil_tmp27 = (unsigned long )file_priv;
43395#line 215
43396  __cil_tmp28 = __cil_tmp27 + 152;
43397#line 215
43398  __cil_tmp29 = *((struct drm_master **)__cil_tmp28);
43399#line 215
43400  tmp___8 = vmw_master(__cil_tmp29);
43401#line 215
43402  vmaster = tmp___8;
43403#line 217
43404  __cil_tmp30 = (void *)0;
43405#line 217
43406  clips = (struct drm_vmw_rect *)__cil_tmp30;
43407#line 223
43408  __cil_tmp31 = (unsigned long )arg;
43409#line 223
43410  __cil_tmp32 = __cil_tmp31 + 4;
43411#line 223
43412  num_clips = *((uint32_t *)__cil_tmp32);
43413#line 224
43414  __cil_tmp33 = (unsigned long )arg;
43415#line 224
43416  __cil_tmp34 = __cil_tmp33 + 8;
43417#line 224
43418  __cil_tmp35 = *((uint64_t *)__cil_tmp34);
43419#line 224
43420  __cil_tmp36 = (unsigned long )__cil_tmp35;
43421#line 224
43422  clips_ptr = (struct drm_vmw_rect *)__cil_tmp36;
43423#line 226
43424  __cil_tmp37 = num_clips == 0U;
43425#line 226
43426  __cil_tmp38 = ! __cil_tmp37;
43427#line 226
43428  __cil_tmp39 = ! __cil_tmp38;
43429#line 226
43430  __cil_tmp40 = (long )__cil_tmp39;
43431#line 226
43432  tmp___9 = __builtin_expect(__cil_tmp40, 0L);
43433  }
43434#line 226
43435  if (tmp___9) {
43436#line 227
43437    return (0);
43438  } else {
43439
43440  }
43441  {
43442#line 229
43443  __cil_tmp41 = (void *)0;
43444#line 229
43445  __cil_tmp42 = (unsigned long )__cil_tmp41;
43446#line 229
43447  __cil_tmp43 = (unsigned long )clips_ptr;
43448#line 229
43449  if (__cil_tmp43 == __cil_tmp42) {
43450    {
43451#line 230
43452    drm_err("vmw_present_readback_ioctl", "Argument clips_ptr must be specified.\n");
43453#line 231
43454    ret = -22;
43455    }
43456#line 232
43457    goto out_clips;
43458  } else {
43459
43460  }
43461  }
43462  {
43463#line 235
43464  __cil_tmp44 = (size_t )num_clips;
43465#line 235
43466  tmp___10 = kcalloc(__cil_tmp44, 16UL, 208U);
43467#line 235
43468  clips = (struct drm_vmw_rect *)tmp___10;
43469  }
43470  {
43471#line 236
43472  __cil_tmp45 = (void *)0;
43473#line 236
43474  __cil_tmp46 = (unsigned long )__cil_tmp45;
43475#line 236
43476  __cil_tmp47 = (unsigned long )clips;
43477#line 236
43478  if (__cil_tmp47 == __cil_tmp46) {
43479    {
43480#line 237
43481    drm_err("vmw_present_readback_ioctl", "Failed to allocate clip rect list.\n");
43482#line 238
43483    ret = -12;
43484    }
43485#line 239
43486    goto out_clips;
43487  } else {
43488
43489  }
43490  }
43491  {
43492#line 242
43493  __cil_tmp48 = (void *)clips;
43494#line 242
43495  __cil_tmp49 = (void    *)clips_ptr;
43496#line 242
43497  __cil_tmp50 = (unsigned long )num_clips;
43498#line 242
43499  __cil_tmp51 = __cil_tmp50 * 16UL;
43500#line 242
43501  tmp___11 = (unsigned long )copy_from_user(__cil_tmp48, __cil_tmp49, __cil_tmp51);
43502#line 242
43503  ret = (int )tmp___11;
43504  }
43505#line 243
43506  if (ret) {
43507    {
43508#line 244
43509    drm_err("vmw_present_readback_ioctl", "Failed to copy clip rects from userspace.\n");
43510#line 245
43511    ret = -14;
43512    }
43513#line 246
43514    goto out_no_mode_mutex;
43515  } else {
43516
43517  }
43518  {
43519#line 249
43520  __cil_tmp52 = (unsigned long )dev;
43521#line 249
43522  __cil_tmp53 = __cil_tmp52 + 1152;
43523#line 249
43524  __cil_tmp54 = (struct mutex *)__cil_tmp53;
43525#line 249
43526  ret = (int )mutex_lock_interruptible(__cil_tmp54);
43527#line 250
43528  __cil_tmp55 = ret != 0;
43529#line 250
43530  __cil_tmp56 = ! __cil_tmp55;
43531#line 250
43532  __cil_tmp57 = ! __cil_tmp56;
43533#line 250
43534  __cil_tmp58 = (long )__cil_tmp57;
43535#line 250
43536  tmp___12 = __builtin_expect(__cil_tmp58, 0L);
43537  }
43538#line 250
43539  if (tmp___12) {
43540#line 251
43541    ret = -512;
43542#line 252
43543    goto out_no_mode_mutex;
43544  } else {
43545
43546  }
43547  {
43548#line 255
43549  __cil_tmp59 = *((uint32_t *)arg);
43550#line 255
43551  obj = drm_mode_object_find(dev, __cil_tmp59, 4227595259U);
43552  }
43553#line 256
43554  if (! obj) {
43555    {
43556#line 257
43557    drm_err("vmw_present_readback_ioctl", "Invalid framebuffer id.\n");
43558#line 258
43559    ret = -22;
43560    }
43561#line 259
43562    goto out_no_ttm_lock;
43563  } else {
43564
43565  }
43566#line 262
43567  __mptr___0 = (struct drm_mode_object    *)obj;
43568#line 262
43569  __cil_tmp60 = (struct drm_framebuffer *)0;
43570#line 262
43571  __cil_tmp61 = (unsigned long )__cil_tmp60;
43572#line 262
43573  __cil_tmp62 = __cil_tmp61 + 24;
43574#line 262
43575  __cil_tmp63 = (struct drm_mode_object *)__cil_tmp62;
43576#line 262
43577  __cil_tmp64 = (unsigned int )__cil_tmp63;
43578#line 262
43579  __cil_tmp65 = (char *)__mptr___0;
43580#line 262
43581  __cil_tmp66 = __cil_tmp65 - __cil_tmp64;
43582#line 262
43583  __cil_tmp67 = (struct drm_framebuffer *)__cil_tmp66;
43584#line 262
43585  __mptr = (struct drm_framebuffer    *)__cil_tmp67;
43586#line 262
43587  __cil_tmp68 = (struct vmw_framebuffer *)0;
43588#line 262
43589  __cil_tmp69 = (struct drm_framebuffer *)__cil_tmp68;
43590#line 262
43591  __cil_tmp70 = (unsigned int )__cil_tmp69;
43592#line 262
43593  __cil_tmp71 = (char *)__mptr;
43594#line 262
43595  __cil_tmp72 = __cil_tmp71 - __cil_tmp70;
43596#line 262
43597  vfb = (struct vmw_framebuffer *)__cil_tmp72;
43598  {
43599#line 263
43600  __cil_tmp73 = (unsigned long )vfb;
43601#line 263
43602  __cil_tmp74 = __cil_tmp73 + 136;
43603#line 263
43604  __cil_tmp75 = *((bool *)__cil_tmp74);
43605#line 263
43606  if (! __cil_tmp75) {
43607    {
43608#line 264
43609    drm_err("vmw_present_readback_ioctl", "Framebuffer not dmabuf backed.\n");
43610#line 265
43611    ret = -22;
43612    }
43613#line 266
43614    goto out_no_ttm_lock;
43615  } else {
43616
43617  }
43618  }
43619  {
43620#line 269
43621  __cil_tmp76 = (struct ttm_lock *)vmaster;
43622#line 269
43623  __cil_tmp77 = (bool )1;
43624#line 269
43625  ret = ttm_read_lock(__cil_tmp76, __cil_tmp77);
43626#line 270
43627  __cil_tmp78 = ret != 0;
43628#line 270
43629  __cil_tmp79 = ! __cil_tmp78;
43630#line 270
43631  __cil_tmp80 = ! __cil_tmp79;
43632#line 270
43633  __cil_tmp81 = (long )__cil_tmp80;
43634#line 270
43635  tmp___13 = __builtin_expect(__cil_tmp81, 0L);
43636  }
43637#line 270
43638  if (tmp___13) {
43639#line 271
43640    goto out_no_ttm_lock;
43641  } else {
43642
43643  }
43644  {
43645#line 273
43646  ret = vmw_kms_readback(dev_priv, file_priv, vfb, user_fence_rep, clips, num_clips);
43647#line 277
43648  __cil_tmp82 = (struct ttm_lock *)vmaster;
43649#line 277
43650  ttm_read_unlock(__cil_tmp82);
43651  }
43652  out_no_ttm_lock: 
43653  {
43654#line 280
43655  __cil_tmp83 = (unsigned long )dev;
43656#line 280
43657  __cil_tmp84 = __cil_tmp83 + 1152;
43658#line 280
43659  __cil_tmp85 = (struct mutex *)__cil_tmp84;
43660#line 280
43661  mutex_unlock(__cil_tmp85);
43662  }
43663  out_no_mode_mutex: 
43664  {
43665#line 283
43666  __cil_tmp86 = (void    *)clips;
43667#line 283
43668  kfree(__cil_tmp86);
43669  }
43670  out_clips: 
43671#line 285
43672  return (ret);
43673}
43674}
43675#line 298 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
43676unsigned int vmw_fops_poll(struct file *filp , struct poll_table_struct *wait ) 
43677{ struct drm_file *file_priv ;
43678  struct vmw_private *dev_priv ;
43679  struct vmw_private *tmp___7 ;
43680  unsigned int tmp___8 ;
43681  unsigned long __cil_tmp7 ;
43682  unsigned long __cil_tmp8 ;
43683  void *__cil_tmp9 ;
43684  unsigned long __cil_tmp10 ;
43685  unsigned long __cil_tmp11 ;
43686  struct drm_minor *__cil_tmp12 ;
43687  unsigned long __cil_tmp13 ;
43688  unsigned long __cil_tmp14 ;
43689  struct drm_device *__cil_tmp15 ;
43690  uint32_t __cil_tmp16 ;
43691
43692  {
43693  {
43694#line 300
43695  __cil_tmp7 = (unsigned long )filp;
43696#line 300
43697  __cil_tmp8 = __cil_tmp7 + 200;
43698#line 300
43699  __cil_tmp9 = *((void **)__cil_tmp8);
43700#line 300
43701  file_priv = (struct drm_file *)__cil_tmp9;
43702#line 301
43703  __cil_tmp10 = (unsigned long )file_priv;
43704#line 301
43705  __cil_tmp11 = __cil_tmp10 + 40;
43706#line 301
43707  __cil_tmp12 = *((struct drm_minor **)__cil_tmp11);
43708#line 301
43709  __cil_tmp13 = (unsigned long )__cil_tmp12;
43710#line 301
43711  __cil_tmp14 = __cil_tmp13 + 784;
43712#line 301
43713  __cil_tmp15 = *((struct drm_device **)__cil_tmp14);
43714#line 301
43715  tmp___7 = vmw_priv(__cil_tmp15);
43716#line 301
43717  dev_priv = tmp___7;
43718#line 304
43719  __cil_tmp16 = (uint32_t )1;
43720#line 304
43721  vmw_fifo_ping_host(dev_priv, __cil_tmp16);
43722#line 305
43723  tmp___8 = drm_poll(filp, wait);
43724  }
43725#line 305
43726  return (tmp___8);
43727}
43728}
43729#line 320 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c"
43730ssize_t vmw_fops_read(struct file *filp , char *buffer , size_t count , loff_t *offset ) 
43731{ struct drm_file *file_priv ;
43732  struct vmw_private *dev_priv ;
43733  struct vmw_private *tmp___7 ;
43734  ssize_t tmp___8 ;
43735  unsigned long __cil_tmp9 ;
43736  unsigned long __cil_tmp10 ;
43737  void *__cil_tmp11 ;
43738  unsigned long __cil_tmp12 ;
43739  unsigned long __cil_tmp13 ;
43740  struct drm_minor *__cil_tmp14 ;
43741  unsigned long __cil_tmp15 ;
43742  unsigned long __cil_tmp16 ;
43743  struct drm_device *__cil_tmp17 ;
43744  uint32_t __cil_tmp18 ;
43745
43746  {
43747  {
43748#line 323
43749  __cil_tmp9 = (unsigned long )filp;
43750#line 323
43751  __cil_tmp10 = __cil_tmp9 + 200;
43752#line 323
43753  __cil_tmp11 = *((void **)__cil_tmp10);
43754#line 323
43755  file_priv = (struct drm_file *)__cil_tmp11;
43756#line 324
43757  __cil_tmp12 = (unsigned long )file_priv;
43758#line 324
43759  __cil_tmp13 = __cil_tmp12 + 40;
43760#line 324
43761  __cil_tmp14 = *((struct drm_minor **)__cil_tmp13);
43762#line 324
43763  __cil_tmp15 = (unsigned long )__cil_tmp14;
43764#line 324
43765  __cil_tmp16 = __cil_tmp15 + 784;
43766#line 324
43767  __cil_tmp17 = *((struct drm_device **)__cil_tmp16);
43768#line 324
43769  tmp___7 = vmw_priv(__cil_tmp17);
43770#line 324
43771  dev_priv = tmp___7;
43772#line 327
43773  __cil_tmp18 = (uint32_t )1;
43774#line 327
43775  vmw_fifo_ping_host(dev_priv, __cil_tmp18);
43776#line 328
43777  tmp___8 = drm_read(filp, buffer, count, offset);
43778  }
43779#line 328
43780  return (tmp___8);
43781}
43782}
43783#line 77 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
43784__inline static int atomic_sub_and_test(int i , atomic_t *v )  __attribute__((__no_instrument_function__)) ;
43785#line 77 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
43786__inline static int atomic_sub_and_test(int i , atomic_t *v ) 
43787{ unsigned char c ;
43788
43789  {
43790#line 81
43791  __asm__  volatile   (".section .smp_locks,\"a\"\n"
43792                       ".balign 4\n"
43793                       ".long 671f - .\n"
43794                       ".previous\n"
43795                       "671:"
43796                       "\n\tlock; "
43797                       "subl %2,%0; sete %1": "+m" (*((int *)v)), "=qm" (c): "ir" (i): "memory");
43798#line 84
43799  return ((int )c);
43800}
43801}
43802#line 18 "include/linux/rwlock_api_smp.h"
43803extern void _raw_read_lock(rwlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
43804#line 19
43805extern void _raw_write_lock(rwlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
43806#line 30
43807extern void _raw_read_unlock(rwlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
43808#line 31
43809extern void _raw_write_unlock(rwlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
43810#line 30 "include/linux/kref.h"
43811__inline static void kref_init(struct kref *kref )  __attribute__((__no_instrument_function__)) ;
43812#line 30 "include/linux/kref.h"
43813__inline static void kref_init(struct kref *kref ) 
43814{ atomic_t *__cil_tmp2 ;
43815
43816  {
43817  {
43818#line 32
43819  __cil_tmp2 = (atomic_t *)kref;
43820#line 32
43821  atomic_set(__cil_tmp2, 1);
43822  }
43823#line 33
43824  return;
43825}
43826}
43827#line 63
43828__inline static int kref_sub(struct kref *kref , unsigned int count , void (*release)(struct kref *kref ) )  __attribute__((__no_instrument_function__)) ;
43829#line 63 "include/linux/kref.h"
43830__inline static int kref_sub(struct kref *kref , unsigned int count , void (*release)(struct kref *kref ) ) 
43831{ int __ret_warn_on ;
43832  long tmp ;
43833  int tmp___0 ;
43834  void *__cil_tmp7 ;
43835  unsigned long __cil_tmp8 ;
43836  unsigned long __cil_tmp9 ;
43837  int __cil_tmp10 ;
43838  int __cil_tmp11 ;
43839  int __cil_tmp12 ;
43840  int __cil_tmp13 ;
43841  long __cil_tmp14 ;
43842  int    __cil_tmp15 ;
43843  int __cil_tmp16 ;
43844  int __cil_tmp17 ;
43845  long __cil_tmp18 ;
43846  int __cil_tmp19 ;
43847  atomic_t *__cil_tmp20 ;
43848
43849  {
43850  {
43851#line 66
43852  __cil_tmp7 = (void *)0;
43853#line 66
43854  __cil_tmp8 = (unsigned long )__cil_tmp7;
43855#line 66
43856  __cil_tmp9 = (unsigned long )release;
43857#line 66
43858  __cil_tmp10 = __cil_tmp9 == __cil_tmp8;
43859#line 66
43860  __cil_tmp11 = ! __cil_tmp10;
43861#line 66
43862  __ret_warn_on = ! __cil_tmp11;
43863#line 66
43864  __cil_tmp12 = ! __ret_warn_on;
43865#line 66
43866  __cil_tmp13 = ! __cil_tmp12;
43867#line 66
43868  __cil_tmp14 = (long )__cil_tmp13;
43869#line 66
43870  tmp = __builtin_expect(__cil_tmp14, 0L);
43871  }
43872#line 66
43873  if (tmp) {
43874    {
43875#line 66
43876    __cil_tmp15 = (int    )66;
43877#line 66
43878    warn_slowpath_null("include/linux/kref.h", __cil_tmp15);
43879    }
43880  } else {
43881
43882  }
43883  {
43884#line 66
43885  __cil_tmp16 = ! __ret_warn_on;
43886#line 66
43887  __cil_tmp17 = ! __cil_tmp16;
43888#line 66
43889  __cil_tmp18 = (long )__cil_tmp17;
43890#line 66
43891  __builtin_expect(__cil_tmp18, 0L);
43892#line 68
43893  __cil_tmp19 = (int )count;
43894#line 68
43895  __cil_tmp20 = (atomic_t *)kref;
43896#line 68
43897  tmp___0 = atomic_sub_and_test(__cil_tmp19, __cil_tmp20);
43898  }
43899#line 68
43900  if (tmp___0) {
43901    {
43902#line 69
43903    (*release)(kref);
43904    }
43905#line 70
43906    return (1);
43907  } else {
43908
43909  }
43910#line 72
43911  return (0);
43912}
43913}
43914#line 92
43915__inline static int kref_put(struct kref *kref , void (*release)(struct kref *kref ) )  __attribute__((__no_instrument_function__)) ;
43916#line 92 "include/linux/kref.h"
43917__inline static int kref_put(struct kref *kref , void (*release)(struct kref *kref ) ) 
43918{ int tmp ;
43919
43920  {
43921  {
43922#line 94
43923  tmp = kref_sub(kref, 1U, release);
43924  }
43925#line 94
43926  return (tmp);
43927}
43928}
43929#line 104 "include/linux/idr.h"
43930extern void *idr_find(struct idr *idp , int id ) ;
43931#line 105
43932extern int idr_pre_get(struct idr *idp , gfp_t gfp_mask ) ;
43933#line 107
43934extern int idr_get_new_above(struct idr *idp , void *ptr , int starting_id , int *id ) ;
43935#line 112
43936extern void idr_remove(struct idr *idp , int id ) ;
43937#line 453 "include/drm/ttm/ttm_bo_api.h"
43938extern size_t ttm_bo_acc_size(struct ttm_bo_device *bdev , unsigned long bo_size ,
43939                              unsigned int struct_size ) ;
43940#line 496
43941extern int ttm_bo_init(struct ttm_bo_device *bdev , struct ttm_buffer_object *bo ,
43942                       unsigned long size , enum ttm_bo_type type , struct ttm_placement *placement ,
43943                       uint32_t page_alignment , unsigned long buffer_start , bool interrubtible ,
43944                       struct file *persistent_swap_storage , size_t acc_size , void (*destroy)(struct ttm_buffer_object * ) ) ;
43945#line 150 "include/drm/ttm/ttm_memory.h"
43946extern int ttm_mem_global_alloc(struct ttm_mem_global *glob , uint64_t memory , bool no_wait ,
43947                                bool interruptible ) ;
43948#line 152
43949extern void ttm_mem_global_free(struct ttm_mem_global *glob , uint64_t amount ) ;
43950#line 159
43951extern size_t ttm_round_pot(size_t size ) ;
43952#line 147 "include/drm/ttm/ttm_object.h"
43953extern int ttm_base_object_init(struct ttm_object_file *tfile , struct ttm_base_object *base ,
43954                                bool shareable , enum ttm_object_type type , void (*refcount_release)(struct ttm_base_object ** ) ,
43955                                void (*ref_obj_release)(struct ttm_base_object * ,
43956                                                        enum ttm_ref_type ref_type ) ) ;
43957#line 202
43958extern int ttm_ref_object_add(struct ttm_object_file *tfile , struct ttm_base_object *base ,
43959                              enum ttm_ref_type ref_type , bool *existed ) ;
43960#line 385 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
43961struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv ) ;
43962#line 401
43963void vmw_surface_res_free(struct vmw_resource *res ) ;
43964#line 402
43965int vmw_surface_init(struct vmw_private *dev_priv , struct vmw_surface *srf , void (*res_free)(struct vmw_resource *res ) ) ;
43966#line 415
43967int vmw_surface_check(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
43968                      uint32_t handle , int *id ) ;
43969#line 439
43970int vmw_user_stream_lookup(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
43971                           uint32_t *inout_id , struct vmw_resource **out ) ;
43972#line 464
43973void vmw_bo_get_guest_ptr(struct ttm_buffer_object    *bo , SVGAGuestPtr *ptr ) ;
43974#line 522
43975struct ttm_placement vmw_srf_placement ;
43976#line 659
43977int vmw_overlay_claim(struct vmw_private *dev_priv , uint32_t *out ) ;
43978#line 660
43979int vmw_overlay_unref(struct vmw_private *dev_priv , uint32_t stream_id ) ;
43980#line 705
43981__inline static struct ttm_mem_global *vmw_mem_glob(struct vmw_private *dev_priv )  __attribute__((__no_instrument_function__)) ;
43982#line 705 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
43983__inline static struct ttm_mem_global *vmw_mem_glob(struct vmw_private *dev_priv ) 
43984{ unsigned long __cil_tmp2 ;
43985  unsigned long __cil_tmp3 ;
43986  unsigned long __cil_tmp4 ;
43987  void *__cil_tmp5 ;
43988
43989  {
43990  {
43991#line 707
43992  __cil_tmp2 = 1816 + 16;
43993#line 707
43994  __cil_tmp3 = (unsigned long )dev_priv;
43995#line 707
43996  __cil_tmp4 = __cil_tmp3 + __cil_tmp2;
43997#line 707
43998  __cil_tmp5 = *((void **)__cil_tmp4);
43999#line 707
44000  return ((struct ttm_mem_global *)__cil_tmp5);
44001  }
44002}
44003}
44004#line 72 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44005static uint64_t vmw_user_context_size  ;
44006#line 73 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44007static uint64_t vmw_user_surface_size  ;
44008#line 74 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44009static uint64_t vmw_user_stream_size  ;
44010#line 76
44011__inline static struct vmw_dma_buffer *vmw_dma_buffer(struct ttm_buffer_object *bo )  __attribute__((__no_instrument_function__)) ;
44012#line 76 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44013__inline static struct vmw_dma_buffer *vmw_dma_buffer(struct ttm_buffer_object *bo ) 
44014{ struct ttm_buffer_object    *__mptr ;
44015  struct vmw_dma_buffer *__cil_tmp3 ;
44016  struct ttm_buffer_object *__cil_tmp4 ;
44017  unsigned int __cil_tmp5 ;
44018  char *__cil_tmp6 ;
44019  char *__cil_tmp7 ;
44020
44021  {
44022#line 79
44023  __mptr = (struct ttm_buffer_object    *)bo;
44024  {
44025#line 79
44026  __cil_tmp3 = (struct vmw_dma_buffer *)0;
44027#line 79
44028  __cil_tmp4 = (struct ttm_buffer_object *)__cil_tmp3;
44029#line 79
44030  __cil_tmp5 = (unsigned int )__cil_tmp4;
44031#line 79
44032  __cil_tmp6 = (char *)__mptr;
44033#line 79
44034  __cil_tmp7 = __cil_tmp6 - __cil_tmp5;
44035#line 79
44036  return ((struct vmw_dma_buffer *)__cil_tmp7);
44037  }
44038}
44039}
44040#line 82
44041__inline static struct vmw_user_dma_buffer *vmw_user_dma_buffer(struct ttm_buffer_object *bo )  __attribute__((__no_instrument_function__)) ;
44042#line 82 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44043__inline static struct vmw_user_dma_buffer *vmw_user_dma_buffer(struct ttm_buffer_object *bo ) 
44044{ struct vmw_dma_buffer *vmw_bo ;
44045  struct vmw_dma_buffer *tmp___7 ;
44046  struct vmw_dma_buffer    *__mptr ;
44047  struct vmw_user_dma_buffer *__cil_tmp5 ;
44048  unsigned long __cil_tmp6 ;
44049  unsigned long __cil_tmp7 ;
44050  struct vmw_dma_buffer *__cil_tmp8 ;
44051  unsigned int __cil_tmp9 ;
44052  char *__cil_tmp10 ;
44053  char *__cil_tmp11 ;
44054
44055  {
44056  {
44057#line 85
44058  tmp___7 = vmw_dma_buffer(bo);
44059#line 85
44060  vmw_bo = tmp___7;
44061#line 86
44062  __mptr = (struct vmw_dma_buffer    *)vmw_bo;
44063  }
44064  {
44065#line 86
44066  __cil_tmp5 = (struct vmw_user_dma_buffer *)0;
44067#line 86
44068  __cil_tmp6 = (unsigned long )__cil_tmp5;
44069#line 86
44070  __cil_tmp7 = __cil_tmp6 + 64;
44071#line 86
44072  __cil_tmp8 = (struct vmw_dma_buffer *)__cil_tmp7;
44073#line 86
44074  __cil_tmp9 = (unsigned int )__cil_tmp8;
44075#line 86
44076  __cil_tmp10 = (char *)__mptr;
44077#line 86
44078  __cil_tmp11 = __cil_tmp10 - __cil_tmp9;
44079#line 86
44080  return ((struct vmw_user_dma_buffer *)__cil_tmp11);
44081  }
44082}
44083}
44084#line 89 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44085struct vmw_resource *vmw_resource_reference(struct vmw_resource *res ) 
44086{ struct kref *__cil_tmp2 ;
44087
44088  {
44089  {
44090#line 91
44091  __cil_tmp2 = (struct kref *)res;
44092#line 91
44093  kref_get(__cil_tmp2);
44094  }
44095#line 92
44096  return (res);
44097}
44098}
44099#line 103 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44100static void vmw_resource_release_id(struct vmw_resource *res ) 
44101{ struct vmw_private *dev_priv ;
44102  unsigned long __cil_tmp3 ;
44103  unsigned long __cil_tmp4 ;
44104  unsigned long __cil_tmp5 ;
44105  unsigned long __cil_tmp6 ;
44106  rwlock_t *__cil_tmp7 ;
44107  unsigned long __cil_tmp8 ;
44108  unsigned long __cil_tmp9 ;
44109  int __cil_tmp10 ;
44110  unsigned long __cil_tmp11 ;
44111  unsigned long __cil_tmp12 ;
44112  struct idr *__cil_tmp13 ;
44113  unsigned long __cil_tmp14 ;
44114  unsigned long __cil_tmp15 ;
44115  int __cil_tmp16 ;
44116  unsigned long __cil_tmp17 ;
44117  unsigned long __cil_tmp18 ;
44118  unsigned long __cil_tmp19 ;
44119  unsigned long __cil_tmp20 ;
44120  rwlock_t *__cil_tmp21 ;
44121
44122  {
44123  {
44124#line 105
44125  __cil_tmp3 = (unsigned long )res;
44126#line 105
44127  __cil_tmp4 = __cil_tmp3 + 8;
44128#line 105
44129  dev_priv = *((struct vmw_private **)__cil_tmp4);
44130#line 107
44131  __cil_tmp5 = (unsigned long )dev_priv;
44132#line 107
44133  __cil_tmp6 = __cil_tmp5 + 2632;
44134#line 107
44135  __cil_tmp7 = (rwlock_t *)__cil_tmp6;
44136#line 107
44137  _raw_write_lock(__cil_tmp7);
44138  }
44139  {
44140#line 108
44141  __cil_tmp8 = (unsigned long )res;
44142#line 108
44143  __cil_tmp9 = __cil_tmp8 + 24;
44144#line 108
44145  __cil_tmp10 = *((int *)__cil_tmp9);
44146#line 108
44147  if (__cil_tmp10 != -1) {
44148    {
44149#line 109
44150    __cil_tmp11 = (unsigned long )res;
44151#line 109
44152    __cil_tmp12 = __cil_tmp11 + 16;
44153#line 109
44154    __cil_tmp13 = *((struct idr **)__cil_tmp12);
44155#line 109
44156    __cil_tmp14 = (unsigned long )res;
44157#line 109
44158    __cil_tmp15 = __cil_tmp14 + 24;
44159#line 109
44160    __cil_tmp16 = *((int *)__cil_tmp15);
44161#line 109
44162    idr_remove(__cil_tmp13, __cil_tmp16);
44163    }
44164  } else {
44165
44166  }
44167  }
44168  {
44169#line 110
44170  __cil_tmp17 = (unsigned long )res;
44171#line 110
44172  __cil_tmp18 = __cil_tmp17 + 24;
44173#line 110
44174  *((int *)__cil_tmp18) = -1;
44175#line 111
44176  __cil_tmp19 = (unsigned long )dev_priv;
44177#line 111
44178  __cil_tmp20 = __cil_tmp19 + 2632;
44179#line 111
44180  __cil_tmp21 = (rwlock_t *)__cil_tmp20;
44181#line 111
44182  _raw_write_unlock(__cil_tmp21);
44183  }
44184#line 112
44185  return;
44186}
44187}
44188#line 114 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44189static void vmw_resource_release(struct kref *kref ) 
44190{ struct vmw_resource *res ;
44191  struct kref    *__mptr ;
44192  struct vmw_private *dev_priv ;
44193  int id ;
44194  struct idr *idr ;
44195  long tmp___7 ;
44196  struct vmw_resource *__cil_tmp8 ;
44197  struct kref *__cil_tmp9 ;
44198  unsigned int __cil_tmp10 ;
44199  char *__cil_tmp11 ;
44200  char *__cil_tmp12 ;
44201  unsigned long __cil_tmp13 ;
44202  unsigned long __cil_tmp14 ;
44203  unsigned long __cil_tmp15 ;
44204  unsigned long __cil_tmp16 ;
44205  unsigned long __cil_tmp17 ;
44206  unsigned long __cil_tmp18 ;
44207  unsigned long __cil_tmp19 ;
44208  unsigned long __cil_tmp20 ;
44209  void *__cil_tmp21 ;
44210  unsigned long __cil_tmp22 ;
44211  unsigned long __cil_tmp23 ;
44212  unsigned long __cil_tmp24 ;
44213  void (*__cil_tmp25)(struct vmw_resource *res ) ;
44214  unsigned long __cil_tmp26 ;
44215  unsigned long __cil_tmp27 ;
44216  unsigned long __cil_tmp28 ;
44217  void (*__cil_tmp29)(struct vmw_resource *res ) ;
44218  unsigned long __cil_tmp30 ;
44219  unsigned long __cil_tmp31 ;
44220  rwlock_t *__cil_tmp32 ;
44221  void *__cil_tmp33 ;
44222  unsigned long __cil_tmp34 ;
44223  unsigned long __cil_tmp35 ;
44224  unsigned long __cil_tmp36 ;
44225  void (*__cil_tmp37)(struct vmw_resource *res ) ;
44226  unsigned long __cil_tmp38 ;
44227  int __cil_tmp39 ;
44228  int __cil_tmp40 ;
44229  int __cil_tmp41 ;
44230  long __cil_tmp42 ;
44231  unsigned long __cil_tmp43 ;
44232  unsigned long __cil_tmp44 ;
44233  void (*__cil_tmp45)(struct vmw_resource *res ) ;
44234  void *__cil_tmp46 ;
44235  unsigned long __cil_tmp47 ;
44236  unsigned long __cil_tmp48 ;
44237  unsigned long __cil_tmp49 ;
44238  void (*__cil_tmp50)(struct vmw_resource *res ) ;
44239  unsigned long __cil_tmp51 ;
44240  unsigned long __cil_tmp52 ;
44241  unsigned long __cil_tmp53 ;
44242  void (*__cil_tmp54)(struct vmw_resource *res ) ;
44243  void    *__cil_tmp55 ;
44244  unsigned long __cil_tmp56 ;
44245  unsigned long __cil_tmp57 ;
44246  rwlock_t *__cil_tmp58 ;
44247
44248  {
44249#line 117
44250  __mptr = (struct kref    *)kref;
44251#line 117
44252  __cil_tmp8 = (struct vmw_resource *)0;
44253#line 117
44254  __cil_tmp9 = (struct kref *)__cil_tmp8;
44255#line 117
44256  __cil_tmp10 = (unsigned int )__cil_tmp9;
44257#line 117
44258  __cil_tmp11 = (char *)__mptr;
44259#line 117
44260  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
44261#line 117
44262  res = (struct vmw_resource *)__cil_tmp12;
44263#line 118
44264  __cil_tmp13 = (unsigned long )res;
44265#line 118
44266  __cil_tmp14 = __cil_tmp13 + 8;
44267#line 118
44268  dev_priv = *((struct vmw_private **)__cil_tmp14);
44269#line 119
44270  __cil_tmp15 = (unsigned long )res;
44271#line 119
44272  __cil_tmp16 = __cil_tmp15 + 24;
44273#line 119
44274  id = *((int *)__cil_tmp16);
44275#line 120
44276  __cil_tmp17 = (unsigned long )res;
44277#line 120
44278  __cil_tmp18 = __cil_tmp17 + 16;
44279#line 120
44280  idr = *((struct idr **)__cil_tmp18);
44281#line 122
44282  __cil_tmp19 = (unsigned long )res;
44283#line 122
44284  __cil_tmp20 = __cil_tmp19 + 32;
44285#line 122
44286  *((bool *)__cil_tmp20) = (bool )0;
44287  {
44288#line 123
44289  __cil_tmp21 = (void *)0;
44290#line 123
44291  __cil_tmp22 = (unsigned long )__cil_tmp21;
44292#line 123
44293  __cil_tmp23 = (unsigned long )res;
44294#line 123
44295  __cil_tmp24 = __cil_tmp23 + 40;
44296#line 123
44297  __cil_tmp25 = *((void (**)(struct vmw_resource *res ))__cil_tmp24);
44298#line 123
44299  __cil_tmp26 = (unsigned long )__cil_tmp25;
44300#line 123
44301  if (__cil_tmp26 != __cil_tmp22) {
44302    {
44303#line 124
44304    __cil_tmp27 = (unsigned long )res;
44305#line 124
44306    __cil_tmp28 = __cil_tmp27 + 40;
44307#line 124
44308    __cil_tmp29 = *((void (**)(struct vmw_resource *res ))__cil_tmp28);
44309#line 124
44310    (*__cil_tmp29)(res);
44311    }
44312  } else {
44313
44314  }
44315  }
44316  {
44317#line 125
44318  __cil_tmp30 = (unsigned long )dev_priv;
44319#line 125
44320  __cil_tmp31 = __cil_tmp30 + 2632;
44321#line 125
44322  __cil_tmp32 = (rwlock_t *)__cil_tmp31;
44323#line 125
44324  _raw_write_unlock(__cil_tmp32);
44325#line 127
44326  __cil_tmp33 = (void *)0;
44327#line 127
44328  __cil_tmp34 = (unsigned long )__cil_tmp33;
44329#line 127
44330  __cil_tmp35 = (unsigned long )res;
44331#line 127
44332  __cil_tmp36 = __cil_tmp35 + 48;
44333#line 127
44334  __cil_tmp37 = *((void (**)(struct vmw_resource *res ))__cil_tmp36);
44335#line 127
44336  __cil_tmp38 = (unsigned long )__cil_tmp37;
44337#line 127
44338  __cil_tmp39 = __cil_tmp38 != __cil_tmp34;
44339#line 127
44340  __cil_tmp40 = ! __cil_tmp39;
44341#line 127
44342  __cil_tmp41 = ! __cil_tmp40;
44343#line 127
44344  __cil_tmp42 = (long )__cil_tmp41;
44345#line 127
44346  tmp___7 = __builtin_expect(__cil_tmp42, 1L);
44347  }
44348#line 127
44349  if (tmp___7) {
44350    {
44351#line 128
44352    __cil_tmp43 = (unsigned long )res;
44353#line 128
44354    __cil_tmp44 = __cil_tmp43 + 48;
44355#line 128
44356    __cil_tmp45 = *((void (**)(struct vmw_resource *res ))__cil_tmp44);
44357#line 128
44358    (*__cil_tmp45)(res);
44359    }
44360  } else {
44361
44362  }
44363  {
44364#line 130
44365  __cil_tmp46 = (void *)0;
44366#line 130
44367  __cil_tmp47 = (unsigned long )__cil_tmp46;
44368#line 130
44369  __cil_tmp48 = (unsigned long )res;
44370#line 130
44371  __cil_tmp49 = __cil_tmp48 + 56;
44372#line 130
44373  __cil_tmp50 = *((void (**)(struct vmw_resource *res ))__cil_tmp49);
44374#line 130
44375  __cil_tmp51 = (unsigned long )__cil_tmp50;
44376#line 130
44377  if (__cil_tmp51 != __cil_tmp47) {
44378    {
44379#line 131
44380    __cil_tmp52 = (unsigned long )res;
44381#line 131
44382    __cil_tmp53 = __cil_tmp52 + 56;
44383#line 131
44384    __cil_tmp54 = *((void (**)(struct vmw_resource *res ))__cil_tmp53);
44385#line 131
44386    (*__cil_tmp54)(res);
44387    }
44388  } else {
44389    {
44390#line 133
44391    __cil_tmp55 = (void    *)res;
44392#line 133
44393    kfree(__cil_tmp55);
44394    }
44395  }
44396  }
44397  {
44398#line 135
44399  __cil_tmp56 = (unsigned long )dev_priv;
44400#line 135
44401  __cil_tmp57 = __cil_tmp56 + 2632;
44402#line 135
44403  __cil_tmp58 = (rwlock_t *)__cil_tmp57;
44404#line 135
44405  _raw_write_lock(__cil_tmp58);
44406  }
44407#line 137
44408  if (id != -1) {
44409    {
44410#line 138
44411    idr_remove(idr, id);
44412    }
44413  } else {
44414
44415  }
44416#line 139
44417  return;
44418}
44419}
44420#line 141 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44421void vmw_resource_unreference(struct vmw_resource **p_res ) 
44422{ struct vmw_resource *res ;
44423  struct vmw_private *dev_priv ;
44424  unsigned long __cil_tmp4 ;
44425  unsigned long __cil_tmp5 ;
44426  void *__cil_tmp6 ;
44427  unsigned long __cil_tmp7 ;
44428  unsigned long __cil_tmp8 ;
44429  rwlock_t *__cil_tmp9 ;
44430  struct kref *__cil_tmp10 ;
44431  unsigned long __cil_tmp11 ;
44432  unsigned long __cil_tmp12 ;
44433  rwlock_t *__cil_tmp13 ;
44434
44435  {
44436  {
44437#line 143
44438  res = *p_res;
44439#line 144
44440  __cil_tmp4 = (unsigned long )res;
44441#line 144
44442  __cil_tmp5 = __cil_tmp4 + 8;
44443#line 144
44444  dev_priv = *((struct vmw_private **)__cil_tmp5);
44445#line 146
44446  __cil_tmp6 = (void *)0;
44447#line 146
44448  *p_res = (struct vmw_resource *)__cil_tmp6;
44449#line 147
44450  __cil_tmp7 = (unsigned long )dev_priv;
44451#line 147
44452  __cil_tmp8 = __cil_tmp7 + 2632;
44453#line 147
44454  __cil_tmp9 = (rwlock_t *)__cil_tmp8;
44455#line 147
44456  _raw_write_lock(__cil_tmp9);
44457#line 148
44458  __cil_tmp10 = (struct kref *)res;
44459#line 148
44460  kref_put(__cil_tmp10, & vmw_resource_release);
44461#line 149
44462  __cil_tmp11 = (unsigned long )dev_priv;
44463#line 149
44464  __cil_tmp12 = __cil_tmp11 + 2632;
44465#line 149
44466  __cil_tmp13 = (rwlock_t *)__cil_tmp12;
44467#line 149
44468  _raw_write_unlock(__cil_tmp13);
44469  }
44470#line 150
44471  return;
44472}
44473}
44474#line 162 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44475static int vmw_resource_alloc_id(struct vmw_private *dev_priv , struct vmw_resource *res ) 
44476{ int ret ;
44477  long tmp___7 ;
44478  int tmp___8 ;
44479  int tmp___9 ;
44480  long tmp___10 ;
44481  unsigned long __cil_tmp8 ;
44482  unsigned long __cil_tmp9 ;
44483  int __cil_tmp10 ;
44484  int __cil_tmp11 ;
44485  int __cil_tmp12 ;
44486  int __cil_tmp13 ;
44487  long __cil_tmp14 ;
44488  unsigned long __cil_tmp15 ;
44489  unsigned long __cil_tmp16 ;
44490  struct idr *__cil_tmp17 ;
44491  long __cil_tmp18 ;
44492  unsigned long __cil_tmp19 ;
44493  unsigned long __cil_tmp20 ;
44494  rwlock_t *__cil_tmp21 ;
44495  unsigned long __cil_tmp22 ;
44496  unsigned long __cil_tmp23 ;
44497  struct idr *__cil_tmp24 ;
44498  void *__cil_tmp25 ;
44499  unsigned long __cil_tmp26 ;
44500  unsigned long __cil_tmp27 ;
44501  int *__cil_tmp28 ;
44502  unsigned long __cil_tmp29 ;
44503  unsigned long __cil_tmp30 ;
44504  rwlock_t *__cil_tmp31 ;
44505
44506  {
44507  {
44508#line 167
44509  while (1) {
44510    while_continue: /* CIL Label */ ;
44511    {
44512#line 167
44513    __cil_tmp8 = (unsigned long )res;
44514#line 167
44515    __cil_tmp9 = __cil_tmp8 + 24;
44516#line 167
44517    __cil_tmp10 = *((int *)__cil_tmp9);
44518#line 167
44519    __cil_tmp11 = __cil_tmp10 != -1;
44520#line 167
44521    __cil_tmp12 = ! __cil_tmp11;
44522#line 167
44523    __cil_tmp13 = ! __cil_tmp12;
44524#line 167
44525    __cil_tmp14 = (long )__cil_tmp13;
44526#line 167
44527    tmp___7 = __builtin_expect(__cil_tmp14, 0L);
44528    }
44529#line 167
44530    if (tmp___7) {
44531      {
44532#line 167
44533      while (1) {
44534        while_continue___0: /* CIL Label */ ;
44535#line 167
44536        __asm__  volatile   ("1:\tud2\n"
44537                             ".pushsection __bug_table,\"a\"\n"
44538                             "2:\t.long 1b - 2b, %c0 - 2b\n"
44539                             "\t.word %c1, 0\n"
44540                             "\t.org 2b+%c2\n"
44541                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"),
44542                             "i" (167), "i" (12UL));
44543        {
44544#line 167
44545        while (1) {
44546          while_continue___1: /* CIL Label */ ;
44547        }
44548        while_break___1: /* CIL Label */ ;
44549        }
44550#line 167
44551        goto while_break___0;
44552      }
44553      while_break___0: /* CIL Label */ ;
44554      }
44555    } else {
44556
44557    }
44558#line 167
44559    goto while_break;
44560  }
44561  while_break: /* CIL Label */ ;
44562  }
44563  {
44564#line 169
44565  while (1) {
44566    while_continue___2: /* CIL Label */ ;
44567    {
44568#line 170
44569    __cil_tmp15 = (unsigned long )res;
44570#line 170
44571    __cil_tmp16 = __cil_tmp15 + 16;
44572#line 170
44573    __cil_tmp17 = *((struct idr **)__cil_tmp16);
44574#line 170
44575    tmp___8 = idr_pre_get(__cil_tmp17, 208U);
44576    }
44577#line 170
44578    if (tmp___8 == 0) {
44579#line 170
44580      tmp___9 = 1;
44581    } else {
44582#line 170
44583      tmp___9 = 0;
44584    }
44585    {
44586#line 170
44587    __cil_tmp18 = (long )tmp___9;
44588#line 170
44589    tmp___10 = __builtin_expect(__cil_tmp18, 0L);
44590    }
44591#line 170
44592    if (tmp___10) {
44593#line 171
44594      return (-12);
44595    } else {
44596
44597    }
44598    {
44599#line 173
44600    __cil_tmp19 = (unsigned long )dev_priv;
44601#line 173
44602    __cil_tmp20 = __cil_tmp19 + 2632;
44603#line 173
44604    __cil_tmp21 = (rwlock_t *)__cil_tmp20;
44605#line 173
44606    _raw_write_lock(__cil_tmp21);
44607#line 174
44608    __cil_tmp22 = (unsigned long )res;
44609#line 174
44610    __cil_tmp23 = __cil_tmp22 + 16;
44611#line 174
44612    __cil_tmp24 = *((struct idr **)__cil_tmp23);
44613#line 174
44614    __cil_tmp25 = (void *)res;
44615#line 174
44616    __cil_tmp26 = (unsigned long )res;
44617#line 174
44618    __cil_tmp27 = __cil_tmp26 + 24;
44619#line 174
44620    __cil_tmp28 = (int *)__cil_tmp27;
44621#line 174
44622    ret = idr_get_new_above(__cil_tmp24, __cil_tmp25, 1, __cil_tmp28);
44623#line 175
44624    __cil_tmp29 = (unsigned long )dev_priv;
44625#line 175
44626    __cil_tmp30 = __cil_tmp29 + 2632;
44627#line 175
44628    __cil_tmp31 = (rwlock_t *)__cil_tmp30;
44629#line 175
44630    _raw_write_unlock(__cil_tmp31);
44631    }
44632#line 169
44633    if (ret == -11) {
44634
44635    } else {
44636#line 169
44637      goto while_break___2;
44638    }
44639  }
44640  while_break___2: /* CIL Label */ ;
44641  }
44642#line 179
44643  return (ret);
44644}
44645}
44646#line 183 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44647static int vmw_resource_init(struct vmw_private *dev_priv , struct vmw_resource *res ,
44648                             struct idr *idr , enum ttm_object_type obj_type , bool delay_id ,
44649                             void (*res_free)(struct vmw_resource *res ) , void (*remove_from_lists)(struct vmw_resource *res ) ) 
44650{ int tmp___7 ;
44651  struct kref *__cil_tmp9 ;
44652  unsigned long __cil_tmp10 ;
44653  unsigned long __cil_tmp11 ;
44654  void *__cil_tmp12 ;
44655  unsigned long __cil_tmp13 ;
44656  unsigned long __cil_tmp14 ;
44657  unsigned long __cil_tmp15 ;
44658  unsigned long __cil_tmp16 ;
44659  unsigned long __cil_tmp17 ;
44660  unsigned long __cil_tmp18 ;
44661  unsigned long __cil_tmp19 ;
44662  unsigned long __cil_tmp20 ;
44663  unsigned long __cil_tmp21 ;
44664  unsigned long __cil_tmp22 ;
44665  unsigned long __cil_tmp23 ;
44666  unsigned long __cil_tmp24 ;
44667  unsigned long __cil_tmp25 ;
44668  unsigned long __cil_tmp26 ;
44669  struct list_head *__cil_tmp27 ;
44670  unsigned long __cil_tmp28 ;
44671  unsigned long __cil_tmp29 ;
44672  struct list_head *__cil_tmp30 ;
44673  unsigned long __cil_tmp31 ;
44674  unsigned long __cil_tmp32 ;
44675
44676  {
44677  {
44678#line 192
44679  __cil_tmp9 = (struct kref *)res;
44680#line 192
44681  kref_init(__cil_tmp9);
44682#line 193
44683  __cil_tmp10 = (unsigned long )res;
44684#line 193
44685  __cil_tmp11 = __cil_tmp10 + 48;
44686#line 193
44687  __cil_tmp12 = (void *)0;
44688#line 193
44689  *((void (**)(struct vmw_resource *res ))__cil_tmp11) = (void (*)(struct vmw_resource *res ))__cil_tmp12;
44690#line 194
44691  __cil_tmp13 = (unsigned long )res;
44692#line 194
44693  __cil_tmp14 = __cil_tmp13 + 56;
44694#line 194
44695  *((void (**)(struct vmw_resource *res ))__cil_tmp14) = res_free;
44696#line 195
44697  __cil_tmp15 = (unsigned long )res;
44698#line 195
44699  __cil_tmp16 = __cil_tmp15 + 40;
44700#line 195
44701  *((void (**)(struct vmw_resource *res ))__cil_tmp16) = remove_from_lists;
44702#line 196
44703  __cil_tmp17 = (unsigned long )res;
44704#line 196
44705  __cil_tmp18 = __cil_tmp17 + 28;
44706#line 196
44707  *((enum ttm_object_type *)__cil_tmp18) = obj_type;
44708#line 197
44709  __cil_tmp19 = (unsigned long )res;
44710#line 197
44711  __cil_tmp20 = __cil_tmp19 + 16;
44712#line 197
44713  *((struct idr **)__cil_tmp20) = idr;
44714#line 198
44715  __cil_tmp21 = (unsigned long )res;
44716#line 198
44717  __cil_tmp22 = __cil_tmp21 + 32;
44718#line 198
44719  *((bool *)__cil_tmp22) = (bool )0;
44720#line 199
44721  __cil_tmp23 = (unsigned long )res;
44722#line 199
44723  __cil_tmp24 = __cil_tmp23 + 8;
44724#line 199
44725  *((struct vmw_private **)__cil_tmp24) = dev_priv;
44726#line 200
44727  __cil_tmp25 = (unsigned long )res;
44728#line 200
44729  __cil_tmp26 = __cil_tmp25 + 80;
44730#line 200
44731  __cil_tmp27 = (struct list_head *)__cil_tmp26;
44732#line 200
44733  INIT_LIST_HEAD(__cil_tmp27);
44734#line 201
44735  __cil_tmp28 = (unsigned long )res;
44736#line 201
44737  __cil_tmp29 = __cil_tmp28 + 64;
44738#line 201
44739  __cil_tmp30 = (struct list_head *)__cil_tmp29;
44740#line 201
44741  INIT_LIST_HEAD(__cil_tmp30);
44742#line 202
44743  __cil_tmp31 = (unsigned long )res;
44744#line 202
44745  __cil_tmp32 = __cil_tmp31 + 24;
44746#line 202
44747  *((int *)__cil_tmp32) = -1;
44748  }
44749#line 203
44750  if (delay_id) {
44751#line 204
44752    return (0);
44753  } else {
44754    {
44755#line 206
44756    tmp___7 = vmw_resource_alloc_id(dev_priv, res);
44757    }
44758#line 206
44759    return (tmp___7);
44760  }
44761}
44762}
44763#line 222 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44764static void vmw_resource_activate(struct vmw_resource *res , void (*hw_destroy)(struct vmw_resource * ) ) 
44765{ struct vmw_private *dev_priv ;
44766  unsigned long __cil_tmp4 ;
44767  unsigned long __cil_tmp5 ;
44768  unsigned long __cil_tmp6 ;
44769  unsigned long __cil_tmp7 ;
44770  rwlock_t *__cil_tmp8 ;
44771  unsigned long __cil_tmp9 ;
44772  unsigned long __cil_tmp10 ;
44773  unsigned long __cil_tmp11 ;
44774  unsigned long __cil_tmp12 ;
44775  unsigned long __cil_tmp13 ;
44776  unsigned long __cil_tmp14 ;
44777  rwlock_t *__cil_tmp15 ;
44778
44779  {
44780  {
44781#line 225
44782  __cil_tmp4 = (unsigned long )res;
44783#line 225
44784  __cil_tmp5 = __cil_tmp4 + 8;
44785#line 225
44786  dev_priv = *((struct vmw_private **)__cil_tmp5);
44787#line 227
44788  __cil_tmp6 = (unsigned long )dev_priv;
44789#line 227
44790  __cil_tmp7 = __cil_tmp6 + 2632;
44791#line 227
44792  __cil_tmp8 = (rwlock_t *)__cil_tmp7;
44793#line 227
44794  _raw_write_lock(__cil_tmp8);
44795#line 228
44796  __cil_tmp9 = (unsigned long )res;
44797#line 228
44798  __cil_tmp10 = __cil_tmp9 + 32;
44799#line 228
44800  *((bool *)__cil_tmp10) = (bool )1;
44801#line 229
44802  __cil_tmp11 = (unsigned long )res;
44803#line 229
44804  __cil_tmp12 = __cil_tmp11 + 48;
44805#line 229
44806  *((void (**)(struct vmw_resource *res ))__cil_tmp12) = hw_destroy;
44807#line 230
44808  __cil_tmp13 = (unsigned long )dev_priv;
44809#line 230
44810  __cil_tmp14 = __cil_tmp13 + 2632;
44811#line 230
44812  __cil_tmp15 = (rwlock_t *)__cil_tmp14;
44813#line 230
44814  _raw_write_unlock(__cil_tmp15);
44815  }
44816#line 231
44817  return;
44818}
44819}
44820#line 233 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44821struct vmw_resource *vmw_resource_lookup(struct vmw_private *dev_priv , struct idr *idr ,
44822                                         int id ) 
44823{ struct vmw_resource *res ;
44824  void *tmp___7 ;
44825  long tmp___8 ;
44826  unsigned long __cil_tmp7 ;
44827  unsigned long __cil_tmp8 ;
44828  rwlock_t *__cil_tmp9 ;
44829  unsigned long __cil_tmp10 ;
44830  unsigned long __cil_tmp11 ;
44831  struct kref *__cil_tmp12 ;
44832  void *__cil_tmp13 ;
44833  void *__cil_tmp14 ;
44834  unsigned long __cil_tmp15 ;
44835  unsigned long __cil_tmp16 ;
44836  rwlock_t *__cil_tmp17 ;
44837  void *__cil_tmp18 ;
44838  unsigned long __cil_tmp19 ;
44839  unsigned long __cil_tmp20 ;
44840  int __cil_tmp21 ;
44841  int __cil_tmp22 ;
44842  int __cil_tmp23 ;
44843  long __cil_tmp24 ;
44844  void *__cil_tmp25 ;
44845
44846  {
44847  {
44848#line 238
44849  __cil_tmp7 = (unsigned long )dev_priv;
44850#line 238
44851  __cil_tmp8 = __cil_tmp7 + 2632;
44852#line 238
44853  __cil_tmp9 = (rwlock_t *)__cil_tmp8;
44854#line 238
44855  _raw_read_lock(__cil_tmp9);
44856#line 239
44857  tmp___7 = idr_find(idr, id);
44858#line 239
44859  res = (struct vmw_resource *)tmp___7;
44860  }
44861#line 240
44862  if (res) {
44863    {
44864#line 240
44865    __cil_tmp10 = (unsigned long )res;
44866#line 240
44867    __cil_tmp11 = __cil_tmp10 + 32;
44868#line 240
44869    if (*((bool *)__cil_tmp11)) {
44870      {
44871#line 241
44872      __cil_tmp12 = (struct kref *)res;
44873#line 241
44874      kref_get(__cil_tmp12);
44875      }
44876    } else {
44877#line 243
44878      __cil_tmp13 = (void *)0;
44879#line 243
44880      res = (struct vmw_resource *)__cil_tmp13;
44881    }
44882    }
44883  } else {
44884#line 243
44885    __cil_tmp14 = (void *)0;
44886#line 243
44887    res = (struct vmw_resource *)__cil_tmp14;
44888  }
44889  {
44890#line 244
44891  __cil_tmp15 = (unsigned long )dev_priv;
44892#line 244
44893  __cil_tmp16 = __cil_tmp15 + 2632;
44894#line 244
44895  __cil_tmp17 = (rwlock_t *)__cil_tmp16;
44896#line 244
44897  _raw_read_unlock(__cil_tmp17);
44898#line 246
44899  __cil_tmp18 = (void *)0;
44900#line 246
44901  __cil_tmp19 = (unsigned long )__cil_tmp18;
44902#line 246
44903  __cil_tmp20 = (unsigned long )res;
44904#line 246
44905  __cil_tmp21 = __cil_tmp20 == __cil_tmp19;
44906#line 246
44907  __cil_tmp22 = ! __cil_tmp21;
44908#line 246
44909  __cil_tmp23 = ! __cil_tmp22;
44910#line 246
44911  __cil_tmp24 = (long )__cil_tmp23;
44912#line 246
44913  tmp___8 = __builtin_expect(__cil_tmp24, 0L);
44914  }
44915#line 246
44916  if (tmp___8) {
44917    {
44918#line 247
44919    __cil_tmp25 = (void *)0;
44920#line 247
44921    return ((struct vmw_resource *)__cil_tmp25);
44922    }
44923  } else {
44924
44925  }
44926#line 249
44927  return (res);
44928}
44929}
44930#line 256 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
44931static void vmw_hw_context_destroy(struct vmw_resource *res ) 
44932{ struct vmw_private *dev_priv ;
44933  struct __anonstruct_cmd_429___1 *cmd ;
44934  void *tmp___7 ;
44935  long tmp___8 ;
44936  unsigned long __cil_tmp6 ;
44937  unsigned long __cil_tmp7 ;
44938  bool __cil_tmp8 ;
44939  unsigned long __cil_tmp9 ;
44940  unsigned long __cil_tmp10 ;
44941  int __cil_tmp11 ;
44942  uint32_t __cil_tmp12 ;
44943  uint32_t __cil_tmp13 ;
44944  void *__cil_tmp14 ;
44945  unsigned long __cil_tmp15 ;
44946  unsigned long __cil_tmp16 ;
44947  int __cil_tmp17 ;
44948  int __cil_tmp18 ;
44949  int __cil_tmp19 ;
44950  long __cil_tmp20 ;
44951  unsigned long __cil_tmp21 ;
44952  unsigned long __cil_tmp22 ;
44953  unsigned long __cil_tmp23 ;
44954  unsigned long __cil_tmp24 ;
44955  unsigned long __cil_tmp25 ;
44956  unsigned long __cil_tmp26 ;
44957  unsigned long __cil_tmp27 ;
44958  int __cil_tmp28 ;
44959  uint32_t __cil_tmp29 ;
44960  bool __cil_tmp30 ;
44961
44962  {
44963  {
44964#line 259
44965  __cil_tmp6 = (unsigned long )res;
44966#line 259
44967  __cil_tmp7 = __cil_tmp6 + 8;
44968#line 259
44969  dev_priv = *((struct vmw_private **)__cil_tmp7);
44970#line 266
44971  __cil_tmp8 = (bool )1;
44972#line 266
44973  __cil_tmp9 = (unsigned long )res;
44974#line 266
44975  __cil_tmp10 = __cil_tmp9 + 24;
44976#line 266
44977  __cil_tmp11 = *((int *)__cil_tmp10);
44978#line 266
44979  __cil_tmp12 = (uint32_t )__cil_tmp11;
44980#line 266
44981  vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp8, __cil_tmp12);
44982#line 268
44983  __cil_tmp13 = (uint32_t )12UL;
44984#line 268
44985  tmp___7 = vmw_fifo_reserve(dev_priv, __cil_tmp13);
44986#line 268
44987  cmd = (struct __anonstruct_cmd_429___1 *)tmp___7;
44988#line 269
44989  __cil_tmp14 = (void *)0;
44990#line 269
44991  __cil_tmp15 = (unsigned long )__cil_tmp14;
44992#line 269
44993  __cil_tmp16 = (unsigned long )cmd;
44994#line 269
44995  __cil_tmp17 = __cil_tmp16 == __cil_tmp15;
44996#line 269
44997  __cil_tmp18 = ! __cil_tmp17;
44998#line 269
44999  __cil_tmp19 = ! __cil_tmp18;
45000#line 269
45001  __cil_tmp20 = (long )__cil_tmp19;
45002#line 269
45003  tmp___8 = __builtin_expect(__cil_tmp20, 0L);
45004  }
45005#line 269
45006  if (tmp___8) {
45007    {
45008#line 270
45009    drm_err("vmw_hw_context_destroy", "Failed reserving FIFO space for surface destruction.\n");
45010    }
45011#line 272
45012    return;
45013  } else {
45014
45015  }
45016  {
45017#line 275
45018  *((uint32 *)cmd) = (__u32 )1046;
45019#line 276
45020  __cil_tmp21 = 0 + 4;
45021#line 276
45022  __cil_tmp22 = (unsigned long )cmd;
45023#line 276
45024  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
45025#line 276
45026  *((uint32 *)__cil_tmp23) = (__u32 )4UL;
45027#line 277
45028  __cil_tmp24 = (unsigned long )cmd;
45029#line 277
45030  __cil_tmp25 = __cil_tmp24 + 8;
45031#line 277
45032  __cil_tmp26 = (unsigned long )res;
45033#line 277
45034  __cil_tmp27 = __cil_tmp26 + 24;
45035#line 277
45036  __cil_tmp28 = *((int *)__cil_tmp27);
45037#line 277
45038  *((uint32 *)__cil_tmp25) = (__u32 )__cil_tmp28;
45039#line 279
45040  __cil_tmp29 = (uint32_t )12UL;
45041#line 279
45042  vmw_fifo_commit(dev_priv, __cil_tmp29);
45043#line 280
45044  __cil_tmp30 = (bool )0;
45045#line 280
45046  vmw_3d_resource_dec(dev_priv, __cil_tmp30);
45047  }
45048#line 281
45049  return;
45050}
45051}
45052#line 283 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45053static int vmw_context_init(struct vmw_private *dev_priv , struct vmw_resource *res ,
45054                            void (*res_free)(struct vmw_resource *res ) ) 
45055{ int ret ;
45056  struct __anonstruct_cmd_430___1 *cmd ;
45057  long tmp___7 ;
45058  long tmp___8 ;
45059  void *tmp___9 ;
45060  long tmp___10 ;
45061  struct vmw_resource **__cil_tmp10 ;
45062  struct vmw_resource *__cil_tmp11 ;
45063  unsigned long __cil_tmp12 ;
45064  unsigned long __cil_tmp13 ;
45065  struct idr *__cil_tmp14 ;
45066  enum ttm_object_type __cil_tmp15 ;
45067  bool __cil_tmp16 ;
45068  void *__cil_tmp17 ;
45069  void (*__cil_tmp18)(struct vmw_resource *res ) ;
45070  int __cil_tmp19 ;
45071  int __cil_tmp20 ;
45072  int __cil_tmp21 ;
45073  long __cil_tmp22 ;
45074  struct vmw_resource **__cil_tmp23 ;
45075  struct vmw_resource *__cil_tmp24 ;
45076  unsigned long __cil_tmp25 ;
45077  unsigned long __cil_tmp26 ;
45078  int __cil_tmp27 ;
45079  int __cil_tmp28 ;
45080  int __cil_tmp29 ;
45081  int __cil_tmp30 ;
45082  long __cil_tmp31 ;
45083  uint32_t __cil_tmp32 ;
45084  void *__cil_tmp33 ;
45085  unsigned long __cil_tmp34 ;
45086  unsigned long __cil_tmp35 ;
45087  int __cil_tmp36 ;
45088  int __cil_tmp37 ;
45089  int __cil_tmp38 ;
45090  long __cil_tmp39 ;
45091  unsigned long __cil_tmp40 ;
45092  unsigned long __cil_tmp41 ;
45093  unsigned long __cil_tmp42 ;
45094  unsigned long __cil_tmp43 ;
45095  unsigned long __cil_tmp44 ;
45096  struct vmw_resource **__cil_tmp45 ;
45097  struct vmw_resource *__cil_tmp46 ;
45098  unsigned long __cil_tmp47 ;
45099  unsigned long __cil_tmp48 ;
45100  int __cil_tmp49 ;
45101  uint32_t __cil_tmp50 ;
45102  bool __cil_tmp51 ;
45103  struct vmw_resource **__cil_tmp52 ;
45104  struct vmw_resource *__cil_tmp53 ;
45105  void *__cil_tmp54 ;
45106  unsigned long __cil_tmp55 ;
45107  unsigned long __cil_tmp56 ;
45108  struct vmw_resource **__cil_tmp57 ;
45109  struct vmw_resource *__cil_tmp58 ;
45110  void    *__cil_tmp59 ;
45111  struct vmw_resource **__cil_tmp60 ;
45112  struct vmw_resource *__cil_tmp61 ;
45113
45114  {
45115  {
45116#line 294
45117  __cil_tmp10 = & res;
45118#line 294
45119  __cil_tmp11 = *__cil_tmp10;
45120#line 294
45121  __cil_tmp12 = (unsigned long )dev_priv;
45122#line 294
45123  __cil_tmp13 = __cil_tmp12 + 2656;
45124#line 294
45125  __cil_tmp14 = (struct idr *)__cil_tmp13;
45126#line 294
45127  __cil_tmp15 = (enum ttm_object_type )256;
45128#line 294
45129  __cil_tmp16 = (bool )0;
45130#line 294
45131  __cil_tmp17 = (void *)0;
45132#line 294
45133  __cil_tmp18 = (void (*)(struct vmw_resource *res ))__cil_tmp17;
45134#line 294
45135  ret = vmw_resource_init(dev_priv, __cil_tmp11, __cil_tmp14, __cil_tmp15, __cil_tmp16,
45136                          res_free, __cil_tmp18);
45137#line 297
45138  __cil_tmp19 = ret != 0;
45139#line 297
45140  __cil_tmp20 = ! __cil_tmp19;
45141#line 297
45142  __cil_tmp21 = ! __cil_tmp20;
45143#line 297
45144  __cil_tmp22 = (long )__cil_tmp21;
45145#line 297
45146  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
45147  }
45148#line 297
45149  if (tmp___7) {
45150    {
45151#line 298
45152    drm_err("vmw_context_init", "Failed to allocate a resource id.\n");
45153    }
45154#line 299
45155    goto out_early;
45156  } else {
45157
45158  }
45159  {
45160#line 302
45161  __cil_tmp23 = & res;
45162#line 302
45163  __cil_tmp24 = *__cil_tmp23;
45164#line 302
45165  __cil_tmp25 = (unsigned long )__cil_tmp24;
45166#line 302
45167  __cil_tmp26 = __cil_tmp25 + 24;
45168#line 302
45169  __cil_tmp27 = *((int *)__cil_tmp26);
45170#line 302
45171  __cil_tmp28 = __cil_tmp27 >= 256;
45172#line 302
45173  __cil_tmp29 = ! __cil_tmp28;
45174#line 302
45175  __cil_tmp30 = ! __cil_tmp29;
45176#line 302
45177  __cil_tmp31 = (long )__cil_tmp30;
45178#line 302
45179  tmp___8 = __builtin_expect(__cil_tmp31, 0L);
45180  }
45181#line 302
45182  if (tmp___8) {
45183    {
45184#line 303
45185    drm_err("vmw_context_init", "Out of hw context ids.\n");
45186#line 304
45187    vmw_resource_unreference(& res);
45188    }
45189#line 305
45190    return (-12);
45191  } else {
45192
45193  }
45194  {
45195#line 308
45196  __cil_tmp32 = (uint32_t )12UL;
45197#line 308
45198  tmp___9 = vmw_fifo_reserve(dev_priv, __cil_tmp32);
45199#line 308
45200  cmd = (struct __anonstruct_cmd_430___1 *)tmp___9;
45201#line 309
45202  __cil_tmp33 = (void *)0;
45203#line 309
45204  __cil_tmp34 = (unsigned long )__cil_tmp33;
45205#line 309
45206  __cil_tmp35 = (unsigned long )cmd;
45207#line 309
45208  __cil_tmp36 = __cil_tmp35 == __cil_tmp34;
45209#line 309
45210  __cil_tmp37 = ! __cil_tmp36;
45211#line 309
45212  __cil_tmp38 = ! __cil_tmp37;
45213#line 309
45214  __cil_tmp39 = (long )__cil_tmp38;
45215#line 309
45216  tmp___10 = __builtin_expect(__cil_tmp39, 0L);
45217  }
45218#line 309
45219  if (tmp___10) {
45220    {
45221#line 310
45222    drm_err("vmw_context_init", "Fifo reserve failed.\n");
45223#line 311
45224    vmw_resource_unreference(& res);
45225    }
45226#line 312
45227    return (-12);
45228  } else {
45229
45230  }
45231  {
45232#line 315
45233  *((uint32 *)cmd) = (__u32 )1045;
45234#line 316
45235  __cil_tmp40 = 0 + 4;
45236#line 316
45237  __cil_tmp41 = (unsigned long )cmd;
45238#line 316
45239  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
45240#line 316
45241  *((uint32 *)__cil_tmp42) = (__u32 )4UL;
45242#line 317
45243  __cil_tmp43 = (unsigned long )cmd;
45244#line 317
45245  __cil_tmp44 = __cil_tmp43 + 8;
45246#line 317
45247  __cil_tmp45 = & res;
45248#line 317
45249  __cil_tmp46 = *__cil_tmp45;
45250#line 317
45251  __cil_tmp47 = (unsigned long )__cil_tmp46;
45252#line 317
45253  __cil_tmp48 = __cil_tmp47 + 24;
45254#line 317
45255  __cil_tmp49 = *((int *)__cil_tmp48);
45256#line 317
45257  *((uint32 *)__cil_tmp44) = (__u32 )__cil_tmp49;
45258#line 319
45259  __cil_tmp50 = (uint32_t )12UL;
45260#line 319
45261  vmw_fifo_commit(dev_priv, __cil_tmp50);
45262#line 320
45263  __cil_tmp51 = (bool )0;
45264#line 320
45265  vmw_3d_resource_inc(dev_priv, __cil_tmp51);
45266#line 321
45267  __cil_tmp52 = & res;
45268#line 321
45269  __cil_tmp53 = *__cil_tmp52;
45270#line 321
45271  vmw_resource_activate(__cil_tmp53, & vmw_hw_context_destroy);
45272  }
45273#line 322
45274  return (0);
45275  out_early: 
45276  {
45277#line 325
45278  __cil_tmp54 = (void *)0;
45279#line 325
45280  __cil_tmp55 = (unsigned long )__cil_tmp54;
45281#line 325
45282  __cil_tmp56 = (unsigned long )res_free;
45283#line 325
45284  if (__cil_tmp56 == __cil_tmp55) {
45285    {
45286#line 326
45287    __cil_tmp57 = & res;
45288#line 326
45289    __cil_tmp58 = *__cil_tmp57;
45290#line 326
45291    __cil_tmp59 = (void    *)__cil_tmp58;
45292#line 326
45293    kfree(__cil_tmp59);
45294    }
45295  } else {
45296    {
45297#line 328
45298    __cil_tmp60 = & res;
45299#line 328
45300    __cil_tmp61 = *__cil_tmp60;
45301#line 328
45302    (*res_free)(__cil_tmp61);
45303    }
45304  }
45305  }
45306#line 329
45307  return (ret);
45308}
45309}
45310#line 332 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45311struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv ) 
45312{ struct vmw_resource *res ;
45313  void *tmp___7 ;
45314  int ret ;
45315  long tmp___8 ;
45316  struct vmw_resource *tmp___9 ;
45317  void *__cil_tmp7 ;
45318  unsigned long __cil_tmp8 ;
45319  unsigned long __cil_tmp9 ;
45320  int __cil_tmp10 ;
45321  int __cil_tmp11 ;
45322  int __cil_tmp12 ;
45323  long __cil_tmp13 ;
45324  void *__cil_tmp14 ;
45325  void *__cil_tmp15 ;
45326  void (*__cil_tmp16)(struct vmw_resource *res ) ;
45327  void *__cil_tmp17 ;
45328
45329  {
45330  {
45331#line 334
45332  tmp___7 = kmalloc(96UL, 208U);
45333#line 334
45334  res = (struct vmw_resource *)tmp___7;
45335#line 337
45336  __cil_tmp7 = (void *)0;
45337#line 337
45338  __cil_tmp8 = (unsigned long )__cil_tmp7;
45339#line 337
45340  __cil_tmp9 = (unsigned long )res;
45341#line 337
45342  __cil_tmp10 = __cil_tmp9 == __cil_tmp8;
45343#line 337
45344  __cil_tmp11 = ! __cil_tmp10;
45345#line 337
45346  __cil_tmp12 = ! __cil_tmp11;
45347#line 337
45348  __cil_tmp13 = (long )__cil_tmp12;
45349#line 337
45350  tmp___8 = __builtin_expect(__cil_tmp13, 0L);
45351  }
45352#line 337
45353  if (tmp___8) {
45354    {
45355#line 338
45356    __cil_tmp14 = (void *)0;
45357#line 338
45358    return ((struct vmw_resource *)__cil_tmp14);
45359    }
45360  } else {
45361
45362  }
45363  {
45364#line 340
45365  __cil_tmp15 = (void *)0;
45366#line 340
45367  __cil_tmp16 = (void (*)(struct vmw_resource *res ))__cil_tmp15;
45368#line 340
45369  ret = vmw_context_init(dev_priv, res, __cil_tmp16);
45370  }
45371#line 341
45372  if (ret == 0) {
45373#line 341
45374    tmp___9 = res;
45375  } else {
45376#line 341
45377    __cil_tmp17 = (void *)0;
45378#line 341
45379    tmp___9 = (struct vmw_resource *)__cil_tmp17;
45380  }
45381#line 341
45382  return (tmp___9);
45383}
45384}
45385#line 348 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45386static void vmw_user_context_free(struct vmw_resource *res ) 
45387{ struct vmw_user_context *ctx ;
45388  struct vmw_resource    *__mptr ;
45389  struct vmw_private *dev_priv ;
45390  struct ttm_mem_global *tmp___7 ;
45391  struct vmw_user_context *__cil_tmp6 ;
45392  unsigned long __cil_tmp7 ;
45393  unsigned long __cil_tmp8 ;
45394  struct vmw_resource *__cil_tmp9 ;
45395  unsigned int __cil_tmp10 ;
45396  char *__cil_tmp11 ;
45397  char *__cil_tmp12 ;
45398  unsigned long __cil_tmp13 ;
45399  unsigned long __cil_tmp14 ;
45400  void    *__cil_tmp15 ;
45401
45402  {
45403  {
45404#line 351
45405  __mptr = (struct vmw_resource    *)res;
45406#line 351
45407  __cil_tmp6 = (struct vmw_user_context *)0;
45408#line 351
45409  __cil_tmp7 = (unsigned long )__cil_tmp6;
45410#line 351
45411  __cil_tmp8 = __cil_tmp7 + 64;
45412#line 351
45413  __cil_tmp9 = (struct vmw_resource *)__cil_tmp8;
45414#line 351
45415  __cil_tmp10 = (unsigned int )__cil_tmp9;
45416#line 351
45417  __cil_tmp11 = (char *)__mptr;
45418#line 351
45419  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
45420#line 351
45421  ctx = (struct vmw_user_context *)__cil_tmp12;
45422#line 352
45423  __cil_tmp13 = (unsigned long )res;
45424#line 352
45425  __cil_tmp14 = __cil_tmp13 + 8;
45426#line 352
45427  dev_priv = *((struct vmw_private **)__cil_tmp14);
45428#line 354
45429  __cil_tmp15 = (void    *)ctx;
45430#line 354
45431  kfree(__cil_tmp15);
45432#line 355
45433  tmp___7 = vmw_mem_glob(dev_priv);
45434#line 355
45435  ttm_mem_global_free(tmp___7, vmw_user_context_size);
45436  }
45437#line 357
45438  return;
45439}
45440}
45441#line 364 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45442static void vmw_user_context_base_release(struct ttm_base_object **p_base ) 
45443{ struct ttm_base_object *base ;
45444  struct vmw_user_context *ctx ;
45445  struct ttm_base_object    *__mptr ;
45446  struct vmw_resource *res ;
45447  struct vmw_user_context *__cil_tmp6 ;
45448  struct ttm_base_object *__cil_tmp7 ;
45449  unsigned int __cil_tmp8 ;
45450  char *__cil_tmp9 ;
45451  char *__cil_tmp10 ;
45452  struct vmw_resource **__cil_tmp11 ;
45453  unsigned long __cil_tmp12 ;
45454  unsigned long __cil_tmp13 ;
45455  void *__cil_tmp14 ;
45456
45457  {
45458  {
45459#line 366
45460  base = *p_base;
45461#line 368
45462  __mptr = (struct ttm_base_object    *)base;
45463#line 368
45464  __cil_tmp6 = (struct vmw_user_context *)0;
45465#line 368
45466  __cil_tmp7 = (struct ttm_base_object *)__cil_tmp6;
45467#line 368
45468  __cil_tmp8 = (unsigned int )__cil_tmp7;
45469#line 368
45470  __cil_tmp9 = (char *)__mptr;
45471#line 368
45472  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
45473#line 368
45474  ctx = (struct vmw_user_context *)__cil_tmp10;
45475#line 369
45476  __cil_tmp11 = & res;
45477#line 369
45478  __cil_tmp12 = (unsigned long )ctx;
45479#line 369
45480  __cil_tmp13 = __cil_tmp12 + 64;
45481#line 369
45482  *__cil_tmp11 = (struct vmw_resource *)__cil_tmp13;
45483#line 371
45484  __cil_tmp14 = (void *)0;
45485#line 371
45486  *p_base = (struct ttm_base_object *)__cil_tmp14;
45487#line 372
45488  vmw_resource_unreference(& res);
45489  }
45490#line 373
45491  return;
45492}
45493}
45494#line 375 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45495int vmw_context_destroy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
45496{ struct vmw_private *dev_priv ;
45497  struct vmw_private *tmp___7 ;
45498  struct vmw_resource *res ;
45499  struct vmw_user_context *ctx ;
45500  struct drm_vmw_context_arg *arg ;
45501  struct ttm_object_file *tfile ;
45502  struct vmw_fpriv *tmp___8 ;
45503  int ret ;
45504  long tmp___9 ;
45505  struct vmw_resource    *__mptr ;
45506  unsigned long __cil_tmp14 ;
45507  unsigned long __cil_tmp15 ;
45508  struct vmw_resource **__cil_tmp16 ;
45509  unsigned long __cil_tmp17 ;
45510  unsigned long __cil_tmp18 ;
45511  struct idr *__cil_tmp19 ;
45512  int32_t __cil_tmp20 ;
45513  void *__cil_tmp21 ;
45514  unsigned long __cil_tmp22 ;
45515  struct vmw_resource **__cil_tmp23 ;
45516  struct vmw_resource *__cil_tmp24 ;
45517  unsigned long __cil_tmp25 ;
45518  int __cil_tmp26 ;
45519  int __cil_tmp27 ;
45520  int __cil_tmp28 ;
45521  long __cil_tmp29 ;
45522  unsigned long __cil_tmp30 ;
45523  struct vmw_resource **__cil_tmp31 ;
45524  struct vmw_resource *__cil_tmp32 ;
45525  unsigned long __cil_tmp33 ;
45526  unsigned long __cil_tmp34 ;
45527  void (*__cil_tmp35)(struct vmw_resource *res ) ;
45528  unsigned long __cil_tmp36 ;
45529  struct vmw_resource **__cil_tmp37 ;
45530  struct vmw_resource *__cil_tmp38 ;
45531  struct vmw_user_context *__cil_tmp39 ;
45532  unsigned long __cil_tmp40 ;
45533  unsigned long __cil_tmp41 ;
45534  struct vmw_resource *__cil_tmp42 ;
45535  unsigned int __cil_tmp43 ;
45536  char *__cil_tmp44 ;
45537  char *__cil_tmp45 ;
45538  unsigned long __cil_tmp46 ;
45539  unsigned long __cil_tmp47 ;
45540  unsigned long __cil_tmp48 ;
45541  unsigned long __cil_tmp49 ;
45542  struct ttm_object_file *__cil_tmp50 ;
45543  unsigned long __cil_tmp51 ;
45544  unsigned long __cil_tmp52 ;
45545  unsigned long __cil_tmp53 ;
45546  unsigned long __cil_tmp54 ;
45547  bool __cil_tmp55 ;
45548  unsigned long __cil_tmp56 ;
45549  unsigned long __cil_tmp57 ;
45550  unsigned long __cil_tmp58 ;
45551  unsigned long __cil_tmp59 ;
45552  unsigned long __cil_tmp60 ;
45553  enum ttm_ref_type __cil_tmp61 ;
45554
45555  {
45556  {
45557#line 378
45558  tmp___7 = vmw_priv(dev);
45559#line 378
45560  dev_priv = tmp___7;
45561#line 381
45562  arg = (struct drm_vmw_context_arg *)data;
45563#line 382
45564  tmp___8 = vmw_fpriv(file_priv);
45565#line 382
45566  __cil_tmp14 = (unsigned long )tmp___8;
45567#line 382
45568  __cil_tmp15 = __cil_tmp14 + 8;
45569#line 382
45570  tfile = *((struct ttm_object_file **)__cil_tmp15);
45571#line 383
45572  ret = 0;
45573#line 385
45574  __cil_tmp16 = & res;
45575#line 385
45576  __cil_tmp17 = (unsigned long )dev_priv;
45577#line 385
45578  __cil_tmp18 = __cil_tmp17 + 2656;
45579#line 385
45580  __cil_tmp19 = (struct idr *)__cil_tmp18;
45581#line 385
45582  __cil_tmp20 = *((int32_t *)arg);
45583#line 385
45584  *__cil_tmp16 = vmw_resource_lookup(dev_priv, __cil_tmp19, __cil_tmp20);
45585#line 386
45586  __cil_tmp21 = (void *)0;
45587#line 386
45588  __cil_tmp22 = (unsigned long )__cil_tmp21;
45589#line 386
45590  __cil_tmp23 = & res;
45591#line 386
45592  __cil_tmp24 = *__cil_tmp23;
45593#line 386
45594  __cil_tmp25 = (unsigned long )__cil_tmp24;
45595#line 386
45596  __cil_tmp26 = __cil_tmp25 == __cil_tmp22;
45597#line 386
45598  __cil_tmp27 = ! __cil_tmp26;
45599#line 386
45600  __cil_tmp28 = ! __cil_tmp27;
45601#line 386
45602  __cil_tmp29 = (long )__cil_tmp28;
45603#line 386
45604  tmp___9 = __builtin_expect(__cil_tmp29, 0L);
45605  }
45606#line 386
45607  if (tmp___9) {
45608#line 387
45609    return (-22);
45610  } else {
45611
45612  }
45613  {
45614#line 389
45615  __cil_tmp30 = (unsigned long )(& vmw_user_context_free);
45616#line 389
45617  __cil_tmp31 = & res;
45618#line 389
45619  __cil_tmp32 = *__cil_tmp31;
45620#line 389
45621  __cil_tmp33 = (unsigned long )__cil_tmp32;
45622#line 389
45623  __cil_tmp34 = __cil_tmp33 + 56;
45624#line 389
45625  __cil_tmp35 = *((void (**)(struct vmw_resource *res ))__cil_tmp34);
45626#line 389
45627  __cil_tmp36 = (unsigned long )__cil_tmp35;
45628#line 389
45629  if (__cil_tmp36 != __cil_tmp30) {
45630#line 390
45631    ret = -22;
45632#line 391
45633    goto out;
45634  } else {
45635
45636  }
45637  }
45638#line 394
45639  __cil_tmp37 = & res;
45640#line 394
45641  __cil_tmp38 = *__cil_tmp37;
45642#line 394
45643  __mptr = (struct vmw_resource    *)__cil_tmp38;
45644#line 394
45645  __cil_tmp39 = (struct vmw_user_context *)0;
45646#line 394
45647  __cil_tmp40 = (unsigned long )__cil_tmp39;
45648#line 394
45649  __cil_tmp41 = __cil_tmp40 + 64;
45650#line 394
45651  __cil_tmp42 = (struct vmw_resource *)__cil_tmp41;
45652#line 394
45653  __cil_tmp43 = (unsigned int )__cil_tmp42;
45654#line 394
45655  __cil_tmp44 = (char *)__mptr;
45656#line 394
45657  __cil_tmp45 = __cil_tmp44 - __cil_tmp43;
45658#line 394
45659  ctx = (struct vmw_user_context *)__cil_tmp45;
45660  {
45661#line 395
45662  __cil_tmp46 = (unsigned long )tfile;
45663#line 395
45664  __cil_tmp47 = 0 + 32;
45665#line 395
45666  __cil_tmp48 = (unsigned long )ctx;
45667#line 395
45668  __cil_tmp49 = __cil_tmp48 + __cil_tmp47;
45669#line 395
45670  __cil_tmp50 = *((struct ttm_object_file **)__cil_tmp49);
45671#line 395
45672  __cil_tmp51 = (unsigned long )__cil_tmp50;
45673#line 395
45674  if (__cil_tmp51 != __cil_tmp46) {
45675    {
45676#line 395
45677    __cil_tmp52 = 0 + 28;
45678#line 395
45679    __cil_tmp53 = (unsigned long )ctx;
45680#line 395
45681    __cil_tmp54 = __cil_tmp53 + __cil_tmp52;
45682#line 395
45683    __cil_tmp55 = *((bool *)__cil_tmp54);
45684#line 395
45685    if (! __cil_tmp55) {
45686#line 396
45687      ret = -1;
45688#line 397
45689      goto out;
45690    } else {
45691
45692    }
45693    }
45694  } else {
45695
45696  }
45697  }
45698  {
45699#line 400
45700  __cil_tmp56 = 0 + 16;
45701#line 400
45702  __cil_tmp57 = 0 + __cil_tmp56;
45703#line 400
45704  __cil_tmp58 = (unsigned long )ctx;
45705#line 400
45706  __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
45707#line 400
45708  __cil_tmp60 = *((unsigned long *)__cil_tmp59);
45709#line 400
45710  __cil_tmp61 = (enum ttm_ref_type )0;
45711#line 400
45712  ttm_ref_object_base_unref(tfile, __cil_tmp60, __cil_tmp61);
45713  }
45714  out: 
45715  {
45716#line 402
45717  vmw_resource_unreference(& res);
45718  }
45719#line 403
45720  return (ret);
45721}
45722}
45723#line 406 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
45724int vmw_context_define_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
45725{ struct vmw_private *dev_priv ;
45726  struct vmw_private *tmp___7 ;
45727  struct vmw_user_context *ctx ;
45728  struct vmw_resource *res ;
45729  struct vmw_resource *tmp___8 ;
45730  struct drm_vmw_context_arg *arg ;
45731  struct ttm_object_file *tfile ;
45732  struct vmw_fpriv *tmp___9 ;
45733  struct vmw_master *vmaster ;
45734  struct vmw_master *tmp___10 ;
45735  int ret ;
45736  size_t tmp___11 ;
45737  long tmp___12 ;
45738  long tmp___13 ;
45739  struct ttm_mem_global *tmp___14 ;
45740  long tmp___15 ;
45741  void *tmp___16 ;
45742  struct ttm_mem_global *tmp___17 ;
45743  long tmp___18 ;
45744  long tmp___19 ;
45745  long tmp___20 ;
45746  unsigned long __cil_tmp25 ;
45747  unsigned long __cil_tmp26 ;
45748  unsigned long __cil_tmp27 ;
45749  unsigned long __cil_tmp28 ;
45750  struct drm_master *__cil_tmp29 ;
45751  int __cil_tmp30 ;
45752  int __cil_tmp31 ;
45753  int __cil_tmp32 ;
45754  long __cil_tmp33 ;
45755  size_t __cil_tmp34 ;
45756  struct ttm_lock *__cil_tmp35 ;
45757  bool __cil_tmp36 ;
45758  int __cil_tmp37 ;
45759  int __cil_tmp38 ;
45760  int __cil_tmp39 ;
45761  long __cil_tmp40 ;
45762  bool __cil_tmp41 ;
45763  bool __cil_tmp42 ;
45764  int __cil_tmp43 ;
45765  int __cil_tmp44 ;
45766  int __cil_tmp45 ;
45767  long __cil_tmp46 ;
45768  void *__cil_tmp47 ;
45769  unsigned long __cil_tmp48 ;
45770  unsigned long __cil_tmp49 ;
45771  int __cil_tmp50 ;
45772  int __cil_tmp51 ;
45773  int __cil_tmp52 ;
45774  long __cil_tmp53 ;
45775  struct vmw_resource **__cil_tmp54 ;
45776  unsigned long __cil_tmp55 ;
45777  unsigned long __cil_tmp56 ;
45778  unsigned long __cil_tmp57 ;
45779  unsigned long __cil_tmp58 ;
45780  unsigned long __cil_tmp59 ;
45781  unsigned long __cil_tmp60 ;
45782  unsigned long __cil_tmp61 ;
45783  unsigned long __cil_tmp62 ;
45784  void *__cil_tmp63 ;
45785  struct vmw_resource **__cil_tmp64 ;
45786  struct vmw_resource *__cil_tmp65 ;
45787  int __cil_tmp66 ;
45788  int __cil_tmp67 ;
45789  int __cil_tmp68 ;
45790  long __cil_tmp69 ;
45791  struct vmw_resource **__cil_tmp70 ;
45792  unsigned long __cil_tmp71 ;
45793  unsigned long __cil_tmp72 ;
45794  struct vmw_resource *__cil_tmp73 ;
45795  struct ttm_base_object *__cil_tmp74 ;
45796  bool __cil_tmp75 ;
45797  enum ttm_object_type __cil_tmp76 ;
45798  void *__cil_tmp77 ;
45799  void (*__cil_tmp78)(struct ttm_base_object * , enum ttm_ref_type ref_type ) ;
45800  int __cil_tmp79 ;
45801  int __cil_tmp80 ;
45802  int __cil_tmp81 ;
45803  long __cil_tmp82 ;
45804  struct vmw_resource **__cil_tmp83 ;
45805  struct vmw_resource *__cil_tmp84 ;
45806  unsigned long __cil_tmp85 ;
45807  unsigned long __cil_tmp86 ;
45808  struct ttm_lock *__cil_tmp87 ;
45809
45810  {
45811  {
45812#line 409
45813  tmp___7 = vmw_priv(dev);
45814#line 409
45815  dev_priv = tmp___7;
45816#line 413
45817  arg = (struct drm_vmw_context_arg *)data;
45818#line 414
45819  tmp___9 = vmw_fpriv(file_priv);
45820#line 414
45821  __cil_tmp25 = (unsigned long )tmp___9;
45822#line 414
45823  __cil_tmp26 = __cil_tmp25 + 8;
45824#line 414
45825  tfile = *((struct ttm_object_file **)__cil_tmp26);
45826#line 415
45827  __cil_tmp27 = (unsigned long )file_priv;
45828#line 415
45829  __cil_tmp28 = __cil_tmp27 + 152;
45830#line 415
45831  __cil_tmp29 = *((struct drm_master **)__cil_tmp28);
45832#line 415
45833  tmp___10 = vmw_master(__cil_tmp29);
45834#line 415
45835  vmaster = tmp___10;
45836#line 424
45837  __cil_tmp30 = vmw_user_context_size == 0ULL;
45838#line 424
45839  __cil_tmp31 = ! __cil_tmp30;
45840#line 424
45841  __cil_tmp32 = ! __cil_tmp31;
45842#line 424
45843  __cil_tmp33 = (long )__cil_tmp32;
45844#line 424
45845  tmp___12 = __builtin_expect(__cil_tmp33, 0L);
45846  }
45847#line 424
45848  if (tmp___12) {
45849    {
45850#line 425
45851    tmp___11 = ttm_round_pot(160UL);
45852#line 425
45853    __cil_tmp34 = tmp___11 + 128UL;
45854#line 425
45855    vmw_user_context_size = (uint64_t )__cil_tmp34;
45856    }
45857  } else {
45858
45859  }
45860  {
45861#line 427
45862  __cil_tmp35 = (struct ttm_lock *)vmaster;
45863#line 427
45864  __cil_tmp36 = (bool )1;
45865#line 427
45866  ret = ttm_read_lock(__cil_tmp35, __cil_tmp36);
45867#line 428
45868  __cil_tmp37 = ret != 0;
45869#line 428
45870  __cil_tmp38 = ! __cil_tmp37;
45871#line 428
45872  __cil_tmp39 = ! __cil_tmp38;
45873#line 428
45874  __cil_tmp40 = (long )__cil_tmp39;
45875#line 428
45876  tmp___13 = __builtin_expect(__cil_tmp40, 0L);
45877  }
45878#line 428
45879  if (tmp___13) {
45880#line 429
45881    return (ret);
45882  } else {
45883
45884  }
45885  {
45886#line 431
45887  tmp___14 = vmw_mem_glob(dev_priv);
45888#line 431
45889  __cil_tmp41 = (bool )0;
45890#line 431
45891  __cil_tmp42 = (bool )1;
45892#line 431
45893  ret = ttm_mem_global_alloc(tmp___14, vmw_user_context_size, __cil_tmp41, __cil_tmp42);
45894#line 434
45895  __cil_tmp43 = ret != 0;
45896#line 434
45897  __cil_tmp44 = ! __cil_tmp43;
45898#line 434
45899  __cil_tmp45 = ! __cil_tmp44;
45900#line 434
45901  __cil_tmp46 = (long )__cil_tmp45;
45902#line 434
45903  tmp___15 = __builtin_expect(__cil_tmp46, 0L);
45904  }
45905#line 434
45906  if (tmp___15) {
45907#line 435
45908    if (ret != -512) {
45909      {
45910#line 436
45911      drm_err("vmw_context_define_ioctl", "Out of graphics memory for context creation.\n");
45912      }
45913    } else {
45914
45915    }
45916#line 438
45917    goto out_unlock;
45918  } else {
45919
45920  }
45921  {
45922#line 441
45923  tmp___16 = kmalloc(160UL, 208U);
45924#line 441
45925  ctx = (struct vmw_user_context *)tmp___16;
45926#line 442
45927  __cil_tmp47 = (void *)0;
45928#line 442
45929  __cil_tmp48 = (unsigned long )__cil_tmp47;
45930#line 442
45931  __cil_tmp49 = (unsigned long )ctx;
45932#line 442
45933  __cil_tmp50 = __cil_tmp49 == __cil_tmp48;
45934#line 442
45935  __cil_tmp51 = ! __cil_tmp50;
45936#line 442
45937  __cil_tmp52 = ! __cil_tmp51;
45938#line 442
45939  __cil_tmp53 = (long )__cil_tmp52;
45940#line 442
45941  tmp___18 = __builtin_expect(__cil_tmp53, 0L);
45942  }
45943#line 442
45944  if (tmp___18) {
45945    {
45946#line 443
45947    tmp___17 = vmw_mem_glob(dev_priv);
45948#line 443
45949    ttm_mem_global_free(tmp___17, vmw_user_context_size);
45950#line 445
45951    ret = -12;
45952    }
45953#line 446
45954    goto out_unlock;
45955  } else {
45956
45957  }
45958  {
45959#line 449
45960  __cil_tmp54 = & res;
45961#line 449
45962  __cil_tmp55 = (unsigned long )ctx;
45963#line 449
45964  __cil_tmp56 = __cil_tmp55 + 64;
45965#line 449
45966  *__cil_tmp54 = (struct vmw_resource *)__cil_tmp56;
45967#line 450
45968  __cil_tmp57 = 0 + 28;
45969#line 450
45970  __cil_tmp58 = (unsigned long )ctx;
45971#line 450
45972  __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
45973#line 450
45974  *((bool *)__cil_tmp59) = (bool )0;
45975#line 451
45976  __cil_tmp60 = 0 + 32;
45977#line 451
45978  __cil_tmp61 = (unsigned long )ctx;
45979#line 451
45980  __cil_tmp62 = __cil_tmp61 + __cil_tmp60;
45981#line 451
45982  __cil_tmp63 = (void *)0;
45983#line 451
45984  *((struct ttm_object_file **)__cil_tmp62) = (struct ttm_object_file *)__cil_tmp63;
45985#line 457
45986  __cil_tmp64 = & res;
45987#line 457
45988  __cil_tmp65 = *__cil_tmp64;
45989#line 457
45990  ret = vmw_context_init(dev_priv, __cil_tmp65, & vmw_user_context_free);
45991#line 458
45992  __cil_tmp66 = ret != 0;
45993#line 458
45994  __cil_tmp67 = ! __cil_tmp66;
45995#line 458
45996  __cil_tmp68 = ! __cil_tmp67;
45997#line 458
45998  __cil_tmp69 = (long )__cil_tmp68;
45999#line 458
46000  tmp___19 = __builtin_expect(__cil_tmp69, 0L);
46001  }
46002#line 458
46003  if (tmp___19) {
46004#line 459
46005    goto out_unlock;
46006  } else {
46007
46008  }
46009  {
46010#line 461
46011  __cil_tmp70 = & tmp___8;
46012#line 461
46013  __cil_tmp71 = (unsigned long )ctx;
46014#line 461
46015  __cil_tmp72 = __cil_tmp71 + 64;
46016#line 461
46017  __cil_tmp73 = (struct vmw_resource *)__cil_tmp72;
46018#line 461
46019  *__cil_tmp70 = vmw_resource_reference(__cil_tmp73);
46020#line 462
46021  __cil_tmp74 = (struct ttm_base_object *)ctx;
46022#line 462
46023  __cil_tmp75 = (bool )0;
46024#line 462
46025  __cil_tmp76 = (enum ttm_object_type )256;
46026#line 462
46027  __cil_tmp77 = (void *)0;
46028#line 462
46029  __cil_tmp78 = (void (*)(struct ttm_base_object * , enum ttm_ref_type ref_type ))__cil_tmp77;
46030#line 462
46031  ret = ttm_base_object_init(tfile, __cil_tmp74, __cil_tmp75, __cil_tmp76, & vmw_user_context_base_release,
46032                             __cil_tmp78);
46033#line 465
46034  __cil_tmp79 = ret != 0;
46035#line 465
46036  __cil_tmp80 = ! __cil_tmp79;
46037#line 465
46038  __cil_tmp81 = ! __cil_tmp80;
46039#line 465
46040  __cil_tmp82 = (long )__cil_tmp81;
46041#line 465
46042  tmp___20 = __builtin_expect(__cil_tmp82, 0L);
46043  }
46044#line 465
46045  if (tmp___20) {
46046    {
46047#line 466
46048    vmw_resource_unreference(& tmp___8);
46049    }
46050#line 467
46051    goto out_err;
46052  } else {
46053
46054  }
46055#line 470
46056  __cil_tmp83 = & res;
46057#line 470
46058  __cil_tmp84 = *__cil_tmp83;
46059#line 470
46060  __cil_tmp85 = (unsigned long )__cil_tmp84;
46061#line 470
46062  __cil_tmp86 = __cil_tmp85 + 24;
46063#line 470
46064  *((int32_t *)arg) = *((int *)__cil_tmp86);
46065  out_err: 
46066  {
46067#line 472
46068  vmw_resource_unreference(& res);
46069  }
46070  out_unlock: 
46071  {
46072#line 474
46073  __cil_tmp87 = (struct ttm_lock *)vmaster;
46074#line 474
46075  ttm_read_unlock(__cil_tmp87);
46076  }
46077#line 475
46078  return (ret);
46079}
46080}
46081#line 479 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46082int vmw_context_check(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
46083                      int id , struct vmw_resource **p_res ) 
46084{ struct vmw_resource *res ;
46085  int ret ;
46086  void *tmp___7 ;
46087  struct vmw_user_context *ctx ;
46088  struct vmw_resource    *__mptr ;
46089  unsigned long __cil_tmp10 ;
46090  unsigned long __cil_tmp11 ;
46091  rwlock_t *__cil_tmp12 ;
46092  unsigned long __cil_tmp13 ;
46093  unsigned long __cil_tmp14 ;
46094  struct idr *__cil_tmp15 ;
46095  unsigned long __cil_tmp16 ;
46096  unsigned long __cil_tmp17 ;
46097  struct vmw_user_context *__cil_tmp18 ;
46098  unsigned long __cil_tmp19 ;
46099  unsigned long __cil_tmp20 ;
46100  struct vmw_resource *__cil_tmp21 ;
46101  unsigned int __cil_tmp22 ;
46102  char *__cil_tmp23 ;
46103  char *__cil_tmp24 ;
46104  unsigned long __cil_tmp25 ;
46105  unsigned long __cil_tmp26 ;
46106  unsigned long __cil_tmp27 ;
46107  unsigned long __cil_tmp28 ;
46108  struct ttm_object_file *__cil_tmp29 ;
46109  unsigned long __cil_tmp30 ;
46110  unsigned long __cil_tmp31 ;
46111  unsigned long __cil_tmp32 ;
46112  unsigned long __cil_tmp33 ;
46113  bool __cil_tmp34 ;
46114  unsigned long __cil_tmp35 ;
46115  unsigned long __cil_tmp36 ;
46116  rwlock_t *__cil_tmp37 ;
46117
46118  {
46119  {
46120#line 485
46121  ret = 0;
46122#line 487
46123  __cil_tmp10 = (unsigned long )dev_priv;
46124#line 487
46125  __cil_tmp11 = __cil_tmp10 + 2632;
46126#line 487
46127  __cil_tmp12 = (rwlock_t *)__cil_tmp11;
46128#line 487
46129  _raw_read_lock(__cil_tmp12);
46130#line 488
46131  __cil_tmp13 = (unsigned long )dev_priv;
46132#line 488
46133  __cil_tmp14 = __cil_tmp13 + 2656;
46134#line 488
46135  __cil_tmp15 = (struct idr *)__cil_tmp14;
46136#line 488
46137  tmp___7 = idr_find(__cil_tmp15, id);
46138#line 488
46139  res = (struct vmw_resource *)tmp___7;
46140  }
46141#line 489
46142  if (res) {
46143    {
46144#line 489
46145    __cil_tmp16 = (unsigned long )res;
46146#line 489
46147    __cil_tmp17 = __cil_tmp16 + 32;
46148#line 489
46149    if (*((bool *)__cil_tmp17)) {
46150#line 491
46151      __mptr = (struct vmw_resource    *)res;
46152#line 491
46153      __cil_tmp18 = (struct vmw_user_context *)0;
46154#line 491
46155      __cil_tmp19 = (unsigned long )__cil_tmp18;
46156#line 491
46157      __cil_tmp20 = __cil_tmp19 + 64;
46158#line 491
46159      __cil_tmp21 = (struct vmw_resource *)__cil_tmp20;
46160#line 491
46161      __cil_tmp22 = (unsigned int )__cil_tmp21;
46162#line 491
46163      __cil_tmp23 = (char *)__mptr;
46164#line 491
46165      __cil_tmp24 = __cil_tmp23 - __cil_tmp22;
46166#line 491
46167      ctx = (struct vmw_user_context *)__cil_tmp24;
46168      {
46169#line 492
46170      __cil_tmp25 = (unsigned long )tfile;
46171#line 492
46172      __cil_tmp26 = 0 + 32;
46173#line 492
46174      __cil_tmp27 = (unsigned long )ctx;
46175#line 492
46176      __cil_tmp28 = __cil_tmp27 + __cil_tmp26;
46177#line 492
46178      __cil_tmp29 = *((struct ttm_object_file **)__cil_tmp28);
46179#line 492
46180      __cil_tmp30 = (unsigned long )__cil_tmp29;
46181#line 492
46182      if (__cil_tmp30 != __cil_tmp25) {
46183        {
46184#line 492
46185        __cil_tmp31 = 0 + 28;
46186#line 492
46187        __cil_tmp32 = (unsigned long )ctx;
46188#line 492
46189        __cil_tmp33 = __cil_tmp32 + __cil_tmp31;
46190#line 492
46191        __cil_tmp34 = *((bool *)__cil_tmp33);
46192#line 492
46193        if (! __cil_tmp34) {
46194#line 493
46195          ret = -1;
46196        } else {
46197
46198        }
46199        }
46200      } else {
46201
46202      }
46203      }
46204#line 494
46205      if (p_res) {
46206        {
46207#line 495
46208        *p_res = vmw_resource_reference(res);
46209        }
46210      } else {
46211
46212      }
46213    } else {
46214#line 497
46215      ret = -22;
46216    }
46217    }
46218  } else {
46219#line 497
46220    ret = -22;
46221  }
46222  {
46223#line 498
46224  __cil_tmp35 = (unsigned long )dev_priv;
46225#line 498
46226  __cil_tmp36 = __cil_tmp35 + 2632;
46227#line 498
46228  __cil_tmp37 = (rwlock_t *)__cil_tmp36;
46229#line 498
46230  _raw_read_unlock(__cil_tmp37);
46231  }
46232#line 500
46233  return (ret);
46234}
46235}
46236#line 521 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46237static struct vmw_bpp    vmw_sf_bpp[121]  = 
46238#line 521
46239  {      {(uint8_t )0, (uint8_t )0}, 
46240        {(uint8_t )32, (uint8_t )32}, 
46241        {(uint8_t )32, (uint8_t )32}, 
46242        {(uint8_t )16, (uint8_t )16}, 
46243        {(uint8_t )16, (uint8_t )16}, 
46244        {(uint8_t )16, (uint8_t )16}, 
46245        {(uint8_t )16, (uint8_t )16}, 
46246        {(uint8_t )32, (uint8_t )32}, 
46247        {(uint8_t )16, (uint8_t )16}, 
46248        {(uint8_t )32, (uint8_t )32}, 
46249        {(uint8_t )16, (uint8_t )16}, 
46250        {(uint8_t )8, (uint8_t )8}, 
46251        {(uint8_t )8, (uint8_t )8}, 
46252        {(uint8_t )16, (uint8_t )16}, 
46253        {(uint8_t )16, (uint8_t )16}, 
46254        {(uint8_t )4, (uint8_t )16}, 
46255        {(uint8_t )8, (uint8_t )32}, 
46256        {(uint8_t )8, (uint8_t )32}, 
46257        {(uint8_t )8, (uint8_t )32}, 
46258        {(uint8_t )8, (uint8_t )32}, 
46259        {(uint8_t )16, (uint8_t )16}, 
46260        {(uint8_t )16, (uint8_t )16}, 
46261        {(uint8_t )32, (uint8_t )32}, 
46262        {(unsigned char)0, (unsigned char)0}, 
46263        {(uint8_t )16, (uint8_t )16}, 
46264        {(uint8_t )32, (uint8_t )32}, 
46265        {(uint8_t )32, (uint8_t )32}, 
46266        {(uint8_t )16, (uint8_t )16}, 
46267        {(uint8_t )32, (uint8_t )32}, 
46268        {(uint8_t )16, (uint8_t )16}, 
46269        {(uint8_t )32, (uint8_t )32}, 
46270        {(uint8_t )32, (uint8_t )32}, 
46271        {(uint8_t )8, (uint8_t )8}, 
46272        {(uint8_t )16, (uint8_t )16}, 
46273        {(uint8_t )32, (uint8_t )32}, 
46274        {(uint8_t )16, (uint8_t )16}, 
46275        {(uint8_t )32, (uint8_t )32}, 
46276        {(uint8_t )8, (uint8_t )8}, 
46277        {(uint8_t )32, (uint8_t )32}, 
46278        {(uint8_t )32, (uint8_t )32}, 
46279        {(uint8_t )32, (uint8_t )32}, 
46280        {(uint8_t )64, (uint8_t )64}, 
46281        {(uint8_t )12, (uint8_t )12}, 
46282        {(uint8_t )12, (uint8_t )12}, 
46283        {(uint8_t )12, (uint8_t )8}, 
46284        {(uint8_t )32, (uint8_t )32}, 
46285        {(unsigned char)0, (unsigned char)0}, 
46286        {(unsigned char)0, (unsigned char)0}, 
46287        {(unsigned char)0, (unsigned char)0}, 
46288        {(unsigned char)0, (unsigned char)0}, 
46289        {(unsigned char)0, (unsigned char)0}, 
46290        {(unsigned char)0, (unsigned char)0}, 
46291        {(unsigned char)0, (unsigned char)0}, 
46292        {(unsigned char)0, (unsigned char)0}, 
46293        {(unsigned char)0, (unsigned char)0}, 
46294        {(unsigned char)0, (unsigned char)0}, 
46295        {(unsigned char)0, (unsigned char)0}, 
46296        {(unsigned char)0, (unsigned char)0}, 
46297        {(unsigned char)0, (unsigned char)0}, 
46298        {(unsigned char)0, (unsigned char)0}, 
46299        {(unsigned char)0, (unsigned char)0}, 
46300        {(unsigned char)0, (unsigned char)0}, 
46301        {(unsigned char)0, (unsigned char)0}, 
46302        {(unsigned char)0, (unsigned char)0}, 
46303        {(unsigned char)0, (unsigned char)0}, 
46304        {(unsigned char)0, (unsigned char)0}, 
46305        {(unsigned char)0, (unsigned char)0}, 
46306        {(unsigned char)0, (unsigned char)0}, 
46307        {(unsigned char)0, (unsigned char)0}, 
46308        {(unsigned char)0, (unsigned char)0}, 
46309        {(unsigned char)0, (unsigned char)0}, 
46310        {(unsigned char)0, (unsigned char)0}, 
46311        {(unsigned char)0, (unsigned char)0}, 
46312        {(unsigned char)0, (unsigned char)0}, 
46313        {(unsigned char)0, (unsigned char)0}, 
46314        {(unsigned char)0, (unsigned char)0}, 
46315        {(unsigned char)0, (unsigned char)0}, 
46316        {(unsigned char)0, (unsigned char)0}, 
46317        {(unsigned char)0, (unsigned char)0}, 
46318        {(unsigned char)0, (unsigned char)0}, 
46319        {(unsigned char)0, (unsigned char)0}, 
46320        {(unsigned char)0, (unsigned char)0}, 
46321        {(unsigned char)0, (unsigned char)0}, 
46322        {(unsigned char)0, (unsigned char)0}, 
46323        {(unsigned char)0, (unsigned char)0}, 
46324        {(unsigned char)0, (unsigned char)0}, 
46325        {(unsigned char)0, (unsigned char)0}, 
46326        {(unsigned char)0, (unsigned char)0}, 
46327        {(unsigned char)0, (unsigned char)0}, 
46328        {(unsigned char)0, (unsigned char)0}, 
46329        {(unsigned char)0, (unsigned char)0}, 
46330        {(unsigned char)0, (unsigned char)0}, 
46331        {(unsigned char)0, (unsigned char)0}, 
46332        {(unsigned char)0, (unsigned char)0}, 
46333        {(unsigned char)0, (unsigned char)0}, 
46334        {(unsigned char)0, (unsigned char)0}, 
46335        {(unsigned char)0, (unsigned char)0}, 
46336        {(unsigned char)0, (unsigned char)0}, 
46337        {(unsigned char)0, (unsigned char)0}, 
46338        {(unsigned char)0, (unsigned char)0}, 
46339        {(unsigned char)0, (unsigned char)0}, 
46340        {(unsigned char)0, (unsigned char)0}, 
46341        {(unsigned char)0, (unsigned char)0}, 
46342        {(unsigned char)0, (unsigned char)0}, 
46343        {(unsigned char)0, (unsigned char)0}, 
46344        {(unsigned char)0, (unsigned char)0}, 
46345        {(unsigned char)0, (unsigned char)0}, 
46346        {(unsigned char)0, (unsigned char)0}, 
46347        {(uint8_t )4, (uint8_t )16}, 
46348        {(unsigned char)0, (unsigned char)0}, 
46349        {(unsigned char)0, (unsigned char)0}, 
46350        {(uint8_t )8, (uint8_t )32}, 
46351        {(unsigned char)0, (unsigned char)0}, 
46352        {(unsigned char)0, (unsigned char)0}, 
46353        {(unsigned char)0, (unsigned char)0}, 
46354        {(unsigned char)0, (unsigned char)0}, 
46355        {(unsigned char)0, (unsigned char)0}, 
46356        {(unsigned char)0, (unsigned char)0}, 
46357        {(uint8_t )16, (uint8_t )16}, 
46358        {(uint8_t )24, (uint8_t )24}, 
46359        {(uint8_t )32, (uint8_t )32}};
46360#line 605
46361__inline static uint32_t vmw_surface_dma_size(struct vmw_surface    *srf )  __attribute__((__no_instrument_function__)) ;
46362#line 605 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46363__inline static uint32_t vmw_surface_dma_size(struct vmw_surface    *srf ) 
46364{ unsigned long __cil_tmp2 ;
46365  unsigned long __cil_tmp3 ;
46366  uint32_t    __cil_tmp4 ;
46367  unsigned long __cil_tmp5 ;
46368  unsigned long __cil_tmp6 ;
46369
46370  {
46371  {
46372#line 607
46373  __cil_tmp2 = (unsigned long )srf;
46374#line 607
46375  __cil_tmp3 = __cil_tmp2 + 152;
46376#line 607
46377  __cil_tmp4 = *((uint32_t    *)__cil_tmp3);
46378#line 607
46379  __cil_tmp5 = (unsigned long )__cil_tmp4;
46380#line 607
46381  __cil_tmp6 = __cil_tmp5 * 84UL;
46382#line 607
46383  return ((uint32_t )__cil_tmp6);
46384  }
46385}
46386}
46387#line 619
46388__inline static uint32_t vmw_surface_define_size(struct vmw_surface    *srf )  __attribute__((__no_instrument_function__)) ;
46389#line 619 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46390__inline static uint32_t vmw_surface_define_size(struct vmw_surface    *srf ) 
46391{ unsigned long __cil_tmp2 ;
46392  unsigned long __cil_tmp3 ;
46393  uint32_t    __cil_tmp4 ;
46394  unsigned long __cil_tmp5 ;
46395  unsigned long __cil_tmp6 ;
46396  unsigned long __cil_tmp7 ;
46397
46398  {
46399  {
46400#line 621
46401  __cil_tmp2 = (unsigned long )srf;
46402#line 621
46403  __cil_tmp3 = __cil_tmp2 + 152;
46404#line 621
46405  __cil_tmp4 = *((uint32_t    *)__cil_tmp3);
46406#line 621
46407  __cil_tmp5 = (unsigned long )__cil_tmp4;
46408#line 621
46409  __cil_tmp6 = __cil_tmp5 * 12UL;
46410#line 621
46411  __cil_tmp7 = 44UL + __cil_tmp6;
46412#line 621
46413  return ((uint32_t )__cil_tmp7);
46414  }
46415}
46416}
46417#line 632
46418__inline static uint32_t vmw_surface_destroy_size(void)  __attribute__((__no_instrument_function__)) ;
46419#line 632 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46420__inline static uint32_t vmw_surface_destroy_size(void) 
46421{ 
46422
46423  {
46424#line 634
46425  return ((uint32_t )12UL);
46426}
46427}
46428#line 643 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46429static void vmw_surface_destroy_encode(uint32_t id , void *cmd_space ) 
46430{ struct vmw_surface_destroy *cmd ;
46431  unsigned long __cil_tmp4 ;
46432  unsigned long __cil_tmp5 ;
46433  unsigned long __cil_tmp6 ;
46434  unsigned long __cil_tmp7 ;
46435  unsigned long __cil_tmp8 ;
46436
46437  {
46438#line 646
46439  cmd = (struct vmw_surface_destroy *)cmd_space;
46440#line 649
46441  *((uint32 *)cmd) = (uint32 )1041;
46442#line 650
46443  __cil_tmp4 = 0 + 4;
46444#line 650
46445  __cil_tmp5 = (unsigned long )cmd;
46446#line 650
46447  __cil_tmp6 = __cil_tmp5 + __cil_tmp4;
46448#line 650
46449  *((uint32 *)__cil_tmp6) = (uint32 )4UL;
46450#line 651
46451  __cil_tmp7 = (unsigned long )cmd;
46452#line 651
46453  __cil_tmp8 = __cil_tmp7 + 8;
46454#line 651
46455  *((uint32 *)__cil_tmp8) = id;
46456#line 652
46457  return;
46458}
46459}
46460#line 660 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46461static void vmw_surface_define_encode(struct vmw_surface    *srf , void *cmd_space ) 
46462{ struct vmw_surface_define *cmd ;
46463  struct drm_vmw_size *src_size ;
46464  SVGA3dSize *cmd_size ;
46465  uint32_t cmd_len ;
46466  int i ;
46467  unsigned long __cil_tmp8 ;
46468  unsigned long __cil_tmp9 ;
46469  uint32_t    __cil_tmp10 ;
46470  unsigned long __cil_tmp11 ;
46471  unsigned long __cil_tmp12 ;
46472  unsigned long __cil_tmp13 ;
46473  unsigned long __cil_tmp14 ;
46474  unsigned long __cil_tmp15 ;
46475  unsigned long __cil_tmp16 ;
46476  unsigned long __cil_tmp17 ;
46477  unsigned long __cil_tmp18 ;
46478  unsigned long __cil_tmp19 ;
46479  unsigned long __cil_tmp20 ;
46480  unsigned long __cil_tmp21 ;
46481  int    __cil_tmp22 ;
46482  unsigned long __cil_tmp23 ;
46483  unsigned long __cil_tmp24 ;
46484  unsigned long __cil_tmp25 ;
46485  unsigned long __cil_tmp26 ;
46486  unsigned long __cil_tmp27 ;
46487  uint32_t    __cil_tmp28 ;
46488  unsigned long __cil_tmp29 ;
46489  unsigned long __cil_tmp30 ;
46490  unsigned long __cil_tmp31 ;
46491  unsigned long __cil_tmp32 ;
46492  unsigned long __cil_tmp33 ;
46493  uint32_t    __cil_tmp34 ;
46494  __u32 __cil_tmp35 ;
46495  unsigned long __cil_tmp36 ;
46496  unsigned long __cil_tmp37 ;
46497  unsigned long __cil_tmp38 ;
46498  unsigned long __cil_tmp39 ;
46499  unsigned long __cil_tmp40 ;
46500  unsigned long __cil_tmp41 ;
46501  unsigned long __cil_tmp42 ;
46502  unsigned long __cil_tmp43 ;
46503  unsigned long __cil_tmp44 ;
46504  unsigned long __cil_tmp45 ;
46505  unsigned long __cil_tmp46 ;
46506  struct drm_vmw_size *   __cil_tmp47 ;
46507  unsigned long __cil_tmp48 ;
46508  unsigned long __cil_tmp49 ;
46509  uint32_t    __cil_tmp50 ;
46510  uint32_t    __cil_tmp51 ;
46511  unsigned long __cil_tmp52 ;
46512  unsigned long __cil_tmp53 ;
46513  unsigned long __cil_tmp54 ;
46514  unsigned long __cil_tmp55 ;
46515  unsigned long __cil_tmp56 ;
46516  unsigned long __cil_tmp57 ;
46517  unsigned long __cil_tmp58 ;
46518  unsigned long __cil_tmp59 ;
46519
46520  {
46521#line 663
46522  cmd = (struct vmw_surface_define *)cmd_space;
46523#line 670
46524  __cil_tmp8 = (unsigned long )srf;
46525#line 670
46526  __cil_tmp9 = __cil_tmp8 + 152;
46527#line 670
46528  __cil_tmp10 = *((uint32_t    *)__cil_tmp9);
46529#line 670
46530  __cil_tmp11 = (unsigned long )__cil_tmp10;
46531#line 670
46532  __cil_tmp12 = __cil_tmp11 * 12UL;
46533#line 670
46534  __cil_tmp13 = 36UL + __cil_tmp12;
46535#line 670
46536  cmd_len = (uint32_t )__cil_tmp13;
46537#line 672
46538  *((uint32 *)cmd) = (uint32 )1040;
46539#line 673
46540  __cil_tmp14 = 0 + 4;
46541#line 673
46542  __cil_tmp15 = (unsigned long )cmd;
46543#line 673
46544  __cil_tmp16 = __cil_tmp15 + __cil_tmp14;
46545#line 673
46546  *((uint32 *)__cil_tmp16) = cmd_len;
46547#line 674
46548  __cil_tmp17 = (unsigned long )cmd;
46549#line 674
46550  __cil_tmp18 = __cil_tmp17 + 8;
46551#line 674
46552  __cil_tmp19 = 0 + 24;
46553#line 674
46554  __cil_tmp20 = (unsigned long )srf;
46555#line 674
46556  __cil_tmp21 = __cil_tmp20 + __cil_tmp19;
46557#line 674
46558  __cil_tmp22 = *((int    *)__cil_tmp21);
46559#line 674
46560  *((uint32 *)__cil_tmp18) = (uint32 )__cil_tmp22;
46561#line 675
46562  __cil_tmp23 = 8 + 4;
46563#line 675
46564  __cil_tmp24 = (unsigned long )cmd;
46565#line 675
46566  __cil_tmp25 = __cil_tmp24 + __cil_tmp23;
46567#line 675
46568  __cil_tmp26 = (unsigned long )srf;
46569#line 675
46570  __cil_tmp27 = __cil_tmp26 + 112;
46571#line 675
46572  __cil_tmp28 = *((uint32_t    *)__cil_tmp27);
46573#line 675
46574  *((SVGA3dSurfaceFlags *)__cil_tmp25) = (SVGA3dSurfaceFlags )__cil_tmp28;
46575#line 676
46576  __cil_tmp29 = 8 + 8;
46577#line 676
46578  __cil_tmp30 = (unsigned long )cmd;
46579#line 676
46580  __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
46581#line 676
46582  __cil_tmp32 = (unsigned long )srf;
46583#line 676
46584  __cil_tmp33 = __cil_tmp32 + 116;
46585#line 676
46586  __cil_tmp34 = *((uint32_t    *)__cil_tmp33);
46587#line 676
46588  __cil_tmp35 = (__u32 )__cil_tmp34;
46589#line 676
46590  *((SVGA3dSurfaceFormat *)__cil_tmp31) = (SVGA3dSurfaceFormat )__cil_tmp35;
46591#line 677
46592  i = 0;
46593  {
46594#line 677
46595  while (1) {
46596    while_continue: /* CIL Label */ ;
46597#line 677
46598    if (i < 6) {
46599
46600    } else {
46601#line 677
46602      goto while_break;
46603    }
46604#line 678
46605    __cil_tmp36 = i * 4UL;
46606#line 678
46607    __cil_tmp37 = 12 + __cil_tmp36;
46608#line 678
46609    __cil_tmp38 = 8 + __cil_tmp37;
46610#line 678
46611    __cil_tmp39 = (unsigned long )cmd;
46612#line 678
46613    __cil_tmp40 = __cil_tmp39 + __cil_tmp38;
46614#line 678
46615    __cil_tmp41 = i * 4UL;
46616#line 678
46617    __cil_tmp42 = 120 + __cil_tmp41;
46618#line 678
46619    __cil_tmp43 = (unsigned long )srf;
46620#line 678
46621    __cil_tmp44 = __cil_tmp43 + __cil_tmp42;
46622#line 678
46623    *((uint32 *)__cil_tmp40) = *((uint32_t    *)__cil_tmp44);
46624#line 677
46625    i = i + 1;
46626  }
46627  while_break: /* CIL Label */ ;
46628  }
46629#line 680
46630  cmd = cmd + 1;
46631#line 681
46632  cmd_size = (SVGA3dSize *)cmd;
46633#line 682
46634  __cil_tmp45 = (unsigned long )srf;
46635#line 682
46636  __cil_tmp46 = __cil_tmp45 + 144;
46637#line 682
46638  __cil_tmp47 = *((struct drm_vmw_size *   *)__cil_tmp46);
46639#line 682
46640  src_size = (struct drm_vmw_size *)__cil_tmp47;
46641#line 684
46642  i = 0;
46643  {
46644#line 684
46645  while (1) {
46646    while_continue___0: /* CIL Label */ ;
46647    {
46648#line 684
46649    __cil_tmp48 = (unsigned long )srf;
46650#line 684
46651    __cil_tmp49 = __cil_tmp48 + 152;
46652#line 684
46653    __cil_tmp50 = *((uint32_t    *)__cil_tmp49);
46654#line 684
46655    __cil_tmp51 = (uint32_t    )i;
46656#line 684
46657    if (__cil_tmp51 < __cil_tmp50) {
46658
46659    } else {
46660#line 684
46661      goto while_break___0;
46662    }
46663    }
46664#line 685
46665    *((uint32 *)cmd_size) = *((uint32_t *)src_size);
46666#line 686
46667    __cil_tmp52 = (unsigned long )cmd_size;
46668#line 686
46669    __cil_tmp53 = __cil_tmp52 + 4;
46670#line 686
46671    __cil_tmp54 = (unsigned long )src_size;
46672#line 686
46673    __cil_tmp55 = __cil_tmp54 + 4;
46674#line 686
46675    *((uint32 *)__cil_tmp53) = *((uint32_t *)__cil_tmp55);
46676#line 687
46677    __cil_tmp56 = (unsigned long )cmd_size;
46678#line 687
46679    __cil_tmp57 = __cil_tmp56 + 8;
46680#line 687
46681    __cil_tmp58 = (unsigned long )src_size;
46682#line 687
46683    __cil_tmp59 = __cil_tmp58 + 8;
46684#line 687
46685    *((uint32 *)__cil_tmp57) = *((uint32_t *)__cil_tmp59);
46686#line 684
46687    i = i + 1;
46688#line 684
46689    cmd_size = cmd_size + 1;
46690#line 684
46691    src_size = src_size + 1;
46692  }
46693  while_break___0: /* CIL Label */ ;
46694  }
46695#line 689
46696  return;
46697}
46698}
46699#line 701 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
46700static void vmw_surface_dma_encode(struct vmw_surface *srf , void *cmd_space , SVGAGuestPtr    *ptr ,
46701                                   bool to_surface ) 
46702{ uint32_t i ;
46703  uint32_t bpp ;
46704  uint32_t stride_bpp ;
46705  struct vmw_surface_dma *cmd ;
46706  SVGA3dCmdHeader *header ;
46707  SVGA3dCmdSurfaceDMA *body ;
46708  SVGA3dCopyBox *cb ;
46709  SVGA3dCmdSurfaceDMASuffix *suffix ;
46710  struct vmw_surface_offset    *cur_offset ;
46711  struct drm_vmw_size    *cur_size ;
46712  unsigned long __cil_tmp15 ;
46713  unsigned long __cil_tmp16 ;
46714  uint32_t __cil_tmp17 ;
46715  unsigned long __cil_tmp18 ;
46716  unsigned long __cil_tmp19 ;
46717  uint8_t    __cil_tmp20 ;
46718  unsigned long __cil_tmp21 ;
46719  unsigned long __cil_tmp22 ;
46720  uint32_t __cil_tmp23 ;
46721  unsigned long __cil_tmp24 ;
46722  unsigned long __cil_tmp25 ;
46723  unsigned long __cil_tmp26 ;
46724  uint8_t    __cil_tmp27 ;
46725  unsigned long __cil_tmp28 ;
46726  unsigned long __cil_tmp29 ;
46727  uint32_t __cil_tmp30 ;
46728  unsigned long __cil_tmp31 ;
46729  unsigned long __cil_tmp32 ;
46730  unsigned long __cil_tmp33 ;
46731  unsigned long __cil_tmp34 ;
46732  unsigned long __cil_tmp35 ;
46733  unsigned long __cil_tmp36 ;
46734  unsigned long __cil_tmp37 ;
46735  unsigned long __cil_tmp38 ;
46736  struct vmw_surface_offset *__cil_tmp39 ;
46737  struct vmw_surface_offset *__cil_tmp40 ;
46738  unsigned long __cil_tmp41 ;
46739  unsigned long __cil_tmp42 ;
46740  struct drm_vmw_size *__cil_tmp43 ;
46741  struct drm_vmw_size *__cil_tmp44 ;
46742  unsigned long __cil_tmp45 ;
46743  unsigned long __cil_tmp46 ;
46744  unsigned long __cil_tmp47 ;
46745  unsigned long __cil_tmp48 ;
46746  SVGAGuestPtr    __cil_tmp49 ;
46747  unsigned long __cil_tmp50 ;
46748  unsigned long __cil_tmp51 ;
46749  unsigned long __cil_tmp52 ;
46750  unsigned long __cil_tmp53 ;
46751  unsigned long __cil_tmp54 ;
46752  unsigned long __cil_tmp55 ;
46753  uint32_t    __cil_tmp56 ;
46754  uint32 __cil_tmp57 ;
46755  unsigned long __cil_tmp58 ;
46756  unsigned long __cil_tmp59 ;
46757  unsigned long __cil_tmp60 ;
46758  unsigned long __cil_tmp61 ;
46759  uint32 __cil_tmp62 ;
46760  unsigned long __cil_tmp63 ;
46761  unsigned long __cil_tmp64 ;
46762  unsigned long __cil_tmp65 ;
46763  uint32_t    __cil_tmp66 ;
46764  uint32_t    __cil_tmp67 ;
46765  uint32_t    __cil_tmp68 ;
46766  uint32_t    __cil_tmp69 ;
46767  uint32_t    __cil_tmp70 ;
46768  unsigned long __cil_tmp71 ;
46769  unsigned long __cil_tmp72 ;
46770  unsigned long __cil_tmp73 ;
46771  unsigned long __cil_tmp74 ;
46772  unsigned long __cil_tmp75 ;
46773  int __cil_tmp76 ;
46774  unsigned long __cil_tmp77 ;
46775  unsigned long __cil_tmp78 ;
46776  unsigned long __cil_tmp79 ;
46777  uint32_t    __cil_tmp80 ;
46778  unsigned long __cil_tmp81 ;
46779  unsigned long __cil_tmp82 ;
46780  unsigned long __cil_tmp83 ;
46781  unsigned long __cil_tmp84 ;
46782  unsigned long __cil_tmp85 ;
46783  uint32_t    __cil_tmp86 ;
46784  unsigned long __cil_tmp87 ;
46785  unsigned long __cil_tmp88 ;
46786  unsigned long __cil_tmp89 ;
46787  unsigned long __cil_tmp90 ;
46788  unsigned long __cil_tmp91 ;
46789  unsigned long __cil_tmp92 ;
46790  unsigned long __cil_tmp93 ;
46791  unsigned long __cil_tmp94 ;
46792  unsigned long __cil_tmp95 ;
46793  unsigned long __cil_tmp96 ;
46794  unsigned long __cil_tmp97 ;
46795  unsigned long __cil_tmp98 ;
46796  unsigned long __cil_tmp99 ;
46797  unsigned long __cil_tmp100 ;
46798  unsigned long __cil_tmp101 ;
46799  unsigned long __cil_tmp102 ;
46800  uint32_t    __cil_tmp103 ;
46801  unsigned long __cil_tmp104 ;
46802  unsigned long __cil_tmp105 ;
46803  unsigned long __cil_tmp106 ;
46804  unsigned long __cil_tmp107 ;
46805  uint32_t    __cil_tmp108 ;
46806  unsigned long __cil_tmp109 ;
46807  unsigned long __cil_tmp110 ;
46808  unsigned long __cil_tmp111 ;
46809  unsigned long __cil_tmp112 ;
46810  uint32_t    __cil_tmp113 ;
46811  unsigned long __cil_tmp114 ;
46812  unsigned long __cil_tmp115 ;
46813  unsigned long __cil_tmp116 ;
46814  unsigned long __cil_tmp117 ;
46815  uint32_t    __cil_tmp118 ;
46816  uint32 __cil_tmp119 ;
46817  unsigned long __cil_tmp120 ;
46818  unsigned long __cil_tmp121 ;
46819  uint32_t    __cil_tmp122 ;
46820  uint32 __cil_tmp123 ;
46821  unsigned long __cil_tmp124 ;
46822  unsigned long __cil_tmp125 ;
46823  unsigned long __cil_tmp126 ;
46824  uint32 __cil_tmp127 ;
46825  uint32 __cil_tmp128 ;
46826  uint32 __cil_tmp129 ;
46827  uint32 __cil_tmp130 ;
46828  unsigned long __cil_tmp131 ;
46829  unsigned long __cil_tmp132 ;
46830  unsigned long __cil_tmp133 ;
46831  unsigned long __cil_tmp134 ;
46832  unsigned long __cil_tmp135 ;
46833  unsigned long __cil_tmp136 ;
46834  uint32 __cil_tmp49_offset137 ;
46835  uint32 __cil_tmp49_gmrId138 ;
46836  uint32    __cil_tmp139 ;
46837  uint32    __cil_tmp140 ;
46838
46839  {
46840#line 707
46841  __cil_tmp15 = (unsigned long )srf;
46842#line 707
46843  __cil_tmp16 = __cil_tmp15 + 116;
46844#line 707
46845  __cil_tmp17 = *((uint32_t *)__cil_tmp16);
46846#line 707
46847  __cil_tmp18 = __cil_tmp17 * 2UL;
46848#line 707
46849  __cil_tmp19 = (unsigned long )(vmw_sf_bpp) + __cil_tmp18;
46850#line 707
46851  __cil_tmp20 = *((uint8_t    *)__cil_tmp19);
46852#line 707
46853  bpp = (uint32_t )__cil_tmp20;
46854#line 708
46855  __cil_tmp21 = (unsigned long )srf;
46856#line 708
46857  __cil_tmp22 = __cil_tmp21 + 116;
46858#line 708
46859  __cil_tmp23 = *((uint32_t *)__cil_tmp22);
46860#line 708
46861  __cil_tmp24 = __cil_tmp23 * 2UL;
46862#line 708
46863  __cil_tmp25 = __cil_tmp24 + 1;
46864#line 708
46865  __cil_tmp26 = (unsigned long )(vmw_sf_bpp) + __cil_tmp25;
46866#line 708
46867  __cil_tmp27 = *((uint8_t    *)__cil_tmp26);
46868#line 708
46869  stride_bpp = (uint32_t )__cil_tmp27;
46870#line 709
46871  cmd = (struct vmw_surface_dma *)cmd_space;
46872#line 711
46873  i = (uint32_t )0;
46874  {
46875#line 711
46876  while (1) {
46877    while_continue: /* CIL Label */ ;
46878    {
46879#line 711
46880    __cil_tmp28 = (unsigned long )srf;
46881#line 711
46882    __cil_tmp29 = __cil_tmp28 + 152;
46883#line 711
46884    __cil_tmp30 = *((uint32_t *)__cil_tmp29);
46885#line 711
46886    if (i < __cil_tmp30) {
46887
46888    } else {
46889#line 711
46890      goto while_break;
46891    }
46892    }
46893#line 712
46894    header = (SVGA3dCmdHeader *)cmd;
46895#line 713
46896    __cil_tmp31 = (unsigned long )cmd;
46897#line 713
46898    __cil_tmp32 = __cil_tmp31 + 8;
46899#line 713
46900    body = (SVGA3dCmdSurfaceDMA *)__cil_tmp32;
46901#line 714
46902    __cil_tmp33 = (unsigned long )cmd;
46903#line 714
46904    __cil_tmp34 = __cil_tmp33 + 36;
46905#line 714
46906    cb = (SVGA3dCopyBox *)__cil_tmp34;
46907#line 715
46908    __cil_tmp35 = (unsigned long )cmd;
46909#line 715
46910    __cil_tmp36 = __cil_tmp35 + 72;
46911#line 715
46912    suffix = (SVGA3dCmdSurfaceDMASuffix *)__cil_tmp36;
46913#line 716
46914    __cil_tmp37 = (unsigned long )srf;
46915#line 716
46916    __cil_tmp38 = __cil_tmp37 + 192;
46917#line 716
46918    __cil_tmp39 = *((struct vmw_surface_offset **)__cil_tmp38);
46919#line 716
46920    __cil_tmp40 = __cil_tmp39 + i;
46921#line 716
46922    cur_offset = (struct vmw_surface_offset    *)__cil_tmp40;
46923#line 717
46924    __cil_tmp41 = (unsigned long )srf;
46925#line 717
46926    __cil_tmp42 = __cil_tmp41 + 144;
46927#line 717
46928    __cil_tmp43 = *((struct drm_vmw_size **)__cil_tmp42);
46929#line 717
46930    __cil_tmp44 = __cil_tmp43 + i;
46931#line 717
46932    cur_size = (struct drm_vmw_size    *)__cil_tmp44;
46933#line 719
46934    *((uint32 *)header) = (uint32 )1044;
46935#line 720
46936    __cil_tmp45 = (unsigned long )header;
46937#line 720
46938    __cil_tmp46 = __cil_tmp45 + 4;
46939#line 720
46940    __cil_tmp47 = 28UL + 36UL;
46941#line 720
46942    __cil_tmp48 = __cil_tmp47 + 12UL;
46943#line 720
46944    *((uint32 *)__cil_tmp46) = (uint32 )__cil_tmp48;
46945#line 722
46946    __cil_tmp139 = ptr->gmrId;
46947#line 722
46948    __cil_tmp140 = ptr->offset;
46949#line 722
46950    __cil_tmp49_gmrId138 = __cil_tmp139;
46951#line 722
46952    __cil_tmp49_offset137 = __cil_tmp140;
46953#line 722
46954    *((SVGAGuestPtr *)body) = (SVGAGuestPtr )__cil_tmp49;
46955#line 723
46956    __cil_tmp50 = 0 + 4;
46957#line 723
46958    __cil_tmp51 = 0 + __cil_tmp50;
46959#line 723
46960    __cil_tmp52 = (unsigned long )body;
46961#line 723
46962    __cil_tmp53 = __cil_tmp52 + __cil_tmp51;
46963#line 723
46964    __cil_tmp54 = (unsigned long )cur_offset;
46965#line 723
46966    __cil_tmp55 = __cil_tmp54 + 8;
46967#line 723
46968    __cil_tmp56 = *((uint32_t    *)__cil_tmp55);
46969#line 723
46970    __cil_tmp57 = (uint32 )__cil_tmp56;
46971#line 723
46972    __cil_tmp58 = 0 + 4;
46973#line 723
46974    __cil_tmp59 = 0 + __cil_tmp58;
46975#line 723
46976    __cil_tmp60 = (unsigned long )body;
46977#line 723
46978    __cil_tmp61 = __cil_tmp60 + __cil_tmp59;
46979#line 723
46980    __cil_tmp62 = *((uint32 *)__cil_tmp61);
46981#line 723
46982    *((uint32 *)__cil_tmp53) = __cil_tmp62 + __cil_tmp57;
46983#line 724
46984    __cil_tmp63 = 0 + 8;
46985#line 724
46986    __cil_tmp64 = (unsigned long )body;
46987#line 724
46988    __cil_tmp65 = __cil_tmp64 + __cil_tmp63;
46989#line 724
46990    __cil_tmp66 = (uint32_t    )stride_bpp;
46991#line 724
46992    __cil_tmp67 = *((uint32_t    *)cur_size);
46993#line 724
46994    __cil_tmp68 = __cil_tmp67 * __cil_tmp66;
46995#line 724
46996    __cil_tmp69 = __cil_tmp68 + 7U;
46997#line 724
46998    __cil_tmp70 = __cil_tmp69 >> 3;
46999#line 724
47000    *((uint32 *)__cil_tmp65) = (uint32 )__cil_tmp70;
47001#line 725
47002    __cil_tmp71 = (unsigned long )body;
47003#line 725
47004    __cil_tmp72 = __cil_tmp71 + 12;
47005#line 725
47006    __cil_tmp73 = 0 + 24;
47007#line 725
47008    __cil_tmp74 = (unsigned long )srf;
47009#line 725
47010    __cil_tmp75 = __cil_tmp74 + __cil_tmp73;
47011#line 725
47012    __cil_tmp76 = *((int *)__cil_tmp75);
47013#line 725
47014    *((uint32 *)__cil_tmp72) = (uint32 )__cil_tmp76;
47015#line 726
47016    __cil_tmp77 = 12 + 4;
47017#line 726
47018    __cil_tmp78 = (unsigned long )body;
47019#line 726
47020    __cil_tmp79 = __cil_tmp78 + __cil_tmp77;
47021#line 726
47022    __cil_tmp80 = *((uint32_t    *)cur_offset);
47023#line 726
47024    *((uint32 *)__cil_tmp79) = (uint32 )__cil_tmp80;
47025#line 727
47026    __cil_tmp81 = 12 + 8;
47027#line 727
47028    __cil_tmp82 = (unsigned long )body;
47029#line 727
47030    __cil_tmp83 = __cil_tmp82 + __cil_tmp81;
47031#line 727
47032    __cil_tmp84 = (unsigned long )cur_offset;
47033#line 727
47034    __cil_tmp85 = __cil_tmp84 + 4;
47035#line 727
47036    __cil_tmp86 = *((uint32_t    *)__cil_tmp85);
47037#line 727
47038    *((uint32 *)__cil_tmp83) = (uint32 )__cil_tmp86;
47039#line 728
47040    if (to_surface) {
47041#line 728
47042      __cil_tmp87 = (unsigned long )body;
47043#line 728
47044      __cil_tmp88 = __cil_tmp87 + 24;
47045#line 728
47046      *((SVGA3dTransferType *)__cil_tmp88) = (SVGA3dTransferType )1;
47047    } else {
47048#line 728
47049      __cil_tmp89 = (unsigned long )body;
47050#line 728
47051      __cil_tmp90 = __cil_tmp89 + 24;
47052#line 728
47053      *((SVGA3dTransferType *)__cil_tmp90) = (SVGA3dTransferType )2;
47054    }
47055#line 730
47056    *((uint32 *)cb) = (uint32 )0;
47057#line 731
47058    __cil_tmp91 = (unsigned long )cb;
47059#line 731
47060    __cil_tmp92 = __cil_tmp91 + 4;
47061#line 731
47062    *((uint32 *)__cil_tmp92) = (uint32 )0;
47063#line 732
47064    __cil_tmp93 = (unsigned long )cb;
47065#line 732
47066    __cil_tmp94 = __cil_tmp93 + 8;
47067#line 732
47068    *((uint32 *)__cil_tmp94) = (uint32 )0;
47069#line 733
47070    __cil_tmp95 = (unsigned long )cb;
47071#line 733
47072    __cil_tmp96 = __cil_tmp95 + 24;
47073#line 733
47074    *((uint32 *)__cil_tmp96) = (uint32 )0;
47075#line 734
47076    __cil_tmp97 = (unsigned long )cb;
47077#line 734
47078    __cil_tmp98 = __cil_tmp97 + 28;
47079#line 734
47080    *((uint32 *)__cil_tmp98) = (uint32 )0;
47081#line 735
47082    __cil_tmp99 = (unsigned long )cb;
47083#line 735
47084    __cil_tmp100 = __cil_tmp99 + 32;
47085#line 735
47086    *((uint32 *)__cil_tmp100) = (uint32 )0;
47087#line 736
47088    __cil_tmp101 = (unsigned long )cb;
47089#line 736
47090    __cil_tmp102 = __cil_tmp101 + 12;
47091#line 736
47092    __cil_tmp103 = *((uint32_t    *)cur_size);
47093#line 736
47094    *((uint32 *)__cil_tmp102) = (uint32 )__cil_tmp103;
47095#line 737
47096    __cil_tmp104 = (unsigned long )cb;
47097#line 737
47098    __cil_tmp105 = __cil_tmp104 + 16;
47099#line 737
47100    __cil_tmp106 = (unsigned long )cur_size;
47101#line 737
47102    __cil_tmp107 = __cil_tmp106 + 4;
47103#line 737
47104    __cil_tmp108 = *((uint32_t    *)__cil_tmp107);
47105#line 737
47106    *((uint32 *)__cil_tmp105) = (uint32 )__cil_tmp108;
47107#line 738
47108    __cil_tmp109 = (unsigned long )cb;
47109#line 738
47110    __cil_tmp110 = __cil_tmp109 + 20;
47111#line 738
47112    __cil_tmp111 = (unsigned long )cur_size;
47113#line 738
47114    __cil_tmp112 = __cil_tmp111 + 8;
47115#line 738
47116    __cil_tmp113 = *((uint32_t    *)__cil_tmp112);
47117#line 738
47118    *((uint32 *)__cil_tmp110) = (uint32 )__cil_tmp113;
47119#line 740
47120    *((uint32 *)suffix) = (uint32 )12UL;
47121#line 741
47122    __cil_tmp114 = (unsigned long )suffix;
47123#line 741
47124    __cil_tmp115 = __cil_tmp114 + 4;
47125#line 741
47126    __cil_tmp116 = (unsigned long )cur_size;
47127#line 741
47128    __cil_tmp117 = __cil_tmp116 + 8;
47129#line 741
47130    __cil_tmp118 = *((uint32_t    *)__cil_tmp117);
47131#line 741
47132    __cil_tmp119 = (uint32 )__cil_tmp118;
47133#line 741
47134    __cil_tmp120 = (unsigned long )cur_size;
47135#line 741
47136    __cil_tmp121 = __cil_tmp120 + 4;
47137#line 741
47138    __cil_tmp122 = *((uint32_t    *)__cil_tmp121);
47139#line 741
47140    __cil_tmp123 = (uint32 )__cil_tmp122;
47141#line 741
47142    __cil_tmp124 = 0 + 8;
47143#line 741
47144    __cil_tmp125 = (unsigned long )body;
47145#line 741
47146    __cil_tmp126 = __cil_tmp125 + __cil_tmp124;
47147#line 741
47148    __cil_tmp127 = *((uint32 *)__cil_tmp126);
47149#line 741
47150    __cil_tmp128 = __cil_tmp127 * __cil_tmp123;
47151#line 741
47152    __cil_tmp129 = __cil_tmp128 * __cil_tmp119;
47153#line 741
47154    __cil_tmp130 = __cil_tmp129 * bpp;
47155#line 741
47156    *((uint32 *)__cil_tmp115) = __cil_tmp130 / stride_bpp;
47157#line 743
47158    __cil_tmp131 = (unsigned long )suffix;
47159#line 743
47160    __cil_tmp132 = __cil_tmp131 + 8;
47161#line 743
47162    *((uint32 *)__cil_tmp132) = (uint32 )0;
47163#line 744
47164    __cil_tmp133 = (unsigned long )suffix;
47165#line 744
47166    __cil_tmp134 = __cil_tmp133 + 8;
47167#line 744
47168    ((struct __anonstruct_SVGA3dSurfaceDMAFlags_107 *)__cil_tmp134)->unsynchronized = (uint32 )0;
47169#line 745
47170    __cil_tmp135 = (unsigned long )suffix;
47171#line 745
47172    __cil_tmp136 = __cil_tmp135 + 8;
47173#line 745
47174    ((struct __anonstruct_SVGA3dSurfaceDMAFlags_107 *)__cil_tmp136)->reserved = (uint32 )0;
47175#line 746
47176    cmd = cmd + 1;
47177#line 711
47178    i = i + 1U;
47179  }
47180  while_break: /* CIL Label */ ;
47181  }
47182#line 748
47183  return;
47184}
47185}
47186#line 751 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
47187static void vmw_hw_surface_destroy(struct vmw_resource *res ) 
47188{ struct vmw_private *dev_priv ;
47189  struct vmw_surface *srf ;
47190  void *cmd ;
47191  uint32_t tmp___7 ;
47192  long tmp___8 ;
47193  uint32_t tmp___9 ;
47194  struct vmw_resource    *__mptr ;
47195  unsigned long __cil_tmp9 ;
47196  unsigned long __cil_tmp10 ;
47197  unsigned long __cil_tmp11 ;
47198  unsigned long __cil_tmp12 ;
47199  int __cil_tmp13 ;
47200  void *__cil_tmp14 ;
47201  unsigned long __cil_tmp15 ;
47202  unsigned long __cil_tmp16 ;
47203  int __cil_tmp17 ;
47204  int __cil_tmp18 ;
47205  int __cil_tmp19 ;
47206  long __cil_tmp20 ;
47207  unsigned long __cil_tmp21 ;
47208  unsigned long __cil_tmp22 ;
47209  int __cil_tmp23 ;
47210  uint32_t __cil_tmp24 ;
47211  unsigned long __cil_tmp25 ;
47212  unsigned long __cil_tmp26 ;
47213  struct mutex *__cil_tmp27 ;
47214  struct vmw_surface *__cil_tmp28 ;
47215  struct vmw_resource *__cil_tmp29 ;
47216  unsigned int __cil_tmp30 ;
47217  char *__cil_tmp31 ;
47218  char *__cil_tmp32 ;
47219  unsigned long __cil_tmp33 ;
47220  unsigned long __cil_tmp34 ;
47221  unsigned long __cil_tmp35 ;
47222  unsigned long __cil_tmp36 ;
47223  uint32_t __cil_tmp37 ;
47224  unsigned long __cil_tmp38 ;
47225  unsigned long __cil_tmp39 ;
47226  uint32_t __cil_tmp40 ;
47227  unsigned long __cil_tmp41 ;
47228  unsigned long __cil_tmp42 ;
47229  struct mutex *__cil_tmp43 ;
47230  bool __cil_tmp44 ;
47231
47232  {
47233#line 754
47234  __cil_tmp9 = (unsigned long )res;
47235#line 754
47236  __cil_tmp10 = __cil_tmp9 + 8;
47237#line 754
47238  dev_priv = *((struct vmw_private **)__cil_tmp10);
47239  {
47240#line 758
47241  __cil_tmp11 = (unsigned long )res;
47242#line 758
47243  __cil_tmp12 = __cil_tmp11 + 24;
47244#line 758
47245  __cil_tmp13 = *((int *)__cil_tmp12);
47246#line 758
47247  if (__cil_tmp13 != -1) {
47248    {
47249#line 760
47250    tmp___7 = vmw_surface_destroy_size();
47251#line 760
47252    cmd = vmw_fifo_reserve(dev_priv, tmp___7);
47253#line 761
47254    __cil_tmp14 = (void *)0;
47255#line 761
47256    __cil_tmp15 = (unsigned long )__cil_tmp14;
47257#line 761
47258    __cil_tmp16 = (unsigned long )cmd;
47259#line 761
47260    __cil_tmp17 = __cil_tmp16 == __cil_tmp15;
47261#line 761
47262    __cil_tmp18 = ! __cil_tmp17;
47263#line 761
47264    __cil_tmp19 = ! __cil_tmp18;
47265#line 761
47266    __cil_tmp20 = (long )__cil_tmp19;
47267#line 761
47268    tmp___8 = __builtin_expect(__cil_tmp20, 0L);
47269    }
47270#line 761
47271    if (tmp___8) {
47272      {
47273#line 762
47274      drm_err("vmw_hw_surface_destroy", "Failed reserving FIFO space for surface destruction.\n");
47275      }
47276#line 764
47277      return;
47278    } else {
47279
47280    }
47281    {
47282#line 767
47283    __cil_tmp21 = (unsigned long )res;
47284#line 767
47285    __cil_tmp22 = __cil_tmp21 + 24;
47286#line 767
47287    __cil_tmp23 = *((int *)__cil_tmp22);
47288#line 767
47289    __cil_tmp24 = (uint32_t )__cil_tmp23;
47290#line 767
47291    vmw_surface_destroy_encode(__cil_tmp24, cmd);
47292#line 768
47293    tmp___9 = vmw_surface_destroy_size();
47294#line 768
47295    vmw_fifo_commit(dev_priv, tmp___9);
47296#line 776
47297    __cil_tmp25 = (unsigned long )dev_priv;
47298#line 776
47299    __cil_tmp26 = __cil_tmp25 + 134304;
47300#line 776
47301    __cil_tmp27 = (struct mutex *)__cil_tmp26;
47302#line 776
47303    mutex_lock(__cil_tmp27);
47304#line 777
47305    __mptr = (struct vmw_resource    *)res;
47306#line 777
47307    __cil_tmp28 = (struct vmw_surface *)0;
47308#line 777
47309    __cil_tmp29 = (struct vmw_resource *)__cil_tmp28;
47310#line 777
47311    __cil_tmp30 = (unsigned int )__cil_tmp29;
47312#line 777
47313    __cil_tmp31 = (char *)__mptr;
47314#line 777
47315    __cil_tmp32 = __cil_tmp31 - __cil_tmp30;
47316#line 777
47317    srf = (struct vmw_surface *)__cil_tmp32;
47318#line 778
47319    __cil_tmp33 = (unsigned long )dev_priv;
47320#line 778
47321    __cil_tmp34 = __cil_tmp33 + 134784;
47322#line 778
47323    __cil_tmp35 = (unsigned long )srf;
47324#line 778
47325    __cil_tmp36 = __cil_tmp35 + 200;
47326#line 778
47327    __cil_tmp37 = *((uint32_t *)__cil_tmp36);
47328#line 778
47329    __cil_tmp38 = (unsigned long )dev_priv;
47330#line 778
47331    __cil_tmp39 = __cil_tmp38 + 134784;
47332#line 778
47333    __cil_tmp40 = *((uint32_t *)__cil_tmp39);
47334#line 778
47335    *((uint32_t *)__cil_tmp34) = __cil_tmp40 - __cil_tmp37;
47336#line 779
47337    __cil_tmp41 = (unsigned long )dev_priv;
47338#line 779
47339    __cil_tmp42 = __cil_tmp41 + 134304;
47340#line 779
47341    __cil_tmp43 = (struct mutex *)__cil_tmp42;
47342#line 779
47343    mutex_unlock(__cil_tmp43);
47344    }
47345  } else {
47346
47347  }
47348  }
47349  {
47350#line 782
47351  __cil_tmp44 = (bool )0;
47352#line 782
47353  vmw_3d_resource_dec(dev_priv, __cil_tmp44);
47354  }
47355#line 783
47356  return;
47357}
47358}
47359#line 785 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
47360void vmw_surface_res_free(struct vmw_resource *res ) 
47361{ struct vmw_surface *srf ;
47362  struct vmw_resource    *__mptr ;
47363  struct vmw_surface *__cil_tmp4 ;
47364  struct vmw_resource *__cil_tmp5 ;
47365  unsigned int __cil_tmp6 ;
47366  char *__cil_tmp7 ;
47367  char *__cil_tmp8 ;
47368  unsigned long __cil_tmp9 ;
47369  unsigned long __cil_tmp10 ;
47370  unsigned long __cil_tmp11 ;
47371  unsigned long __cil_tmp12 ;
47372  struct ttm_buffer_object **__cil_tmp13 ;
47373  unsigned long __cil_tmp14 ;
47374  unsigned long __cil_tmp15 ;
47375  struct vmw_surface_offset *__cil_tmp16 ;
47376  void    *__cil_tmp17 ;
47377  unsigned long __cil_tmp18 ;
47378  unsigned long __cil_tmp19 ;
47379  struct drm_vmw_size *__cil_tmp20 ;
47380  void    *__cil_tmp21 ;
47381  unsigned long __cil_tmp22 ;
47382  unsigned long __cil_tmp23 ;
47383  unsigned long __cil_tmp24 ;
47384  uint32_t *__cil_tmp25 ;
47385  void    *__cil_tmp26 ;
47386  void    *__cil_tmp27 ;
47387
47388  {
47389#line 787
47390  __mptr = (struct vmw_resource    *)res;
47391#line 787
47392  __cil_tmp4 = (struct vmw_surface *)0;
47393#line 787
47394  __cil_tmp5 = (struct vmw_resource *)__cil_tmp4;
47395#line 787
47396  __cil_tmp6 = (unsigned int )__cil_tmp5;
47397#line 787
47398  __cil_tmp7 = (char *)__mptr;
47399#line 787
47400  __cil_tmp8 = __cil_tmp7 - __cil_tmp6;
47401#line 787
47402  srf = (struct vmw_surface *)__cil_tmp8;
47403  {
47404#line 789
47405  __cil_tmp9 = (unsigned long )srf;
47406#line 789
47407  __cil_tmp10 = __cil_tmp9 + 184;
47408#line 789
47409  if (*((struct ttm_buffer_object **)__cil_tmp10)) {
47410    {
47411#line 790
47412    __cil_tmp11 = (unsigned long )srf;
47413#line 790
47414    __cil_tmp12 = __cil_tmp11 + 184;
47415#line 790
47416    __cil_tmp13 = (struct ttm_buffer_object **)__cil_tmp12;
47417#line 790
47418    ttm_bo_unref(__cil_tmp13);
47419    }
47420  } else {
47421
47422  }
47423  }
47424  {
47425#line 791
47426  __cil_tmp14 = (unsigned long )srf;
47427#line 791
47428  __cil_tmp15 = __cil_tmp14 + 192;
47429#line 791
47430  __cil_tmp16 = *((struct vmw_surface_offset **)__cil_tmp15);
47431#line 791
47432  __cil_tmp17 = (void    *)__cil_tmp16;
47433#line 791
47434  kfree(__cil_tmp17);
47435#line 792
47436  __cil_tmp18 = (unsigned long )srf;
47437#line 792
47438  __cil_tmp19 = __cil_tmp18 + 144;
47439#line 792
47440  __cil_tmp20 = *((struct drm_vmw_size **)__cil_tmp19);
47441#line 792
47442  __cil_tmp21 = (void    *)__cil_tmp20;
47443#line 792
47444  kfree(__cil_tmp21);
47445#line 793
47446  __cil_tmp22 = 160 + 16;
47447#line 793
47448  __cil_tmp23 = (unsigned long )srf;
47449#line 793
47450  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
47451#line 793
47452  __cil_tmp25 = *((uint32_t **)__cil_tmp24);
47453#line 793
47454  __cil_tmp26 = (void    *)__cil_tmp25;
47455#line 793
47456  kfree(__cil_tmp26);
47457#line 794
47458  __cil_tmp27 = (void    *)srf;
47459#line 794
47460  kfree(__cil_tmp27);
47461  }
47462#line 795
47463  return;
47464}
47465}
47466#line 812 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
47467int vmw_surface_do_validate(struct vmw_private *dev_priv , struct vmw_surface *srf ) 
47468{ struct vmw_resource *res ;
47469  struct list_head val_list ;
47470  struct ttm_validate_buffer val_buf ;
47471  uint32_t submit_size ;
47472  uint8_t *cmd ;
47473  int ret ;
47474  long tmp___7 ;
47475  long tmp___8 ;
47476  long tmp___9 ;
47477  long tmp___10 ;
47478  long tmp___11 ;
47479  long tmp___12 ;
47480  uint32_t tmp___13 ;
47481  void *tmp___14 ;
47482  long tmp___15 ;
47483  SVGAGuestPtr ptr ;
47484  uint32_t tmp___16 ;
47485  struct vmw_fence_obj *fence ;
47486  long tmp___17 ;
47487  unsigned long __cil_tmp22 ;
47488  unsigned long __cil_tmp23 ;
47489  int __cil_tmp24 ;
47490  int __cil_tmp25 ;
47491  int __cil_tmp26 ;
47492  int __cil_tmp27 ;
47493  long __cil_tmp28 ;
47494  unsigned long __cil_tmp29 ;
47495  unsigned long __cil_tmp30 ;
47496  uint32_t __cil_tmp31 ;
47497  unsigned long __cil_tmp32 ;
47498  unsigned long __cil_tmp33 ;
47499  uint32_t __cil_tmp34 ;
47500  unsigned long __cil_tmp35 ;
47501  unsigned long __cil_tmp36 ;
47502  uint32_t __cil_tmp37 ;
47503  uint32_t __cil_tmp38 ;
47504  int __cil_tmp39 ;
47505  int __cil_tmp40 ;
47506  int __cil_tmp41 ;
47507  long __cil_tmp42 ;
47508  unsigned long __cil_tmp43 ;
47509  unsigned long __cil_tmp44 ;
47510  unsigned long __cil_tmp45 ;
47511  unsigned long __cil_tmp46 ;
47512  unsigned long __cil_tmp47 ;
47513  struct ttm_buffer_object *__cil_tmp48 ;
47514  unsigned long __cil_tmp49 ;
47515  struct ttm_validate_buffer *__cil_tmp50 ;
47516  struct list_head *__cil_tmp51 ;
47517  int __cil_tmp52 ;
47518  int __cil_tmp53 ;
47519  int __cil_tmp54 ;
47520  long __cil_tmp55 ;
47521  unsigned long __cil_tmp56 ;
47522  unsigned long __cil_tmp57 ;
47523  struct ttm_buffer_object *__cil_tmp58 ;
47524  bool __cil_tmp59 ;
47525  bool __cil_tmp60 ;
47526  bool __cil_tmp61 ;
47527  int __cil_tmp62 ;
47528  int __cil_tmp63 ;
47529  int __cil_tmp64 ;
47530  long __cil_tmp65 ;
47531  int __cil_tmp66 ;
47532  int __cil_tmp67 ;
47533  int __cil_tmp68 ;
47534  long __cil_tmp69 ;
47535  unsigned long __cil_tmp70 ;
47536  unsigned long __cil_tmp71 ;
47537  int __cil_tmp72 ;
47538  int __cil_tmp73 ;
47539  int __cil_tmp74 ;
47540  int __cil_tmp75 ;
47541  long __cil_tmp76 ;
47542  struct vmw_surface    *__cil_tmp77 ;
47543  unsigned long __cil_tmp78 ;
47544  unsigned long __cil_tmp79 ;
47545  struct vmw_surface    *__cil_tmp80 ;
47546  void *__cil_tmp81 ;
47547  unsigned long __cil_tmp82 ;
47548  unsigned long __cil_tmp83 ;
47549  int __cil_tmp84 ;
47550  int __cil_tmp85 ;
47551  int __cil_tmp86 ;
47552  long __cil_tmp87 ;
47553  struct vmw_surface    *__cil_tmp88 ;
47554  void *__cil_tmp89 ;
47555  unsigned long __cil_tmp90 ;
47556  unsigned long __cil_tmp91 ;
47557  struct vmw_surface    *__cil_tmp92 ;
47558  unsigned long __cil_tmp93 ;
47559  unsigned long __cil_tmp94 ;
47560  struct ttm_buffer_object *__cil_tmp95 ;
47561  struct ttm_buffer_object    *__cil_tmp96 ;
47562  void *__cil_tmp97 ;
47563  SVGAGuestPtr    *__cil_tmp98 ;
47564  bool __cil_tmp99 ;
47565  unsigned long __cil_tmp100 ;
47566  unsigned long __cil_tmp101 ;
47567  void *__cil_tmp102 ;
47568  struct drm_file *__cil_tmp103 ;
47569  void *__cil_tmp104 ;
47570  uint32_t *__cil_tmp105 ;
47571  struct vmw_fence_obj **__cil_tmp106 ;
47572  struct vmw_fence_obj *__cil_tmp107 ;
47573  void *__cil_tmp108 ;
47574  void *__cil_tmp109 ;
47575  unsigned long __cil_tmp110 ;
47576  struct vmw_fence_obj **__cil_tmp111 ;
47577  struct vmw_fence_obj *__cil_tmp112 ;
47578  unsigned long __cil_tmp113 ;
47579  int __cil_tmp114 ;
47580  int __cil_tmp115 ;
47581  int __cil_tmp116 ;
47582  long __cil_tmp117 ;
47583  unsigned long __cil_tmp118 ;
47584  struct ttm_buffer_object **__cil_tmp119 ;
47585  unsigned long __cil_tmp120 ;
47586  unsigned long __cil_tmp121 ;
47587  struct ttm_buffer_object **__cil_tmp122 ;
47588  unsigned long __cil_tmp123 ;
47589  unsigned long __cil_tmp124 ;
47590  unsigned long __cil_tmp125 ;
47591  unsigned long __cil_tmp126 ;
47592  uint32_t __cil_tmp127 ;
47593  unsigned long __cil_tmp128 ;
47594  unsigned long __cil_tmp129 ;
47595  uint32_t __cil_tmp130 ;
47596  unsigned long __cil_tmp131 ;
47597  unsigned long __cil_tmp132 ;
47598  unsigned long __cil_tmp133 ;
47599  unsigned long __cil_tmp134 ;
47600  unsigned long __cil_tmp135 ;
47601  struct ttm_buffer_object **__cil_tmp136 ;
47602
47603  {
47604  {
47605#line 815
47606  res = (struct vmw_resource *)srf;
47607#line 822
47608  __cil_tmp22 = (unsigned long )res;
47609#line 822
47610  __cil_tmp23 = __cil_tmp22 + 24;
47611#line 822
47612  __cil_tmp24 = *((int *)__cil_tmp23);
47613#line 822
47614  __cil_tmp25 = __cil_tmp24 != -1;
47615#line 822
47616  __cil_tmp26 = ! __cil_tmp25;
47617#line 822
47618  __cil_tmp27 = ! __cil_tmp26;
47619#line 822
47620  __cil_tmp28 = (long )__cil_tmp27;
47621#line 822
47622  tmp___7 = __builtin_expect(__cil_tmp28, 1L);
47623  }
47624#line 822
47625  if (tmp___7) {
47626#line 823
47627    return (0);
47628  } else {
47629
47630  }
47631  {
47632#line 825
47633  __cil_tmp29 = (unsigned long )dev_priv;
47634#line 825
47635  __cil_tmp30 = __cil_tmp29 + 2172;
47636#line 825
47637  __cil_tmp31 = *((uint32_t *)__cil_tmp30);
47638#line 825
47639  __cil_tmp32 = (unsigned long )srf;
47640#line 825
47641  __cil_tmp33 = __cil_tmp32 + 200;
47642#line 825
47643  __cil_tmp34 = *((uint32_t *)__cil_tmp33);
47644#line 825
47645  __cil_tmp35 = (unsigned long )dev_priv;
47646#line 825
47647  __cil_tmp36 = __cil_tmp35 + 134784;
47648#line 825
47649  __cil_tmp37 = *((uint32_t *)__cil_tmp36);
47650#line 825
47651  __cil_tmp38 = __cil_tmp37 + __cil_tmp34;
47652#line 825
47653  __cil_tmp39 = __cil_tmp38 >= __cil_tmp31;
47654#line 825
47655  __cil_tmp40 = ! __cil_tmp39;
47656#line 825
47657  __cil_tmp41 = ! __cil_tmp40;
47658#line 825
47659  __cil_tmp42 = (long )__cil_tmp41;
47660#line 825
47661  tmp___8 = __builtin_expect(__cil_tmp42, 0L);
47662  }
47663#line 825
47664  if (tmp___8) {
47665#line 827
47666    return (-16);
47667  } else {
47668
47669  }
47670  {
47671#line 833
47672  __cil_tmp43 = (unsigned long )srf;
47673#line 833
47674  __cil_tmp44 = __cil_tmp43 + 184;
47675#line 833
47676  if (*((struct ttm_buffer_object **)__cil_tmp44)) {
47677    {
47678#line 834
47679    INIT_LIST_HEAD(& val_list);
47680#line 835
47681    __cil_tmp45 = (unsigned long )(& val_buf) + 16;
47682#line 835
47683    __cil_tmp46 = (unsigned long )srf;
47684#line 835
47685    __cil_tmp47 = __cil_tmp46 + 184;
47686#line 835
47687    __cil_tmp48 = *((struct ttm_buffer_object **)__cil_tmp47);
47688#line 835
47689    *((struct ttm_buffer_object **)__cil_tmp45) = ttm_bo_reference(__cil_tmp48);
47690#line 836
47691    __cil_tmp49 = (unsigned long )(& val_buf) + 24;
47692#line 836
47693    *((void **)__cil_tmp49) = (void *)1UL;
47694#line 838
47695    __cil_tmp50 = & val_buf;
47696#line 838
47697    __cil_tmp51 = (struct list_head *)__cil_tmp50;
47698#line 838
47699    list_add_tail(__cil_tmp51, & val_list);
47700#line 839
47701    ret = ttm_eu_reserve_buffers(& val_list);
47702#line 840
47703    __cil_tmp52 = ret != 0;
47704#line 840
47705    __cil_tmp53 = ! __cil_tmp52;
47706#line 840
47707    __cil_tmp54 = ! __cil_tmp53;
47708#line 840
47709    __cil_tmp55 = (long )__cil_tmp54;
47710#line 840
47711    tmp___9 = __builtin_expect(__cil_tmp55, 0L);
47712    }
47713#line 840
47714    if (tmp___9) {
47715#line 841
47716      goto out_no_reserve;
47717    } else {
47718
47719    }
47720    {
47721#line 843
47722    __cil_tmp56 = (unsigned long )srf;
47723#line 843
47724    __cil_tmp57 = __cil_tmp56 + 184;
47725#line 843
47726    __cil_tmp58 = *((struct ttm_buffer_object **)__cil_tmp57);
47727#line 843
47728    __cil_tmp59 = (bool )1;
47729#line 843
47730    __cil_tmp60 = (bool )0;
47731#line 843
47732    __cil_tmp61 = (bool )0;
47733#line 843
47734    ret = ttm_bo_validate(__cil_tmp58, & vmw_srf_placement, __cil_tmp59, __cil_tmp60,
47735                          __cil_tmp61);
47736#line 845
47737    __cil_tmp62 = ret != 0;
47738#line 845
47739    __cil_tmp63 = ! __cil_tmp62;
47740#line 845
47741    __cil_tmp64 = ! __cil_tmp63;
47742#line 845
47743    __cil_tmp65 = (long )__cil_tmp64;
47744#line 845
47745    tmp___10 = __builtin_expect(__cil_tmp65, 0L);
47746    }
47747#line 845
47748    if (tmp___10) {
47749#line 846
47750      goto out_no_id;
47751    } else {
47752
47753    }
47754  } else {
47755
47756  }
47757  }
47758  {
47759#line 853
47760  ret = vmw_resource_alloc_id(dev_priv, res);
47761#line 854
47762  __cil_tmp66 = ret != 0;
47763#line 854
47764  __cil_tmp67 = ! __cil_tmp66;
47765#line 854
47766  __cil_tmp68 = ! __cil_tmp67;
47767#line 854
47768  __cil_tmp69 = (long )__cil_tmp68;
47769#line 854
47770  tmp___11 = __builtin_expect(__cil_tmp69, 0L);
47771  }
47772#line 854
47773  if (tmp___11) {
47774    {
47775#line 855
47776    drm_err("vmw_surface_do_validate", "Failed to allocate a surface id.\n");
47777    }
47778#line 856
47779    goto out_no_id;
47780  } else {
47781
47782  }
47783  {
47784#line 858
47785  __cil_tmp70 = (unsigned long )res;
47786#line 858
47787  __cil_tmp71 = __cil_tmp70 + 24;
47788#line 858
47789  __cil_tmp72 = *((int *)__cil_tmp71);
47790#line 858
47791  __cil_tmp73 = __cil_tmp72 >= 32768;
47792#line 858
47793  __cil_tmp74 = ! __cil_tmp73;
47794#line 858
47795  __cil_tmp75 = ! __cil_tmp74;
47796#line 858
47797  __cil_tmp76 = (long )__cil_tmp75;
47798#line 858
47799  tmp___12 = __builtin_expect(__cil_tmp76, 0L);
47800  }
47801#line 858
47802  if (tmp___12) {
47803#line 859
47804    ret = -16;
47805#line 860
47806    goto out_no_fifo;
47807  } else {
47808
47809  }
47810  {
47811#line 868
47812  __cil_tmp77 = (struct vmw_surface    *)srf;
47813#line 868
47814  submit_size = vmw_surface_define_size(__cil_tmp77);
47815  }
47816  {
47817#line 869
47818  __cil_tmp78 = (unsigned long )srf;
47819#line 869
47820  __cil_tmp79 = __cil_tmp78 + 184;
47821#line 869
47822  if (*((struct ttm_buffer_object **)__cil_tmp79)) {
47823    {
47824#line 870
47825    __cil_tmp80 = (struct vmw_surface    *)srf;
47826#line 870
47827    tmp___13 = vmw_surface_dma_size(__cil_tmp80);
47828#line 870
47829    submit_size = submit_size + tmp___13;
47830    }
47831  } else {
47832
47833  }
47834  }
47835  {
47836#line 872
47837  tmp___14 = vmw_fifo_reserve(dev_priv, submit_size);
47838#line 872
47839  cmd = (uint8_t *)tmp___14;
47840#line 873
47841  __cil_tmp81 = (void *)0;
47842#line 873
47843  __cil_tmp82 = (unsigned long )__cil_tmp81;
47844#line 873
47845  __cil_tmp83 = (unsigned long )cmd;
47846#line 873
47847  __cil_tmp84 = __cil_tmp83 == __cil_tmp82;
47848#line 873
47849  __cil_tmp85 = ! __cil_tmp84;
47850#line 873
47851  __cil_tmp86 = ! __cil_tmp85;
47852#line 873
47853  __cil_tmp87 = (long )__cil_tmp86;
47854#line 873
47855  tmp___15 = __builtin_expect(__cil_tmp87, 0L);
47856  }
47857#line 873
47858  if (tmp___15) {
47859    {
47860#line 874
47861    drm_err("vmw_surface_do_validate", "Failed reserving FIFO space for surface validation.\n");
47862#line 876
47863    ret = -12;
47864    }
47865#line 877
47866    goto out_no_fifo;
47867  } else {
47868
47869  }
47870  {
47871#line 880
47872  __cil_tmp88 = (struct vmw_surface    *)srf;
47873#line 880
47874  __cil_tmp89 = (void *)cmd;
47875#line 880
47876  vmw_surface_define_encode(__cil_tmp88, __cil_tmp89);
47877  }
47878  {
47879#line 881
47880  __cil_tmp90 = (unsigned long )srf;
47881#line 881
47882  __cil_tmp91 = __cil_tmp90 + 184;
47883#line 881
47884  if (*((struct ttm_buffer_object **)__cil_tmp91)) {
47885    {
47886#line 884
47887    __cil_tmp92 = (struct vmw_surface    *)srf;
47888#line 884
47889    tmp___16 = vmw_surface_define_size(__cil_tmp92);
47890#line 884
47891    cmd = cmd + tmp___16;
47892#line 885
47893    __cil_tmp93 = (unsigned long )srf;
47894#line 885
47895    __cil_tmp94 = __cil_tmp93 + 184;
47896#line 885
47897    __cil_tmp95 = *((struct ttm_buffer_object **)__cil_tmp94);
47898#line 885
47899    __cil_tmp96 = (struct ttm_buffer_object    *)__cil_tmp95;
47900#line 885
47901    vmw_bo_get_guest_ptr(__cil_tmp96, & ptr);
47902#line 886
47903    __cil_tmp97 = (void *)cmd;
47904#line 886
47905    __cil_tmp98 = (SVGAGuestPtr    *)(& ptr);
47906#line 886
47907    __cil_tmp99 = (bool )1;
47908#line 886
47909    vmw_surface_dma_encode(srf, __cil_tmp97, __cil_tmp98, __cil_tmp99);
47910    }
47911  } else {
47912
47913  }
47914  }
47915  {
47916#line 889
47917  vmw_fifo_commit(dev_priv, submit_size);
47918  }
47919  {
47920#line 895
47921  __cil_tmp100 = (unsigned long )srf;
47922#line 895
47923  __cil_tmp101 = __cil_tmp100 + 184;
47924#line 895
47925  if (*((struct ttm_buffer_object **)__cil_tmp101)) {
47926    {
47927#line 898
47928    __cil_tmp102 = (void *)0;
47929#line 898
47930    __cil_tmp103 = (struct drm_file *)__cil_tmp102;
47931#line 898
47932    __cil_tmp104 = (void *)0;
47933#line 898
47934    __cil_tmp105 = (uint32_t *)__cil_tmp104;
47935#line 898
47936    vmw_execbuf_fence_commands(__cil_tmp103, dev_priv, & fence, __cil_tmp105);
47937#line 900
47938    __cil_tmp106 = & fence;
47939#line 900
47940    __cil_tmp107 = *__cil_tmp106;
47941#line 900
47942    __cil_tmp108 = (void *)__cil_tmp107;
47943#line 900
47944    ttm_eu_fence_buffer_objects(& val_list, __cil_tmp108);
47945#line 901
47946    __cil_tmp109 = (void *)0;
47947#line 901
47948    __cil_tmp110 = (unsigned long )__cil_tmp109;
47949#line 901
47950    __cil_tmp111 = & fence;
47951#line 901
47952    __cil_tmp112 = *__cil_tmp111;
47953#line 901
47954    __cil_tmp113 = (unsigned long )__cil_tmp112;
47955#line 901
47956    __cil_tmp114 = __cil_tmp113 != __cil_tmp110;
47957#line 901
47958    __cil_tmp115 = ! __cil_tmp114;
47959#line 901
47960    __cil_tmp116 = ! __cil_tmp115;
47961#line 901
47962    __cil_tmp117 = (long )__cil_tmp116;
47963#line 901
47964    tmp___17 = __builtin_expect(__cil_tmp117, 1L);
47965    }
47966#line 901
47967    if (tmp___17) {
47968      {
47969#line 902
47970      vmw_fence_obj_unreference(& fence);
47971      }
47972    } else {
47973
47974    }
47975    {
47976#line 903
47977    __cil_tmp118 = (unsigned long )(& val_buf) + 16;
47978#line 903
47979    __cil_tmp119 = (struct ttm_buffer_object **)__cil_tmp118;
47980#line 903
47981    ttm_bo_unref(__cil_tmp119);
47982#line 904
47983    __cil_tmp120 = (unsigned long )srf;
47984#line 904
47985    __cil_tmp121 = __cil_tmp120 + 184;
47986#line 904
47987    __cil_tmp122 = (struct ttm_buffer_object **)__cil_tmp121;
47988#line 904
47989    ttm_bo_unref(__cil_tmp122);
47990    }
47991  } else {
47992
47993  }
47994  }
47995#line 911
47996  __cil_tmp123 = (unsigned long )dev_priv;
47997#line 911
47998  __cil_tmp124 = __cil_tmp123 + 134784;
47999#line 911
48000  __cil_tmp125 = (unsigned long )srf;
48001#line 911
48002  __cil_tmp126 = __cil_tmp125 + 200;
48003#line 911
48004  __cil_tmp127 = *((uint32_t *)__cil_tmp126);
48005#line 911
48006  __cil_tmp128 = (unsigned long )dev_priv;
48007#line 911
48008  __cil_tmp129 = __cil_tmp128 + 134784;
48009#line 911
48010  __cil_tmp130 = *((uint32_t *)__cil_tmp129);
48011#line 911
48012  *((uint32_t *)__cil_tmp124) = __cil_tmp130 + __cil_tmp127;
48013#line 913
48014  return (0);
48015  out_no_fifo: 
48016  {
48017#line 916
48018  vmw_resource_release_id(res);
48019  }
48020  out_no_id: 
48021  {
48022#line 919
48023  __cil_tmp131 = (unsigned long )srf;
48024#line 919
48025  __cil_tmp132 = __cil_tmp131 + 184;
48026#line 919
48027  if (*((struct ttm_buffer_object **)__cil_tmp132)) {
48028    {
48029#line 920
48030    ttm_eu_backoff_reservation(& val_list);
48031    }
48032  } else {
48033
48034  }
48035  }
48036  out_no_reserve: 
48037  {
48038#line 922
48039  __cil_tmp133 = (unsigned long )srf;
48040#line 922
48041  __cil_tmp134 = __cil_tmp133 + 184;
48042#line 922
48043  if (*((struct ttm_buffer_object **)__cil_tmp134)) {
48044    {
48045#line 923
48046    __cil_tmp135 = (unsigned long )(& val_buf) + 16;
48047#line 923
48048    __cil_tmp136 = (struct ttm_buffer_object **)__cil_tmp135;
48049#line 923
48050    ttm_bo_unref(__cil_tmp136);
48051    }
48052  } else {
48053
48054  }
48055  }
48056#line 924
48057  return (ret);
48058}
48059}
48060#line 936 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
48061int vmw_surface_evict(struct vmw_private *dev_priv , struct vmw_surface *srf ) 
48062{ struct vmw_resource *res ;
48063  struct list_head val_list ;
48064  struct ttm_validate_buffer val_buf ;
48065  uint32_t submit_size ;
48066  uint8_t *cmd ;
48067  int ret ;
48068  struct vmw_fence_obj *fence ;
48069  SVGAGuestPtr ptr ;
48070  long tmp___7 ;
48071  long tmp___8 ;
48072  long tmp___9 ;
48073  long tmp___10 ;
48074  uint32_t tmp___11 ;
48075  uint32_t tmp___12 ;
48076  void *tmp___13 ;
48077  long tmp___14 ;
48078  uint32_t tmp___15 ;
48079  long tmp___16 ;
48080  unsigned long __cil_tmp21 ;
48081  unsigned long __cil_tmp22 ;
48082  int __cil_tmp23 ;
48083  int __cil_tmp24 ;
48084  int __cil_tmp25 ;
48085  int __cil_tmp26 ;
48086  long __cil_tmp27 ;
48087  unsigned long __cil_tmp28 ;
48088  unsigned long __cil_tmp29 ;
48089  struct ttm_buffer_object *__cil_tmp30 ;
48090  struct ttm_bo_device *__cil_tmp31 ;
48091  unsigned long __cil_tmp32 ;
48092  unsigned long __cil_tmp33 ;
48093  uint32_t __cil_tmp34 ;
48094  unsigned long __cil_tmp35 ;
48095  enum ttm_bo_type __cil_tmp36 ;
48096  uint32_t __cil_tmp37 ;
48097  bool __cil_tmp38 ;
48098  void *__cil_tmp39 ;
48099  struct file *__cil_tmp40 ;
48100  unsigned long __cil_tmp41 ;
48101  unsigned long __cil_tmp42 ;
48102  struct ttm_buffer_object **__cil_tmp43 ;
48103  int __cil_tmp44 ;
48104  int __cil_tmp45 ;
48105  int __cil_tmp46 ;
48106  long __cil_tmp47 ;
48107  unsigned long __cil_tmp48 ;
48108  unsigned long __cil_tmp49 ;
48109  unsigned long __cil_tmp50 ;
48110  struct ttm_buffer_object *__cil_tmp51 ;
48111  unsigned long __cil_tmp52 ;
48112  struct ttm_validate_buffer *__cil_tmp53 ;
48113  struct list_head *__cil_tmp54 ;
48114  int __cil_tmp55 ;
48115  int __cil_tmp56 ;
48116  int __cil_tmp57 ;
48117  long __cil_tmp58 ;
48118  unsigned long __cil_tmp59 ;
48119  unsigned long __cil_tmp60 ;
48120  struct ttm_buffer_object *__cil_tmp61 ;
48121  bool __cil_tmp62 ;
48122  bool __cil_tmp63 ;
48123  bool __cil_tmp64 ;
48124  int __cil_tmp65 ;
48125  int __cil_tmp66 ;
48126  int __cil_tmp67 ;
48127  long __cil_tmp68 ;
48128  struct vmw_surface    *__cil_tmp69 ;
48129  void *__cil_tmp70 ;
48130  unsigned long __cil_tmp71 ;
48131  unsigned long __cil_tmp72 ;
48132  int __cil_tmp73 ;
48133  int __cil_tmp74 ;
48134  int __cil_tmp75 ;
48135  long __cil_tmp76 ;
48136  unsigned long __cil_tmp77 ;
48137  unsigned long __cil_tmp78 ;
48138  struct ttm_buffer_object *__cil_tmp79 ;
48139  struct ttm_buffer_object    *__cil_tmp80 ;
48140  void *__cil_tmp81 ;
48141  SVGAGuestPtr    *__cil_tmp82 ;
48142  bool __cil_tmp83 ;
48143  struct vmw_surface    *__cil_tmp84 ;
48144  unsigned long __cil_tmp85 ;
48145  unsigned long __cil_tmp86 ;
48146  int __cil_tmp87 ;
48147  uint32_t __cil_tmp88 ;
48148  void *__cil_tmp89 ;
48149  unsigned long __cil_tmp90 ;
48150  unsigned long __cil_tmp91 ;
48151  unsigned long __cil_tmp92 ;
48152  unsigned long __cil_tmp93 ;
48153  uint32_t __cil_tmp94 ;
48154  unsigned long __cil_tmp95 ;
48155  unsigned long __cil_tmp96 ;
48156  uint32_t __cil_tmp97 ;
48157  void *__cil_tmp98 ;
48158  struct drm_file *__cil_tmp99 ;
48159  void *__cil_tmp100 ;
48160  uint32_t *__cil_tmp101 ;
48161  struct vmw_fence_obj **__cil_tmp102 ;
48162  struct vmw_fence_obj *__cil_tmp103 ;
48163  void *__cil_tmp104 ;
48164  void *__cil_tmp105 ;
48165  unsigned long __cil_tmp106 ;
48166  struct vmw_fence_obj **__cil_tmp107 ;
48167  struct vmw_fence_obj *__cil_tmp108 ;
48168  unsigned long __cil_tmp109 ;
48169  int __cil_tmp110 ;
48170  int __cil_tmp111 ;
48171  int __cil_tmp112 ;
48172  long __cil_tmp113 ;
48173  unsigned long __cil_tmp114 ;
48174  struct ttm_buffer_object **__cil_tmp115 ;
48175  unsigned long __cil_tmp116 ;
48176  unsigned long __cil_tmp117 ;
48177  unsigned long __cil_tmp118 ;
48178  struct ttm_buffer_object **__cil_tmp119 ;
48179  unsigned long __cil_tmp120 ;
48180  unsigned long __cil_tmp121 ;
48181  struct ttm_buffer_object **__cil_tmp122 ;
48182
48183  {
48184#line 939
48185  res = (struct vmw_resource *)srf;
48186  {
48187#line 948
48188  while (1) {
48189    while_continue: /* CIL Label */ ;
48190    {
48191#line 948
48192    __cil_tmp21 = (unsigned long )res;
48193#line 948
48194    __cil_tmp22 = __cil_tmp21 + 24;
48195#line 948
48196    __cil_tmp23 = *((int *)__cil_tmp22);
48197#line 948
48198    __cil_tmp24 = __cil_tmp23 == -1;
48199#line 948
48200    __cil_tmp25 = ! __cil_tmp24;
48201#line 948
48202    __cil_tmp26 = ! __cil_tmp25;
48203#line 948
48204    __cil_tmp27 = (long )__cil_tmp26;
48205#line 948
48206    tmp___7 = __builtin_expect(__cil_tmp27, 0L);
48207    }
48208#line 948
48209    if (tmp___7) {
48210      {
48211#line 948
48212      while (1) {
48213        while_continue___0: /* CIL Label */ ;
48214#line 948
48215        __asm__  volatile   ("1:\tud2\n"
48216                             ".pushsection __bug_table,\"a\"\n"
48217                             "2:\t.long 1b - 2b, %c0 - 2b\n"
48218                             "\t.word %c1, 0\n"
48219                             "\t.org 2b+%c2\n"
48220                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"),
48221                             "i" (948), "i" (12UL));
48222        {
48223#line 948
48224        while (1) {
48225          while_continue___1: /* CIL Label */ ;
48226        }
48227        while_break___1: /* CIL Label */ ;
48228        }
48229#line 948
48230        goto while_break___0;
48231      }
48232      while_break___0: /* CIL Label */ ;
48233      }
48234    } else {
48235
48236    }
48237#line 948
48238    goto while_break;
48239  }
48240  while_break: /* CIL Label */ ;
48241  }
48242  {
48243#line 954
48244  __cil_tmp28 = (unsigned long )srf;
48245#line 954
48246  __cil_tmp29 = __cil_tmp28 + 184;
48247#line 954
48248  __cil_tmp30 = *((struct ttm_buffer_object **)__cil_tmp29);
48249#line 954
48250  if (! __cil_tmp30) {
48251    {
48252#line 955
48253    __cil_tmp31 = (struct ttm_bo_device *)dev_priv;
48254#line 955
48255    __cil_tmp32 = (unsigned long )srf;
48256#line 955
48257    __cil_tmp33 = __cil_tmp32 + 200;
48258#line 955
48259    __cil_tmp34 = *((uint32_t *)__cil_tmp33);
48260#line 955
48261    __cil_tmp35 = (unsigned long )__cil_tmp34;
48262#line 955
48263    __cil_tmp36 = (enum ttm_bo_type )0;
48264#line 955
48265    __cil_tmp37 = (uint32_t )0;
48266#line 955
48267    __cil_tmp38 = (bool )1;
48268#line 955
48269    __cil_tmp39 = (void *)0;
48270#line 955
48271    __cil_tmp40 = (struct file *)__cil_tmp39;
48272#line 955
48273    __cil_tmp41 = (unsigned long )srf;
48274#line 955
48275    __cil_tmp42 = __cil_tmp41 + 184;
48276#line 955
48277    __cil_tmp43 = (struct ttm_buffer_object **)__cil_tmp42;
48278#line 955
48279    ret = ttm_bo_create(__cil_tmp31, __cil_tmp35, __cil_tmp36, & vmw_srf_placement,
48280                        __cil_tmp37, 0UL, __cil_tmp38, __cil_tmp40, __cil_tmp43);
48281#line 959
48282    __cil_tmp44 = ret != 0;
48283#line 959
48284    __cil_tmp45 = ! __cil_tmp44;
48285#line 959
48286    __cil_tmp46 = ! __cil_tmp45;
48287#line 959
48288    __cil_tmp47 = (long )__cil_tmp46;
48289#line 959
48290    tmp___8 = __builtin_expect(__cil_tmp47, 0L);
48291    }
48292#line 959
48293    if (tmp___8) {
48294#line 960
48295      return (ret);
48296    } else {
48297
48298    }
48299  } else {
48300
48301  }
48302  }
48303  {
48304#line 967
48305  INIT_LIST_HEAD(& val_list);
48306#line 968
48307  __cil_tmp48 = (unsigned long )(& val_buf) + 16;
48308#line 968
48309  __cil_tmp49 = (unsigned long )srf;
48310#line 968
48311  __cil_tmp50 = __cil_tmp49 + 184;
48312#line 968
48313  __cil_tmp51 = *((struct ttm_buffer_object **)__cil_tmp50);
48314#line 968
48315  *((struct ttm_buffer_object **)__cil_tmp48) = ttm_bo_reference(__cil_tmp51);
48316#line 969
48317  __cil_tmp52 = (unsigned long )(& val_buf) + 24;
48318#line 969
48319  *((void **)__cil_tmp52) = (void *)1UL;
48320#line 971
48321  __cil_tmp53 = & val_buf;
48322#line 971
48323  __cil_tmp54 = (struct list_head *)__cil_tmp53;
48324#line 971
48325  list_add_tail(__cil_tmp54, & val_list);
48326#line 972
48327  ret = ttm_eu_reserve_buffers(& val_list);
48328#line 973
48329  __cil_tmp55 = ret != 0;
48330#line 973
48331  __cil_tmp56 = ! __cil_tmp55;
48332#line 973
48333  __cil_tmp57 = ! __cil_tmp56;
48334#line 973
48335  __cil_tmp58 = (long )__cil_tmp57;
48336#line 973
48337  tmp___9 = __builtin_expect(__cil_tmp58, 0L);
48338  }
48339#line 973
48340  if (tmp___9) {
48341#line 974
48342    goto out_no_reserve;
48343  } else {
48344
48345  }
48346  {
48347#line 976
48348  __cil_tmp59 = (unsigned long )srf;
48349#line 976
48350  __cil_tmp60 = __cil_tmp59 + 184;
48351#line 976
48352  __cil_tmp61 = *((struct ttm_buffer_object **)__cil_tmp60);
48353#line 976
48354  __cil_tmp62 = (bool )1;
48355#line 976
48356  __cil_tmp63 = (bool )0;
48357#line 976
48358  __cil_tmp64 = (bool )0;
48359#line 976
48360  ret = ttm_bo_validate(__cil_tmp61, & vmw_srf_placement, __cil_tmp62, __cil_tmp63,
48361                        __cil_tmp64);
48362#line 978
48363  __cil_tmp65 = ret != 0;
48364#line 978
48365  __cil_tmp66 = ! __cil_tmp65;
48366#line 978
48367  __cil_tmp67 = ! __cil_tmp66;
48368#line 978
48369  __cil_tmp68 = (long )__cil_tmp67;
48370#line 978
48371  tmp___10 = __builtin_expect(__cil_tmp68, 0L);
48372  }
48373#line 978
48374  if (tmp___10) {
48375#line 979
48376    goto out_no_fifo;
48377  } else {
48378
48379  }
48380  {
48381#line 986
48382  __cil_tmp69 = (struct vmw_surface    *)srf;
48383#line 986
48384  tmp___11 = vmw_surface_dma_size(__cil_tmp69);
48385#line 986
48386  tmp___12 = vmw_surface_destroy_size();
48387#line 986
48388  submit_size = tmp___11 + tmp___12;
48389#line 987
48390  tmp___13 = vmw_fifo_reserve(dev_priv, submit_size);
48391#line 987
48392  cmd = (uint8_t *)tmp___13;
48393#line 988
48394  __cil_tmp70 = (void *)0;
48395#line 988
48396  __cil_tmp71 = (unsigned long )__cil_tmp70;
48397#line 988
48398  __cil_tmp72 = (unsigned long )cmd;
48399#line 988
48400  __cil_tmp73 = __cil_tmp72 == __cil_tmp71;
48401#line 988
48402  __cil_tmp74 = ! __cil_tmp73;
48403#line 988
48404  __cil_tmp75 = ! __cil_tmp74;
48405#line 988
48406  __cil_tmp76 = (long )__cil_tmp75;
48407#line 988
48408  tmp___14 = __builtin_expect(__cil_tmp76, 0L);
48409  }
48410#line 988
48411  if (tmp___14) {
48412    {
48413#line 989
48414    drm_err("vmw_surface_evict", "Failed reserving FIFO space for surface eviction.\n");
48415#line 991
48416    ret = -12;
48417    }
48418#line 992
48419    goto out_no_fifo;
48420  } else {
48421
48422  }
48423  {
48424#line 995
48425  __cil_tmp77 = (unsigned long )srf;
48426#line 995
48427  __cil_tmp78 = __cil_tmp77 + 184;
48428#line 995
48429  __cil_tmp79 = *((struct ttm_buffer_object **)__cil_tmp78);
48430#line 995
48431  __cil_tmp80 = (struct ttm_buffer_object    *)__cil_tmp79;
48432#line 995
48433  vmw_bo_get_guest_ptr(__cil_tmp80, & ptr);
48434#line 996
48435  __cil_tmp81 = (void *)cmd;
48436#line 996
48437  __cil_tmp82 = (SVGAGuestPtr    *)(& ptr);
48438#line 996
48439  __cil_tmp83 = (bool )0;
48440#line 996
48441  vmw_surface_dma_encode(srf, __cil_tmp81, __cil_tmp82, __cil_tmp83);
48442#line 997
48443  __cil_tmp84 = (struct vmw_surface    *)srf;
48444#line 997
48445  tmp___15 = vmw_surface_dma_size(__cil_tmp84);
48446#line 997
48447  cmd = cmd + tmp___15;
48448#line 998
48449  __cil_tmp85 = (unsigned long )res;
48450#line 998
48451  __cil_tmp86 = __cil_tmp85 + 24;
48452#line 998
48453  __cil_tmp87 = *((int *)__cil_tmp86);
48454#line 998
48455  __cil_tmp88 = (uint32_t )__cil_tmp87;
48456#line 998
48457  __cil_tmp89 = (void *)cmd;
48458#line 998
48459  vmw_surface_destroy_encode(__cil_tmp88, __cil_tmp89);
48460#line 999
48461  vmw_fifo_commit(dev_priv, submit_size);
48462#line 1005
48463  __cil_tmp90 = (unsigned long )dev_priv;
48464#line 1005
48465  __cil_tmp91 = __cil_tmp90 + 134784;
48466#line 1005
48467  __cil_tmp92 = (unsigned long )srf;
48468#line 1005
48469  __cil_tmp93 = __cil_tmp92 + 200;
48470#line 1005
48471  __cil_tmp94 = *((uint32_t *)__cil_tmp93);
48472#line 1005
48473  __cil_tmp95 = (unsigned long )dev_priv;
48474#line 1005
48475  __cil_tmp96 = __cil_tmp95 + 134784;
48476#line 1005
48477  __cil_tmp97 = *((uint32_t *)__cil_tmp96);
48478#line 1005
48479  *((uint32_t *)__cil_tmp91) = __cil_tmp97 - __cil_tmp94;
48480#line 1011
48481  __cil_tmp98 = (void *)0;
48482#line 1011
48483  __cil_tmp99 = (struct drm_file *)__cil_tmp98;
48484#line 1011
48485  __cil_tmp100 = (void *)0;
48486#line 1011
48487  __cil_tmp101 = (uint32_t *)__cil_tmp100;
48488#line 1011
48489  vmw_execbuf_fence_commands(__cil_tmp99, dev_priv, & fence, __cil_tmp101);
48490#line 1013
48491  __cil_tmp102 = & fence;
48492#line 1013
48493  __cil_tmp103 = *__cil_tmp102;
48494#line 1013
48495  __cil_tmp104 = (void *)__cil_tmp103;
48496#line 1013
48497  ttm_eu_fence_buffer_objects(& val_list, __cil_tmp104);
48498#line 1014
48499  __cil_tmp105 = (void *)0;
48500#line 1014
48501  __cil_tmp106 = (unsigned long )__cil_tmp105;
48502#line 1014
48503  __cil_tmp107 = & fence;
48504#line 1014
48505  __cil_tmp108 = *__cil_tmp107;
48506#line 1014
48507  __cil_tmp109 = (unsigned long )__cil_tmp108;
48508#line 1014
48509  __cil_tmp110 = __cil_tmp109 != __cil_tmp106;
48510#line 1014
48511  __cil_tmp111 = ! __cil_tmp110;
48512#line 1014
48513  __cil_tmp112 = ! __cil_tmp111;
48514#line 1014
48515  __cil_tmp113 = (long )__cil_tmp112;
48516#line 1014
48517  tmp___16 = __builtin_expect(__cil_tmp113, 1L);
48518  }
48519#line 1014
48520  if (tmp___16) {
48521    {
48522#line 1015
48523    vmw_fence_obj_unreference(& fence);
48524    }
48525  } else {
48526
48527  }
48528  {
48529#line 1016
48530  __cil_tmp114 = (unsigned long )(& val_buf) + 16;
48531#line 1016
48532  __cil_tmp115 = (struct ttm_buffer_object **)__cil_tmp114;
48533#line 1016
48534  ttm_bo_unref(__cil_tmp115);
48535#line 1022
48536  vmw_resource_release_id(res);
48537  }
48538#line 1024
48539  return (0);
48540  out_no_fifo: 
48541  {
48542#line 1028
48543  __cil_tmp116 = (unsigned long )srf;
48544#line 1028
48545  __cil_tmp117 = __cil_tmp116 + 184;
48546#line 1028
48547  if (*((struct ttm_buffer_object **)__cil_tmp117)) {
48548    {
48549#line 1029
48550    ttm_eu_backoff_reservation(& val_list);
48551    }
48552  } else {
48553
48554  }
48555  }
48556  out_no_reserve: 
48557  {
48558#line 1031
48559  __cil_tmp118 = (unsigned long )(& val_buf) + 16;
48560#line 1031
48561  __cil_tmp119 = (struct ttm_buffer_object **)__cil_tmp118;
48562#line 1031
48563  ttm_bo_unref(__cil_tmp119);
48564#line 1032
48565  __cil_tmp120 = (unsigned long )srf;
48566#line 1032
48567  __cil_tmp121 = __cil_tmp120 + 184;
48568#line 1032
48569  __cil_tmp122 = (struct ttm_buffer_object **)__cil_tmp121;
48570#line 1032
48571  ttm_bo_unref(__cil_tmp122);
48572  }
48573#line 1033
48574  return (ret);
48575}
48576}
48577#line 1050 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
48578int vmw_surface_validate(struct vmw_private *dev_priv , struct vmw_surface *srf ) 
48579{ int ret ;
48580  struct vmw_surface *evict_srf ;
48581  long tmp___7 ;
48582  int tmp___8 ;
48583  struct list_head    *__mptr ;
48584  int tmp___9 ;
48585  long tmp___10 ;
48586  unsigned long __cil_tmp10 ;
48587  unsigned long __cil_tmp11 ;
48588  rwlock_t *__cil_tmp12 ;
48589  unsigned long __cil_tmp13 ;
48590  unsigned long __cil_tmp14 ;
48591  struct list_head *__cil_tmp15 ;
48592  unsigned long __cil_tmp16 ;
48593  unsigned long __cil_tmp17 ;
48594  rwlock_t *__cil_tmp18 ;
48595  int __cil_tmp19 ;
48596  int __cil_tmp20 ;
48597  int __cil_tmp21 ;
48598  long __cil_tmp22 ;
48599  unsigned long __cil_tmp23 ;
48600  unsigned long __cil_tmp24 ;
48601  rwlock_t *__cil_tmp25 ;
48602  unsigned long __cil_tmp26 ;
48603  unsigned long __cil_tmp27 ;
48604  struct list_head *__cil_tmp28 ;
48605  struct list_head    *__cil_tmp29 ;
48606  unsigned long __cil_tmp30 ;
48607  unsigned long __cil_tmp31 ;
48608  rwlock_t *__cil_tmp32 ;
48609  unsigned long __cil_tmp33 ;
48610  unsigned long __cil_tmp34 ;
48611  struct list_head *__cil_tmp35 ;
48612  struct vmw_surface **__cil_tmp36 ;
48613  struct vmw_surface *__cil_tmp37 ;
48614  unsigned long __cil_tmp38 ;
48615  unsigned long __cil_tmp39 ;
48616  struct list_head *__cil_tmp40 ;
48617  unsigned int __cil_tmp41 ;
48618  char *__cil_tmp42 ;
48619  char *__cil_tmp43 ;
48620  struct vmw_surface *__cil_tmp44 ;
48621  struct vmw_surface **__cil_tmp45 ;
48622  struct vmw_surface *__cil_tmp46 ;
48623  unsigned long __cil_tmp47 ;
48624  unsigned long __cil_tmp48 ;
48625  struct list_head *__cil_tmp49 ;
48626  unsigned long __cil_tmp50 ;
48627  unsigned long __cil_tmp51 ;
48628  rwlock_t *__cil_tmp52 ;
48629  struct vmw_surface **__cil_tmp53 ;
48630  struct vmw_surface *__cil_tmp54 ;
48631  unsigned long __cil_tmp55 ;
48632  unsigned long __cil_tmp56 ;
48633  unsigned long __cil_tmp57 ;
48634  int __cil_tmp58 ;
48635  long __cil_tmp59 ;
48636  unsigned long __cil_tmp60 ;
48637  unsigned long __cil_tmp61 ;
48638  rwlock_t *__cil_tmp62 ;
48639  unsigned long __cil_tmp63 ;
48640  unsigned long __cil_tmp64 ;
48641  struct list_head *__cil_tmp65 ;
48642  unsigned long __cil_tmp66 ;
48643  unsigned long __cil_tmp67 ;
48644  struct list_head *__cil_tmp68 ;
48645  unsigned long __cil_tmp69 ;
48646  unsigned long __cil_tmp70 ;
48647  rwlock_t *__cil_tmp71 ;
48648
48649  {
48650  {
48651#line 1056
48652  while (1) {
48653    while_continue: /* CIL Label */ ;
48654    {
48655#line 1057
48656    __cil_tmp10 = (unsigned long )dev_priv;
48657#line 1057
48658    __cil_tmp11 = __cil_tmp10 + 2632;
48659#line 1057
48660    __cil_tmp12 = (rwlock_t *)__cil_tmp11;
48661#line 1057
48662    _raw_write_lock(__cil_tmp12);
48663#line 1058
48664    __cil_tmp13 = (unsigned long )srf;
48665#line 1058
48666    __cil_tmp14 = __cil_tmp13 + 96;
48667#line 1058
48668    __cil_tmp15 = (struct list_head *)__cil_tmp14;
48669#line 1058
48670    list_del_init(__cil_tmp15);
48671#line 1059
48672    __cil_tmp16 = (unsigned long )dev_priv;
48673#line 1059
48674    __cil_tmp17 = __cil_tmp16 + 2632;
48675#line 1059
48676    __cil_tmp18 = (rwlock_t *)__cil_tmp17;
48677#line 1059
48678    _raw_write_unlock(__cil_tmp18);
48679#line 1061
48680    ret = vmw_surface_do_validate(dev_priv, srf);
48681#line 1062
48682    __cil_tmp19 = ret != -16;
48683#line 1062
48684    __cil_tmp20 = ! __cil_tmp19;
48685#line 1062
48686    __cil_tmp21 = ! __cil_tmp20;
48687#line 1062
48688    __cil_tmp22 = (long )__cil_tmp21;
48689#line 1062
48690    tmp___7 = __builtin_expect(__cil_tmp22, 1L);
48691    }
48692#line 1062
48693    if (tmp___7) {
48694#line 1063
48695      goto while_break;
48696    } else {
48697
48698    }
48699    {
48700#line 1065
48701    __cil_tmp23 = (unsigned long )dev_priv;
48702#line 1065
48703    __cil_tmp24 = __cil_tmp23 + 2632;
48704#line 1065
48705    __cil_tmp25 = (rwlock_t *)__cil_tmp24;
48706#line 1065
48707    _raw_write_lock(__cil_tmp25);
48708#line 1066
48709    __cil_tmp26 = (unsigned long )dev_priv;
48710#line 1066
48711    __cil_tmp27 = __cil_tmp26 + 134768;
48712#line 1066
48713    __cil_tmp28 = (struct list_head *)__cil_tmp27;
48714#line 1066
48715    __cil_tmp29 = (struct list_head    *)__cil_tmp28;
48716#line 1066
48717    tmp___8 = list_empty(__cil_tmp29);
48718    }
48719#line 1066
48720    if (tmp___8) {
48721      {
48722#line 1067
48723      drm_err("vmw_surface_validate", "Out of device memory for surfaces.\n");
48724#line 1068
48725      ret = -16;
48726#line 1069
48727      __cil_tmp30 = (unsigned long )dev_priv;
48728#line 1069
48729      __cil_tmp31 = __cil_tmp30 + 2632;
48730#line 1069
48731      __cil_tmp32 = (rwlock_t *)__cil_tmp31;
48732#line 1069
48733      _raw_write_unlock(__cil_tmp32);
48734      }
48735#line 1070
48736      goto while_break;
48737    } else {
48738
48739    }
48740    {
48741#line 1074
48742    __cil_tmp33 = (unsigned long )dev_priv;
48743#line 1074
48744    __cil_tmp34 = __cil_tmp33 + 134768;
48745#line 1074
48746    __cil_tmp35 = *((struct list_head **)__cil_tmp34);
48747#line 1074
48748    __mptr = (struct list_head    *)__cil_tmp35;
48749#line 1074
48750    __cil_tmp36 = & evict_srf;
48751#line 1074
48752    __cil_tmp37 = (struct vmw_surface *)0;
48753#line 1074
48754    __cil_tmp38 = (unsigned long )__cil_tmp37;
48755#line 1074
48756    __cil_tmp39 = __cil_tmp38 + 96;
48757#line 1074
48758    __cil_tmp40 = (struct list_head *)__cil_tmp39;
48759#line 1074
48760    __cil_tmp41 = (unsigned int )__cil_tmp40;
48761#line 1074
48762    __cil_tmp42 = (char *)__mptr;
48763#line 1074
48764    __cil_tmp43 = __cil_tmp42 - __cil_tmp41;
48765#line 1074
48766    __cil_tmp44 = (struct vmw_surface *)__cil_tmp43;
48767#line 1074
48768    *__cil_tmp36 = vmw_surface_reference(__cil_tmp44);
48769#line 1077
48770    __cil_tmp45 = & evict_srf;
48771#line 1077
48772    __cil_tmp46 = *__cil_tmp45;
48773#line 1077
48774    __cil_tmp47 = (unsigned long )__cil_tmp46;
48775#line 1077
48776    __cil_tmp48 = __cil_tmp47 + 96;
48777#line 1077
48778    __cil_tmp49 = (struct list_head *)__cil_tmp48;
48779#line 1077
48780    list_del_init(__cil_tmp49);
48781#line 1079
48782    __cil_tmp50 = (unsigned long )dev_priv;
48783#line 1079
48784    __cil_tmp51 = __cil_tmp50 + 2632;
48785#line 1079
48786    __cil_tmp52 = (rwlock_t *)__cil_tmp51;
48787#line 1079
48788    _raw_write_unlock(__cil_tmp52);
48789#line 1080
48790    __cil_tmp53 = & evict_srf;
48791#line 1080
48792    __cil_tmp54 = *__cil_tmp53;
48793#line 1080
48794    vmw_surface_evict(dev_priv, __cil_tmp54);
48795#line 1082
48796    vmw_surface_unreference(& evict_srf);
48797    }
48798  }
48799  while_break: /* CIL Label */ ;
48800  }
48801#line 1086
48802  if (ret != 0) {
48803    {
48804#line 1086
48805    __cil_tmp55 = 0 + 24;
48806#line 1086
48807    __cil_tmp56 = (unsigned long )srf;
48808#line 1086
48809    __cil_tmp57 = __cil_tmp56 + __cil_tmp55;
48810#line 1086
48811    __cil_tmp58 = *((int *)__cil_tmp57);
48812#line 1086
48813    if (__cil_tmp58 != -1) {
48814#line 1086
48815      tmp___9 = 1;
48816    } else {
48817#line 1086
48818      tmp___9 = 0;
48819    }
48820    }
48821  } else {
48822#line 1086
48823    tmp___9 = 0;
48824  }
48825  {
48826#line 1086
48827  __cil_tmp59 = (long )tmp___9;
48828#line 1086
48829  tmp___10 = __builtin_expect(__cil_tmp59, 0L);
48830  }
48831#line 1086
48832  if (tmp___10) {
48833    {
48834#line 1087
48835    __cil_tmp60 = (unsigned long )dev_priv;
48836#line 1087
48837    __cil_tmp61 = __cil_tmp60 + 2632;
48838#line 1087
48839    __cil_tmp62 = (rwlock_t *)__cil_tmp61;
48840#line 1087
48841    _raw_write_lock(__cil_tmp62);
48842#line 1088
48843    __cil_tmp63 = (unsigned long )srf;
48844#line 1088
48845    __cil_tmp64 = __cil_tmp63 + 96;
48846#line 1088
48847    __cil_tmp65 = (struct list_head *)__cil_tmp64;
48848#line 1088
48849    __cil_tmp66 = (unsigned long )dev_priv;
48850#line 1088
48851    __cil_tmp67 = __cil_tmp66 + 134768;
48852#line 1088
48853    __cil_tmp68 = (struct list_head *)__cil_tmp67;
48854#line 1088
48855    list_add_tail(__cil_tmp65, __cil_tmp68);
48856#line 1089
48857    __cil_tmp69 = (unsigned long )dev_priv;
48858#line 1089
48859    __cil_tmp70 = __cil_tmp69 + 2632;
48860#line 1089
48861    __cil_tmp71 = (rwlock_t *)__cil_tmp70;
48862#line 1089
48863    _raw_write_unlock(__cil_tmp71);
48864    }
48865  } else {
48866
48867  }
48868#line 1092
48869  return (ret);
48870}
48871}
48872#line 1104 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
48873static void vmw_surface_remove_from_lists(struct vmw_resource *res ) 
48874{ struct vmw_surface *srf ;
48875  struct vmw_resource    *__mptr ;
48876  struct vmw_surface *__cil_tmp4 ;
48877  struct vmw_resource *__cil_tmp5 ;
48878  unsigned int __cil_tmp6 ;
48879  char *__cil_tmp7 ;
48880  char *__cil_tmp8 ;
48881  unsigned long __cil_tmp9 ;
48882  unsigned long __cil_tmp10 ;
48883  struct list_head *__cil_tmp11 ;
48884
48885  {
48886  {
48887#line 1106
48888  __mptr = (struct vmw_resource    *)res;
48889#line 1106
48890  __cil_tmp4 = (struct vmw_surface *)0;
48891#line 1106
48892  __cil_tmp5 = (struct vmw_resource *)__cil_tmp4;
48893#line 1106
48894  __cil_tmp6 = (unsigned int )__cil_tmp5;
48895#line 1106
48896  __cil_tmp7 = (char *)__mptr;
48897#line 1106
48898  __cil_tmp8 = __cil_tmp7 - __cil_tmp6;
48899#line 1106
48900  srf = (struct vmw_surface *)__cil_tmp8;
48901#line 1108
48902  __cil_tmp9 = (unsigned long )srf;
48903#line 1108
48904  __cil_tmp10 = __cil_tmp9 + 96;
48905#line 1108
48906  __cil_tmp11 = (struct list_head *)__cil_tmp10;
48907#line 1108
48908  list_del_init(__cil_tmp11);
48909  }
48910#line 1109
48911  return;
48912}
48913}
48914#line 1111 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
48915int vmw_surface_init(struct vmw_private *dev_priv , struct vmw_surface *srf , void (*res_free)(struct vmw_resource *res ) ) 
48916{ int ret ;
48917  struct vmw_resource *res ;
48918  long tmp___7 ;
48919  long tmp___8 ;
48920  void *__cil_tmp8 ;
48921  unsigned long __cil_tmp9 ;
48922  unsigned long __cil_tmp10 ;
48923  int __cil_tmp11 ;
48924  int __cil_tmp12 ;
48925  int __cil_tmp13 ;
48926  long __cil_tmp14 ;
48927  unsigned long __cil_tmp15 ;
48928  unsigned long __cil_tmp16 ;
48929  struct list_head *__cil_tmp17 ;
48930  unsigned long __cil_tmp18 ;
48931  unsigned long __cil_tmp19 ;
48932  struct idr *__cil_tmp20 ;
48933  enum ttm_object_type __cil_tmp21 ;
48934  bool __cil_tmp22 ;
48935  int __cil_tmp23 ;
48936  int __cil_tmp24 ;
48937  int __cil_tmp25 ;
48938  long __cil_tmp26 ;
48939  bool __cil_tmp27 ;
48940
48941  {
48942#line 1116
48943  res = (struct vmw_resource *)srf;
48944  {
48945#line 1118
48946  while (1) {
48947    while_continue: /* CIL Label */ ;
48948    {
48949#line 1118
48950    __cil_tmp8 = (void *)0;
48951#line 1118
48952    __cil_tmp9 = (unsigned long )__cil_tmp8;
48953#line 1118
48954    __cil_tmp10 = (unsigned long )res_free;
48955#line 1118
48956    __cil_tmp11 = __cil_tmp10 == __cil_tmp9;
48957#line 1118
48958    __cil_tmp12 = ! __cil_tmp11;
48959#line 1118
48960    __cil_tmp13 = ! __cil_tmp12;
48961#line 1118
48962    __cil_tmp14 = (long )__cil_tmp13;
48963#line 1118
48964    tmp___7 = __builtin_expect(__cil_tmp14, 0L);
48965    }
48966#line 1118
48967    if (tmp___7) {
48968      {
48969#line 1118
48970      while (1) {
48971        while_continue___0: /* CIL Label */ ;
48972#line 1118
48973        __asm__  volatile   ("1:\tud2\n"
48974                             ".pushsection __bug_table,\"a\"\n"
48975                             "2:\t.long 1b - 2b, %c0 - 2b\n"
48976                             "\t.word %c1, 0\n"
48977                             "\t.org 2b+%c2\n"
48978                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"),
48979                             "i" (1118), "i" (12UL));
48980        {
48981#line 1118
48982        while (1) {
48983          while_continue___1: /* CIL Label */ ;
48984        }
48985        while_break___1: /* CIL Label */ ;
48986        }
48987#line 1118
48988        goto while_break___0;
48989      }
48990      while_break___0: /* CIL Label */ ;
48991      }
48992    } else {
48993
48994    }
48995#line 1118
48996    goto while_break;
48997  }
48998  while_break: /* CIL Label */ ;
48999  }
49000  {
49001#line 1119
49002  __cil_tmp15 = (unsigned long )srf;
49003#line 1119
49004  __cil_tmp16 = __cil_tmp15 + 96;
49005#line 1119
49006  __cil_tmp17 = (struct list_head *)__cil_tmp16;
49007#line 1119
49008  INIT_LIST_HEAD(__cil_tmp17);
49009#line 1120
49010  __cil_tmp18 = (unsigned long )dev_priv;
49011#line 1120
49012  __cil_tmp19 = __cil_tmp18 + 2704;
49013#line 1120
49014  __cil_tmp20 = (struct idr *)__cil_tmp19;
49015#line 1120
49016  __cil_tmp21 = (enum ttm_object_type )257;
49017#line 1120
49018  __cil_tmp22 = (bool )1;
49019#line 1120
49020  ret = vmw_resource_init(dev_priv, res, __cil_tmp20, __cil_tmp21, __cil_tmp22, res_free,
49021                          & vmw_surface_remove_from_lists);
49022#line 1124
49023  __cil_tmp23 = ret != 0;
49024#line 1124
49025  __cil_tmp24 = ! __cil_tmp23;
49026#line 1124
49027  __cil_tmp25 = ! __cil_tmp24;
49028#line 1124
49029  __cil_tmp26 = (long )__cil_tmp25;
49030#line 1124
49031  tmp___8 = __builtin_expect(__cil_tmp26, 0L);
49032  }
49033#line 1124
49034  if (tmp___8) {
49035    {
49036#line 1125
49037    (*res_free)(res);
49038    }
49039  } else {
49040
49041  }
49042  {
49043#line 1132
49044  __cil_tmp27 = (bool )0;
49045#line 1132
49046  vmw_3d_resource_inc(dev_priv, __cil_tmp27);
49047#line 1133
49048  vmw_resource_activate(res, & vmw_hw_surface_destroy);
49049  }
49050#line 1134
49051  return (ret);
49052}
49053}
49054#line 1137 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49055static void vmw_user_surface_free(struct vmw_resource *res ) 
49056{ struct vmw_surface *srf ;
49057  struct vmw_resource    *__mptr ;
49058  struct vmw_user_surface *user_srf ;
49059  struct vmw_surface    *__mptr___0 ;
49060  struct vmw_private *dev_priv ;
49061  uint32_t size ;
49062  struct ttm_mem_global *tmp___7 ;
49063  struct vmw_surface *__cil_tmp9 ;
49064  struct vmw_resource *__cil_tmp10 ;
49065  unsigned int __cil_tmp11 ;
49066  char *__cil_tmp12 ;
49067  char *__cil_tmp13 ;
49068  struct vmw_user_surface *__cil_tmp14 ;
49069  unsigned long __cil_tmp15 ;
49070  unsigned long __cil_tmp16 ;
49071  struct vmw_surface *__cil_tmp17 ;
49072  unsigned int __cil_tmp18 ;
49073  char *__cil_tmp19 ;
49074  char *__cil_tmp20 ;
49075  unsigned long __cil_tmp21 ;
49076  unsigned long __cil_tmp22 ;
49077  unsigned long __cil_tmp23 ;
49078  unsigned long __cil_tmp24 ;
49079  unsigned long __cil_tmp25 ;
49080  unsigned long __cil_tmp26 ;
49081  unsigned long __cil_tmp27 ;
49082  unsigned long __cil_tmp28 ;
49083  unsigned long __cil_tmp29 ;
49084  struct ttm_buffer_object **__cil_tmp30 ;
49085  unsigned long __cil_tmp31 ;
49086  unsigned long __cil_tmp32 ;
49087  struct vmw_surface_offset *__cil_tmp33 ;
49088  void    *__cil_tmp34 ;
49089  unsigned long __cil_tmp35 ;
49090  unsigned long __cil_tmp36 ;
49091  struct drm_vmw_size *__cil_tmp37 ;
49092  void    *__cil_tmp38 ;
49093  unsigned long __cil_tmp39 ;
49094  unsigned long __cil_tmp40 ;
49095  unsigned long __cil_tmp41 ;
49096  uint32_t *__cil_tmp42 ;
49097  void    *__cil_tmp43 ;
49098  void    *__cil_tmp44 ;
49099  uint64_t __cil_tmp45 ;
49100
49101  {
49102#line 1139
49103  __mptr = (struct vmw_resource    *)res;
49104#line 1139
49105  __cil_tmp9 = (struct vmw_surface *)0;
49106#line 1139
49107  __cil_tmp10 = (struct vmw_resource *)__cil_tmp9;
49108#line 1139
49109  __cil_tmp11 = (unsigned int )__cil_tmp10;
49110#line 1139
49111  __cil_tmp12 = (char *)__mptr;
49112#line 1139
49113  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
49114#line 1139
49115  srf = (struct vmw_surface *)__cil_tmp13;
49116#line 1141
49117  __mptr___0 = (struct vmw_surface    *)srf;
49118#line 1141
49119  __cil_tmp14 = (struct vmw_user_surface *)0;
49120#line 1141
49121  __cil_tmp15 = (unsigned long )__cil_tmp14;
49122#line 1141
49123  __cil_tmp16 = __cil_tmp15 + 64;
49124#line 1141
49125  __cil_tmp17 = (struct vmw_surface *)__cil_tmp16;
49126#line 1141
49127  __cil_tmp18 = (unsigned int )__cil_tmp17;
49128#line 1141
49129  __cil_tmp19 = (char *)__mptr___0;
49130#line 1141
49131  __cil_tmp20 = __cil_tmp19 - __cil_tmp18;
49132#line 1141
49133  user_srf = (struct vmw_user_surface *)__cil_tmp20;
49134#line 1142
49135  __cil_tmp21 = 0 + 8;
49136#line 1142
49137  __cil_tmp22 = (unsigned long )srf;
49138#line 1142
49139  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
49140#line 1142
49141  dev_priv = *((struct vmw_private **)__cil_tmp23);
49142#line 1143
49143  __cil_tmp24 = (unsigned long )user_srf;
49144#line 1143
49145  __cil_tmp25 = __cil_tmp24 + 272;
49146#line 1143
49147  size = *((uint32_t *)__cil_tmp25);
49148  {
49149#line 1145
49150  __cil_tmp26 = (unsigned long )srf;
49151#line 1145
49152  __cil_tmp27 = __cil_tmp26 + 184;
49153#line 1145
49154  if (*((struct ttm_buffer_object **)__cil_tmp27)) {
49155    {
49156#line 1146
49157    __cil_tmp28 = (unsigned long )srf;
49158#line 1146
49159    __cil_tmp29 = __cil_tmp28 + 184;
49160#line 1146
49161    __cil_tmp30 = (struct ttm_buffer_object **)__cil_tmp29;
49162#line 1146
49163    ttm_bo_unref(__cil_tmp30);
49164    }
49165  } else {
49166
49167  }
49168  }
49169  {
49170#line 1147
49171  __cil_tmp31 = (unsigned long )srf;
49172#line 1147
49173  __cil_tmp32 = __cil_tmp31 + 192;
49174#line 1147
49175  __cil_tmp33 = *((struct vmw_surface_offset **)__cil_tmp32);
49176#line 1147
49177  __cil_tmp34 = (void    *)__cil_tmp33;
49178#line 1147
49179  kfree(__cil_tmp34);
49180#line 1148
49181  __cil_tmp35 = (unsigned long )srf;
49182#line 1148
49183  __cil_tmp36 = __cil_tmp35 + 144;
49184#line 1148
49185  __cil_tmp37 = *((struct drm_vmw_size **)__cil_tmp36);
49186#line 1148
49187  __cil_tmp38 = (void    *)__cil_tmp37;
49188#line 1148
49189  kfree(__cil_tmp38);
49190#line 1149
49191  __cil_tmp39 = 160 + 16;
49192#line 1149
49193  __cil_tmp40 = (unsigned long )srf;
49194#line 1149
49195  __cil_tmp41 = __cil_tmp40 + __cil_tmp39;
49196#line 1149
49197  __cil_tmp42 = *((uint32_t **)__cil_tmp41);
49198#line 1149
49199  __cil_tmp43 = (void    *)__cil_tmp42;
49200#line 1149
49201  kfree(__cil_tmp43);
49202#line 1150
49203  __cil_tmp44 = (void    *)user_srf;
49204#line 1150
49205  kfree(__cil_tmp44);
49206#line 1151
49207  tmp___7 = vmw_mem_glob(dev_priv);
49208#line 1151
49209  __cil_tmp45 = (uint64_t )size;
49210#line 1151
49211  ttm_mem_global_free(tmp___7, __cil_tmp45);
49212  }
49213#line 1152
49214  return;
49215}
49216}
49217#line 1167 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49218void vmw_resource_unreserve(struct list_head *list ) 
49219{ struct vmw_resource *res ;
49220  struct vmw_surface *srf ;
49221  rwlock_t *lock ;
49222  struct list_head    *__mptr ;
49223  struct list_head    *__mptr___0 ;
49224  long tmp___7 ;
49225  struct vmw_resource    *__mptr___1 ;
49226  void *__cil_tmp9 ;
49227  struct list_head *__cil_tmp10 ;
49228  struct vmw_resource *__cil_tmp11 ;
49229  unsigned long __cil_tmp12 ;
49230  unsigned long __cil_tmp13 ;
49231  struct list_head *__cil_tmp14 ;
49232  unsigned int __cil_tmp15 ;
49233  char *__cil_tmp16 ;
49234  char *__cil_tmp17 ;
49235  unsigned long __cil_tmp18 ;
49236  unsigned long __cil_tmp19 ;
49237  unsigned long __cil_tmp20 ;
49238  struct list_head *__cil_tmp21 ;
49239  unsigned long __cil_tmp22 ;
49240  unsigned long __cil_tmp23 ;
49241  unsigned long __cil_tmp24 ;
49242  unsigned long __cil_tmp25 ;
49243  void (*__cil_tmp26)(struct vmw_resource *res ) ;
49244  unsigned long __cil_tmp27 ;
49245  unsigned long __cil_tmp28 ;
49246  unsigned long __cil_tmp29 ;
49247  unsigned long __cil_tmp30 ;
49248  void (*__cil_tmp31)(struct vmw_resource *res ) ;
49249  unsigned long __cil_tmp32 ;
49250  void *__cil_tmp33 ;
49251  unsigned long __cil_tmp34 ;
49252  unsigned long __cil_tmp35 ;
49253  int __cil_tmp36 ;
49254  int __cil_tmp37 ;
49255  int __cil_tmp38 ;
49256  long __cil_tmp39 ;
49257  unsigned long __cil_tmp40 ;
49258  unsigned long __cil_tmp41 ;
49259  struct vmw_private *__cil_tmp42 ;
49260  unsigned long __cil_tmp43 ;
49261  unsigned long __cil_tmp44 ;
49262  struct vmw_surface *__cil_tmp45 ;
49263  struct vmw_resource *__cil_tmp46 ;
49264  unsigned int __cil_tmp47 ;
49265  char *__cil_tmp48 ;
49266  char *__cil_tmp49 ;
49267  unsigned long __cil_tmp50 ;
49268  unsigned long __cil_tmp51 ;
49269  struct list_head *__cil_tmp52 ;
49270  unsigned long __cil_tmp53 ;
49271  unsigned long __cil_tmp54 ;
49272  struct list_head *__cil_tmp55 ;
49273  unsigned long __cil_tmp56 ;
49274  unsigned long __cil_tmp57 ;
49275  struct vmw_private *__cil_tmp58 ;
49276  unsigned long __cil_tmp59 ;
49277  unsigned long __cil_tmp60 ;
49278  struct list_head *__cil_tmp61 ;
49279  unsigned long __cil_tmp62 ;
49280  unsigned long __cil_tmp63 ;
49281  struct list_head *__cil_tmp64 ;
49282  struct vmw_resource *__cil_tmp65 ;
49283  unsigned long __cil_tmp66 ;
49284  unsigned long __cil_tmp67 ;
49285  struct list_head *__cil_tmp68 ;
49286  unsigned int __cil_tmp69 ;
49287  char *__cil_tmp70 ;
49288  char *__cil_tmp71 ;
49289  void *__cil_tmp72 ;
49290  unsigned long __cil_tmp73 ;
49291  unsigned long __cil_tmp74 ;
49292
49293  {
49294#line 1171
49295  __cil_tmp9 = (void *)0;
49296#line 1171
49297  lock = (rwlock_t *)__cil_tmp9;
49298#line 1173
49299  __cil_tmp10 = *((struct list_head **)list);
49300#line 1173
49301  __mptr = (struct list_head    *)__cil_tmp10;
49302#line 1173
49303  __cil_tmp11 = (struct vmw_resource *)0;
49304#line 1173
49305  __cil_tmp12 = (unsigned long )__cil_tmp11;
49306#line 1173
49307  __cil_tmp13 = __cil_tmp12 + 64;
49308#line 1173
49309  __cil_tmp14 = (struct list_head *)__cil_tmp13;
49310#line 1173
49311  __cil_tmp15 = (unsigned int )__cil_tmp14;
49312#line 1173
49313  __cil_tmp16 = (char *)__mptr;
49314#line 1173
49315  __cil_tmp17 = __cil_tmp16 - __cil_tmp15;
49316#line 1173
49317  res = (struct vmw_resource *)__cil_tmp17;
49318  {
49319#line 1173
49320  while (1) {
49321    while_continue: /* CIL Label */ ;
49322    {
49323#line 1173
49324    __cil_tmp18 = (unsigned long )list;
49325#line 1173
49326    __cil_tmp19 = (unsigned long )res;
49327#line 1173
49328    __cil_tmp20 = __cil_tmp19 + 64;
49329#line 1173
49330    __cil_tmp21 = (struct list_head *)__cil_tmp20;
49331#line 1173
49332    __cil_tmp22 = (unsigned long )__cil_tmp21;
49333#line 1173
49334    if (__cil_tmp22 != __cil_tmp18) {
49335
49336    } else {
49337#line 1173
49338      goto while_break;
49339    }
49340    }
49341    {
49342#line 1175
49343    __cil_tmp23 = (unsigned long )(& vmw_surface_res_free);
49344#line 1175
49345    __cil_tmp24 = (unsigned long )res;
49346#line 1175
49347    __cil_tmp25 = __cil_tmp24 + 56;
49348#line 1175
49349    __cil_tmp26 = *((void (**)(struct vmw_resource *res ))__cil_tmp25);
49350#line 1175
49351    __cil_tmp27 = (unsigned long )__cil_tmp26;
49352#line 1175
49353    if (__cil_tmp27 != __cil_tmp23) {
49354      {
49355#line 1175
49356      __cil_tmp28 = (unsigned long )(& vmw_user_surface_free);
49357#line 1175
49358      __cil_tmp29 = (unsigned long )res;
49359#line 1175
49360      __cil_tmp30 = __cil_tmp29 + 56;
49361#line 1175
49362      __cil_tmp31 = *((void (**)(struct vmw_resource *res ))__cil_tmp30);
49363#line 1175
49364      __cil_tmp32 = (unsigned long )__cil_tmp31;
49365#line 1175
49366      if (__cil_tmp32 != __cil_tmp28) {
49367#line 1177
49368        goto __Cont;
49369      } else {
49370
49371      }
49372      }
49373    } else {
49374
49375    }
49376    }
49377    {
49378#line 1179
49379    __cil_tmp33 = (void *)0;
49380#line 1179
49381    __cil_tmp34 = (unsigned long )__cil_tmp33;
49382#line 1179
49383    __cil_tmp35 = (unsigned long )lock;
49384#line 1179
49385    __cil_tmp36 = __cil_tmp35 == __cil_tmp34;
49386#line 1179
49387    __cil_tmp37 = ! __cil_tmp36;
49388#line 1179
49389    __cil_tmp38 = ! __cil_tmp37;
49390#line 1179
49391    __cil_tmp39 = (long )__cil_tmp38;
49392#line 1179
49393    tmp___7 = __builtin_expect(__cil_tmp39, 0L);
49394    }
49395#line 1179
49396    if (tmp___7) {
49397      {
49398#line 1180
49399      __cil_tmp40 = (unsigned long )res;
49400#line 1180
49401      __cil_tmp41 = __cil_tmp40 + 8;
49402#line 1180
49403      __cil_tmp42 = *((struct vmw_private **)__cil_tmp41);
49404#line 1180
49405      __cil_tmp43 = (unsigned long )__cil_tmp42;
49406#line 1180
49407      __cil_tmp44 = __cil_tmp43 + 2632;
49408#line 1180
49409      lock = (rwlock_t *)__cil_tmp44;
49410#line 1181
49411      _raw_write_lock(lock);
49412      }
49413    } else {
49414
49415    }
49416    {
49417#line 1184
49418    __mptr___1 = (struct vmw_resource    *)res;
49419#line 1184
49420    __cil_tmp45 = (struct vmw_surface *)0;
49421#line 1184
49422    __cil_tmp46 = (struct vmw_resource *)__cil_tmp45;
49423#line 1184
49424    __cil_tmp47 = (unsigned int )__cil_tmp46;
49425#line 1184
49426    __cil_tmp48 = (char *)__mptr___1;
49427#line 1184
49428    __cil_tmp49 = __cil_tmp48 - __cil_tmp47;
49429#line 1184
49430    srf = (struct vmw_surface *)__cil_tmp49;
49431#line 1185
49432    __cil_tmp50 = (unsigned long )srf;
49433#line 1185
49434    __cil_tmp51 = __cil_tmp50 + 96;
49435#line 1185
49436    __cil_tmp52 = (struct list_head *)__cil_tmp51;
49437#line 1185
49438    list_del_init(__cil_tmp52);
49439#line 1186
49440    __cil_tmp53 = (unsigned long )srf;
49441#line 1186
49442    __cil_tmp54 = __cil_tmp53 + 96;
49443#line 1186
49444    __cil_tmp55 = (struct list_head *)__cil_tmp54;
49445#line 1186
49446    __cil_tmp56 = (unsigned long )res;
49447#line 1186
49448    __cil_tmp57 = __cil_tmp56 + 8;
49449#line 1186
49450    __cil_tmp58 = *((struct vmw_private **)__cil_tmp57);
49451#line 1186
49452    __cil_tmp59 = (unsigned long )__cil_tmp58;
49453#line 1186
49454    __cil_tmp60 = __cil_tmp59 + 134768;
49455#line 1186
49456    __cil_tmp61 = (struct list_head *)__cil_tmp60;
49457#line 1186
49458    list_add_tail(__cil_tmp55, __cil_tmp61);
49459    }
49460    __Cont: /* CIL Label */ 
49461#line 1173
49462    __cil_tmp62 = (unsigned long )res;
49463#line 1173
49464    __cil_tmp63 = __cil_tmp62 + 64;
49465#line 1173
49466    __cil_tmp64 = *((struct list_head **)__cil_tmp63);
49467#line 1173
49468    __mptr___0 = (struct list_head    *)__cil_tmp64;
49469#line 1173
49470    __cil_tmp65 = (struct vmw_resource *)0;
49471#line 1173
49472    __cil_tmp66 = (unsigned long )__cil_tmp65;
49473#line 1173
49474    __cil_tmp67 = __cil_tmp66 + 64;
49475#line 1173
49476    __cil_tmp68 = (struct list_head *)__cil_tmp67;
49477#line 1173
49478    __cil_tmp69 = (unsigned int )__cil_tmp68;
49479#line 1173
49480    __cil_tmp70 = (char *)__mptr___0;
49481#line 1173
49482    __cil_tmp71 = __cil_tmp70 - __cil_tmp69;
49483#line 1173
49484    res = (struct vmw_resource *)__cil_tmp71;
49485  }
49486  while_break: /* CIL Label */ ;
49487  }
49488  {
49489#line 1189
49490  __cil_tmp72 = (void *)0;
49491#line 1189
49492  __cil_tmp73 = (unsigned long )__cil_tmp72;
49493#line 1189
49494  __cil_tmp74 = (unsigned long )lock;
49495#line 1189
49496  if (__cil_tmp74 != __cil_tmp73) {
49497    {
49498#line 1190
49499    _raw_write_unlock(lock);
49500    }
49501  } else {
49502
49503  }
49504  }
49505#line 1191
49506  return;
49507}
49508}
49509#line 1198 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49510int vmw_user_lookup_handle(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
49511                           uint32_t handle , struct vmw_surface **out_surf , struct vmw_dma_buffer **out_buf ) 
49512{ int ret ;
49513  int tmp___7 ;
49514  long tmp___8 ;
49515  long __cil_tmp9 ;
49516
49517  {
49518  {
49519#line 1206
49520  while (1) {
49521    while_continue: /* CIL Label */ ;
49522#line 1206
49523    if (*out_surf) {
49524#line 1206
49525      tmp___7 = 1;
49526    } else
49527#line 1206
49528    if (*out_buf) {
49529#line 1206
49530      tmp___7 = 1;
49531    } else {
49532#line 1206
49533      tmp___7 = 0;
49534    }
49535    {
49536#line 1206
49537    __cil_tmp9 = (long )tmp___7;
49538#line 1206
49539    tmp___8 = __builtin_expect(__cil_tmp9, 0L);
49540    }
49541#line 1206
49542    if (tmp___8) {
49543      {
49544#line 1206
49545      while (1) {
49546        while_continue___0: /* CIL Label */ ;
49547#line 1206
49548        __asm__  volatile   ("1:\tud2\n"
49549                             ".pushsection __bug_table,\"a\"\n"
49550                             "2:\t.long 1b - 2b, %c0 - 2b\n"
49551                             "\t.word %c1, 0\n"
49552                             "\t.org 2b+%c2\n"
49553                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"),
49554                             "i" (1206), "i" (12UL));
49555        {
49556#line 1206
49557        while (1) {
49558          while_continue___1: /* CIL Label */ ;
49559        }
49560        while_break___1: /* CIL Label */ ;
49561        }
49562#line 1206
49563        goto while_break___0;
49564      }
49565      while_break___0: /* CIL Label */ ;
49566      }
49567    } else {
49568
49569    }
49570#line 1206
49571    goto while_break;
49572  }
49573  while_break: /* CIL Label */ ;
49574  }
49575  {
49576#line 1208
49577  ret = vmw_user_surface_lookup_handle(dev_priv, tfile, handle, out_surf);
49578  }
49579#line 1209
49580  if (! ret) {
49581#line 1210
49582    return (0);
49583  } else {
49584
49585  }
49586  {
49587#line 1212
49588  ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf);
49589  }
49590#line 1213
49591  return (ret);
49592}
49593}
49594#line 1217 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49595int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
49596                                   uint32_t handle , struct vmw_surface **out ) 
49597{ struct vmw_resource *res ;
49598  struct vmw_surface *srf ;
49599  struct vmw_user_surface *user_srf ;
49600  struct ttm_base_object *base ;
49601  int ret ;
49602  long tmp___7 ;
49603  long tmp___8 ;
49604  struct ttm_base_object    *__mptr ;
49605  struct ttm_base_object **__cil_tmp13 ;
49606  void *__cil_tmp14 ;
49607  unsigned long __cil_tmp15 ;
49608  struct ttm_base_object **__cil_tmp16 ;
49609  struct ttm_base_object *__cil_tmp17 ;
49610  unsigned long __cil_tmp18 ;
49611  int __cil_tmp19 ;
49612  int __cil_tmp20 ;
49613  int __cil_tmp21 ;
49614  long __cil_tmp22 ;
49615  struct ttm_base_object **__cil_tmp23 ;
49616  struct ttm_base_object *__cil_tmp24 ;
49617  unsigned long __cil_tmp25 ;
49618  unsigned long __cil_tmp26 ;
49619  enum ttm_object_type __cil_tmp27 ;
49620  unsigned int __cil_tmp28 ;
49621  int __cil_tmp29 ;
49622  int __cil_tmp30 ;
49623  int __cil_tmp31 ;
49624  long __cil_tmp32 ;
49625  struct ttm_base_object **__cil_tmp33 ;
49626  struct ttm_base_object *__cil_tmp34 ;
49627  struct vmw_user_surface *__cil_tmp35 ;
49628  struct ttm_base_object *__cil_tmp36 ;
49629  unsigned int __cil_tmp37 ;
49630  char *__cil_tmp38 ;
49631  char *__cil_tmp39 ;
49632  unsigned long __cil_tmp40 ;
49633  unsigned long __cil_tmp41 ;
49634  unsigned long __cil_tmp42 ;
49635  unsigned long __cil_tmp43 ;
49636  rwlock_t *__cil_tmp44 ;
49637  unsigned long __cil_tmp45 ;
49638  unsigned long __cil_tmp46 ;
49639  bool __cil_tmp47 ;
49640  unsigned long __cil_tmp48 ;
49641  unsigned long __cil_tmp49 ;
49642  rwlock_t *__cil_tmp50 ;
49643  unsigned long __cil_tmp51 ;
49644  unsigned long __cil_tmp52 ;
49645  unsigned long __cil_tmp53 ;
49646  void (*__cil_tmp54)(struct vmw_resource *res ) ;
49647  unsigned long __cil_tmp55 ;
49648  unsigned long __cil_tmp56 ;
49649  unsigned long __cil_tmp57 ;
49650  rwlock_t *__cil_tmp58 ;
49651  struct kref *__cil_tmp59 ;
49652  unsigned long __cil_tmp60 ;
49653  unsigned long __cil_tmp61 ;
49654  rwlock_t *__cil_tmp62 ;
49655
49656  {
49657  {
49658#line 1225
49659  ret = -22;
49660#line 1227
49661  __cil_tmp13 = & base;
49662#line 1227
49663  *__cil_tmp13 = ttm_base_object_lookup(tfile, handle);
49664#line 1228
49665  __cil_tmp14 = (void *)0;
49666#line 1228
49667  __cil_tmp15 = (unsigned long )__cil_tmp14;
49668#line 1228
49669  __cil_tmp16 = & base;
49670#line 1228
49671  __cil_tmp17 = *__cil_tmp16;
49672#line 1228
49673  __cil_tmp18 = (unsigned long )__cil_tmp17;
49674#line 1228
49675  __cil_tmp19 = __cil_tmp18 == __cil_tmp15;
49676#line 1228
49677  __cil_tmp20 = ! __cil_tmp19;
49678#line 1228
49679  __cil_tmp21 = ! __cil_tmp20;
49680#line 1228
49681  __cil_tmp22 = (long )__cil_tmp21;
49682#line 1228
49683  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
49684  }
49685#line 1228
49686  if (tmp___7) {
49687#line 1229
49688    return (-22);
49689  } else {
49690
49691  }
49692  {
49693#line 1231
49694  __cil_tmp23 = & base;
49695#line 1231
49696  __cil_tmp24 = *__cil_tmp23;
49697#line 1231
49698  __cil_tmp25 = (unsigned long )__cil_tmp24;
49699#line 1231
49700  __cil_tmp26 = __cil_tmp25 + 24;
49701#line 1231
49702  __cil_tmp27 = *((enum ttm_object_type *)__cil_tmp26);
49703#line 1231
49704  __cil_tmp28 = (unsigned int )__cil_tmp27;
49705#line 1231
49706  __cil_tmp29 = __cil_tmp28 != 257U;
49707#line 1231
49708  __cil_tmp30 = ! __cil_tmp29;
49709#line 1231
49710  __cil_tmp31 = ! __cil_tmp30;
49711#line 1231
49712  __cil_tmp32 = (long )__cil_tmp31;
49713#line 1231
49714  tmp___8 = __builtin_expect(__cil_tmp32, 0L);
49715  }
49716#line 1231
49717  if (tmp___8) {
49718#line 1232
49719    goto out_bad_resource;
49720  } else {
49721
49722  }
49723  {
49724#line 1234
49725  __cil_tmp33 = & base;
49726#line 1234
49727  __cil_tmp34 = *__cil_tmp33;
49728#line 1234
49729  __mptr = (struct ttm_base_object    *)__cil_tmp34;
49730#line 1234
49731  __cil_tmp35 = (struct vmw_user_surface *)0;
49732#line 1234
49733  __cil_tmp36 = (struct ttm_base_object *)__cil_tmp35;
49734#line 1234
49735  __cil_tmp37 = (unsigned int )__cil_tmp36;
49736#line 1234
49737  __cil_tmp38 = (char *)__mptr;
49738#line 1234
49739  __cil_tmp39 = __cil_tmp38 - __cil_tmp37;
49740#line 1234
49741  user_srf = (struct vmw_user_surface *)__cil_tmp39;
49742#line 1235
49743  __cil_tmp40 = (unsigned long )user_srf;
49744#line 1235
49745  __cil_tmp41 = __cil_tmp40 + 64;
49746#line 1235
49747  srf = (struct vmw_surface *)__cil_tmp41;
49748#line 1236
49749  res = (struct vmw_resource *)srf;
49750#line 1238
49751  __cil_tmp42 = (unsigned long )dev_priv;
49752#line 1238
49753  __cil_tmp43 = __cil_tmp42 + 2632;
49754#line 1238
49755  __cil_tmp44 = (rwlock_t *)__cil_tmp43;
49756#line 1238
49757  _raw_read_lock(__cil_tmp44);
49758  }
49759  {
49760#line 1240
49761  __cil_tmp45 = (unsigned long )res;
49762#line 1240
49763  __cil_tmp46 = __cil_tmp45 + 32;
49764#line 1240
49765  __cil_tmp47 = *((bool *)__cil_tmp46);
49766#line 1240
49767  if (! __cil_tmp47) {
49768    {
49769#line 1241
49770    __cil_tmp48 = (unsigned long )dev_priv;
49771#line 1241
49772    __cil_tmp49 = __cil_tmp48 + 2632;
49773#line 1241
49774    __cil_tmp50 = (rwlock_t *)__cil_tmp49;
49775#line 1241
49776    _raw_read_unlock(__cil_tmp50);
49777    }
49778#line 1242
49779    goto out_bad_resource;
49780  } else {
49781    {
49782#line 1240
49783    __cil_tmp51 = (unsigned long )(& vmw_user_surface_free);
49784#line 1240
49785    __cil_tmp52 = (unsigned long )res;
49786#line 1240
49787    __cil_tmp53 = __cil_tmp52 + 56;
49788#line 1240
49789    __cil_tmp54 = *((void (**)(struct vmw_resource *res ))__cil_tmp53);
49790#line 1240
49791    __cil_tmp55 = (unsigned long )__cil_tmp54;
49792#line 1240
49793    if (__cil_tmp55 != __cil_tmp51) {
49794      {
49795#line 1241
49796      __cil_tmp56 = (unsigned long )dev_priv;
49797#line 1241
49798      __cil_tmp57 = __cil_tmp56 + 2632;
49799#line 1241
49800      __cil_tmp58 = (rwlock_t *)__cil_tmp57;
49801#line 1241
49802      _raw_read_unlock(__cil_tmp58);
49803      }
49804#line 1242
49805      goto out_bad_resource;
49806    } else {
49807
49808    }
49809    }
49810  }
49811  }
49812  {
49813#line 1245
49814  __cil_tmp59 = (struct kref *)res;
49815#line 1245
49816  kref_get(__cil_tmp59);
49817#line 1246
49818  __cil_tmp60 = (unsigned long )dev_priv;
49819#line 1246
49820  __cil_tmp61 = __cil_tmp60 + 2632;
49821#line 1246
49822  __cil_tmp62 = (rwlock_t *)__cil_tmp61;
49823#line 1246
49824  _raw_read_unlock(__cil_tmp62);
49825#line 1248
49826  *out = srf;
49827#line 1249
49828  ret = 0;
49829  }
49830  out_bad_resource: 
49831  {
49832#line 1252
49833  ttm_base_object_unref(& base);
49834  }
49835#line 1254
49836  return (ret);
49837}
49838}
49839#line 1257 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49840static void vmw_user_surface_base_release(struct ttm_base_object **p_base ) 
49841{ struct ttm_base_object *base ;
49842  struct vmw_user_surface *user_srf ;
49843  struct ttm_base_object    *__mptr ;
49844  struct vmw_resource *res ;
49845  struct vmw_user_surface *__cil_tmp6 ;
49846  struct ttm_base_object *__cil_tmp7 ;
49847  unsigned int __cil_tmp8 ;
49848  char *__cil_tmp9 ;
49849  char *__cil_tmp10 ;
49850  struct vmw_resource **__cil_tmp11 ;
49851  unsigned long __cil_tmp12 ;
49852  unsigned long __cil_tmp13 ;
49853  void *__cil_tmp14 ;
49854
49855  {
49856  {
49857#line 1259
49858  base = *p_base;
49859#line 1261
49860  __mptr = (struct ttm_base_object    *)base;
49861#line 1261
49862  __cil_tmp6 = (struct vmw_user_surface *)0;
49863#line 1261
49864  __cil_tmp7 = (struct ttm_base_object *)__cil_tmp6;
49865#line 1261
49866  __cil_tmp8 = (unsigned int )__cil_tmp7;
49867#line 1261
49868  __cil_tmp9 = (char *)__mptr;
49869#line 1261
49870  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
49871#line 1261
49872  user_srf = (struct vmw_user_surface *)__cil_tmp10;
49873#line 1262
49874  __cil_tmp11 = & res;
49875#line 1262
49876  __cil_tmp12 = (unsigned long )user_srf;
49877#line 1262
49878  __cil_tmp13 = __cil_tmp12 + 64;
49879#line 1262
49880  *__cil_tmp11 = (struct vmw_resource *)__cil_tmp13;
49881#line 1264
49882  __cil_tmp14 = (void *)0;
49883#line 1264
49884  *p_base = (struct ttm_base_object *)__cil_tmp14;
49885#line 1265
49886  vmw_resource_unreference(& res);
49887  }
49888#line 1266
49889  return;
49890}
49891}
49892#line 1268 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49893int vmw_surface_destroy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
49894{ struct drm_vmw_surface_arg *arg ;
49895  struct ttm_object_file *tfile ;
49896  struct vmw_fpriv *tmp___7 ;
49897  int tmp___8 ;
49898  unsigned long __cil_tmp8 ;
49899  unsigned long __cil_tmp9 ;
49900  int32_t __cil_tmp10 ;
49901  unsigned long __cil_tmp11 ;
49902  enum ttm_ref_type __cil_tmp12 ;
49903
49904  {
49905  {
49906#line 1271
49907  arg = (struct drm_vmw_surface_arg *)data;
49908#line 1272
49909  tmp___7 = vmw_fpriv(file_priv);
49910#line 1272
49911  __cil_tmp8 = (unsigned long )tmp___7;
49912#line 1272
49913  __cil_tmp9 = __cil_tmp8 + 8;
49914#line 1272
49915  tfile = *((struct ttm_object_file **)__cil_tmp9);
49916#line 1274
49917  __cil_tmp10 = *((int32_t *)arg);
49918#line 1274
49919  __cil_tmp11 = (unsigned long )__cil_tmp10;
49920#line 1274
49921  __cil_tmp12 = (enum ttm_ref_type )0;
49922#line 1274
49923  tmp___8 = ttm_ref_object_base_unref(tfile, __cil_tmp11, __cil_tmp12);
49924  }
49925#line 1274
49926  return (tmp___8);
49927}
49928}
49929#line 1277 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
49930int vmw_surface_define_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
49931{ struct vmw_private *dev_priv ;
49932  struct vmw_private *tmp___7 ;
49933  struct vmw_user_surface *user_srf ;
49934  struct vmw_surface *srf ;
49935  struct vmw_resource *res ;
49936  struct vmw_resource *tmp___8 ;
49937  union drm_vmw_surface_create_arg *arg ;
49938  struct drm_vmw_surface_create_req *req ;
49939  struct drm_vmw_surface_arg *rep ;
49940  struct ttm_object_file *tfile ;
49941  struct vmw_fpriv *tmp___9 ;
49942  struct drm_vmw_size *user_sizes ;
49943  int ret ;
49944  int i ;
49945  int j ;
49946  uint32_t cur_bo_offset ;
49947  struct drm_vmw_size *cur_size ;
49948  struct vmw_surface_offset *cur_offset ;
49949  uint32_t stride_bpp ;
49950  uint32_t bpp ;
49951  uint32_t num_sizes ;
49952  uint32_t size ;
49953  struct vmw_master *vmaster ;
49954  struct vmw_master *tmp___10 ;
49955  size_t tmp___11 ;
49956  long tmp___12 ;
49957  size_t tmp___13 ;
49958  size_t tmp___14 ;
49959  long tmp___15 ;
49960  struct ttm_mem_global *tmp___16 ;
49961  long tmp___17 ;
49962  void *tmp___18 ;
49963  long tmp___19 ;
49964  size_t __len ;
49965  void *__ret ;
49966  void *tmp___20 ;
49967  long tmp___21 ;
49968  void *tmp___22 ;
49969  long tmp___23 ;
49970  unsigned long tmp___24 ;
49971  long tmp___25 ;
49972  uint32_t stride ;
49973  void *tmp___26 ;
49974  long tmp___27 ;
49975  long tmp___28 ;
49976  struct ttm_mem_global *tmp___29 ;
49977  unsigned long __cil_tmp50 ;
49978  unsigned long __cil_tmp51 ;
49979  unsigned long __cil_tmp52 ;
49980  unsigned long __cil_tmp53 ;
49981  struct drm_master *__cil_tmp54 ;
49982  int __cil_tmp55 ;
49983  int __cil_tmp56 ;
49984  int __cil_tmp57 ;
49985  long __cil_tmp58 ;
49986  size_t __cil_tmp59 ;
49987  unsigned long __cil_tmp60 ;
49988  unsigned long __cil_tmp61 ;
49989  unsigned long __cil_tmp62 ;
49990  unsigned long __cil_tmp63 ;
49991  uint32_t __cil_tmp64 ;
49992  unsigned long __cil_tmp65 ;
49993  unsigned long __cil_tmp66 ;
49994  unsigned long __cil_tmp67 ;
49995  unsigned long __cil_tmp68 ;
49996  uint64_t __cil_tmp69 ;
49997  uint64_t __cil_tmp70 ;
49998  uint64_t __cil_tmp71 ;
49999  uint64_t __cil_tmp72 ;
50000  uint64_t __cil_tmp73 ;
50001  struct ttm_lock *__cil_tmp74 ;
50002  bool __cil_tmp75 ;
50003  int __cil_tmp76 ;
50004  int __cil_tmp77 ;
50005  int __cil_tmp78 ;
50006  long __cil_tmp79 ;
50007  uint64_t __cil_tmp80 ;
50008  bool __cil_tmp81 ;
50009  bool __cil_tmp82 ;
50010  int __cil_tmp83 ;
50011  int __cil_tmp84 ;
50012  int __cil_tmp85 ;
50013  long __cil_tmp86 ;
50014  void *__cil_tmp87 ;
50015  unsigned long __cil_tmp88 ;
50016  unsigned long __cil_tmp89 ;
50017  int __cil_tmp90 ;
50018  int __cil_tmp91 ;
50019  int __cil_tmp92 ;
50020  long __cil_tmp93 ;
50021  unsigned long __cil_tmp94 ;
50022  unsigned long __cil_tmp95 ;
50023  struct vmw_resource **__cil_tmp96 ;
50024  unsigned long __cil_tmp97 ;
50025  unsigned long __cil_tmp98 ;
50026  unsigned long __cil_tmp99 ;
50027  unsigned long __cil_tmp100 ;
50028  unsigned long __cil_tmp101 ;
50029  unsigned long __cil_tmp102 ;
50030  unsigned long __cil_tmp103 ;
50031  unsigned long __cil_tmp104 ;
50032  unsigned long __cil_tmp105 ;
50033  unsigned long __cil_tmp106 ;
50034  int32_t __cil_tmp107 ;
50035  unsigned long __cil_tmp108 ;
50036  unsigned long __cil_tmp109 ;
50037  void *__cil_tmp110 ;
50038  unsigned long __cil_tmp111 ;
50039  unsigned long __cil_tmp112 ;
50040  unsigned long __cil_tmp113 ;
50041  unsigned long __cil_tmp114 ;
50042  uint32_t *__cil_tmp115 ;
50043  void *__cil_tmp116 ;
50044  unsigned long __cil_tmp117 ;
50045  unsigned long __cil_tmp118 ;
50046  unsigned long __cil_tmp119 ;
50047  unsigned long __cil_tmp120 ;
50048  uint32_t *__cil_tmp121 ;
50049  void    *__cil_tmp122 ;
50050  unsigned long __cil_tmp123 ;
50051  unsigned long __cil_tmp124 ;
50052  unsigned long __cil_tmp125 ;
50053  unsigned long __cil_tmp126 ;
50054  uint32_t *__cil_tmp127 ;
50055  void *__cil_tmp128 ;
50056  unsigned long __cil_tmp129 ;
50057  unsigned long __cil_tmp130 ;
50058  unsigned long __cil_tmp131 ;
50059  unsigned long __cil_tmp132 ;
50060  uint32_t *__cil_tmp133 ;
50061  void    *__cil_tmp134 ;
50062  unsigned long __cil_tmp135 ;
50063  unsigned long __cil_tmp136 ;
50064  unsigned long __cil_tmp137 ;
50065  unsigned long __cil_tmp138 ;
50066  unsigned long __cil_tmp139 ;
50067  unsigned long __cil_tmp140 ;
50068  uint32_t __cil_tmp141 ;
50069  unsigned long __cil_tmp142 ;
50070  unsigned long __cil_tmp143 ;
50071  unsigned long __cil_tmp144 ;
50072  unsigned long __cil_tmp145 ;
50073  void *__cil_tmp146 ;
50074  unsigned long __cil_tmp147 ;
50075  unsigned long __cil_tmp148 ;
50076  unsigned long __cil_tmp149 ;
50077  struct drm_vmw_size *__cil_tmp150 ;
50078  unsigned long __cil_tmp151 ;
50079  int __cil_tmp152 ;
50080  int __cil_tmp153 ;
50081  int __cil_tmp154 ;
50082  long __cil_tmp155 ;
50083  unsigned long __cil_tmp156 ;
50084  unsigned long __cil_tmp157 ;
50085  uint32_t __cil_tmp158 ;
50086  unsigned long __cil_tmp159 ;
50087  unsigned long __cil_tmp160 ;
50088  unsigned long __cil_tmp161 ;
50089  unsigned long __cil_tmp162 ;
50090  void *__cil_tmp163 ;
50091  unsigned long __cil_tmp164 ;
50092  unsigned long __cil_tmp165 ;
50093  unsigned long __cil_tmp166 ;
50094  struct drm_vmw_size *__cil_tmp167 ;
50095  unsigned long __cil_tmp168 ;
50096  int __cil_tmp169 ;
50097  int __cil_tmp170 ;
50098  int __cil_tmp171 ;
50099  long __cil_tmp172 ;
50100  unsigned long __cil_tmp173 ;
50101  unsigned long __cil_tmp174 ;
50102  uint64_t __cil_tmp175 ;
50103  unsigned long __cil_tmp176 ;
50104  unsigned long __cil_tmp177 ;
50105  unsigned long __cil_tmp178 ;
50106  struct drm_vmw_size *__cil_tmp179 ;
50107  void *__cil_tmp180 ;
50108  void    *__cil_tmp181 ;
50109  unsigned long __cil_tmp182 ;
50110  unsigned long __cil_tmp183 ;
50111  uint32_t __cil_tmp184 ;
50112  unsigned long __cil_tmp185 ;
50113  unsigned long __cil_tmp186 ;
50114  int __cil_tmp187 ;
50115  int __cil_tmp188 ;
50116  int __cil_tmp189 ;
50117  long __cil_tmp190 ;
50118  unsigned long __cil_tmp191 ;
50119  unsigned long __cil_tmp192 ;
50120  unsigned long __cil_tmp193 ;
50121  unsigned long __cil_tmp194 ;
50122  unsigned long __cil_tmp195 ;
50123  unsigned long __cil_tmp196 ;
50124  uint32_t __cil_tmp197 ;
50125  unsigned long __cil_tmp198 ;
50126  unsigned long __cil_tmp199 ;
50127  uint8_t    __cil_tmp200 ;
50128  unsigned long __cil_tmp201 ;
50129  unsigned long __cil_tmp202 ;
50130  uint32_t __cil_tmp203 ;
50131  unsigned long __cil_tmp204 ;
50132  unsigned long __cil_tmp205 ;
50133  unsigned long __cil_tmp206 ;
50134  uint8_t    __cil_tmp207 ;
50135  unsigned long __cil_tmp208 ;
50136  unsigned long __cil_tmp209 ;
50137  unsigned long __cil_tmp210 ;
50138  unsigned long __cil_tmp211 ;
50139  uint32_t __cil_tmp212 ;
50140  uint32_t __cil_tmp213 ;
50141  uint32_t __cil_tmp214 ;
50142  uint32_t __cil_tmp215 ;
50143  uint32_t __cil_tmp216 ;
50144  unsigned long __cil_tmp217 ;
50145  unsigned long __cil_tmp218 ;
50146  unsigned long __cil_tmp219 ;
50147  unsigned long __cil_tmp220 ;
50148  unsigned long __cil_tmp221 ;
50149  unsigned long __cil_tmp222 ;
50150  uint32_t __cil_tmp223 ;
50151  unsigned long __cil_tmp224 ;
50152  unsigned long __cil_tmp225 ;
50153  uint32_t __cil_tmp226 ;
50154  uint32_t __cil_tmp227 ;
50155  uint32_t __cil_tmp228 ;
50156  uint32_t __cil_tmp229 ;
50157  uint32_t __cil_tmp230 ;
50158  unsigned long __cil_tmp231 ;
50159  unsigned long __cil_tmp232 ;
50160  unsigned long __cil_tmp233 ;
50161  unsigned long __cil_tmp234 ;
50162  unsigned long __cil_tmp235 ;
50163  unsigned long __cil_tmp236 ;
50164  uint32_t __cil_tmp237 ;
50165  unsigned long __cil_tmp238 ;
50166  unsigned long __cil_tmp239 ;
50167  struct drm_vmw_size *__cil_tmp240 ;
50168  struct drm_vmw_size *__cil_tmp241 ;
50169  uint32_t __cil_tmp242 ;
50170  unsigned long __cil_tmp243 ;
50171  unsigned long __cil_tmp244 ;
50172  struct drm_vmw_size *__cil_tmp245 ;
50173  struct drm_vmw_size *__cil_tmp246 ;
50174  unsigned long __cil_tmp247 ;
50175  unsigned long __cil_tmp248 ;
50176  uint32_t __cil_tmp249 ;
50177  unsigned long __cil_tmp250 ;
50178  unsigned long __cil_tmp251 ;
50179  uint32_t __cil_tmp252 ;
50180  size_t __cil_tmp253 ;
50181  unsigned long __cil_tmp254 ;
50182  unsigned long __cil_tmp255 ;
50183  unsigned long __cil_tmp256 ;
50184  unsigned long __cil_tmp257 ;
50185  unsigned long __cil_tmp258 ;
50186  unsigned long __cil_tmp259 ;
50187  uint32_t *__cil_tmp260 ;
50188  unsigned long __cil_tmp261 ;
50189  unsigned long __cil_tmp262 ;
50190  unsigned long __cil_tmp263 ;
50191  void *__cil_tmp264 ;
50192  unsigned long __cil_tmp265 ;
50193  unsigned long __cil_tmp266 ;
50194  unsigned long __cil_tmp267 ;
50195  void *__cil_tmp268 ;
50196  unsigned long __cil_tmp269 ;
50197  unsigned long __cil_tmp270 ;
50198  unsigned long __cil_tmp271 ;
50199  void *__cil_tmp272 ;
50200  unsigned long __cil_tmp273 ;
50201  unsigned long __cil_tmp274 ;
50202  unsigned long __cil_tmp275 ;
50203  void *__cil_tmp276 ;
50204  unsigned long __cil_tmp277 ;
50205  unsigned long __cil_tmp278 ;
50206  unsigned long __cil_tmp279 ;
50207  void *__cil_tmp280 ;
50208  unsigned long __cil_tmp281 ;
50209  unsigned long __cil_tmp282 ;
50210  void *__cil_tmp283 ;
50211  unsigned long __cil_tmp284 ;
50212  unsigned long __cil_tmp285 ;
50213  unsigned long __cil_tmp286 ;
50214  unsigned long __cil_tmp287 ;
50215  unsigned long __cil_tmp288 ;
50216  unsigned long __cil_tmp289 ;
50217  void *__cil_tmp290 ;
50218  int __cil_tmp291 ;
50219  int __cil_tmp292 ;
50220  int __cil_tmp293 ;
50221  long __cil_tmp294 ;
50222  struct vmw_resource **__cil_tmp295 ;
50223  struct vmw_resource *__cil_tmp296 ;
50224  struct ttm_base_object *__cil_tmp297 ;
50225  unsigned long __cil_tmp298 ;
50226  unsigned long __cil_tmp299 ;
50227  int32_t __cil_tmp300 ;
50228  bool __cil_tmp301 ;
50229  enum ttm_object_type __cil_tmp302 ;
50230  void *__cil_tmp303 ;
50231  void (*__cil_tmp304)(struct ttm_base_object * , enum ttm_ref_type ref_type ) ;
50232  int __cil_tmp305 ;
50233  int __cil_tmp306 ;
50234  int __cil_tmp307 ;
50235  long __cil_tmp308 ;
50236  unsigned long __cil_tmp309 ;
50237  unsigned long __cil_tmp310 ;
50238  unsigned long __cil_tmp311 ;
50239  unsigned long __cil_tmp312 ;
50240  unsigned long __cil_tmp313 ;
50241  int32_t __cil_tmp314 ;
50242  uint32 __cil_tmp315 ;
50243  struct ttm_lock *__cil_tmp316 ;
50244  unsigned long __cil_tmp317 ;
50245  unsigned long __cil_tmp318 ;
50246  struct vmw_surface_offset *__cil_tmp319 ;
50247  void    *__cil_tmp320 ;
50248  unsigned long __cil_tmp321 ;
50249  unsigned long __cil_tmp322 ;
50250  struct drm_vmw_size *__cil_tmp323 ;
50251  void    *__cil_tmp324 ;
50252  void    *__cil_tmp325 ;
50253  uint64_t __cil_tmp326 ;
50254  struct ttm_lock *__cil_tmp327 ;
50255
50256  {
50257  {
50258#line 1280
50259  tmp___7 = vmw_priv(dev);
50260#line 1280
50261  dev_priv = tmp___7;
50262#line 1285
50263  arg = (union drm_vmw_surface_create_arg *)data;
50264#line 1287
50265  req = (struct drm_vmw_surface_create_req *)arg;
50266#line 1288
50267  rep = (struct drm_vmw_surface_arg *)arg;
50268#line 1289
50269  tmp___9 = vmw_fpriv(file_priv);
50270#line 1289
50271  __cil_tmp50 = (unsigned long )tmp___9;
50272#line 1289
50273  __cil_tmp51 = __cil_tmp50 + 8;
50274#line 1289
50275  tfile = *((struct ttm_object_file **)__cil_tmp51);
50276#line 1300
50277  __cil_tmp52 = (unsigned long )file_priv;
50278#line 1300
50279  __cil_tmp53 = __cil_tmp52 + 152;
50280#line 1300
50281  __cil_tmp54 = *((struct drm_master **)__cil_tmp53);
50282#line 1300
50283  tmp___10 = vmw_master(__cil_tmp54);
50284#line 1300
50285  vmaster = tmp___10;
50286#line 1302
50287  __cil_tmp55 = vmw_user_surface_size == 0ULL;
50288#line 1302
50289  __cil_tmp56 = ! __cil_tmp55;
50290#line 1302
50291  __cil_tmp57 = ! __cil_tmp56;
50292#line 1302
50293  __cil_tmp58 = (long )__cil_tmp57;
50294#line 1302
50295  tmp___12 = __builtin_expect(__cil_tmp58, 0L);
50296  }
50297#line 1302
50298  if (tmp___12) {
50299    {
50300#line 1303
50301    tmp___11 = ttm_round_pot(280UL);
50302#line 1303
50303    __cil_tmp59 = tmp___11 + 128UL;
50304#line 1303
50305    vmw_user_surface_size = (uint64_t )__cil_tmp59;
50306    }
50307  } else {
50308
50309  }
50310#line 1306
50311  num_sizes = (uint32_t )0;
50312#line 1307
50313  i = 0;
50314  {
50315#line 1307
50316  while (1) {
50317    while_continue: /* CIL Label */ ;
50318#line 1307
50319    if (i < 6) {
50320
50321    } else {
50322#line 1307
50323      goto while_break;
50324    }
50325#line 1308
50326    __cil_tmp60 = i * 4UL;
50327#line 1308
50328    __cil_tmp61 = 8 + __cil_tmp60;
50329#line 1308
50330    __cil_tmp62 = (unsigned long )req;
50331#line 1308
50332    __cil_tmp63 = __cil_tmp62 + __cil_tmp61;
50333#line 1308
50334    __cil_tmp64 = *((uint32_t *)__cil_tmp63);
50335#line 1308
50336    num_sizes = num_sizes + __cil_tmp64;
50337#line 1307
50338    i = i + 1;
50339  }
50340  while_break: /* CIL Label */ ;
50341  }
50342#line 1310
50343  if (num_sizes > 144U) {
50344#line 1312
50345    return (-22);
50346  } else {
50347
50348  }
50349  {
50350#line 1314
50351  __cil_tmp65 = (unsigned long )num_sizes;
50352#line 1314
50353  __cil_tmp66 = __cil_tmp65 * 16UL;
50354#line 1314
50355  tmp___13 = ttm_round_pot(__cil_tmp66);
50356#line 1314
50357  __cil_tmp67 = (unsigned long )num_sizes;
50358#line 1314
50359  __cil_tmp68 = __cil_tmp67 * 12UL;
50360#line 1314
50361  tmp___14 = ttm_round_pot(__cil_tmp68);
50362#line 1314
50363  __cil_tmp69 = (uint64_t )tmp___14;
50364#line 1314
50365  __cil_tmp70 = (uint64_t )tmp___13;
50366#line 1314
50367  __cil_tmp71 = vmw_user_surface_size + 128ULL;
50368#line 1314
50369  __cil_tmp72 = __cil_tmp71 + __cil_tmp70;
50370#line 1314
50371  __cil_tmp73 = __cil_tmp72 + __cil_tmp69;
50372#line 1314
50373  size = (uint32_t )__cil_tmp73;
50374#line 1319
50375  __cil_tmp74 = (struct ttm_lock *)vmaster;
50376#line 1319
50377  __cil_tmp75 = (bool )1;
50378#line 1319
50379  ret = ttm_read_lock(__cil_tmp74, __cil_tmp75);
50380#line 1320
50381  __cil_tmp76 = ret != 0;
50382#line 1320
50383  __cil_tmp77 = ! __cil_tmp76;
50384#line 1320
50385  __cil_tmp78 = ! __cil_tmp77;
50386#line 1320
50387  __cil_tmp79 = (long )__cil_tmp78;
50388#line 1320
50389  tmp___15 = __builtin_expect(__cil_tmp79, 0L);
50390  }
50391#line 1320
50392  if (tmp___15) {
50393#line 1321
50394    return (ret);
50395  } else {
50396
50397  }
50398  {
50399#line 1323
50400  tmp___16 = vmw_mem_glob(dev_priv);
50401#line 1323
50402  __cil_tmp80 = (uint64_t )size;
50403#line 1323
50404  __cil_tmp81 = (bool )0;
50405#line 1323
50406  __cil_tmp82 = (bool )1;
50407#line 1323
50408  ret = ttm_mem_global_alloc(tmp___16, __cil_tmp80, __cil_tmp81, __cil_tmp82);
50409#line 1325
50410  __cil_tmp83 = ret != 0;
50411#line 1325
50412  __cil_tmp84 = ! __cil_tmp83;
50413#line 1325
50414  __cil_tmp85 = ! __cil_tmp84;
50415#line 1325
50416  __cil_tmp86 = (long )__cil_tmp85;
50417#line 1325
50418  tmp___17 = __builtin_expect(__cil_tmp86, 0L);
50419  }
50420#line 1325
50421  if (tmp___17) {
50422#line 1326
50423    if (ret != -512) {
50424      {
50425#line 1327
50426      drm_err("vmw_surface_define_ioctl", "Out of graphics memory for surface creation.\n");
50427      }
50428    } else {
50429
50430    }
50431#line 1329
50432    goto out_unlock;
50433  } else {
50434
50435  }
50436  {
50437#line 1332
50438  tmp___18 = kmalloc(280UL, 208U);
50439#line 1332
50440  user_srf = (struct vmw_user_surface *)tmp___18;
50441#line 1333
50442  __cil_tmp87 = (void *)0;
50443#line 1333
50444  __cil_tmp88 = (unsigned long )__cil_tmp87;
50445#line 1333
50446  __cil_tmp89 = (unsigned long )user_srf;
50447#line 1333
50448  __cil_tmp90 = __cil_tmp89 == __cil_tmp88;
50449#line 1333
50450  __cil_tmp91 = ! __cil_tmp90;
50451#line 1333
50452  __cil_tmp92 = ! __cil_tmp91;
50453#line 1333
50454  __cil_tmp93 = (long )__cil_tmp92;
50455#line 1333
50456  tmp___19 = __builtin_expect(__cil_tmp93, 0L);
50457  }
50458#line 1333
50459  if (tmp___19) {
50460#line 1334
50461    ret = -12;
50462#line 1335
50463    goto out_no_user_srf;
50464  } else {
50465
50466  }
50467#line 1338
50468  __cil_tmp94 = (unsigned long )user_srf;
50469#line 1338
50470  __cil_tmp95 = __cil_tmp94 + 64;
50471#line 1338
50472  srf = (struct vmw_surface *)__cil_tmp95;
50473#line 1339
50474  __cil_tmp96 = & res;
50475#line 1339
50476  *__cil_tmp96 = (struct vmw_resource *)srf;
50477#line 1341
50478  __cil_tmp97 = (unsigned long )srf;
50479#line 1341
50480  __cil_tmp98 = __cil_tmp97 + 112;
50481#line 1341
50482  *((uint32_t *)__cil_tmp98) = *((uint32_t *)req);
50483#line 1342
50484  __cil_tmp99 = (unsigned long )srf;
50485#line 1342
50486  __cil_tmp100 = __cil_tmp99 + 116;
50487#line 1342
50488  __cil_tmp101 = (unsigned long )req;
50489#line 1342
50490  __cil_tmp102 = __cil_tmp101 + 4;
50491#line 1342
50492  *((uint32_t *)__cil_tmp100) = *((uint32_t *)__cil_tmp102);
50493#line 1343
50494  __cil_tmp103 = (unsigned long )srf;
50495#line 1343
50496  __cil_tmp104 = __cil_tmp103 + 156;
50497#line 1343
50498  __cil_tmp105 = (unsigned long )req;
50499#line 1343
50500  __cil_tmp106 = __cil_tmp105 + 44;
50501#line 1343
50502  __cil_tmp107 = *((int32_t *)__cil_tmp106);
50503#line 1343
50504  *((bool *)__cil_tmp104) = (bool )__cil_tmp107;
50505#line 1344
50506  __cil_tmp108 = (unsigned long )srf;
50507#line 1344
50508  __cil_tmp109 = __cil_tmp108 + 184;
50509#line 1344
50510  __cil_tmp110 = (void *)0;
50511#line 1344
50512  *((struct ttm_buffer_object **)__cil_tmp109) = (struct ttm_buffer_object *)__cil_tmp110;
50513#line 1346
50514  __len = 24UL;
50515#line 1346
50516  if (__len >= 64UL) {
50517    {
50518#line 1346
50519    __cil_tmp111 = 0 * 4UL;
50520#line 1346
50521    __cil_tmp112 = 120 + __cil_tmp111;
50522#line 1346
50523    __cil_tmp113 = (unsigned long )srf;
50524#line 1346
50525    __cil_tmp114 = __cil_tmp113 + __cil_tmp112;
50526#line 1346
50527    __cil_tmp115 = (uint32_t *)__cil_tmp114;
50528#line 1346
50529    __cil_tmp116 = (void *)__cil_tmp115;
50530#line 1346
50531    __cil_tmp117 = 0 * 4UL;
50532#line 1346
50533    __cil_tmp118 = 8 + __cil_tmp117;
50534#line 1346
50535    __cil_tmp119 = (unsigned long )req;
50536#line 1346
50537    __cil_tmp120 = __cil_tmp119 + __cil_tmp118;
50538#line 1346
50539    __cil_tmp121 = (uint32_t *)__cil_tmp120;
50540#line 1346
50541    __cil_tmp122 = (void    *)__cil_tmp121;
50542#line 1346
50543    __ret = __memcpy(__cil_tmp116, __cil_tmp122, __len);
50544    }
50545  } else {
50546    {
50547#line 1346
50548    __cil_tmp123 = 0 * 4UL;
50549#line 1346
50550    __cil_tmp124 = 120 + __cil_tmp123;
50551#line 1346
50552    __cil_tmp125 = (unsigned long )srf;
50553#line 1346
50554    __cil_tmp126 = __cil_tmp125 + __cil_tmp124;
50555#line 1346
50556    __cil_tmp127 = (uint32_t *)__cil_tmp126;
50557#line 1346
50558    __cil_tmp128 = (void *)__cil_tmp127;
50559#line 1346
50560    __cil_tmp129 = 0 * 4UL;
50561#line 1346
50562    __cil_tmp130 = 8 + __cil_tmp129;
50563#line 1346
50564    __cil_tmp131 = (unsigned long )req;
50565#line 1346
50566    __cil_tmp132 = __cil_tmp131 + __cil_tmp130;
50567#line 1346
50568    __cil_tmp133 = (uint32_t *)__cil_tmp132;
50569#line 1346
50570    __cil_tmp134 = (void    *)__cil_tmp133;
50571#line 1346
50572    __ret = __builtin_memcpy(__cil_tmp128, __cil_tmp134, __len);
50573    }
50574  }
50575  {
50576#line 1347
50577  __cil_tmp135 = (unsigned long )srf;
50578#line 1347
50579  __cil_tmp136 = __cil_tmp135 + 152;
50580#line 1347
50581  *((uint32_t *)__cil_tmp136) = num_sizes;
50582#line 1348
50583  __cil_tmp137 = (unsigned long )user_srf;
50584#line 1348
50585  __cil_tmp138 = __cil_tmp137 + 272;
50586#line 1348
50587  *((uint32_t *)__cil_tmp138) = size;
50588#line 1350
50589  __cil_tmp139 = (unsigned long )srf;
50590#line 1350
50591  __cil_tmp140 = __cil_tmp139 + 152;
50592#line 1350
50593  __cil_tmp141 = *((uint32_t *)__cil_tmp140);
50594#line 1350
50595  __cil_tmp142 = (unsigned long )__cil_tmp141;
50596#line 1350
50597  __cil_tmp143 = __cil_tmp142 * 16UL;
50598#line 1350
50599  tmp___20 = kmalloc(__cil_tmp143, 208U);
50600#line 1350
50601  __cil_tmp144 = (unsigned long )srf;
50602#line 1350
50603  __cil_tmp145 = __cil_tmp144 + 144;
50604#line 1350
50605  *((struct drm_vmw_size **)__cil_tmp145) = (struct drm_vmw_size *)tmp___20;
50606#line 1351
50607  __cil_tmp146 = (void *)0;
50608#line 1351
50609  __cil_tmp147 = (unsigned long )__cil_tmp146;
50610#line 1351
50611  __cil_tmp148 = (unsigned long )srf;
50612#line 1351
50613  __cil_tmp149 = __cil_tmp148 + 144;
50614#line 1351
50615  __cil_tmp150 = *((struct drm_vmw_size **)__cil_tmp149);
50616#line 1351
50617  __cil_tmp151 = (unsigned long )__cil_tmp150;
50618#line 1351
50619  __cil_tmp152 = __cil_tmp151 == __cil_tmp147;
50620#line 1351
50621  __cil_tmp153 = ! __cil_tmp152;
50622#line 1351
50623  __cil_tmp154 = ! __cil_tmp153;
50624#line 1351
50625  __cil_tmp155 = (long )__cil_tmp154;
50626#line 1351
50627  tmp___21 = __builtin_expect(__cil_tmp155, 0L);
50628  }
50629#line 1351
50630  if (tmp___21) {
50631#line 1352
50632    ret = -12;
50633#line 1353
50634    goto out_no_sizes;
50635  } else {
50636
50637  }
50638  {
50639#line 1355
50640  __cil_tmp156 = (unsigned long )srf;
50641#line 1355
50642  __cil_tmp157 = __cil_tmp156 + 152;
50643#line 1355
50644  __cil_tmp158 = *((uint32_t *)__cil_tmp157);
50645#line 1355
50646  __cil_tmp159 = (unsigned long )__cil_tmp158;
50647#line 1355
50648  __cil_tmp160 = __cil_tmp159 * 12UL;
50649#line 1355
50650  tmp___22 = kmalloc(__cil_tmp160, 208U);
50651#line 1355
50652  __cil_tmp161 = (unsigned long )srf;
50653#line 1355
50654  __cil_tmp162 = __cil_tmp161 + 192;
50655#line 1355
50656  *((struct vmw_surface_offset **)__cil_tmp162) = (struct vmw_surface_offset *)tmp___22;
50657#line 1357
50658  __cil_tmp163 = (void *)0;
50659#line 1357
50660  __cil_tmp164 = (unsigned long )__cil_tmp163;
50661#line 1357
50662  __cil_tmp165 = (unsigned long )srf;
50663#line 1357
50664  __cil_tmp166 = __cil_tmp165 + 144;
50665#line 1357
50666  __cil_tmp167 = *((struct drm_vmw_size **)__cil_tmp166);
50667#line 1357
50668  __cil_tmp168 = (unsigned long )__cil_tmp167;
50669#line 1357
50670  __cil_tmp169 = __cil_tmp168 == __cil_tmp164;
50671#line 1357
50672  __cil_tmp170 = ! __cil_tmp169;
50673#line 1357
50674  __cil_tmp171 = ! __cil_tmp170;
50675#line 1357
50676  __cil_tmp172 = (long )__cil_tmp171;
50677#line 1357
50678  tmp___23 = __builtin_expect(__cil_tmp172, 0L);
50679  }
50680#line 1357
50681  if (tmp___23) {
50682#line 1358
50683    ret = -12;
50684#line 1359
50685    goto out_no_offsets;
50686  } else {
50687
50688  }
50689  {
50690#line 1362
50691  __cil_tmp173 = (unsigned long )req;
50692#line 1362
50693  __cil_tmp174 = __cil_tmp173 + 32;
50694#line 1362
50695  __cil_tmp175 = *((uint64_t *)__cil_tmp174);
50696#line 1362
50697  __cil_tmp176 = (unsigned long )__cil_tmp175;
50698#line 1362
50699  user_sizes = (struct drm_vmw_size *)__cil_tmp176;
50700#line 1365
50701  __cil_tmp177 = (unsigned long )srf;
50702#line 1365
50703  __cil_tmp178 = __cil_tmp177 + 144;
50704#line 1365
50705  __cil_tmp179 = *((struct drm_vmw_size **)__cil_tmp178);
50706#line 1365
50707  __cil_tmp180 = (void *)__cil_tmp179;
50708#line 1365
50709  __cil_tmp181 = (void    *)user_sizes;
50710#line 1365
50711  __cil_tmp182 = (unsigned long )srf;
50712#line 1365
50713  __cil_tmp183 = __cil_tmp182 + 152;
50714#line 1365
50715  __cil_tmp184 = *((uint32_t *)__cil_tmp183);
50716#line 1365
50717  __cil_tmp185 = (unsigned long )__cil_tmp184;
50718#line 1365
50719  __cil_tmp186 = __cil_tmp185 * 16UL;
50720#line 1365
50721  tmp___24 = (unsigned long )copy_from_user(__cil_tmp180, __cil_tmp181, __cil_tmp186);
50722#line 1365
50723  ret = (int )tmp___24;
50724#line 1367
50725  __cil_tmp187 = ret != 0;
50726#line 1367
50727  __cil_tmp188 = ! __cil_tmp187;
50728#line 1367
50729  __cil_tmp189 = ! __cil_tmp188;
50730#line 1367
50731  __cil_tmp190 = (long )__cil_tmp189;
50732#line 1367
50733  tmp___25 = __builtin_expect(__cil_tmp190, 0L);
50734  }
50735#line 1367
50736  if (tmp___25) {
50737#line 1368
50738    ret = -14;
50739#line 1369
50740    goto out_no_copy;
50741  } else {
50742
50743  }
50744#line 1372
50745  cur_bo_offset = (uint32_t )0;
50746#line 1373
50747  __cil_tmp191 = (unsigned long )srf;
50748#line 1373
50749  __cil_tmp192 = __cil_tmp191 + 192;
50750#line 1373
50751  cur_offset = *((struct vmw_surface_offset **)__cil_tmp192);
50752#line 1374
50753  __cil_tmp193 = (unsigned long )srf;
50754#line 1374
50755  __cil_tmp194 = __cil_tmp193 + 144;
50756#line 1374
50757  cur_size = *((struct drm_vmw_size **)__cil_tmp194);
50758#line 1376
50759  __cil_tmp195 = (unsigned long )srf;
50760#line 1376
50761  __cil_tmp196 = __cil_tmp195 + 116;
50762#line 1376
50763  __cil_tmp197 = *((uint32_t *)__cil_tmp196);
50764#line 1376
50765  __cil_tmp198 = __cil_tmp197 * 2UL;
50766#line 1376
50767  __cil_tmp199 = (unsigned long )(vmw_sf_bpp) + __cil_tmp198;
50768#line 1376
50769  __cil_tmp200 = *((uint8_t    *)__cil_tmp199);
50770#line 1376
50771  bpp = (uint32_t )__cil_tmp200;
50772#line 1377
50773  __cil_tmp201 = (unsigned long )srf;
50774#line 1377
50775  __cil_tmp202 = __cil_tmp201 + 116;
50776#line 1377
50777  __cil_tmp203 = *((uint32_t *)__cil_tmp202);
50778#line 1377
50779  __cil_tmp204 = __cil_tmp203 * 2UL;
50780#line 1377
50781  __cil_tmp205 = __cil_tmp204 + 1;
50782#line 1377
50783  __cil_tmp206 = (unsigned long )(vmw_sf_bpp) + __cil_tmp205;
50784#line 1377
50785  __cil_tmp207 = *((uint8_t    *)__cil_tmp206);
50786#line 1377
50787  stride_bpp = (uint32_t )__cil_tmp207;
50788#line 1379
50789  i = 0;
50790  {
50791#line 1379
50792  while (1) {
50793    while_continue___0: /* CIL Label */ ;
50794#line 1379
50795    if (i < 6) {
50796
50797    } else {
50798#line 1379
50799      goto while_break___0;
50800    }
50801#line 1380
50802    j = 0;
50803    {
50804#line 1380
50805    while (1) {
50806      while_continue___1: /* CIL Label */ ;
50807      {
50808#line 1380
50809      __cil_tmp208 = i * 4UL;
50810#line 1380
50811      __cil_tmp209 = 120 + __cil_tmp208;
50812#line 1380
50813      __cil_tmp210 = (unsigned long )srf;
50814#line 1380
50815      __cil_tmp211 = __cil_tmp210 + __cil_tmp209;
50816#line 1380
50817      __cil_tmp212 = *((uint32_t *)__cil_tmp211);
50818#line 1380
50819      __cil_tmp213 = (uint32_t )j;
50820#line 1380
50821      if (__cil_tmp213 < __cil_tmp212) {
50822
50823      } else {
50824#line 1380
50825        goto while_break___1;
50826      }
50827      }
50828#line 1381
50829      __cil_tmp214 = *((uint32_t *)cur_size);
50830#line 1381
50831      __cil_tmp215 = __cil_tmp214 * stride_bpp;
50832#line 1381
50833      __cil_tmp216 = __cil_tmp215 + 7U;
50834#line 1381
50835      stride = __cil_tmp216 >> 3;
50836#line 1384
50837      *((uint32_t *)cur_offset) = (uint32_t )i;
50838#line 1385
50839      __cil_tmp217 = (unsigned long )cur_offset;
50840#line 1385
50841      __cil_tmp218 = __cil_tmp217 + 4;
50842#line 1385
50843      *((uint32_t *)__cil_tmp218) = (uint32_t )j;
50844#line 1386
50845      __cil_tmp219 = (unsigned long )cur_offset;
50846#line 1386
50847      __cil_tmp220 = __cil_tmp219 + 8;
50848#line 1386
50849      *((uint32_t *)__cil_tmp220) = cur_bo_offset;
50850#line 1387
50851      __cil_tmp221 = (unsigned long )cur_size;
50852#line 1387
50853      __cil_tmp222 = __cil_tmp221 + 8;
50854#line 1387
50855      __cil_tmp223 = *((uint32_t *)__cil_tmp222);
50856#line 1387
50857      __cil_tmp224 = (unsigned long )cur_size;
50858#line 1387
50859      __cil_tmp225 = __cil_tmp224 + 4;
50860#line 1387
50861      __cil_tmp226 = *((uint32_t *)__cil_tmp225);
50862#line 1387
50863      __cil_tmp227 = stride * __cil_tmp226;
50864#line 1387
50865      __cil_tmp228 = __cil_tmp227 * __cil_tmp223;
50866#line 1387
50867      __cil_tmp229 = __cil_tmp228 * bpp;
50868#line 1387
50869      __cil_tmp230 = __cil_tmp229 / stride_bpp;
50870#line 1387
50871      cur_bo_offset = cur_bo_offset + __cil_tmp230;
50872#line 1389
50873      cur_offset = cur_offset + 1;
50874#line 1390
50875      cur_size = cur_size + 1;
50876#line 1380
50877      j = j + 1;
50878    }
50879    while_break___1: /* CIL Label */ ;
50880    }
50881#line 1379
50882    i = i + 1;
50883  }
50884  while_break___0: /* CIL Label */ ;
50885  }
50886#line 1393
50887  __cil_tmp231 = (unsigned long )srf;
50888#line 1393
50889  __cil_tmp232 = __cil_tmp231 + 200;
50890#line 1393
50891  *((uint32_t *)__cil_tmp232) = cur_bo_offset;
50892  {
50893#line 1395
50894  __cil_tmp233 = (unsigned long )srf;
50895#line 1395
50896  __cil_tmp234 = __cil_tmp233 + 156;
50897#line 1395
50898  if (*((bool *)__cil_tmp234)) {
50899    {
50900#line 1395
50901    __cil_tmp235 = (unsigned long )srf;
50902#line 1395
50903    __cil_tmp236 = __cil_tmp235 + 152;
50904#line 1395
50905    __cil_tmp237 = *((uint32_t *)__cil_tmp236);
50906#line 1395
50907    if (__cil_tmp237 == 1U) {
50908      {
50909#line 1395
50910      __cil_tmp238 = (unsigned long )srf;
50911#line 1395
50912      __cil_tmp239 = __cil_tmp238 + 144;
50913#line 1395
50914      __cil_tmp240 = *((struct drm_vmw_size **)__cil_tmp239);
50915#line 1395
50916      __cil_tmp241 = __cil_tmp240 + 0;
50917#line 1395
50918      __cil_tmp242 = *((uint32_t *)__cil_tmp241);
50919#line 1395
50920      if (__cil_tmp242 == 64U) {
50921        {
50922#line 1395
50923        __cil_tmp243 = (unsigned long )srf;
50924#line 1395
50925        __cil_tmp244 = __cil_tmp243 + 144;
50926#line 1395
50927        __cil_tmp245 = *((struct drm_vmw_size **)__cil_tmp244);
50928#line 1395
50929        __cil_tmp246 = __cil_tmp245 + 0;
50930#line 1395
50931        __cil_tmp247 = (unsigned long )__cil_tmp246;
50932#line 1395
50933        __cil_tmp248 = __cil_tmp247 + 4;
50934#line 1395
50935        __cil_tmp249 = *((uint32_t *)__cil_tmp248);
50936#line 1395
50937        if (__cil_tmp249 == 64U) {
50938          {
50939#line 1395
50940          __cil_tmp250 = (unsigned long )srf;
50941#line 1395
50942          __cil_tmp251 = __cil_tmp250 + 116;
50943#line 1395
50944          __cil_tmp252 = *((uint32_t *)__cil_tmp251);
50945#line 1395
50946          if (__cil_tmp252 == 2U) {
50947            {
50948#line 1402
50949            __cil_tmp253 = (size_t )16384;
50950#line 1402
50951            tmp___26 = kzalloc(__cil_tmp253, 208U);
50952#line 1402
50953            __cil_tmp254 = 160 + 16;
50954#line 1402
50955            __cil_tmp255 = (unsigned long )srf;
50956#line 1402
50957            __cil_tmp256 = __cil_tmp255 + __cil_tmp254;
50958#line 1402
50959            *((uint32_t **)__cil_tmp256) = (uint32_t *)tmp___26;
50960            }
50961            {
50962#line 1403
50963            __cil_tmp257 = 160 + 16;
50964#line 1403
50965            __cil_tmp258 = (unsigned long )srf;
50966#line 1403
50967            __cil_tmp259 = __cil_tmp258 + __cil_tmp257;
50968#line 1403
50969            __cil_tmp260 = *((uint32_t **)__cil_tmp259);
50970#line 1403
50971            if (! __cil_tmp260) {
50972              {
50973#line 1404
50974              drm_err("vmw_surface_define_ioctl", "Failed to allocate cursor_image\n");
50975#line 1405
50976              ret = -12;
50977              }
50978#line 1406
50979              goto out_no_copy;
50980            } else {
50981
50982            }
50983            }
50984          } else {
50985#line 1409
50986            __cil_tmp261 = 160 + 16;
50987#line 1409
50988            __cil_tmp262 = (unsigned long )srf;
50989#line 1409
50990            __cil_tmp263 = __cil_tmp262 + __cil_tmp261;
50991#line 1409
50992            __cil_tmp264 = (void *)0;
50993#line 1409
50994            *((uint32_t **)__cil_tmp263) = (uint32_t *)__cil_tmp264;
50995          }
50996          }
50997        } else {
50998#line 1409
50999          __cil_tmp265 = 160 + 16;
51000#line 1409
51001          __cil_tmp266 = (unsigned long )srf;
51002#line 1409
51003          __cil_tmp267 = __cil_tmp266 + __cil_tmp265;
51004#line 1409
51005          __cil_tmp268 = (void *)0;
51006#line 1409
51007          *((uint32_t **)__cil_tmp267) = (uint32_t *)__cil_tmp268;
51008        }
51009        }
51010      } else {
51011#line 1409
51012        __cil_tmp269 = 160 + 16;
51013#line 1409
51014        __cil_tmp270 = (unsigned long )srf;
51015#line 1409
51016        __cil_tmp271 = __cil_tmp270 + __cil_tmp269;
51017#line 1409
51018        __cil_tmp272 = (void *)0;
51019#line 1409
51020        *((uint32_t **)__cil_tmp271) = (uint32_t *)__cil_tmp272;
51021      }
51022      }
51023    } else {
51024#line 1409
51025      __cil_tmp273 = 160 + 16;
51026#line 1409
51027      __cil_tmp274 = (unsigned long )srf;
51028#line 1409
51029      __cil_tmp275 = __cil_tmp274 + __cil_tmp273;
51030#line 1409
51031      __cil_tmp276 = (void *)0;
51032#line 1409
51033      *((uint32_t **)__cil_tmp275) = (uint32_t *)__cil_tmp276;
51034    }
51035    }
51036  } else {
51037#line 1409
51038    __cil_tmp277 = 160 + 16;
51039#line 1409
51040    __cil_tmp278 = (unsigned long )srf;
51041#line 1409
51042    __cil_tmp279 = __cil_tmp278 + __cil_tmp277;
51043#line 1409
51044    __cil_tmp280 = (void *)0;
51045#line 1409
51046    *((uint32_t **)__cil_tmp279) = (uint32_t *)__cil_tmp280;
51047  }
51048  }
51049  {
51050#line 1411
51051  __cil_tmp281 = (unsigned long )srf;
51052#line 1411
51053  __cil_tmp282 = __cil_tmp281 + 160;
51054#line 1411
51055  __cil_tmp283 = (void *)0;
51056#line 1411
51057  *((struct drm_crtc **)__cil_tmp282) = (struct drm_crtc *)__cil_tmp283;
51058#line 1413
51059  __cil_tmp284 = 0 + 28;
51060#line 1413
51061  __cil_tmp285 = (unsigned long )user_srf;
51062#line 1413
51063  __cil_tmp286 = __cil_tmp285 + __cil_tmp284;
51064#line 1413
51065  *((bool *)__cil_tmp286) = (bool )0;
51066#line 1414
51067  __cil_tmp287 = 0 + 32;
51068#line 1414
51069  __cil_tmp288 = (unsigned long )user_srf;
51070#line 1414
51071  __cil_tmp289 = __cil_tmp288 + __cil_tmp287;
51072#line 1414
51073  __cil_tmp290 = (void *)0;
51074#line 1414
51075  *((struct ttm_object_file **)__cil_tmp289) = (struct ttm_object_file *)__cil_tmp290;
51076#line 1421
51077  ret = vmw_surface_init(dev_priv, srf, & vmw_user_surface_free);
51078#line 1422
51079  __cil_tmp291 = ret != 0;
51080#line 1422
51081  __cil_tmp292 = ! __cil_tmp291;
51082#line 1422
51083  __cil_tmp293 = ! __cil_tmp292;
51084#line 1422
51085  __cil_tmp294 = (long )__cil_tmp293;
51086#line 1422
51087  tmp___27 = __builtin_expect(__cil_tmp294, 0L);
51088  }
51089#line 1422
51090  if (tmp___27) {
51091#line 1423
51092    goto out_unlock;
51093  } else {
51094
51095  }
51096  {
51097#line 1425
51098  __cil_tmp295 = & tmp___8;
51099#line 1425
51100  __cil_tmp296 = (struct vmw_resource *)srf;
51101#line 1425
51102  *__cil_tmp295 = vmw_resource_reference(__cil_tmp296);
51103#line 1426
51104  __cil_tmp297 = (struct ttm_base_object *)user_srf;
51105#line 1426
51106  __cil_tmp298 = (unsigned long )req;
51107#line 1426
51108  __cil_tmp299 = __cil_tmp298 + 40;
51109#line 1426
51110  __cil_tmp300 = *((int32_t *)__cil_tmp299);
51111#line 1426
51112  __cil_tmp301 = (bool )__cil_tmp300;
51113#line 1426
51114  __cil_tmp302 = (enum ttm_object_type )257;
51115#line 1426
51116  __cil_tmp303 = (void *)0;
51117#line 1426
51118  __cil_tmp304 = (void (*)(struct ttm_base_object * , enum ttm_ref_type ref_type ))__cil_tmp303;
51119#line 1426
51120  ret = ttm_base_object_init(tfile, __cil_tmp297, __cil_tmp301, __cil_tmp302, & vmw_user_surface_base_release,
51121                             __cil_tmp304);
51122#line 1430
51123  __cil_tmp305 = ret != 0;
51124#line 1430
51125  __cil_tmp306 = ! __cil_tmp305;
51126#line 1430
51127  __cil_tmp307 = ! __cil_tmp306;
51128#line 1430
51129  __cil_tmp308 = (long )__cil_tmp307;
51130#line 1430
51131  tmp___28 = __builtin_expect(__cil_tmp308, 0L);
51132  }
51133#line 1430
51134  if (tmp___28) {
51135    {
51136#line 1431
51137    vmw_resource_unreference(& tmp___8);
51138#line 1432
51139    vmw_resource_unreference(& res);
51140    }
51141#line 1433
51142    goto out_unlock;
51143  } else {
51144
51145  }
51146#line 1436
51147  __cil_tmp309 = 0 + 16;
51148#line 1436
51149  __cil_tmp310 = 0 + __cil_tmp309;
51150#line 1436
51151  __cil_tmp311 = (unsigned long )user_srf;
51152#line 1436
51153  __cil_tmp312 = __cil_tmp311 + __cil_tmp310;
51154#line 1436
51155  __cil_tmp313 = *((unsigned long *)__cil_tmp312);
51156#line 1436
51157  *((int32_t *)rep) = (int32_t )__cil_tmp313;
51158  {
51159#line 1437
51160  __cil_tmp314 = *((int32_t *)rep);
51161#line 1437
51162  __cil_tmp315 = (uint32 )__cil_tmp314;
51163#line 1437
51164  if (__cil_tmp315 == 4294967295U) {
51165    {
51166#line 1438
51167    drm_err("vmw_surface_define_ioctl", "Created bad Surface ID.\n");
51168    }
51169  } else {
51170
51171  }
51172  }
51173  {
51174#line 1440
51175  vmw_resource_unreference(& res);
51176#line 1442
51177  __cil_tmp316 = (struct ttm_lock *)vmaster;
51178#line 1442
51179  ttm_read_unlock(__cil_tmp316);
51180  }
51181#line 1443
51182  return (0);
51183  out_no_copy: 
51184  {
51185#line 1445
51186  __cil_tmp317 = (unsigned long )srf;
51187#line 1445
51188  __cil_tmp318 = __cil_tmp317 + 192;
51189#line 1445
51190  __cil_tmp319 = *((struct vmw_surface_offset **)__cil_tmp318);
51191#line 1445
51192  __cil_tmp320 = (void    *)__cil_tmp319;
51193#line 1445
51194  kfree(__cil_tmp320);
51195  }
51196  out_no_offsets: 
51197  {
51198#line 1447
51199  __cil_tmp321 = (unsigned long )srf;
51200#line 1447
51201  __cil_tmp322 = __cil_tmp321 + 144;
51202#line 1447
51203  __cil_tmp323 = *((struct drm_vmw_size **)__cil_tmp322);
51204#line 1447
51205  __cil_tmp324 = (void    *)__cil_tmp323;
51206#line 1447
51207  kfree(__cil_tmp324);
51208  }
51209  out_no_sizes: 
51210  {
51211#line 1449
51212  __cil_tmp325 = (void    *)user_srf;
51213#line 1449
51214  kfree(__cil_tmp325);
51215  }
51216  out_no_user_srf: 
51217  {
51218#line 1451
51219  tmp___29 = vmw_mem_glob(dev_priv);
51220#line 1451
51221  __cil_tmp326 = (uint64_t )size;
51222#line 1451
51223  ttm_mem_global_free(tmp___29, __cil_tmp326);
51224  }
51225  out_unlock: 
51226  {
51227#line 1453
51228  __cil_tmp327 = (struct ttm_lock *)vmaster;
51229#line 1453
51230  ttm_read_unlock(__cil_tmp327);
51231  }
51232#line 1454
51233  return (ret);
51234}
51235}
51236#line 1457 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51237int vmw_surface_reference_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
51238{ union drm_vmw_surface_reference_arg *arg ;
51239  struct drm_vmw_surface_arg *req ;
51240  struct drm_vmw_surface_create_req *rep ;
51241  struct ttm_object_file *tfile ;
51242  struct vmw_fpriv *tmp___7 ;
51243  struct vmw_surface *srf ;
51244  struct vmw_user_surface *user_srf ;
51245  struct drm_vmw_size *user_sizes ;
51246  struct ttm_base_object *base ;
51247  int ret ;
51248  long tmp___8 ;
51249  long tmp___9 ;
51250  struct ttm_base_object    *__mptr ;
51251  long tmp___10 ;
51252  size_t __len ;
51253  void *__ret ;
51254  long tmp___11 ;
51255  unsigned long __cil_tmp21 ;
51256  unsigned long __cil_tmp22 ;
51257  struct ttm_base_object **__cil_tmp23 ;
51258  int32_t __cil_tmp24 ;
51259  uint32_t __cil_tmp25 ;
51260  void *__cil_tmp26 ;
51261  unsigned long __cil_tmp27 ;
51262  struct ttm_base_object **__cil_tmp28 ;
51263  struct ttm_base_object *__cil_tmp29 ;
51264  unsigned long __cil_tmp30 ;
51265  int __cil_tmp31 ;
51266  int __cil_tmp32 ;
51267  int __cil_tmp33 ;
51268  long __cil_tmp34 ;
51269  struct ttm_base_object **__cil_tmp35 ;
51270  struct ttm_base_object *__cil_tmp36 ;
51271  unsigned long __cil_tmp37 ;
51272  unsigned long __cil_tmp38 ;
51273  enum ttm_object_type __cil_tmp39 ;
51274  unsigned int __cil_tmp40 ;
51275  int __cil_tmp41 ;
51276  int __cil_tmp42 ;
51277  int __cil_tmp43 ;
51278  long __cil_tmp44 ;
51279  struct ttm_base_object **__cil_tmp45 ;
51280  struct ttm_base_object *__cil_tmp46 ;
51281  struct vmw_user_surface *__cil_tmp47 ;
51282  struct ttm_base_object *__cil_tmp48 ;
51283  unsigned int __cil_tmp49 ;
51284  char *__cil_tmp50 ;
51285  char *__cil_tmp51 ;
51286  unsigned long __cil_tmp52 ;
51287  unsigned long __cil_tmp53 ;
51288  struct ttm_base_object *__cil_tmp54 ;
51289  enum ttm_ref_type __cil_tmp55 ;
51290  void *__cil_tmp56 ;
51291  bool *__cil_tmp57 ;
51292  int __cil_tmp58 ;
51293  int __cil_tmp59 ;
51294  int __cil_tmp60 ;
51295  long __cil_tmp61 ;
51296  unsigned long __cil_tmp62 ;
51297  unsigned long __cil_tmp63 ;
51298  unsigned long __cil_tmp64 ;
51299  unsigned long __cil_tmp65 ;
51300  unsigned long __cil_tmp66 ;
51301  unsigned long __cil_tmp67 ;
51302  unsigned long __cil_tmp68 ;
51303  unsigned long __cil_tmp69 ;
51304  unsigned long __cil_tmp70 ;
51305  unsigned long __cil_tmp71 ;
51306  uint32_t *__cil_tmp72 ;
51307  void *__cil_tmp73 ;
51308  unsigned long __cil_tmp74 ;
51309  unsigned long __cil_tmp75 ;
51310  unsigned long __cil_tmp76 ;
51311  unsigned long __cil_tmp77 ;
51312  uint32_t *__cil_tmp78 ;
51313  void    *__cil_tmp79 ;
51314  unsigned long __cil_tmp80 ;
51315  unsigned long __cil_tmp81 ;
51316  unsigned long __cil_tmp82 ;
51317  unsigned long __cil_tmp83 ;
51318  uint32_t *__cil_tmp84 ;
51319  void *__cil_tmp85 ;
51320  unsigned long __cil_tmp86 ;
51321  unsigned long __cil_tmp87 ;
51322  unsigned long __cil_tmp88 ;
51323  unsigned long __cil_tmp89 ;
51324  uint32_t *__cil_tmp90 ;
51325  void    *__cil_tmp91 ;
51326  unsigned long __cil_tmp92 ;
51327  unsigned long __cil_tmp93 ;
51328  uint64_t __cil_tmp94 ;
51329  unsigned long __cil_tmp95 ;
51330  void *__cil_tmp96 ;
51331  unsigned long __cil_tmp97 ;
51332  unsigned long __cil_tmp98 ;
51333  struct drm_vmw_size *__cil_tmp99 ;
51334  void    *__cil_tmp100 ;
51335  unsigned long __cil_tmp101 ;
51336  unsigned long __cil_tmp102 ;
51337  uint32_t __cil_tmp103 ;
51338  unsigned long __cil_tmp104 ;
51339  unsigned long __cil_tmp105 ;
51340  unsigned int __cil_tmp106 ;
51341  int __cil_tmp107 ;
51342  int __cil_tmp108 ;
51343  int __cil_tmp109 ;
51344  long __cil_tmp110 ;
51345  unsigned long __cil_tmp111 ;
51346  unsigned long __cil_tmp112 ;
51347  uint32_t __cil_tmp113 ;
51348
51349  {
51350  {
51351#line 1460
51352  arg = (union drm_vmw_surface_reference_arg *)data;
51353#line 1462
51354  req = (struct drm_vmw_surface_arg *)arg;
51355#line 1463
51356  rep = (struct drm_vmw_surface_create_req *)arg;
51357#line 1464
51358  tmp___7 = vmw_fpriv(file_priv);
51359#line 1464
51360  __cil_tmp21 = (unsigned long )tmp___7;
51361#line 1464
51362  __cil_tmp22 = __cil_tmp21 + 8;
51363#line 1464
51364  tfile = *((struct ttm_object_file **)__cil_tmp22);
51365#line 1469
51366  ret = -22;
51367#line 1471
51368  __cil_tmp23 = & base;
51369#line 1471
51370  __cil_tmp24 = *((int32_t *)req);
51371#line 1471
51372  __cil_tmp25 = (uint32_t )__cil_tmp24;
51373#line 1471
51374  *__cil_tmp23 = ttm_base_object_lookup(tfile, __cil_tmp25);
51375#line 1472
51376  __cil_tmp26 = (void *)0;
51377#line 1472
51378  __cil_tmp27 = (unsigned long )__cil_tmp26;
51379#line 1472
51380  __cil_tmp28 = & base;
51381#line 1472
51382  __cil_tmp29 = *__cil_tmp28;
51383#line 1472
51384  __cil_tmp30 = (unsigned long )__cil_tmp29;
51385#line 1472
51386  __cil_tmp31 = __cil_tmp30 == __cil_tmp27;
51387#line 1472
51388  __cil_tmp32 = ! __cil_tmp31;
51389#line 1472
51390  __cil_tmp33 = ! __cil_tmp32;
51391#line 1472
51392  __cil_tmp34 = (long )__cil_tmp33;
51393#line 1472
51394  tmp___8 = __builtin_expect(__cil_tmp34, 0L);
51395  }
51396#line 1472
51397  if (tmp___8) {
51398    {
51399#line 1473
51400    drm_err("vmw_surface_reference_ioctl", "Could not find surface to reference.\n");
51401    }
51402#line 1474
51403    return (-22);
51404  } else {
51405
51406  }
51407  {
51408#line 1477
51409  __cil_tmp35 = & base;
51410#line 1477
51411  __cil_tmp36 = *__cil_tmp35;
51412#line 1477
51413  __cil_tmp37 = (unsigned long )__cil_tmp36;
51414#line 1477
51415  __cil_tmp38 = __cil_tmp37 + 24;
51416#line 1477
51417  __cil_tmp39 = *((enum ttm_object_type *)__cil_tmp38);
51418#line 1477
51419  __cil_tmp40 = (unsigned int )__cil_tmp39;
51420#line 1477
51421  __cil_tmp41 = __cil_tmp40 != 257U;
51422#line 1477
51423  __cil_tmp42 = ! __cil_tmp41;
51424#line 1477
51425  __cil_tmp43 = ! __cil_tmp42;
51426#line 1477
51427  __cil_tmp44 = (long )__cil_tmp43;
51428#line 1477
51429  tmp___9 = __builtin_expect(__cil_tmp44, 0L);
51430  }
51431#line 1477
51432  if (tmp___9) {
51433#line 1478
51434    goto out_bad_resource;
51435  } else {
51436
51437  }
51438  {
51439#line 1480
51440  __cil_tmp45 = & base;
51441#line 1480
51442  __cil_tmp46 = *__cil_tmp45;
51443#line 1480
51444  __mptr = (struct ttm_base_object    *)__cil_tmp46;
51445#line 1480
51446  __cil_tmp47 = (struct vmw_user_surface *)0;
51447#line 1480
51448  __cil_tmp48 = (struct ttm_base_object *)__cil_tmp47;
51449#line 1480
51450  __cil_tmp49 = (unsigned int )__cil_tmp48;
51451#line 1480
51452  __cil_tmp50 = (char *)__mptr;
51453#line 1480
51454  __cil_tmp51 = __cil_tmp50 - __cil_tmp49;
51455#line 1480
51456  user_srf = (struct vmw_user_surface *)__cil_tmp51;
51457#line 1481
51458  __cil_tmp52 = (unsigned long )user_srf;
51459#line 1481
51460  __cil_tmp53 = __cil_tmp52 + 64;
51461#line 1481
51462  srf = (struct vmw_surface *)__cil_tmp53;
51463#line 1483
51464  __cil_tmp54 = (struct ttm_base_object *)user_srf;
51465#line 1483
51466  __cil_tmp55 = (enum ttm_ref_type )0;
51467#line 1483
51468  __cil_tmp56 = (void *)0;
51469#line 1483
51470  __cil_tmp57 = (bool *)__cil_tmp56;
51471#line 1483
51472  ret = ttm_ref_object_add(tfile, __cil_tmp54, __cil_tmp55, __cil_tmp57);
51473#line 1484
51474  __cil_tmp58 = ret != 0;
51475#line 1484
51476  __cil_tmp59 = ! __cil_tmp58;
51477#line 1484
51478  __cil_tmp60 = ! __cil_tmp59;
51479#line 1484
51480  __cil_tmp61 = (long )__cil_tmp60;
51481#line 1484
51482  tmp___10 = __builtin_expect(__cil_tmp61, 0L);
51483  }
51484#line 1484
51485  if (tmp___10) {
51486    {
51487#line 1485
51488    drm_err("vmw_surface_reference_ioctl", "Could not add a reference to a surface.\n");
51489    }
51490#line 1486
51491    goto out_bad_resource;
51492  } else {
51493
51494  }
51495#line 1489
51496  __cil_tmp62 = (unsigned long )srf;
51497#line 1489
51498  __cil_tmp63 = __cil_tmp62 + 112;
51499#line 1489
51500  *((uint32_t *)rep) = *((uint32_t *)__cil_tmp63);
51501#line 1490
51502  __cil_tmp64 = (unsigned long )rep;
51503#line 1490
51504  __cil_tmp65 = __cil_tmp64 + 4;
51505#line 1490
51506  __cil_tmp66 = (unsigned long )srf;
51507#line 1490
51508  __cil_tmp67 = __cil_tmp66 + 116;
51509#line 1490
51510  *((uint32_t *)__cil_tmp65) = *((uint32_t *)__cil_tmp67);
51511#line 1491
51512  __len = 24UL;
51513#line 1491
51514  if (__len >= 64UL) {
51515    {
51516#line 1491
51517    __cil_tmp68 = 0 * 4UL;
51518#line 1491
51519    __cil_tmp69 = 8 + __cil_tmp68;
51520#line 1491
51521    __cil_tmp70 = (unsigned long )rep;
51522#line 1491
51523    __cil_tmp71 = __cil_tmp70 + __cil_tmp69;
51524#line 1491
51525    __cil_tmp72 = (uint32_t *)__cil_tmp71;
51526#line 1491
51527    __cil_tmp73 = (void *)__cil_tmp72;
51528#line 1491
51529    __cil_tmp74 = 0 * 4UL;
51530#line 1491
51531    __cil_tmp75 = 120 + __cil_tmp74;
51532#line 1491
51533    __cil_tmp76 = (unsigned long )srf;
51534#line 1491
51535    __cil_tmp77 = __cil_tmp76 + __cil_tmp75;
51536#line 1491
51537    __cil_tmp78 = (uint32_t *)__cil_tmp77;
51538#line 1491
51539    __cil_tmp79 = (void    *)__cil_tmp78;
51540#line 1491
51541    __ret = __memcpy(__cil_tmp73, __cil_tmp79, __len);
51542    }
51543  } else {
51544    {
51545#line 1491
51546    __cil_tmp80 = 0 * 4UL;
51547#line 1491
51548    __cil_tmp81 = 8 + __cil_tmp80;
51549#line 1491
51550    __cil_tmp82 = (unsigned long )rep;
51551#line 1491
51552    __cil_tmp83 = __cil_tmp82 + __cil_tmp81;
51553#line 1491
51554    __cil_tmp84 = (uint32_t *)__cil_tmp83;
51555#line 1491
51556    __cil_tmp85 = (void *)__cil_tmp84;
51557#line 1491
51558    __cil_tmp86 = 0 * 4UL;
51559#line 1491
51560    __cil_tmp87 = 120 + __cil_tmp86;
51561#line 1491
51562    __cil_tmp88 = (unsigned long )srf;
51563#line 1491
51564    __cil_tmp89 = __cil_tmp88 + __cil_tmp87;
51565#line 1491
51566    __cil_tmp90 = (uint32_t *)__cil_tmp89;
51567#line 1491
51568    __cil_tmp91 = (void    *)__cil_tmp90;
51569#line 1491
51570    __ret = __builtin_memcpy(__cil_tmp85, __cil_tmp91, __len);
51571    }
51572  }
51573#line 1492
51574  __cil_tmp92 = (unsigned long )rep;
51575#line 1492
51576  __cil_tmp93 = __cil_tmp92 + 32;
51577#line 1492
51578  __cil_tmp94 = *((uint64_t *)__cil_tmp93);
51579#line 1492
51580  __cil_tmp95 = (unsigned long )__cil_tmp94;
51581#line 1492
51582  user_sizes = (struct drm_vmw_size *)__cil_tmp95;
51583#line 1495
51584  if (user_sizes) {
51585    {
51586#line 1496
51587    __cil_tmp96 = (void *)user_sizes;
51588#line 1496
51589    __cil_tmp97 = (unsigned long )srf;
51590#line 1496
51591    __cil_tmp98 = __cil_tmp97 + 144;
51592#line 1496
51593    __cil_tmp99 = *((struct drm_vmw_size **)__cil_tmp98);
51594#line 1496
51595    __cil_tmp100 = (void    *)__cil_tmp99;
51596#line 1496
51597    __cil_tmp101 = (unsigned long )srf;
51598#line 1496
51599    __cil_tmp102 = __cil_tmp101 + 152;
51600#line 1496
51601    __cil_tmp103 = *((uint32_t *)__cil_tmp102);
51602#line 1496
51603    __cil_tmp104 = (unsigned long )__cil_tmp103;
51604#line 1496
51605    __cil_tmp105 = __cil_tmp104 * 16UL;
51606#line 1496
51607    __cil_tmp106 = (unsigned int )__cil_tmp105;
51608#line 1496
51609    ret = (int )copy_to_user(__cil_tmp96, __cil_tmp100, __cil_tmp106);
51610    }
51611  } else {
51612
51613  }
51614  {
51615#line 1498
51616  __cil_tmp107 = ret != 0;
51617#line 1498
51618  __cil_tmp108 = ! __cil_tmp107;
51619#line 1498
51620  __cil_tmp109 = ! __cil_tmp108;
51621#line 1498
51622  __cil_tmp110 = (long )__cil_tmp109;
51623#line 1498
51624  tmp___11 = __builtin_expect(__cil_tmp110, 0L);
51625  }
51626#line 1498
51627  if (tmp___11) {
51628    {
51629#line 1499
51630    __cil_tmp111 = (unsigned long )srf;
51631#line 1499
51632    __cil_tmp112 = __cil_tmp111 + 152;
51633#line 1499
51634    __cil_tmp113 = *((uint32_t *)__cil_tmp112);
51635#line 1499
51636    drm_err("vmw_surface_reference_ioctl", "copy_to_user failed %p %u\n", user_sizes,
51637            __cil_tmp113);
51638#line 1501
51639    ret = -14;
51640    }
51641  } else {
51642
51643  }
51644  out_bad_resource: 
51645  {
51646#line 1505
51647  ttm_base_object_unref(& base);
51648  }
51649#line 1507
51650  return (ret);
51651}
51652}
51653#line 1510 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51654int vmw_surface_check(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
51655                      uint32_t handle , int *id ) 
51656{ struct ttm_base_object *base ;
51657  struct vmw_user_surface *user_srf ;
51658  int ret ;
51659  long tmp___7 ;
51660  long tmp___8 ;
51661  struct ttm_base_object    *__mptr ;
51662  struct ttm_base_object **__cil_tmp11 ;
51663  void *__cil_tmp12 ;
51664  unsigned long __cil_tmp13 ;
51665  struct ttm_base_object **__cil_tmp14 ;
51666  struct ttm_base_object *__cil_tmp15 ;
51667  unsigned long __cil_tmp16 ;
51668  int __cil_tmp17 ;
51669  int __cil_tmp18 ;
51670  int __cil_tmp19 ;
51671  long __cil_tmp20 ;
51672  struct ttm_base_object **__cil_tmp21 ;
51673  struct ttm_base_object *__cil_tmp22 ;
51674  unsigned long __cil_tmp23 ;
51675  unsigned long __cil_tmp24 ;
51676  enum ttm_object_type __cil_tmp25 ;
51677  unsigned int __cil_tmp26 ;
51678  int __cil_tmp27 ;
51679  int __cil_tmp28 ;
51680  int __cil_tmp29 ;
51681  long __cil_tmp30 ;
51682  struct ttm_base_object **__cil_tmp31 ;
51683  struct ttm_base_object *__cil_tmp32 ;
51684  struct vmw_user_surface *__cil_tmp33 ;
51685  struct ttm_base_object *__cil_tmp34 ;
51686  unsigned int __cil_tmp35 ;
51687  char *__cil_tmp36 ;
51688  char *__cil_tmp37 ;
51689  unsigned long __cil_tmp38 ;
51690  unsigned long __cil_tmp39 ;
51691  unsigned long __cil_tmp40 ;
51692  unsigned long __cil_tmp41 ;
51693
51694  {
51695  {
51696#line 1517
51697  ret = -1;
51698#line 1519
51699  __cil_tmp11 = & base;
51700#line 1519
51701  *__cil_tmp11 = ttm_base_object_lookup(tfile, handle);
51702#line 1520
51703  __cil_tmp12 = (void *)0;
51704#line 1520
51705  __cil_tmp13 = (unsigned long )__cil_tmp12;
51706#line 1520
51707  __cil_tmp14 = & base;
51708#line 1520
51709  __cil_tmp15 = *__cil_tmp14;
51710#line 1520
51711  __cil_tmp16 = (unsigned long )__cil_tmp15;
51712#line 1520
51713  __cil_tmp17 = __cil_tmp16 == __cil_tmp13;
51714#line 1520
51715  __cil_tmp18 = ! __cil_tmp17;
51716#line 1520
51717  __cil_tmp19 = ! __cil_tmp18;
51718#line 1520
51719  __cil_tmp20 = (long )__cil_tmp19;
51720#line 1520
51721  tmp___7 = __builtin_expect(__cil_tmp20, 0L);
51722  }
51723#line 1520
51724  if (tmp___7) {
51725#line 1521
51726    return (-22);
51727  } else {
51728
51729  }
51730  {
51731#line 1523
51732  __cil_tmp21 = & base;
51733#line 1523
51734  __cil_tmp22 = *__cil_tmp21;
51735#line 1523
51736  __cil_tmp23 = (unsigned long )__cil_tmp22;
51737#line 1523
51738  __cil_tmp24 = __cil_tmp23 + 24;
51739#line 1523
51740  __cil_tmp25 = *((enum ttm_object_type *)__cil_tmp24);
51741#line 1523
51742  __cil_tmp26 = (unsigned int )__cil_tmp25;
51743#line 1523
51744  __cil_tmp27 = __cil_tmp26 != 257U;
51745#line 1523
51746  __cil_tmp28 = ! __cil_tmp27;
51747#line 1523
51748  __cil_tmp29 = ! __cil_tmp28;
51749#line 1523
51750  __cil_tmp30 = (long )__cil_tmp29;
51751#line 1523
51752  tmp___8 = __builtin_expect(__cil_tmp30, 0L);
51753  }
51754#line 1523
51755  if (tmp___8) {
51756#line 1524
51757    goto out_bad_surface;
51758  } else {
51759
51760  }
51761#line 1526
51762  __cil_tmp31 = & base;
51763#line 1526
51764  __cil_tmp32 = *__cil_tmp31;
51765#line 1526
51766  __mptr = (struct ttm_base_object    *)__cil_tmp32;
51767#line 1526
51768  __cil_tmp33 = (struct vmw_user_surface *)0;
51769#line 1526
51770  __cil_tmp34 = (struct ttm_base_object *)__cil_tmp33;
51771#line 1526
51772  __cil_tmp35 = (unsigned int )__cil_tmp34;
51773#line 1526
51774  __cil_tmp36 = (char *)__mptr;
51775#line 1526
51776  __cil_tmp37 = __cil_tmp36 - __cil_tmp35;
51777#line 1526
51778  user_srf = (struct vmw_user_surface *)__cil_tmp37;
51779#line 1527
51780  __cil_tmp38 = 0 + 24;
51781#line 1527
51782  __cil_tmp39 = 64 + __cil_tmp38;
51783#line 1527
51784  __cil_tmp40 = (unsigned long )user_srf;
51785#line 1527
51786  __cil_tmp41 = __cil_tmp40 + __cil_tmp39;
51787#line 1527
51788  *id = *((int *)__cil_tmp41);
51789#line 1528
51790  ret = 0;
51791  out_bad_surface: 
51792  {
51793#line 1536
51794  ttm_base_object_unref(& base);
51795  }
51796#line 1537
51797  return (ret);
51798}
51799}
51800#line 1543 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51801void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo ) 
51802{ struct vmw_dma_buffer *vmw_bo ;
51803  struct vmw_dma_buffer *tmp___7 ;
51804  void    *__cil_tmp4 ;
51805
51806  {
51807  {
51808#line 1545
51809  tmp___7 = vmw_dma_buffer(bo);
51810#line 1545
51811  vmw_bo = tmp___7;
51812#line 1547
51813  __cil_tmp4 = (void    *)vmw_bo;
51814#line 1547
51815  kfree(__cil_tmp4);
51816  }
51817#line 1548
51818  return;
51819}
51820}
51821#line 1550 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51822int vmw_dmabuf_init(struct vmw_private *dev_priv , struct vmw_dma_buffer *vmw_bo ,
51823                    size_t size , struct ttm_placement *placement , bool interruptible ,
51824                    void (*bo_free)(struct ttm_buffer_object *bo ) ) 
51825{ struct ttm_bo_device *bdev ;
51826  size_t acc_size ;
51827  int ret ;
51828  long tmp___7 ;
51829  int __cil_tmp11 ;
51830  int __cil_tmp12 ;
51831  int __cil_tmp13 ;
51832  long __cil_tmp14 ;
51833  unsigned int __cil_tmp15 ;
51834  void *__cil_tmp16 ;
51835  unsigned long __cil_tmp17 ;
51836  unsigned long __cil_tmp18 ;
51837  struct list_head *__cil_tmp19 ;
51838  struct ttm_buffer_object *__cil_tmp20 ;
51839  enum ttm_bo_type __cil_tmp21 ;
51840  uint32_t __cil_tmp22 ;
51841  void *__cil_tmp23 ;
51842  struct file *__cil_tmp24 ;
51843
51844  {
51845#line 1556
51846  bdev = (struct ttm_bo_device *)dev_priv;
51847  {
51848#line 1560
51849  while (1) {
51850    while_continue: /* CIL Label */ ;
51851    {
51852#line 1560
51853    __cil_tmp11 = ! bo_free;
51854#line 1560
51855    __cil_tmp12 = ! __cil_tmp11;
51856#line 1560
51857    __cil_tmp13 = ! __cil_tmp12;
51858#line 1560
51859    __cil_tmp14 = (long )__cil_tmp13;
51860#line 1560
51861    tmp___7 = __builtin_expect(__cil_tmp14, 0L);
51862    }
51863#line 1560
51864    if (tmp___7) {
51865      {
51866#line 1560
51867      while (1) {
51868        while_continue___0: /* CIL Label */ ;
51869#line 1560
51870        __asm__  volatile   ("1:\tud2\n"
51871                             ".pushsection __bug_table,\"a\"\n"
51872                             "2:\t.long 1b - 2b, %c0 - 2b\n"
51873                             "\t.word %c1, 0\n"
51874                             "\t.org 2b+%c2\n"
51875                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"),
51876                             "i" (1560), "i" (12UL));
51877        {
51878#line 1560
51879        while (1) {
51880          while_continue___1: /* CIL Label */ ;
51881        }
51882        while_break___1: /* CIL Label */ ;
51883        }
51884#line 1560
51885        goto while_break___0;
51886      }
51887      while_break___0: /* CIL Label */ ;
51888      }
51889    } else {
51890
51891    }
51892#line 1560
51893    goto while_break;
51894  }
51895  while_break: /* CIL Label */ ;
51896  }
51897  {
51898#line 1562
51899  __cil_tmp15 = (unsigned int )416UL;
51900#line 1562
51901  acc_size = ttm_bo_acc_size(bdev, size, __cil_tmp15);
51902#line 1563
51903  __cil_tmp16 = (void *)vmw_bo;
51904#line 1563
51905  memset(__cil_tmp16, 0, 416UL);
51906#line 1565
51907  __cil_tmp17 = (unsigned long )vmw_bo;
51908#line 1565
51909  __cil_tmp18 = __cil_tmp17 + 384;
51910#line 1565
51911  __cil_tmp19 = (struct list_head *)__cil_tmp18;
51912#line 1565
51913  INIT_LIST_HEAD(__cil_tmp19);
51914#line 1567
51915  __cil_tmp20 = (struct ttm_buffer_object *)vmw_bo;
51916#line 1567
51917  __cil_tmp21 = (enum ttm_bo_type )0;
51918#line 1567
51919  __cil_tmp22 = (uint32_t )0;
51920#line 1567
51921  __cil_tmp23 = (void *)0;
51922#line 1567
51923  __cil_tmp24 = (struct file *)__cil_tmp23;
51924#line 1567
51925  ret = ttm_bo_init(bdev, __cil_tmp20, size, __cil_tmp21, placement, __cil_tmp22,
51926                    0UL, interruptible, __cil_tmp24, acc_size, bo_free);
51927  }
51928#line 1571
51929  return (ret);
51930}
51931}
51932#line 1574 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51933static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo ) 
51934{ struct vmw_user_dma_buffer *vmw_user_bo ;
51935  struct vmw_user_dma_buffer *tmp___7 ;
51936  void    *__cil_tmp4 ;
51937
51938  {
51939  {
51940#line 1576
51941  tmp___7 = vmw_user_dma_buffer(bo);
51942#line 1576
51943  vmw_user_bo = tmp___7;
51944#line 1578
51945  __cil_tmp4 = (void    *)vmw_user_bo;
51946#line 1578
51947  kfree(__cil_tmp4);
51948  }
51949#line 1579
51950  return;
51951}
51952}
51953#line 1581 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
51954static void vmw_user_dmabuf_release(struct ttm_base_object **p_base ) 
51955{ struct vmw_user_dma_buffer *vmw_user_bo ;
51956  struct ttm_base_object *base ;
51957  struct ttm_buffer_object *bo ;
51958  long tmp___7 ;
51959  struct ttm_base_object    *__mptr ;
51960  void *__cil_tmp7 ;
51961  void *__cil_tmp8 ;
51962  unsigned long __cil_tmp9 ;
51963  unsigned long __cil_tmp10 ;
51964  int __cil_tmp11 ;
51965  int __cil_tmp12 ;
51966  int __cil_tmp13 ;
51967  long __cil_tmp14 ;
51968  struct vmw_user_dma_buffer *__cil_tmp15 ;
51969  struct ttm_base_object *__cil_tmp16 ;
51970  unsigned int __cil_tmp17 ;
51971  char *__cil_tmp18 ;
51972  char *__cil_tmp19 ;
51973  struct ttm_buffer_object **__cil_tmp20 ;
51974  unsigned long __cil_tmp21 ;
51975  unsigned long __cil_tmp22 ;
51976
51977  {
51978  {
51979#line 1584
51980  base = *p_base;
51981#line 1587
51982  __cil_tmp7 = (void *)0;
51983#line 1587
51984  *p_base = (struct ttm_base_object *)__cil_tmp7;
51985#line 1589
51986  __cil_tmp8 = (void *)0;
51987#line 1589
51988  __cil_tmp9 = (unsigned long )__cil_tmp8;
51989#line 1589
51990  __cil_tmp10 = (unsigned long )base;
51991#line 1589
51992  __cil_tmp11 = __cil_tmp10 == __cil_tmp9;
51993#line 1589
51994  __cil_tmp12 = ! __cil_tmp11;
51995#line 1589
51996  __cil_tmp13 = ! __cil_tmp12;
51997#line 1589
51998  __cil_tmp14 = (long )__cil_tmp13;
51999#line 1589
52000  tmp___7 = __builtin_expect(__cil_tmp14, 0L);
52001  }
52002#line 1589
52003  if (tmp___7) {
52004#line 1590
52005    return;
52006  } else {
52007
52008  }
52009  {
52010#line 1592
52011  __mptr = (struct ttm_base_object    *)base;
52012#line 1592
52013  __cil_tmp15 = (struct vmw_user_dma_buffer *)0;
52014#line 1592
52015  __cil_tmp16 = (struct ttm_base_object *)__cil_tmp15;
52016#line 1592
52017  __cil_tmp17 = (unsigned int )__cil_tmp16;
52018#line 1592
52019  __cil_tmp18 = (char *)__mptr;
52020#line 1592
52021  __cil_tmp19 = __cil_tmp18 - __cil_tmp17;
52022#line 1592
52023  vmw_user_bo = (struct vmw_user_dma_buffer *)__cil_tmp19;
52024#line 1593
52025  __cil_tmp20 = & bo;
52026#line 1593
52027  __cil_tmp21 = (unsigned long )vmw_user_bo;
52028#line 1593
52029  __cil_tmp22 = __cil_tmp21 + 64;
52030#line 1593
52031  *__cil_tmp20 = (struct ttm_buffer_object *)__cil_tmp22;
52032#line 1594
52033  ttm_bo_unref(& bo);
52034  }
52035#line 1595
52036  return;
52037}
52038}
52039#line 1597 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52040int vmw_dmabuf_alloc_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
52041{ struct vmw_private *dev_priv ;
52042  struct vmw_private *tmp___7 ;
52043  union drm_vmw_alloc_dmabuf_arg *arg ;
52044  struct drm_vmw_alloc_dmabuf_req *req ;
52045  struct drm_vmw_dmabuf_rep *rep ;
52046  struct vmw_user_dma_buffer *vmw_user_bo ;
52047  struct ttm_buffer_object *tmp___8 ;
52048  struct vmw_master *vmaster ;
52049  struct vmw_master *tmp___9 ;
52050  int ret ;
52051  void *tmp___10 ;
52052  long tmp___11 ;
52053  long tmp___12 ;
52054  long tmp___13 ;
52055  struct vmw_fpriv *tmp___14 ;
52056  long tmp___15 ;
52057  unsigned long __cil_tmp20 ;
52058  unsigned long __cil_tmp21 ;
52059  struct drm_master *__cil_tmp22 ;
52060  void *__cil_tmp23 ;
52061  unsigned long __cil_tmp24 ;
52062  unsigned long __cil_tmp25 ;
52063  int __cil_tmp26 ;
52064  int __cil_tmp27 ;
52065  int __cil_tmp28 ;
52066  long __cil_tmp29 ;
52067  struct ttm_lock *__cil_tmp30 ;
52068  bool __cil_tmp31 ;
52069  int __cil_tmp32 ;
52070  int __cil_tmp33 ;
52071  int __cil_tmp34 ;
52072  long __cil_tmp35 ;
52073  void    *__cil_tmp36 ;
52074  unsigned long __cil_tmp37 ;
52075  unsigned long __cil_tmp38 ;
52076  struct vmw_dma_buffer *__cil_tmp39 ;
52077  uint32_t __cil_tmp40 ;
52078  size_t __cil_tmp41 ;
52079  bool __cil_tmp42 ;
52080  int __cil_tmp43 ;
52081  int __cil_tmp44 ;
52082  int __cil_tmp45 ;
52083  long __cil_tmp46 ;
52084  struct ttm_buffer_object **__cil_tmp47 ;
52085  unsigned long __cil_tmp48 ;
52086  unsigned long __cil_tmp49 ;
52087  struct ttm_buffer_object *__cil_tmp50 ;
52088  unsigned long __cil_tmp51 ;
52089  unsigned long __cil_tmp52 ;
52090  struct ttm_object_file *__cil_tmp53 ;
52091  struct ttm_base_object *__cil_tmp54 ;
52092  bool __cil_tmp55 ;
52093  enum ttm_object_type __cil_tmp56 ;
52094  void *__cil_tmp57 ;
52095  void (*__cil_tmp58)(struct ttm_base_object * , enum ttm_ref_type ref_type ) ;
52096  int __cil_tmp59 ;
52097  int __cil_tmp60 ;
52098  int __cil_tmp61 ;
52099  long __cil_tmp62 ;
52100  unsigned long __cil_tmp63 ;
52101  unsigned long __cil_tmp64 ;
52102  unsigned long __cil_tmp65 ;
52103  unsigned long __cil_tmp66 ;
52104  unsigned long __cil_tmp67 ;
52105  unsigned long __cil_tmp68 ;
52106  unsigned long __cil_tmp69 ;
52107  unsigned long __cil_tmp70 ;
52108  unsigned long __cil_tmp71 ;
52109  unsigned long __cil_tmp72 ;
52110  unsigned long __cil_tmp73 ;
52111  unsigned long __cil_tmp74 ;
52112  unsigned long __cil_tmp75 ;
52113  unsigned long __cil_tmp76 ;
52114  unsigned long __cil_tmp77 ;
52115  unsigned long __cil_tmp78 ;
52116  unsigned long __cil_tmp79 ;
52117  unsigned long __cil_tmp80 ;
52118  unsigned long __cil_tmp81 ;
52119  unsigned long __cil_tmp82 ;
52120  struct ttm_lock *__cil_tmp83 ;
52121
52122  {
52123  {
52124#line 1600
52125  tmp___7 = vmw_priv(dev);
52126#line 1600
52127  dev_priv = tmp___7;
52128#line 1601
52129  arg = (union drm_vmw_alloc_dmabuf_arg *)data;
52130#line 1603
52131  req = (struct drm_vmw_alloc_dmabuf_req *)arg;
52132#line 1604
52133  rep = (struct drm_vmw_dmabuf_rep *)arg;
52134#line 1607
52135  __cil_tmp20 = (unsigned long )file_priv;
52136#line 1607
52137  __cil_tmp21 = __cil_tmp20 + 152;
52138#line 1607
52139  __cil_tmp22 = *((struct drm_master **)__cil_tmp21);
52140#line 1607
52141  tmp___9 = vmw_master(__cil_tmp22);
52142#line 1607
52143  vmaster = tmp___9;
52144#line 1610
52145  tmp___10 = kzalloc(480UL, 208U);
52146#line 1610
52147  vmw_user_bo = (struct vmw_user_dma_buffer *)tmp___10;
52148#line 1611
52149  __cil_tmp23 = (void *)0;
52150#line 1611
52151  __cil_tmp24 = (unsigned long )__cil_tmp23;
52152#line 1611
52153  __cil_tmp25 = (unsigned long )vmw_user_bo;
52154#line 1611
52155  __cil_tmp26 = __cil_tmp25 == __cil_tmp24;
52156#line 1611
52157  __cil_tmp27 = ! __cil_tmp26;
52158#line 1611
52159  __cil_tmp28 = ! __cil_tmp27;
52160#line 1611
52161  __cil_tmp29 = (long )__cil_tmp28;
52162#line 1611
52163  tmp___11 = __builtin_expect(__cil_tmp29, 0L);
52164  }
52165#line 1611
52166  if (tmp___11) {
52167#line 1612
52168    return (-12);
52169  } else {
52170
52171  }
52172  {
52173#line 1614
52174  __cil_tmp30 = (struct ttm_lock *)vmaster;
52175#line 1614
52176  __cil_tmp31 = (bool )1;
52177#line 1614
52178  ret = ttm_read_lock(__cil_tmp30, __cil_tmp31);
52179#line 1615
52180  __cil_tmp32 = ret != 0;
52181#line 1615
52182  __cil_tmp33 = ! __cil_tmp32;
52183#line 1615
52184  __cil_tmp34 = ! __cil_tmp33;
52185#line 1615
52186  __cil_tmp35 = (long )__cil_tmp34;
52187#line 1615
52188  tmp___12 = __builtin_expect(__cil_tmp35, 0L);
52189  }
52190#line 1615
52191  if (tmp___12) {
52192    {
52193#line 1616
52194    __cil_tmp36 = (void    *)vmw_user_bo;
52195#line 1616
52196    kfree(__cil_tmp36);
52197    }
52198#line 1617
52199    return (ret);
52200  } else {
52201
52202  }
52203  {
52204#line 1620
52205  __cil_tmp37 = (unsigned long )vmw_user_bo;
52206#line 1620
52207  __cil_tmp38 = __cil_tmp37 + 64;
52208#line 1620
52209  __cil_tmp39 = (struct vmw_dma_buffer *)__cil_tmp38;
52210#line 1620
52211  __cil_tmp40 = *((uint32_t *)req);
52212#line 1620
52213  __cil_tmp41 = (size_t )__cil_tmp40;
52214#line 1620
52215  __cil_tmp42 = (bool )1;
52216#line 1620
52217  ret = vmw_dmabuf_init(dev_priv, __cil_tmp39, __cil_tmp41, & vmw_vram_sys_placement,
52218                        __cil_tmp42, & vmw_user_dmabuf_destroy);
52219#line 1623
52220  __cil_tmp43 = ret != 0;
52221#line 1623
52222  __cil_tmp44 = ! __cil_tmp43;
52223#line 1623
52224  __cil_tmp45 = ! __cil_tmp44;
52225#line 1623
52226  __cil_tmp46 = (long )__cil_tmp45;
52227#line 1623
52228  tmp___13 = __builtin_expect(__cil_tmp46, 0L);
52229  }
52230#line 1623
52231  if (tmp___13) {
52232#line 1624
52233    goto out_no_dmabuf;
52234  } else {
52235
52236  }
52237  {
52238#line 1626
52239  __cil_tmp47 = & tmp___8;
52240#line 1626
52241  __cil_tmp48 = (unsigned long )vmw_user_bo;
52242#line 1626
52243  __cil_tmp49 = __cil_tmp48 + 64;
52244#line 1626
52245  __cil_tmp50 = (struct ttm_buffer_object *)__cil_tmp49;
52246#line 1626
52247  *__cil_tmp47 = ttm_bo_reference(__cil_tmp50);
52248#line 1627
52249  tmp___14 = vmw_fpriv(file_priv);
52250#line 1627
52251  __cil_tmp51 = (unsigned long )tmp___14;
52252#line 1627
52253  __cil_tmp52 = __cil_tmp51 + 8;
52254#line 1627
52255  __cil_tmp53 = *((struct ttm_object_file **)__cil_tmp52);
52256#line 1627
52257  __cil_tmp54 = (struct ttm_base_object *)vmw_user_bo;
52258#line 1627
52259  __cil_tmp55 = (bool )0;
52260#line 1627
52261  __cil_tmp56 = (enum ttm_object_type )1;
52262#line 1627
52263  __cil_tmp57 = (void *)0;
52264#line 1627
52265  __cil_tmp58 = (void (*)(struct ttm_base_object * , enum ttm_ref_type ref_type ))__cil_tmp57;
52266#line 1627
52267  ret = ttm_base_object_init(__cil_tmp53, __cil_tmp54, __cil_tmp55, __cil_tmp56, & vmw_user_dmabuf_release,
52268                             __cil_tmp58);
52269#line 1632
52270  __cil_tmp59 = ret != 0;
52271#line 1632
52272  __cil_tmp60 = ! __cil_tmp59;
52273#line 1632
52274  __cil_tmp61 = ! __cil_tmp60;
52275#line 1632
52276  __cil_tmp62 = (long )__cil_tmp61;
52277#line 1632
52278  tmp___15 = __builtin_expect(__cil_tmp62, 0L);
52279  }
52280#line 1632
52281  if (tmp___15) {
52282#line 1633
52283    goto out_no_base_object;
52284  } else {
52285#line 1635
52286    __cil_tmp63 = (unsigned long )rep;
52287#line 1635
52288    __cil_tmp64 = __cil_tmp63 + 8;
52289#line 1635
52290    __cil_tmp65 = 0 + 16;
52291#line 1635
52292    __cil_tmp66 = 0 + __cil_tmp65;
52293#line 1635
52294    __cil_tmp67 = (unsigned long )vmw_user_bo;
52295#line 1635
52296    __cil_tmp68 = __cil_tmp67 + __cil_tmp66;
52297#line 1635
52298    __cil_tmp69 = *((unsigned long *)__cil_tmp68);
52299#line 1635
52300    *((uint32_t *)__cil_tmp64) = (uint32_t )__cil_tmp69;
52301#line 1636
52302    __cil_tmp70 = 0 + 48;
52303#line 1636
52304    __cil_tmp71 = 64 + __cil_tmp70;
52305#line 1636
52306    __cil_tmp72 = (unsigned long )vmw_user_bo;
52307#line 1636
52308    __cil_tmp73 = __cil_tmp72 + __cil_tmp71;
52309#line 1636
52310    *((uint64_t *)rep) = *((uint64_t *)__cil_tmp73);
52311#line 1637
52312    __cil_tmp74 = (unsigned long )rep;
52313#line 1637
52314    __cil_tmp75 = __cil_tmp74 + 12;
52315#line 1637
52316    __cil_tmp76 = 0 + 16;
52317#line 1637
52318    __cil_tmp77 = 0 + __cil_tmp76;
52319#line 1637
52320    __cil_tmp78 = (unsigned long )vmw_user_bo;
52321#line 1637
52322    __cil_tmp79 = __cil_tmp78 + __cil_tmp77;
52323#line 1637
52324    __cil_tmp80 = *((unsigned long *)__cil_tmp79);
52325#line 1637
52326    *((uint32_t *)__cil_tmp75) = (uint32_t )__cil_tmp80;
52327#line 1638
52328    __cil_tmp81 = (unsigned long )rep;
52329#line 1638
52330    __cil_tmp82 = __cil_tmp81 + 16;
52331#line 1638
52332    *((uint32_t *)__cil_tmp82) = (uint32_t )0;
52333  }
52334  out_no_base_object: 
52335  {
52336#line 1642
52337  ttm_bo_unref(& tmp___8);
52338  }
52339  out_no_dmabuf: 
52340  {
52341#line 1644
52342  __cil_tmp83 = (struct ttm_lock *)vmaster;
52343#line 1644
52344  ttm_read_unlock(__cil_tmp83);
52345  }
52346#line 1646
52347  return (ret);
52348}
52349}
52350#line 1649 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52351int vmw_dmabuf_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
52352{ struct drm_vmw_unref_dmabuf_arg *arg ;
52353  struct vmw_fpriv *tmp___7 ;
52354  int tmp___8 ;
52355  unsigned long __cil_tmp7 ;
52356  unsigned long __cil_tmp8 ;
52357  struct ttm_object_file *__cil_tmp9 ;
52358  uint32_t __cil_tmp10 ;
52359  unsigned long __cil_tmp11 ;
52360  enum ttm_ref_type __cil_tmp12 ;
52361
52362  {
52363  {
52364#line 1652
52365  arg = (struct drm_vmw_unref_dmabuf_arg *)data;
52366#line 1655
52367  tmp___7 = vmw_fpriv(file_priv);
52368#line 1655
52369  __cil_tmp7 = (unsigned long )tmp___7;
52370#line 1655
52371  __cil_tmp8 = __cil_tmp7 + 8;
52372#line 1655
52373  __cil_tmp9 = *((struct ttm_object_file **)__cil_tmp8);
52374#line 1655
52375  __cil_tmp10 = *((uint32_t *)arg);
52376#line 1655
52377  __cil_tmp11 = (unsigned long )__cil_tmp10;
52378#line 1655
52379  __cil_tmp12 = (enum ttm_ref_type )0;
52380#line 1655
52381  tmp___8 = ttm_ref_object_base_unref(__cil_tmp9, __cil_tmp11, __cil_tmp12);
52382  }
52383#line 1655
52384  return (tmp___8);
52385}
52386}
52387#line 1660 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52388uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo , uint32_t cur_validate_node ) 
52389{ struct vmw_dma_buffer *vmw_bo ;
52390  struct vmw_dma_buffer *tmp___7 ;
52391  long tmp___8 ;
52392  unsigned long __cil_tmp6 ;
52393  unsigned long __cil_tmp7 ;
52394  bool __cil_tmp8 ;
52395  int __cil_tmp9 ;
52396  int __cil_tmp10 ;
52397  long __cil_tmp11 ;
52398  unsigned long __cil_tmp12 ;
52399  unsigned long __cil_tmp13 ;
52400  unsigned long __cil_tmp14 ;
52401  unsigned long __cil_tmp15 ;
52402  unsigned long __cil_tmp16 ;
52403  unsigned long __cil_tmp17 ;
52404
52405  {
52406  {
52407#line 1663
52408  tmp___7 = vmw_dma_buffer(bo);
52409#line 1663
52410  vmw_bo = tmp___7;
52411#line 1665
52412  __cil_tmp6 = (unsigned long )vmw_bo;
52413#line 1665
52414  __cil_tmp7 = __cil_tmp6 + 408;
52415#line 1665
52416  __cil_tmp8 = *((bool *)__cil_tmp7);
52417#line 1665
52418  __cil_tmp9 = ! __cil_tmp8;
52419#line 1665
52420  __cil_tmp10 = ! __cil_tmp9;
52421#line 1665
52422  __cil_tmp11 = (long )__cil_tmp10;
52423#line 1665
52424  tmp___8 = __builtin_expect(__cil_tmp11, 1L);
52425  }
52426#line 1665
52427  if (tmp___8) {
52428    {
52429#line 1666
52430    __cil_tmp12 = (unsigned long )vmw_bo;
52431#line 1666
52432    __cil_tmp13 = __cil_tmp12 + 404;
52433#line 1666
52434    return (*((uint32_t *)__cil_tmp13));
52435    }
52436  } else {
52437
52438  }
52439#line 1668
52440  __cil_tmp14 = (unsigned long )vmw_bo;
52441#line 1668
52442  __cil_tmp15 = __cil_tmp14 + 404;
52443#line 1668
52444  *((uint32_t *)__cil_tmp15) = cur_validate_node;
52445#line 1669
52446  __cil_tmp16 = (unsigned long )vmw_bo;
52447#line 1669
52448  __cil_tmp17 = __cil_tmp16 + 408;
52449#line 1669
52450  *((bool *)__cil_tmp17) = (bool )1;
52451#line 1671
52452  return (cur_validate_node);
52453}
52454}
52455#line 1674 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52456void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo ) 
52457{ struct vmw_dma_buffer *vmw_bo ;
52458  struct vmw_dma_buffer *tmp___7 ;
52459  unsigned long __cil_tmp4 ;
52460  unsigned long __cil_tmp5 ;
52461
52462  {
52463  {
52464#line 1676
52465  tmp___7 = vmw_dma_buffer(bo);
52466#line 1676
52467  vmw_bo = tmp___7;
52468#line 1678
52469  __cil_tmp4 = (unsigned long )vmw_bo;
52470#line 1678
52471  __cil_tmp5 = __cil_tmp4 + 408;
52472#line 1678
52473  *((bool *)__cil_tmp5) = (bool )0;
52474  }
52475#line 1679
52476  return;
52477}
52478}
52479#line 1681 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52480int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile , uint32_t handle , struct vmw_dma_buffer **out ) 
52481{ struct vmw_user_dma_buffer *vmw_user_bo ;
52482  struct ttm_base_object *base ;
52483  long tmp___7 ;
52484  long tmp___8 ;
52485  struct ttm_base_object    *__mptr ;
52486  struct ttm_base_object **__cil_tmp9 ;
52487  void *__cil_tmp10 ;
52488  unsigned long __cil_tmp11 ;
52489  struct ttm_base_object **__cil_tmp12 ;
52490  struct ttm_base_object *__cil_tmp13 ;
52491  unsigned long __cil_tmp14 ;
52492  int __cil_tmp15 ;
52493  int __cil_tmp16 ;
52494  int __cil_tmp17 ;
52495  long __cil_tmp18 ;
52496  unsigned long __cil_tmp19 ;
52497  struct ttm_base_object **__cil_tmp20 ;
52498  struct ttm_base_object *__cil_tmp21 ;
52499  unsigned long __cil_tmp22 ;
52500  unsigned long __cil_tmp23 ;
52501  enum ttm_object_type __cil_tmp24 ;
52502  unsigned int __cil_tmp25 ;
52503  int __cil_tmp26 ;
52504  int __cil_tmp27 ;
52505  int __cil_tmp28 ;
52506  long __cil_tmp29 ;
52507  unsigned long __cil_tmp30 ;
52508  struct ttm_base_object **__cil_tmp31 ;
52509  struct ttm_base_object *__cil_tmp32 ;
52510  struct vmw_user_dma_buffer *__cil_tmp33 ;
52511  struct ttm_base_object *__cil_tmp34 ;
52512  unsigned int __cil_tmp35 ;
52513  char *__cil_tmp36 ;
52514  char *__cil_tmp37 ;
52515  unsigned long __cil_tmp38 ;
52516  unsigned long __cil_tmp39 ;
52517  struct ttm_buffer_object *__cil_tmp40 ;
52518  unsigned long __cil_tmp41 ;
52519  unsigned long __cil_tmp42 ;
52520
52521  {
52522  {
52523#line 1687
52524  __cil_tmp9 = & base;
52525#line 1687
52526  *__cil_tmp9 = ttm_base_object_lookup(tfile, handle);
52527#line 1688
52528  __cil_tmp10 = (void *)0;
52529#line 1688
52530  __cil_tmp11 = (unsigned long )__cil_tmp10;
52531#line 1688
52532  __cil_tmp12 = & base;
52533#line 1688
52534  __cil_tmp13 = *__cil_tmp12;
52535#line 1688
52536  __cil_tmp14 = (unsigned long )__cil_tmp13;
52537#line 1688
52538  __cil_tmp15 = __cil_tmp14 == __cil_tmp11;
52539#line 1688
52540  __cil_tmp16 = ! __cil_tmp15;
52541#line 1688
52542  __cil_tmp17 = ! __cil_tmp16;
52543#line 1688
52544  __cil_tmp18 = (long )__cil_tmp17;
52545#line 1688
52546  tmp___7 = __builtin_expect(__cil_tmp18, 0L);
52547  }
52548#line 1688
52549  if (tmp___7) {
52550    {
52551#line 1689
52552    __cil_tmp19 = (unsigned long )handle;
52553#line 1689
52554    printk("<3>Invalid buffer object handle 0x%08lx.\n", __cil_tmp19);
52555    }
52556#line 1691
52557    return (-3);
52558  } else {
52559
52560  }
52561  {
52562#line 1694
52563  __cil_tmp20 = & base;
52564#line 1694
52565  __cil_tmp21 = *__cil_tmp20;
52566#line 1694
52567  __cil_tmp22 = (unsigned long )__cil_tmp21;
52568#line 1694
52569  __cil_tmp23 = __cil_tmp22 + 24;
52570#line 1694
52571  __cil_tmp24 = *((enum ttm_object_type *)__cil_tmp23);
52572#line 1694
52573  __cil_tmp25 = (unsigned int )__cil_tmp24;
52574#line 1694
52575  __cil_tmp26 = __cil_tmp25 != 1U;
52576#line 1694
52577  __cil_tmp27 = ! __cil_tmp26;
52578#line 1694
52579  __cil_tmp28 = ! __cil_tmp27;
52580#line 1694
52581  __cil_tmp29 = (long )__cil_tmp28;
52582#line 1694
52583  tmp___8 = __builtin_expect(__cil_tmp29, 0L);
52584  }
52585#line 1694
52586  if (tmp___8) {
52587    {
52588#line 1695
52589    ttm_base_object_unref(& base);
52590#line 1696
52591    __cil_tmp30 = (unsigned long )handle;
52592#line 1696
52593    printk("<3>Invalid buffer object handle 0x%08lx.\n", __cil_tmp30);
52594    }
52595#line 1698
52596    return (-22);
52597  } else {
52598
52599  }
52600  {
52601#line 1701
52602  __cil_tmp31 = & base;
52603#line 1701
52604  __cil_tmp32 = *__cil_tmp31;
52605#line 1701
52606  __mptr = (struct ttm_base_object    *)__cil_tmp32;
52607#line 1701
52608  __cil_tmp33 = (struct vmw_user_dma_buffer *)0;
52609#line 1701
52610  __cil_tmp34 = (struct ttm_base_object *)__cil_tmp33;
52611#line 1701
52612  __cil_tmp35 = (unsigned int )__cil_tmp34;
52613#line 1701
52614  __cil_tmp36 = (char *)__mptr;
52615#line 1701
52616  __cil_tmp37 = __cil_tmp36 - __cil_tmp35;
52617#line 1701
52618  vmw_user_bo = (struct vmw_user_dma_buffer *)__cil_tmp37;
52619#line 1702
52620  __cil_tmp38 = (unsigned long )vmw_user_bo;
52621#line 1702
52622  __cil_tmp39 = __cil_tmp38 + 64;
52623#line 1702
52624  __cil_tmp40 = (struct ttm_buffer_object *)__cil_tmp39;
52625#line 1702
52626  ttm_bo_reference(__cil_tmp40);
52627#line 1703
52628  ttm_base_object_unref(& base);
52629#line 1704
52630  __cil_tmp41 = (unsigned long )vmw_user_bo;
52631#line 1704
52632  __cil_tmp42 = __cil_tmp41 + 64;
52633#line 1704
52634  *out = (struct vmw_dma_buffer *)__cil_tmp42;
52635  }
52636#line 1706
52637  return (0);
52638}
52639}
52640#line 1713 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52641static void vmw_stream_destroy(struct vmw_resource *res ) 
52642{ struct vmw_private *dev_priv ;
52643  struct vmw_stream *stream ;
52644  int ret ;
52645  struct vmw_resource    *__mptr ;
52646  int __ret_warn_on ;
52647  long tmp___7 ;
52648  unsigned long __cil_tmp8 ;
52649  unsigned long __cil_tmp9 ;
52650  struct vmw_stream *__cil_tmp10 ;
52651  struct vmw_resource *__cil_tmp11 ;
52652  unsigned int __cil_tmp12 ;
52653  char *__cil_tmp13 ;
52654  char *__cil_tmp14 ;
52655  unsigned long __cil_tmp15 ;
52656  unsigned long __cil_tmp16 ;
52657  uint32_t __cil_tmp17 ;
52658  int __cil_tmp18 ;
52659  int __cil_tmp19 ;
52660  int __cil_tmp20 ;
52661  int __cil_tmp21 ;
52662  long __cil_tmp22 ;
52663  int    __cil_tmp23 ;
52664  int __cil_tmp24 ;
52665  int __cil_tmp25 ;
52666  long __cil_tmp26 ;
52667
52668  {
52669  {
52670#line 1715
52671  __cil_tmp8 = (unsigned long )res;
52672#line 1715
52673  __cil_tmp9 = __cil_tmp8 + 8;
52674#line 1715
52675  dev_priv = *((struct vmw_private **)__cil_tmp9);
52676#line 1719
52677  printk("<6>[drm] %s: unref\n", "vmw_stream_destroy");
52678#line 1720
52679  __mptr = (struct vmw_resource    *)res;
52680#line 1720
52681  __cil_tmp10 = (struct vmw_stream *)0;
52682#line 1720
52683  __cil_tmp11 = (struct vmw_resource *)__cil_tmp10;
52684#line 1720
52685  __cil_tmp12 = (unsigned int )__cil_tmp11;
52686#line 1720
52687  __cil_tmp13 = (char *)__mptr;
52688#line 1720
52689  __cil_tmp14 = __cil_tmp13 - __cil_tmp12;
52690#line 1720
52691  stream = (struct vmw_stream *)__cil_tmp14;
52692#line 1722
52693  __cil_tmp15 = (unsigned long )stream;
52694#line 1722
52695  __cil_tmp16 = __cil_tmp15 + 96;
52696#line 1722
52697  __cil_tmp17 = *((uint32_t *)__cil_tmp16);
52698#line 1722
52699  ret = vmw_overlay_unref(dev_priv, __cil_tmp17);
52700#line 1723
52701  __cil_tmp18 = ret != 0;
52702#line 1723
52703  __cil_tmp19 = ! __cil_tmp18;
52704#line 1723
52705  __ret_warn_on = ! __cil_tmp19;
52706#line 1723
52707  __cil_tmp20 = ! __ret_warn_on;
52708#line 1723
52709  __cil_tmp21 = ! __cil_tmp20;
52710#line 1723
52711  __cil_tmp22 = (long )__cil_tmp21;
52712#line 1723
52713  tmp___7 = __builtin_expect(__cil_tmp22, 0L);
52714  }
52715#line 1723
52716  if (tmp___7) {
52717    {
52718#line 1723
52719    __cil_tmp23 = (int    )1723;
52720#line 1723
52721    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c",
52722                       __cil_tmp23);
52723    }
52724  } else {
52725
52726  }
52727  {
52728#line 1723
52729  __cil_tmp24 = ! __ret_warn_on;
52730#line 1723
52731  __cil_tmp25 = ! __cil_tmp24;
52732#line 1723
52733  __cil_tmp26 = (long )__cil_tmp25;
52734#line 1723
52735  __builtin_expect(__cil_tmp26, 0L);
52736  }
52737#line 1724
52738  return;
52739}
52740}
52741#line 1726 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52742static int vmw_stream_init(struct vmw_private *dev_priv , struct vmw_stream *stream ,
52743                           void (*res_free)(struct vmw_resource *res ) ) 
52744{ struct vmw_resource *res ;
52745  int ret ;
52746  long tmp___7 ;
52747  struct vmw_resource **__cil_tmp7 ;
52748  struct vmw_resource **__cil_tmp8 ;
52749  struct vmw_resource *__cil_tmp9 ;
52750  unsigned long __cil_tmp10 ;
52751  unsigned long __cil_tmp11 ;
52752  struct idr *__cil_tmp12 ;
52753  enum ttm_object_type __cil_tmp13 ;
52754  bool __cil_tmp14 ;
52755  void *__cil_tmp15 ;
52756  void (*__cil_tmp16)(struct vmw_resource *res ) ;
52757  int __cil_tmp17 ;
52758  int __cil_tmp18 ;
52759  int __cil_tmp19 ;
52760  long __cil_tmp20 ;
52761  void *__cil_tmp21 ;
52762  unsigned long __cil_tmp22 ;
52763  unsigned long __cil_tmp23 ;
52764  void    *__cil_tmp24 ;
52765  struct vmw_resource *__cil_tmp25 ;
52766  unsigned long __cil_tmp26 ;
52767  unsigned long __cil_tmp27 ;
52768  uint32_t *__cil_tmp28 ;
52769  struct vmw_resource *__cil_tmp29 ;
52770
52771  {
52772  {
52773#line 1730
52774  __cil_tmp7 = & res;
52775#line 1730
52776  *__cil_tmp7 = (struct vmw_resource *)stream;
52777#line 1733
52778  __cil_tmp8 = & res;
52779#line 1733
52780  __cil_tmp9 = *__cil_tmp8;
52781#line 1733
52782  __cil_tmp10 = (unsigned long )dev_priv;
52783#line 1733
52784  __cil_tmp11 = __cil_tmp10 + 2752;
52785#line 1733
52786  __cil_tmp12 = (struct idr *)__cil_tmp11;
52787#line 1733
52788  __cil_tmp13 = (enum ttm_object_type )258;
52789#line 1733
52790  __cil_tmp14 = (bool )0;
52791#line 1733
52792  __cil_tmp15 = (void *)0;
52793#line 1733
52794  __cil_tmp16 = (void (*)(struct vmw_resource *res ))__cil_tmp15;
52795#line 1733
52796  ret = vmw_resource_init(dev_priv, __cil_tmp9, __cil_tmp12, __cil_tmp13, __cil_tmp14,
52797                          res_free, __cil_tmp16);
52798#line 1736
52799  __cil_tmp17 = ret != 0;
52800#line 1736
52801  __cil_tmp18 = ! __cil_tmp17;
52802#line 1736
52803  __cil_tmp19 = ! __cil_tmp18;
52804#line 1736
52805  __cil_tmp20 = (long )__cil_tmp19;
52806#line 1736
52807  tmp___7 = __builtin_expect(__cil_tmp20, 0L);
52808  }
52809#line 1736
52810  if (tmp___7) {
52811    {
52812#line 1737
52813    __cil_tmp21 = (void *)0;
52814#line 1737
52815    __cil_tmp22 = (unsigned long )__cil_tmp21;
52816#line 1737
52817    __cil_tmp23 = (unsigned long )res_free;
52818#line 1737
52819    if (__cil_tmp23 == __cil_tmp22) {
52820      {
52821#line 1738
52822      __cil_tmp24 = (void    *)stream;
52823#line 1738
52824      kfree(__cil_tmp24);
52825      }
52826    } else {
52827      {
52828#line 1740
52829      __cil_tmp25 = (struct vmw_resource *)stream;
52830#line 1740
52831      (*res_free)(__cil_tmp25);
52832      }
52833    }
52834    }
52835#line 1741
52836    return (ret);
52837  } else {
52838
52839  }
52840  {
52841#line 1744
52842  __cil_tmp26 = (unsigned long )stream;
52843#line 1744
52844  __cil_tmp27 = __cil_tmp26 + 96;
52845#line 1744
52846  __cil_tmp28 = (uint32_t *)__cil_tmp27;
52847#line 1744
52848  ret = vmw_overlay_claim(dev_priv, __cil_tmp28);
52849  }
52850#line 1745
52851  if (ret) {
52852    {
52853#line 1746
52854    vmw_resource_unreference(& res);
52855    }
52856#line 1747
52857    return (ret);
52858  } else {
52859
52860  }
52861  {
52862#line 1750
52863  printk("<6>[drm] %s: claimed\n", "vmw_stream_init");
52864#line 1752
52865  __cil_tmp29 = (struct vmw_resource *)stream;
52866#line 1752
52867  vmw_resource_activate(__cil_tmp29, & vmw_stream_destroy);
52868  }
52869#line 1753
52870  return (0);
52871}
52872}
52873#line 1760 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52874static void vmw_user_stream_free(struct vmw_resource *res ) 
52875{ struct vmw_user_stream *stream ;
52876  struct vmw_resource    *__mptr ;
52877  struct vmw_private *dev_priv ;
52878  struct ttm_mem_global *tmp___7 ;
52879  struct vmw_user_stream *__cil_tmp6 ;
52880  unsigned long __cil_tmp7 ;
52881  unsigned long __cil_tmp8 ;
52882  struct vmw_resource *__cil_tmp9 ;
52883  unsigned int __cil_tmp10 ;
52884  char *__cil_tmp11 ;
52885  char *__cil_tmp12 ;
52886  unsigned long __cil_tmp13 ;
52887  unsigned long __cil_tmp14 ;
52888  void    *__cil_tmp15 ;
52889
52890  {
52891  {
52892#line 1763
52893  __mptr = (struct vmw_resource    *)res;
52894#line 1763
52895  __cil_tmp6 = (struct vmw_user_stream *)0;
52896#line 1763
52897  __cil_tmp7 = (unsigned long )__cil_tmp6;
52898#line 1763
52899  __cil_tmp8 = __cil_tmp7 + 64;
52900#line 1763
52901  __cil_tmp9 = (struct vmw_resource *)__cil_tmp8;
52902#line 1763
52903  __cil_tmp10 = (unsigned int )__cil_tmp9;
52904#line 1763
52905  __cil_tmp11 = (char *)__mptr;
52906#line 1763
52907  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
52908#line 1763
52909  stream = (struct vmw_user_stream *)__cil_tmp12;
52910#line 1764
52911  __cil_tmp13 = (unsigned long )res;
52912#line 1764
52913  __cil_tmp14 = __cil_tmp13 + 8;
52914#line 1764
52915  dev_priv = *((struct vmw_private **)__cil_tmp14);
52916#line 1766
52917  __cil_tmp15 = (void    *)stream;
52918#line 1766
52919  kfree(__cil_tmp15);
52920#line 1767
52921  tmp___7 = vmw_mem_glob(dev_priv);
52922#line 1767
52923  ttm_mem_global_free(tmp___7, vmw_user_stream_size);
52924  }
52925#line 1769
52926  return;
52927}
52928}
52929#line 1776 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52930static void vmw_user_stream_base_release(struct ttm_base_object **p_base ) 
52931{ struct ttm_base_object *base ;
52932  struct vmw_user_stream *stream ;
52933  struct ttm_base_object    *__mptr ;
52934  struct vmw_resource *res ;
52935  struct vmw_user_stream *__cil_tmp6 ;
52936  struct ttm_base_object *__cil_tmp7 ;
52937  unsigned int __cil_tmp8 ;
52938  char *__cil_tmp9 ;
52939  char *__cil_tmp10 ;
52940  struct vmw_resource **__cil_tmp11 ;
52941  unsigned long __cil_tmp12 ;
52942  unsigned long __cil_tmp13 ;
52943  void *__cil_tmp14 ;
52944
52945  {
52946  {
52947#line 1778
52948  base = *p_base;
52949#line 1780
52950  __mptr = (struct ttm_base_object    *)base;
52951#line 1780
52952  __cil_tmp6 = (struct vmw_user_stream *)0;
52953#line 1780
52954  __cil_tmp7 = (struct ttm_base_object *)__cil_tmp6;
52955#line 1780
52956  __cil_tmp8 = (unsigned int )__cil_tmp7;
52957#line 1780
52958  __cil_tmp9 = (char *)__mptr;
52959#line 1780
52960  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
52961#line 1780
52962  stream = (struct vmw_user_stream *)__cil_tmp10;
52963#line 1781
52964  __cil_tmp11 = & res;
52965#line 1781
52966  __cil_tmp12 = (unsigned long )stream;
52967#line 1781
52968  __cil_tmp13 = __cil_tmp12 + 64;
52969#line 1781
52970  *__cil_tmp11 = (struct vmw_resource *)__cil_tmp13;
52971#line 1783
52972  __cil_tmp14 = (void *)0;
52973#line 1783
52974  *p_base = (struct ttm_base_object *)__cil_tmp14;
52975#line 1784
52976  vmw_resource_unreference(& res);
52977  }
52978#line 1785
52979  return;
52980}
52981}
52982#line 1787 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
52983int vmw_stream_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
52984{ struct vmw_private *dev_priv ;
52985  struct vmw_private *tmp___7 ;
52986  struct vmw_resource *res ;
52987  struct vmw_user_stream *stream ;
52988  struct drm_vmw_stream_arg *arg ;
52989  struct ttm_object_file *tfile ;
52990  struct vmw_fpriv *tmp___8 ;
52991  int ret ;
52992  long tmp___9 ;
52993  struct vmw_resource    *__mptr ;
52994  unsigned long __cil_tmp14 ;
52995  unsigned long __cil_tmp15 ;
52996  struct vmw_resource **__cil_tmp16 ;
52997  unsigned long __cil_tmp17 ;
52998  unsigned long __cil_tmp18 ;
52999  struct idr *__cil_tmp19 ;
53000  uint32_t __cil_tmp20 ;
53001  int __cil_tmp21 ;
53002  void *__cil_tmp22 ;
53003  unsigned long __cil_tmp23 ;
53004  struct vmw_resource **__cil_tmp24 ;
53005  struct vmw_resource *__cil_tmp25 ;
53006  unsigned long __cil_tmp26 ;
53007  int __cil_tmp27 ;
53008  int __cil_tmp28 ;
53009  int __cil_tmp29 ;
53010  long __cil_tmp30 ;
53011  unsigned long __cil_tmp31 ;
53012  struct vmw_resource **__cil_tmp32 ;
53013  struct vmw_resource *__cil_tmp33 ;
53014  unsigned long __cil_tmp34 ;
53015  unsigned long __cil_tmp35 ;
53016  void (*__cil_tmp36)(struct vmw_resource *res ) ;
53017  unsigned long __cil_tmp37 ;
53018  struct vmw_resource **__cil_tmp38 ;
53019  struct vmw_resource *__cil_tmp39 ;
53020  struct vmw_user_stream *__cil_tmp40 ;
53021  unsigned long __cil_tmp41 ;
53022  unsigned long __cil_tmp42 ;
53023  struct vmw_resource *__cil_tmp43 ;
53024  unsigned int __cil_tmp44 ;
53025  char *__cil_tmp45 ;
53026  char *__cil_tmp46 ;
53027  unsigned long __cil_tmp47 ;
53028  unsigned long __cil_tmp48 ;
53029  unsigned long __cil_tmp49 ;
53030  unsigned long __cil_tmp50 ;
53031  struct ttm_object_file *__cil_tmp51 ;
53032  unsigned long __cil_tmp52 ;
53033  unsigned long __cil_tmp53 ;
53034  unsigned long __cil_tmp54 ;
53035  unsigned long __cil_tmp55 ;
53036  unsigned long __cil_tmp56 ;
53037  unsigned long __cil_tmp57 ;
53038  enum ttm_ref_type __cil_tmp58 ;
53039
53040  {
53041  {
53042#line 1790
53043  tmp___7 = vmw_priv(dev);
53044#line 1790
53045  dev_priv = tmp___7;
53046#line 1793
53047  arg = (struct drm_vmw_stream_arg *)data;
53048#line 1794
53049  tmp___8 = vmw_fpriv(file_priv);
53050#line 1794
53051  __cil_tmp14 = (unsigned long )tmp___8;
53052#line 1794
53053  __cil_tmp15 = __cil_tmp14 + 8;
53054#line 1794
53055  tfile = *((struct ttm_object_file **)__cil_tmp15);
53056#line 1795
53057  ret = 0;
53058#line 1797
53059  __cil_tmp16 = & res;
53060#line 1797
53061  __cil_tmp17 = (unsigned long )dev_priv;
53062#line 1797
53063  __cil_tmp18 = __cil_tmp17 + 2752;
53064#line 1797
53065  __cil_tmp19 = (struct idr *)__cil_tmp18;
53066#line 1797
53067  __cil_tmp20 = *((uint32_t *)arg);
53068#line 1797
53069  __cil_tmp21 = (int )__cil_tmp20;
53070#line 1797
53071  *__cil_tmp16 = vmw_resource_lookup(dev_priv, __cil_tmp19, __cil_tmp21);
53072#line 1798
53073  __cil_tmp22 = (void *)0;
53074#line 1798
53075  __cil_tmp23 = (unsigned long )__cil_tmp22;
53076#line 1798
53077  __cil_tmp24 = & res;
53078#line 1798
53079  __cil_tmp25 = *__cil_tmp24;
53080#line 1798
53081  __cil_tmp26 = (unsigned long )__cil_tmp25;
53082#line 1798
53083  __cil_tmp27 = __cil_tmp26 == __cil_tmp23;
53084#line 1798
53085  __cil_tmp28 = ! __cil_tmp27;
53086#line 1798
53087  __cil_tmp29 = ! __cil_tmp28;
53088#line 1798
53089  __cil_tmp30 = (long )__cil_tmp29;
53090#line 1798
53091  tmp___9 = __builtin_expect(__cil_tmp30, 0L);
53092  }
53093#line 1798
53094  if (tmp___9) {
53095#line 1799
53096    return (-22);
53097  } else {
53098
53099  }
53100  {
53101#line 1801
53102  __cil_tmp31 = (unsigned long )(& vmw_user_stream_free);
53103#line 1801
53104  __cil_tmp32 = & res;
53105#line 1801
53106  __cil_tmp33 = *__cil_tmp32;
53107#line 1801
53108  __cil_tmp34 = (unsigned long )__cil_tmp33;
53109#line 1801
53110  __cil_tmp35 = __cil_tmp34 + 56;
53111#line 1801
53112  __cil_tmp36 = *((void (**)(struct vmw_resource *res ))__cil_tmp35);
53113#line 1801
53114  __cil_tmp37 = (unsigned long )__cil_tmp36;
53115#line 1801
53116  if (__cil_tmp37 != __cil_tmp31) {
53117#line 1802
53118    ret = -22;
53119#line 1803
53120    goto out;
53121  } else {
53122
53123  }
53124  }
53125#line 1806
53126  __cil_tmp38 = & res;
53127#line 1806
53128  __cil_tmp39 = *__cil_tmp38;
53129#line 1806
53130  __mptr = (struct vmw_resource    *)__cil_tmp39;
53131#line 1806
53132  __cil_tmp40 = (struct vmw_user_stream *)0;
53133#line 1806
53134  __cil_tmp41 = (unsigned long )__cil_tmp40;
53135#line 1806
53136  __cil_tmp42 = __cil_tmp41 + 64;
53137#line 1806
53138  __cil_tmp43 = (struct vmw_resource *)__cil_tmp42;
53139#line 1806
53140  __cil_tmp44 = (unsigned int )__cil_tmp43;
53141#line 1806
53142  __cil_tmp45 = (char *)__mptr;
53143#line 1806
53144  __cil_tmp46 = __cil_tmp45 - __cil_tmp44;
53145#line 1806
53146  stream = (struct vmw_user_stream *)__cil_tmp46;
53147  {
53148#line 1807
53149  __cil_tmp47 = (unsigned long )tfile;
53150#line 1807
53151  __cil_tmp48 = 0 + 32;
53152#line 1807
53153  __cil_tmp49 = (unsigned long )stream;
53154#line 1807
53155  __cil_tmp50 = __cil_tmp49 + __cil_tmp48;
53156#line 1807
53157  __cil_tmp51 = *((struct ttm_object_file **)__cil_tmp50);
53158#line 1807
53159  __cil_tmp52 = (unsigned long )__cil_tmp51;
53160#line 1807
53161  if (__cil_tmp52 != __cil_tmp47) {
53162#line 1808
53163    ret = -22;
53164#line 1809
53165    goto out;
53166  } else {
53167
53168  }
53169  }
53170  {
53171#line 1812
53172  __cil_tmp53 = 0 + 16;
53173#line 1812
53174  __cil_tmp54 = 0 + __cil_tmp53;
53175#line 1812
53176  __cil_tmp55 = (unsigned long )stream;
53177#line 1812
53178  __cil_tmp56 = __cil_tmp55 + __cil_tmp54;
53179#line 1812
53180  __cil_tmp57 = *((unsigned long *)__cil_tmp56);
53181#line 1812
53182  __cil_tmp58 = (enum ttm_ref_type )0;
53183#line 1812
53184  ttm_ref_object_base_unref(tfile, __cil_tmp57, __cil_tmp58);
53185  }
53186  out: 
53187  {
53188#line 1814
53189  vmw_resource_unreference(& res);
53190  }
53191#line 1815
53192  return (ret);
53193}
53194}
53195#line 1818 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
53196int vmw_stream_claim_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
53197{ struct vmw_private *dev_priv ;
53198  struct vmw_private *tmp___7 ;
53199  struct vmw_user_stream *stream ;
53200  struct vmw_resource *res ;
53201  struct vmw_resource *tmp___8 ;
53202  struct drm_vmw_stream_arg *arg ;
53203  struct ttm_object_file *tfile ;
53204  struct vmw_fpriv *tmp___9 ;
53205  struct vmw_master *vmaster ;
53206  struct vmw_master *tmp___10 ;
53207  int ret ;
53208  size_t tmp___11 ;
53209  long tmp___12 ;
53210  long tmp___13 ;
53211  struct ttm_mem_global *tmp___14 ;
53212  long tmp___15 ;
53213  void *tmp___16 ;
53214  struct ttm_mem_global *tmp___17 ;
53215  long tmp___18 ;
53216  long tmp___19 ;
53217  long tmp___20 ;
53218  unsigned long __cil_tmp25 ;
53219  unsigned long __cil_tmp26 ;
53220  unsigned long __cil_tmp27 ;
53221  unsigned long __cil_tmp28 ;
53222  struct drm_master *__cil_tmp29 ;
53223  int __cil_tmp30 ;
53224  int __cil_tmp31 ;
53225  int __cil_tmp32 ;
53226  long __cil_tmp33 ;
53227  size_t __cil_tmp34 ;
53228  struct ttm_lock *__cil_tmp35 ;
53229  bool __cil_tmp36 ;
53230  int __cil_tmp37 ;
53231  int __cil_tmp38 ;
53232  int __cil_tmp39 ;
53233  long __cil_tmp40 ;
53234  bool __cil_tmp41 ;
53235  bool __cil_tmp42 ;
53236  int __cil_tmp43 ;
53237  int __cil_tmp44 ;
53238  int __cil_tmp45 ;
53239  long __cil_tmp46 ;
53240  void *__cil_tmp47 ;
53241  unsigned long __cil_tmp48 ;
53242  unsigned long __cil_tmp49 ;
53243  int __cil_tmp50 ;
53244  int __cil_tmp51 ;
53245  int __cil_tmp52 ;
53246  long __cil_tmp53 ;
53247  struct vmw_resource **__cil_tmp54 ;
53248  unsigned long __cil_tmp55 ;
53249  unsigned long __cil_tmp56 ;
53250  unsigned long __cil_tmp57 ;
53251  unsigned long __cil_tmp58 ;
53252  unsigned long __cil_tmp59 ;
53253  unsigned long __cil_tmp60 ;
53254  unsigned long __cil_tmp61 ;
53255  unsigned long __cil_tmp62 ;
53256  void *__cil_tmp63 ;
53257  unsigned long __cil_tmp64 ;
53258  unsigned long __cil_tmp65 ;
53259  struct vmw_stream *__cil_tmp66 ;
53260  int __cil_tmp67 ;
53261  int __cil_tmp68 ;
53262  int __cil_tmp69 ;
53263  long __cil_tmp70 ;
53264  struct vmw_resource **__cil_tmp71 ;
53265  struct vmw_resource **__cil_tmp72 ;
53266  struct vmw_resource *__cil_tmp73 ;
53267  struct ttm_base_object *__cil_tmp74 ;
53268  bool __cil_tmp75 ;
53269  enum ttm_object_type __cil_tmp76 ;
53270  void *__cil_tmp77 ;
53271  void (*__cil_tmp78)(struct ttm_base_object * , enum ttm_ref_type ref_type ) ;
53272  int __cil_tmp79 ;
53273  int __cil_tmp80 ;
53274  int __cil_tmp81 ;
53275  long __cil_tmp82 ;
53276  struct vmw_resource **__cil_tmp83 ;
53277  struct vmw_resource *__cil_tmp84 ;
53278  unsigned long __cil_tmp85 ;
53279  unsigned long __cil_tmp86 ;
53280  int __cil_tmp87 ;
53281  struct ttm_lock *__cil_tmp88 ;
53282
53283  {
53284  {
53285#line 1821
53286  tmp___7 = vmw_priv(dev);
53287#line 1821
53288  dev_priv = tmp___7;
53289#line 1825
53290  arg = (struct drm_vmw_stream_arg *)data;
53291#line 1826
53292  tmp___9 = vmw_fpriv(file_priv);
53293#line 1826
53294  __cil_tmp25 = (unsigned long )tmp___9;
53295#line 1826
53296  __cil_tmp26 = __cil_tmp25 + 8;
53297#line 1826
53298  tfile = *((struct ttm_object_file **)__cil_tmp26);
53299#line 1827
53300  __cil_tmp27 = (unsigned long )file_priv;
53301#line 1827
53302  __cil_tmp28 = __cil_tmp27 + 152;
53303#line 1827
53304  __cil_tmp29 = *((struct drm_master **)__cil_tmp28);
53305#line 1827
53306  tmp___10 = vmw_master(__cil_tmp29);
53307#line 1827
53308  vmaster = tmp___10;
53309#line 1835
53310  __cil_tmp30 = vmw_user_stream_size == 0ULL;
53311#line 1835
53312  __cil_tmp31 = ! __cil_tmp30;
53313#line 1835
53314  __cil_tmp32 = ! __cil_tmp31;
53315#line 1835
53316  __cil_tmp33 = (long )__cil_tmp32;
53317#line 1835
53318  tmp___12 = __builtin_expect(__cil_tmp33, 0L);
53319  }
53320#line 1835
53321  if (tmp___12) {
53322    {
53323#line 1836
53324    tmp___11 = ttm_round_pot(168UL);
53325#line 1836
53326    __cil_tmp34 = tmp___11 + 128UL;
53327#line 1836
53328    vmw_user_stream_size = (uint64_t )__cil_tmp34;
53329    }
53330  } else {
53331
53332  }
53333  {
53334#line 1838
53335  __cil_tmp35 = (struct ttm_lock *)vmaster;
53336#line 1838
53337  __cil_tmp36 = (bool )1;
53338#line 1838
53339  ret = ttm_read_lock(__cil_tmp35, __cil_tmp36);
53340#line 1839
53341  __cil_tmp37 = ret != 0;
53342#line 1839
53343  __cil_tmp38 = ! __cil_tmp37;
53344#line 1839
53345  __cil_tmp39 = ! __cil_tmp38;
53346#line 1839
53347  __cil_tmp40 = (long )__cil_tmp39;
53348#line 1839
53349  tmp___13 = __builtin_expect(__cil_tmp40, 0L);
53350  }
53351#line 1839
53352  if (tmp___13) {
53353#line 1840
53354    return (ret);
53355  } else {
53356
53357  }
53358  {
53359#line 1842
53360  tmp___14 = vmw_mem_glob(dev_priv);
53361#line 1842
53362  __cil_tmp41 = (bool )0;
53363#line 1842
53364  __cil_tmp42 = (bool )1;
53365#line 1842
53366  ret = ttm_mem_global_alloc(tmp___14, vmw_user_stream_size, __cil_tmp41, __cil_tmp42);
53367#line 1845
53368  __cil_tmp43 = ret != 0;
53369#line 1845
53370  __cil_tmp44 = ! __cil_tmp43;
53371#line 1845
53372  __cil_tmp45 = ! __cil_tmp44;
53373#line 1845
53374  __cil_tmp46 = (long )__cil_tmp45;
53375#line 1845
53376  tmp___15 = __builtin_expect(__cil_tmp46, 0L);
53377  }
53378#line 1845
53379  if (tmp___15) {
53380#line 1846
53381    if (ret != -512) {
53382      {
53383#line 1847
53384      drm_err("vmw_stream_claim_ioctl", "Out of graphics memory for stream creation.\n");
53385      }
53386    } else {
53387
53388    }
53389#line 1849
53390    goto out_unlock;
53391  } else {
53392
53393  }
53394  {
53395#line 1853
53396  tmp___16 = kmalloc(168UL, 208U);
53397#line 1853
53398  stream = (struct vmw_user_stream *)tmp___16;
53399#line 1854
53400  __cil_tmp47 = (void *)0;
53401#line 1854
53402  __cil_tmp48 = (unsigned long )__cil_tmp47;
53403#line 1854
53404  __cil_tmp49 = (unsigned long )stream;
53405#line 1854
53406  __cil_tmp50 = __cil_tmp49 == __cil_tmp48;
53407#line 1854
53408  __cil_tmp51 = ! __cil_tmp50;
53409#line 1854
53410  __cil_tmp52 = ! __cil_tmp51;
53411#line 1854
53412  __cil_tmp53 = (long )__cil_tmp52;
53413#line 1854
53414  tmp___18 = __builtin_expect(__cil_tmp53, 0L);
53415  }
53416#line 1854
53417  if (tmp___18) {
53418    {
53419#line 1855
53420    tmp___17 = vmw_mem_glob(dev_priv);
53421#line 1855
53422    ttm_mem_global_free(tmp___17, vmw_user_stream_size);
53423#line 1857
53424    ret = -12;
53425    }
53426#line 1858
53427    goto out_unlock;
53428  } else {
53429
53430  }
53431  {
53432#line 1861
53433  __cil_tmp54 = & res;
53434#line 1861
53435  __cil_tmp55 = (unsigned long )stream;
53436#line 1861
53437  __cil_tmp56 = __cil_tmp55 + 64;
53438#line 1861
53439  *__cil_tmp54 = (struct vmw_resource *)__cil_tmp56;
53440#line 1862
53441  __cil_tmp57 = 0 + 28;
53442#line 1862
53443  __cil_tmp58 = (unsigned long )stream;
53444#line 1862
53445  __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
53446#line 1862
53447  *((bool *)__cil_tmp59) = (bool )0;
53448#line 1863
53449  __cil_tmp60 = 0 + 32;
53450#line 1863
53451  __cil_tmp61 = (unsigned long )stream;
53452#line 1863
53453  __cil_tmp62 = __cil_tmp61 + __cil_tmp60;
53454#line 1863
53455  __cil_tmp63 = (void *)0;
53456#line 1863
53457  *((struct ttm_object_file **)__cil_tmp62) = (struct ttm_object_file *)__cil_tmp63;
53458#line 1869
53459  __cil_tmp64 = (unsigned long )stream;
53460#line 1869
53461  __cil_tmp65 = __cil_tmp64 + 64;
53462#line 1869
53463  __cil_tmp66 = (struct vmw_stream *)__cil_tmp65;
53464#line 1869
53465  ret = vmw_stream_init(dev_priv, __cil_tmp66, & vmw_user_stream_free);
53466#line 1870
53467  __cil_tmp67 = ret != 0;
53468#line 1870
53469  __cil_tmp68 = ! __cil_tmp67;
53470#line 1870
53471  __cil_tmp69 = ! __cil_tmp68;
53472#line 1870
53473  __cil_tmp70 = (long )__cil_tmp69;
53474#line 1870
53475  tmp___19 = __builtin_expect(__cil_tmp70, 0L);
53476  }
53477#line 1870
53478  if (tmp___19) {
53479#line 1871
53480    goto out_unlock;
53481  } else {
53482
53483  }
53484  {
53485#line 1873
53486  __cil_tmp71 = & tmp___8;
53487#line 1873
53488  __cil_tmp72 = & res;
53489#line 1873
53490  __cil_tmp73 = *__cil_tmp72;
53491#line 1873
53492  *__cil_tmp71 = vmw_resource_reference(__cil_tmp73);
53493#line 1874
53494  __cil_tmp74 = (struct ttm_base_object *)stream;
53495#line 1874
53496  __cil_tmp75 = (bool )0;
53497#line 1874
53498  __cil_tmp76 = (enum ttm_object_type )258;
53499#line 1874
53500  __cil_tmp77 = (void *)0;
53501#line 1874
53502  __cil_tmp78 = (void (*)(struct ttm_base_object * , enum ttm_ref_type ref_type ))__cil_tmp77;
53503#line 1874
53504  ret = ttm_base_object_init(tfile, __cil_tmp74, __cil_tmp75, __cil_tmp76, & vmw_user_stream_base_release,
53505                             __cil_tmp78);
53506#line 1877
53507  __cil_tmp79 = ret != 0;
53508#line 1877
53509  __cil_tmp80 = ! __cil_tmp79;
53510#line 1877
53511  __cil_tmp81 = ! __cil_tmp80;
53512#line 1877
53513  __cil_tmp82 = (long )__cil_tmp81;
53514#line 1877
53515  tmp___20 = __builtin_expect(__cil_tmp82, 0L);
53516  }
53517#line 1877
53518  if (tmp___20) {
53519    {
53520#line 1878
53521    vmw_resource_unreference(& tmp___8);
53522    }
53523#line 1879
53524    goto out_err;
53525  } else {
53526
53527  }
53528#line 1882
53529  __cil_tmp83 = & res;
53530#line 1882
53531  __cil_tmp84 = *__cil_tmp83;
53532#line 1882
53533  __cil_tmp85 = (unsigned long )__cil_tmp84;
53534#line 1882
53535  __cil_tmp86 = __cil_tmp85 + 24;
53536#line 1882
53537  __cil_tmp87 = *((int *)__cil_tmp86);
53538#line 1882
53539  *((uint32_t *)arg) = (uint32_t )__cil_tmp87;
53540  out_err: 
53541  {
53542#line 1884
53543  vmw_resource_unreference(& res);
53544  }
53545  out_unlock: 
53546  {
53547#line 1886
53548  __cil_tmp88 = (struct ttm_lock *)vmaster;
53549#line 1886
53550  ttm_read_unlock(__cil_tmp88);
53551  }
53552#line 1887
53553  return (ret);
53554}
53555}
53556#line 1890 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c"
53557int vmw_user_stream_lookup(struct vmw_private *dev_priv , struct ttm_object_file *tfile ,
53558                           uint32_t *inout_id , struct vmw_resource **out ) 
53559{ struct vmw_user_stream *stream ;
53560  struct vmw_resource *res ;
53561  int ret ;
53562  long tmp___7 ;
53563  struct vmw_resource    *__mptr ;
53564  struct vmw_resource **__cil_tmp10 ;
53565  unsigned long __cil_tmp11 ;
53566  unsigned long __cil_tmp12 ;
53567  struct idr *__cil_tmp13 ;
53568  uint32_t __cil_tmp14 ;
53569  int __cil_tmp15 ;
53570  void *__cil_tmp16 ;
53571  unsigned long __cil_tmp17 ;
53572  struct vmw_resource **__cil_tmp18 ;
53573  struct vmw_resource *__cil_tmp19 ;
53574  unsigned long __cil_tmp20 ;
53575  int __cil_tmp21 ;
53576  int __cil_tmp22 ;
53577  int __cil_tmp23 ;
53578  long __cil_tmp24 ;
53579  unsigned long __cil_tmp25 ;
53580  struct vmw_resource **__cil_tmp26 ;
53581  struct vmw_resource *__cil_tmp27 ;
53582  unsigned long __cil_tmp28 ;
53583  unsigned long __cil_tmp29 ;
53584  void (*__cil_tmp30)(struct vmw_resource *res ) ;
53585  unsigned long __cil_tmp31 ;
53586  struct vmw_resource **__cil_tmp32 ;
53587  struct vmw_resource *__cil_tmp33 ;
53588  struct vmw_user_stream *__cil_tmp34 ;
53589  unsigned long __cil_tmp35 ;
53590  unsigned long __cil_tmp36 ;
53591  struct vmw_resource *__cil_tmp37 ;
53592  unsigned int __cil_tmp38 ;
53593  char *__cil_tmp39 ;
53594  char *__cil_tmp40 ;
53595  unsigned long __cil_tmp41 ;
53596  unsigned long __cil_tmp42 ;
53597  unsigned long __cil_tmp43 ;
53598  unsigned long __cil_tmp44 ;
53599  struct ttm_object_file *__cil_tmp45 ;
53600  unsigned long __cil_tmp46 ;
53601  unsigned long __cil_tmp47 ;
53602  unsigned long __cil_tmp48 ;
53603  unsigned long __cil_tmp49 ;
53604  struct vmw_resource **__cil_tmp50 ;
53605
53606  {
53607  {
53608#line 1898
53609  __cil_tmp10 = & res;
53610#line 1898
53611  __cil_tmp11 = (unsigned long )dev_priv;
53612#line 1898
53613  __cil_tmp12 = __cil_tmp11 + 2752;
53614#line 1898
53615  __cil_tmp13 = (struct idr *)__cil_tmp12;
53616#line 1898
53617  __cil_tmp14 = *inout_id;
53618#line 1898
53619  __cil_tmp15 = (int )__cil_tmp14;
53620#line 1898
53621  *__cil_tmp10 = vmw_resource_lookup(dev_priv, __cil_tmp13, __cil_tmp15);
53622#line 1899
53623  __cil_tmp16 = (void *)0;
53624#line 1899
53625  __cil_tmp17 = (unsigned long )__cil_tmp16;
53626#line 1899
53627  __cil_tmp18 = & res;
53628#line 1899
53629  __cil_tmp19 = *__cil_tmp18;
53630#line 1899
53631  __cil_tmp20 = (unsigned long )__cil_tmp19;
53632#line 1899
53633  __cil_tmp21 = __cil_tmp20 == __cil_tmp17;
53634#line 1899
53635  __cil_tmp22 = ! __cil_tmp21;
53636#line 1899
53637  __cil_tmp23 = ! __cil_tmp22;
53638#line 1899
53639  __cil_tmp24 = (long )__cil_tmp23;
53640#line 1899
53641  tmp___7 = __builtin_expect(__cil_tmp24, 0L);
53642  }
53643#line 1899
53644  if (tmp___7) {
53645#line 1900
53646    return (-22);
53647  } else {
53648
53649  }
53650  {
53651#line 1902
53652  __cil_tmp25 = (unsigned long )(& vmw_user_stream_free);
53653#line 1902
53654  __cil_tmp26 = & res;
53655#line 1902
53656  __cil_tmp27 = *__cil_tmp26;
53657#line 1902
53658  __cil_tmp28 = (unsigned long )__cil_tmp27;
53659#line 1902
53660  __cil_tmp29 = __cil_tmp28 + 56;
53661#line 1902
53662  __cil_tmp30 = *((void (**)(struct vmw_resource *res ))__cil_tmp29);
53663#line 1902
53664  __cil_tmp31 = (unsigned long )__cil_tmp30;
53665#line 1902
53666  if (__cil_tmp31 != __cil_tmp25) {
53667#line 1903
53668    ret = -22;
53669#line 1904
53670    goto err_ref;
53671  } else {
53672
53673  }
53674  }
53675#line 1907
53676  __cil_tmp32 = & res;
53677#line 1907
53678  __cil_tmp33 = *__cil_tmp32;
53679#line 1907
53680  __mptr = (struct vmw_resource    *)__cil_tmp33;
53681#line 1907
53682  __cil_tmp34 = (struct vmw_user_stream *)0;
53683#line 1907
53684  __cil_tmp35 = (unsigned long )__cil_tmp34;
53685#line 1907
53686  __cil_tmp36 = __cil_tmp35 + 64;
53687#line 1907
53688  __cil_tmp37 = (struct vmw_resource *)__cil_tmp36;
53689#line 1907
53690  __cil_tmp38 = (unsigned int )__cil_tmp37;
53691#line 1907
53692  __cil_tmp39 = (char *)__mptr;
53693#line 1907
53694  __cil_tmp40 = __cil_tmp39 - __cil_tmp38;
53695#line 1907
53696  stream = (struct vmw_user_stream *)__cil_tmp40;
53697  {
53698#line 1908
53699  __cil_tmp41 = (unsigned long )tfile;
53700#line 1908
53701  __cil_tmp42 = 0 + 32;
53702#line 1908
53703  __cil_tmp43 = (unsigned long )stream;
53704#line 1908
53705  __cil_tmp44 = __cil_tmp43 + __cil_tmp42;
53706#line 1908
53707  __cil_tmp45 = *((struct ttm_object_file **)__cil_tmp44);
53708#line 1908
53709  __cil_tmp46 = (unsigned long )__cil_tmp45;
53710#line 1908
53711  if (__cil_tmp46 != __cil_tmp41) {
53712#line 1909
53713    ret = -1;
53714#line 1910
53715    goto err_ref;
53716  } else {
53717
53718  }
53719  }
53720#line 1913
53721  __cil_tmp47 = 64 + 96;
53722#line 1913
53723  __cil_tmp48 = (unsigned long )stream;
53724#line 1913
53725  __cil_tmp49 = __cil_tmp48 + __cil_tmp47;
53726#line 1913
53727  *inout_id = *((uint32_t *)__cil_tmp49);
53728#line 1914
53729  __cil_tmp50 = & res;
53730#line 1914
53731  *out = *__cil_tmp50;
53732#line 1915
53733  return (0);
53734  err_ref: 
53735  {
53736#line 1917
53737  vmw_resource_unreference(& res);
53738  }
53739#line 1918
53740  return (ret);
53741}
53742}
53743#line 603 "include/drm/ttm/ttm_bo_driver.h"
53744extern int ttm_tt_init(struct ttm_tt *ttm , struct ttm_bo_device *bdev , unsigned long size ,
53745                       uint32_t page_flags , struct page *dummy_read_page ) ;
53746#line 617
53747extern void ttm_tt_fini(struct ttm_tt *ttm ) ;
53748#line 1009
53749extern struct ttm_mem_type_manager_func    ttm_bo_manager_func ;
53750#line 72 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
53751struct vmw_fence_obj *vmw_fence_obj_reference(struct vmw_fence_obj *fence ) ;
53752#line 77
53753bool vmw_fence_obj_signaled(struct vmw_fence_obj *fence , uint32_t flags ) ;
53754#line 84
53755void vmw_fence_obj_flush(struct vmw_fence_obj *fence ) ;
53756#line 519 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
53757struct ttm_placement vmw_vram_gmr_ne_placement ;
53758#line 520
53759struct ttm_placement vmw_sys_placement ;
53760#line 521
53761struct ttm_placement vmw_evictable_placement ;
53762#line 668
53763struct ttm_mem_type_manager_func    vmw_gmrid_manager_func ;
53764#line 48 "include/drm/ttm/ttm_page_alloc.h"
53765extern int ttm_pool_populate(struct ttm_tt *ttm ) ;
53766#line 57
53767extern void ttm_pool_unpopulate(struct ttm_tt *ttm ) ;
53768#line 34 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53769static uint32_t vram_placement_flags  =    (uint32_t )((1 << 2) | (1 << 16));
53770#line 37 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53771static uint32_t vram_ne_placement_flags  =    (uint32_t )(((1 << 2) | (1 << 16)) | (1 << 21));
53772#line 41 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53773static uint32_t sys_placement_flags  =    (uint32_t )(1 | (1 << 16));
53774#line 44 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53775static uint32_t gmr_placement_flags  =    (uint32_t )((1 << 3) | (1 << 16));
53776#line 47 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53777static uint32_t gmr_ne_placement_flags  =    (uint32_t )(((1 << 3) | (1 << 16)) | (1 << 21));
53778#line 51 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53779struct ttm_placement vmw_vram_placement  =    {0U, 0U, 1U, (uint32_t    *)(& vram_placement_flags), 1U, (uint32_t    *)(& vram_placement_flags)};
53780#line 60 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53781static uint32_t vram_gmr_placement_flags[2]  = {      (uint32_t )((1 << 2) | (1 << 16)),      (uint32_t )((1 << 3) | (1 << 16))};
53782#line 65 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53783static uint32_t gmr_vram_placement_flags[2]  = {      (uint32_t )((1 << 3) | (1 << 16)),      (uint32_t )((1 << 2) | (1 << 16))};
53784#line 70 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53785struct ttm_placement vmw_vram_gmr_placement  =    {0U, 0U, 2U, (uint32_t    *)(vram_gmr_placement_flags), 1U, (uint32_t    *)(& gmr_placement_flags)};
53786#line 79 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53787static uint32_t vram_gmr_ne_placement_flags[2]  = {      (uint32_t )(((1 << 2) | (1 << 16)) | (1 << 21)),      (uint32_t )(((1 << 3) | (1 << 16)) | (1 << 21))};
53788#line 84 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53789struct ttm_placement vmw_vram_gmr_ne_placement  =    {0U, 0U, 2U, (uint32_t    *)(vram_gmr_ne_placement_flags), 1U, (uint32_t    *)(& gmr_ne_placement_flags)};
53790#line 93 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53791struct ttm_placement vmw_vram_sys_placement  =    {0U, 0U, 1U, (uint32_t    *)(& vram_placement_flags), 1U, (uint32_t    *)(& sys_placement_flags)};
53792#line 102 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53793struct ttm_placement vmw_vram_ne_placement  =    {0U, 0U, 1U, (uint32_t    *)(& vram_ne_placement_flags), 1U, (uint32_t    *)(& vram_ne_placement_flags)};
53794#line 111 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53795struct ttm_placement vmw_sys_placement  =    {0U, 0U, 1U, (uint32_t    *)(& sys_placement_flags), 1U, (uint32_t    *)(& sys_placement_flags)};
53796#line 120 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53797static uint32_t evictable_placement_flags[3]  = {      (uint32_t )(1 | (1 << 16)),      (uint32_t )((1 << 2) | (1 << 16)),      (uint32_t )((1 << 3) | (1 << 16))};
53798#line 126 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53799struct ttm_placement vmw_evictable_placement  =    {0U, 0U, 3U, (uint32_t    *)(evictable_placement_flags), 1U, (uint32_t    *)(& sys_placement_flags)};
53800#line 135 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53801struct ttm_placement vmw_srf_placement  =    {0U, 0U, 1U, (uint32_t    *)(& gmr_placement_flags), 2U, (uint32_t    *)(gmr_vram_placement_flags)};
53802#line 150 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53803static int vmw_ttm_bind(struct ttm_tt *ttm , struct ttm_mem_reg *bo_mem ) 
53804{ struct vmw_ttm_tt *vmw_be ;
53805  struct ttm_tt    *__mptr ;
53806  int tmp___7 ;
53807  struct vmw_ttm_tt *__cil_tmp6 ;
53808  struct ttm_tt *__cil_tmp7 ;
53809  unsigned int __cil_tmp8 ;
53810  char *__cil_tmp9 ;
53811  char *__cil_tmp10 ;
53812  unsigned long __cil_tmp11 ;
53813  unsigned long __cil_tmp12 ;
53814  unsigned long __cil_tmp13 ;
53815  unsigned long __cil_tmp14 ;
53816  unsigned long __cil_tmp15 ;
53817  unsigned long __cil_tmp16 ;
53818  unsigned long __cil_tmp17 ;
53819  struct vmw_private *__cil_tmp18 ;
53820  unsigned long __cil_tmp19 ;
53821  unsigned long __cil_tmp20 ;
53822  struct page **__cil_tmp21 ;
53823  unsigned long __cil_tmp22 ;
53824  unsigned long __cil_tmp23 ;
53825  unsigned long __cil_tmp24 ;
53826  unsigned long __cil_tmp25 ;
53827  unsigned long __cil_tmp26 ;
53828  int __cil_tmp27 ;
53829
53830  {
53831  {
53832#line 152
53833  __mptr = (struct ttm_tt    *)ttm;
53834#line 152
53835  __cil_tmp6 = (struct vmw_ttm_tt *)0;
53836#line 152
53837  __cil_tmp7 = (struct ttm_tt *)__cil_tmp6;
53838#line 152
53839  __cil_tmp8 = (unsigned int )__cil_tmp7;
53840#line 152
53841  __cil_tmp9 = (char *)__mptr;
53842#line 152
53843  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
53844#line 152
53845  vmw_be = (struct vmw_ttm_tt *)__cil_tmp10;
53846#line 154
53847  __cil_tmp11 = (unsigned long )vmw_be;
53848#line 154
53849  __cil_tmp12 = __cil_tmp11 + 88;
53850#line 154
53851  __cil_tmp13 = (unsigned long )bo_mem;
53852#line 154
53853  __cil_tmp14 = __cil_tmp13 + 8;
53854#line 154
53855  __cil_tmp15 = *((unsigned long *)__cil_tmp14);
53856#line 154
53857  *((int *)__cil_tmp12) = (int )__cil_tmp15;
53858#line 156
53859  __cil_tmp16 = (unsigned long )vmw_be;
53860#line 156
53861  __cil_tmp17 = __cil_tmp16 + 80;
53862#line 156
53863  __cil_tmp18 = *((struct vmw_private **)__cil_tmp17);
53864#line 156
53865  __cil_tmp19 = (unsigned long )ttm;
53866#line 156
53867  __cil_tmp20 = __cil_tmp19 + 24;
53868#line 156
53869  __cil_tmp21 = *((struct page ***)__cil_tmp20);
53870#line 156
53871  __cil_tmp22 = (unsigned long )ttm;
53872#line 156
53873  __cil_tmp23 = __cil_tmp22 + 40;
53874#line 156
53875  __cil_tmp24 = *((unsigned long *)__cil_tmp23);
53876#line 156
53877  __cil_tmp25 = (unsigned long )vmw_be;
53878#line 156
53879  __cil_tmp26 = __cil_tmp25 + 88;
53880#line 156
53881  __cil_tmp27 = *((int *)__cil_tmp26);
53882#line 156
53883  tmp___7 = vmw_gmr_bind(__cil_tmp18, __cil_tmp21, __cil_tmp24, __cil_tmp27);
53884  }
53885#line 156
53886  return (tmp___7);
53887}
53888}
53889#line 160 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53890static int vmw_ttm_unbind(struct ttm_tt *ttm ) 
53891{ struct vmw_ttm_tt *vmw_be ;
53892  struct ttm_tt    *__mptr ;
53893  struct vmw_ttm_tt *__cil_tmp4 ;
53894  struct ttm_tt *__cil_tmp5 ;
53895  unsigned int __cil_tmp6 ;
53896  char *__cil_tmp7 ;
53897  char *__cil_tmp8 ;
53898  unsigned long __cil_tmp9 ;
53899  unsigned long __cil_tmp10 ;
53900  struct vmw_private *__cil_tmp11 ;
53901  unsigned long __cil_tmp12 ;
53902  unsigned long __cil_tmp13 ;
53903  int __cil_tmp14 ;
53904
53905  {
53906  {
53907#line 162
53908  __mptr = (struct ttm_tt    *)ttm;
53909#line 162
53910  __cil_tmp4 = (struct vmw_ttm_tt *)0;
53911#line 162
53912  __cil_tmp5 = (struct ttm_tt *)__cil_tmp4;
53913#line 162
53914  __cil_tmp6 = (unsigned int )__cil_tmp5;
53915#line 162
53916  __cil_tmp7 = (char *)__mptr;
53917#line 162
53918  __cil_tmp8 = __cil_tmp7 - __cil_tmp6;
53919#line 162
53920  vmw_be = (struct vmw_ttm_tt *)__cil_tmp8;
53921#line 164
53922  __cil_tmp9 = (unsigned long )vmw_be;
53923#line 164
53924  __cil_tmp10 = __cil_tmp9 + 80;
53925#line 164
53926  __cil_tmp11 = *((struct vmw_private **)__cil_tmp10);
53927#line 164
53928  __cil_tmp12 = (unsigned long )vmw_be;
53929#line 164
53930  __cil_tmp13 = __cil_tmp12 + 88;
53931#line 164
53932  __cil_tmp14 = *((int *)__cil_tmp13);
53933#line 164
53934  vmw_gmr_unbind(__cil_tmp11, __cil_tmp14);
53935  }
53936#line 165
53937  return (0);
53938}
53939}
53940#line 168 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53941static void vmw_ttm_destroy(struct ttm_tt *ttm ) 
53942{ struct vmw_ttm_tt *vmw_be ;
53943  struct ttm_tt    *__mptr ;
53944  struct vmw_ttm_tt *__cil_tmp4 ;
53945  struct ttm_tt *__cil_tmp5 ;
53946  unsigned int __cil_tmp6 ;
53947  char *__cil_tmp7 ;
53948  char *__cil_tmp8 ;
53949  void    *__cil_tmp9 ;
53950
53951  {
53952  {
53953#line 170
53954  __mptr = (struct ttm_tt    *)ttm;
53955#line 170
53956  __cil_tmp4 = (struct vmw_ttm_tt *)0;
53957#line 170
53958  __cil_tmp5 = (struct ttm_tt *)__cil_tmp4;
53959#line 170
53960  __cil_tmp6 = (unsigned int )__cil_tmp5;
53961#line 170
53962  __cil_tmp7 = (char *)__mptr;
53963#line 170
53964  __cil_tmp8 = __cil_tmp7 - __cil_tmp6;
53965#line 170
53966  vmw_be = (struct vmw_ttm_tt *)__cil_tmp8;
53967#line 172
53968  ttm_tt_fini(ttm);
53969#line 173
53970  __cil_tmp9 = (void    *)vmw_be;
53971#line 173
53972  kfree(__cil_tmp9);
53973  }
53974#line 174
53975  return;
53976}
53977}
53978#line 176 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53979static struct ttm_backend_func vmw_ttm_func  =    {& vmw_ttm_bind, & vmw_ttm_unbind, & vmw_ttm_destroy};
53980#line 182 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
53981struct ttm_tt *vmw_ttm_tt_create(struct ttm_bo_device *bdev , unsigned long size ,
53982                                 uint32_t page_flags , struct page *dummy_read_page ) 
53983{ struct vmw_ttm_tt *vmw_be ;
53984  void *tmp___7 ;
53985  struct ttm_bo_device    *__mptr ;
53986  int tmp___8 ;
53987  void *__cil_tmp9 ;
53988  unsigned long __cil_tmp10 ;
53989  unsigned long __cil_tmp11 ;
53990  unsigned long __cil_tmp12 ;
53991  unsigned long __cil_tmp13 ;
53992  unsigned long __cil_tmp14 ;
53993  struct vmw_private *__cil_tmp15 ;
53994  struct ttm_bo_device *__cil_tmp16 ;
53995  unsigned int __cil_tmp17 ;
53996  char *__cil_tmp18 ;
53997  char *__cil_tmp19 ;
53998  struct ttm_tt *__cil_tmp20 ;
53999  void    *__cil_tmp21 ;
54000  void *__cil_tmp22 ;
54001
54002  {
54003  {
54004#line 188
54005  tmp___7 = kmalloc(96UL, 208U);
54006#line 188
54007  vmw_be = (struct vmw_ttm_tt *)tmp___7;
54008  }
54009#line 189
54010  if (! vmw_be) {
54011    {
54012#line 190
54013    __cil_tmp9 = (void *)0;
54014#line 190
54015    return ((struct ttm_tt *)__cil_tmp9);
54016    }
54017  } else {
54018
54019  }
54020  {
54021#line 192
54022  __cil_tmp10 = 0 + 8;
54023#line 192
54024  __cil_tmp11 = (unsigned long )vmw_be;
54025#line 192
54026  __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
54027#line 192
54028  *((struct ttm_backend_func **)__cil_tmp12) = & vmw_ttm_func;
54029#line 193
54030  __mptr = (struct ttm_bo_device    *)bdev;
54031#line 193
54032  __cil_tmp13 = (unsigned long )vmw_be;
54033#line 193
54034  __cil_tmp14 = __cil_tmp13 + 80;
54035#line 193
54036  __cil_tmp15 = (struct vmw_private *)0;
54037#line 193
54038  __cil_tmp16 = (struct ttm_bo_device *)__cil_tmp15;
54039#line 193
54040  __cil_tmp17 = (unsigned int )__cil_tmp16;
54041#line 193
54042  __cil_tmp18 = (char *)__mptr;
54043#line 193
54044  __cil_tmp19 = __cil_tmp18 - __cil_tmp17;
54045#line 193
54046  *((struct vmw_private **)__cil_tmp14) = (struct vmw_private *)__cil_tmp19;
54047#line 195
54048  __cil_tmp20 = (struct ttm_tt *)vmw_be;
54049#line 195
54050  tmp___8 = ttm_tt_init(__cil_tmp20, bdev, size, page_flags, dummy_read_page);
54051  }
54052#line 195
54053  if (tmp___8) {
54054    {
54055#line 196
54056    __cil_tmp21 = (void    *)vmw_be;
54057#line 196
54058    kfree(__cil_tmp21);
54059    }
54060    {
54061#line 197
54062    __cil_tmp22 = (void *)0;
54063#line 197
54064    return ((struct ttm_tt *)__cil_tmp22);
54065    }
54066  } else {
54067
54068  }
54069#line 200
54070  return ((struct ttm_tt *)vmw_be);
54071}
54072}
54073#line 203 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54074int vmw_invalidate_caches(struct ttm_bo_device *bdev , uint32_t flags ) 
54075{ 
54076
54077  {
54078#line 205
54079  return (0);
54080}
54081}
54082#line 208 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54083int vmw_init_mem_type(struct ttm_bo_device *bdev , uint32_t type , struct ttm_mem_type_manager *man ) 
54084{ unsigned long __cil_tmp4 ;
54085  unsigned long __cil_tmp5 ;
54086  int __cil_tmp6 ;
54087  unsigned long __cil_tmp7 ;
54088  unsigned long __cil_tmp8 ;
54089  int __cil_tmp9 ;
54090  unsigned long __cil_tmp10 ;
54091  unsigned long __cil_tmp11 ;
54092  int __cil_tmp12 ;
54093  unsigned long __cil_tmp13 ;
54094  unsigned long __cil_tmp14 ;
54095  unsigned long __cil_tmp15 ;
54096  unsigned long __cil_tmp16 ;
54097  unsigned long __cil_tmp17 ;
54098  unsigned long __cil_tmp18 ;
54099  int __cil_tmp19 ;
54100  int __cil_tmp20 ;
54101  unsigned long __cil_tmp21 ;
54102  unsigned long __cil_tmp22 ;
54103  int __cil_tmp23 ;
54104  unsigned long __cil_tmp24 ;
54105  unsigned long __cil_tmp25 ;
54106  int __cil_tmp26 ;
54107  unsigned long __cil_tmp27 ;
54108  unsigned long __cil_tmp28 ;
54109  unsigned long __cil_tmp29 ;
54110  unsigned long __cil_tmp30 ;
54111  unsigned long __cil_tmp31 ;
54112  unsigned long __cil_tmp32 ;
54113  int __cil_tmp33 ;
54114  int __cil_tmp34 ;
54115  int __cil_tmp35 ;
54116  unsigned long __cil_tmp36 ;
54117  unsigned long __cil_tmp37 ;
54118  int __cil_tmp38 ;
54119  unsigned long __cil_tmp39 ;
54120  unsigned long __cil_tmp40 ;
54121  int __cil_tmp41 ;
54122
54123  {
54124#line 212
54125  if ((int )type == 0) {
54126#line 212
54127    goto case_0;
54128  } else
54129#line 219
54130  if ((int )type == 2) {
54131#line 219
54132    goto case_2;
54133  } else
54134#line 227
54135  if ((int )type == 3) {
54136#line 227
54137    goto case_3;
54138  } else {
54139    {
54140#line 239
54141    goto switch_default;
54142#line 211
54143    if (0) {
54144      case_0: /* CIL Label */ 
54145#line 215
54146      __cil_tmp4 = (unsigned long )man;
54147#line 215
54148      __cil_tmp5 = __cil_tmp4 + 12;
54149#line 215
54150      __cil_tmp6 = 1 << 1;
54151#line 215
54152      *((uint32_t *)__cil_tmp5) = (uint32_t )__cil_tmp6;
54153#line 216
54154      __cil_tmp7 = (unsigned long )man;
54155#line 216
54156      __cil_tmp8 = __cil_tmp7 + 32;
54157#line 216
54158      __cil_tmp9 = 1 << 16;
54159#line 216
54160      *((uint32_t *)__cil_tmp8) = (uint32_t )__cil_tmp9;
54161#line 217
54162      __cil_tmp10 = (unsigned long )man;
54163#line 217
54164      __cil_tmp11 = __cil_tmp10 + 36;
54165#line 217
54166      __cil_tmp12 = 1 << 16;
54167#line 217
54168      *((uint32_t *)__cil_tmp11) = (uint32_t )__cil_tmp12;
54169#line 218
54170      goto switch_break;
54171      case_2: /* CIL Label */ 
54172#line 221
54173      __cil_tmp13 = (unsigned long )man;
54174#line 221
54175      __cil_tmp14 = __cil_tmp13 + 40;
54176#line 221
54177      *((struct ttm_mem_type_manager_func    **)__cil_tmp14) = & ttm_bo_manager_func;
54178#line 222
54179      __cil_tmp15 = (unsigned long )man;
54180#line 222
54181      __cil_tmp16 = __cil_tmp15 + 16;
54182#line 222
54183      *((unsigned long *)__cil_tmp16) = 0UL;
54184#line 223
54185      __cil_tmp17 = (unsigned long )man;
54186#line 223
54187      __cil_tmp18 = __cil_tmp17 + 12;
54188#line 223
54189      __cil_tmp19 = 1 << 1;
54190#line 223
54191      __cil_tmp20 = 1 | __cil_tmp19;
54192#line 223
54193      *((uint32_t *)__cil_tmp18) = (uint32_t )__cil_tmp20;
54194#line 224
54195      __cil_tmp21 = (unsigned long )man;
54196#line 224
54197      __cil_tmp22 = __cil_tmp21 + 32;
54198#line 224
54199      __cil_tmp23 = 1 << 16;
54200#line 224
54201      *((uint32_t *)__cil_tmp22) = (uint32_t )__cil_tmp23;
54202#line 225
54203      __cil_tmp24 = (unsigned long )man;
54204#line 225
54205      __cil_tmp25 = __cil_tmp24 + 36;
54206#line 225
54207      __cil_tmp26 = 1 << 16;
54208#line 225
54209      *((uint32_t *)__cil_tmp25) = (uint32_t )__cil_tmp26;
54210#line 226
54211      goto switch_break;
54212      case_3: /* CIL Label */ 
54213#line 233
54214      __cil_tmp27 = (unsigned long )man;
54215#line 233
54216      __cil_tmp28 = __cil_tmp27 + 40;
54217#line 233
54218      *((struct ttm_mem_type_manager_func    **)__cil_tmp28) = & vmw_gmrid_manager_func;
54219#line 234
54220      __cil_tmp29 = (unsigned long )man;
54221#line 234
54222      __cil_tmp30 = __cil_tmp29 + 16;
54223#line 234
54224      *((unsigned long *)__cil_tmp30) = 0UL;
54225#line 235
54226      __cil_tmp31 = (unsigned long )man;
54227#line 235
54228      __cil_tmp32 = __cil_tmp31 + 12;
54229#line 235
54230      __cil_tmp33 = 1 << 1;
54231#line 235
54232      __cil_tmp34 = 1 << 3;
54233#line 235
54234      __cil_tmp35 = __cil_tmp34 | __cil_tmp33;
54235#line 235
54236      *((uint32_t *)__cil_tmp32) = (uint32_t )__cil_tmp35;
54237#line 236
54238      __cil_tmp36 = (unsigned long )man;
54239#line 236
54240      __cil_tmp37 = __cil_tmp36 + 32;
54241#line 236
54242      __cil_tmp38 = 1 << 16;
54243#line 236
54244      *((uint32_t *)__cil_tmp37) = (uint32_t )__cil_tmp38;
54245#line 237
54246      __cil_tmp39 = (unsigned long )man;
54247#line 237
54248      __cil_tmp40 = __cil_tmp39 + 36;
54249#line 237
54250      __cil_tmp41 = 1 << 16;
54251#line 237
54252      *((uint32_t *)__cil_tmp40) = (uint32_t )__cil_tmp41;
54253#line 238
54254      goto switch_break;
54255      switch_default: /* CIL Label */ 
54256      {
54257#line 240
54258      drm_err("vmw_init_mem_type", "Unsupported memory type %u\n", type);
54259      }
54260#line 241
54261      return (-22);
54262    } else {
54263      switch_break: /* CIL Label */ ;
54264    }
54265    }
54266  }
54267#line 243
54268  return (0);
54269}
54270}
54271#line 246 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54272void vmw_evict_flags(struct ttm_buffer_object *bo , struct ttm_placement *placement ) 
54273{ struct ttm_placement *__cil_tmp3 ;
54274
54275  {
54276#line 249
54277  __cil_tmp3 = & vmw_sys_placement;
54278#line 249
54279  *placement = *__cil_tmp3;
54280#line 250
54281  return;
54282}
54283}
54284#line 256 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54285static int vmw_verify_access(struct ttm_buffer_object *bo , struct file *filp ) 
54286{ 
54287
54288  {
54289#line 258
54290  return (0);
54291}
54292}
54293#line 261 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54294static int vmw_ttm_io_mem_reserve(struct ttm_bo_device *bdev , struct ttm_mem_reg *mem ) 
54295{ struct ttm_mem_type_manager *man ;
54296  struct vmw_private *dev_priv ;
54297  struct ttm_bo_device    *__mptr ;
54298  unsigned long __cil_tmp6 ;
54299  unsigned long __cil_tmp7 ;
54300  uint32_t __cil_tmp8 ;
54301  unsigned long __cil_tmp9 ;
54302  unsigned long __cil_tmp10 ;
54303  unsigned long __cil_tmp11 ;
54304  unsigned long __cil_tmp12 ;
54305  struct vmw_private *__cil_tmp13 ;
54306  struct ttm_bo_device *__cil_tmp14 ;
54307  unsigned int __cil_tmp15 ;
54308  char *__cil_tmp16 ;
54309  char *__cil_tmp17 ;
54310  unsigned long __cil_tmp18 ;
54311  unsigned long __cil_tmp19 ;
54312  unsigned long __cil_tmp20 ;
54313  unsigned long __cil_tmp21 ;
54314  unsigned long __cil_tmp22 ;
54315  unsigned long __cil_tmp23 ;
54316  unsigned long __cil_tmp24 ;
54317  unsigned long __cil_tmp25 ;
54318  unsigned long __cil_tmp26 ;
54319  unsigned long __cil_tmp27 ;
54320  unsigned long __cil_tmp28 ;
54321  unsigned long __cil_tmp29 ;
54322  unsigned long __cil_tmp30 ;
54323  unsigned long __cil_tmp31 ;
54324  unsigned long __cil_tmp32 ;
54325  unsigned long __cil_tmp33 ;
54326  unsigned long __cil_tmp34 ;
54327  int __cil_tmp35 ;
54328  unsigned int __cil_tmp36 ;
54329  unsigned long __cil_tmp37 ;
54330  unsigned long __cil_tmp38 ;
54331  uint32_t __cil_tmp39 ;
54332  unsigned int __cil_tmp40 ;
54333  unsigned long __cil_tmp41 ;
54334  unsigned long __cil_tmp42 ;
54335  uint32_t __cil_tmp43 ;
54336  unsigned long __cil_tmp44 ;
54337  unsigned long __cil_tmp45 ;
54338  unsigned long __cil_tmp46 ;
54339  unsigned long __cil_tmp47 ;
54340  unsigned long __cil_tmp48 ;
54341  unsigned long __cil_tmp49 ;
54342  unsigned long __cil_tmp50 ;
54343  unsigned long __cil_tmp51 ;
54344  unsigned long __cil_tmp52 ;
54345  unsigned long __cil_tmp53 ;
54346  unsigned long __cil_tmp54 ;
54347  uint32_t __cil_tmp55 ;
54348  unsigned long __cil_tmp56 ;
54349  unsigned long __cil_tmp57 ;
54350  unsigned long __cil_tmp58 ;
54351
54352  {
54353#line 263
54354  __cil_tmp6 = (unsigned long )mem;
54355#line 263
54356  __cil_tmp7 = __cil_tmp6 + 36;
54357#line 263
54358  __cil_tmp8 = *((uint32_t *)__cil_tmp7);
54359#line 263
54360  __cil_tmp9 = __cil_tmp8 * 168UL;
54361#line 263
54362  __cil_tmp10 = 56 + __cil_tmp9;
54363#line 263
54364  __cil_tmp11 = (unsigned long )bdev;
54365#line 263
54366  __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
54367#line 263
54368  man = (struct ttm_mem_type_manager *)__cil_tmp12;
54369#line 264
54370  __mptr = (struct ttm_bo_device    *)bdev;
54371#line 264
54372  __cil_tmp13 = (struct vmw_private *)0;
54373#line 264
54374  __cil_tmp14 = (struct ttm_bo_device *)__cil_tmp13;
54375#line 264
54376  __cil_tmp15 = (unsigned int )__cil_tmp14;
54377#line 264
54378  __cil_tmp16 = (char *)__mptr;
54379#line 264
54380  __cil_tmp17 = __cil_tmp16 - __cil_tmp15;
54381#line 264
54382  dev_priv = (struct vmw_private *)__cil_tmp17;
54383#line 266
54384  __cil_tmp18 = (unsigned long )mem;
54385#line 266
54386  __cil_tmp19 = __cil_tmp18 + 48;
54387#line 266
54388  *((void **)__cil_tmp19) = (void *)0;
54389#line 267
54390  __cil_tmp20 = 48 + 32;
54391#line 267
54392  __cil_tmp21 = (unsigned long )mem;
54393#line 267
54394  __cil_tmp22 = __cil_tmp21 + __cil_tmp20;
54395#line 267
54396  *((bool *)__cil_tmp22) = (bool )0;
54397#line 268
54398  __cil_tmp23 = 48 + 24;
54399#line 268
54400  __cil_tmp24 = (unsigned long )mem;
54401#line 268
54402  __cil_tmp25 = __cil_tmp24 + __cil_tmp23;
54403#line 268
54404  *((unsigned long *)__cil_tmp25) = 0UL;
54405#line 269
54406  __cil_tmp26 = 48 + 16;
54407#line 269
54408  __cil_tmp27 = (unsigned long )mem;
54409#line 269
54410  __cil_tmp28 = __cil_tmp27 + __cil_tmp26;
54411#line 269
54412  __cil_tmp29 = (unsigned long )mem;
54413#line 269
54414  __cil_tmp30 = __cil_tmp29 + 24;
54415#line 269
54416  __cil_tmp31 = *((unsigned long *)__cil_tmp30);
54417#line 269
54418  *((unsigned long *)__cil_tmp28) = __cil_tmp31 << 12;
54419#line 270
54420  __cil_tmp32 = 48 + 8;
54421#line 270
54422  __cil_tmp33 = (unsigned long )mem;
54423#line 270
54424  __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
54425#line 270
54426  *((unsigned long *)__cil_tmp34) = 0UL;
54427  {
54428#line 271
54429  __cil_tmp35 = 1 << 1;
54430#line 271
54431  __cil_tmp36 = (unsigned int )__cil_tmp35;
54432#line 271
54433  __cil_tmp37 = (unsigned long )man;
54434#line 271
54435  __cil_tmp38 = __cil_tmp37 + 12;
54436#line 271
54437  __cil_tmp39 = *((uint32_t *)__cil_tmp38);
54438#line 271
54439  __cil_tmp40 = __cil_tmp39 & __cil_tmp36;
54440#line 271
54441  if (! __cil_tmp40) {
54442#line 272
54443    return (-22);
54444  } else {
54445
54446  }
54447  }
54448  {
54449#line 273
54450  __cil_tmp41 = (unsigned long )mem;
54451#line 273
54452  __cil_tmp42 = __cil_tmp41 + 36;
54453#line 273
54454  __cil_tmp43 = *((uint32_t *)__cil_tmp42);
54455#line 274
54456  if ((int )__cil_tmp43 == 0) {
54457#line 274
54458    goto case_0;
54459  } else
54460#line 275
54461  if ((int )__cil_tmp43 == 3) {
54462#line 275
54463    goto case_0;
54464  } else
54465#line 277
54466  if ((int )__cil_tmp43 == 2) {
54467#line 277
54468    goto case_2;
54469  } else {
54470    {
54471#line 282
54472    goto switch_default;
54473#line 273
54474    if (0) {
54475      case_0: /* CIL Label */ 
54476      case_3: /* CIL Label */ 
54477#line 276
54478      return (0);
54479      case_2: /* CIL Label */ 
54480#line 278
54481      __cil_tmp44 = 48 + 24;
54482#line 278
54483      __cil_tmp45 = (unsigned long )mem;
54484#line 278
54485      __cil_tmp46 = __cil_tmp45 + __cil_tmp44;
54486#line 278
54487      __cil_tmp47 = (unsigned long )mem;
54488#line 278
54489      __cil_tmp48 = __cil_tmp47 + 8;
54490#line 278
54491      __cil_tmp49 = *((unsigned long *)__cil_tmp48);
54492#line 278
54493      *((unsigned long *)__cil_tmp46) = __cil_tmp49 << 12;
54494#line 279
54495      __cil_tmp50 = 48 + 8;
54496#line 279
54497      __cil_tmp51 = (unsigned long )mem;
54498#line 279
54499      __cil_tmp52 = __cil_tmp51 + __cil_tmp50;
54500#line 279
54501      __cil_tmp53 = (unsigned long )dev_priv;
54502#line 279
54503      __cil_tmp54 = __cil_tmp53 + 2108;
54504#line 279
54505      __cil_tmp55 = *((uint32_t *)__cil_tmp54);
54506#line 279
54507      *((unsigned long *)__cil_tmp52) = (unsigned long )__cil_tmp55;
54508#line 280
54509      __cil_tmp56 = 48 + 32;
54510#line 280
54511      __cil_tmp57 = (unsigned long )mem;
54512#line 280
54513      __cil_tmp58 = __cil_tmp57 + __cil_tmp56;
54514#line 280
54515      *((bool *)__cil_tmp58) = (bool )1;
54516#line 281
54517      goto switch_break;
54518      switch_default: /* CIL Label */ 
54519#line 283
54520      return (-22);
54521    } else {
54522      switch_break: /* CIL Label */ ;
54523    }
54524    }
54525  }
54526  }
54527#line 285
54528  return (0);
54529}
54530}
54531#line 288 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54532static void vmw_ttm_io_mem_free(struct ttm_bo_device *bdev , struct ttm_mem_reg *mem ) 
54533{ 
54534
54535  {
54536#line 290
54537  return;
54538}
54539}
54540#line 292 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54541static int vmw_ttm_fault_reserve_notify(struct ttm_buffer_object *bo ) 
54542{ 
54543
54544  {
54545#line 294
54546  return (0);
54547}
54548}
54549#line 302 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54550static void *vmw_sync_obj_ref(void *sync_obj ) 
54551{ struct vmw_fence_obj *tmp___7 ;
54552  struct vmw_fence_obj *__cil_tmp3 ;
54553
54554  {
54555  {
54556#line 305
54557  __cil_tmp3 = (struct vmw_fence_obj *)sync_obj;
54558#line 305
54559  tmp___7 = vmw_fence_obj_reference(__cil_tmp3);
54560  }
54561#line 305
54562  return ((void *)tmp___7);
54563}
54564}
54565#line 309 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54566static void vmw_sync_obj_unref(void **sync_obj ) 
54567{ struct vmw_fence_obj **__cil_tmp2 ;
54568
54569  {
54570  {
54571#line 311
54572  __cil_tmp2 = (struct vmw_fence_obj **)sync_obj;
54573#line 311
54574  vmw_fence_obj_unreference(__cil_tmp2);
54575  }
54576#line 312
54577  return;
54578}
54579}
54580#line 314 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54581static int vmw_sync_obj_flush(void *sync_obj , void *sync_arg ) 
54582{ struct vmw_fence_obj *__cil_tmp3 ;
54583
54584  {
54585  {
54586#line 316
54587  __cil_tmp3 = (struct vmw_fence_obj *)sync_obj;
54588#line 316
54589  vmw_fence_obj_flush(__cil_tmp3);
54590  }
54591#line 317
54592  return (0);
54593}
54594}
54595#line 320 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54596static bool vmw_sync_obj_signaled(void *sync_obj , void *sync_arg ) 
54597{ unsigned long flags ;
54598  bool tmp___7 ;
54599  struct vmw_fence_obj *__cil_tmp5 ;
54600  uint32_t __cil_tmp6 ;
54601
54602  {
54603  {
54604#line 322
54605  flags = (unsigned long )sync_arg;
54606#line 323
54607  __cil_tmp5 = (struct vmw_fence_obj *)sync_obj;
54608#line 323
54609  __cil_tmp6 = (uint32_t )flags;
54610#line 323
54611  tmp___7 = vmw_fence_obj_signaled(__cil_tmp5, __cil_tmp6);
54612  }
54613#line 323
54614  return (tmp___7);
54615}
54616}
54617#line 328 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54618static int vmw_sync_obj_wait(void *sync_obj , void *sync_arg , bool lazy , bool interruptible ) 
54619{ unsigned long flags ;
54620  int tmp___7 ;
54621  struct vmw_fence_obj *__cil_tmp7 ;
54622  uint32_t __cil_tmp8 ;
54623
54624  {
54625  {
54626#line 331
54627  flags = (unsigned long )sync_arg;
54628#line 333
54629  __cil_tmp7 = (struct vmw_fence_obj *)sync_obj;
54630#line 333
54631  __cil_tmp8 = (uint32_t )flags;
54632#line 333
54633  tmp___7 = vmw_fence_obj_wait(__cil_tmp7, __cil_tmp8, lazy, interruptible, 1250UL);
54634  }
54635#line 333
54636  return (tmp___7);
54637}
54638}
54639#line 339 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54640struct ttm_bo_driver vmw_bo_driver  = 
54641#line 339
54642     {& vmw_ttm_tt_create, & ttm_pool_populate, & ttm_pool_unpopulate, & vmw_invalidate_caches,
54643    & vmw_init_mem_type, & vmw_evict_flags, (int (*)(struct ttm_buffer_object *bo ,
54644                                                     bool evict , bool interruptible ,
54645                                                     bool no_wait_reserve , bool no_wait_gpu ,
54646                                                     struct ttm_mem_reg *new_mem ))((void *)0),
54647    & vmw_verify_access, & vmw_sync_obj_signaled, & vmw_sync_obj_wait, & vmw_sync_obj_flush,
54648    & vmw_sync_obj_unref, & vmw_sync_obj_ref, (void (*)(struct ttm_buffer_object *bo ,
54649                                                        struct ttm_mem_reg *new_mem ))((void *)0),
54650    & vmw_ttm_fault_reserve_notify, (void (*)(struct ttm_buffer_object *bo ))((void *)0),
54651    & vmw_ttm_io_mem_reserve, & vmw_ttm_io_mem_free};
54652#line 391 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c"
54653void ldv_main7_sequence_infinite_withcheck_stateful(void) 
54654{ struct ttm_tt *var_group1 ;
54655  struct ttm_mem_reg *var_group2 ;
54656  struct ttm_bo_device *var_group3 ;
54657  uint32_t var_vmw_invalidate_caches_4_p1 ;
54658  uint32_t var_vmw_init_mem_type_5_p1 ;
54659  struct ttm_mem_type_manager *var_vmw_init_mem_type_5_p2 ;
54660  struct ttm_buffer_object *var_group4 ;
54661  struct ttm_placement *var_group5 ;
54662  struct file *var_group6 ;
54663  void *var_vmw_sync_obj_signaled_14_p0 ;
54664  void *var_vmw_sync_obj_signaled_14_p1 ;
54665  void *var_vmw_sync_obj_wait_15_p0 ;
54666  void *var_vmw_sync_obj_wait_15_p1 ;
54667  bool var_vmw_sync_obj_wait_15_p2 ;
54668  bool var_vmw_sync_obj_wait_15_p3 ;
54669  void *var_vmw_sync_obj_flush_13_p0 ;
54670  void *var_vmw_sync_obj_flush_13_p1 ;
54671  void **var_vmw_sync_obj_unref_12_p0 ;
54672  void *var_vmw_sync_obj_ref_11_p0 ;
54673  int tmp___7 ;
54674  int tmp___8 ;
54675
54676  {
54677  {
54678#line 469
54679  LDV_IN_INTERRUPT = 1;
54680#line 478
54681  ldv_initialize();
54682  }
54683  {
54684#line 484
54685  while (1) {
54686    while_continue: /* CIL Label */ ;
54687    {
54688#line 484
54689    tmp___8 = __VERIFIER_nondet_int();
54690    }
54691#line 484
54692    if (tmp___8) {
54693
54694    } else {
54695#line 484
54696      goto while_break;
54697    }
54698    {
54699#line 487
54700    tmp___7 = __VERIFIER_nondet_int();
54701    }
54702#line 489
54703    if (tmp___7 == 0) {
54704#line 489
54705      goto case_0;
54706    } else
54707#line 505
54708    if (tmp___7 == 1) {
54709#line 505
54710      goto case_1;
54711    } else
54712#line 521
54713    if (tmp___7 == 2) {
54714#line 521
54715      goto case_2;
54716    } else
54717#line 537
54718    if (tmp___7 == 3) {
54719#line 537
54720      goto case_3;
54721    } else
54722#line 553
54723    if (tmp___7 == 4) {
54724#line 553
54725      goto case_4;
54726    } else
54727#line 569
54728    if (tmp___7 == 5) {
54729#line 569
54730      goto case_5;
54731    } else
54732#line 585
54733    if (tmp___7 == 6) {
54734#line 585
54735      goto case_6;
54736    } else
54737#line 601
54738    if (tmp___7 == 7) {
54739#line 601
54740      goto case_7;
54741    } else
54742#line 617
54743    if (tmp___7 == 8) {
54744#line 617
54745      goto case_8;
54746    } else
54747#line 633
54748    if (tmp___7 == 9) {
54749#line 633
54750      goto case_9;
54751    } else
54752#line 649
54753    if (tmp___7 == 10) {
54754#line 649
54755      goto case_10;
54756    } else
54757#line 665
54758    if (tmp___7 == 11) {
54759#line 665
54760      goto case_11;
54761    } else {
54762      {
54763#line 681
54764      goto switch_default;
54765#line 487
54766      if (0) {
54767        case_0: /* CIL Label */ 
54768        {
54769#line 497
54770        vmw_ttm_bind(var_group1, var_group2);
54771        }
54772#line 504
54773        goto switch_break;
54774        case_1: /* CIL Label */ 
54775        {
54776#line 513
54777        vmw_ttm_unbind(var_group1);
54778        }
54779#line 520
54780        goto switch_break;
54781        case_2: /* CIL Label */ 
54782        {
54783#line 529
54784        vmw_ttm_destroy(var_group1);
54785        }
54786#line 536
54787        goto switch_break;
54788        case_3: /* CIL Label */ 
54789        {
54790#line 545
54791        vmw_invalidate_caches(var_group3, var_vmw_invalidate_caches_4_p1);
54792        }
54793#line 552
54794        goto switch_break;
54795        case_4: /* CIL Label */ 
54796        {
54797#line 561
54798        vmw_init_mem_type(var_group3, var_vmw_init_mem_type_5_p1, var_vmw_init_mem_type_5_p2);
54799        }
54800#line 568
54801        goto switch_break;
54802        case_5: /* CIL Label */ 
54803        {
54804#line 577
54805        vmw_evict_flags(var_group4, var_group5);
54806        }
54807#line 584
54808        goto switch_break;
54809        case_6: /* CIL Label */ 
54810        {
54811#line 593
54812        vmw_verify_access(var_group4, var_group6);
54813        }
54814#line 600
54815        goto switch_break;
54816        case_7: /* CIL Label */ 
54817        {
54818#line 609
54819        vmw_sync_obj_signaled(var_vmw_sync_obj_signaled_14_p0, var_vmw_sync_obj_signaled_14_p1);
54820        }
54821#line 616
54822        goto switch_break;
54823        case_8: /* CIL Label */ 
54824        {
54825#line 625
54826        vmw_sync_obj_wait(var_vmw_sync_obj_wait_15_p0, var_vmw_sync_obj_wait_15_p1,
54827                          var_vmw_sync_obj_wait_15_p2, var_vmw_sync_obj_wait_15_p3);
54828        }
54829#line 632
54830        goto switch_break;
54831        case_9: /* CIL Label */ 
54832        {
54833#line 641
54834        vmw_sync_obj_flush(var_vmw_sync_obj_flush_13_p0, var_vmw_sync_obj_flush_13_p1);
54835        }
54836#line 648
54837        goto switch_break;
54838        case_10: /* CIL Label */ 
54839        {
54840#line 657
54841        vmw_sync_obj_unref(var_vmw_sync_obj_unref_12_p0);
54842        }
54843#line 664
54844        goto switch_break;
54845        case_11: /* CIL Label */ 
54846        {
54847#line 673
54848        vmw_sync_obj_ref(var_vmw_sync_obj_ref_11_p0);
54849        }
54850#line 680
54851        goto switch_break;
54852        switch_default: /* CIL Label */ 
54853#line 681
54854        goto switch_break;
54855      } else {
54856        switch_break: /* CIL Label */ ;
54857      }
54858      }
54859    }
54860  }
54861  while_break: /* CIL Label */ ;
54862  }
54863  {
54864#line 690
54865  ldv_check_final_state();
54866  }
54867#line 693
54868  return;
54869}
54870}
54871#line 315 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/bitops.h"
54872__inline static int variable_test_bit(int nr , unsigned long  volatile   *addr )  __attribute__((__no_instrument_function__)) ;
54873#line 315 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/bitops.h"
54874__inline static int variable_test_bit(int nr , unsigned long  volatile   *addr ) 
54875{ int oldbit ;
54876  unsigned long *__cil_tmp4 ;
54877
54878  {
54879#line 319
54880  __cil_tmp4 = (unsigned long *)addr;
54881#line 319
54882  __asm__  volatile   ("bt %2,%1\n\t"
54883                       "sbb %0,%0": "=r" (oldbit): "m" (*__cil_tmp4), "Ir" (nr));
54884#line 324
54885  return (oldbit);
54886}
54887}
54888#line 10 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/current.h"
54889extern struct task_struct *current_task  __attribute__((__section__(".data..percpu"))) ;
54890#line 12
54891__inline static struct task_struct *( __attribute__((__always_inline__)) get_current)(void)  __attribute__((__no_instrument_function__)) ;
54892#line 12 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/current.h"
54893__inline static struct task_struct *( __attribute__((__always_inline__)) get_current)(void) 
54894{ struct task_struct *pfo_ret__ ;
54895
54896  {
54897#line 14
54898  if ((int )8UL == 1) {
54899#line 14
54900    goto case_1;
54901  } else
54902#line 14
54903  if ((int )8UL == 2) {
54904#line 14
54905    goto case_2;
54906  } else
54907#line 14
54908  if ((int )8UL == 4) {
54909#line 14
54910    goto case_4;
54911  } else
54912#line 14
54913  if ((int )8UL == 8) {
54914#line 14
54915    goto case_8;
54916  } else {
54917    {
54918#line 14
54919    goto switch_default;
54920#line 14
54921    if (0) {
54922      case_1: /* CIL Label */ 
54923#line 14
54924      __asm__  ("mov"
54925                "b "
54926                "%%"
54927                "gs"
54928                ":"
54929                "%P"
54930                "1"
54931                ",%0": "=q" (pfo_ret__): "p" (& current_task));
54932#line 14
54933      goto switch_break;
54934      case_2: /* CIL Label */ 
54935#line 14
54936      __asm__  ("mov"
54937                "w "
54938                "%%"
54939                "gs"
54940                ":"
54941                "%P"
54942                "1"
54943                ",%0": "=r" (pfo_ret__): "p" (& current_task));
54944#line 14
54945      goto switch_break;
54946      case_4: /* CIL Label */ 
54947#line 14
54948      __asm__  ("mov"
54949                "l "
54950                "%%"
54951                "gs"
54952                ":"
54953                "%P"
54954                "1"
54955                ",%0": "=r" (pfo_ret__): "p" (& current_task));
54956#line 14
54957      goto switch_break;
54958      case_8: /* CIL Label */ 
54959#line 14
54960      __asm__  ("mov"
54961                "q "
54962                "%%"
54963                "gs"
54964                ":"
54965                "%P"
54966                "1"
54967                ",%0": "=r" (pfo_ret__): "p" (& current_task));
54968#line 14
54969      goto switch_break;
54970      switch_default: /* CIL Label */ 
54971      {
54972#line 14
54973      __bad_percpu_size();
54974      }
54975    } else {
54976      switch_break: /* CIL Label */ ;
54977    }
54978    }
54979  }
54980#line 14
54981  return (pfo_ret__);
54982}
54983}
54984#line 15 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/cmpxchg.h"
54985extern void __xadd_wrong_size(void) ;
54986#line 119 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
54987__inline static int atomic_dec_and_test(atomic_t *v )  __attribute__((__no_instrument_function__)) ;
54988#line 119 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
54989__inline static int atomic_dec_and_test(atomic_t *v ) 
54990{ unsigned char c ;
54991  int __cil_tmp3 ;
54992
54993  {
54994#line 123
54995  __asm__  volatile   (".section .smp_locks,\"a\"\n"
54996                       ".balign 4\n"
54997                       ".long 671f - .\n"
54998                       ".previous\n"
54999                       "671:"
55000                       "\n\tlock; "
55001                       "decl %0; sete %1": "+m" (*((int *)v)), "=qm" (c): : "memory");
55002  {
55003#line 126
55004  __cil_tmp3 = (int )c;
55005#line 126
55006  return (__cil_tmp3 != 0);
55007  }
55008}
55009}
55010#line 173
55011__inline static int atomic_add_return(int i , atomic_t *v )  __attribute__((__no_instrument_function__)) ;
55012#line 173 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/atomic.h"
55013__inline static int atomic_add_return(int i , atomic_t *v ) 
55014{ int __ret ;
55015
55016  {
55017#line 182
55018  __ret = i;
55019#line 182
55020  if ((int )4UL == 1) {
55021#line 182
55022    goto case_1;
55023  } else
55024#line 182
55025  if ((int )4UL == 2) {
55026#line 182
55027    goto case_2;
55028  } else
55029#line 182
55030  if ((int )4UL == 4) {
55031#line 182
55032    goto case_4;
55033  } else
55034#line 182
55035  if ((int )4UL == 8) {
55036#line 182
55037    goto case_8;
55038  } else {
55039    {
55040#line 182
55041    goto switch_default;
55042#line 182
55043    if (0) {
55044      case_1: /* CIL Label */ 
55045#line 182
55046      __asm__  volatile   (".section .smp_locks,\"a\"\n"
55047                           ".balign 4\n"
55048                           ".long 671f - .\n"
55049                           ".previous\n"
55050                           "671:"
55051                           "\n\tlock; "
55052                           "xadd"
55053                           "b %b0, %1\n": "+q" (__ret), "+m" (*((int *)v)): : "memory",
55054                           "cc");
55055#line 182
55056      goto switch_break;
55057      case_2: /* CIL Label */ 
55058#line 182
55059      __asm__  volatile   (".section .smp_locks,\"a\"\n"
55060                           ".balign 4\n"
55061                           ".long 671f - .\n"
55062                           ".previous\n"
55063                           "671:"
55064                           "\n\tlock; "
55065                           "xadd"
55066                           "w %w0, %1\n": "+r" (__ret), "+m" (*((int *)v)): : "memory",
55067                           "cc");
55068#line 182
55069      goto switch_break;
55070      case_4: /* CIL Label */ 
55071#line 182
55072      __asm__  volatile   (".section .smp_locks,\"a\"\n"
55073                           ".balign 4\n"
55074                           ".long 671f - .\n"
55075                           ".previous\n"
55076                           "671:"
55077                           "\n\tlock; "
55078                           "xadd"
55079                           "l %0, %1\n": "+r" (__ret), "+m" (*((int *)v)): : "memory",
55080                           "cc");
55081#line 182
55082      goto switch_break;
55083      case_8: /* CIL Label */ 
55084#line 182
55085      __asm__  volatile   (".section .smp_locks,\"a\"\n"
55086                           ".balign 4\n"
55087                           ".long 671f - .\n"
55088                           ".previous\n"
55089                           "671:"
55090                           "\n\tlock; "
55091                           "xadd"
55092                           "q %q0, %1\n": "+r" (__ret), "+m" (*((int *)v)): : "memory",
55093                           "cc");
55094#line 182
55095      goto switch_break;
55096      switch_default: /* CIL Label */ 
55097      {
55098#line 182
55099      __xadd_wrong_size();
55100      }
55101    } else {
55102      switch_break: /* CIL Label */ ;
55103    }
55104    }
55105  }
55106#line 182
55107  return (i + __ret);
55108}
55109}
55110#line 82 "include/linux/thread_info.h"
55111__inline static int test_ti_thread_flag(struct thread_info *ti , int flag )  __attribute__((__no_instrument_function__)) ;
55112#line 82 "include/linux/thread_info.h"
55113__inline static int test_ti_thread_flag(struct thread_info *ti , int flag ) 
55114{ int tmp___0 ;
55115  unsigned long __cil_tmp5 ;
55116  unsigned long __cil_tmp6 ;
55117  __u32 *__cil_tmp7 ;
55118  unsigned long *__cil_tmp8 ;
55119  unsigned long  volatile   *__cil_tmp9 ;
55120
55121  {
55122  {
55123#line 84
55124  __cil_tmp5 = (unsigned long )ti;
55125#line 84
55126  __cil_tmp6 = __cil_tmp5 + 16;
55127#line 84
55128  __cil_tmp7 = (__u32 *)__cil_tmp6;
55129#line 84
55130  __cil_tmp8 = (unsigned long *)__cil_tmp7;
55131#line 84
55132  __cil_tmp9 = (unsigned long  volatile   *)__cil_tmp8;
55133#line 84
55134  tmp___0 = variable_test_bit(flag, __cil_tmp9);
55135  }
55136#line 84
55137  return (tmp___0);
55138}
55139}
55140#line 155 "include/linux/wait.h"
55141extern void __wake_up(wait_queue_head_t *q , unsigned int mode , int nr , void *key ) ;
55142#line 584
55143extern void prepare_to_wait(wait_queue_head_t *q , wait_queue_t *wait , int state ) ;
55144#line 586
55145extern void finish_wait(wait_queue_head_t *q , wait_queue_t *wait ) ;
55146#line 589
55147extern int autoremove_wake_function(wait_queue_t *wait , unsigned int mode , int sync ,
55148                                    void *key ) ;
55149#line 67 "include/linux/rwsem.h"
55150extern void __init_rwsem(struct rw_semaphore *sem , char    *name , struct lock_class_key *key ) ;
55151#line 90
55152extern void down_write(struct rw_semaphore *sem ) ;
55153#line 105
55154extern void up_write(struct rw_semaphore *sem ) ;
55155#line 82 "include/linux/jiffies.h"
55156extern unsigned long volatile   jiffies  __attribute__((__section__(".data"))) ;
55157#line 214 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
55158__inline static void memcpy_toio(void volatile   *dst , void    *src , size_t count )  __attribute__((__no_instrument_function__)) ;
55159#line 214 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/arch/x86/include/asm/io.h"
55160__inline static void memcpy_toio(void volatile   *dst , void    *src , size_t count ) 
55161{ size_t __len ;
55162  void *__ret ;
55163  void *__cil_tmp6 ;
55164
55165  {
55166  {
55167#line 217
55168  __len = count;
55169#line 217
55170  __cil_tmp6 = (void *)dst;
55171#line 217
55172  __ret = __builtin_memcpy(__cil_tmp6, src, __len);
55173  }
55174#line 218
55175  return;
55176}
55177}
55178#line 358 "include/linux/sched.h"
55179extern long schedule_timeout(long timeout ) ;
55180#line 2563
55181__inline static int test_tsk_thread_flag(struct task_struct *tsk , int flag )  __attribute__((__no_instrument_function__)) ;
55182#line 2563 "include/linux/sched.h"
55183__inline static int test_tsk_thread_flag(struct task_struct *tsk , int flag ) 
55184{ int tmp___7 ;
55185  unsigned long __cil_tmp4 ;
55186  unsigned long __cil_tmp5 ;
55187  void *__cil_tmp6 ;
55188  struct thread_info *__cil_tmp7 ;
55189
55190  {
55191  {
55192#line 2565
55193  __cil_tmp4 = (unsigned long )tsk;
55194#line 2565
55195  __cil_tmp5 = __cil_tmp4 + 8;
55196#line 2565
55197  __cil_tmp6 = *((void **)__cil_tmp5);
55198#line 2565
55199  __cil_tmp7 = (struct thread_info *)__cil_tmp6;
55200#line 2565
55201  tmp___7 = test_ti_thread_flag(__cil_tmp7, flag);
55202  }
55203#line 2565
55204  return (tmp___7);
55205}
55206}
55207#line 2589
55208__inline static int signal_pending(struct task_struct *p )  __attribute__((__no_instrument_function__)) ;
55209#line 2589 "include/linux/sched.h"
55210__inline static int signal_pending(struct task_struct *p ) 
55211{ int tmp___7 ;
55212  int tmp___8 ;
55213  long tmp___9 ;
55214  long __cil_tmp5 ;
55215
55216  {
55217  {
55218#line 2591
55219  tmp___7 = test_tsk_thread_flag(p, 2);
55220  }
55221#line 2591
55222  if (tmp___7) {
55223#line 2591
55224    tmp___8 = 1;
55225  } else {
55226#line 2591
55227    tmp___8 = 0;
55228  }
55229  {
55230#line 2591
55231  __cil_tmp5 = (long )tmp___8;
55232#line 2591
55233  tmp___9 = __builtin_expect(__cil_tmp5, 0L);
55234  }
55235#line 2591
55236  return ((int )tmp___9);
55237}
55238}
55239#line 589 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
55240void vmw_marker_queue_init(struct vmw_marker_queue *queue ) ;
55241#line 590
55242void vmw_marker_queue_takedown(struct vmw_marker_queue *queue ) ;
55243#line 591
55244int vmw_marker_push(struct vmw_marker_queue *queue , uint32_t seqno ) ;
55245#line 32 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55246bool vmw_fifo_have_3d(struct vmw_private *dev_priv ) 
55247{ __le32 *fifo_mem ;
55248  uint32_t fifo_min ;
55249  uint32_t hwversion ;
55250  struct vmw_fifo_state    *fifo ;
55251  int tmp___7 ;
55252  unsigned long __cil_tmp7 ;
55253  unsigned long __cil_tmp8 ;
55254  unsigned long __cil_tmp9 ;
55255  unsigned long __cil_tmp10 ;
55256  struct vmw_fifo_state *__cil_tmp11 ;
55257  unsigned long __cil_tmp12 ;
55258  unsigned long __cil_tmp13 ;
55259  uint32_t __cil_tmp14 ;
55260  unsigned int __cil_tmp15 ;
55261  __le32 *__cil_tmp16 ;
55262  void *__cil_tmp17 ;
55263  unsigned long __cil_tmp18 ;
55264  unsigned long __cil_tmp19 ;
55265  int __cil_tmp20 ;
55266  unsigned int    __cil_tmp21 ;
55267  unsigned long __cil_tmp22 ;
55268  unsigned long __cil_tmp23 ;
55269  uint32_t    __cil_tmp24 ;
55270  __le32 *__cil_tmp25 ;
55271  void *__cil_tmp26 ;
55272  unsigned long __cil_tmp27 ;
55273  unsigned long __cil_tmp28 ;
55274  struct vmw_screen_object_display *__cil_tmp29 ;
55275
55276  {
55277#line 34
55278  __cil_tmp7 = (unsigned long )dev_priv;
55279#line 34
55280  __cil_tmp8 = __cil_tmp7 + 2144;
55281#line 34
55282  fifo_mem = *((__le32 **)__cil_tmp8);
55283#line 36
55284  __cil_tmp9 = (unsigned long )dev_priv;
55285#line 36
55286  __cil_tmp10 = __cil_tmp9 + 1856;
55287#line 36
55288  __cil_tmp11 = (struct vmw_fifo_state *)__cil_tmp10;
55289#line 36
55290  fifo = (struct vmw_fifo_state    *)__cil_tmp11;
55291  {
55292#line 38
55293  __cil_tmp12 = (unsigned long )dev_priv;
55294#line 38
55295  __cil_tmp13 = __cil_tmp12 + 2156;
55296#line 38
55297  __cil_tmp14 = *((uint32_t *)__cil_tmp13);
55298#line 38
55299  __cil_tmp15 = __cil_tmp14 & 32768U;
55300#line 38
55301  if (! __cil_tmp15) {
55302#line 39
55303    return ((bool )0);
55304  } else {
55305
55306  }
55307  }
55308  {
55309#line 41
55310  __cil_tmp16 = fifo_mem + 0;
55311#line 41
55312  __cil_tmp17 = (void *)__cil_tmp16;
55313#line 41
55314  fifo_min = ioread32(__cil_tmp17);
55315  }
55316  {
55317#line 42
55318  __cil_tmp18 = 7UL * 4UL;
55319#line 42
55320  __cil_tmp19 = (unsigned long )fifo_min;
55321#line 42
55322  if (__cil_tmp19 <= __cil_tmp18) {
55323#line 43
55324    return ((bool )0);
55325  } else {
55326
55327  }
55328  }
55329  {
55330#line 45
55331  __cil_tmp20 = 1 << 8;
55332#line 45
55333  __cil_tmp21 = (unsigned int    )__cil_tmp20;
55334#line 45
55335  __cil_tmp22 = (unsigned long )fifo;
55336#line 45
55337  __cil_tmp23 = __cil_tmp22 + 36;
55338#line 45
55339  __cil_tmp24 = *((uint32_t    *)__cil_tmp23);
55340#line 45
55341  if (__cil_tmp24 & __cil_tmp21) {
55342#line 45
55343    tmp___7 = 17;
55344  } else {
55345#line 45
55346    tmp___7 = 7;
55347  }
55348  }
55349  {
55350#line 45
55351  __cil_tmp25 = fifo_mem + tmp___7;
55352#line 45
55353  __cil_tmp26 = (void *)__cil_tmp25;
55354#line 45
55355  hwversion = ioread32(__cil_tmp26);
55356  }
55357#line 51
55358  if (hwversion == 0U) {
55359#line 52
55360    return ((bool )0);
55361  } else {
55362
55363  }
55364#line 54
55365  if (hwversion < 131073U) {
55366#line 55
55367    return ((bool )0);
55368  } else {
55369
55370  }
55371  {
55372#line 58
55373  __cil_tmp27 = (unsigned long )dev_priv;
55374#line 58
55375  __cil_tmp28 = __cil_tmp27 + 2616;
55376#line 58
55377  __cil_tmp29 = *((struct vmw_screen_object_display **)__cil_tmp28);
55378#line 58
55379  if (! __cil_tmp29) {
55380#line 59
55381    return ((bool )0);
55382  } else {
55383
55384  }
55385  }
55386#line 61
55387  return ((bool )1);
55388}
55389}
55390#line 64 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55391bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv ) 
55392{ __le32 *fifo_mem ;
55393  uint32_t caps ;
55394  unsigned long __cil_tmp4 ;
55395  unsigned long __cil_tmp5 ;
55396  unsigned long __cil_tmp6 ;
55397  unsigned long __cil_tmp7 ;
55398  uint32_t __cil_tmp8 ;
55399  unsigned int __cil_tmp9 ;
55400  __le32 *__cil_tmp10 ;
55401  void *__cil_tmp11 ;
55402  int __cil_tmp12 ;
55403  unsigned int __cil_tmp13 ;
55404
55405  {
55406#line 66
55407  __cil_tmp4 = (unsigned long )dev_priv;
55408#line 66
55409  __cil_tmp5 = __cil_tmp4 + 2144;
55410#line 66
55411  fifo_mem = *((__le32 **)__cil_tmp5);
55412  {
55413#line 69
55414  __cil_tmp6 = (unsigned long )dev_priv;
55415#line 69
55416  __cil_tmp7 = __cil_tmp6 + 2156;
55417#line 69
55418  __cil_tmp8 = *((uint32_t *)__cil_tmp7);
55419#line 69
55420  __cil_tmp9 = __cil_tmp8 & 32768U;
55421#line 69
55422  if (! __cil_tmp9) {
55423#line 70
55424    return ((bool )0);
55425  } else {
55426
55427  }
55428  }
55429  {
55430#line 72
55431  __cil_tmp10 = fifo_mem + 4;
55432#line 72
55433  __cil_tmp11 = (void *)__cil_tmp10;
55434#line 72
55435  caps = ioread32(__cil_tmp11);
55436  }
55437  {
55438#line 73
55439  __cil_tmp12 = 1 << 2;
55440#line 73
55441  __cil_tmp13 = (unsigned int )__cil_tmp12;
55442#line 73
55443  if (caps & __cil_tmp13) {
55444#line 74
55445    return ((bool )1);
55446  } else {
55447
55448  }
55449  }
55450#line 76
55451  return ((bool )0);
55452}
55453}
55454#line 95 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55455static struct lock_class_key __key___13  ;
55456#line 96 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55457static struct lock_class_key __key___14  ;
55458#line 79 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55459int vmw_fifo_init(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo ) 
55460{ __le32 *fifo_mem ;
55461  uint32_t max ;
55462  uint32_t min ;
55463  uint32_t dummy ;
55464  void *tmp___7 ;
55465  long tmp___8 ;
55466  uint32_t tmp___9 ;
55467  uint32_t tmp___10 ;
55468  uint32_t tmp___11 ;
55469  int tmp___12 ;
55470  unsigned long __cil_tmp13 ;
55471  unsigned long __cil_tmp14 ;
55472  unsigned long __cil_tmp15 ;
55473  unsigned long __cil_tmp16 ;
55474  unsigned long __cil_tmp17 ;
55475  unsigned long __cil_tmp18 ;
55476  unsigned long __cil_tmp19 ;
55477  unsigned long __cil_tmp20 ;
55478  unsigned long __cil_tmp21 ;
55479  void *__cil_tmp22 ;
55480  unsigned long __cil_tmp23 ;
55481  unsigned long __cil_tmp24 ;
55482  unsigned long __cil_tmp25 ;
55483  __le32 *__cil_tmp26 ;
55484  unsigned long __cil_tmp27 ;
55485  int __cil_tmp28 ;
55486  int __cil_tmp29 ;
55487  int __cil_tmp30 ;
55488  long __cil_tmp31 ;
55489  unsigned long __cil_tmp32 ;
55490  unsigned long __cil_tmp33 ;
55491  void *__cil_tmp34 ;
55492  unsigned long __cil_tmp35 ;
55493  unsigned long __cil_tmp36 ;
55494  unsigned long __cil_tmp37 ;
55495  unsigned long __cil_tmp38 ;
55496  struct mutex *__cil_tmp39 ;
55497  unsigned long __cil_tmp40 ;
55498  unsigned long __cil_tmp41 ;
55499  struct rw_semaphore *__cil_tmp42 ;
55500  unsigned long __cil_tmp43 ;
55501  unsigned long __cil_tmp44 ;
55502  struct mutex *__cil_tmp45 ;
55503  unsigned long __cil_tmp46 ;
55504  unsigned long __cil_tmp47 ;
55505  unsigned long __cil_tmp48 ;
55506  unsigned long __cil_tmp49 ;
55507  unsigned long __cil_tmp50 ;
55508  unsigned long __cil_tmp51 ;
55509  uint32_t __cil_tmp52 ;
55510  unsigned long __cil_tmp53 ;
55511  unsigned long __cil_tmp54 ;
55512  uint32_t __cil_tmp55 ;
55513  unsigned long __cil_tmp56 ;
55514  unsigned long __cil_tmp57 ;
55515  unsigned long __cil_tmp58 ;
55516  __le32 *__cil_tmp59 ;
55517  void *__cil_tmp60 ;
55518  unsigned long __cil_tmp61 ;
55519  unsigned long __cil_tmp62 ;
55520  uint32_t __cil_tmp63 ;
55521  __le32 *__cil_tmp64 ;
55522  void *__cil_tmp65 ;
55523  __le32 *__cil_tmp66 ;
55524  void *__cil_tmp67 ;
55525  __le32 *__cil_tmp68 ;
55526  void *__cil_tmp69 ;
55527  u32 __cil_tmp70 ;
55528  __le32 *__cil_tmp71 ;
55529  void *__cil_tmp72 ;
55530  uint32_t __cil_tmp73 ;
55531  unsigned long __cil_tmp74 ;
55532  unsigned long __cil_tmp75 ;
55533  struct mutex *__cil_tmp76 ;
55534  __le32 *__cil_tmp77 ;
55535  void *__cil_tmp78 ;
55536  __le32 *__cil_tmp79 ;
55537  void *__cil_tmp80 ;
55538  unsigned long __cil_tmp81 ;
55539  unsigned long __cil_tmp82 ;
55540  __le32 *__cil_tmp83 ;
55541  void *__cil_tmp84 ;
55542  unsigned long __cil_tmp85 ;
55543  unsigned long __cil_tmp86 ;
55544  uint32_t __cil_tmp87 ;
55545  unsigned long __cil_tmp88 ;
55546  unsigned long __cil_tmp89 ;
55547  atomic_t *__cil_tmp90 ;
55548  unsigned long __cil_tmp91 ;
55549  unsigned long __cil_tmp92 ;
55550  uint32_t __cil_tmp93 ;
55551  int __cil_tmp94 ;
55552  unsigned long __cil_tmp95 ;
55553  unsigned long __cil_tmp96 ;
55554  uint32_t __cil_tmp97 ;
55555  __le32 *__cil_tmp98 ;
55556  void *__cil_tmp99 ;
55557  unsigned long __cil_tmp100 ;
55558  unsigned long __cil_tmp101 ;
55559  struct vmw_marker_queue *__cil_tmp102 ;
55560
55561  {
55562  {
55563#line 81
55564  __cil_tmp13 = (unsigned long )dev_priv;
55565#line 81
55566  __cil_tmp14 = __cil_tmp13 + 2144;
55567#line 81
55568  fifo_mem = *((__le32 **)__cil_tmp14);
55569#line 86
55570  __cil_tmp15 = (unsigned long )fifo;
55571#line 86
55572  __cil_tmp16 = __cil_tmp15 + 24;
55573#line 86
55574  *((unsigned long *)__cil_tmp16) = 1048576UL;
55575#line 87
55576  __cil_tmp17 = (unsigned long )fifo;
55577#line 87
55578  __cil_tmp18 = __cil_tmp17 + 24;
55579#line 87
55580  __cil_tmp19 = *((unsigned long *)__cil_tmp18);
55581#line 87
55582  tmp___7 = vmalloc(__cil_tmp19);
55583#line 87
55584  __cil_tmp20 = (unsigned long )fifo;
55585#line 87
55586  __cil_tmp21 = __cil_tmp20 + 16;
55587#line 87
55588  *((__le32 **)__cil_tmp21) = (__le32 *)tmp___7;
55589#line 88
55590  __cil_tmp22 = (void *)0;
55591#line 88
55592  __cil_tmp23 = (unsigned long )__cil_tmp22;
55593#line 88
55594  __cil_tmp24 = (unsigned long )fifo;
55595#line 88
55596  __cil_tmp25 = __cil_tmp24 + 16;
55597#line 88
55598  __cil_tmp26 = *((__le32 **)__cil_tmp25);
55599#line 88
55600  __cil_tmp27 = (unsigned long )__cil_tmp26;
55601#line 88
55602  __cil_tmp28 = __cil_tmp27 == __cil_tmp23;
55603#line 88
55604  __cil_tmp29 = ! __cil_tmp28;
55605#line 88
55606  __cil_tmp30 = ! __cil_tmp29;
55607#line 88
55608  __cil_tmp31 = (long )__cil_tmp30;
55609#line 88
55610  tmp___8 = __builtin_expect(__cil_tmp31, 0L);
55611  }
55612#line 88
55613  if (tmp___8) {
55614#line 89
55615    return (-12);
55616  } else {
55617
55618  }
55619#line 91
55620  __cil_tmp32 = (unsigned long )fifo;
55621#line 91
55622  __cil_tmp33 = __cil_tmp32 + 8;
55623#line 91
55624  __cil_tmp34 = (void *)0;
55625#line 91
55626  *((__le32 **)__cil_tmp33) = (__le32 *)__cil_tmp34;
55627#line 92
55628  *((unsigned long *)fifo) = 0UL;
55629#line 93
55630  __cil_tmp35 = (unsigned long )fifo;
55631#line 93
55632  __cil_tmp36 = __cil_tmp35 + 32;
55633#line 93
55634  *((bool *)__cil_tmp36) = (bool )0;
55635  {
55636#line 95
55637  while (1) {
55638    while_continue: /* CIL Label */ ;
55639    {
55640#line 95
55641    __cil_tmp37 = (unsigned long )fifo;
55642#line 95
55643    __cil_tmp38 = __cil_tmp37 + 40;
55644#line 95
55645    __cil_tmp39 = (struct mutex *)__cil_tmp38;
55646#line 95
55647    __mutex_init(__cil_tmp39, "&fifo->fifo_mutex", & __key___13);
55648    }
55649#line 95
55650    goto while_break;
55651  }
55652  while_break: /* CIL Label */ ;
55653  }
55654  {
55655#line 96
55656  while (1) {
55657    while_continue___0: /* CIL Label */ ;
55658    {
55659#line 96
55660    __cil_tmp40 = (unsigned long )fifo;
55661#line 96
55662    __cil_tmp41 = __cil_tmp40 + 112;
55663#line 96
55664    __cil_tmp42 = (struct rw_semaphore *)__cil_tmp41;
55665#line 96
55666    __init_rwsem(__cil_tmp42, "&fifo->rwsem", & __key___14);
55667    }
55668#line 96
55669    goto while_break___0;
55670  }
55671  while_break___0: /* CIL Label */ ;
55672  }
55673  {
55674#line 102
55675  tmp___9 = vmw_read(dev_priv, 2U);
55676#line 102
55677  printk("<6>[drm] width %d\n", tmp___9);
55678#line 103
55679  tmp___10 = vmw_read(dev_priv, 3U);
55680#line 103
55681  printk("<6>[drm] height %d\n", tmp___10);
55682#line 104
55683  tmp___11 = vmw_read(dev_priv, 7U);
55684#line 104
55685  printk("<6>[drm] bpp %d\n", tmp___11);
55686#line 106
55687  __cil_tmp43 = (unsigned long )dev_priv;
55688#line 106
55689  __cil_tmp44 = __cil_tmp43 + 2184;
55690#line 106
55691  __cil_tmp45 = (struct mutex *)__cil_tmp44;
55692#line 106
55693  mutex_lock(__cil_tmp45);
55694#line 107
55695  __cil_tmp46 = (unsigned long )dev_priv;
55696#line 107
55697  __cil_tmp47 = __cil_tmp46 + 3024;
55698#line 107
55699  *((uint32_t *)__cil_tmp47) = vmw_read(dev_priv, 1U);
55700#line 108
55701  __cil_tmp48 = (unsigned long )dev_priv;
55702#line 108
55703  __cil_tmp49 = __cil_tmp48 + 3028;
55704#line 108
55705  *((uint32_t *)__cil_tmp49) = vmw_read(dev_priv, 20U);
55706#line 109
55707  __cil_tmp50 = (unsigned long )dev_priv;
55708#line 109
55709  __cil_tmp51 = __cil_tmp50 + 3020;
55710#line 109
55711  *((uint32_t *)__cil_tmp51) = vmw_read(dev_priv, 45U);
55712#line 110
55713  __cil_tmp52 = (uint32_t )1;
55714#line 110
55715  vmw_write(dev_priv, 1U, __cil_tmp52);
55716#line 112
55717  min = (uint32_t )4;
55718  }
55719  {
55720#line 113
55721  __cil_tmp53 = (unsigned long )dev_priv;
55722#line 113
55723  __cil_tmp54 = __cil_tmp53 + 2156;
55724#line 113
55725  __cil_tmp55 = *((uint32_t *)__cil_tmp54);
55726#line 113
55727  if (__cil_tmp55 & 32768U) {
55728    {
55729#line 114
55730    min = vmw_read(dev_priv, 30U);
55731    }
55732  } else {
55733
55734  }
55735  }
55736#line 115
55737  min = min << 2;
55738  {
55739#line 117
55740  __cil_tmp56 = 1UL << 12;
55741#line 117
55742  __cil_tmp57 = (unsigned long )min;
55743#line 117
55744  if (__cil_tmp57 < __cil_tmp56) {
55745#line 118
55746    __cil_tmp58 = 1UL << 12;
55747#line 118
55748    min = (uint32_t )__cil_tmp58;
55749  } else {
55750
55751  }
55752  }
55753  {
55754#line 120
55755  __cil_tmp59 = fifo_mem + 0;
55756#line 120
55757  __cil_tmp60 = (void *)__cil_tmp59;
55758#line 120
55759  iowrite32(min, __cil_tmp60);
55760#line 121
55761  __cil_tmp61 = (unsigned long )dev_priv;
55762#line 121
55763  __cil_tmp62 = __cil_tmp61 + 2120;
55764#line 121
55765  __cil_tmp63 = *((uint32_t *)__cil_tmp62);
55766#line 121
55767  __cil_tmp64 = fifo_mem + 1;
55768#line 121
55769  __cil_tmp65 = (void *)__cil_tmp64;
55770#line 121
55771  iowrite32(__cil_tmp63, __cil_tmp65);
55772#line 122
55773  __asm__  volatile   ("sfence": : : "memory");
55774#line 123
55775  __cil_tmp66 = fifo_mem + 2;
55776#line 123
55777  __cil_tmp67 = (void *)__cil_tmp66;
55778#line 123
55779  iowrite32(min, __cil_tmp67);
55780#line 124
55781  __cil_tmp68 = fifo_mem + 3;
55782#line 124
55783  __cil_tmp69 = (void *)__cil_tmp68;
55784#line 124
55785  iowrite32(min, __cil_tmp69);
55786#line 125
55787  __cil_tmp70 = (u32 )0;
55788#line 125
55789  __cil_tmp71 = fifo_mem + 290;
55790#line 125
55791  __cil_tmp72 = (void *)__cil_tmp71;
55792#line 125
55793  iowrite32(__cil_tmp70, __cil_tmp72);
55794#line 126
55795  __asm__  volatile   ("mfence": : : "memory");
55796#line 128
55797  __cil_tmp73 = (uint32_t )1;
55798#line 128
55799  vmw_write(dev_priv, 20U, __cil_tmp73);
55800#line 129
55801  __cil_tmp74 = (unsigned long )dev_priv;
55802#line 129
55803  __cil_tmp75 = __cil_tmp74 + 2184;
55804#line 129
55805  __cil_tmp76 = (struct mutex *)__cil_tmp75;
55806#line 129
55807  mutex_unlock(__cil_tmp76);
55808#line 131
55809  __cil_tmp77 = fifo_mem + 1;
55810#line 131
55811  __cil_tmp78 = (void *)__cil_tmp77;
55812#line 131
55813  max = ioread32(__cil_tmp78);
55814#line 132
55815  __cil_tmp79 = fifo_mem + 0;
55816#line 132
55817  __cil_tmp80 = (void *)__cil_tmp79;
55818#line 132
55819  min = ioread32(__cil_tmp80);
55820#line 133
55821  __cil_tmp81 = (unsigned long )fifo;
55822#line 133
55823  __cil_tmp82 = __cil_tmp81 + 36;
55824#line 133
55825  __cil_tmp83 = fifo_mem + 4;
55826#line 133
55827  __cil_tmp84 = (void *)__cil_tmp83;
55828#line 133
55829  *((uint32_t *)__cil_tmp82) = ioread32(__cil_tmp84);
55830#line 135
55831  __cil_tmp85 = (unsigned long )fifo;
55832#line 135
55833  __cil_tmp86 = __cil_tmp85 + 36;
55834#line 135
55835  __cil_tmp87 = *((uint32_t *)__cil_tmp86);
55836#line 135
55837  printk("<6>[drm] Fifo max 0x%08x min 0x%08x cap 0x%08x\n", max, min, __cil_tmp87);
55838#line 140
55839  __cil_tmp88 = (unsigned long )dev_priv;
55840#line 140
55841  __cil_tmp89 = __cil_tmp88 + 2880;
55842#line 140
55843  __cil_tmp90 = (atomic_t *)__cil_tmp89;
55844#line 140
55845  __cil_tmp91 = (unsigned long )dev_priv;
55846#line 140
55847  __cil_tmp92 = __cil_tmp91 + 2980;
55848#line 140
55849  __cil_tmp93 = *((uint32_t *)__cil_tmp92);
55850#line 140
55851  __cil_tmp94 = (int )__cil_tmp93;
55852#line 140
55853  atomic_set(__cil_tmp90, __cil_tmp94);
55854#line 141
55855  __cil_tmp95 = (unsigned long )dev_priv;
55856#line 141
55857  __cil_tmp96 = __cil_tmp95 + 2980;
55858#line 141
55859  __cil_tmp97 = *((uint32_t *)__cil_tmp96);
55860#line 141
55861  __cil_tmp98 = fifo_mem + 6;
55862#line 141
55863  __cil_tmp99 = (void *)__cil_tmp98;
55864#line 141
55865  iowrite32(__cil_tmp97, __cil_tmp99);
55866#line 142
55867  __cil_tmp100 = (unsigned long )fifo;
55868#line 142
55869  __cil_tmp101 = __cil_tmp100 + 160;
55870#line 142
55871  __cil_tmp102 = (struct vmw_marker_queue *)__cil_tmp101;
55872#line 142
55873  vmw_marker_queue_init(__cil_tmp102);
55874#line 143
55875  tmp___12 = vmw_fifo_send_fence(dev_priv, & dummy);
55876  }
55877#line 143
55878  return (tmp___12);
55879}
55880}
55881#line 146 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55882void vmw_fifo_ping_host(struct vmw_private *dev_priv , uint32_t reason ) 
55883{ __le32 *fifo_mem ;
55884  unsigned int tmp___7 ;
55885  int tmp___8 ;
55886  long tmp___9 ;
55887  unsigned long __cil_tmp7 ;
55888  unsigned long __cil_tmp8 ;
55889  unsigned long __cil_tmp9 ;
55890  unsigned long __cil_tmp10 ;
55891  struct mutex *__cil_tmp11 ;
55892  __le32 *__cil_tmp12 ;
55893  void *__cil_tmp13 ;
55894  long __cil_tmp14 ;
55895  u32 __cil_tmp15 ;
55896  __le32 *__cil_tmp16 ;
55897  void *__cil_tmp17 ;
55898  unsigned long __cil_tmp18 ;
55899  unsigned long __cil_tmp19 ;
55900  struct mutex *__cil_tmp20 ;
55901
55902  {
55903  {
55904#line 148
55905  __cil_tmp7 = (unsigned long )dev_priv;
55906#line 148
55907  __cil_tmp8 = __cil_tmp7 + 2144;
55908#line 148
55909  fifo_mem = *((__le32 **)__cil_tmp8);
55910#line 150
55911  __cil_tmp9 = (unsigned long )dev_priv;
55912#line 150
55913  __cil_tmp10 = __cil_tmp9 + 2184;
55914#line 150
55915  __cil_tmp11 = (struct mutex *)__cil_tmp10;
55916#line 150
55917  mutex_lock(__cil_tmp11);
55918#line 152
55919  __cil_tmp12 = fifo_mem + 290;
55920#line 152
55921  __cil_tmp13 = (void *)__cil_tmp12;
55922#line 152
55923  tmp___7 = ioread32(__cil_tmp13);
55924  }
55925#line 152
55926  if (tmp___7 == 0U) {
55927#line 152
55928    tmp___8 = 1;
55929  } else {
55930#line 152
55931    tmp___8 = 0;
55932  }
55933  {
55934#line 152
55935  __cil_tmp14 = (long )tmp___8;
55936#line 152
55937  tmp___9 = __builtin_expect(__cil_tmp14, 0L);
55938  }
55939#line 152
55940  if (tmp___9) {
55941    {
55942#line 153
55943    __cil_tmp15 = (u32 )1;
55944#line 153
55945    __cil_tmp16 = fifo_mem + 290;
55946#line 153
55947    __cil_tmp17 = (void *)__cil_tmp16;
55948#line 153
55949    iowrite32(__cil_tmp15, __cil_tmp17);
55950#line 154
55951    vmw_write(dev_priv, 21U, reason);
55952    }
55953  } else {
55954
55955  }
55956  {
55957#line 157
55958  __cil_tmp18 = (unsigned long )dev_priv;
55959#line 157
55960  __cil_tmp19 = __cil_tmp18 + 2184;
55961#line 157
55962  __cil_tmp20 = (struct mutex *)__cil_tmp19;
55963#line 157
55964  mutex_unlock(__cil_tmp20);
55965  }
55966#line 158
55967  return;
55968}
55969}
55970#line 160 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
55971void vmw_fifo_release(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo ) 
55972{ __le32 *fifo_mem ;
55973  uint32_t tmp___7 ;
55974  long tmp___8 ;
55975  long tmp___9 ;
55976  unsigned long __cil_tmp7 ;
55977  unsigned long __cil_tmp8 ;
55978  unsigned long __cil_tmp9 ;
55979  unsigned long __cil_tmp10 ;
55980  struct mutex *__cil_tmp11 ;
55981  uint32_t __cil_tmp12 ;
55982  unsigned long __cil_tmp13 ;
55983  unsigned long __cil_tmp14 ;
55984  __le32 *__cil_tmp15 ;
55985  void *__cil_tmp16 ;
55986  unsigned long __cil_tmp17 ;
55987  unsigned long __cil_tmp18 ;
55988  uint32_t __cil_tmp19 ;
55989  unsigned long __cil_tmp20 ;
55990  unsigned long __cil_tmp21 ;
55991  uint32_t __cil_tmp22 ;
55992  unsigned long __cil_tmp23 ;
55993  unsigned long __cil_tmp24 ;
55994  uint32_t __cil_tmp25 ;
55995  unsigned long __cil_tmp26 ;
55996  unsigned long __cil_tmp27 ;
55997  struct mutex *__cil_tmp28 ;
55998  unsigned long __cil_tmp29 ;
55999  unsigned long __cil_tmp30 ;
56000  struct vmw_marker_queue *__cil_tmp31 ;
56001  void *__cil_tmp32 ;
56002  unsigned long __cil_tmp33 ;
56003  unsigned long __cil_tmp34 ;
56004  unsigned long __cil_tmp35 ;
56005  __le32 *__cil_tmp36 ;
56006  unsigned long __cil_tmp37 ;
56007  int __cil_tmp38 ;
56008  int __cil_tmp39 ;
56009  int __cil_tmp40 ;
56010  long __cil_tmp41 ;
56011  unsigned long __cil_tmp42 ;
56012  unsigned long __cil_tmp43 ;
56013  __le32 *__cil_tmp44 ;
56014  void    *__cil_tmp45 ;
56015  unsigned long __cil_tmp46 ;
56016  unsigned long __cil_tmp47 ;
56017  void *__cil_tmp48 ;
56018  void *__cil_tmp49 ;
56019  unsigned long __cil_tmp50 ;
56020  unsigned long __cil_tmp51 ;
56021  unsigned long __cil_tmp52 ;
56022  __le32 *__cil_tmp53 ;
56023  unsigned long __cil_tmp54 ;
56024  int __cil_tmp55 ;
56025  int __cil_tmp56 ;
56026  int __cil_tmp57 ;
56027  long __cil_tmp58 ;
56028  unsigned long __cil_tmp59 ;
56029  unsigned long __cil_tmp60 ;
56030  __le32 *__cil_tmp61 ;
56031  void    *__cil_tmp62 ;
56032  unsigned long __cil_tmp63 ;
56033  unsigned long __cil_tmp64 ;
56034  void *__cil_tmp65 ;
56035
56036  {
56037  {
56038#line 162
56039  __cil_tmp7 = (unsigned long )dev_priv;
56040#line 162
56041  __cil_tmp8 = __cil_tmp7 + 2144;
56042#line 162
56043  fifo_mem = *((__le32 **)__cil_tmp8);
56044#line 164
56045  __cil_tmp9 = (unsigned long )dev_priv;
56046#line 164
56047  __cil_tmp10 = __cil_tmp9 + 2184;
56048#line 164
56049  __cil_tmp11 = (struct mutex *)__cil_tmp10;
56050#line 164
56051  mutex_lock(__cil_tmp11);
56052  }
56053  {
56054#line 166
56055  while (1) {
56056    while_continue: /* CIL Label */ ;
56057    {
56058#line 166
56059    tmp___7 = vmw_read(dev_priv, 22U);
56060    }
56061#line 166
56062    if (tmp___7 != 0U) {
56063
56064    } else {
56065#line 166
56066      goto while_break;
56067    }
56068    {
56069#line 167
56070    __cil_tmp12 = (uint32_t )1;
56071#line 167
56072    vmw_write(dev_priv, 21U, __cil_tmp12);
56073    }
56074  }
56075  while_break: /* CIL Label */ ;
56076  }
56077  {
56078#line 169
56079  __cil_tmp13 = (unsigned long )dev_priv;
56080#line 169
56081  __cil_tmp14 = __cil_tmp13 + 2980;
56082#line 169
56083  __cil_tmp15 = fifo_mem + 6;
56084#line 169
56085  __cil_tmp16 = (void *)__cil_tmp15;
56086#line 169
56087  *((uint32_t *)__cil_tmp14) = ioread32(__cil_tmp16);
56088#line 171
56089  __cil_tmp17 = (unsigned long )dev_priv;
56090#line 171
56091  __cil_tmp18 = __cil_tmp17 + 3028;
56092#line 171
56093  __cil_tmp19 = *((uint32_t *)__cil_tmp18);
56094#line 171
56095  vmw_write(dev_priv, 20U, __cil_tmp19);
56096#line 173
56097  __cil_tmp20 = (unsigned long )dev_priv;
56098#line 173
56099  __cil_tmp21 = __cil_tmp20 + 3024;
56100#line 173
56101  __cil_tmp22 = *((uint32_t *)__cil_tmp21);
56102#line 173
56103  vmw_write(dev_priv, 1U, __cil_tmp22);
56104#line 175
56105  __cil_tmp23 = (unsigned long )dev_priv;
56106#line 175
56107  __cil_tmp24 = __cil_tmp23 + 3020;
56108#line 175
56109  __cil_tmp25 = *((uint32_t *)__cil_tmp24);
56110#line 175
56111  vmw_write(dev_priv, 45U, __cil_tmp25);
56112#line 178
56113  __cil_tmp26 = (unsigned long )dev_priv;
56114#line 178
56115  __cil_tmp27 = __cil_tmp26 + 2184;
56116#line 178
56117  __cil_tmp28 = (struct mutex *)__cil_tmp27;
56118#line 178
56119  mutex_unlock(__cil_tmp28);
56120#line 179
56121  __cil_tmp29 = (unsigned long )fifo;
56122#line 179
56123  __cil_tmp30 = __cil_tmp29 + 160;
56124#line 179
56125  __cil_tmp31 = (struct vmw_marker_queue *)__cil_tmp30;
56126#line 179
56127  vmw_marker_queue_takedown(__cil_tmp31);
56128#line 181
56129  __cil_tmp32 = (void *)0;
56130#line 181
56131  __cil_tmp33 = (unsigned long )__cil_tmp32;
56132#line 181
56133  __cil_tmp34 = (unsigned long )fifo;
56134#line 181
56135  __cil_tmp35 = __cil_tmp34 + 16;
56136#line 181
56137  __cil_tmp36 = *((__le32 **)__cil_tmp35);
56138#line 181
56139  __cil_tmp37 = (unsigned long )__cil_tmp36;
56140#line 181
56141  __cil_tmp38 = __cil_tmp37 != __cil_tmp33;
56142#line 181
56143  __cil_tmp39 = ! __cil_tmp38;
56144#line 181
56145  __cil_tmp40 = ! __cil_tmp39;
56146#line 181
56147  __cil_tmp41 = (long )__cil_tmp40;
56148#line 181
56149  tmp___8 = __builtin_expect(__cil_tmp41, 1L);
56150  }
56151#line 181
56152  if (tmp___8) {
56153    {
56154#line 182
56155    __cil_tmp42 = (unsigned long )fifo;
56156#line 182
56157    __cil_tmp43 = __cil_tmp42 + 16;
56158#line 182
56159    __cil_tmp44 = *((__le32 **)__cil_tmp43);
56160#line 182
56161    __cil_tmp45 = (void    *)__cil_tmp44;
56162#line 182
56163    vfree(__cil_tmp45);
56164#line 183
56165    __cil_tmp46 = (unsigned long )fifo;
56166#line 183
56167    __cil_tmp47 = __cil_tmp46 + 16;
56168#line 183
56169    __cil_tmp48 = (void *)0;
56170#line 183
56171    *((__le32 **)__cil_tmp47) = (__le32 *)__cil_tmp48;
56172    }
56173  } else {
56174
56175  }
56176  {
56177#line 186
56178  __cil_tmp49 = (void *)0;
56179#line 186
56180  __cil_tmp50 = (unsigned long )__cil_tmp49;
56181#line 186
56182  __cil_tmp51 = (unsigned long )fifo;
56183#line 186
56184  __cil_tmp52 = __cil_tmp51 + 8;
56185#line 186
56186  __cil_tmp53 = *((__le32 **)__cil_tmp52);
56187#line 186
56188  __cil_tmp54 = (unsigned long )__cil_tmp53;
56189#line 186
56190  __cil_tmp55 = __cil_tmp54 != __cil_tmp50;
56191#line 186
56192  __cil_tmp56 = ! __cil_tmp55;
56193#line 186
56194  __cil_tmp57 = ! __cil_tmp56;
56195#line 186
56196  __cil_tmp58 = (long )__cil_tmp57;
56197#line 186
56198  tmp___9 = __builtin_expect(__cil_tmp58, 1L);
56199  }
56200#line 186
56201  if (tmp___9) {
56202    {
56203#line 187
56204    __cil_tmp59 = (unsigned long )fifo;
56205#line 187
56206    __cil_tmp60 = __cil_tmp59 + 8;
56207#line 187
56208    __cil_tmp61 = *((__le32 **)__cil_tmp60);
56209#line 187
56210    __cil_tmp62 = (void    *)__cil_tmp61;
56211#line 187
56212    vfree(__cil_tmp62);
56213#line 188
56214    __cil_tmp63 = (unsigned long )fifo;
56215#line 188
56216    __cil_tmp64 = __cil_tmp63 + 8;
56217#line 188
56218    __cil_tmp65 = (void *)0;
56219#line 188
56220    *((__le32 **)__cil_tmp64) = (__le32 *)__cil_tmp65;
56221    }
56222  } else {
56223
56224  }
56225#line 190
56226  return;
56227}
56228}
56229#line 192 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
56230static bool vmw_fifo_is_full(struct vmw_private *dev_priv , uint32_t bytes ) 
56231{ __le32 *fifo_mem ;
56232  uint32_t max ;
56233  unsigned int tmp___7 ;
56234  uint32_t next_cmd ;
56235  unsigned int tmp___8 ;
56236  uint32_t min ;
56237  unsigned int tmp___9 ;
56238  uint32_t stop ;
56239  unsigned int tmp___10 ;
56240  unsigned long __cil_tmp12 ;
56241  unsigned long __cil_tmp13 ;
56242  __le32 *__cil_tmp14 ;
56243  void *__cil_tmp15 ;
56244  __le32 *__cil_tmp16 ;
56245  void *__cil_tmp17 ;
56246  __le32 *__cil_tmp18 ;
56247  void *__cil_tmp19 ;
56248  __le32 *__cil_tmp20 ;
56249  void *__cil_tmp21 ;
56250  uint32_t __cil_tmp22 ;
56251  uint32_t __cil_tmp23 ;
56252  uint32_t __cil_tmp24 ;
56253  int __cil_tmp25 ;
56254
56255  {
56256  {
56257#line 194
56258  __cil_tmp12 = (unsigned long )dev_priv;
56259#line 194
56260  __cil_tmp13 = __cil_tmp12 + 2144;
56261#line 194
56262  fifo_mem = *((__le32 **)__cil_tmp13);
56263#line 195
56264  __cil_tmp14 = fifo_mem + 1;
56265#line 195
56266  __cil_tmp15 = (void *)__cil_tmp14;
56267#line 195
56268  tmp___7 = ioread32(__cil_tmp15);
56269#line 195
56270  max = tmp___7;
56271#line 196
56272  __cil_tmp16 = fifo_mem + 2;
56273#line 196
56274  __cil_tmp17 = (void *)__cil_tmp16;
56275#line 196
56276  tmp___8 = ioread32(__cil_tmp17);
56277#line 196
56278  next_cmd = tmp___8;
56279#line 197
56280  __cil_tmp18 = fifo_mem + 0;
56281#line 197
56282  __cil_tmp19 = (void *)__cil_tmp18;
56283#line 197
56284  tmp___9 = ioread32(__cil_tmp19);
56285#line 197
56286  min = tmp___9;
56287#line 198
56288  __cil_tmp20 = fifo_mem + 3;
56289#line 198
56290  __cil_tmp21 = (void *)__cil_tmp20;
56291#line 198
56292  tmp___10 = ioread32(__cil_tmp21);
56293#line 198
56294  stop = tmp___10;
56295  }
56296  {
56297#line 200
56298  __cil_tmp22 = stop - min;
56299#line 200
56300  __cil_tmp23 = max - next_cmd;
56301#line 200
56302  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
56303#line 200
56304  __cil_tmp25 = __cil_tmp24 <= bytes;
56305#line 200
56306  return ((bool )__cil_tmp25);
56307  }
56308}
56309}
56310#line 203 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
56311static int vmw_fifo_wait_noirq(struct vmw_private *dev_priv , uint32_t bytes , bool interruptible ,
56312                               unsigned long timeout ) 
56313{ int ret ;
56314  unsigned long end_jiffies ;
56315  wait_queue_t __wait ;
56316  struct task_struct *tmp___7 ;
56317  int tmp___8 ;
56318  bool tmp___9 ;
56319  struct task_struct *tmp___10 ;
56320  int tmp___11 ;
56321  unsigned long volatile   __cil_tmp17 ;
56322  unsigned long volatile   __cil_tmp18 ;
56323  wait_queue_t *__cil_tmp19 ;
56324  unsigned long __cil_tmp20 ;
56325  unsigned long __cil_tmp21 ;
56326  unsigned long __cil_tmp22 ;
56327  unsigned long __cil_tmp23 ;
56328  unsigned long __cil_tmp24 ;
56329  unsigned long __cil_tmp25 ;
56330  unsigned long __cil_tmp26 ;
56331  unsigned long __cil_tmp27 ;
56332  unsigned long __cil_tmp28 ;
56333  wait_queue_head_t *__cil_tmp29 ;
56334  long __cil_tmp30 ;
56335  long __cil_tmp31 ;
56336  long __cil_tmp32 ;
56337  unsigned long __cil_tmp33 ;
56338  unsigned long __cil_tmp34 ;
56339  wait_queue_head_t *__cil_tmp35 ;
56340  unsigned long __cil_tmp36 ;
56341  unsigned long __cil_tmp37 ;
56342  wait_queue_head_t *__cil_tmp38 ;
56343  void *__cil_tmp39 ;
56344
56345  {
56346  {
56347#line 207
56348  ret = 0;
56349#line 208
56350  __cil_tmp17 = (unsigned long volatile   )timeout;
56351#line 208
56352  __cil_tmp18 = jiffies + __cil_tmp17;
56353#line 208
56354  end_jiffies = (unsigned long )__cil_tmp18;
56355#line 209
56356  tmp___7 = get_current();
56357#line 209
56358  __cil_tmp19 = & __wait;
56359#line 209
56360  *((unsigned int *)__cil_tmp19) = 0U;
56361#line 209
56362  __cil_tmp20 = (unsigned long )(& __wait) + 8;
56363#line 209
56364  *((void **)__cil_tmp20) = (void *)tmp___7;
56365#line 209
56366  __cil_tmp21 = (unsigned long )(& __wait) + 16;
56367#line 209
56368  *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp21) = & autoremove_wake_function;
56369#line 209
56370  __cil_tmp22 = (unsigned long )(& __wait) + 24;
56371#line 209
56372  __cil_tmp23 = (unsigned long )(& __wait) + 24;
56373#line 209
56374  *((struct list_head **)__cil_tmp22) = (struct list_head *)__cil_tmp23;
56375#line 209
56376  __cil_tmp24 = 24 + 8;
56377#line 209
56378  __cil_tmp25 = (unsigned long )(& __wait) + __cil_tmp24;
56379#line 209
56380  __cil_tmp26 = (unsigned long )(& __wait) + 24;
56381#line 209
56382  *((struct list_head **)__cil_tmp25) = (struct list_head *)__cil_tmp26;
56383#line 211
56384  printk("<6>[drm] Fifo wait noirq.\n");
56385  }
56386  {
56387#line 213
56388  while (1) {
56389    while_continue: /* CIL Label */ ;
56390#line 214
56391    if (interruptible) {
56392#line 214
56393      tmp___8 = 1;
56394    } else {
56395#line 214
56396      tmp___8 = 2;
56397    }
56398    {
56399#line 214
56400    __cil_tmp27 = (unsigned long )dev_priv;
56401#line 214
56402    __cil_tmp28 = __cil_tmp27 + 2928;
56403#line 214
56404    __cil_tmp29 = (wait_queue_head_t *)__cil_tmp28;
56405#line 214
56406    prepare_to_wait(__cil_tmp29, & __wait, tmp___8);
56407#line 217
56408    tmp___9 = vmw_fifo_is_full(dev_priv, bytes);
56409    }
56410#line 217
56411    if (tmp___9) {
56412
56413    } else {
56414#line 218
56415      goto while_break;
56416    }
56417    {
56418#line 219
56419    __cil_tmp30 = (long )end_jiffies;
56420#line 219
56421    __cil_tmp31 = (long )jiffies;
56422#line 219
56423    __cil_tmp32 = __cil_tmp31 - __cil_tmp30;
56424#line 219
56425    if (__cil_tmp32 >= 0L) {
56426      {
56427#line 220
56428      ret = -16;
56429#line 221
56430      drm_err("vmw_fifo_wait_noirq", "SVGA device lockup.\n");
56431      }
56432#line 222
56433      goto while_break;
56434    } else {
56435
56436    }
56437    }
56438    {
56439#line 224
56440    schedule_timeout(1L);
56441    }
56442#line 225
56443    if (interruptible) {
56444      {
56445#line 225
56446      tmp___10 = get_current();
56447#line 225
56448      tmp___11 = signal_pending(tmp___10);
56449      }
56450#line 225
56451      if (tmp___11) {
56452#line 226
56453        ret = -512;
56454#line 227
56455        goto while_break;
56456      } else {
56457
56458      }
56459    } else {
56460
56461    }
56462  }
56463  while_break: /* CIL Label */ ;
56464  }
56465  {
56466#line 230
56467  __cil_tmp33 = (unsigned long )dev_priv;
56468#line 230
56469  __cil_tmp34 = __cil_tmp33 + 2928;
56470#line 230
56471  __cil_tmp35 = (wait_queue_head_t *)__cil_tmp34;
56472#line 230
56473  finish_wait(__cil_tmp35, & __wait);
56474#line 231
56475  __cil_tmp36 = (unsigned long )dev_priv;
56476#line 231
56477  __cil_tmp37 = __cil_tmp36 + 2928;
56478#line 231
56479  __cil_tmp38 = (wait_queue_head_t *)__cil_tmp37;
56480#line 231
56481  __cil_tmp39 = (void *)0;
56482#line 231
56483  __wake_up(__cil_tmp38, 3U, 0, __cil_tmp39);
56484#line 232
56485  printk("<6>[drm] Fifo noirq exit.\n");
56486  }
56487#line 233
56488  return (ret);
56489}
56490}
56491#line 236 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
56492static int vmw_fifo_wait(struct vmw_private *dev_priv , uint32_t bytes , bool interruptible ,
56493                         unsigned long timeout ) 
56494{ long ret ;
56495  unsigned long irq_flags ;
56496  bool tmp___7 ;
56497  int tmp___8 ;
56498  long tmp___9 ;
56499  int tmp___10 ;
56500  raw_spinlock_t *tmp___11 ;
56501  int tmp___12 ;
56502  long __ret ;
56503  wait_queue_t __wait ;
56504  struct task_struct *tmp___13 ;
56505  bool tmp___14 ;
56506  struct task_struct *tmp___15 ;
56507  int tmp___16 ;
56508  bool tmp___17 ;
56509  long __ret___0 ;
56510  wait_queue_t __wait___0 ;
56511  struct task_struct *tmp___18 ;
56512  bool tmp___19 ;
56513  bool tmp___20 ;
56514  long tmp___21 ;
56515  long tmp___22 ;
56516  raw_spinlock_t *tmp___23 ;
56517  int tmp___24 ;
56518  long __cil_tmp33 ;
56519  uint32_t __cil_tmp34 ;
56520  unsigned long __cil_tmp35 ;
56521  unsigned long __cil_tmp36 ;
56522  uint32_t __cil_tmp37 ;
56523  unsigned int __cil_tmp38 ;
56524  unsigned long __cil_tmp39 ;
56525  unsigned long __cil_tmp40 ;
56526  struct mutex *__cil_tmp41 ;
56527  unsigned long __cil_tmp42 ;
56528  unsigned long __cil_tmp43 ;
56529  atomic_t *__cil_tmp44 ;
56530  unsigned long __cil_tmp45 ;
56531  unsigned long __cil_tmp46 ;
56532  spinlock_t *__cil_tmp47 ;
56533  unsigned long __cil_tmp48 ;
56534  unsigned long __cil_tmp49 ;
56535  unsigned int __cil_tmp50 ;
56536  unsigned int __cil_tmp51 ;
56537  int __cil_tmp52 ;
56538  unsigned long __cil_tmp53 ;
56539  unsigned long __cil_tmp54 ;
56540  unsigned long __cil_tmp55 ;
56541  unsigned long __cil_tmp56 ;
56542  uint32_t __cil_tmp57 ;
56543  unsigned long __cil_tmp58 ;
56544  unsigned long __cil_tmp59 ;
56545  uint32_t __cil_tmp60 ;
56546  unsigned long __cil_tmp61 ;
56547  unsigned long __cil_tmp62 ;
56548  spinlock_t *__cil_tmp63 ;
56549  unsigned long __cil_tmp64 ;
56550  unsigned long __cil_tmp65 ;
56551  struct mutex *__cil_tmp66 ;
56552  wait_queue_t *__cil_tmp67 ;
56553  unsigned long __cil_tmp68 ;
56554  unsigned long __cil_tmp69 ;
56555  unsigned long __cil_tmp70 ;
56556  unsigned long __cil_tmp71 ;
56557  unsigned long __cil_tmp72 ;
56558  unsigned long __cil_tmp73 ;
56559  unsigned long __cil_tmp74 ;
56560  unsigned long __cil_tmp75 ;
56561  unsigned long __cil_tmp76 ;
56562  wait_queue_head_t *__cil_tmp77 ;
56563  unsigned long __cil_tmp78 ;
56564  unsigned long __cil_tmp79 ;
56565  wait_queue_head_t *__cil_tmp80 ;
56566  wait_queue_t *__cil_tmp81 ;
56567  unsigned long __cil_tmp82 ;
56568  unsigned long __cil_tmp83 ;
56569  unsigned long __cil_tmp84 ;
56570  unsigned long __cil_tmp85 ;
56571  unsigned long __cil_tmp86 ;
56572  unsigned long __cil_tmp87 ;
56573  unsigned long __cil_tmp88 ;
56574  unsigned long __cil_tmp89 ;
56575  unsigned long __cil_tmp90 ;
56576  wait_queue_head_t *__cil_tmp91 ;
56577  unsigned long __cil_tmp92 ;
56578  unsigned long __cil_tmp93 ;
56579  wait_queue_head_t *__cil_tmp94 ;
56580  int __cil_tmp95 ;
56581  int __cil_tmp96 ;
56582  int __cil_tmp97 ;
56583  long __cil_tmp98 ;
56584  int __cil_tmp99 ;
56585  int __cil_tmp100 ;
56586  int __cil_tmp101 ;
56587  long __cil_tmp102 ;
56588  unsigned long __cil_tmp103 ;
56589  unsigned long __cil_tmp104 ;
56590  struct mutex *__cil_tmp105 ;
56591  unsigned long __cil_tmp106 ;
56592  unsigned long __cil_tmp107 ;
56593  atomic_t *__cil_tmp108 ;
56594  unsigned long __cil_tmp109 ;
56595  unsigned long __cil_tmp110 ;
56596  spinlock_t *__cil_tmp111 ;
56597  unsigned long __cil_tmp112 ;
56598  unsigned long __cil_tmp113 ;
56599  unsigned long __cil_tmp114 ;
56600  unsigned long __cil_tmp115 ;
56601  uint32_t __cil_tmp116 ;
56602  unsigned long __cil_tmp117 ;
56603  unsigned long __cil_tmp118 ;
56604  uint32_t __cil_tmp119 ;
56605  unsigned long __cil_tmp120 ;
56606  unsigned long __cil_tmp121 ;
56607  spinlock_t *__cil_tmp122 ;
56608  unsigned long __cil_tmp123 ;
56609  unsigned long __cil_tmp124 ;
56610  struct mutex *__cil_tmp125 ;
56611
56612  {
56613  {
56614#line 240
56615  ret = 1L;
56616#line 243
56617  tmp___7 = vmw_fifo_is_full(dev_priv, bytes);
56618  }
56619#line 243
56620  if (tmp___7) {
56621#line 243
56622    tmp___8 = 0;
56623  } else {
56624#line 243
56625    tmp___8 = 1;
56626  }
56627  {
56628#line 243
56629  __cil_tmp33 = (long )tmp___8;
56630#line 243
56631  tmp___9 = __builtin_expect(__cil_tmp33, 1L);
56632  }
56633#line 243
56634  if (tmp___9) {
56635#line 244
56636    return (0);
56637  } else {
56638
56639  }
56640  {
56641#line 246
56642  __cil_tmp34 = (uint32_t )2;
56643#line 246
56644  vmw_fifo_ping_host(dev_priv, __cil_tmp34);
56645  }
56646  {
56647#line 247
56648  __cil_tmp35 = (unsigned long )dev_priv;
56649#line 247
56650  __cil_tmp36 = __cil_tmp35 + 2156;
56651#line 247
56652  __cil_tmp37 = *((uint32_t *)__cil_tmp36);
56653#line 247
56654  __cil_tmp38 = __cil_tmp37 & 262144U;
56655#line 247
56656  if (! __cil_tmp38) {
56657    {
56658#line 248
56659    tmp___10 = vmw_fifo_wait_noirq(dev_priv, bytes, interruptible, timeout);
56660    }
56661#line 248
56662    return (tmp___10);
56663  } else {
56664
56665  }
56666  }
56667  {
56668#line 251
56669  __cil_tmp39 = (unsigned long )dev_priv;
56670#line 251
56671  __cil_tmp40 = __cil_tmp39 + 2184;
56672#line 251
56673  __cil_tmp41 = (struct mutex *)__cil_tmp40;
56674#line 251
56675  mutex_lock(__cil_tmp41);
56676#line 252
56677  __cil_tmp42 = (unsigned long )dev_priv;
56678#line 252
56679  __cil_tmp43 = __cil_tmp42 + 2976;
56680#line 252
56681  __cil_tmp44 = (atomic_t *)__cil_tmp43;
56682#line 252
56683  tmp___12 = atomic_add_return(1, __cil_tmp44);
56684  }
56685#line 252
56686  if (tmp___12 > 0) {
56687    {
56688#line 253
56689    while (1) {
56690      while_continue: /* CIL Label */ ;
56691      {
56692#line 253
56693      while (1) {
56694        while_continue___0: /* CIL Label */ ;
56695        {
56696#line 253
56697        __cil_tmp45 = (unsigned long )dev_priv;
56698#line 253
56699        __cil_tmp46 = __cil_tmp45 + 2984;
56700#line 253
56701        __cil_tmp47 = (spinlock_t *)__cil_tmp46;
56702#line 253
56703        tmp___11 = spinlock_check(__cil_tmp47);
56704#line 253
56705        irq_flags = _raw_spin_lock_irqsave(tmp___11);
56706        }
56707#line 253
56708        goto while_break___0;
56709      }
56710      while_break___0: /* CIL Label */ ;
56711      }
56712#line 253
56713      goto while_break;
56714    }
56715    while_break: /* CIL Label */ ;
56716    }
56717    {
56718#line 254
56719    __cil_tmp48 = (unsigned long )dev_priv;
56720#line 254
56721    __cil_tmp49 = __cil_tmp48 + 2104;
56722#line 254
56723    __cil_tmp50 = *((unsigned int *)__cil_tmp49);
56724#line 254
56725    __cil_tmp51 = __cil_tmp50 + 8U;
56726#line 254
56727    __cil_tmp52 = (int )__cil_tmp51;
56728#line 254
56729    outl(2U, __cil_tmp52);
56730#line 256
56731    __cil_tmp53 = (unsigned long )dev_priv;
56732#line 256
56733    __cil_tmp54 = __cil_tmp53 + 3016;
56734#line 256
56735    __cil_tmp55 = (unsigned long )dev_priv;
56736#line 256
56737    __cil_tmp56 = __cil_tmp55 + 3016;
56738#line 256
56739    __cil_tmp57 = *((uint32_t *)__cil_tmp56);
56740#line 256
56741    *((uint32_t *)__cil_tmp54) = __cil_tmp57 | 2U;
56742#line 257
56743    __cil_tmp58 = (unsigned long )dev_priv;
56744#line 257
56745    __cil_tmp59 = __cil_tmp58 + 3016;
56746#line 257
56747    __cil_tmp60 = *((uint32_t *)__cil_tmp59);
56748#line 257
56749    vmw_write(dev_priv, 33U, __cil_tmp60);
56750#line 258
56751    __cil_tmp61 = (unsigned long )dev_priv;
56752#line 258
56753    __cil_tmp62 = __cil_tmp61 + 2984;
56754#line 258
56755    __cil_tmp63 = (spinlock_t *)__cil_tmp62;
56756#line 258
56757    spin_unlock_irqrestore(__cil_tmp63, irq_flags);
56758    }
56759  } else {
56760
56761  }
56762  {
56763#line 260
56764  __cil_tmp64 = (unsigned long )dev_priv;
56765#line 260
56766  __cil_tmp65 = __cil_tmp64 + 2184;
56767#line 260
56768  __cil_tmp66 = (struct mutex *)__cil_tmp65;
56769#line 260
56770  mutex_unlock(__cil_tmp66);
56771  }
56772#line 262
56773  if (interruptible) {
56774    {
56775#line 263
56776    __ret = (long )timeout;
56777#line 263
56778    tmp___17 = vmw_fifo_is_full(dev_priv, bytes);
56779    }
56780#line 263
56781    if (tmp___17) {
56782      {
56783#line 263
56784      while (1) {
56785        while_continue___1: /* CIL Label */ ;
56786        {
56787#line 263
56788        tmp___13 = get_current();
56789#line 263
56790        __cil_tmp67 = & __wait;
56791#line 263
56792        *((unsigned int *)__cil_tmp67) = 0U;
56793#line 263
56794        __cil_tmp68 = (unsigned long )(& __wait) + 8;
56795#line 263
56796        *((void **)__cil_tmp68) = (void *)tmp___13;
56797#line 263
56798        __cil_tmp69 = (unsigned long )(& __wait) + 16;
56799#line 263
56800        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp69) = & autoremove_wake_function;
56801#line 263
56802        __cil_tmp70 = (unsigned long )(& __wait) + 24;
56803#line 263
56804        __cil_tmp71 = (unsigned long )(& __wait) + 24;
56805#line 263
56806        *((struct list_head **)__cil_tmp70) = (struct list_head *)__cil_tmp71;
56807#line 263
56808        __cil_tmp72 = 24 + 8;
56809#line 263
56810        __cil_tmp73 = (unsigned long )(& __wait) + __cil_tmp72;
56811#line 263
56812        __cil_tmp74 = (unsigned long )(& __wait) + 24;
56813#line 263
56814        *((struct list_head **)__cil_tmp73) = (struct list_head *)__cil_tmp74;
56815        }
56816        {
56817#line 263
56818        while (1) {
56819          while_continue___2: /* CIL Label */ ;
56820          {
56821#line 263
56822          __cil_tmp75 = (unsigned long )dev_priv;
56823#line 263
56824          __cil_tmp76 = __cil_tmp75 + 2928;
56825#line 263
56826          __cil_tmp77 = (wait_queue_head_t *)__cil_tmp76;
56827#line 263
56828          prepare_to_wait(__cil_tmp77, & __wait, 1);
56829#line 263
56830          tmp___14 = vmw_fifo_is_full(dev_priv, bytes);
56831          }
56832#line 263
56833          if (tmp___14) {
56834
56835          } else {
56836#line 263
56837            goto while_break___2;
56838          }
56839          {
56840#line 263
56841          tmp___15 = get_current();
56842#line 263
56843          tmp___16 = signal_pending(tmp___15);
56844          }
56845#line 263
56846          if (tmp___16) {
56847
56848          } else {
56849            {
56850#line 263
56851            __ret = schedule_timeout(__ret);
56852            }
56853#line 263
56854            if (! __ret) {
56855#line 263
56856              goto while_break___2;
56857            } else {
56858
56859            }
56860#line 263
56861            goto __Cont;
56862          }
56863#line 263
56864          __ret = -512L;
56865#line 263
56866          goto while_break___2;
56867          __Cont: /* CIL Label */ ;
56868        }
56869        while_break___2: /* CIL Label */ ;
56870        }
56871        {
56872#line 263
56873        __cil_tmp78 = (unsigned long )dev_priv;
56874#line 263
56875        __cil_tmp79 = __cil_tmp78 + 2928;
56876#line 263
56877        __cil_tmp80 = (wait_queue_head_t *)__cil_tmp79;
56878#line 263
56879        finish_wait(__cil_tmp80, & __wait);
56880        }
56881#line 263
56882        goto while_break___1;
56883      }
56884      while_break___1: /* CIL Label */ ;
56885      }
56886    } else {
56887
56888    }
56889#line 263
56890    ret = __ret;
56891  } else {
56892    {
56893#line 267
56894    __ret___0 = (long )timeout;
56895#line 267
56896    tmp___20 = vmw_fifo_is_full(dev_priv, bytes);
56897    }
56898#line 267
56899    if (tmp___20) {
56900      {
56901#line 267
56902      while (1) {
56903        while_continue___3: /* CIL Label */ ;
56904        {
56905#line 267
56906        tmp___18 = get_current();
56907#line 267
56908        __cil_tmp81 = & __wait___0;
56909#line 267
56910        *((unsigned int *)__cil_tmp81) = 0U;
56911#line 267
56912        __cil_tmp82 = (unsigned long )(& __wait___0) + 8;
56913#line 267
56914        *((void **)__cil_tmp82) = (void *)tmp___18;
56915#line 267
56916        __cil_tmp83 = (unsigned long )(& __wait___0) + 16;
56917#line 267
56918        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp83) = & autoremove_wake_function;
56919#line 267
56920        __cil_tmp84 = (unsigned long )(& __wait___0) + 24;
56921#line 267
56922        __cil_tmp85 = (unsigned long )(& __wait___0) + 24;
56923#line 267
56924        *((struct list_head **)__cil_tmp84) = (struct list_head *)__cil_tmp85;
56925#line 267
56926        __cil_tmp86 = 24 + 8;
56927#line 267
56928        __cil_tmp87 = (unsigned long )(& __wait___0) + __cil_tmp86;
56929#line 267
56930        __cil_tmp88 = (unsigned long )(& __wait___0) + 24;
56931#line 267
56932        *((struct list_head **)__cil_tmp87) = (struct list_head *)__cil_tmp88;
56933        }
56934        {
56935#line 267
56936        while (1) {
56937          while_continue___4: /* CIL Label */ ;
56938          {
56939#line 267
56940          __cil_tmp89 = (unsigned long )dev_priv;
56941#line 267
56942          __cil_tmp90 = __cil_tmp89 + 2928;
56943#line 267
56944          __cil_tmp91 = (wait_queue_head_t *)__cil_tmp90;
56945#line 267
56946          prepare_to_wait(__cil_tmp91, & __wait___0, 2);
56947#line 267
56948          tmp___19 = vmw_fifo_is_full(dev_priv, bytes);
56949          }
56950#line 267
56951          if (tmp___19) {
56952
56953          } else {
56954#line 267
56955            goto while_break___4;
56956          }
56957          {
56958#line 267
56959          __ret___0 = schedule_timeout(__ret___0);
56960          }
56961#line 267
56962          if (! __ret___0) {
56963#line 267
56964            goto while_break___4;
56965          } else {
56966
56967          }
56968        }
56969        while_break___4: /* CIL Label */ ;
56970        }
56971        {
56972#line 267
56973        __cil_tmp92 = (unsigned long )dev_priv;
56974#line 267
56975        __cil_tmp93 = __cil_tmp92 + 2928;
56976#line 267
56977        __cil_tmp94 = (wait_queue_head_t *)__cil_tmp93;
56978#line 267
56979        finish_wait(__cil_tmp94, & __wait___0);
56980        }
56981#line 267
56982        goto while_break___3;
56983      }
56984      while_break___3: /* CIL Label */ ;
56985      }
56986    } else {
56987
56988    }
56989#line 267
56990    ret = __ret___0;
56991  }
56992  {
56993#line 271
56994  __cil_tmp95 = ret == 0L;
56995#line 271
56996  __cil_tmp96 = ! __cil_tmp95;
56997#line 271
56998  __cil_tmp97 = ! __cil_tmp96;
56999#line 271
57000  __cil_tmp98 = (long )__cil_tmp97;
57001#line 271
57002  tmp___22 = __builtin_expect(__cil_tmp98, 0L);
57003  }
57004#line 271
57005  if (tmp___22) {
57006#line 272
57007    ret = -16L;
57008  } else {
57009    {
57010#line 273
57011    __cil_tmp99 = ret > 0L;
57012#line 273
57013    __cil_tmp100 = ! __cil_tmp99;
57014#line 273
57015    __cil_tmp101 = ! __cil_tmp100;
57016#line 273
57017    __cil_tmp102 = (long )__cil_tmp101;
57018#line 273
57019    tmp___21 = __builtin_expect(__cil_tmp102, 1L);
57020    }
57021#line 273
57022    if (tmp___21) {
57023#line 274
57024      ret = 0L;
57025    } else {
57026
57027    }
57028  }
57029  {
57030#line 276
57031  __cil_tmp103 = (unsigned long )dev_priv;
57032#line 276
57033  __cil_tmp104 = __cil_tmp103 + 2184;
57034#line 276
57035  __cil_tmp105 = (struct mutex *)__cil_tmp104;
57036#line 276
57037  mutex_lock(__cil_tmp105);
57038#line 277
57039  __cil_tmp106 = (unsigned long )dev_priv;
57040#line 277
57041  __cil_tmp107 = __cil_tmp106 + 2976;
57042#line 277
57043  __cil_tmp108 = (atomic_t *)__cil_tmp107;
57044#line 277
57045  tmp___24 = atomic_dec_and_test(__cil_tmp108);
57046  }
57047#line 277
57048  if (tmp___24) {
57049    {
57050#line 278
57051    while (1) {
57052      while_continue___5: /* CIL Label */ ;
57053      {
57054#line 278
57055      while (1) {
57056        while_continue___6: /* CIL Label */ ;
57057        {
57058#line 278
57059        __cil_tmp109 = (unsigned long )dev_priv;
57060#line 278
57061        __cil_tmp110 = __cil_tmp109 + 2984;
57062#line 278
57063        __cil_tmp111 = (spinlock_t *)__cil_tmp110;
57064#line 278
57065        tmp___23 = spinlock_check(__cil_tmp111);
57066#line 278
57067        irq_flags = _raw_spin_lock_irqsave(tmp___23);
57068        }
57069#line 278
57070        goto while_break___6;
57071      }
57072      while_break___6: /* CIL Label */ ;
57073      }
57074#line 278
57075      goto while_break___5;
57076    }
57077    while_break___5: /* CIL Label */ ;
57078    }
57079    {
57080#line 279
57081    __cil_tmp112 = (unsigned long )dev_priv;
57082#line 279
57083    __cil_tmp113 = __cil_tmp112 + 3016;
57084#line 279
57085    __cil_tmp114 = (unsigned long )dev_priv;
57086#line 279
57087    __cil_tmp115 = __cil_tmp114 + 3016;
57088#line 279
57089    __cil_tmp116 = *((uint32_t *)__cil_tmp115);
57090#line 279
57091    *((uint32_t *)__cil_tmp113) = __cil_tmp116 & 4294967293U;
57092#line 280
57093    __cil_tmp117 = (unsigned long )dev_priv;
57094#line 280
57095    __cil_tmp118 = __cil_tmp117 + 3016;
57096#line 280
57097    __cil_tmp119 = *((uint32_t *)__cil_tmp118);
57098#line 280
57099    vmw_write(dev_priv, 33U, __cil_tmp119);
57100#line 281
57101    __cil_tmp120 = (unsigned long )dev_priv;
57102#line 281
57103    __cil_tmp121 = __cil_tmp120 + 2984;
57104#line 281
57105    __cil_tmp122 = (spinlock_t *)__cil_tmp121;
57106#line 281
57107    spin_unlock_irqrestore(__cil_tmp122, irq_flags);
57108    }
57109  } else {
57110
57111  }
57112  {
57113#line 283
57114  __cil_tmp123 = (unsigned long )dev_priv;
57115#line 283
57116  __cil_tmp124 = __cil_tmp123 + 2184;
57117#line 283
57118  __cil_tmp125 = (struct mutex *)__cil_tmp124;
57119#line 283
57120  mutex_unlock(__cil_tmp125);
57121  }
57122#line 285
57123  return ((int )ret);
57124}
57125}
57126#line 298 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
57127void *vmw_fifo_reserve(struct vmw_private *dev_priv , uint32_t bytes ) 
57128{ struct vmw_fifo_state *fifo_state ;
57129  __le32 *fifo_mem ;
57130  uint32_t max ;
57131  uint32_t min ;
57132  uint32_t next_cmd ;
57133  uint32_t reserveable ;
57134  int ret ;
57135  long tmp___7 ;
57136  long tmp___8 ;
57137  long tmp___9 ;
57138  uint32_t stop ;
57139  unsigned int tmp___10 ;
57140  bool need_bounce ;
57141  bool reserve_in_place ;
57142  long tmp___11 ;
57143  bool tmp___12 ;
57144  int tmp___13 ;
57145  long tmp___14 ;
57146  long tmp___15 ;
57147  long tmp___16 ;
57148  void *tmp___17 ;
57149  unsigned long __cil_tmp24 ;
57150  unsigned long __cil_tmp25 ;
57151  unsigned long __cil_tmp26 ;
57152  unsigned long __cil_tmp27 ;
57153  int __cil_tmp28 ;
57154  unsigned int __cil_tmp29 ;
57155  unsigned long __cil_tmp30 ;
57156  unsigned long __cil_tmp31 ;
57157  uint32_t __cil_tmp32 ;
57158  unsigned long __cil_tmp33 ;
57159  unsigned long __cil_tmp34 ;
57160  struct mutex *__cil_tmp35 ;
57161  __le32 *__cil_tmp36 ;
57162  void *__cil_tmp37 ;
57163  __le32 *__cil_tmp38 ;
57164  void *__cil_tmp39 ;
57165  __le32 *__cil_tmp40 ;
57166  void *__cil_tmp41 ;
57167  uint32_t __cil_tmp42 ;
57168  int __cil_tmp43 ;
57169  int __cil_tmp44 ;
57170  int __cil_tmp45 ;
57171  long __cil_tmp46 ;
57172  unsigned long __cil_tmp47 ;
57173  int __cil_tmp48 ;
57174  int __cil_tmp49 ;
57175  int __cil_tmp50 ;
57176  long __cil_tmp51 ;
57177  void *__cil_tmp52 ;
57178  unsigned long __cil_tmp53 ;
57179  unsigned long __cil_tmp54 ;
57180  unsigned long __cil_tmp55 ;
57181  __le32 *__cil_tmp56 ;
57182  unsigned long __cil_tmp57 ;
57183  int __cil_tmp58 ;
57184  int __cil_tmp59 ;
57185  int __cil_tmp60 ;
57186  long __cil_tmp61 ;
57187  __le32 *__cil_tmp62 ;
57188  void *__cil_tmp63 ;
57189  uint32_t __cil_tmp64 ;
57190  uint32_t __cil_tmp65 ;
57191  long __cil_tmp66 ;
57192  bool __cil_tmp67 ;
57193  int __cil_tmp68 ;
57194  int __cil_tmp69 ;
57195  int __cil_tmp70 ;
57196  long __cil_tmp71 ;
57197  uint32_t __cil_tmp72 ;
57198  int __cil_tmp73 ;
57199  int __cil_tmp74 ;
57200  int __cil_tmp75 ;
57201  long __cil_tmp76 ;
57202  bool __cil_tmp77 ;
57203  int __cil_tmp78 ;
57204  int __cil_tmp79 ;
57205  int __cil_tmp80 ;
57206  long __cil_tmp81 ;
57207  unsigned long __cil_tmp82 ;
57208  unsigned long __cil_tmp83 ;
57209  unsigned long __cil_tmp84 ;
57210  __le32 *__cil_tmp85 ;
57211  void *__cil_tmp86 ;
57212  uint32_t __cil_tmp87 ;
57213  __le32 *__cil_tmp88 ;
57214  unsigned long __cil_tmp89 ;
57215  unsigned long __cil_tmp90 ;
57216  unsigned long __cil_tmp91 ;
57217  unsigned long __cil_tmp92 ;
57218  unsigned long __cil_tmp93 ;
57219  unsigned long __cil_tmp94 ;
57220  unsigned long __cil_tmp95 ;
57221  unsigned long __cil_tmp96 ;
57222  __le32 *__cil_tmp97 ;
57223  unsigned long __cil_tmp98 ;
57224  unsigned long __cil_tmp99 ;
57225  unsigned long __cil_tmp100 ;
57226  unsigned long __cil_tmp101 ;
57227  unsigned long __cil_tmp102 ;
57228  __le32 *__cil_tmp103 ;
57229  unsigned long __cil_tmp104 ;
57230  unsigned long __cil_tmp105 ;
57231  struct mutex *__cil_tmp106 ;
57232
57233  {
57234  {
57235#line 300
57236  __cil_tmp24 = (unsigned long )dev_priv;
57237#line 300
57238  __cil_tmp25 = __cil_tmp24 + 1856;
57239#line 300
57240  fifo_state = (struct vmw_fifo_state *)__cil_tmp25;
57241#line 301
57242  __cil_tmp26 = (unsigned long )dev_priv;
57243#line 301
57244  __cil_tmp27 = __cil_tmp26 + 2144;
57245#line 301
57246  fifo_mem = *((__le32 **)__cil_tmp27);
57247#line 305
57248  __cil_tmp28 = 1 << 6;
57249#line 305
57250  __cil_tmp29 = (unsigned int )__cil_tmp28;
57251#line 305
57252  __cil_tmp30 = (unsigned long )fifo_state;
57253#line 305
57254  __cil_tmp31 = __cil_tmp30 + 36;
57255#line 305
57256  __cil_tmp32 = *((uint32_t *)__cil_tmp31);
57257#line 305
57258  reserveable = __cil_tmp32 & __cil_tmp29;
57259#line 308
57260  __cil_tmp33 = (unsigned long )fifo_state;
57261#line 308
57262  __cil_tmp34 = __cil_tmp33 + 40;
57263#line 308
57264  __cil_tmp35 = (struct mutex *)__cil_tmp34;
57265#line 308
57266  mutex_lock(__cil_tmp35);
57267#line 309
57268  __cil_tmp36 = fifo_mem + 1;
57269#line 309
57270  __cil_tmp37 = (void *)__cil_tmp36;
57271#line 309
57272  max = ioread32(__cil_tmp37);
57273#line 310
57274  __cil_tmp38 = fifo_mem + 0;
57275#line 310
57276  __cil_tmp39 = (void *)__cil_tmp38;
57277#line 310
57278  min = ioread32(__cil_tmp39);
57279#line 311
57280  __cil_tmp40 = fifo_mem + 2;
57281#line 311
57282  __cil_tmp41 = (void *)__cil_tmp40;
57283#line 311
57284  next_cmd = ioread32(__cil_tmp41);
57285#line 313
57286  __cil_tmp42 = max - min;
57287#line 313
57288  __cil_tmp43 = bytes >= __cil_tmp42;
57289#line 313
57290  __cil_tmp44 = ! __cil_tmp43;
57291#line 313
57292  __cil_tmp45 = ! __cil_tmp44;
57293#line 313
57294  __cil_tmp46 = (long )__cil_tmp45;
57295#line 313
57296  tmp___7 = __builtin_expect(__cil_tmp46, 0L);
57297  }
57298#line 313
57299  if (tmp___7) {
57300#line 314
57301    goto out_err;
57302  } else {
57303
57304  }
57305  {
57306#line 316
57307  while (1) {
57308    while_continue: /* CIL Label */ ;
57309    {
57310#line 316
57311    __cil_tmp47 = *((unsigned long *)fifo_state);
57312#line 316
57313    __cil_tmp48 = __cil_tmp47 != 0UL;
57314#line 316
57315    __cil_tmp49 = ! __cil_tmp48;
57316#line 316
57317    __cil_tmp50 = ! __cil_tmp49;
57318#line 316
57319    __cil_tmp51 = (long )__cil_tmp50;
57320#line 316
57321    tmp___8 = __builtin_expect(__cil_tmp51, 0L);
57322    }
57323#line 316
57324    if (tmp___8) {
57325      {
57326#line 316
57327      while (1) {
57328        while_continue___0: /* CIL Label */ ;
57329#line 316
57330        __asm__  volatile   ("1:\tud2\n"
57331                             ".pushsection __bug_table,\"a\"\n"
57332                             "2:\t.long 1b - 2b, %c0 - 2b\n"
57333                             "\t.word %c1, 0\n"
57334                             "\t.org 2b+%c2\n"
57335                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"),
57336                             "i" (316), "i" (12UL));
57337        {
57338#line 316
57339        while (1) {
57340          while_continue___1: /* CIL Label */ ;
57341        }
57342        while_break___1: /* CIL Label */ ;
57343        }
57344#line 316
57345        goto while_break___0;
57346      }
57347      while_break___0: /* CIL Label */ ;
57348      }
57349    } else {
57350
57351    }
57352#line 316
57353    goto while_break;
57354  }
57355  while_break: /* CIL Label */ ;
57356  }
57357  {
57358#line 317
57359  while (1) {
57360    while_continue___2: /* CIL Label */ ;
57361    {
57362#line 317
57363    __cil_tmp52 = (void *)0;
57364#line 317
57365    __cil_tmp53 = (unsigned long )__cil_tmp52;
57366#line 317
57367    __cil_tmp54 = (unsigned long )fifo_state;
57368#line 317
57369    __cil_tmp55 = __cil_tmp54 + 8;
57370#line 317
57371    __cil_tmp56 = *((__le32 **)__cil_tmp55);
57372#line 317
57373    __cil_tmp57 = (unsigned long )__cil_tmp56;
57374#line 317
57375    __cil_tmp58 = __cil_tmp57 != __cil_tmp53;
57376#line 317
57377    __cil_tmp59 = ! __cil_tmp58;
57378#line 317
57379    __cil_tmp60 = ! __cil_tmp59;
57380#line 317
57381    __cil_tmp61 = (long )__cil_tmp60;
57382#line 317
57383    tmp___9 = __builtin_expect(__cil_tmp61, 0L);
57384    }
57385#line 317
57386    if (tmp___9) {
57387      {
57388#line 317
57389      while (1) {
57390        while_continue___3: /* CIL Label */ ;
57391#line 317
57392        __asm__  volatile   ("1:\tud2\n"
57393                             ".pushsection __bug_table,\"a\"\n"
57394                             "2:\t.long 1b - 2b, %c0 - 2b\n"
57395                             "\t.word %c1, 0\n"
57396                             "\t.org 2b+%c2\n"
57397                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"),
57398                             "i" (317), "i" (12UL));
57399        {
57400#line 317
57401        while (1) {
57402          while_continue___4: /* CIL Label */ ;
57403        }
57404        while_break___4: /* CIL Label */ ;
57405        }
57406#line 317
57407        goto while_break___3;
57408      }
57409      while_break___3: /* CIL Label */ ;
57410      }
57411    } else {
57412
57413    }
57414#line 317
57415    goto while_break___2;
57416  }
57417  while_break___2: /* CIL Label */ ;
57418  }
57419#line 319
57420  *((unsigned long *)fifo_state) = (unsigned long )bytes;
57421  {
57422#line 321
57423  while (1) {
57424    while_continue___5: /* CIL Label */ ;
57425    {
57426#line 322
57427    __cil_tmp62 = fifo_mem + 3;
57428#line 322
57429    __cil_tmp63 = (void *)__cil_tmp62;
57430#line 322
57431    tmp___10 = ioread32(__cil_tmp63);
57432#line 322
57433    stop = tmp___10;
57434#line 323
57435    need_bounce = (bool )0;
57436#line 324
57437    reserve_in_place = (bool )0;
57438    }
57439#line 326
57440    if (next_cmd >= stop) {
57441      {
57442#line 327
57443      __cil_tmp64 = next_cmd + bytes;
57444#line 327
57445      if (__cil_tmp64 < max) {
57446#line 327
57447        tmp___13 = 1;
57448      } else {
57449        {
57450#line 327
57451        __cil_tmp65 = next_cmd + bytes;
57452#line 327
57453        if (__cil_tmp65 == max) {
57454#line 327
57455          if (stop > min) {
57456#line 327
57457            tmp___13 = 1;
57458          } else {
57459#line 327
57460            tmp___13 = 0;
57461          }
57462        } else {
57463#line 327
57464          tmp___13 = 0;
57465        }
57466        }
57467      }
57468      }
57469      {
57470#line 327
57471      __cil_tmp66 = (long )tmp___13;
57472#line 327
57473      tmp___14 = __builtin_expect(__cil_tmp66, 1L);
57474      }
57475#line 327
57476      if (tmp___14) {
57477#line 329
57478        reserve_in_place = (bool )1;
57479      } else {
57480        {
57481#line 331
57482        tmp___12 = vmw_fifo_is_full(dev_priv, bytes);
57483        }
57484#line 331
57485        if (tmp___12) {
57486          {
57487#line 332
57488          __cil_tmp67 = (bool )0;
57489#line 332
57490          ret = vmw_fifo_wait(dev_priv, bytes, __cil_tmp67, 750UL);
57491#line 334
57492          __cil_tmp68 = ret != 0;
57493#line 334
57494          __cil_tmp69 = ! __cil_tmp68;
57495#line 334
57496          __cil_tmp70 = ! __cil_tmp69;
57497#line 334
57498          __cil_tmp71 = (long )__cil_tmp70;
57499#line 334
57500          tmp___11 = __builtin_expect(__cil_tmp71, 0L);
57501          }
57502#line 334
57503          if (tmp___11) {
57504#line 335
57505            goto out_err;
57506          } else {
57507
57508          }
57509        } else {
57510#line 337
57511          need_bounce = (bool )1;
57512        }
57513      }
57514    } else {
57515      {
57516#line 341
57517      __cil_tmp72 = next_cmd + bytes;
57518#line 341
57519      __cil_tmp73 = __cil_tmp72 < stop;
57520#line 341
57521      __cil_tmp74 = ! __cil_tmp73;
57522#line 341
57523      __cil_tmp75 = ! __cil_tmp74;
57524#line 341
57525      __cil_tmp76 = (long )__cil_tmp75;
57526#line 341
57527      tmp___16 = __builtin_expect(__cil_tmp76, 1L);
57528      }
57529#line 341
57530      if (tmp___16) {
57531#line 342
57532        reserve_in_place = (bool )1;
57533      } else {
57534        {
57535#line 344
57536        __cil_tmp77 = (bool )0;
57537#line 344
57538        ret = vmw_fifo_wait(dev_priv, bytes, __cil_tmp77, 750UL);
57539#line 346
57540        __cil_tmp78 = ret != 0;
57541#line 346
57542        __cil_tmp79 = ! __cil_tmp78;
57543#line 346
57544        __cil_tmp80 = ! __cil_tmp79;
57545#line 346
57546        __cil_tmp81 = (long )__cil_tmp80;
57547#line 346
57548        tmp___15 = __builtin_expect(__cil_tmp81, 0L);
57549        }
57550#line 346
57551        if (tmp___15) {
57552#line 347
57553          goto out_err;
57554        } else {
57555
57556        }
57557      }
57558    }
57559#line 351
57560    if (reserve_in_place) {
57561#line 352
57562      if (reserveable) {
57563#line 352
57564        goto _L;
57565      } else {
57566        {
57567#line 352
57568        __cil_tmp82 = (unsigned long )bytes;
57569#line 352
57570        if (__cil_tmp82 <= 4UL) {
57571          _L: /* CIL Label */ 
57572#line 353
57573          __cil_tmp83 = (unsigned long )fifo_state;
57574#line 353
57575          __cil_tmp84 = __cil_tmp83 + 32;
57576#line 353
57577          *((bool *)__cil_tmp84) = (bool )0;
57578#line 355
57579          if (reserveable) {
57580            {
57581#line 356
57582            __cil_tmp85 = fifo_mem + 14;
57583#line 356
57584            __cil_tmp86 = (void *)__cil_tmp85;
57585#line 356
57586            iowrite32(bytes, __cil_tmp86);
57587            }
57588          } else {
57589
57590          }
57591          {
57592#line 358
57593          __cil_tmp87 = next_cmd >> 2;
57594#line 358
57595          __cil_tmp88 = fifo_mem + __cil_tmp87;
57596#line 358
57597          return ((void *)__cil_tmp88);
57598          }
57599        } else {
57600#line 360
57601          need_bounce = (bool )1;
57602        }
57603        }
57604      }
57605    } else {
57606
57607    }
57608#line 364
57609    if (need_bounce) {
57610#line 365
57611      __cil_tmp89 = (unsigned long )fifo_state;
57612#line 365
57613      __cil_tmp90 = __cil_tmp89 + 32;
57614#line 365
57615      *((bool *)__cil_tmp90) = (bool )1;
57616      {
57617#line 366
57618      __cil_tmp91 = (unsigned long )fifo_state;
57619#line 366
57620      __cil_tmp92 = __cil_tmp91 + 24;
57621#line 366
57622      __cil_tmp93 = *((unsigned long *)__cil_tmp92);
57623#line 366
57624      __cil_tmp94 = (unsigned long )bytes;
57625#line 366
57626      if (__cil_tmp94 < __cil_tmp93) {
57627        {
57628#line 367
57629        __cil_tmp95 = (unsigned long )fifo_state;
57630#line 367
57631        __cil_tmp96 = __cil_tmp95 + 16;
57632#line 367
57633        __cil_tmp97 = *((__le32 **)__cil_tmp96);
57634#line 367
57635        return ((void *)__cil_tmp97);
57636        }
57637      } else {
57638        {
57639#line 369
57640        __cil_tmp98 = (unsigned long )bytes;
57641#line 369
57642        tmp___17 = vmalloc(__cil_tmp98);
57643#line 369
57644        __cil_tmp99 = (unsigned long )fifo_state;
57645#line 369
57646        __cil_tmp100 = __cil_tmp99 + 8;
57647#line 369
57648        *((__le32 **)__cil_tmp100) = (__le32 *)tmp___17;
57649        }
57650        {
57651#line 370
57652        __cil_tmp101 = (unsigned long )fifo_state;
57653#line 370
57654        __cil_tmp102 = __cil_tmp101 + 8;
57655#line 370
57656        __cil_tmp103 = *((__le32 **)__cil_tmp102);
57657#line 370
57658        return ((void *)__cil_tmp103);
57659        }
57660      }
57661      }
57662    } else {
57663
57664    }
57665  }
57666  while_break___5: /* CIL Label */ ;
57667  }
57668  out_err: 
57669  {
57670#line 375
57671  *((unsigned long *)fifo_state) = 0UL;
57672#line 376
57673  __cil_tmp104 = (unsigned long )fifo_state;
57674#line 376
57675  __cil_tmp105 = __cil_tmp104 + 40;
57676#line 376
57677  __cil_tmp106 = (struct mutex *)__cil_tmp105;
57678#line 376
57679  mutex_unlock(__cil_tmp106);
57680  }
57681#line 377
57682  return ((void *)0);
57683}
57684}
57685#line 380 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
57686static void vmw_fifo_res_copy(struct vmw_fifo_state *fifo_state , __le32 *fifo_mem ,
57687                              uint32_t next_cmd , uint32_t max , uint32_t min , uint32_t bytes ) 
57688{ uint32_t chunk_size ;
57689  uint32_t rest ;
57690  uint32_t *buffer ;
57691  __le32 *tmp___7 ;
57692  void *__cil_tmp11 ;
57693  unsigned long __cil_tmp12 ;
57694  unsigned long __cil_tmp13 ;
57695  unsigned long __cil_tmp14 ;
57696  __le32 *__cil_tmp15 ;
57697  unsigned long __cil_tmp16 ;
57698  unsigned long __cil_tmp17 ;
57699  unsigned long __cil_tmp18 ;
57700  unsigned long __cil_tmp19 ;
57701  unsigned long __cil_tmp20 ;
57702  __le32 *__cil_tmp21 ;
57703  void *__cil_tmp22 ;
57704  uint32_t __cil_tmp23 ;
57705  __le32 *__cil_tmp24 ;
57706  void volatile   *__cil_tmp25 ;
57707  void    *__cil_tmp26 ;
57708  size_t __cil_tmp27 ;
57709  uint32_t __cil_tmp28 ;
57710  __le32 *__cil_tmp29 ;
57711  void volatile   *__cil_tmp30 ;
57712  uint32_t __cil_tmp31 ;
57713  uint32_t *__cil_tmp32 ;
57714  void    *__cil_tmp33 ;
57715  size_t __cil_tmp34 ;
57716
57717  {
57718#line 385
57719  chunk_size = max - next_cmd;
57720  {
57721#line 387
57722  __cil_tmp11 = (void *)0;
57723#line 387
57724  __cil_tmp12 = (unsigned long )__cil_tmp11;
57725#line 387
57726  __cil_tmp13 = (unsigned long )fifo_state;
57727#line 387
57728  __cil_tmp14 = __cil_tmp13 + 8;
57729#line 387
57730  __cil_tmp15 = *((__le32 **)__cil_tmp14);
57731#line 387
57732  __cil_tmp16 = (unsigned long )__cil_tmp15;
57733#line 387
57734  if (__cil_tmp16 != __cil_tmp12) {
57735#line 387
57736    __cil_tmp17 = (unsigned long )fifo_state;
57737#line 387
57738    __cil_tmp18 = __cil_tmp17 + 8;
57739#line 387
57740    tmp___7 = *((__le32 **)__cil_tmp18);
57741  } else {
57742#line 387
57743    __cil_tmp19 = (unsigned long )fifo_state;
57744#line 387
57745    __cil_tmp20 = __cil_tmp19 + 16;
57746#line 387
57747    tmp___7 = *((__le32 **)__cil_tmp20);
57748  }
57749  }
57750#line 387
57751  buffer = tmp___7;
57752#line 390
57753  if (bytes < chunk_size) {
57754#line 391
57755    chunk_size = bytes;
57756  } else {
57757
57758  }
57759  {
57760#line 393
57761  __cil_tmp21 = fifo_mem + 14;
57762#line 393
57763  __cil_tmp22 = (void *)__cil_tmp21;
57764#line 393
57765  iowrite32(bytes, __cil_tmp22);
57766#line 394
57767  __asm__  volatile   ("mfence": : : "memory");
57768#line 395
57769  __cil_tmp23 = next_cmd >> 2;
57770#line 395
57771  __cil_tmp24 = fifo_mem + __cil_tmp23;
57772#line 395
57773  __cil_tmp25 = (void volatile   *)__cil_tmp24;
57774#line 395
57775  __cil_tmp26 = (void    *)buffer;
57776#line 395
57777  __cil_tmp27 = (size_t )chunk_size;
57778#line 395
57779  memcpy_toio(__cil_tmp25, __cil_tmp26, __cil_tmp27);
57780#line 396
57781  rest = bytes - chunk_size;
57782  }
57783#line 397
57784  if (rest) {
57785    {
57786#line 398
57787    __cil_tmp28 = min >> 2;
57788#line 398
57789    __cil_tmp29 = fifo_mem + __cil_tmp28;
57790#line 398
57791    __cil_tmp30 = (void volatile   *)__cil_tmp29;
57792#line 398
57793    __cil_tmp31 = chunk_size >> 2;
57794#line 398
57795    __cil_tmp32 = buffer + __cil_tmp31;
57796#line 398
57797    __cil_tmp33 = (void    *)__cil_tmp32;
57798#line 398
57799    __cil_tmp34 = (size_t )rest;
57800#line 398
57801    memcpy_toio(__cil_tmp30, __cil_tmp33, __cil_tmp34);
57802    }
57803  } else {
57804
57805  }
57806#line 400
57807  return;
57808}
57809}
57810#line 402 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
57811static void vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state , __le32 *fifo_mem ,
57812                               uint32_t next_cmd , uint32_t max , uint32_t min , uint32_t bytes ) 
57813{ uint32_t *buffer ;
57814  __le32 *tmp___7 ;
57815  uint32_t *tmp___8 ;
57816  long tmp___9 ;
57817  void *__cil_tmp11 ;
57818  unsigned long __cil_tmp12 ;
57819  unsigned long __cil_tmp13 ;
57820  unsigned long __cil_tmp14 ;
57821  __le32 *__cil_tmp15 ;
57822  unsigned long __cil_tmp16 ;
57823  unsigned long __cil_tmp17 ;
57824  unsigned long __cil_tmp18 ;
57825  unsigned long __cil_tmp19 ;
57826  unsigned long __cil_tmp20 ;
57827  uint32_t __cil_tmp21 ;
57828  uint32_t __cil_tmp22 ;
57829  __le32 *__cil_tmp23 ;
57830  void *__cil_tmp24 ;
57831  unsigned long __cil_tmp25 ;
57832  unsigned long __cil_tmp26 ;
57833  int __cil_tmp27 ;
57834  int __cil_tmp28 ;
57835  int __cil_tmp29 ;
57836  long __cil_tmp30 ;
57837  __le32 *__cil_tmp31 ;
57838  void *__cil_tmp32 ;
57839  unsigned long __cil_tmp33 ;
57840  unsigned long __cil_tmp34 ;
57841
57842  {
57843  {
57844#line 407
57845  __cil_tmp11 = (void *)0;
57846#line 407
57847  __cil_tmp12 = (unsigned long )__cil_tmp11;
57848#line 407
57849  __cil_tmp13 = (unsigned long )fifo_state;
57850#line 407
57851  __cil_tmp14 = __cil_tmp13 + 8;
57852#line 407
57853  __cil_tmp15 = *((__le32 **)__cil_tmp14);
57854#line 407
57855  __cil_tmp16 = (unsigned long )__cil_tmp15;
57856#line 407
57857  if (__cil_tmp16 != __cil_tmp12) {
57858#line 407
57859    __cil_tmp17 = (unsigned long )fifo_state;
57860#line 407
57861    __cil_tmp18 = __cil_tmp17 + 8;
57862#line 407
57863    tmp___7 = *((__le32 **)__cil_tmp18);
57864  } else {
57865#line 407
57866    __cil_tmp19 = (unsigned long )fifo_state;
57867#line 407
57868    __cil_tmp20 = __cil_tmp19 + 16;
57869#line 407
57870    tmp___7 = *((__le32 **)__cil_tmp20);
57871  }
57872  }
57873#line 407
57874  buffer = tmp___7;
57875  {
57876#line 410
57877  while (1) {
57878    while_continue: /* CIL Label */ ;
57879#line 410
57880    if (bytes > 0U) {
57881
57882    } else {
57883#line 410
57884      goto while_break;
57885    }
57886    {
57887#line 411
57888    tmp___8 = buffer;
57889#line 411
57890    buffer = buffer + 1;
57891#line 411
57892    __cil_tmp21 = *tmp___8;
57893#line 411
57894    __cil_tmp22 = next_cmd >> 2;
57895#line 411
57896    __cil_tmp23 = fifo_mem + __cil_tmp22;
57897#line 411
57898    __cil_tmp24 = (void *)__cil_tmp23;
57899#line 411
57900    iowrite32(__cil_tmp21, __cil_tmp24);
57901#line 412
57902    __cil_tmp25 = (unsigned long )next_cmd;
57903#line 412
57904    __cil_tmp26 = __cil_tmp25 + 4UL;
57905#line 412
57906    next_cmd = (uint32_t )__cil_tmp26;
57907#line 413
57908    __cil_tmp27 = next_cmd == max;
57909#line 413
57910    __cil_tmp28 = ! __cil_tmp27;
57911#line 413
57912    __cil_tmp29 = ! __cil_tmp28;
57913#line 413
57914    __cil_tmp30 = (long )__cil_tmp29;
57915#line 413
57916    tmp___9 = __builtin_expect(__cil_tmp30, 0L);
57917    }
57918#line 413
57919    if (tmp___9) {
57920#line 414
57921      next_cmd = min;
57922    } else {
57923
57924    }
57925    {
57926#line 415
57927    __asm__  volatile   ("mfence": : : "memory");
57928#line 416
57929    __cil_tmp31 = fifo_mem + 2;
57930#line 416
57931    __cil_tmp32 = (void *)__cil_tmp31;
57932#line 416
57933    iowrite32(next_cmd, __cil_tmp32);
57934#line 417
57935    __asm__  volatile   ("mfence": : : "memory");
57936#line 418
57937    __cil_tmp33 = (unsigned long )bytes;
57938#line 418
57939    __cil_tmp34 = __cil_tmp33 - 4UL;
57940#line 418
57941    bytes = (uint32_t )__cil_tmp34;
57942    }
57943  }
57944  while_break: /* CIL Label */ ;
57945  }
57946#line 420
57947  return;
57948}
57949}
57950#line 422 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
57951void vmw_fifo_commit(struct vmw_private *dev_priv , uint32_t bytes ) 
57952{ struct vmw_fifo_state *fifo_state ;
57953  __le32 *fifo_mem ;
57954  uint32_t next_cmd ;
57955  unsigned int tmp___7 ;
57956  uint32_t max ;
57957  unsigned int tmp___8 ;
57958  uint32_t min ;
57959  unsigned int tmp___9 ;
57960  bool reserveable ;
57961  long tmp___10 ;
57962  long tmp___11 ;
57963  unsigned long __cil_tmp14 ;
57964  unsigned long __cil_tmp15 ;
57965  unsigned long __cil_tmp16 ;
57966  unsigned long __cil_tmp17 ;
57967  __le32 *__cil_tmp18 ;
57968  void *__cil_tmp19 ;
57969  __le32 *__cil_tmp20 ;
57970  void *__cil_tmp21 ;
57971  __le32 *__cil_tmp22 ;
57972  void *__cil_tmp23 ;
57973  int __cil_tmp24 ;
57974  unsigned int __cil_tmp25 ;
57975  unsigned long __cil_tmp26 ;
57976  unsigned long __cil_tmp27 ;
57977  uint32_t __cil_tmp28 ;
57978  unsigned int __cil_tmp29 ;
57979  unsigned int __cil_tmp30 ;
57980  int __cil_tmp31 ;
57981  int __cil_tmp32 ;
57982  int __cil_tmp33 ;
57983  long __cil_tmp34 ;
57984  unsigned long __cil_tmp35 ;
57985  unsigned long __cil_tmp36 ;
57986  int __cil_tmp37 ;
57987  int __cil_tmp38 ;
57988  int __cil_tmp39 ;
57989  long __cil_tmp40 ;
57990  unsigned long __cil_tmp41 ;
57991  unsigned long __cil_tmp42 ;
57992  unsigned long __cil_tmp43 ;
57993  unsigned long __cil_tmp44 ;
57994  unsigned long __cil_tmp45 ;
57995  unsigned long __cil_tmp46 ;
57996  __le32 *__cil_tmp47 ;
57997  void    *__cil_tmp48 ;
57998  unsigned long __cil_tmp49 ;
57999  unsigned long __cil_tmp50 ;
58000  void *__cil_tmp51 ;
58001  unsigned long __cil_tmp52 ;
58002  unsigned long __cil_tmp53 ;
58003  struct rw_semaphore *__cil_tmp54 ;
58004  unsigned long __cil_tmp55 ;
58005  unsigned long __cil_tmp56 ;
58006  uint32_t __cil_tmp57 ;
58007  __le32 *__cil_tmp58 ;
58008  void *__cil_tmp59 ;
58009  u32 __cil_tmp60 ;
58010  __le32 *__cil_tmp61 ;
58011  void *__cil_tmp62 ;
58012  unsigned long __cil_tmp63 ;
58013  unsigned long __cil_tmp64 ;
58014  struct rw_semaphore *__cil_tmp65 ;
58015  uint32_t __cil_tmp66 ;
58016  unsigned long __cil_tmp67 ;
58017  unsigned long __cil_tmp68 ;
58018  struct mutex *__cil_tmp69 ;
58019
58020  {
58021  {
58022#line 424
58023  __cil_tmp14 = (unsigned long )dev_priv;
58024#line 424
58025  __cil_tmp15 = __cil_tmp14 + 1856;
58026#line 424
58027  fifo_state = (struct vmw_fifo_state *)__cil_tmp15;
58028#line 425
58029  __cil_tmp16 = (unsigned long )dev_priv;
58030#line 425
58031  __cil_tmp17 = __cil_tmp16 + 2144;
58032#line 425
58033  fifo_mem = *((__le32 **)__cil_tmp17);
58034#line 426
58035  __cil_tmp18 = fifo_mem + 2;
58036#line 426
58037  __cil_tmp19 = (void *)__cil_tmp18;
58038#line 426
58039  tmp___7 = ioread32(__cil_tmp19);
58040#line 426
58041  next_cmd = tmp___7;
58042#line 427
58043  __cil_tmp20 = fifo_mem + 1;
58044#line 427
58045  __cil_tmp21 = (void *)__cil_tmp20;
58046#line 427
58047  tmp___8 = ioread32(__cil_tmp21);
58048#line 427
58049  max = tmp___8;
58050#line 428
58051  __cil_tmp22 = fifo_mem + 0;
58052#line 428
58053  __cil_tmp23 = (void *)__cil_tmp22;
58054#line 428
58055  tmp___9 = ioread32(__cil_tmp23);
58056#line 428
58057  min = tmp___9;
58058#line 429
58059  __cil_tmp24 = 1 << 6;
58060#line 429
58061  __cil_tmp25 = (unsigned int )__cil_tmp24;
58062#line 429
58063  __cil_tmp26 = (unsigned long )fifo_state;
58064#line 429
58065  __cil_tmp27 = __cil_tmp26 + 36;
58066#line 429
58067  __cil_tmp28 = *((uint32_t *)__cil_tmp27);
58068#line 429
58069  __cil_tmp29 = __cil_tmp28 & __cil_tmp25;
58070#line 429
58071  reserveable = (bool )__cil_tmp29;
58072  }
58073  {
58074#line 431
58075  while (1) {
58076    while_continue: /* CIL Label */ ;
58077    {
58078#line 431
58079    __cil_tmp30 = bytes & 3U;
58080#line 431
58081    __cil_tmp31 = __cil_tmp30 != 0U;
58082#line 431
58083    __cil_tmp32 = ! __cil_tmp31;
58084#line 431
58085    __cil_tmp33 = ! __cil_tmp32;
58086#line 431
58087    __cil_tmp34 = (long )__cil_tmp33;
58088#line 431
58089    tmp___10 = __builtin_expect(__cil_tmp34, 0L);
58090    }
58091#line 431
58092    if (tmp___10) {
58093      {
58094#line 431
58095      while (1) {
58096        while_continue___0: /* CIL Label */ ;
58097#line 431
58098        __asm__  volatile   ("1:\tud2\n"
58099                             ".pushsection __bug_table,\"a\"\n"
58100                             "2:\t.long 1b - 2b, %c0 - 2b\n"
58101                             "\t.word %c1, 0\n"
58102                             "\t.org 2b+%c2\n"
58103                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"),
58104                             "i" (431), "i" (12UL));
58105        {
58106#line 431
58107        while (1) {
58108          while_continue___1: /* CIL Label */ ;
58109        }
58110        while_break___1: /* CIL Label */ ;
58111        }
58112#line 431
58113        goto while_break___0;
58114      }
58115      while_break___0: /* CIL Label */ ;
58116      }
58117    } else {
58118
58119    }
58120#line 431
58121    goto while_break;
58122  }
58123  while_break: /* CIL Label */ ;
58124  }
58125  {
58126#line 432
58127  while (1) {
58128    while_continue___2: /* CIL Label */ ;
58129    {
58130#line 432
58131    __cil_tmp35 = *((unsigned long *)fifo_state);
58132#line 432
58133    __cil_tmp36 = (unsigned long )bytes;
58134#line 432
58135    __cil_tmp37 = __cil_tmp36 > __cil_tmp35;
58136#line 432
58137    __cil_tmp38 = ! __cil_tmp37;
58138#line 432
58139    __cil_tmp39 = ! __cil_tmp38;
58140#line 432
58141    __cil_tmp40 = (long )__cil_tmp39;
58142#line 432
58143    tmp___11 = __builtin_expect(__cil_tmp40, 0L);
58144    }
58145#line 432
58146    if (tmp___11) {
58147      {
58148#line 432
58149      while (1) {
58150        while_continue___3: /* CIL Label */ ;
58151#line 432
58152        __asm__  volatile   ("1:\tud2\n"
58153                             ".pushsection __bug_table,\"a\"\n"
58154                             "2:\t.long 1b - 2b, %c0 - 2b\n"
58155                             "\t.word %c1, 0\n"
58156                             "\t.org 2b+%c2\n"
58157                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"),
58158                             "i" (432), "i" (12UL));
58159        {
58160#line 432
58161        while (1) {
58162          while_continue___4: /* CIL Label */ ;
58163        }
58164        while_break___4: /* CIL Label */ ;
58165        }
58166#line 432
58167        goto while_break___3;
58168      }
58169      while_break___3: /* CIL Label */ ;
58170      }
58171    } else {
58172
58173    }
58174#line 432
58175    goto while_break___2;
58176  }
58177  while_break___2: /* CIL Label */ ;
58178  }
58179#line 434
58180  *((unsigned long *)fifo_state) = 0UL;
58181  {
58182#line 436
58183  __cil_tmp41 = (unsigned long )fifo_state;
58184#line 436
58185  __cil_tmp42 = __cil_tmp41 + 32;
58186#line 436
58187  if (*((bool *)__cil_tmp42)) {
58188#line 437
58189    if (reserveable) {
58190      {
58191#line 438
58192      vmw_fifo_res_copy(fifo_state, fifo_mem, next_cmd, max, min, bytes);
58193      }
58194    } else {
58195      {
58196#line 441
58197      vmw_fifo_slow_copy(fifo_state, fifo_mem, next_cmd, max, min, bytes);
58198      }
58199    }
58200    {
58201#line 444
58202    __cil_tmp43 = (unsigned long )fifo_state;
58203#line 444
58204    __cil_tmp44 = __cil_tmp43 + 8;
58205#line 444
58206    if (*((__le32 **)__cil_tmp44)) {
58207      {
58208#line 445
58209      __cil_tmp45 = (unsigned long )fifo_state;
58210#line 445
58211      __cil_tmp46 = __cil_tmp45 + 8;
58212#line 445
58213      __cil_tmp47 = *((__le32 **)__cil_tmp46);
58214#line 445
58215      __cil_tmp48 = (void    *)__cil_tmp47;
58216#line 445
58217      vfree(__cil_tmp48);
58218#line 446
58219      __cil_tmp49 = (unsigned long )fifo_state;
58220#line 446
58221      __cil_tmp50 = __cil_tmp49 + 8;
58222#line 446
58223      __cil_tmp51 = (void *)0;
58224#line 446
58225      *((__le32 **)__cil_tmp50) = (__le32 *)__cil_tmp51;
58226      }
58227    } else {
58228
58229    }
58230    }
58231  } else {
58232
58233  }
58234  }
58235  {
58236#line 451
58237  __cil_tmp52 = (unsigned long )fifo_state;
58238#line 451
58239  __cil_tmp53 = __cil_tmp52 + 112;
58240#line 451
58241  __cil_tmp54 = (struct rw_semaphore *)__cil_tmp53;
58242#line 451
58243  down_write(__cil_tmp54);
58244  }
58245  {
58246#line 452
58247  __cil_tmp55 = (unsigned long )fifo_state;
58248#line 452
58249  __cil_tmp56 = __cil_tmp55 + 32;
58250#line 452
58251  if (*((bool *)__cil_tmp56)) {
58252#line 452
58253    goto _L;
58254  } else
58255#line 452
58256  if (reserveable) {
58257    _L: /* CIL Label */ 
58258#line 453
58259    next_cmd = next_cmd + bytes;
58260#line 454
58261    if (next_cmd >= max) {
58262#line 455
58263      __cil_tmp57 = max - min;
58264#line 455
58265      next_cmd = next_cmd - __cil_tmp57;
58266    } else {
58267
58268    }
58269    {
58270#line 456
58271    __asm__  volatile   ("mfence": : : "memory");
58272#line 457
58273    __cil_tmp58 = fifo_mem + 2;
58274#line 457
58275    __cil_tmp59 = (void *)__cil_tmp58;
58276#line 457
58277    iowrite32(next_cmd, __cil_tmp59);
58278    }
58279  } else {
58280
58281  }
58282  }
58283#line 460
58284  if (reserveable) {
58285    {
58286#line 461
58287    __cil_tmp60 = (u32 )0;
58288#line 461
58289    __cil_tmp61 = fifo_mem + 14;
58290#line 461
58291    __cil_tmp62 = (void *)__cil_tmp61;
58292#line 461
58293    iowrite32(__cil_tmp60, __cil_tmp62);
58294    }
58295  } else {
58296
58297  }
58298  {
58299#line 462
58300  __asm__  volatile   ("mfence": : : "memory");
58301#line 463
58302  __cil_tmp63 = (unsigned long )fifo_state;
58303#line 463
58304  __cil_tmp64 = __cil_tmp63 + 112;
58305#line 463
58306  __cil_tmp65 = (struct rw_semaphore *)__cil_tmp64;
58307#line 463
58308  up_write(__cil_tmp65);
58309#line 464
58310  __cil_tmp66 = (uint32_t )1;
58311#line 464
58312  vmw_fifo_ping_host(dev_priv, __cil_tmp66);
58313#line 465
58314  __cil_tmp67 = (unsigned long )fifo_state;
58315#line 465
58316  __cil_tmp68 = __cil_tmp67 + 40;
58317#line 465
58318  __cil_tmp69 = (struct mutex *)__cil_tmp68;
58319#line 465
58320  mutex_unlock(__cil_tmp69);
58321  }
58322#line 466
58323  return;
58324}
58325}
58326#line 468 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
58327int vmw_fifo_send_fence(struct vmw_private *dev_priv , uint32_t *seqno ) 
58328{ struct vmw_fifo_state *fifo_state ;
58329  struct svga_fifo_cmd_fence *cmd_fence ;
58330  void *fm ;
58331  int ret ;
58332  uint32_t bytes ;
58333  int tmp___7 ;
58334  long tmp___8 ;
58335  int tmp___9 ;
58336  unsigned long __cil_tmp11 ;
58337  unsigned long __cil_tmp12 ;
58338  unsigned long __cil_tmp13 ;
58339  void *__cil_tmp14 ;
58340  unsigned long __cil_tmp15 ;
58341  unsigned long __cil_tmp16 ;
58342  int __cil_tmp17 ;
58343  int __cil_tmp18 ;
58344  int __cil_tmp19 ;
58345  long __cil_tmp20 ;
58346  unsigned long __cil_tmp21 ;
58347  unsigned long __cil_tmp22 ;
58348  atomic_t *__cil_tmp23 ;
58349  atomic_t    *__cil_tmp24 ;
58350  bool __cil_tmp25 ;
58351  bool __cil_tmp26 ;
58352  uint32_t __cil_tmp27 ;
58353  bool __cil_tmp28 ;
58354  unsigned long __cil_tmp29 ;
58355  unsigned long __cil_tmp30 ;
58356  atomic_t *__cil_tmp31 ;
58357  uint32_t __cil_tmp32 ;
58358  unsigned long __cil_tmp33 ;
58359  unsigned long __cil_tmp34 ;
58360  uint32_t __cil_tmp35 ;
58361  unsigned int __cil_tmp36 ;
58362  uint32_t __cil_tmp37 ;
58363  __le32 *__cil_tmp38 ;
58364  unsigned long __cil_tmp39 ;
58365  unsigned long __cil_tmp40 ;
58366  uint32_t __cil_tmp41 ;
58367  __le32 *__cil_tmp42 ;
58368  void *__cil_tmp43 ;
58369  unsigned long __cil_tmp44 ;
58370  unsigned long __cil_tmp45 ;
58371  struct vmw_marker_queue *__cil_tmp46 ;
58372  uint32_t __cil_tmp47 ;
58373
58374  {
58375  {
58376#line 470
58377  __cil_tmp11 = (unsigned long )dev_priv;
58378#line 470
58379  __cil_tmp12 = __cil_tmp11 + 1856;
58380#line 470
58381  fifo_state = (struct vmw_fifo_state *)__cil_tmp12;
58382#line 473
58383  ret = 0;
58384#line 474
58385  __cil_tmp13 = 4UL + 4UL;
58386#line 474
58387  bytes = (uint32_t )__cil_tmp13;
58388#line 476
58389  fm = vmw_fifo_reserve(dev_priv, bytes);
58390#line 477
58391  __cil_tmp14 = (void *)0;
58392#line 477
58393  __cil_tmp15 = (unsigned long )__cil_tmp14;
58394#line 477
58395  __cil_tmp16 = (unsigned long )fm;
58396#line 477
58397  __cil_tmp17 = __cil_tmp16 == __cil_tmp15;
58398#line 477
58399  __cil_tmp18 = ! __cil_tmp17;
58400#line 477
58401  __cil_tmp19 = ! __cil_tmp18;
58402#line 477
58403  __cil_tmp20 = (long )__cil_tmp19;
58404#line 477
58405  tmp___8 = __builtin_expect(__cil_tmp20, 0L);
58406  }
58407#line 477
58408  if (tmp___8) {
58409    {
58410#line 478
58411    __cil_tmp21 = (unsigned long )dev_priv;
58412#line 478
58413    __cil_tmp22 = __cil_tmp21 + 2880;
58414#line 478
58415    __cil_tmp23 = (atomic_t *)__cil_tmp22;
58416#line 478
58417    __cil_tmp24 = (atomic_t    *)__cil_tmp23;
58418#line 478
58419    tmp___7 = atomic_read(__cil_tmp24);
58420#line 478
58421    *seqno = (uint32_t )tmp___7;
58422#line 479
58423    ret = -12;
58424#line 480
58425    __cil_tmp25 = (bool )0;
58426#line 480
58427    __cil_tmp26 = (bool )1;
58428#line 480
58429    __cil_tmp27 = *seqno;
58430#line 480
58431    __cil_tmp28 = (bool )0;
58432#line 480
58433    vmw_fallback_wait(dev_priv, __cil_tmp25, __cil_tmp26, __cil_tmp27, __cil_tmp28,
58434                      750UL);
58435    }
58436#line 482
58437    goto out_err;
58438  } else {
58439
58440  }
58441  {
58442#line 485
58443  while (1) {
58444    while_continue: /* CIL Label */ ;
58445    {
58446#line 486
58447    __cil_tmp29 = (unsigned long )dev_priv;
58448#line 486
58449    __cil_tmp30 = __cil_tmp29 + 2880;
58450#line 486
58451    __cil_tmp31 = (atomic_t *)__cil_tmp30;
58452#line 486
58453    tmp___9 = atomic_add_return(1, __cil_tmp31);
58454#line 486
58455    *seqno = (uint32_t )tmp___9;
58456    }
58457    {
58458#line 485
58459    __cil_tmp32 = *seqno;
58460#line 485
58461    if (__cil_tmp32 == 0U) {
58462
58463    } else {
58464#line 485
58465      goto while_break;
58466    }
58467    }
58468  }
58469  while_break: /* CIL Label */ ;
58470  }
58471  {
58472#line 489
58473  __cil_tmp33 = (unsigned long )fifo_state;
58474#line 489
58475  __cil_tmp34 = __cil_tmp33 + 36;
58476#line 489
58477  __cil_tmp35 = *((uint32_t *)__cil_tmp34);
58478#line 489
58479  __cil_tmp36 = __cil_tmp35 & 1U;
58480#line 489
58481  if (! __cil_tmp36) {
58482    {
58483#line 496
58484    __cil_tmp37 = (uint32_t )0;
58485#line 496
58486    vmw_fifo_commit(dev_priv, __cil_tmp37);
58487    }
58488#line 497
58489    return (0);
58490  } else {
58491
58492  }
58493  }
58494  {
58495#line 500
58496  __cil_tmp38 = (__le32 *)fm;
58497#line 500
58498  *__cil_tmp38 = (__u32 )30;
58499#line 501
58500  __cil_tmp39 = (unsigned long )fm;
58501#line 501
58502  __cil_tmp40 = __cil_tmp39 + 4UL;
58503#line 501
58504  cmd_fence = (struct svga_fifo_cmd_fence *)__cil_tmp40;
58505#line 504
58506  __cil_tmp41 = *seqno;
58507#line 504
58508  __cil_tmp42 = (__le32 *)cmd_fence;
58509#line 504
58510  __cil_tmp43 = (void *)__cil_tmp42;
58511#line 504
58512  iowrite32(__cil_tmp41, __cil_tmp43);
58513#line 505
58514  vmw_fifo_commit(dev_priv, bytes);
58515#line 506
58516  __cil_tmp44 = (unsigned long )fifo_state;
58517#line 506
58518  __cil_tmp45 = __cil_tmp44 + 160;
58519#line 506
58520  __cil_tmp46 = (struct vmw_marker_queue *)__cil_tmp45;
58521#line 506
58522  __cil_tmp47 = *seqno;
58523#line 506
58524  vmw_marker_push(__cil_tmp46, __cil_tmp47);
58525#line 507
58526  vmw_update_seqno(dev_priv, fifo_state);
58527  }
58528  out_err: 
58529#line 510
58530  return (ret);
58531}
58532}
58533#line 530 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c"
58534int vmw_fifo_emit_dummy_query(struct vmw_private *dev_priv , uint32_t cid ) 
58535{ struct ttm_buffer_object *bo ;
58536  struct __anonstruct_cmd_429___2 *cmd ;
58537  void *tmp___7 ;
58538  long tmp___8 ;
58539  unsigned long __cil_tmp7 ;
58540  unsigned long __cil_tmp8 ;
58541  uint32_t __cil_tmp9 ;
58542  void *__cil_tmp10 ;
58543  unsigned long __cil_tmp11 ;
58544  unsigned long __cil_tmp12 ;
58545  int __cil_tmp13 ;
58546  int __cil_tmp14 ;
58547  int __cil_tmp15 ;
58548  long __cil_tmp16 ;
58549  unsigned long __cil_tmp17 ;
58550  unsigned long __cil_tmp18 ;
58551  unsigned long __cil_tmp19 ;
58552  unsigned long __cil_tmp20 ;
58553  unsigned long __cil_tmp21 ;
58554  unsigned long __cil_tmp22 ;
58555  unsigned long __cil_tmp23 ;
58556  unsigned long __cil_tmp24 ;
58557  unsigned long __cil_tmp25 ;
58558  unsigned long __cil_tmp26 ;
58559  unsigned long __cil_tmp27 ;
58560  uint32_t __cil_tmp28 ;
58561  unsigned long __cil_tmp29 ;
58562  unsigned long __cil_tmp30 ;
58563  unsigned long __cil_tmp31 ;
58564  unsigned long __cil_tmp32 ;
58565  unsigned long __cil_tmp33 ;
58566  unsigned long __cil_tmp34 ;
58567  unsigned long __cil_tmp35 ;
58568  unsigned long __cil_tmp36 ;
58569  unsigned long __cil_tmp37 ;
58570  unsigned long __cil_tmp38 ;
58571  unsigned long __cil_tmp39 ;
58572  unsigned long __cil_tmp40 ;
58573  unsigned long __cil_tmp41 ;
58574  unsigned long __cil_tmp42 ;
58575  unsigned long __cil_tmp43 ;
58576  unsigned long __cil_tmp44 ;
58577  unsigned long __cil_tmp45 ;
58578  unsigned long __cil_tmp46 ;
58579  unsigned long __cil_tmp47 ;
58580  unsigned long __cil_tmp48 ;
58581  unsigned long __cil_tmp49 ;
58582  uint32_t __cil_tmp50 ;
58583
58584  {
58585  {
58586#line 539
58587  __cil_tmp7 = (unsigned long )dev_priv;
58588#line 539
58589  __cil_tmp8 = __cil_tmp7 + 134744;
58590#line 539
58591  bo = *((struct ttm_buffer_object **)__cil_tmp8);
58592#line 545
58593  __cil_tmp9 = (uint32_t )24UL;
58594#line 545
58595  tmp___7 = vmw_fifo_reserve(dev_priv, __cil_tmp9);
58596#line 545
58597  cmd = (struct __anonstruct_cmd_429___2 *)tmp___7;
58598#line 547
58599  __cil_tmp10 = (void *)0;
58600#line 547
58601  __cil_tmp11 = (unsigned long )__cil_tmp10;
58602#line 547
58603  __cil_tmp12 = (unsigned long )cmd;
58604#line 547
58605  __cil_tmp13 = __cil_tmp12 == __cil_tmp11;
58606#line 547
58607  __cil_tmp14 = ! __cil_tmp13;
58608#line 547
58609  __cil_tmp15 = ! __cil_tmp14;
58610#line 547
58611  __cil_tmp16 = (long )__cil_tmp15;
58612#line 547
58613  tmp___8 = __builtin_expect(__cil_tmp16, 0L);
58614  }
58615#line 547
58616  if (tmp___8) {
58617    {
58618#line 548
58619    drm_err("vmw_fifo_emit_dummy_query", "Out of fifo space for dummy query.\n");
58620    }
58621#line 549
58622    return (-12);
58623  } else {
58624
58625  }
58626#line 552
58627  *((uint32 *)cmd) = (uint32 )1067;
58628#line 553
58629  __cil_tmp17 = 0 + 4;
58630#line 553
58631  __cil_tmp18 = (unsigned long )cmd;
58632#line 553
58633  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
58634#line 553
58635  *((uint32 *)__cil_tmp19) = (uint32 )16UL;
58636#line 554
58637  __cil_tmp20 = (unsigned long )cmd;
58638#line 554
58639  __cil_tmp21 = __cil_tmp20 + 8;
58640#line 554
58641  *((uint32 *)__cil_tmp21) = cid;
58642#line 555
58643  __cil_tmp22 = 8 + 4;
58644#line 555
58645  __cil_tmp23 = (unsigned long )cmd;
58646#line 555
58647  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
58648#line 555
58649  *((SVGA3dQueryType *)__cil_tmp24) = (SVGA3dQueryType )0;
58650  {
58651#line 557
58652  __cil_tmp25 = 112 + 36;
58653#line 557
58654  __cil_tmp26 = (unsigned long )bo;
58655#line 557
58656  __cil_tmp27 = __cil_tmp26 + __cil_tmp25;
58657#line 557
58658  __cil_tmp28 = *((uint32_t *)__cil_tmp27);
58659#line 557
58660  if (__cil_tmp28 == 2U) {
58661#line 558
58662    __cil_tmp29 = 8 + 8;
58663#line 558
58664    __cil_tmp30 = (unsigned long )cmd;
58665#line 558
58666    __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
58667#line 558
58668    *((uint32 *)__cil_tmp31) = (uint32 )-2;
58669#line 559
58670    __cil_tmp32 = 8 + 4;
58671#line 559
58672    __cil_tmp33 = 8 + __cil_tmp32;
58673#line 559
58674    __cil_tmp34 = (unsigned long )cmd;
58675#line 559
58676    __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
58677#line 559
58678    __cil_tmp36 = (unsigned long )bo;
58679#line 559
58680    __cil_tmp37 = __cil_tmp36 + 368;
58681#line 559
58682    __cil_tmp38 = *((unsigned long *)__cil_tmp37);
58683#line 559
58684    *((uint32 *)__cil_tmp35) = (uint32 )__cil_tmp38;
58685  } else {
58686#line 561
58687    __cil_tmp39 = 8 + 8;
58688#line 561
58689    __cil_tmp40 = (unsigned long )cmd;
58690#line 561
58691    __cil_tmp41 = __cil_tmp40 + __cil_tmp39;
58692#line 561
58693    __cil_tmp42 = 112 + 8;
58694#line 561
58695    __cil_tmp43 = (unsigned long )bo;
58696#line 561
58697    __cil_tmp44 = __cil_tmp43 + __cil_tmp42;
58698#line 561
58699    __cil_tmp45 = *((unsigned long *)__cil_tmp44);
58700#line 561
58701    *((uint32 *)__cil_tmp41) = (uint32 )__cil_tmp45;
58702#line 562
58703    __cil_tmp46 = 8 + 4;
58704#line 562
58705    __cil_tmp47 = 8 + __cil_tmp46;
58706#line 562
58707    __cil_tmp48 = (unsigned long )cmd;
58708#line 562
58709    __cil_tmp49 = __cil_tmp48 + __cil_tmp47;
58710#line 562
58711    *((uint32 *)__cil_tmp49) = (uint32 )0;
58712  }
58713  }
58714  {
58715#line 565
58716  __cil_tmp50 = (uint32_t )24UL;
58717#line 565
58718  vmw_fifo_commit(dev_priv, __cil_tmp50);
58719  }
58720#line 567
58721  return (0);
58722}
58723}
58724#line 80 "include/linux/rwsem.h"
58725extern void down_read(struct rw_semaphore *sem ) ;
58726#line 100
58727extern void up_read(struct rw_semaphore *sem ) ;
58728#line 362 "include/linux/sched.h"
58729extern void schedule(void) ;
58730#line 75 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h"
58731void vmw_fences_update(struct vmw_fence_manager *fman ) ;
58732#line 563 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
58733int vmw_wait_seqno(struct vmw_private *dev_priv , bool lazy , uint32_t seqno , bool interruptible ,
58734                   unsigned long timeout ) ;
58735#line 569
58736bool vmw_seqno_passed(struct vmw_private *dev_priv , uint32_t seqno ) ;
58737#line 579
58738void vmw_seqno_waiter_add(struct vmw_private *dev_priv ) ;
58739#line 580
58740void vmw_seqno_waiter_remove(struct vmw_private *dev_priv ) ;
58741#line 581
58742void vmw_goal_waiter_add(struct vmw_private *dev_priv ) ;
58743#line 582
58744void vmw_goal_waiter_remove(struct vmw_private *dev_priv ) ;
58745#line 593
58746int vmw_marker_pull(struct vmw_marker_queue *queue , uint32_t signaled_seqno ) ;
58747#line 33 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
58748irqreturn_t vmw_irq_handler(int irq , void *arg ) 
58749{ struct drm_device *dev ;
58750  struct vmw_private *dev_priv ;
58751  struct vmw_private *tmp___7 ;
58752  uint32_t status ;
58753  uint32_t masked_status ;
58754  long tmp___8 ;
58755  unsigned long __cil_tmp9 ;
58756  unsigned long __cil_tmp10 ;
58757  spinlock_t *__cil_tmp11 ;
58758  unsigned long __cil_tmp12 ;
58759  unsigned long __cil_tmp13 ;
58760  unsigned int __cil_tmp14 ;
58761  unsigned int __cil_tmp15 ;
58762  int __cil_tmp16 ;
58763  unsigned long __cil_tmp17 ;
58764  unsigned long __cil_tmp18 ;
58765  uint32_t __cil_tmp19 ;
58766  unsigned long __cil_tmp20 ;
58767  unsigned long __cil_tmp21 ;
58768  spinlock_t *__cil_tmp22 ;
58769  int __cil_tmp23 ;
58770  int __cil_tmp24 ;
58771  long __cil_tmp25 ;
58772  unsigned long __cil_tmp26 ;
58773  unsigned long __cil_tmp27 ;
58774  unsigned int __cil_tmp28 ;
58775  unsigned int __cil_tmp29 ;
58776  int __cil_tmp30 ;
58777  unsigned long __cil_tmp31 ;
58778  unsigned long __cil_tmp32 ;
58779  struct vmw_fence_manager *__cil_tmp33 ;
58780  unsigned long __cil_tmp34 ;
58781  unsigned long __cil_tmp35 ;
58782  wait_queue_head_t *__cil_tmp36 ;
58783  void *__cil_tmp37 ;
58784  unsigned long __cil_tmp38 ;
58785  unsigned long __cil_tmp39 ;
58786  wait_queue_head_t *__cil_tmp40 ;
58787  void *__cil_tmp41 ;
58788
58789  {
58790  {
58791#line 35
58792  dev = (struct drm_device *)arg;
58793#line 36
58794  tmp___7 = vmw_priv(dev);
58795#line 36
58796  dev_priv = tmp___7;
58797#line 39
58798  __cil_tmp9 = (unsigned long )dev_priv;
58799#line 39
58800  __cil_tmp10 = __cil_tmp9 + 2984;
58801#line 39
58802  __cil_tmp11 = (spinlock_t *)__cil_tmp10;
58803#line 39
58804  spin_lock(__cil_tmp11);
58805#line 40
58806  __cil_tmp12 = (unsigned long )dev_priv;
58807#line 40
58808  __cil_tmp13 = __cil_tmp12 + 2104;
58809#line 40
58810  __cil_tmp14 = *((unsigned int *)__cil_tmp13);
58811#line 40
58812  __cil_tmp15 = __cil_tmp14 + 8U;
58813#line 40
58814  __cil_tmp16 = (int )__cil_tmp15;
58815#line 40
58816  status = inl(__cil_tmp16);
58817#line 41
58818  __cil_tmp17 = (unsigned long )dev_priv;
58819#line 41
58820  __cil_tmp18 = __cil_tmp17 + 3016;
58821#line 41
58822  __cil_tmp19 = *((uint32_t *)__cil_tmp18);
58823#line 41
58824  masked_status = status & __cil_tmp19;
58825#line 42
58826  __cil_tmp20 = (unsigned long )dev_priv;
58827#line 42
58828  __cil_tmp21 = __cil_tmp20 + 2984;
58829#line 42
58830  __cil_tmp22 = (spinlock_t *)__cil_tmp21;
58831#line 42
58832  spin_unlock(__cil_tmp22);
58833#line 44
58834  __cil_tmp23 = ! status;
58835#line 44
58836  __cil_tmp24 = ! __cil_tmp23;
58837#line 44
58838  __cil_tmp25 = (long )__cil_tmp24;
58839#line 44
58840  tmp___8 = __builtin_expect(__cil_tmp25, 1L);
58841  }
58842#line 44
58843  if (tmp___8) {
58844    {
58845#line 45
58846    __cil_tmp26 = (unsigned long )dev_priv;
58847#line 45
58848    __cil_tmp27 = __cil_tmp26 + 2104;
58849#line 45
58850    __cil_tmp28 = *((unsigned int *)__cil_tmp27);
58851#line 45
58852    __cil_tmp29 = __cil_tmp28 + 8U;
58853#line 45
58854    __cil_tmp30 = (int )__cil_tmp29;
58855#line 45
58856    outl(status, __cil_tmp30);
58857    }
58858  } else {
58859
58860  }
58861#line 47
58862  if (! masked_status) {
58863#line 48
58864    return ((irqreturn_t )0);
58865  } else {
58866
58867  }
58868#line 50
58869  if (masked_status & 5U) {
58870    {
58871#line 52
58872    __cil_tmp31 = (unsigned long )dev_priv;
58873#line 52
58874    __cil_tmp32 = __cil_tmp31 + 3008;
58875#line 52
58876    __cil_tmp33 = *((struct vmw_fence_manager **)__cil_tmp32);
58877#line 52
58878    vmw_fences_update(__cil_tmp33);
58879#line 53
58880    __cil_tmp34 = (unsigned long )dev_priv;
58881#line 53
58882    __cil_tmp35 = __cil_tmp34 + 2888;
58883#line 53
58884    __cil_tmp36 = (wait_queue_head_t *)__cil_tmp35;
58885#line 53
58886    __cil_tmp37 = (void *)0;
58887#line 53
58888    __wake_up(__cil_tmp36, 3U, 0, __cil_tmp37);
58889    }
58890  } else {
58891
58892  }
58893#line 56
58894  if (masked_status & 2U) {
58895    {
58896#line 57
58897    __cil_tmp38 = (unsigned long )dev_priv;
58898#line 57
58899    __cil_tmp39 = __cil_tmp38 + 2928;
58900#line 57
58901    __cil_tmp40 = (wait_queue_head_t *)__cil_tmp39;
58902#line 57
58903    __cil_tmp41 = (void *)0;
58904#line 57
58905    __wake_up(__cil_tmp40, 3U, 0, __cil_tmp41);
58906    }
58907  } else {
58908
58909  }
58910#line 60
58911  return ((irqreturn_t )1);
58912}
58913}
58914#line 63 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
58915static bool vmw_fifo_idle(struct vmw_private *dev_priv , uint32_t seqno ) 
58916{ uint32_t busy ;
58917  unsigned long __cil_tmp4 ;
58918  unsigned long __cil_tmp5 ;
58919  struct mutex *__cil_tmp6 ;
58920  unsigned long __cil_tmp7 ;
58921  unsigned long __cil_tmp8 ;
58922  struct mutex *__cil_tmp9 ;
58923  int __cil_tmp10 ;
58924
58925  {
58926  {
58927#line 67
58928  __cil_tmp4 = (unsigned long )dev_priv;
58929#line 67
58930  __cil_tmp5 = __cil_tmp4 + 2184;
58931#line 67
58932  __cil_tmp6 = (struct mutex *)__cil_tmp5;
58933#line 67
58934  mutex_lock(__cil_tmp6);
58935#line 68
58936  busy = vmw_read(dev_priv, 22U);
58937#line 69
58938  __cil_tmp7 = (unsigned long )dev_priv;
58939#line 69
58940  __cil_tmp8 = __cil_tmp7 + 2184;
58941#line 69
58942  __cil_tmp9 = (struct mutex *)__cil_tmp8;
58943#line 69
58944  mutex_unlock(__cil_tmp9);
58945  }
58946  {
58947#line 71
58948  __cil_tmp10 = busy == 0U;
58949#line 71
58950  return ((bool )__cil_tmp10);
58951  }
58952}
58953}
58954#line 74 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
58955void vmw_update_seqno(struct vmw_private *dev_priv , struct vmw_fifo_state *fifo_state ) 
58956{ __le32 *fifo_mem ;
58957  uint32_t seqno ;
58958  unsigned int tmp___7 ;
58959  unsigned long __cil_tmp6 ;
58960  unsigned long __cil_tmp7 ;
58961  __le32 *__cil_tmp8 ;
58962  void *__cil_tmp9 ;
58963  unsigned long __cil_tmp10 ;
58964  unsigned long __cil_tmp11 ;
58965  uint32_t __cil_tmp12 ;
58966  unsigned long __cil_tmp13 ;
58967  unsigned long __cil_tmp14 ;
58968  unsigned long __cil_tmp15 ;
58969  unsigned long __cil_tmp16 ;
58970  struct vmw_marker_queue *__cil_tmp17 ;
58971  unsigned long __cil_tmp18 ;
58972  unsigned long __cil_tmp19 ;
58973  struct vmw_fence_manager *__cil_tmp20 ;
58974
58975  {
58976  {
58977#line 77
58978  __cil_tmp6 = (unsigned long )dev_priv;
58979#line 77
58980  __cil_tmp7 = __cil_tmp6 + 2144;
58981#line 77
58982  fifo_mem = *((__le32 **)__cil_tmp7);
58983#line 78
58984  __cil_tmp8 = fifo_mem + 6;
58985#line 78
58986  __cil_tmp9 = (void *)__cil_tmp8;
58987#line 78
58988  tmp___7 = ioread32(__cil_tmp9);
58989#line 78
58990  seqno = tmp___7;
58991  }
58992  {
58993#line 80
58994  __cil_tmp10 = (unsigned long )dev_priv;
58995#line 80
58996  __cil_tmp11 = __cil_tmp10 + 2980;
58997#line 80
58998  __cil_tmp12 = *((uint32_t *)__cil_tmp11);
58999#line 80
59000  if (__cil_tmp12 != seqno) {
59001    {
59002#line 81
59003    __cil_tmp13 = (unsigned long )dev_priv;
59004#line 81
59005    __cil_tmp14 = __cil_tmp13 + 2980;
59006#line 81
59007    *((uint32_t *)__cil_tmp14) = seqno;
59008#line 82
59009    __cil_tmp15 = (unsigned long )fifo_state;
59010#line 82
59011    __cil_tmp16 = __cil_tmp15 + 160;
59012#line 82
59013    __cil_tmp17 = (struct vmw_marker_queue *)__cil_tmp16;
59014#line 82
59015    vmw_marker_pull(__cil_tmp17, seqno);
59016#line 83
59017    __cil_tmp18 = (unsigned long )dev_priv;
59018#line 83
59019    __cil_tmp19 = __cil_tmp18 + 3008;
59020#line 83
59021    __cil_tmp20 = *((struct vmw_fence_manager **)__cil_tmp19);
59022#line 83
59023    vmw_fences_update(__cil_tmp20);
59024    }
59025  } else {
59026
59027  }
59028  }
59029#line 85
59030  return;
59031}
59032}
59033#line 87 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
59034bool vmw_seqno_passed(struct vmw_private *dev_priv , uint32_t seqno ) 
59035{ struct vmw_fifo_state *fifo_state ;
59036  bool ret ;
59037  long tmp___7 ;
59038  long tmp___8 ;
59039  bool tmp___9 ;
59040  int tmp___10 ;
59041  int __cil_tmp9 ;
59042  uint32_t __cil_tmp10 ;
59043  unsigned long __cil_tmp11 ;
59044  unsigned long __cil_tmp12 ;
59045  uint32_t __cil_tmp13 ;
59046  uint32_t __cil_tmp14 ;
59047  int __cil_tmp15 ;
59048  int __cil_tmp16 ;
59049  int __cil_tmp17 ;
59050  long __cil_tmp18 ;
59051  unsigned long __cil_tmp19 ;
59052  unsigned long __cil_tmp20 ;
59053  int __cil_tmp21 ;
59054  uint32_t __cil_tmp22 ;
59055  unsigned long __cil_tmp23 ;
59056  unsigned long __cil_tmp24 ;
59057  uint32_t __cil_tmp25 ;
59058  uint32_t __cil_tmp26 ;
59059  int __cil_tmp27 ;
59060  int __cil_tmp28 ;
59061  int __cil_tmp29 ;
59062  long __cil_tmp30 ;
59063  unsigned long __cil_tmp31 ;
59064  unsigned long __cil_tmp32 ;
59065  uint32_t __cil_tmp33 ;
59066  unsigned int __cil_tmp34 ;
59067  unsigned long __cil_tmp35 ;
59068  unsigned long __cil_tmp36 ;
59069  atomic_t *__cil_tmp37 ;
59070  atomic_t    *__cil_tmp38 ;
59071  int __cil_tmp39 ;
59072  uint32_t __cil_tmp40 ;
59073  uint32_t __cil_tmp41 ;
59074  uint32_t __cil_tmp42 ;
59075  int __cil_tmp43 ;
59076
59077  {
59078  {
59079#line 93
59080  __cil_tmp9 = 1 << 24;
59081#line 93
59082  __cil_tmp10 = (uint32_t )__cil_tmp9;
59083#line 93
59084  __cil_tmp11 = (unsigned long )dev_priv;
59085#line 93
59086  __cil_tmp12 = __cil_tmp11 + 2980;
59087#line 93
59088  __cil_tmp13 = *((uint32_t *)__cil_tmp12);
59089#line 93
59090  __cil_tmp14 = __cil_tmp13 - seqno;
59091#line 93
59092  __cil_tmp15 = __cil_tmp14 < __cil_tmp10;
59093#line 93
59094  __cil_tmp16 = ! __cil_tmp15;
59095#line 93
59096  __cil_tmp17 = ! __cil_tmp16;
59097#line 93
59098  __cil_tmp18 = (long )__cil_tmp17;
59099#line 93
59100  tmp___7 = __builtin_expect(__cil_tmp18, 1L);
59101  }
59102#line 93
59103  if (tmp___7) {
59104#line 94
59105    return ((bool )1);
59106  } else {
59107
59108  }
59109  {
59110#line 96
59111  __cil_tmp19 = (unsigned long )dev_priv;
59112#line 96
59113  __cil_tmp20 = __cil_tmp19 + 1856;
59114#line 96
59115  fifo_state = (struct vmw_fifo_state *)__cil_tmp20;
59116#line 97
59117  vmw_update_seqno(dev_priv, fifo_state);
59118#line 98
59119  __cil_tmp21 = 1 << 24;
59120#line 98
59121  __cil_tmp22 = (uint32_t )__cil_tmp21;
59122#line 98
59123  __cil_tmp23 = (unsigned long )dev_priv;
59124#line 98
59125  __cil_tmp24 = __cil_tmp23 + 2980;
59126#line 98
59127  __cil_tmp25 = *((uint32_t *)__cil_tmp24);
59128#line 98
59129  __cil_tmp26 = __cil_tmp25 - seqno;
59130#line 98
59131  __cil_tmp27 = __cil_tmp26 < __cil_tmp22;
59132#line 98
59133  __cil_tmp28 = ! __cil_tmp27;
59134#line 98
59135  __cil_tmp29 = ! __cil_tmp28;
59136#line 98
59137  __cil_tmp30 = (long )__cil_tmp29;
59138#line 98
59139  tmp___8 = __builtin_expect(__cil_tmp30, 1L);
59140  }
59141#line 98
59142  if (tmp___8) {
59143#line 99
59144    return ((bool )1);
59145  } else {
59146
59147  }
59148  {
59149#line 101
59150  __cil_tmp31 = (unsigned long )fifo_state;
59151#line 101
59152  __cil_tmp32 = __cil_tmp31 + 36;
59153#line 101
59154  __cil_tmp33 = *((uint32_t *)__cil_tmp32);
59155#line 101
59156  __cil_tmp34 = __cil_tmp33 & 1U;
59157#line 101
59158  if (! __cil_tmp34) {
59159    {
59160#line 101
59161    tmp___9 = vmw_fifo_idle(dev_priv, seqno);
59162    }
59163#line 101
59164    if (tmp___9) {
59165#line 103
59166      return ((bool )1);
59167    } else {
59168
59169    }
59170  } else {
59171
59172  }
59173  }
59174  {
59175#line 110
59176  __cil_tmp35 = (unsigned long )dev_priv;
59177#line 110
59178  __cil_tmp36 = __cil_tmp35 + 2880;
59179#line 110
59180  __cil_tmp37 = (atomic_t *)__cil_tmp36;
59181#line 110
59182  __cil_tmp38 = (atomic_t    *)__cil_tmp37;
59183#line 110
59184  tmp___10 = atomic_read(__cil_tmp38);
59185#line 110
59186  __cil_tmp39 = 1 << 24;
59187#line 110
59188  __cil_tmp40 = (uint32_t )__cil_tmp39;
59189#line 110
59190  __cil_tmp41 = (uint32_t )tmp___10;
59191#line 110
59192  __cil_tmp42 = __cil_tmp41 - seqno;
59193#line 110
59194  __cil_tmp43 = __cil_tmp42 > __cil_tmp40;
59195#line 110
59196  ret = (bool )__cil_tmp43;
59197  }
59198#line 113
59199  return (ret);
59200}
59201}
59202#line 116 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
59203int vmw_fallback_wait(struct vmw_private *dev_priv , bool lazy , bool fifo_idle ,
59204                      uint32_t seqno , bool interruptible , unsigned long timeout ) 
59205{ struct vmw_fifo_state *fifo_state ;
59206  uint32_t count ;
59207  uint32_t signal_seq ;
59208  int ret ;
59209  unsigned long end_jiffies ;
59210  bool (*wait_condition)(struct vmw_private * , uint32_t  ) ;
59211  wait_queue_t __wait ;
59212  struct task_struct *tmp___7 ;
59213  int tmp___8 ;
59214  int tmp___9 ;
59215  bool tmp___10 ;
59216  struct task_struct *tmp___11 ;
59217  struct task_struct *tmp___12 ;
59218  struct task_struct *tmp___13 ;
59219  int tmp___14 ;
59220  __le32 *fifo_mem ;
59221  unsigned long __cil_tmp27 ;
59222  unsigned long __cil_tmp28 ;
59223  unsigned long volatile   __cil_tmp29 ;
59224  unsigned long volatile   __cil_tmp30 ;
59225  wait_queue_t *__cil_tmp31 ;
59226  unsigned long __cil_tmp32 ;
59227  unsigned long __cil_tmp33 ;
59228  unsigned long __cil_tmp34 ;
59229  unsigned long __cil_tmp35 ;
59230  unsigned long __cil_tmp36 ;
59231  unsigned long __cil_tmp37 ;
59232  unsigned long __cil_tmp38 ;
59233  unsigned long __cil_tmp39 ;
59234  unsigned long __cil_tmp40 ;
59235  struct rw_semaphore *__cil_tmp41 ;
59236  unsigned long __cil_tmp42 ;
59237  unsigned long __cil_tmp43 ;
59238  atomic_t *__cil_tmp44 ;
59239  atomic_t    *__cil_tmp45 ;
59240  unsigned long __cil_tmp46 ;
59241  unsigned long __cil_tmp47 ;
59242  wait_queue_head_t *__cil_tmp48 ;
59243  long __cil_tmp49 ;
59244  long __cil_tmp50 ;
59245  long __cil_tmp51 ;
59246  unsigned int __cil_tmp52 ;
59247  unsigned long __cil_tmp53 ;
59248  unsigned long __cil_tmp54 ;
59249  wait_queue_head_t *__cil_tmp55 ;
59250  unsigned long __cil_tmp56 ;
59251  unsigned long __cil_tmp57 ;
59252  __le32 *__cil_tmp58 ;
59253  void *__cil_tmp59 ;
59254  unsigned long __cil_tmp60 ;
59255  unsigned long __cil_tmp61 ;
59256  wait_queue_head_t *__cil_tmp62 ;
59257  void *__cil_tmp63 ;
59258  unsigned long __cil_tmp64 ;
59259  unsigned long __cil_tmp65 ;
59260  struct rw_semaphore *__cil_tmp66 ;
59261
59262  {
59263  {
59264#line 123
59265  __cil_tmp27 = (unsigned long )dev_priv;
59266#line 123
59267  __cil_tmp28 = __cil_tmp27 + 1856;
59268#line 123
59269  fifo_state = (struct vmw_fifo_state *)__cil_tmp28;
59270#line 125
59271  count = (uint32_t )0;
59272#line 128
59273  __cil_tmp29 = (unsigned long volatile   )timeout;
59274#line 128
59275  __cil_tmp30 = jiffies + __cil_tmp29;
59276#line 128
59277  end_jiffies = (unsigned long )__cil_tmp30;
59278#line 130
59279  tmp___7 = get_current();
59280#line 130
59281  __cil_tmp31 = & __wait;
59282#line 130
59283  *((unsigned int *)__cil_tmp31) = 0U;
59284#line 130
59285  __cil_tmp32 = (unsigned long )(& __wait) + 8;
59286#line 130
59287  *((void **)__cil_tmp32) = (void *)tmp___7;
59288#line 130
59289  __cil_tmp33 = (unsigned long )(& __wait) + 16;
59290#line 130
59291  *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp33) = & autoremove_wake_function;
59292#line 130
59293  __cil_tmp34 = (unsigned long )(& __wait) + 24;
59294#line 130
59295  __cil_tmp35 = (unsigned long )(& __wait) + 24;
59296#line 130
59297  *((struct list_head **)__cil_tmp34) = (struct list_head *)__cil_tmp35;
59298#line 130
59299  __cil_tmp36 = 24 + 8;
59300#line 130
59301  __cil_tmp37 = (unsigned long )(& __wait) + __cil_tmp36;
59302#line 130
59303  __cil_tmp38 = (unsigned long )(& __wait) + 24;
59304#line 130
59305  *((struct list_head **)__cil_tmp37) = (struct list_head *)__cil_tmp38;
59306  }
59307#line 132
59308  if (fifo_idle) {
59309#line 132
59310    wait_condition = & vmw_fifo_idle;
59311  } else {
59312#line 132
59313    wait_condition = & vmw_seqno_passed;
59314  }
59315#line 139
59316  if (fifo_idle) {
59317    {
59318#line 140
59319    __cil_tmp39 = (unsigned long )fifo_state;
59320#line 140
59321    __cil_tmp40 = __cil_tmp39 + 112;
59322#line 140
59323    __cil_tmp41 = (struct rw_semaphore *)__cil_tmp40;
59324#line 140
59325    down_read(__cil_tmp41);
59326    }
59327  } else {
59328
59329  }
59330  {
59331#line 141
59332  __cil_tmp42 = (unsigned long )dev_priv;
59333#line 141
59334  __cil_tmp43 = __cil_tmp42 + 2880;
59335#line 141
59336  __cil_tmp44 = (atomic_t *)__cil_tmp43;
59337#line 141
59338  __cil_tmp45 = (atomic_t    *)__cil_tmp44;
59339#line 141
59340  tmp___8 = atomic_read(__cil_tmp45);
59341#line 141
59342  signal_seq = (uint32_t )tmp___8;
59343#line 142
59344  ret = 0;
59345  }
59346  {
59347#line 144
59348  while (1) {
59349    while_continue: /* CIL Label */ ;
59350#line 145
59351    if (interruptible) {
59352#line 145
59353      tmp___9 = 1;
59354    } else {
59355#line 145
59356      tmp___9 = 2;
59357    }
59358    {
59359#line 145
59360    __cil_tmp46 = (unsigned long )dev_priv;
59361#line 145
59362    __cil_tmp47 = __cil_tmp46 + 2888;
59363#line 145
59364    __cil_tmp48 = (wait_queue_head_t *)__cil_tmp47;
59365#line 145
59366    prepare_to_wait(__cil_tmp48, & __wait, tmp___9);
59367#line 148
59368    tmp___10 = (*wait_condition)(dev_priv, seqno);
59369    }
59370#line 148
59371    if (tmp___10) {
59372#line 149
59373      goto while_break;
59374    } else {
59375
59376    }
59377    {
59378#line 150
59379    __cil_tmp49 = (long )end_jiffies;
59380#line 150
59381    __cil_tmp50 = (long )jiffies;
59382#line 150
59383    __cil_tmp51 = __cil_tmp50 - __cil_tmp49;
59384#line 150
59385    if (__cil_tmp51 >= 0L) {
59386      {
59387#line 151
59388      drm_err("vmw_fallback_wait", "SVGA device lockup.\n");
59389      }
59390#line 152
59391      goto while_break;
59392    } else {
59393
59394    }
59395    }
59396#line 154
59397    if (lazy) {
59398      {
59399#line 155
59400      schedule_timeout(1L);
59401      }
59402    } else {
59403#line 156
59404      count = count + 1U;
59405      {
59406#line 156
59407      __cil_tmp52 = count & 15U;
59408#line 156
59409      if (__cil_tmp52 == 0U) {
59410        {
59411#line 162
59412        while (1) {
59413          while_continue___0: /* CIL Label */ ;
59414          {
59415#line 162
59416          tmp___11 = get_current();
59417#line 162
59418          *((long volatile   *)tmp___11) = (long volatile   )0;
59419          }
59420#line 162
59421          goto while_break___0;
59422        }
59423        while_break___0: /* CIL Label */ ;
59424        }
59425        {
59426#line 163
59427        schedule();
59428        }
59429        {
59430#line 164
59431        while (1) {
59432          while_continue___1: /* CIL Label */ ;
59433          {
59434#line 164
59435          tmp___12 = get_current();
59436          }
59437#line 164
59438          if (interruptible) {
59439#line 164
59440            *((long volatile   *)tmp___12) = (long volatile   )1;
59441          } else {
59442#line 164
59443            *((long volatile   *)tmp___12) = (long volatile   )2;
59444          }
59445#line 164
59446          goto while_break___1;
59447        }
59448        while_break___1: /* CIL Label */ ;
59449        }
59450      } else {
59451
59452      }
59453      }
59454    }
59455#line 168
59456    if (interruptible) {
59457      {
59458#line 168
59459      tmp___13 = get_current();
59460#line 168
59461      tmp___14 = signal_pending(tmp___13);
59462      }
59463#line 168
59464      if (tmp___14) {
59465#line 169
59466        ret = -512;
59467#line 170
59468        goto while_break;
59469      } else {
59470
59471      }
59472    } else {
59473
59474    }
59475  }
59476  while_break: /* CIL Label */ ;
59477  }
59478  {
59479#line 173
59480  __cil_tmp53 = (unsigned long )dev_priv;
59481#line 173
59482  __cil_tmp54 = __cil_tmp53 + 2888;
59483#line 173
59484  __cil_tmp55 = (wait_queue_head_t *)__cil_tmp54;
59485#line 173
59486  finish_wait(__cil_tmp55, & __wait);
59487  }
59488#line 174
59489  if (ret == 0) {
59490#line 174
59491    if (fifo_idle) {
59492      {
59493#line 175
59494      __cil_tmp56 = (unsigned long )dev_priv;
59495#line 175
59496      __cil_tmp57 = __cil_tmp56 + 2144;
59497#line 175
59498      fifo_mem = *((__le32 **)__cil_tmp57);
59499#line 176
59500      __cil_tmp58 = fifo_mem + 6;
59501#line 176
59502      __cil_tmp59 = (void *)__cil_tmp58;
59503#line 176
59504      iowrite32(signal_seq, __cil_tmp59);
59505      }
59506    } else {
59507
59508    }
59509  } else {
59510
59511  }
59512  {
59513#line 178
59514  __cil_tmp60 = (unsigned long )dev_priv;
59515#line 178
59516  __cil_tmp61 = __cil_tmp60 + 2888;
59517#line 178
59518  __cil_tmp62 = (wait_queue_head_t *)__cil_tmp61;
59519#line 178
59520  __cil_tmp63 = (void *)0;
59521#line 178
59522  __wake_up(__cil_tmp62, 3U, 0, __cil_tmp63);
59523  }
59524#line 179
59525  if (fifo_idle) {
59526    {
59527#line 180
59528    __cil_tmp64 = (unsigned long )fifo_state;
59529#line 180
59530    __cil_tmp65 = __cil_tmp64 + 112;
59531#line 180
59532    __cil_tmp66 = (struct rw_semaphore *)__cil_tmp65;
59533#line 180
59534    up_read(__cil_tmp66);
59535    }
59536  } else {
59537
59538  }
59539#line 182
59540  return (ret);
59541}
59542}
59543#line 185 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
59544void vmw_seqno_waiter_add(struct vmw_private *dev_priv ) 
59545{ unsigned long irq_flags ;
59546  raw_spinlock_t *tmp___7 ;
59547  int tmp___8 ;
59548  unsigned long __cil_tmp7 ;
59549  unsigned long __cil_tmp8 ;
59550  struct mutex *__cil_tmp9 ;
59551  unsigned long __cil_tmp10 ;
59552  unsigned long __cil_tmp11 ;
59553  unsigned long __cil_tmp12 ;
59554  unsigned long __cil_tmp13 ;
59555  unsigned long __cil_tmp14 ;
59556  unsigned long __cil_tmp15 ;
59557  int __cil_tmp16 ;
59558  unsigned long __cil_tmp17 ;
59559  unsigned long __cil_tmp18 ;
59560  spinlock_t *__cil_tmp19 ;
59561  unsigned long __cil_tmp20 ;
59562  unsigned long __cil_tmp21 ;
59563  unsigned int __cil_tmp22 ;
59564  unsigned int __cil_tmp23 ;
59565  int __cil_tmp24 ;
59566  unsigned long __cil_tmp25 ;
59567  unsigned long __cil_tmp26 ;
59568  unsigned long __cil_tmp27 ;
59569  unsigned long __cil_tmp28 ;
59570  uint32_t __cil_tmp29 ;
59571  unsigned long __cil_tmp30 ;
59572  unsigned long __cil_tmp31 ;
59573  uint32_t __cil_tmp32 ;
59574  unsigned long __cil_tmp33 ;
59575  unsigned long __cil_tmp34 ;
59576  spinlock_t *__cil_tmp35 ;
59577  unsigned long __cil_tmp36 ;
59578  unsigned long __cil_tmp37 ;
59579  struct mutex *__cil_tmp38 ;
59580
59581  {
59582  {
59583#line 187
59584  __cil_tmp7 = (unsigned long )dev_priv;
59585#line 187
59586  __cil_tmp8 = __cil_tmp7 + 2184;
59587#line 187
59588  __cil_tmp9 = (struct mutex *)__cil_tmp8;
59589#line 187
59590  mutex_lock(__cil_tmp9);
59591#line 188
59592  __cil_tmp10 = (unsigned long )dev_priv;
59593#line 188
59594  __cil_tmp11 = __cil_tmp10 + 2968;
59595#line 188
59596  tmp___8 = *((int *)__cil_tmp11);
59597#line 188
59598  __cil_tmp12 = (unsigned long )dev_priv;
59599#line 188
59600  __cil_tmp13 = __cil_tmp12 + 2968;
59601#line 188
59602  __cil_tmp14 = (unsigned long )dev_priv;
59603#line 188
59604  __cil_tmp15 = __cil_tmp14 + 2968;
59605#line 188
59606  __cil_tmp16 = *((int *)__cil_tmp15);
59607#line 188
59608  *((int *)__cil_tmp13) = __cil_tmp16 + 1;
59609  }
59610#line 188
59611  if (tmp___8 == 0) {
59612    {
59613#line 191
59614    while (1) {
59615      while_continue: /* CIL Label */ ;
59616      {
59617#line 191
59618      while (1) {
59619        while_continue___0: /* CIL Label */ ;
59620        {
59621#line 191
59622        __cil_tmp17 = (unsigned long )dev_priv;
59623#line 191
59624        __cil_tmp18 = __cil_tmp17 + 2984;
59625#line 191
59626        __cil_tmp19 = (spinlock_t *)__cil_tmp18;
59627#line 191
59628        tmp___7 = spinlock_check(__cil_tmp19);
59629#line 191
59630        irq_flags = _raw_spin_lock_irqsave(tmp___7);
59631        }
59632#line 191
59633        goto while_break___0;
59634      }
59635      while_break___0: /* CIL Label */ ;
59636      }
59637#line 191
59638      goto while_break;
59639    }
59640    while_break: /* CIL Label */ ;
59641    }
59642    {
59643#line 192
59644    __cil_tmp20 = (unsigned long )dev_priv;
59645#line 192
59646    __cil_tmp21 = __cil_tmp20 + 2104;
59647#line 192
59648    __cil_tmp22 = *((unsigned int *)__cil_tmp21);
59649#line 192
59650    __cil_tmp23 = __cil_tmp22 + 8U;
59651#line 192
59652    __cil_tmp24 = (int )__cil_tmp23;
59653#line 192
59654    outl(1U, __cil_tmp24);
59655#line 194
59656    __cil_tmp25 = (unsigned long )dev_priv;
59657#line 194
59658    __cil_tmp26 = __cil_tmp25 + 3016;
59659#line 194
59660    __cil_tmp27 = (unsigned long )dev_priv;
59661#line 194
59662    __cil_tmp28 = __cil_tmp27 + 3016;
59663#line 194
59664    __cil_tmp29 = *((uint32_t *)__cil_tmp28);
59665#line 194
59666    *((uint32_t *)__cil_tmp26) = __cil_tmp29 | 1U;
59667#line 195
59668    __cil_tmp30 = (unsigned long )dev_priv;
59669#line 195
59670    __cil_tmp31 = __cil_tmp30 + 3016;
59671#line 195
59672    __cil_tmp32 = *((uint32_t *)__cil_tmp31);
59673#line 195
59674    vmw_write(dev_priv, 33U, __cil_tmp32);
59675#line 196
59676    __cil_tmp33 = (unsigned long )dev_priv;
59677#line 196
59678    __cil_tmp34 = __cil_tmp33 + 2984;
59679#line 196
59680    __cil_tmp35 = (spinlock_t *)__cil_tmp34;
59681#line 196
59682    spin_unlock_irqrestore(__cil_tmp35, irq_flags);
59683    }
59684  } else {
59685
59686  }
59687  {
59688#line 198
59689  __cil_tmp36 = (unsigned long )dev_priv;
59690#line 198
59691  __cil_tmp37 = __cil_tmp36 + 2184;
59692#line 198
59693  __cil_tmp38 = (struct mutex *)__cil_tmp37;
59694#line 198
59695  mutex_unlock(__cil_tmp38);
59696  }
59697#line 199
59698  return;
59699}
59700}
59701#line 201 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
59702void vmw_seqno_waiter_remove(struct vmw_private *dev_priv ) 
59703{ unsigned long irq_flags ;
59704  raw_spinlock_t *tmp___7 ;
59705  unsigned long __cil_tmp6 ;
59706  unsigned long __cil_tmp7 ;
59707  struct mutex *__cil_tmp8 ;
59708  unsigned long __cil_tmp9 ;
59709  unsigned long __cil_tmp10 ;
59710  unsigned long __cil_tmp11 ;
59711  unsigned long __cil_tmp12 ;
59712  int __cil_tmp13 ;
59713  unsigned long __cil_tmp14 ;
59714  unsigned long __cil_tmp15 ;
59715  int __cil_tmp16 ;
59716  unsigned long __cil_tmp17 ;
59717  unsigned long __cil_tmp18 ;
59718  spinlock_t *__cil_tmp19 ;
59719  unsigned long __cil_tmp20 ;
59720  unsigned long __cil_tmp21 ;
59721  unsigned long __cil_tmp22 ;
59722  unsigned long __cil_tmp23 ;
59723  uint32_t __cil_tmp24 ;
59724  unsigned long __cil_tmp25 ;
59725  unsigned long __cil_tmp26 ;
59726  uint32_t __cil_tmp27 ;
59727  unsigned long __cil_tmp28 ;
59728  unsigned long __cil_tmp29 ;
59729  spinlock_t *__cil_tmp30 ;
59730  unsigned long __cil_tmp31 ;
59731  unsigned long __cil_tmp32 ;
59732  struct mutex *__cil_tmp33 ;
59733
59734  {
59735  {
59736#line 203
59737  __cil_tmp6 = (unsigned long )dev_priv;
59738#line 203
59739  __cil_tmp7 = __cil_tmp6 + 2184;
59740#line 203
59741  __cil_tmp8 = (struct mutex *)__cil_tmp7;
59742#line 203
59743  mutex_lock(__cil_tmp8);
59744#line 204
59745  __cil_tmp9 = (unsigned long )dev_priv;
59746#line 204
59747  __cil_tmp10 = __cil_tmp9 + 2968;
59748#line 204
59749  __cil_tmp11 = (unsigned long )dev_priv;
59750#line 204
59751  __cil_tmp12 = __cil_tmp11 + 2968;
59752#line 204
59753  __cil_tmp13 = *((int *)__cil_tmp12);
59754#line 204
59755  *((int *)__cil_tmp10) = __cil_tmp13 - 1;
59756  }
59757  {
59758#line 204
59759  __cil_tmp14 = (unsigned long )dev_priv;
59760#line 204
59761  __cil_tmp15 = __cil_tmp14 + 2968;
59762#line 204
59763  __cil_tmp16 = *((int *)__cil_tmp15);
59764#line 204
59765  if (__cil_tmp16 == 0) {
59766    {
59767#line 207
59768    while (1) {
59769      while_continue: /* CIL Label */ ;
59770      {
59771#line 207
59772      while (1) {
59773        while_continue___0: /* CIL Label */ ;
59774        {
59775#line 207
59776        __cil_tmp17 = (unsigned long )dev_priv;
59777#line 207
59778        __cil_tmp18 = __cil_tmp17 + 2984;
59779#line 207
59780        __cil_tmp19 = (spinlock_t *)__cil_tmp18;
59781#line 207
59782        tmp___7 = spinlock_check(__cil_tmp19);
59783#line 207
59784        irq_flags = _raw_spin_lock_irqsave(tmp___7);
59785        }
59786#line 207
59787        goto while_break___0;
59788      }
59789      while_break___0: /* CIL Label */ ;
59790      }
59791#line 207
59792      goto while_break;
59793    }
59794    while_break: /* CIL Label */ ;
59795    }
59796    {
59797#line 208
59798    __cil_tmp20 = (unsigned long )dev_priv;
59799#line 208
59800    __cil_tmp21 = __cil_tmp20 + 3016;
59801#line 208
59802    __cil_tmp22 = (unsigned long )dev_priv;
59803#line 208
59804    __cil_tmp23 = __cil_tmp22 + 3016;
59805#line 208
59806    __cil_tmp24 = *((uint32_t *)__cil_tmp23);
59807#line 208
59808    *((uint32_t *)__cil_tmp21) = __cil_tmp24 & 4294967294U;
59809#line 209
59810    __cil_tmp25 = (unsigned long )dev_priv;
59811#line 209
59812    __cil_tmp26 = __cil_tmp25 + 3016;
59813#line 209
59814    __cil_tmp27 = *((uint32_t *)__cil_tmp26);
59815#line 209
59816    vmw_write(dev_priv, 33U, __cil_tmp27);
59817#line 210
59818    __cil_tmp28 = (unsigned long )dev_priv;
59819#line 210
59820    __cil_tmp29 = __cil_tmp28 + 2984;
59821#line 210
59822    __cil_tmp30 = (spinlock_t *)__cil_tmp29;
59823#line 210
59824    spin_unlock_irqrestore(__cil_tmp30, irq_flags);
59825    }
59826  } else {
59827
59828  }
59829  }
59830  {
59831#line 212
59832  __cil_tmp31 = (unsigned long )dev_priv;
59833#line 212
59834  __cil_tmp32 = __cil_tmp31 + 2184;
59835#line 212
59836  __cil_tmp33 = (struct mutex *)__cil_tmp32;
59837#line 212
59838  mutex_unlock(__cil_tmp33);
59839  }
59840#line 213
59841  return;
59842}
59843}
59844#line 216 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
59845void vmw_goal_waiter_add(struct vmw_private *dev_priv ) 
59846{ unsigned long irq_flags ;
59847  raw_spinlock_t *tmp___7 ;
59848  int tmp___8 ;
59849  unsigned long __cil_tmp7 ;
59850  unsigned long __cil_tmp8 ;
59851  struct mutex *__cil_tmp9 ;
59852  unsigned long __cil_tmp10 ;
59853  unsigned long __cil_tmp11 ;
59854  unsigned long __cil_tmp12 ;
59855  unsigned long __cil_tmp13 ;
59856  unsigned long __cil_tmp14 ;
59857  unsigned long __cil_tmp15 ;
59858  int __cil_tmp16 ;
59859  unsigned long __cil_tmp17 ;
59860  unsigned long __cil_tmp18 ;
59861  spinlock_t *__cil_tmp19 ;
59862  unsigned long __cil_tmp20 ;
59863  unsigned long __cil_tmp21 ;
59864  unsigned int __cil_tmp22 ;
59865  unsigned int __cil_tmp23 ;
59866  int __cil_tmp24 ;
59867  unsigned long __cil_tmp25 ;
59868  unsigned long __cil_tmp26 ;
59869  unsigned long __cil_tmp27 ;
59870  unsigned long __cil_tmp28 ;
59871  uint32_t __cil_tmp29 ;
59872  unsigned long __cil_tmp30 ;
59873  unsigned long __cil_tmp31 ;
59874  uint32_t __cil_tmp32 ;
59875  unsigned long __cil_tmp33 ;
59876  unsigned long __cil_tmp34 ;
59877  spinlock_t *__cil_tmp35 ;
59878  unsigned long __cil_tmp36 ;
59879  unsigned long __cil_tmp37 ;
59880  struct mutex *__cil_tmp38 ;
59881
59882  {
59883  {
59884#line 218
59885  __cil_tmp7 = (unsigned long )dev_priv;
59886#line 218
59887  __cil_tmp8 = __cil_tmp7 + 2184;
59888#line 218
59889  __cil_tmp9 = (struct mutex *)__cil_tmp8;
59890#line 218
59891  mutex_lock(__cil_tmp9);
59892#line 219
59893  __cil_tmp10 = (unsigned long )dev_priv;
59894#line 219
59895  __cil_tmp11 = __cil_tmp10 + 2972;
59896#line 219
59897  tmp___8 = *((int *)__cil_tmp11);
59898#line 219
59899  __cil_tmp12 = (unsigned long )dev_priv;
59900#line 219
59901  __cil_tmp13 = __cil_tmp12 + 2972;
59902#line 219
59903  __cil_tmp14 = (unsigned long )dev_priv;
59904#line 219
59905  __cil_tmp15 = __cil_tmp14 + 2972;
59906#line 219
59907  __cil_tmp16 = *((int *)__cil_tmp15);
59908#line 219
59909  *((int *)__cil_tmp13) = __cil_tmp16 + 1;
59910  }
59911#line 219
59912  if (tmp___8 == 0) {
59913    {
59914#line 222
59915    while (1) {
59916      while_continue: /* CIL Label */ ;
59917      {
59918#line 222
59919      while (1) {
59920        while_continue___0: /* CIL Label */ ;
59921        {
59922#line 222
59923        __cil_tmp17 = (unsigned long )dev_priv;
59924#line 222
59925        __cil_tmp18 = __cil_tmp17 + 2984;
59926#line 222
59927        __cil_tmp19 = (spinlock_t *)__cil_tmp18;
59928#line 222
59929        tmp___7 = spinlock_check(__cil_tmp19);
59930#line 222
59931        irq_flags = _raw_spin_lock_irqsave(tmp___7);
59932        }
59933#line 222
59934        goto while_break___0;
59935      }
59936      while_break___0: /* CIL Label */ ;
59937      }
59938#line 222
59939      goto while_break;
59940    }
59941    while_break: /* CIL Label */ ;
59942    }
59943    {
59944#line 223
59945    __cil_tmp20 = (unsigned long )dev_priv;
59946#line 223
59947    __cil_tmp21 = __cil_tmp20 + 2104;
59948#line 223
59949    __cil_tmp22 = *((unsigned int *)__cil_tmp21);
59950#line 223
59951    __cil_tmp23 = __cil_tmp22 + 8U;
59952#line 223
59953    __cil_tmp24 = (int )__cil_tmp23;
59954#line 223
59955    outl(4U, __cil_tmp24);
59956#line 225
59957    __cil_tmp25 = (unsigned long )dev_priv;
59958#line 225
59959    __cil_tmp26 = __cil_tmp25 + 3016;
59960#line 225
59961    __cil_tmp27 = (unsigned long )dev_priv;
59962#line 225
59963    __cil_tmp28 = __cil_tmp27 + 3016;
59964#line 225
59965    __cil_tmp29 = *((uint32_t *)__cil_tmp28);
59966#line 225
59967    *((uint32_t *)__cil_tmp26) = __cil_tmp29 | 4U;
59968#line 226
59969    __cil_tmp30 = (unsigned long )dev_priv;
59970#line 226
59971    __cil_tmp31 = __cil_tmp30 + 3016;
59972#line 226
59973    __cil_tmp32 = *((uint32_t *)__cil_tmp31);
59974#line 226
59975    vmw_write(dev_priv, 33U, __cil_tmp32);
59976#line 227
59977    __cil_tmp33 = (unsigned long )dev_priv;
59978#line 227
59979    __cil_tmp34 = __cil_tmp33 + 2984;
59980#line 227
59981    __cil_tmp35 = (spinlock_t *)__cil_tmp34;
59982#line 227
59983    spin_unlock_irqrestore(__cil_tmp35, irq_flags);
59984    }
59985  } else {
59986
59987  }
59988  {
59989#line 229
59990  __cil_tmp36 = (unsigned long )dev_priv;
59991#line 229
59992  __cil_tmp37 = __cil_tmp36 + 2184;
59993#line 229
59994  __cil_tmp38 = (struct mutex *)__cil_tmp37;
59995#line 229
59996  mutex_unlock(__cil_tmp38);
59997  }
59998#line 230
59999  return;
60000}
60001}
60002#line 232 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60003void vmw_goal_waiter_remove(struct vmw_private *dev_priv ) 
60004{ unsigned long irq_flags ;
60005  raw_spinlock_t *tmp___7 ;
60006  unsigned long __cil_tmp6 ;
60007  unsigned long __cil_tmp7 ;
60008  struct mutex *__cil_tmp8 ;
60009  unsigned long __cil_tmp9 ;
60010  unsigned long __cil_tmp10 ;
60011  unsigned long __cil_tmp11 ;
60012  unsigned long __cil_tmp12 ;
60013  int __cil_tmp13 ;
60014  unsigned long __cil_tmp14 ;
60015  unsigned long __cil_tmp15 ;
60016  int __cil_tmp16 ;
60017  unsigned long __cil_tmp17 ;
60018  unsigned long __cil_tmp18 ;
60019  spinlock_t *__cil_tmp19 ;
60020  unsigned long __cil_tmp20 ;
60021  unsigned long __cil_tmp21 ;
60022  unsigned long __cil_tmp22 ;
60023  unsigned long __cil_tmp23 ;
60024  uint32_t __cil_tmp24 ;
60025  unsigned long __cil_tmp25 ;
60026  unsigned long __cil_tmp26 ;
60027  uint32_t __cil_tmp27 ;
60028  unsigned long __cil_tmp28 ;
60029  unsigned long __cil_tmp29 ;
60030  spinlock_t *__cil_tmp30 ;
60031  unsigned long __cil_tmp31 ;
60032  unsigned long __cil_tmp32 ;
60033  struct mutex *__cil_tmp33 ;
60034
60035  {
60036  {
60037#line 234
60038  __cil_tmp6 = (unsigned long )dev_priv;
60039#line 234
60040  __cil_tmp7 = __cil_tmp6 + 2184;
60041#line 234
60042  __cil_tmp8 = (struct mutex *)__cil_tmp7;
60043#line 234
60044  mutex_lock(__cil_tmp8);
60045#line 235
60046  __cil_tmp9 = (unsigned long )dev_priv;
60047#line 235
60048  __cil_tmp10 = __cil_tmp9 + 2972;
60049#line 235
60050  __cil_tmp11 = (unsigned long )dev_priv;
60051#line 235
60052  __cil_tmp12 = __cil_tmp11 + 2972;
60053#line 235
60054  __cil_tmp13 = *((int *)__cil_tmp12);
60055#line 235
60056  *((int *)__cil_tmp10) = __cil_tmp13 - 1;
60057  }
60058  {
60059#line 235
60060  __cil_tmp14 = (unsigned long )dev_priv;
60061#line 235
60062  __cil_tmp15 = __cil_tmp14 + 2972;
60063#line 235
60064  __cil_tmp16 = *((int *)__cil_tmp15);
60065#line 235
60066  if (__cil_tmp16 == 0) {
60067    {
60068#line 238
60069    while (1) {
60070      while_continue: /* CIL Label */ ;
60071      {
60072#line 238
60073      while (1) {
60074        while_continue___0: /* CIL Label */ ;
60075        {
60076#line 238
60077        __cil_tmp17 = (unsigned long )dev_priv;
60078#line 238
60079        __cil_tmp18 = __cil_tmp17 + 2984;
60080#line 238
60081        __cil_tmp19 = (spinlock_t *)__cil_tmp18;
60082#line 238
60083        tmp___7 = spinlock_check(__cil_tmp19);
60084#line 238
60085        irq_flags = _raw_spin_lock_irqsave(tmp___7);
60086        }
60087#line 238
60088        goto while_break___0;
60089      }
60090      while_break___0: /* CIL Label */ ;
60091      }
60092#line 238
60093      goto while_break;
60094    }
60095    while_break: /* CIL Label */ ;
60096    }
60097    {
60098#line 239
60099    __cil_tmp20 = (unsigned long )dev_priv;
60100#line 239
60101    __cil_tmp21 = __cil_tmp20 + 3016;
60102#line 239
60103    __cil_tmp22 = (unsigned long )dev_priv;
60104#line 239
60105    __cil_tmp23 = __cil_tmp22 + 3016;
60106#line 239
60107    __cil_tmp24 = *((uint32_t *)__cil_tmp23);
60108#line 239
60109    *((uint32_t *)__cil_tmp21) = __cil_tmp24 & 4294967291U;
60110#line 240
60111    __cil_tmp25 = (unsigned long )dev_priv;
60112#line 240
60113    __cil_tmp26 = __cil_tmp25 + 3016;
60114#line 240
60115    __cil_tmp27 = *((uint32_t *)__cil_tmp26);
60116#line 240
60117    vmw_write(dev_priv, 33U, __cil_tmp27);
60118#line 241
60119    __cil_tmp28 = (unsigned long )dev_priv;
60120#line 241
60121    __cil_tmp29 = __cil_tmp28 + 2984;
60122#line 241
60123    __cil_tmp30 = (spinlock_t *)__cil_tmp29;
60124#line 241
60125    spin_unlock_irqrestore(__cil_tmp30, irq_flags);
60126    }
60127  } else {
60128
60129  }
60130  }
60131  {
60132#line 243
60133  __cil_tmp31 = (unsigned long )dev_priv;
60134#line 243
60135  __cil_tmp32 = __cil_tmp31 + 2184;
60136#line 243
60137  __cil_tmp33 = (struct mutex *)__cil_tmp32;
60138#line 243
60139  mutex_unlock(__cil_tmp33);
60140  }
60141#line 244
60142  return;
60143}
60144}
60145#line 246 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60146int vmw_wait_seqno(struct vmw_private *dev_priv , bool lazy , uint32_t seqno , bool interruptible ,
60147                   unsigned long timeout ) 
60148{ long ret ;
60149  struct vmw_fifo_state *fifo ;
60150  long tmp___7 ;
60151  bool tmp___8 ;
60152  int tmp___9 ;
60153  long tmp___10 ;
60154  int tmp___11 ;
60155  int tmp___12 ;
60156  long __ret ;
60157  wait_queue_t __wait ;
60158  struct task_struct *tmp___13 ;
60159  bool tmp___14 ;
60160  struct task_struct *tmp___15 ;
60161  int tmp___16 ;
60162  bool tmp___17 ;
60163  long __ret___0 ;
60164  wait_queue_t __wait___0 ;
60165  struct task_struct *tmp___18 ;
60166  bool tmp___19 ;
60167  bool tmp___20 ;
60168  long tmp___21 ;
60169  long tmp___22 ;
60170  unsigned long __cil_tmp28 ;
60171  unsigned long __cil_tmp29 ;
60172  int __cil_tmp30 ;
60173  uint32_t __cil_tmp31 ;
60174  unsigned long __cil_tmp32 ;
60175  unsigned long __cil_tmp33 ;
60176  uint32_t __cil_tmp34 ;
60177  uint32_t __cil_tmp35 ;
60178  int __cil_tmp36 ;
60179  int __cil_tmp37 ;
60180  int __cil_tmp38 ;
60181  long __cil_tmp39 ;
60182  long __cil_tmp40 ;
60183  uint32_t __cil_tmp41 ;
60184  unsigned long __cil_tmp42 ;
60185  unsigned long __cil_tmp43 ;
60186  uint32_t __cil_tmp44 ;
60187  unsigned int __cil_tmp45 ;
60188  bool __cil_tmp46 ;
60189  unsigned long __cil_tmp47 ;
60190  unsigned long __cil_tmp48 ;
60191  uint32_t __cil_tmp49 ;
60192  unsigned int __cil_tmp50 ;
60193  bool __cil_tmp51 ;
60194  wait_queue_t *__cil_tmp52 ;
60195  unsigned long __cil_tmp53 ;
60196  unsigned long __cil_tmp54 ;
60197  unsigned long __cil_tmp55 ;
60198  unsigned long __cil_tmp56 ;
60199  unsigned long __cil_tmp57 ;
60200  unsigned long __cil_tmp58 ;
60201  unsigned long __cil_tmp59 ;
60202  unsigned long __cil_tmp60 ;
60203  unsigned long __cil_tmp61 ;
60204  wait_queue_head_t *__cil_tmp62 ;
60205  unsigned long __cil_tmp63 ;
60206  unsigned long __cil_tmp64 ;
60207  wait_queue_head_t *__cil_tmp65 ;
60208  wait_queue_t *__cil_tmp66 ;
60209  unsigned long __cil_tmp67 ;
60210  unsigned long __cil_tmp68 ;
60211  unsigned long __cil_tmp69 ;
60212  unsigned long __cil_tmp70 ;
60213  unsigned long __cil_tmp71 ;
60214  unsigned long __cil_tmp72 ;
60215  unsigned long __cil_tmp73 ;
60216  unsigned long __cil_tmp74 ;
60217  unsigned long __cil_tmp75 ;
60218  wait_queue_head_t *__cil_tmp76 ;
60219  unsigned long __cil_tmp77 ;
60220  unsigned long __cil_tmp78 ;
60221  wait_queue_head_t *__cil_tmp79 ;
60222  int __cil_tmp80 ;
60223  int __cil_tmp81 ;
60224  int __cil_tmp82 ;
60225  long __cil_tmp83 ;
60226  int __cil_tmp84 ;
60227  int __cil_tmp85 ;
60228  int __cil_tmp86 ;
60229  long __cil_tmp87 ;
60230
60231  {
60232  {
60233#line 251
60234  __cil_tmp28 = (unsigned long )dev_priv;
60235#line 251
60236  __cil_tmp29 = __cil_tmp28 + 1856;
60237#line 251
60238  fifo = (struct vmw_fifo_state *)__cil_tmp29;
60239#line 253
60240  __cil_tmp30 = 1 << 24;
60241#line 253
60242  __cil_tmp31 = (uint32_t )__cil_tmp30;
60243#line 253
60244  __cil_tmp32 = (unsigned long )dev_priv;
60245#line 253
60246  __cil_tmp33 = __cil_tmp32 + 2980;
60247#line 253
60248  __cil_tmp34 = *((uint32_t *)__cil_tmp33);
60249#line 253
60250  __cil_tmp35 = __cil_tmp34 - seqno;
60251#line 253
60252  __cil_tmp36 = __cil_tmp35 < __cil_tmp31;
60253#line 253
60254  __cil_tmp37 = ! __cil_tmp36;
60255#line 253
60256  __cil_tmp38 = ! __cil_tmp37;
60257#line 253
60258  __cil_tmp39 = (long )__cil_tmp38;
60259#line 253
60260  tmp___7 = __builtin_expect(__cil_tmp39, 1L);
60261  }
60262#line 253
60263  if (tmp___7) {
60264#line 254
60265    return (0);
60266  } else {
60267
60268  }
60269  {
60270#line 256
60271  tmp___8 = vmw_seqno_passed(dev_priv, seqno);
60272  }
60273#line 256
60274  if (tmp___8) {
60275#line 256
60276    tmp___9 = 1;
60277  } else {
60278#line 256
60279    tmp___9 = 0;
60280  }
60281  {
60282#line 256
60283  __cil_tmp40 = (long )tmp___9;
60284#line 256
60285  tmp___10 = __builtin_expect(__cil_tmp40, 1L);
60286  }
60287#line 256
60288  if (tmp___10) {
60289#line 257
60290    return (0);
60291  } else {
60292
60293  }
60294  {
60295#line 259
60296  __cil_tmp41 = (uint32_t )1;
60297#line 259
60298  vmw_fifo_ping_host(dev_priv, __cil_tmp41);
60299  }
60300  {
60301#line 261
60302  __cil_tmp42 = (unsigned long )fifo;
60303#line 261
60304  __cil_tmp43 = __cil_tmp42 + 36;
60305#line 261
60306  __cil_tmp44 = *((uint32_t *)__cil_tmp43);
60307#line 261
60308  __cil_tmp45 = __cil_tmp44 & 1U;
60309#line 261
60310  if (! __cil_tmp45) {
60311    {
60312#line 262
60313    __cil_tmp46 = (bool )1;
60314#line 262
60315    tmp___11 = vmw_fallback_wait(dev_priv, lazy, __cil_tmp46, seqno, interruptible,
60316                                 timeout);
60317    }
60318#line 262
60319    return (tmp___11);
60320  } else {
60321
60322  }
60323  }
60324  {
60325#line 265
60326  __cil_tmp47 = (unsigned long )dev_priv;
60327#line 265
60328  __cil_tmp48 = __cil_tmp47 + 2156;
60329#line 265
60330  __cil_tmp49 = *((uint32_t *)__cil_tmp48);
60331#line 265
60332  __cil_tmp50 = __cil_tmp49 & 262144U;
60333#line 265
60334  if (! __cil_tmp50) {
60335    {
60336#line 266
60337    __cil_tmp51 = (bool )0;
60338#line 266
60339    tmp___12 = vmw_fallback_wait(dev_priv, lazy, __cil_tmp51, seqno, interruptible,
60340                                 timeout);
60341    }
60342#line 266
60343    return (tmp___12);
60344  } else {
60345
60346  }
60347  }
60348  {
60349#line 269
60350  vmw_seqno_waiter_add(dev_priv);
60351  }
60352#line 271
60353  if (interruptible) {
60354    {
60355#line 272
60356    __ret = (long )timeout;
60357#line 272
60358    tmp___17 = vmw_seqno_passed(dev_priv, seqno);
60359    }
60360#line 272
60361    if (tmp___17) {
60362
60363    } else {
60364      {
60365#line 272
60366      while (1) {
60367        while_continue: /* CIL Label */ ;
60368        {
60369#line 272
60370        tmp___13 = get_current();
60371#line 272
60372        __cil_tmp52 = & __wait;
60373#line 272
60374        *((unsigned int *)__cil_tmp52) = 0U;
60375#line 272
60376        __cil_tmp53 = (unsigned long )(& __wait) + 8;
60377#line 272
60378        *((void **)__cil_tmp53) = (void *)tmp___13;
60379#line 272
60380        __cil_tmp54 = (unsigned long )(& __wait) + 16;
60381#line 272
60382        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp54) = & autoremove_wake_function;
60383#line 272
60384        __cil_tmp55 = (unsigned long )(& __wait) + 24;
60385#line 272
60386        __cil_tmp56 = (unsigned long )(& __wait) + 24;
60387#line 272
60388        *((struct list_head **)__cil_tmp55) = (struct list_head *)__cil_tmp56;
60389#line 272
60390        __cil_tmp57 = 24 + 8;
60391#line 272
60392        __cil_tmp58 = (unsigned long )(& __wait) + __cil_tmp57;
60393#line 272
60394        __cil_tmp59 = (unsigned long )(& __wait) + 24;
60395#line 272
60396        *((struct list_head **)__cil_tmp58) = (struct list_head *)__cil_tmp59;
60397        }
60398        {
60399#line 272
60400        while (1) {
60401          while_continue___0: /* CIL Label */ ;
60402          {
60403#line 272
60404          __cil_tmp60 = (unsigned long )dev_priv;
60405#line 272
60406          __cil_tmp61 = __cil_tmp60 + 2888;
60407#line 272
60408          __cil_tmp62 = (wait_queue_head_t *)__cil_tmp61;
60409#line 272
60410          prepare_to_wait(__cil_tmp62, & __wait, 1);
60411#line 272
60412          tmp___14 = vmw_seqno_passed(dev_priv, seqno);
60413          }
60414#line 272
60415          if (tmp___14) {
60416#line 272
60417            goto while_break___0;
60418          } else {
60419
60420          }
60421          {
60422#line 272
60423          tmp___15 = get_current();
60424#line 272
60425          tmp___16 = signal_pending(tmp___15);
60426          }
60427#line 272
60428          if (tmp___16) {
60429
60430          } else {
60431            {
60432#line 272
60433            __ret = schedule_timeout(__ret);
60434            }
60435#line 272
60436            if (! __ret) {
60437#line 272
60438              goto while_break___0;
60439            } else {
60440
60441            }
60442#line 272
60443            goto __Cont;
60444          }
60445#line 272
60446          __ret = -512L;
60447#line 272
60448          goto while_break___0;
60449          __Cont: /* CIL Label */ ;
60450        }
60451        while_break___0: /* CIL Label */ ;
60452        }
60453        {
60454#line 272
60455        __cil_tmp63 = (unsigned long )dev_priv;
60456#line 272
60457        __cil_tmp64 = __cil_tmp63 + 2888;
60458#line 272
60459        __cil_tmp65 = (wait_queue_head_t *)__cil_tmp64;
60460#line 272
60461        finish_wait(__cil_tmp65, & __wait);
60462        }
60463#line 272
60464        goto while_break;
60465      }
60466      while_break: /* CIL Label */ ;
60467      }
60468    }
60469#line 272
60470    ret = __ret;
60471  } else {
60472    {
60473#line 277
60474    __ret___0 = (long )timeout;
60475#line 277
60476    tmp___20 = vmw_seqno_passed(dev_priv, seqno);
60477    }
60478#line 277
60479    if (tmp___20) {
60480
60481    } else {
60482      {
60483#line 277
60484      while (1) {
60485        while_continue___1: /* CIL Label */ ;
60486        {
60487#line 277
60488        tmp___18 = get_current();
60489#line 277
60490        __cil_tmp66 = & __wait___0;
60491#line 277
60492        *((unsigned int *)__cil_tmp66) = 0U;
60493#line 277
60494        __cil_tmp67 = (unsigned long )(& __wait___0) + 8;
60495#line 277
60496        *((void **)__cil_tmp67) = (void *)tmp___18;
60497#line 277
60498        __cil_tmp68 = (unsigned long )(& __wait___0) + 16;
60499#line 277
60500        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp68) = & autoremove_wake_function;
60501#line 277
60502        __cil_tmp69 = (unsigned long )(& __wait___0) + 24;
60503#line 277
60504        __cil_tmp70 = (unsigned long )(& __wait___0) + 24;
60505#line 277
60506        *((struct list_head **)__cil_tmp69) = (struct list_head *)__cil_tmp70;
60507#line 277
60508        __cil_tmp71 = 24 + 8;
60509#line 277
60510        __cil_tmp72 = (unsigned long )(& __wait___0) + __cil_tmp71;
60511#line 277
60512        __cil_tmp73 = (unsigned long )(& __wait___0) + 24;
60513#line 277
60514        *((struct list_head **)__cil_tmp72) = (struct list_head *)__cil_tmp73;
60515        }
60516        {
60517#line 277
60518        while (1) {
60519          while_continue___2: /* CIL Label */ ;
60520          {
60521#line 277
60522          __cil_tmp74 = (unsigned long )dev_priv;
60523#line 277
60524          __cil_tmp75 = __cil_tmp74 + 2888;
60525#line 277
60526          __cil_tmp76 = (wait_queue_head_t *)__cil_tmp75;
60527#line 277
60528          prepare_to_wait(__cil_tmp76, & __wait___0, 2);
60529#line 277
60530          tmp___19 = vmw_seqno_passed(dev_priv, seqno);
60531          }
60532#line 277
60533          if (tmp___19) {
60534#line 277
60535            goto while_break___2;
60536          } else {
60537
60538          }
60539          {
60540#line 277
60541          __ret___0 = schedule_timeout(__ret___0);
60542          }
60543#line 277
60544          if (! __ret___0) {
60545#line 277
60546            goto while_break___2;
60547          } else {
60548
60549          }
60550        }
60551        while_break___2: /* CIL Label */ ;
60552        }
60553        {
60554#line 277
60555        __cil_tmp77 = (unsigned long )dev_priv;
60556#line 277
60557        __cil_tmp78 = __cil_tmp77 + 2888;
60558#line 277
60559        __cil_tmp79 = (wait_queue_head_t *)__cil_tmp78;
60560#line 277
60561        finish_wait(__cil_tmp79, & __wait___0);
60562        }
60563#line 277
60564        goto while_break___1;
60565      }
60566      while_break___1: /* CIL Label */ ;
60567      }
60568    }
60569#line 277
60570    ret = __ret___0;
60571  }
60572  {
60573#line 282
60574  vmw_seqno_waiter_remove(dev_priv);
60575#line 284
60576  __cil_tmp80 = ret == 0L;
60577#line 284
60578  __cil_tmp81 = ! __cil_tmp80;
60579#line 284
60580  __cil_tmp82 = ! __cil_tmp81;
60581#line 284
60582  __cil_tmp83 = (long )__cil_tmp82;
60583#line 284
60584  tmp___22 = __builtin_expect(__cil_tmp83, 0L);
60585  }
60586#line 284
60587  if (tmp___22) {
60588#line 285
60589    ret = -16L;
60590  } else {
60591    {
60592#line 286
60593    __cil_tmp84 = ret > 0L;
60594#line 286
60595    __cil_tmp85 = ! __cil_tmp84;
60596#line 286
60597    __cil_tmp86 = ! __cil_tmp85;
60598#line 286
60599    __cil_tmp87 = (long )__cil_tmp86;
60600#line 286
60601    tmp___21 = __builtin_expect(__cil_tmp87, 1L);
60602    }
60603#line 286
60604    if (tmp___21) {
60605#line 287
60606      ret = 0L;
60607    } else {
60608
60609    }
60610  }
60611#line 289
60612  return ((int )ret);
60613}
60614}
60615#line 300 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60616static struct lock_class_key __key___15  ;
60617#line 292 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60618void vmw_irq_preinstall(struct drm_device *dev ) 
60619{ struct vmw_private *dev_priv ;
60620  struct vmw_private *tmp___7 ;
60621  uint32_t status ;
60622  unsigned long __cil_tmp5 ;
60623  unsigned long __cil_tmp6 ;
60624  uint32_t __cil_tmp7 ;
60625  unsigned int __cil_tmp8 ;
60626  unsigned long __cil_tmp9 ;
60627  unsigned long __cil_tmp10 ;
60628  spinlock_t *__cil_tmp11 ;
60629  unsigned long __cil_tmp12 ;
60630  unsigned long __cil_tmp13 ;
60631  struct raw_spinlock *__cil_tmp14 ;
60632  unsigned long __cil_tmp15 ;
60633  unsigned long __cil_tmp16 ;
60634  unsigned int __cil_tmp17 ;
60635  unsigned int __cil_tmp18 ;
60636  int __cil_tmp19 ;
60637  unsigned long __cil_tmp20 ;
60638  unsigned long __cil_tmp21 ;
60639  unsigned int __cil_tmp22 ;
60640  unsigned int __cil_tmp23 ;
60641  int __cil_tmp24 ;
60642
60643  {
60644  {
60645#line 294
60646  tmp___7 = vmw_priv(dev);
60647#line 294
60648  dev_priv = tmp___7;
60649  }
60650  {
60651#line 297
60652  __cil_tmp5 = (unsigned long )dev_priv;
60653#line 297
60654  __cil_tmp6 = __cil_tmp5 + 2156;
60655#line 297
60656  __cil_tmp7 = *((uint32_t *)__cil_tmp6);
60657#line 297
60658  __cil_tmp8 = __cil_tmp7 & 262144U;
60659#line 297
60660  if (! __cil_tmp8) {
60661#line 298
60662    return;
60663  } else {
60664
60665  }
60666  }
60667  {
60668#line 300
60669  while (1) {
60670    while_continue: /* CIL Label */ ;
60671    {
60672#line 300
60673    __cil_tmp9 = (unsigned long )dev_priv;
60674#line 300
60675    __cil_tmp10 = __cil_tmp9 + 2984;
60676#line 300
60677    __cil_tmp11 = (spinlock_t *)__cil_tmp10;
60678#line 300
60679    spinlock_check(__cil_tmp11);
60680    }
60681    {
60682#line 300
60683    while (1) {
60684      while_continue___0: /* CIL Label */ ;
60685      {
60686#line 300
60687      __cil_tmp12 = (unsigned long )dev_priv;
60688#line 300
60689      __cil_tmp13 = __cil_tmp12 + 2984;
60690#line 300
60691      __cil_tmp14 = (struct raw_spinlock *)__cil_tmp13;
60692#line 300
60693      __raw_spin_lock_init(__cil_tmp14, "&(&dev_priv->irq_lock)->rlock", & __key___15);
60694      }
60695#line 300
60696      goto while_break___0;
60697    }
60698    while_break___0: /* CIL Label */ ;
60699    }
60700#line 300
60701    goto while_break;
60702  }
60703  while_break: /* CIL Label */ ;
60704  }
60705  {
60706#line 301
60707  __cil_tmp15 = (unsigned long )dev_priv;
60708#line 301
60709  __cil_tmp16 = __cil_tmp15 + 2104;
60710#line 301
60711  __cil_tmp17 = *((unsigned int *)__cil_tmp16);
60712#line 301
60713  __cil_tmp18 = __cil_tmp17 + 8U;
60714#line 301
60715  __cil_tmp19 = (int )__cil_tmp18;
60716#line 301
60717  status = inl(__cil_tmp19);
60718#line 302
60719  __cil_tmp20 = (unsigned long )dev_priv;
60720#line 302
60721  __cil_tmp21 = __cil_tmp20 + 2104;
60722#line 302
60723  __cil_tmp22 = *((unsigned int *)__cil_tmp21);
60724#line 302
60725  __cil_tmp23 = __cil_tmp22 + 8U;
60726#line 302
60727  __cil_tmp24 = (int )__cil_tmp23;
60728#line 302
60729  outl(status, __cil_tmp24);
60730  }
60731#line 303
60732  return;
60733}
60734}
60735#line 305 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60736int vmw_irq_postinstall(struct drm_device *dev ) 
60737{ 
60738
60739  {
60740#line 307
60741  return (0);
60742}
60743}
60744#line 310 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c"
60745void vmw_irq_uninstall(struct drm_device *dev ) 
60746{ struct vmw_private *dev_priv ;
60747  struct vmw_private *tmp___7 ;
60748  uint32_t status ;
60749  unsigned long __cil_tmp5 ;
60750  unsigned long __cil_tmp6 ;
60751  uint32_t __cil_tmp7 ;
60752  unsigned int __cil_tmp8 ;
60753  unsigned long __cil_tmp9 ;
60754  unsigned long __cil_tmp10 ;
60755  struct mutex *__cil_tmp11 ;
60756  uint32_t __cil_tmp12 ;
60757  unsigned long __cil_tmp13 ;
60758  unsigned long __cil_tmp14 ;
60759  struct mutex *__cil_tmp15 ;
60760  unsigned long __cil_tmp16 ;
60761  unsigned long __cil_tmp17 ;
60762  unsigned int __cil_tmp18 ;
60763  unsigned int __cil_tmp19 ;
60764  int __cil_tmp20 ;
60765  unsigned long __cil_tmp21 ;
60766  unsigned long __cil_tmp22 ;
60767  unsigned int __cil_tmp23 ;
60768  unsigned int __cil_tmp24 ;
60769  int __cil_tmp25 ;
60770
60771  {
60772  {
60773#line 312
60774  tmp___7 = vmw_priv(dev);
60775#line 312
60776  dev_priv = tmp___7;
60777  }
60778  {
60779#line 315
60780  __cil_tmp5 = (unsigned long )dev_priv;
60781#line 315
60782  __cil_tmp6 = __cil_tmp5 + 2156;
60783#line 315
60784  __cil_tmp7 = *((uint32_t *)__cil_tmp6);
60785#line 315
60786  __cil_tmp8 = __cil_tmp7 & 262144U;
60787#line 315
60788  if (! __cil_tmp8) {
60789#line 316
60790    return;
60791  } else {
60792
60793  }
60794  }
60795  {
60796#line 318
60797  __cil_tmp9 = (unsigned long )dev_priv;
60798#line 318
60799  __cil_tmp10 = __cil_tmp9 + 2184;
60800#line 318
60801  __cil_tmp11 = (struct mutex *)__cil_tmp10;
60802#line 318
60803  mutex_lock(__cil_tmp11);
60804#line 319
60805  __cil_tmp12 = (uint32_t )0;
60806#line 319
60807  vmw_write(dev_priv, 33U, __cil_tmp12);
60808#line 320
60809  __cil_tmp13 = (unsigned long )dev_priv;
60810#line 320
60811  __cil_tmp14 = __cil_tmp13 + 2184;
60812#line 320
60813  __cil_tmp15 = (struct mutex *)__cil_tmp14;
60814#line 320
60815  mutex_unlock(__cil_tmp15);
60816#line 322
60817  __cil_tmp16 = (unsigned long )dev_priv;
60818#line 322
60819  __cil_tmp17 = __cil_tmp16 + 2104;
60820#line 322
60821  __cil_tmp18 = *((unsigned int *)__cil_tmp17);
60822#line 322
60823  __cil_tmp19 = __cil_tmp18 + 8U;
60824#line 322
60825  __cil_tmp20 = (int )__cil_tmp19;
60826#line 322
60827  status = inl(__cil_tmp20);
60828#line 323
60829  __cil_tmp21 = (unsigned long )dev_priv;
60830#line 323
60831  __cil_tmp22 = __cil_tmp21 + 2104;
60832#line 323
60833  __cil_tmp23 = *((unsigned int *)__cil_tmp22);
60834#line 323
60835  __cil_tmp24 = __cil_tmp23 + 8U;
60836#line 323
60837  __cil_tmp25 = (int )__cil_tmp24;
60838#line 323
60839  outl(status, __cil_tmp25);
60840  }
60841#line 324
60842  return;
60843}
60844}
60845#line 818 "include/drm/drm_crtc.h"
60846extern int drm_crtc_init(struct drm_device *dev , struct drm_crtc *crtc , struct drm_crtc_funcs    *funcs ) ;
60847#line 823
60848extern int drm_connector_init(struct drm_device *dev , struct drm_connector *connector ,
60849                              struct drm_connector_funcs    *funcs , int connector_type ) ;
60850#line 832
60851extern int drm_encoder_init(struct drm_device *dev , struct drm_encoder *encoder ,
60852                            struct drm_encoder_funcs    *funcs , int encoder_type ) ;
60853#line 913
60854extern int drm_connector_attach_property(struct drm_connector *connector , struct drm_property *property ,
60855                                         uint64_t init_val ) ;
60856#line 932
60857extern int drm_mode_create_dirty_info_property(struct drm_device *dev ) ;
60858#line 935
60859extern int drm_mode_connector_attach_encoder(struct drm_connector *connector , struct drm_encoder *encoder ) ;
60860#line 939
60861extern int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc , int gamma_size ) ;
60862#line 1435 "include/drm/drmP.h"
60863extern int drm_vblank_init(struct drm_device *dev , int num_crtcs ) ;
60864#line 1446
60865extern void drm_vblank_cleanup(struct drm_device *dev ) ;
60866#line 57 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
60867static void vmw_ldu_destroy(struct vmw_legacy_display_unit *ldu ) 
60868{ unsigned long __cil_tmp2 ;
60869  unsigned long __cil_tmp3 ;
60870  struct list_head *__cil_tmp4 ;
60871  struct vmw_display_unit *__cil_tmp5 ;
60872  void    *__cil_tmp6 ;
60873
60874  {
60875  {
60876#line 59
60877  __cil_tmp2 = (unsigned long )ldu;
60878#line 59
60879  __cil_tmp3 = __cil_tmp2 + 2072;
60880#line 59
60881  __cil_tmp4 = (struct list_head *)__cil_tmp3;
60882#line 59
60883  list_del_init(__cil_tmp4);
60884#line 60
60885  __cil_tmp5 = (struct vmw_display_unit *)ldu;
60886#line 60
60887  vmw_display_unit_cleanup(__cil_tmp5);
60888#line 61
60889  __cil_tmp6 = (void    *)ldu;
60890#line 61
60891  kfree(__cil_tmp6);
60892  }
60893#line 62
60894  return;
60895}
60896}
60897#line 69 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
60898static void vmw_ldu_crtc_destroy(struct drm_crtc *crtc ) 
60899{ struct drm_crtc    *__mptr ;
60900  struct vmw_legacy_display_unit *__cil_tmp3 ;
60901  struct drm_crtc *__cil_tmp4 ;
60902  unsigned int __cil_tmp5 ;
60903  char *__cil_tmp6 ;
60904  char *__cil_tmp7 ;
60905  struct vmw_legacy_display_unit *__cil_tmp8 ;
60906
60907  {
60908  {
60909#line 71
60910  __mptr = (struct drm_crtc    *)crtc;
60911#line 71
60912  __cil_tmp3 = (struct vmw_legacy_display_unit *)0;
60913#line 71
60914  __cil_tmp4 = (struct drm_crtc *)__cil_tmp3;
60915#line 71
60916  __cil_tmp5 = (unsigned int )__cil_tmp4;
60917#line 71
60918  __cil_tmp6 = (char *)__mptr;
60919#line 71
60920  __cil_tmp7 = __cil_tmp6 - __cil_tmp5;
60921#line 71
60922  __cil_tmp8 = (struct vmw_legacy_display_unit *)__cil_tmp7;
60923#line 71
60924  vmw_ldu_destroy(__cil_tmp8);
60925  }
60926#line 72
60927  return;
60928}
60929}
60930#line 74 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
60931static int vmw_ldu_commit_list(struct vmw_private *dev_priv ) 
60932{ struct vmw_legacy_display *lds ;
60933  struct vmw_legacy_display_unit *entry ;
60934  struct vmw_display_unit *du ;
60935  struct drm_framebuffer *fb ;
60936  struct drm_crtc *crtc ;
60937  int i ;
60938  int ret ;
60939  int w ;
60940  int h ;
60941  struct list_head    *__mptr ;
60942  struct list_head    *__mptr___0 ;
60943  int _max1 ;
60944  int _max2 ;
60945  int tmp___7 ;
60946  int _max1___0 ;
60947  int _max2___0 ;
60948  int tmp___8 ;
60949  int tmp___9 ;
60950  struct list_head    *__mptr___1 ;
60951  int tmp___10 ;
60952  unsigned int tmp___11 ;
60953  struct list_head    *__mptr___2 ;
60954  struct list_head    *__mptr___3 ;
60955  long tmp___12 ;
60956  struct list_head    *__mptr___4 ;
60957  struct list_head    *__mptr___5 ;
60958  unsigned long __cil_tmp28 ;
60959  unsigned long __cil_tmp29 ;
60960  void *__cil_tmp30 ;
60961  void *__cil_tmp31 ;
60962  void *__cil_tmp32 ;
60963  unsigned long __cil_tmp33 ;
60964  unsigned long __cil_tmp34 ;
60965  uint32_t __cil_tmp35 ;
60966  unsigned int __cil_tmp36 ;
60967  struct list_head *__cil_tmp37 ;
60968  struct vmw_legacy_display_unit *__cil_tmp38 ;
60969  unsigned long __cil_tmp39 ;
60970  unsigned long __cil_tmp40 ;
60971  struct list_head *__cil_tmp41 ;
60972  unsigned int __cil_tmp42 ;
60973  char *__cil_tmp43 ;
60974  char *__cil_tmp44 ;
60975  struct list_head *__cil_tmp45 ;
60976  unsigned long __cil_tmp46 ;
60977  unsigned long __cil_tmp47 ;
60978  unsigned long __cil_tmp48 ;
60979  struct list_head *__cil_tmp49 ;
60980  unsigned long __cil_tmp50 ;
60981  int *__cil_tmp51 ;
60982  int *__cil_tmp52 ;
60983  unsigned long __cil_tmp53 ;
60984  unsigned long __cil_tmp54 ;
60985  unsigned long __cil_tmp55 ;
60986  int __cil_tmp56 ;
60987  unsigned long __cil_tmp57 ;
60988  unsigned long __cil_tmp58 ;
60989  int __cil_tmp59 ;
60990  int *__cil_tmp60 ;
60991  int __cil_tmp61 ;
60992  int *__cil_tmp62 ;
60993  int __cil_tmp63 ;
60994  int *__cil_tmp64 ;
60995  int *__cil_tmp65 ;
60996  int *__cil_tmp66 ;
60997  int *__cil_tmp67 ;
60998  unsigned long __cil_tmp68 ;
60999  unsigned long __cil_tmp69 ;
61000  unsigned long __cil_tmp70 ;
61001  int __cil_tmp71 ;
61002  unsigned long __cil_tmp72 ;
61003  unsigned long __cil_tmp73 ;
61004  int __cil_tmp74 ;
61005  int *__cil_tmp75 ;
61006  int __cil_tmp76 ;
61007  int *__cil_tmp77 ;
61008  int __cil_tmp78 ;
61009  int *__cil_tmp79 ;
61010  int *__cil_tmp80 ;
61011  unsigned long __cil_tmp81 ;
61012  unsigned long __cil_tmp82 ;
61013  struct list_head *__cil_tmp83 ;
61014  struct vmw_legacy_display_unit *__cil_tmp84 ;
61015  unsigned long __cil_tmp85 ;
61016  unsigned long __cil_tmp86 ;
61017  struct list_head *__cil_tmp87 ;
61018  unsigned int __cil_tmp88 ;
61019  char *__cil_tmp89 ;
61020  char *__cil_tmp90 ;
61021  void *__cil_tmp91 ;
61022  unsigned long __cil_tmp92 ;
61023  unsigned long __cil_tmp93 ;
61024  unsigned long __cil_tmp94 ;
61025  unsigned long __cil_tmp95 ;
61026  unsigned long __cil_tmp96 ;
61027  unsigned long __cil_tmp97 ;
61028  unsigned int __cil_tmp98 ;
61029  unsigned int __cil_tmp99 ;
61030  unsigned long __cil_tmp100 ;
61031  unsigned long __cil_tmp101 ;
61032  unsigned long __cil_tmp102 ;
61033  unsigned long __cil_tmp103 ;
61034  unsigned int __cil_tmp104 ;
61035  unsigned long __cil_tmp105 ;
61036  unsigned long __cil_tmp106 ;
61037  int __cil_tmp107 ;
61038  unsigned int __cil_tmp108 ;
61039  unsigned long __cil_tmp109 ;
61040  unsigned long __cil_tmp110 ;
61041  unsigned int __cil_tmp111 ;
61042  struct list_head *__cil_tmp112 ;
61043  struct list_head    *__cil_tmp113 ;
61044  struct list_head *__cil_tmp114 ;
61045  struct vmw_legacy_display_unit *__cil_tmp115 ;
61046  unsigned long __cil_tmp116 ;
61047  unsigned long __cil_tmp117 ;
61048  struct list_head *__cil_tmp118 ;
61049  unsigned int __cil_tmp119 ;
61050  char *__cil_tmp120 ;
61051  char *__cil_tmp121 ;
61052  unsigned long __cil_tmp122 ;
61053  unsigned long __cil_tmp123 ;
61054  unsigned long __cil_tmp124 ;
61055  unsigned long __cil_tmp125 ;
61056  unsigned long __cil_tmp126 ;
61057  unsigned long __cil_tmp127 ;
61058  unsigned int __cil_tmp128 ;
61059  unsigned long __cil_tmp129 ;
61060  unsigned long __cil_tmp130 ;
61061  unsigned int __cil_tmp131 ;
61062  unsigned long __cil_tmp132 ;
61063  unsigned long __cil_tmp133 ;
61064  unsigned long __cil_tmp134 ;
61065  unsigned long __cil_tmp135 ;
61066  unsigned int __cil_tmp136 ;
61067  unsigned long __cil_tmp137 ;
61068  unsigned long __cil_tmp138 ;
61069  int __cil_tmp139 ;
61070  unsigned int __cil_tmp140 ;
61071  unsigned long __cil_tmp141 ;
61072  unsigned long __cil_tmp142 ;
61073  unsigned int __cil_tmp143 ;
61074  unsigned long __cil_tmp144 ;
61075  unsigned long __cil_tmp145 ;
61076  unsigned long __cil_tmp146 ;
61077  unsigned long __cil_tmp147 ;
61078  struct list_head *__cil_tmp148 ;
61079  struct vmw_legacy_display_unit *__cil_tmp149 ;
61080  unsigned long __cil_tmp150 ;
61081  unsigned long __cil_tmp151 ;
61082  struct list_head *__cil_tmp152 ;
61083  unsigned int __cil_tmp153 ;
61084  char *__cil_tmp154 ;
61085  char *__cil_tmp155 ;
61086  struct list_head *__cil_tmp156 ;
61087  unsigned long __cil_tmp157 ;
61088  unsigned long __cil_tmp158 ;
61089  unsigned long __cil_tmp159 ;
61090  struct list_head *__cil_tmp160 ;
61091  unsigned long __cil_tmp161 ;
61092  uint32_t __cil_tmp162 ;
61093  int __cil_tmp163 ;
61094  uint32_t __cil_tmp164 ;
61095  unsigned long __cil_tmp165 ;
61096  unsigned long __cil_tmp166 ;
61097  int __cil_tmp167 ;
61098  uint32_t __cil_tmp168 ;
61099  unsigned long __cil_tmp169 ;
61100  unsigned long __cil_tmp170 ;
61101  int __cil_tmp171 ;
61102  uint32_t __cil_tmp172 ;
61103  unsigned long __cil_tmp173 ;
61104  unsigned long __cil_tmp174 ;
61105  unsigned long __cil_tmp175 ;
61106  int __cil_tmp176 ;
61107  uint32_t __cil_tmp177 ;
61108  unsigned long __cil_tmp178 ;
61109  unsigned long __cil_tmp179 ;
61110  unsigned long __cil_tmp180 ;
61111  int __cil_tmp181 ;
61112  uint32_t __cil_tmp182 ;
61113  unsigned long __cil_tmp183 ;
61114  unsigned long __cil_tmp184 ;
61115  struct list_head *__cil_tmp185 ;
61116  struct vmw_legacy_display_unit *__cil_tmp186 ;
61117  unsigned long __cil_tmp187 ;
61118  unsigned long __cil_tmp188 ;
61119  struct list_head *__cil_tmp189 ;
61120  unsigned int __cil_tmp190 ;
61121  char *__cil_tmp191 ;
61122  char *__cil_tmp192 ;
61123  unsigned long __cil_tmp193 ;
61124  unsigned long __cil_tmp194 ;
61125  unsigned int __cil_tmp195 ;
61126  unsigned int __cil_tmp196 ;
61127  int __cil_tmp197 ;
61128  int __cil_tmp198 ;
61129  int __cil_tmp199 ;
61130  long __cil_tmp200 ;
61131  unsigned long __cil_tmp201 ;
61132  unsigned long __cil_tmp202 ;
61133  unsigned long __cil_tmp203 ;
61134  unsigned long __cil_tmp204 ;
61135  struct list_head *__cil_tmp205 ;
61136  struct vmw_legacy_display_unit *__cil_tmp206 ;
61137  unsigned long __cil_tmp207 ;
61138  unsigned long __cil_tmp208 ;
61139  struct list_head *__cil_tmp209 ;
61140  unsigned int __cil_tmp210 ;
61141  char *__cil_tmp211 ;
61142  char *__cil_tmp212 ;
61143  struct list_head *__cil_tmp213 ;
61144  unsigned long __cil_tmp214 ;
61145  unsigned long __cil_tmp215 ;
61146  unsigned long __cil_tmp216 ;
61147  struct list_head *__cil_tmp217 ;
61148  unsigned long __cil_tmp218 ;
61149  unsigned long __cil_tmp219 ;
61150  unsigned long __cil_tmp220 ;
61151  struct vmw_dma_buffer *__cil_tmp221 ;
61152  unsigned long __cil_tmp222 ;
61153  unsigned long __cil_tmp223 ;
61154  struct vmw_dma_buffer *__cil_tmp224 ;
61155  u32 __cil_tmp225 ;
61156  u32 __cil_tmp226 ;
61157  unsigned long __cil_tmp227 ;
61158  unsigned long __cil_tmp228 ;
61159  int __cil_tmp229 ;
61160  u32 __cil_tmp230 ;
61161  unsigned long __cil_tmp231 ;
61162  unsigned long __cil_tmp232 ;
61163  int __cil_tmp233 ;
61164  u32 __cil_tmp234 ;
61165  unsigned long __cil_tmp235 ;
61166  unsigned long __cil_tmp236 ;
61167  struct list_head *__cil_tmp237 ;
61168  struct vmw_legacy_display_unit *__cil_tmp238 ;
61169  unsigned long __cil_tmp239 ;
61170  unsigned long __cil_tmp240 ;
61171  struct list_head *__cil_tmp241 ;
61172  unsigned int __cil_tmp242 ;
61173  char *__cil_tmp243 ;
61174  char *__cil_tmp244 ;
61175
61176  {
61177#line 76
61178  __cil_tmp28 = (unsigned long )dev_priv;
61179#line 76
61180  __cil_tmp29 = __cil_tmp28 + 2608;
61181#line 76
61182  lds = *((struct vmw_legacy_display **)__cil_tmp29);
61183#line 78
61184  __cil_tmp30 = (void *)0;
61185#line 78
61186  du = (struct vmw_display_unit *)__cil_tmp30;
61187#line 79
61188  __cil_tmp31 = (void *)0;
61189#line 79
61190  fb = (struct drm_framebuffer *)__cil_tmp31;
61191#line 80
61192  __cil_tmp32 = (void *)0;
61193#line 80
61194  crtc = (struct drm_crtc *)__cil_tmp32;
61195#line 81
61196  i = 0;
61197  {
61198#line 86
61199  __cil_tmp33 = (unsigned long )dev_priv;
61200#line 86
61201  __cil_tmp34 = __cil_tmp33 + 2156;
61202#line 86
61203  __cil_tmp35 = *((uint32_t *)__cil_tmp34);
61204#line 86
61205  __cil_tmp36 = __cil_tmp35 & 524288U;
61206#line 86
61207  if (! __cil_tmp36) {
61208#line 87
61209    w = 0;
61210#line 87
61211    h = 0;
61212#line 88
61213    __cil_tmp37 = *((struct list_head **)lds);
61214#line 88
61215    __mptr = (struct list_head    *)__cil_tmp37;
61216#line 88
61217    __cil_tmp38 = (struct vmw_legacy_display_unit *)0;
61218#line 88
61219    __cil_tmp39 = (unsigned long )__cil_tmp38;
61220#line 88
61221    __cil_tmp40 = __cil_tmp39 + 2072;
61222#line 88
61223    __cil_tmp41 = (struct list_head *)__cil_tmp40;
61224#line 88
61225    __cil_tmp42 = (unsigned int )__cil_tmp41;
61226#line 88
61227    __cil_tmp43 = (char *)__mptr;
61228#line 88
61229    __cil_tmp44 = __cil_tmp43 - __cil_tmp42;
61230#line 88
61231    entry = (struct vmw_legacy_display_unit *)__cil_tmp44;
61232    {
61233#line 88
61234    while (1) {
61235      while_continue: /* CIL Label */ ;
61236      {
61237#line 88
61238      __cil_tmp45 = (struct list_head *)lds;
61239#line 88
61240      __cil_tmp46 = (unsigned long )__cil_tmp45;
61241#line 88
61242      __cil_tmp47 = (unsigned long )entry;
61243#line 88
61244      __cil_tmp48 = __cil_tmp47 + 2072;
61245#line 88
61246      __cil_tmp49 = (struct list_head *)__cil_tmp48;
61247#line 88
61248      __cil_tmp50 = (unsigned long )__cil_tmp49;
61249#line 88
61250      if (__cil_tmp50 != __cil_tmp46) {
61251
61252      } else {
61253#line 88
61254        goto while_break;
61255      }
61256      }
61257#line 89
61258      crtc = (struct drm_crtc *)entry;
61259#line 90
61260      __cil_tmp51 = & _max1;
61261#line 90
61262      *__cil_tmp51 = w;
61263#line 90
61264      __cil_tmp52 = & _max2;
61265#line 90
61266      __cil_tmp53 = 48 + 68;
61267#line 90
61268      __cil_tmp54 = (unsigned long )crtc;
61269#line 90
61270      __cil_tmp55 = __cil_tmp54 + __cil_tmp53;
61271#line 90
61272      __cil_tmp56 = *((int *)__cil_tmp55);
61273#line 90
61274      __cil_tmp57 = (unsigned long )crtc;
61275#line 90
61276      __cil_tmp58 = __cil_tmp57 + 480;
61277#line 90
61278      __cil_tmp59 = *((int *)__cil_tmp58);
61279#line 90
61280      *__cil_tmp52 = __cil_tmp59 + __cil_tmp56;
61281      {
61282#line 90
61283      __cil_tmp60 = & _max2;
61284#line 90
61285      __cil_tmp61 = *__cil_tmp60;
61286#line 90
61287      __cil_tmp62 = & _max1;
61288#line 90
61289      __cil_tmp63 = *__cil_tmp62;
61290#line 90
61291      if (__cil_tmp63 > __cil_tmp61) {
61292#line 90
61293        __cil_tmp64 = & _max1;
61294#line 90
61295        tmp___7 = *__cil_tmp64;
61296      } else {
61297#line 90
61298        __cil_tmp65 = & _max2;
61299#line 90
61300        tmp___7 = *__cil_tmp65;
61301      }
61302      }
61303#line 90
61304      w = tmp___7;
61305#line 91
61306      __cil_tmp66 = & _max1___0;
61307#line 91
61308      *__cil_tmp66 = h;
61309#line 91
61310      __cil_tmp67 = & _max2___0;
61311#line 91
61312      __cil_tmp68 = 48 + 88;
61313#line 91
61314      __cil_tmp69 = (unsigned long )crtc;
61315#line 91
61316      __cil_tmp70 = __cil_tmp69 + __cil_tmp68;
61317#line 91
61318      __cil_tmp71 = *((int *)__cil_tmp70);
61319#line 91
61320      __cil_tmp72 = (unsigned long )crtc;
61321#line 91
61322      __cil_tmp73 = __cil_tmp72 + 484;
61323#line 91
61324      __cil_tmp74 = *((int *)__cil_tmp73);
61325#line 91
61326      *__cil_tmp67 = __cil_tmp74 + __cil_tmp71;
61327      {
61328#line 91
61329      __cil_tmp75 = & _max2___0;
61330#line 91
61331      __cil_tmp76 = *__cil_tmp75;
61332#line 91
61333      __cil_tmp77 = & _max1___0;
61334#line 91
61335      __cil_tmp78 = *__cil_tmp77;
61336#line 91
61337      if (__cil_tmp78 > __cil_tmp76) {
61338#line 91
61339        __cil_tmp79 = & _max1___0;
61340#line 91
61341        tmp___8 = *__cil_tmp79;
61342      } else {
61343#line 91
61344        __cil_tmp80 = & _max2___0;
61345#line 91
61346        tmp___8 = *__cil_tmp80;
61347      }
61348      }
61349#line 91
61350      h = tmp___8;
61351#line 92
61352      i = i + 1;
61353#line 88
61354      __cil_tmp81 = (unsigned long )entry;
61355#line 88
61356      __cil_tmp82 = __cil_tmp81 + 2072;
61357#line 88
61358      __cil_tmp83 = *((struct list_head **)__cil_tmp82);
61359#line 88
61360      __mptr___0 = (struct list_head    *)__cil_tmp83;
61361#line 88
61362      __cil_tmp84 = (struct vmw_legacy_display_unit *)0;
61363#line 88
61364      __cil_tmp85 = (unsigned long )__cil_tmp84;
61365#line 88
61366      __cil_tmp86 = __cil_tmp85 + 2072;
61367#line 88
61368      __cil_tmp87 = (struct list_head *)__cil_tmp86;
61369#line 88
61370      __cil_tmp88 = (unsigned int )__cil_tmp87;
61371#line 88
61372      __cil_tmp89 = (char *)__mptr___0;
61373#line 88
61374      __cil_tmp90 = __cil_tmp89 - __cil_tmp88;
61375#line 88
61376      entry = (struct vmw_legacy_display_unit *)__cil_tmp90;
61377    }
61378    while_break: /* CIL Label */ ;
61379    }
61380    {
61381#line 95
61382    __cil_tmp91 = (void *)0;
61383#line 95
61384    __cil_tmp92 = (unsigned long )__cil_tmp91;
61385#line 95
61386    __cil_tmp93 = (unsigned long )crtc;
61387#line 95
61388    if (__cil_tmp93 == __cil_tmp92) {
61389#line 96
61390      return (0);
61391    } else {
61392
61393    }
61394    }
61395    {
61396#line 97
61397    __cil_tmp94 = 0 + 32;
61398#line 97
61399    __cil_tmp95 = 0 + __cil_tmp94;
61400#line 97
61401    __cil_tmp96 = (unsigned long )entry;
61402#line 97
61403    __cil_tmp97 = __cil_tmp96 + __cil_tmp95;
61404#line 97
61405    fb = *((struct drm_framebuffer **)__cil_tmp97);
61406#line 99
61407    __cil_tmp98 = (unsigned int )w;
61408#line 99
61409    __cil_tmp99 = (unsigned int )h;
61410#line 99
61411    __cil_tmp100 = 0 * 4UL;
61412#line 99
61413    __cil_tmp101 = 40 + __cil_tmp100;
61414#line 99
61415    __cil_tmp102 = (unsigned long )fb;
61416#line 99
61417    __cil_tmp103 = __cil_tmp102 + __cil_tmp101;
61418#line 99
61419    __cil_tmp104 = *((unsigned int *)__cil_tmp103);
61420#line 99
61421    __cil_tmp105 = (unsigned long )fb;
61422#line 99
61423    __cil_tmp106 = __cil_tmp105 + 84;
61424#line 99
61425    __cil_tmp107 = *((int *)__cil_tmp106);
61426#line 99
61427    __cil_tmp108 = (unsigned int )__cil_tmp107;
61428#line 99
61429    __cil_tmp109 = (unsigned long )fb;
61430#line 99
61431    __cil_tmp110 = __cil_tmp109 + 80;
61432#line 99
61433    __cil_tmp111 = *((unsigned int *)__cil_tmp110);
61434#line 99
61435    tmp___9 = vmw_kms_write_svga(dev_priv, __cil_tmp98, __cil_tmp99, __cil_tmp104,
61436                                 __cil_tmp108, __cil_tmp111);
61437    }
61438#line 99
61439    return (tmp___9);
61440  } else {
61441
61442  }
61443  }
61444  {
61445#line 103
61446  __cil_tmp112 = (struct list_head *)lds;
61447#line 103
61448  __cil_tmp113 = (struct list_head    *)__cil_tmp112;
61449#line 103
61450  tmp___10 = list_empty(__cil_tmp113);
61451  }
61452#line 103
61453  if (tmp___10) {
61454
61455  } else {
61456    {
61457#line 104
61458    __cil_tmp114 = *((struct list_head **)lds);
61459#line 104
61460    __mptr___1 = (struct list_head    *)__cil_tmp114;
61461#line 104
61462    __cil_tmp115 = (struct vmw_legacy_display_unit *)0;
61463#line 104
61464    __cil_tmp116 = (unsigned long )__cil_tmp115;
61465#line 104
61466    __cil_tmp117 = __cil_tmp116 + 2072;
61467#line 104
61468    __cil_tmp118 = (struct list_head *)__cil_tmp117;
61469#line 104
61470    __cil_tmp119 = (unsigned int )__cil_tmp118;
61471#line 104
61472    __cil_tmp120 = (char *)__mptr___1;
61473#line 104
61474    __cil_tmp121 = __cil_tmp120 - __cil_tmp119;
61475#line 104
61476    entry = (struct vmw_legacy_display_unit *)__cil_tmp121;
61477#line 105
61478    __cil_tmp122 = 0 + 32;
61479#line 105
61480    __cil_tmp123 = 0 + __cil_tmp122;
61481#line 105
61482    __cil_tmp124 = (unsigned long )entry;
61483#line 105
61484    __cil_tmp125 = __cil_tmp124 + __cil_tmp123;
61485#line 105
61486    fb = *((struct drm_framebuffer **)__cil_tmp125);
61487#line 107
61488    __cil_tmp126 = (unsigned long )fb;
61489#line 107
61490    __cil_tmp127 = __cil_tmp126 + 72;
61491#line 107
61492    __cil_tmp128 = *((unsigned int *)__cil_tmp127);
61493#line 107
61494    __cil_tmp129 = (unsigned long )fb;
61495#line 107
61496    __cil_tmp130 = __cil_tmp129 + 76;
61497#line 107
61498    __cil_tmp131 = *((unsigned int *)__cil_tmp130);
61499#line 107
61500    __cil_tmp132 = 0 * 4UL;
61501#line 107
61502    __cil_tmp133 = 40 + __cil_tmp132;
61503#line 107
61504    __cil_tmp134 = (unsigned long )fb;
61505#line 107
61506    __cil_tmp135 = __cil_tmp134 + __cil_tmp133;
61507#line 107
61508    __cil_tmp136 = *((unsigned int *)__cil_tmp135);
61509#line 107
61510    __cil_tmp137 = (unsigned long )fb;
61511#line 107
61512    __cil_tmp138 = __cil_tmp137 + 84;
61513#line 107
61514    __cil_tmp139 = *((int *)__cil_tmp138);
61515#line 107
61516    __cil_tmp140 = (unsigned int )__cil_tmp139;
61517#line 107
61518    __cil_tmp141 = (unsigned long )fb;
61519#line 107
61520    __cil_tmp142 = __cil_tmp141 + 80;
61521#line 107
61522    __cil_tmp143 = *((unsigned int *)__cil_tmp142);
61523#line 107
61524    vmw_kms_write_svga(dev_priv, __cil_tmp128, __cil_tmp131, __cil_tmp136, __cil_tmp140,
61525                       __cil_tmp143);
61526    }
61527  }
61528  {
61529#line 112
61530  __cil_tmp144 = (unsigned long )lds;
61531#line 112
61532  __cil_tmp145 = __cil_tmp144 + 16;
61533#line 112
61534  if (*((unsigned int *)__cil_tmp145)) {
61535#line 112
61536    __cil_tmp146 = (unsigned long )lds;
61537#line 112
61538    __cil_tmp147 = __cil_tmp146 + 16;
61539#line 112
61540    tmp___11 = *((unsigned int *)__cil_tmp147);
61541  } else {
61542#line 112
61543    tmp___11 = 1U;
61544  }
61545  }
61546  {
61547#line 112
61548  vmw_write(dev_priv, 34U, tmp___11);
61549#line 115
61550  i = 0;
61551#line 116
61552  __cil_tmp148 = *((struct list_head **)lds);
61553#line 116
61554  __mptr___2 = (struct list_head    *)__cil_tmp148;
61555#line 116
61556  __cil_tmp149 = (struct vmw_legacy_display_unit *)0;
61557#line 116
61558  __cil_tmp150 = (unsigned long )__cil_tmp149;
61559#line 116
61560  __cil_tmp151 = __cil_tmp150 + 2072;
61561#line 116
61562  __cil_tmp152 = (struct list_head *)__cil_tmp151;
61563#line 116
61564  __cil_tmp153 = (unsigned int )__cil_tmp152;
61565#line 116
61566  __cil_tmp154 = (char *)__mptr___2;
61567#line 116
61568  __cil_tmp155 = __cil_tmp154 - __cil_tmp153;
61569#line 116
61570  entry = (struct vmw_legacy_display_unit *)__cil_tmp155;
61571  }
61572  {
61573#line 116
61574  while (1) {
61575    while_continue___0: /* CIL Label */ ;
61576    {
61577#line 116
61578    __cil_tmp156 = (struct list_head *)lds;
61579#line 116
61580    __cil_tmp157 = (unsigned long )__cil_tmp156;
61581#line 116
61582    __cil_tmp158 = (unsigned long )entry;
61583#line 116
61584    __cil_tmp159 = __cil_tmp158 + 2072;
61585#line 116
61586    __cil_tmp160 = (struct list_head *)__cil_tmp159;
61587#line 116
61588    __cil_tmp161 = (unsigned long )__cil_tmp160;
61589#line 116
61590    if (__cil_tmp161 != __cil_tmp157) {
61591
61592    } else {
61593#line 116
61594      goto while_break___0;
61595    }
61596    }
61597    {
61598#line 117
61599    crtc = (struct drm_crtc *)entry;
61600#line 119
61601    __cil_tmp162 = (uint32_t )i;
61602#line 119
61603    vmw_write(dev_priv, 35U, __cil_tmp162);
61604#line 120
61605    __cil_tmp163 = ! i;
61606#line 120
61607    __cil_tmp164 = (uint32_t )__cil_tmp163;
61608#line 120
61609    vmw_write(dev_priv, 36U, __cil_tmp164);
61610#line 121
61611    __cil_tmp165 = (unsigned long )crtc;
61612#line 121
61613    __cil_tmp166 = __cil_tmp165 + 480;
61614#line 121
61615    __cil_tmp167 = *((int *)__cil_tmp166);
61616#line 121
61617    __cil_tmp168 = (uint32_t )__cil_tmp167;
61618#line 121
61619    vmw_write(dev_priv, 37U, __cil_tmp168);
61620#line 122
61621    __cil_tmp169 = (unsigned long )crtc;
61622#line 122
61623    __cil_tmp170 = __cil_tmp169 + 484;
61624#line 122
61625    __cil_tmp171 = *((int *)__cil_tmp170);
61626#line 122
61627    __cil_tmp172 = (uint32_t )__cil_tmp171;
61628#line 122
61629    vmw_write(dev_priv, 38U, __cil_tmp172);
61630#line 123
61631    __cil_tmp173 = 48 + 68;
61632#line 123
61633    __cil_tmp174 = (unsigned long )crtc;
61634#line 123
61635    __cil_tmp175 = __cil_tmp174 + __cil_tmp173;
61636#line 123
61637    __cil_tmp176 = *((int *)__cil_tmp175);
61638#line 123
61639    __cil_tmp177 = (uint32_t )__cil_tmp176;
61640#line 123
61641    vmw_write(dev_priv, 39U, __cil_tmp177);
61642#line 124
61643    __cil_tmp178 = 48 + 88;
61644#line 124
61645    __cil_tmp179 = (unsigned long )crtc;
61646#line 124
61647    __cil_tmp180 = __cil_tmp179 + __cil_tmp178;
61648#line 124
61649    __cil_tmp181 = *((int *)__cil_tmp180);
61650#line 124
61651    __cil_tmp182 = (uint32_t )__cil_tmp181;
61652#line 124
61653    vmw_write(dev_priv, 40U, __cil_tmp182);
61654#line 125
61655    vmw_write(dev_priv, 35U, 4294967295U);
61656#line 127
61657    i = i + 1;
61658#line 116
61659    __cil_tmp183 = (unsigned long )entry;
61660#line 116
61661    __cil_tmp184 = __cil_tmp183 + 2072;
61662#line 116
61663    __cil_tmp185 = *((struct list_head **)__cil_tmp184);
61664#line 116
61665    __mptr___3 = (struct list_head    *)__cil_tmp185;
61666#line 116
61667    __cil_tmp186 = (struct vmw_legacy_display_unit *)0;
61668#line 116
61669    __cil_tmp187 = (unsigned long )__cil_tmp186;
61670#line 116
61671    __cil_tmp188 = __cil_tmp187 + 2072;
61672#line 116
61673    __cil_tmp189 = (struct list_head *)__cil_tmp188;
61674#line 116
61675    __cil_tmp190 = (unsigned int )__cil_tmp189;
61676#line 116
61677    __cil_tmp191 = (char *)__mptr___3;
61678#line 116
61679    __cil_tmp192 = __cil_tmp191 - __cil_tmp190;
61680#line 116
61681    entry = (struct vmw_legacy_display_unit *)__cil_tmp192;
61682    }
61683  }
61684  while_break___0: /* CIL Label */ ;
61685  }
61686  {
61687#line 130
61688  while (1) {
61689    while_continue___1: /* CIL Label */ ;
61690    {
61691#line 130
61692    __cil_tmp193 = (unsigned long )lds;
61693#line 130
61694    __cil_tmp194 = __cil_tmp193 + 16;
61695#line 130
61696    __cil_tmp195 = *((unsigned int *)__cil_tmp194);
61697#line 130
61698    __cil_tmp196 = (unsigned int )i;
61699#line 130
61700    __cil_tmp197 = __cil_tmp196 != __cil_tmp195;
61701#line 130
61702    __cil_tmp198 = ! __cil_tmp197;
61703#line 130
61704    __cil_tmp199 = ! __cil_tmp198;
61705#line 130
61706    __cil_tmp200 = (long )__cil_tmp199;
61707#line 130
61708    tmp___12 = __builtin_expect(__cil_tmp200, 0L);
61709    }
61710#line 130
61711    if (tmp___12) {
61712      {
61713#line 130
61714      while (1) {
61715        while_continue___2: /* CIL Label */ ;
61716#line 130
61717        __asm__  volatile   ("1:\tud2\n"
61718                             ".pushsection __bug_table,\"a\"\n"
61719                             "2:\t.long 1b - 2b, %c0 - 2b\n"
61720                             "\t.word %c1, 0\n"
61721                             "\t.org 2b+%c2\n"
61722                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"),
61723                             "i" (130), "i" (12UL));
61724        {
61725#line 130
61726        while (1) {
61727          while_continue___3: /* CIL Label */ ;
61728        }
61729        while_break___3: /* CIL Label */ ;
61730        }
61731#line 130
61732        goto while_break___2;
61733      }
61734      while_break___2: /* CIL Label */ ;
61735      }
61736    } else {
61737
61738    }
61739#line 130
61740    goto while_break___1;
61741  }
61742  while_break___1: /* CIL Label */ ;
61743  }
61744#line 132
61745  __cil_tmp201 = (unsigned long )lds;
61746#line 132
61747  __cil_tmp202 = __cil_tmp201 + 20;
61748#line 132
61749  __cil_tmp203 = (unsigned long )lds;
61750#line 132
61751  __cil_tmp204 = __cil_tmp203 + 16;
61752#line 132
61753  *((unsigned int *)__cil_tmp202) = *((unsigned int *)__cil_tmp204);
61754#line 136
61755  __cil_tmp205 = *((struct list_head **)lds);
61756#line 136
61757  __mptr___4 = (struct list_head    *)__cil_tmp205;
61758#line 136
61759  __cil_tmp206 = (struct vmw_legacy_display_unit *)0;
61760#line 136
61761  __cil_tmp207 = (unsigned long )__cil_tmp206;
61762#line 136
61763  __cil_tmp208 = __cil_tmp207 + 2072;
61764#line 136
61765  __cil_tmp209 = (struct list_head *)__cil_tmp208;
61766#line 136
61767  __cil_tmp210 = (unsigned int )__cil_tmp209;
61768#line 136
61769  __cil_tmp211 = (char *)__mptr___4;
61770#line 136
61771  __cil_tmp212 = __cil_tmp211 - __cil_tmp210;
61772#line 136
61773  entry = (struct vmw_legacy_display_unit *)__cil_tmp212;
61774  {
61775#line 136
61776  while (1) {
61777    while_continue___4: /* CIL Label */ ;
61778    {
61779#line 136
61780    __cil_tmp213 = (struct list_head *)lds;
61781#line 136
61782    __cil_tmp214 = (unsigned long )__cil_tmp213;
61783#line 136
61784    __cil_tmp215 = (unsigned long )entry;
61785#line 136
61786    __cil_tmp216 = __cil_tmp215 + 2072;
61787#line 136
61788    __cil_tmp217 = (struct list_head *)__cil_tmp216;
61789#line 136
61790    __cil_tmp218 = (unsigned long )__cil_tmp217;
61791#line 136
61792    if (__cil_tmp218 != __cil_tmp214) {
61793
61794    } else {
61795#line 136
61796      goto while_break___4;
61797    }
61798    }
61799#line 137
61800    du = (struct vmw_display_unit *)entry;
61801    {
61802#line 139
61803    __cil_tmp219 = (unsigned long )du;
61804#line 139
61805    __cil_tmp220 = __cil_tmp219 + 2000;
61806#line 139
61807    __cil_tmp221 = *((struct vmw_dma_buffer **)__cil_tmp220);
61808#line 139
61809    if (! __cil_tmp221) {
61810#line 140
61811      goto __Cont;
61812    } else {
61813
61814    }
61815    }
61816    {
61817#line 142
61818    __cil_tmp222 = (unsigned long )du;
61819#line 142
61820    __cil_tmp223 = __cil_tmp222 + 2000;
61821#line 142
61822    __cil_tmp224 = *((struct vmw_dma_buffer **)__cil_tmp223);
61823#line 142
61824    __cil_tmp225 = (u32 )64;
61825#line 142
61826    __cil_tmp226 = (u32 )64;
61827#line 142
61828    __cil_tmp227 = (unsigned long )du;
61829#line 142
61830    __cil_tmp228 = __cil_tmp227 + 2024;
61831#line 142
61832    __cil_tmp229 = *((int *)__cil_tmp228);
61833#line 142
61834    __cil_tmp230 = (u32 )__cil_tmp229;
61835#line 142
61836    __cil_tmp231 = (unsigned long )du;
61837#line 142
61838    __cil_tmp232 = __cil_tmp231 + 2028;
61839#line 142
61840    __cil_tmp233 = *((int *)__cil_tmp232);
61841#line 142
61842    __cil_tmp234 = (u32 )__cil_tmp233;
61843#line 142
61844    ret = vmw_cursor_update_dmabuf(dev_priv, __cil_tmp224, __cil_tmp225, __cil_tmp226,
61845                                   __cil_tmp230, __cil_tmp234);
61846    }
61847#line 147
61848    if (ret == 0) {
61849#line 148
61850      goto while_break___4;
61851    } else {
61852
61853    }
61854    {
61855#line 150
61856    drm_err("vmw_ldu_commit_list", "Could not update cursor image\n");
61857    }
61858    __Cont: /* CIL Label */ 
61859#line 136
61860    __cil_tmp235 = (unsigned long )entry;
61861#line 136
61862    __cil_tmp236 = __cil_tmp235 + 2072;
61863#line 136
61864    __cil_tmp237 = *((struct list_head **)__cil_tmp236);
61865#line 136
61866    __mptr___5 = (struct list_head    *)__cil_tmp237;
61867#line 136
61868    __cil_tmp238 = (struct vmw_legacy_display_unit *)0;
61869#line 136
61870    __cil_tmp239 = (unsigned long )__cil_tmp238;
61871#line 136
61872    __cil_tmp240 = __cil_tmp239 + 2072;
61873#line 136
61874    __cil_tmp241 = (struct list_head *)__cil_tmp240;
61875#line 136
61876    __cil_tmp242 = (unsigned int )__cil_tmp241;
61877#line 136
61878    __cil_tmp243 = (char *)__mptr___5;
61879#line 136
61880    __cil_tmp244 = __cil_tmp243 - __cil_tmp242;
61881#line 136
61882    entry = (struct vmw_legacy_display_unit *)__cil_tmp244;
61883  }
61884  while_break___4: /* CIL Label */ ;
61885  }
61886#line 153
61887  return (0);
61888}
61889}
61890#line 156 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
61891static int vmw_ldu_del_active(struct vmw_private *vmw_priv___0 , struct vmw_legacy_display_unit *ldu ) 
61892{ struct vmw_legacy_display *ld ;
61893  int tmp___7 ;
61894  long tmp___8 ;
61895  unsigned long __cil_tmp6 ;
61896  unsigned long __cil_tmp7 ;
61897  unsigned long __cil_tmp8 ;
61898  unsigned long __cil_tmp9 ;
61899  struct list_head *__cil_tmp10 ;
61900  struct list_head    *__cil_tmp11 ;
61901  unsigned long __cil_tmp12 ;
61902  unsigned long __cil_tmp13 ;
61903  struct list_head *__cil_tmp14 ;
61904  unsigned long __cil_tmp15 ;
61905  unsigned long __cil_tmp16 ;
61906  unsigned long __cil_tmp17 ;
61907  unsigned long __cil_tmp18 ;
61908  unsigned int __cil_tmp19 ;
61909  unsigned long __cil_tmp20 ;
61910  unsigned long __cil_tmp21 ;
61911  unsigned int __cil_tmp22 ;
61912  unsigned long __cil_tmp23 ;
61913  unsigned long __cil_tmp24 ;
61914  struct vmw_framebuffer *__cil_tmp25 ;
61915  int __cil_tmp26 ;
61916  int __cil_tmp27 ;
61917  int __cil_tmp28 ;
61918  long __cil_tmp29 ;
61919  unsigned long __cil_tmp30 ;
61920  unsigned long __cil_tmp31 ;
61921  struct vmw_framebuffer *__cil_tmp32 ;
61922  unsigned long __cil_tmp33 ;
61923  unsigned long __cil_tmp34 ;
61924  unsigned long __cil_tmp35 ;
61925  unsigned long __cil_tmp36 ;
61926  struct vmw_framebuffer *__cil_tmp37 ;
61927  unsigned long __cil_tmp38 ;
61928  unsigned long __cil_tmp39 ;
61929  int (*__cil_tmp40)(struct vmw_framebuffer *fb ) ;
61930  unsigned long __cil_tmp41 ;
61931  unsigned long __cil_tmp42 ;
61932  struct vmw_framebuffer *__cil_tmp43 ;
61933  unsigned long __cil_tmp44 ;
61934  unsigned long __cil_tmp45 ;
61935  void *__cil_tmp46 ;
61936
61937  {
61938  {
61939#line 159
61940  __cil_tmp6 = (unsigned long )vmw_priv___0;
61941#line 159
61942  __cil_tmp7 = __cil_tmp6 + 2608;
61943#line 159
61944  ld = *((struct vmw_legacy_display **)__cil_tmp7);
61945#line 160
61946  __cil_tmp8 = (unsigned long )ldu;
61947#line 160
61948  __cil_tmp9 = __cil_tmp8 + 2072;
61949#line 160
61950  __cil_tmp10 = (struct list_head *)__cil_tmp9;
61951#line 160
61952  __cil_tmp11 = (struct list_head    *)__cil_tmp10;
61953#line 160
61954  tmp___7 = list_empty(__cil_tmp11);
61955  }
61956#line 160
61957  if (tmp___7) {
61958#line 161
61959    return (0);
61960  } else {
61961
61962  }
61963  {
61964#line 164
61965  __cil_tmp12 = (unsigned long )ldu;
61966#line 164
61967  __cil_tmp13 = __cil_tmp12 + 2072;
61968#line 164
61969  __cil_tmp14 = (struct list_head *)__cil_tmp13;
61970#line 164
61971  list_del_init(__cil_tmp14);
61972#line 165
61973  __cil_tmp15 = (unsigned long )ld;
61974#line 165
61975  __cil_tmp16 = __cil_tmp15 + 16;
61976#line 165
61977  __cil_tmp17 = (unsigned long )ld;
61978#line 165
61979  __cil_tmp18 = __cil_tmp17 + 16;
61980#line 165
61981  __cil_tmp19 = *((unsigned int *)__cil_tmp18);
61982#line 165
61983  *((unsigned int *)__cil_tmp16) = __cil_tmp19 - 1U;
61984  }
61985  {
61986#line 165
61987  __cil_tmp20 = (unsigned long )ld;
61988#line 165
61989  __cil_tmp21 = __cil_tmp20 + 16;
61990#line 165
61991  __cil_tmp22 = *((unsigned int *)__cil_tmp21);
61992#line 165
61993  if (__cil_tmp22 == 0U) {
61994    {
61995#line 166
61996    while (1) {
61997      while_continue: /* CIL Label */ ;
61998      {
61999#line 166
62000      __cil_tmp23 = (unsigned long )ld;
62001#line 166
62002      __cil_tmp24 = __cil_tmp23 + 24;
62003#line 166
62004      __cil_tmp25 = *((struct vmw_framebuffer **)__cil_tmp24);
62005#line 166
62006      __cil_tmp26 = ! __cil_tmp25;
62007#line 166
62008      __cil_tmp27 = ! __cil_tmp26;
62009#line 166
62010      __cil_tmp28 = ! __cil_tmp27;
62011#line 166
62012      __cil_tmp29 = (long )__cil_tmp28;
62013#line 166
62014      tmp___8 = __builtin_expect(__cil_tmp29, 0L);
62015      }
62016#line 166
62017      if (tmp___8) {
62018        {
62019#line 166
62020        while (1) {
62021          while_continue___0: /* CIL Label */ ;
62022#line 166
62023          __asm__  volatile   ("1:\tud2\n"
62024                               ".pushsection __bug_table,\"a\"\n"
62025                               "2:\t.long 1b - 2b, %c0 - 2b\n"
62026                               "\t.word %c1, 0\n"
62027                               "\t.org 2b+%c2\n"
62028                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"),
62029                               "i" (166), "i" (12UL));
62030          {
62031#line 166
62032          while (1) {
62033            while_continue___1: /* CIL Label */ ;
62034          }
62035          while_break___1: /* CIL Label */ ;
62036          }
62037#line 166
62038          goto while_break___0;
62039        }
62040        while_break___0: /* CIL Label */ ;
62041        }
62042      } else {
62043
62044      }
62045#line 166
62046      goto while_break;
62047    }
62048    while_break: /* CIL Label */ ;
62049    }
62050    {
62051#line 167
62052    __cil_tmp30 = (unsigned long )ld;
62053#line 167
62054    __cil_tmp31 = __cil_tmp30 + 24;
62055#line 167
62056    __cil_tmp32 = *((struct vmw_framebuffer **)__cil_tmp31);
62057#line 167
62058    __cil_tmp33 = (unsigned long )__cil_tmp32;
62059#line 167
62060    __cil_tmp34 = __cil_tmp33 + 128;
62061#line 167
62062    if (*((int (**)(struct vmw_framebuffer *fb ))__cil_tmp34)) {
62063      {
62064#line 168
62065      __cil_tmp35 = (unsigned long )ld;
62066#line 168
62067      __cil_tmp36 = __cil_tmp35 + 24;
62068#line 168
62069      __cil_tmp37 = *((struct vmw_framebuffer **)__cil_tmp36);
62070#line 168
62071      __cil_tmp38 = (unsigned long )__cil_tmp37;
62072#line 168
62073      __cil_tmp39 = __cil_tmp38 + 128;
62074#line 168
62075      __cil_tmp40 = *((int (**)(struct vmw_framebuffer *fb ))__cil_tmp39);
62076#line 168
62077      __cil_tmp41 = (unsigned long )ld;
62078#line 168
62079      __cil_tmp42 = __cil_tmp41 + 24;
62080#line 168
62081      __cil_tmp43 = *((struct vmw_framebuffer **)__cil_tmp42);
62082#line 168
62083      (*__cil_tmp40)(__cil_tmp43);
62084      }
62085    } else {
62086
62087    }
62088    }
62089#line 169
62090    __cil_tmp44 = (unsigned long )ld;
62091#line 169
62092    __cil_tmp45 = __cil_tmp44 + 24;
62093#line 169
62094    __cil_tmp46 = (void *)0;
62095#line 169
62096    *((struct vmw_framebuffer **)__cil_tmp45) = (struct vmw_framebuffer *)__cil_tmp46;
62097  } else {
62098
62099  }
62100  }
62101#line 172
62102  return (0);
62103}
62104}
62105#line 175 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
62106static int vmw_ldu_add_active(struct vmw_private *vmw_priv___0 , struct vmw_legacy_display_unit *ldu ,
62107                              struct vmw_framebuffer *vfb ) 
62108{ struct vmw_legacy_display *ld ;
62109  struct vmw_legacy_display_unit *entry ;
62110  struct list_head *at ;
62111  int tmp___7 ;
62112  long tmp___8 ;
62113  int tmp___9 ;
62114  struct list_head    *__mptr ;
62115  struct list_head    *__mptr___0 ;
62116  unsigned long __cil_tmp12 ;
62117  unsigned long __cil_tmp13 ;
62118  unsigned long __cil_tmp14 ;
62119  unsigned long __cil_tmp15 ;
62120  unsigned int __cil_tmp16 ;
62121  unsigned long __cil_tmp17 ;
62122  unsigned long __cil_tmp18 ;
62123  long __cil_tmp19 ;
62124  unsigned long __cil_tmp20 ;
62125  unsigned long __cil_tmp21 ;
62126  struct vmw_framebuffer *__cil_tmp22 ;
62127  unsigned long __cil_tmp23 ;
62128  unsigned long __cil_tmp24 ;
62129  unsigned long __cil_tmp25 ;
62130  unsigned long __cil_tmp26 ;
62131  unsigned long __cil_tmp27 ;
62132  unsigned long __cil_tmp28 ;
62133  struct vmw_framebuffer *__cil_tmp29 ;
62134  unsigned long __cil_tmp30 ;
62135  unsigned long __cil_tmp31 ;
62136  unsigned long __cil_tmp32 ;
62137  unsigned long __cil_tmp33 ;
62138  struct vmw_framebuffer *__cil_tmp34 ;
62139  unsigned long __cil_tmp35 ;
62140  unsigned long __cil_tmp36 ;
62141  int (*__cil_tmp37)(struct vmw_framebuffer *fb ) ;
62142  unsigned long __cil_tmp38 ;
62143  unsigned long __cil_tmp39 ;
62144  struct vmw_framebuffer *__cil_tmp40 ;
62145  unsigned long __cil_tmp41 ;
62146  unsigned long __cil_tmp42 ;
62147  unsigned long __cil_tmp43 ;
62148  unsigned long __cil_tmp44 ;
62149  int (*__cil_tmp45)(struct vmw_framebuffer *fb ) ;
62150  unsigned long __cil_tmp46 ;
62151  unsigned long __cil_tmp47 ;
62152  unsigned long __cil_tmp48 ;
62153  unsigned long __cil_tmp49 ;
62154  struct list_head *__cil_tmp50 ;
62155  struct list_head    *__cil_tmp51 ;
62156  struct list_head *__cil_tmp52 ;
62157  struct vmw_legacy_display_unit *__cil_tmp53 ;
62158  unsigned long __cil_tmp54 ;
62159  unsigned long __cil_tmp55 ;
62160  struct list_head *__cil_tmp56 ;
62161  unsigned int __cil_tmp57 ;
62162  char *__cil_tmp58 ;
62163  char *__cil_tmp59 ;
62164  struct list_head *__cil_tmp60 ;
62165  unsigned long __cil_tmp61 ;
62166  unsigned long __cil_tmp62 ;
62167  unsigned long __cil_tmp63 ;
62168  struct list_head *__cil_tmp64 ;
62169  unsigned long __cil_tmp65 ;
62170  unsigned long __cil_tmp66 ;
62171  unsigned long __cil_tmp67 ;
62172  unsigned long __cil_tmp68 ;
62173  unsigned int __cil_tmp69 ;
62174  unsigned long __cil_tmp70 ;
62175  unsigned long __cil_tmp71 ;
62176  unsigned long __cil_tmp72 ;
62177  unsigned int __cil_tmp73 ;
62178  unsigned long __cil_tmp74 ;
62179  unsigned long __cil_tmp75 ;
62180  unsigned long __cil_tmp76 ;
62181  unsigned long __cil_tmp77 ;
62182  struct list_head *__cil_tmp78 ;
62183  struct vmw_legacy_display_unit *__cil_tmp79 ;
62184  unsigned long __cil_tmp80 ;
62185  unsigned long __cil_tmp81 ;
62186  struct list_head *__cil_tmp82 ;
62187  unsigned int __cil_tmp83 ;
62188  char *__cil_tmp84 ;
62189  char *__cil_tmp85 ;
62190  unsigned long __cil_tmp86 ;
62191  unsigned long __cil_tmp87 ;
62192  struct list_head *__cil_tmp88 ;
62193  unsigned long __cil_tmp89 ;
62194  unsigned long __cil_tmp90 ;
62195  unsigned long __cil_tmp91 ;
62196  unsigned long __cil_tmp92 ;
62197  unsigned int __cil_tmp93 ;
62198
62199  {
62200#line 179
62201  __cil_tmp12 = (unsigned long )vmw_priv___0;
62202#line 179
62203  __cil_tmp13 = __cil_tmp12 + 2608;
62204#line 179
62205  ld = *((struct vmw_legacy_display **)__cil_tmp13);
62206  {
62207#line 183
62208  while (1) {
62209    while_continue: /* CIL Label */ ;
62210    {
62211#line 183
62212    __cil_tmp14 = (unsigned long )ld;
62213#line 183
62214    __cil_tmp15 = __cil_tmp14 + 16;
62215#line 183
62216    __cil_tmp16 = *((unsigned int *)__cil_tmp15);
62217#line 183
62218    if (! __cil_tmp16) {
62219      {
62220#line 183
62221      __cil_tmp17 = (unsigned long )ld;
62222#line 183
62223      __cil_tmp18 = __cil_tmp17 + 24;
62224#line 183
62225      if (*((struct vmw_framebuffer **)__cil_tmp18)) {
62226#line 183
62227        tmp___7 = 1;
62228      } else {
62229#line 183
62230        tmp___7 = 0;
62231      }
62232      }
62233    } else {
62234#line 183
62235      tmp___7 = 0;
62236    }
62237    }
62238    {
62239#line 183
62240    __cil_tmp19 = (long )tmp___7;
62241#line 183
62242    tmp___8 = __builtin_expect(__cil_tmp19, 0L);
62243    }
62244#line 183
62245    if (tmp___8) {
62246      {
62247#line 183
62248      while (1) {
62249        while_continue___0: /* CIL Label */ ;
62250#line 183
62251        __asm__  volatile   ("1:\tud2\n"
62252                             ".pushsection __bug_table,\"a\"\n"
62253                             "2:\t.long 1b - 2b, %c0 - 2b\n"
62254                             "\t.word %c1, 0\n"
62255                             "\t.org 2b+%c2\n"
62256                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"),
62257                             "i" (183), "i" (12UL));
62258        {
62259#line 183
62260        while (1) {
62261          while_continue___1: /* CIL Label */ ;
62262        }
62263        while_break___1: /* CIL Label */ ;
62264        }
62265#line 183
62266        goto while_break___0;
62267      }
62268      while_break___0: /* CIL Label */ ;
62269      }
62270    } else {
62271
62272    }
62273#line 183
62274    goto while_break;
62275  }
62276  while_break: /* CIL Label */ ;
62277  }
62278  {
62279#line 184
62280  __cil_tmp20 = (unsigned long )ld;
62281#line 184
62282  __cil_tmp21 = __cil_tmp20 + 24;
62283#line 184
62284  __cil_tmp22 = *((struct vmw_framebuffer **)__cil_tmp21);
62285#line 184
62286  __cil_tmp23 = (unsigned long )__cil_tmp22;
62287#line 184
62288  __cil_tmp24 = (unsigned long )vfb;
62289#line 184
62290  if (__cil_tmp24 != __cil_tmp23) {
62291    {
62292#line 185
62293    __cil_tmp25 = (unsigned long )ld;
62294#line 185
62295    __cil_tmp26 = __cil_tmp25 + 24;
62296#line 185
62297    if (*((struct vmw_framebuffer **)__cil_tmp26)) {
62298      {
62299#line 185
62300      __cil_tmp27 = (unsigned long )ld;
62301#line 185
62302      __cil_tmp28 = __cil_tmp27 + 24;
62303#line 185
62304      __cil_tmp29 = *((struct vmw_framebuffer **)__cil_tmp28);
62305#line 185
62306      __cil_tmp30 = (unsigned long )__cil_tmp29;
62307#line 185
62308      __cil_tmp31 = __cil_tmp30 + 128;
62309#line 185
62310      if (*((int (**)(struct vmw_framebuffer *fb ))__cil_tmp31)) {
62311        {
62312#line 186
62313        __cil_tmp32 = (unsigned long )ld;
62314#line 186
62315        __cil_tmp33 = __cil_tmp32 + 24;
62316#line 186
62317        __cil_tmp34 = *((struct vmw_framebuffer **)__cil_tmp33);
62318#line 186
62319        __cil_tmp35 = (unsigned long )__cil_tmp34;
62320#line 186
62321        __cil_tmp36 = __cil_tmp35 + 128;
62322#line 186
62323        __cil_tmp37 = *((int (**)(struct vmw_framebuffer *fb ))__cil_tmp36);
62324#line 186
62325        __cil_tmp38 = (unsigned long )ld;
62326#line 186
62327        __cil_tmp39 = __cil_tmp38 + 24;
62328#line 186
62329        __cil_tmp40 = *((struct vmw_framebuffer **)__cil_tmp39);
62330#line 186
62331        (*__cil_tmp37)(__cil_tmp40);
62332        }
62333      } else {
62334
62335      }
62336      }
62337    } else {
62338
62339    }
62340    }
62341    {
62342#line 187
62343    __cil_tmp41 = (unsigned long )vfb;
62344#line 187
62345    __cil_tmp42 = __cil_tmp41 + 120;
62346#line 187
62347    if (*((int (**)(struct vmw_framebuffer *fb ))__cil_tmp42)) {
62348      {
62349#line 188
62350      __cil_tmp43 = (unsigned long )vfb;
62351#line 188
62352      __cil_tmp44 = __cil_tmp43 + 120;
62353#line 188
62354      __cil_tmp45 = *((int (**)(struct vmw_framebuffer *fb ))__cil_tmp44);
62355#line 188
62356      (*__cil_tmp45)(vfb);
62357      }
62358    } else {
62359
62360    }
62361    }
62362#line 189
62363    __cil_tmp46 = (unsigned long )ld;
62364#line 189
62365    __cil_tmp47 = __cil_tmp46 + 24;
62366#line 189
62367    *((struct vmw_framebuffer **)__cil_tmp47) = vfb;
62368  } else {
62369
62370  }
62371  }
62372  {
62373#line 192
62374  __cil_tmp48 = (unsigned long )ldu;
62375#line 192
62376  __cil_tmp49 = __cil_tmp48 + 2072;
62377#line 192
62378  __cil_tmp50 = (struct list_head *)__cil_tmp49;
62379#line 192
62380  __cil_tmp51 = (struct list_head    *)__cil_tmp50;
62381#line 192
62382  tmp___9 = list_empty(__cil_tmp51);
62383  }
62384#line 192
62385  if (tmp___9) {
62386
62387  } else {
62388#line 193
62389    return (0);
62390  }
62391#line 195
62392  at = (struct list_head *)ld;
62393#line 196
62394  __cil_tmp52 = *((struct list_head **)ld);
62395#line 196
62396  __mptr = (struct list_head    *)__cil_tmp52;
62397#line 196
62398  __cil_tmp53 = (struct vmw_legacy_display_unit *)0;
62399#line 196
62400  __cil_tmp54 = (unsigned long )__cil_tmp53;
62401#line 196
62402  __cil_tmp55 = __cil_tmp54 + 2072;
62403#line 196
62404  __cil_tmp56 = (struct list_head *)__cil_tmp55;
62405#line 196
62406  __cil_tmp57 = (unsigned int )__cil_tmp56;
62407#line 196
62408  __cil_tmp58 = (char *)__mptr;
62409#line 196
62410  __cil_tmp59 = __cil_tmp58 - __cil_tmp57;
62411#line 196
62412  entry = (struct vmw_legacy_display_unit *)__cil_tmp59;
62413  {
62414#line 196
62415  while (1) {
62416    while_continue___2: /* CIL Label */ ;
62417    {
62418#line 196
62419    __cil_tmp60 = (struct list_head *)ld;
62420#line 196
62421    __cil_tmp61 = (unsigned long )__cil_tmp60;
62422#line 196
62423    __cil_tmp62 = (unsigned long )entry;
62424#line 196
62425    __cil_tmp63 = __cil_tmp62 + 2072;
62426#line 196
62427    __cil_tmp64 = (struct list_head *)__cil_tmp63;
62428#line 196
62429    __cil_tmp65 = (unsigned long )__cil_tmp64;
62430#line 196
62431    if (__cil_tmp65 != __cil_tmp61) {
62432
62433    } else {
62434#line 196
62435      goto while_break___2;
62436    }
62437    }
62438    {
62439#line 197
62440    __cil_tmp66 = 0 + 2032;
62441#line 197
62442    __cil_tmp67 = (unsigned long )ldu;
62443#line 197
62444    __cil_tmp68 = __cil_tmp67 + __cil_tmp66;
62445#line 197
62446    __cil_tmp69 = *((unsigned int *)__cil_tmp68);
62447#line 197
62448    __cil_tmp70 = 0 + 2032;
62449#line 197
62450    __cil_tmp71 = (unsigned long )entry;
62451#line 197
62452    __cil_tmp72 = __cil_tmp71 + __cil_tmp70;
62453#line 197
62454    __cil_tmp73 = *((unsigned int *)__cil_tmp72);
62455#line 197
62456    if (__cil_tmp73 > __cil_tmp69) {
62457#line 198
62458      goto while_break___2;
62459    } else {
62460
62461    }
62462    }
62463#line 200
62464    __cil_tmp74 = (unsigned long )entry;
62465#line 200
62466    __cil_tmp75 = __cil_tmp74 + 2072;
62467#line 200
62468    at = (struct list_head *)__cil_tmp75;
62469#line 196
62470    __cil_tmp76 = (unsigned long )entry;
62471#line 196
62472    __cil_tmp77 = __cil_tmp76 + 2072;
62473#line 196
62474    __cil_tmp78 = *((struct list_head **)__cil_tmp77);
62475#line 196
62476    __mptr___0 = (struct list_head    *)__cil_tmp78;
62477#line 196
62478    __cil_tmp79 = (struct vmw_legacy_display_unit *)0;
62479#line 196
62480    __cil_tmp80 = (unsigned long )__cil_tmp79;
62481#line 196
62482    __cil_tmp81 = __cil_tmp80 + 2072;
62483#line 196
62484    __cil_tmp82 = (struct list_head *)__cil_tmp81;
62485#line 196
62486    __cil_tmp83 = (unsigned int )__cil_tmp82;
62487#line 196
62488    __cil_tmp84 = (char *)__mptr___0;
62489#line 196
62490    __cil_tmp85 = __cil_tmp84 - __cil_tmp83;
62491#line 196
62492    entry = (struct vmw_legacy_display_unit *)__cil_tmp85;
62493  }
62494  while_break___2: /* CIL Label */ ;
62495  }
62496  {
62497#line 203
62498  __cil_tmp86 = (unsigned long )ldu;
62499#line 203
62500  __cil_tmp87 = __cil_tmp86 + 2072;
62501#line 203
62502  __cil_tmp88 = (struct list_head *)__cil_tmp87;
62503#line 203
62504  list_add(__cil_tmp88, at);
62505#line 205
62506  __cil_tmp89 = (unsigned long )ld;
62507#line 205
62508  __cil_tmp90 = __cil_tmp89 + 16;
62509#line 205
62510  __cil_tmp91 = (unsigned long )ld;
62511#line 205
62512  __cil_tmp92 = __cil_tmp91 + 16;
62513#line 205
62514  __cil_tmp93 = *((unsigned int *)__cil_tmp92);
62515#line 205
62516  *((unsigned int *)__cil_tmp90) = __cil_tmp93 + 1U;
62517  }
62518#line 207
62519  return (0);
62520}
62521}
62522#line 210 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
62523static int vmw_ldu_crtc_set_config(struct drm_mode_set *set ) 
62524{ struct vmw_private *dev_priv ;
62525  struct vmw_legacy_display_unit *ldu ;
62526  struct drm_connector *connector ;
62527  struct drm_display_mode *mode ;
62528  struct drm_encoder *encoder ;
62529  struct vmw_framebuffer *vfb ;
62530  struct drm_framebuffer *fb ;
62531  struct drm_crtc *crtc ;
62532  struct drm_crtc    *__mptr ;
62533  struct drm_framebuffer    *__mptr___0 ;
62534  int tmp___7 ;
62535  int tmp___8 ;
62536  int tmp___9 ;
62537  unsigned long __cil_tmp15 ;
62538  unsigned long __cil_tmp16 ;
62539  struct drm_crtc *__cil_tmp17 ;
62540  unsigned long __cil_tmp18 ;
62541  unsigned long __cil_tmp19 ;
62542  struct vmw_legacy_display_unit *__cil_tmp20 ;
62543  struct drm_crtc *__cil_tmp21 ;
62544  unsigned int __cil_tmp22 ;
62545  char *__cil_tmp23 ;
62546  char *__cil_tmp24 ;
62547  unsigned long __cil_tmp25 ;
62548  unsigned long __cil_tmp26 ;
62549  unsigned long __cil_tmp27 ;
62550  unsigned long __cil_tmp28 ;
62551  struct drm_framebuffer *__cil_tmp29 ;
62552  struct vmw_framebuffer *__cil_tmp30 ;
62553  struct drm_framebuffer *__cil_tmp31 ;
62554  unsigned int __cil_tmp32 ;
62555  char *__cil_tmp33 ;
62556  char *__cil_tmp34 ;
62557  void *__cil_tmp35 ;
62558  struct drm_device *__cil_tmp36 ;
62559  unsigned long __cil_tmp37 ;
62560  unsigned long __cil_tmp38 ;
62561  size_t __cil_tmp39 ;
62562  unsigned long __cil_tmp40 ;
62563  unsigned long __cil_tmp41 ;
62564  size_t __cil_tmp42 ;
62565  unsigned long __cil_tmp43 ;
62566  unsigned long __cil_tmp44 ;
62567  unsigned long __cil_tmp45 ;
62568  struct drm_connector *__cil_tmp46 ;
62569  unsigned long __cil_tmp47 ;
62570  unsigned long __cil_tmp48 ;
62571  unsigned long __cil_tmp49 ;
62572  struct drm_connector **__cil_tmp50 ;
62573  struct drm_connector **__cil_tmp51 ;
62574  struct drm_connector *__cil_tmp52 ;
62575  unsigned long __cil_tmp53 ;
62576  unsigned long __cil_tmp54 ;
62577  unsigned long __cil_tmp55 ;
62578  struct drm_connector **__cil_tmp56 ;
62579  struct drm_connector **__cil_tmp57 ;
62580  struct drm_connector *__cil_tmp58 ;
62581  unsigned long __cil_tmp59 ;
62582  unsigned long __cil_tmp60 ;
62583  unsigned long __cil_tmp61 ;
62584  struct drm_connector *__cil_tmp62 ;
62585  unsigned long __cil_tmp63 ;
62586  unsigned long __cil_tmp64 ;
62587  struct vmw_legacy_display *__cil_tmp65 ;
62588  unsigned long __cil_tmp66 ;
62589  unsigned long __cil_tmp67 ;
62590  unsigned long __cil_tmp68 ;
62591  unsigned long __cil_tmp69 ;
62592  struct vmw_legacy_display *__cil_tmp70 ;
62593  unsigned long __cil_tmp71 ;
62594  unsigned long __cil_tmp72 ;
62595  unsigned int __cil_tmp73 ;
62596  unsigned long __cil_tmp74 ;
62597  unsigned long __cil_tmp75 ;
62598  struct list_head *__cil_tmp76 ;
62599  struct list_head    *__cil_tmp77 ;
62600  unsigned long __cil_tmp78 ;
62601  unsigned long __cil_tmp79 ;
62602  unsigned long __cil_tmp80 ;
62603  struct vmw_legacy_display *__cil_tmp81 ;
62604  unsigned long __cil_tmp82 ;
62605  unsigned long __cil_tmp83 ;
62606  struct vmw_framebuffer *__cil_tmp84 ;
62607  unsigned long __cil_tmp85 ;
62608  unsigned long __cil_tmp86 ;
62609  unsigned long __cil_tmp87 ;
62610  unsigned long __cil_tmp88 ;
62611  unsigned long __cil_tmp89 ;
62612  unsigned long __cil_tmp90 ;
62613  unsigned long __cil_tmp91 ;
62614  unsigned long __cil_tmp92 ;
62615  unsigned long __cil_tmp93 ;
62616  size_t __cil_tmp94 ;
62617  unsigned long __cil_tmp95 ;
62618  unsigned long __cil_tmp96 ;
62619  struct drm_display_mode *__cil_tmp97 ;
62620  unsigned long __cil_tmp98 ;
62621  unsigned long __cil_tmp99 ;
62622  struct drm_framebuffer *__cil_tmp100 ;
62623  unsigned long __cil_tmp101 ;
62624  unsigned long __cil_tmp102 ;
62625  void *__cil_tmp103 ;
62626  unsigned long __cil_tmp104 ;
62627  unsigned long __cil_tmp105 ;
62628  void *__cil_tmp106 ;
62629  unsigned long __cil_tmp107 ;
62630  unsigned long __cil_tmp108 ;
62631  void *__cil_tmp109 ;
62632  unsigned long __cil_tmp110 ;
62633  unsigned long __cil_tmp111 ;
62634  unsigned long __cil_tmp112 ;
62635  unsigned long __cil_tmp113 ;
62636  unsigned long __cil_tmp114 ;
62637  unsigned long __cil_tmp115 ;
62638  unsigned int __cil_tmp116 ;
62639  unsigned long __cil_tmp117 ;
62640  unsigned long __cil_tmp118 ;
62641  int __cil_tmp119 ;
62642  uint32_t __cil_tmp120 ;
62643  unsigned long __cil_tmp121 ;
62644  unsigned long __cil_tmp122 ;
62645  uint32_t __cil_tmp123 ;
62646  uint32_t __cil_tmp124 ;
62647  unsigned long __cil_tmp125 ;
62648  unsigned long __cil_tmp126 ;
62649  unsigned int __cil_tmp127 ;
62650  unsigned long __cil_tmp128 ;
62651  unsigned long __cil_tmp129 ;
62652  int __cil_tmp130 ;
62653  uint32_t __cil_tmp131 ;
62654  unsigned long __cil_tmp132 ;
62655  unsigned long __cil_tmp133 ;
62656  uint32_t __cil_tmp134 ;
62657  uint32_t __cil_tmp135 ;
62658  unsigned long __cil_tmp136 ;
62659  unsigned long __cil_tmp137 ;
62660  unsigned long __cil_tmp138 ;
62661  unsigned long __cil_tmp139 ;
62662  unsigned long __cil_tmp140 ;
62663  unsigned long __cil_tmp141 ;
62664  unsigned long __cil_tmp142 ;
62665  unsigned long __cil_tmp143 ;
62666  unsigned long __cil_tmp144 ;
62667  unsigned long __cil_tmp145 ;
62668  uint32_t __cil_tmp146 ;
62669  unsigned long __cil_tmp147 ;
62670  unsigned long __cil_tmp148 ;
62671  unsigned long __cil_tmp149 ;
62672  unsigned long __cil_tmp150 ;
62673  uint32_t __cil_tmp151 ;
62674  unsigned long __cil_tmp152 ;
62675  unsigned long __cil_tmp153 ;
62676
62677  {
62678#line 221
62679  if (! set) {
62680#line 222
62681    return (-22);
62682  } else {
62683
62684  }
62685  {
62686#line 224
62687  __cil_tmp15 = (unsigned long )set;
62688#line 224
62689  __cil_tmp16 = __cil_tmp15 + 24;
62690#line 224
62691  __cil_tmp17 = *((struct drm_crtc **)__cil_tmp16);
62692#line 224
62693  if (! __cil_tmp17) {
62694#line 225
62695    return (-22);
62696  } else {
62697
62698  }
62699  }
62700#line 228
62701  __cil_tmp18 = (unsigned long )set;
62702#line 228
62703  __cil_tmp19 = __cil_tmp18 + 24;
62704#line 228
62705  crtc = *((struct drm_crtc **)__cil_tmp19);
62706#line 229
62707  __mptr = (struct drm_crtc    *)crtc;
62708#line 229
62709  __cil_tmp20 = (struct vmw_legacy_display_unit *)0;
62710#line 229
62711  __cil_tmp21 = (struct drm_crtc *)__cil_tmp20;
62712#line 229
62713  __cil_tmp22 = (unsigned int )__cil_tmp21;
62714#line 229
62715  __cil_tmp23 = (char *)__mptr;
62716#line 229
62717  __cil_tmp24 = __cil_tmp23 - __cil_tmp22;
62718#line 229
62719  ldu = (struct vmw_legacy_display_unit *)__cil_tmp24;
62720  {
62721#line 230
62722  __cil_tmp25 = (unsigned long )set;
62723#line 230
62724  __cil_tmp26 = __cil_tmp25 + 16;
62725#line 230
62726  if (*((struct drm_framebuffer **)__cil_tmp26)) {
62727#line 230
62728    __cil_tmp27 = (unsigned long )set;
62729#line 230
62730    __cil_tmp28 = __cil_tmp27 + 16;
62731#line 230
62732    __cil_tmp29 = *((struct drm_framebuffer **)__cil_tmp28);
62733#line 230
62734    __mptr___0 = (struct drm_framebuffer    *)__cil_tmp29;
62735#line 230
62736    __cil_tmp30 = (struct vmw_framebuffer *)0;
62737#line 230
62738    __cil_tmp31 = (struct drm_framebuffer *)__cil_tmp30;
62739#line 230
62740    __cil_tmp32 = (unsigned int )__cil_tmp31;
62741#line 230
62742    __cil_tmp33 = (char *)__mptr___0;
62743#line 230
62744    __cil_tmp34 = __cil_tmp33 - __cil_tmp32;
62745#line 230
62746    vfb = (struct vmw_framebuffer *)__cil_tmp34;
62747  } else {
62748#line 230
62749    __cil_tmp35 = (void *)0;
62750#line 230
62751    vfb = (struct vmw_framebuffer *)__cil_tmp35;
62752  }
62753  }
62754  {
62755#line 231
62756  __cil_tmp36 = *((struct drm_device **)crtc);
62757#line 231
62758  dev_priv = vmw_priv(__cil_tmp36);
62759  }
62760  {
62761#line 233
62762  __cil_tmp37 = (unsigned long )set;
62763#line 233
62764  __cil_tmp38 = __cil_tmp37 + 56;
62765#line 233
62766  __cil_tmp39 = *((size_t *)__cil_tmp38);
62767#line 233
62768  if (__cil_tmp39 > 1UL) {
62769    {
62770#line 234
62771    drm_err("vmw_ldu_crtc_set_config", "to many connectors\n");
62772    }
62773#line 235
62774    return (-22);
62775  } else {
62776
62777  }
62778  }
62779  {
62780#line 238
62781  __cil_tmp40 = (unsigned long )set;
62782#line 238
62783  __cil_tmp41 = __cil_tmp40 + 56;
62784#line 238
62785  __cil_tmp42 = *((size_t *)__cil_tmp41);
62786#line 238
62787  if (__cil_tmp42 == 1UL) {
62788    {
62789#line 238
62790    __cil_tmp43 = 0 + 616;
62791#line 238
62792    __cil_tmp44 = (unsigned long )ldu;
62793#line 238
62794    __cil_tmp45 = __cil_tmp44 + __cil_tmp43;
62795#line 238
62796    __cil_tmp46 = (struct drm_connector *)__cil_tmp45;
62797#line 238
62798    __cil_tmp47 = (unsigned long )__cil_tmp46;
62799#line 238
62800    __cil_tmp48 = (unsigned long )set;
62801#line 238
62802    __cil_tmp49 = __cil_tmp48 + 48;
62803#line 238
62804    __cil_tmp50 = *((struct drm_connector ***)__cil_tmp49);
62805#line 238
62806    __cil_tmp51 = __cil_tmp50 + 0;
62807#line 238
62808    __cil_tmp52 = *__cil_tmp51;
62809#line 238
62810    __cil_tmp53 = (unsigned long )__cil_tmp52;
62811#line 238
62812    if (__cil_tmp53 != __cil_tmp47) {
62813      {
62814#line 240
62815      __cil_tmp54 = (unsigned long )set;
62816#line 240
62817      __cil_tmp55 = __cil_tmp54 + 48;
62818#line 240
62819      __cil_tmp56 = *((struct drm_connector ***)__cil_tmp55);
62820#line 240
62821      __cil_tmp57 = __cil_tmp56 + 0;
62822#line 240
62823      __cil_tmp58 = *__cil_tmp57;
62824#line 240
62825      __cil_tmp59 = 0 + 616;
62826#line 240
62827      __cil_tmp60 = (unsigned long )ldu;
62828#line 240
62829      __cil_tmp61 = __cil_tmp60 + __cil_tmp59;
62830#line 240
62831      __cil_tmp62 = (struct drm_connector *)__cil_tmp61;
62832#line 240
62833      drm_err("vmw_ldu_crtc_set_config", "connector doesn\'t match %p %p\n", __cil_tmp58,
62834              __cil_tmp62);
62835      }
62836#line 242
62837      return (-22);
62838    } else {
62839
62840    }
62841    }
62842  } else {
62843
62844  }
62845  }
62846  {
62847#line 246
62848  __cil_tmp63 = (unsigned long )dev_priv;
62849#line 246
62850  __cil_tmp64 = __cil_tmp63 + 2608;
62851#line 246
62852  __cil_tmp65 = *((struct vmw_legacy_display **)__cil_tmp64);
62853#line 246
62854  __cil_tmp66 = (unsigned long )__cil_tmp65;
62855#line 246
62856  __cil_tmp67 = __cil_tmp66 + 24;
62857#line 246
62858  if (*((struct vmw_framebuffer **)__cil_tmp67)) {
62859#line 246
62860    if (vfb) {
62861      {
62862#line 246
62863      __cil_tmp68 = (unsigned long )dev_priv;
62864#line 246
62865      __cil_tmp69 = __cil_tmp68 + 2608;
62866#line 246
62867      __cil_tmp70 = *((struct vmw_legacy_display **)__cil_tmp69);
62868#line 246
62869      __cil_tmp71 = (unsigned long )__cil_tmp70;
62870#line 246
62871      __cil_tmp72 = __cil_tmp71 + 16;
62872#line 246
62873      __cil_tmp73 = *((unsigned int *)__cil_tmp72);
62874#line 246
62875      if (__cil_tmp73 == 1U) {
62876        {
62877#line 246
62878        __cil_tmp74 = (unsigned long )ldu;
62879#line 246
62880        __cil_tmp75 = __cil_tmp74 + 2072;
62881#line 246
62882        __cil_tmp76 = (struct list_head *)__cil_tmp75;
62883#line 246
62884        __cil_tmp77 = (struct list_head    *)__cil_tmp76;
62885#line 246
62886        tmp___7 = list_empty(__cil_tmp77);
62887        }
62888#line 246
62889        if (tmp___7) {
62890#line 246
62891          goto _L;
62892        } else {
62893
62894        }
62895      } else {
62896        _L: /* CIL Label */ 
62897        {
62898#line 246
62899        __cil_tmp78 = (unsigned long )vfb;
62900#line 246
62901        __cil_tmp79 = (unsigned long )dev_priv;
62902#line 246
62903        __cil_tmp80 = __cil_tmp79 + 2608;
62904#line 246
62905        __cil_tmp81 = *((struct vmw_legacy_display **)__cil_tmp80);
62906#line 246
62907        __cil_tmp82 = (unsigned long )__cil_tmp81;
62908#line 246
62909        __cil_tmp83 = __cil_tmp82 + 24;
62910#line 246
62911        __cil_tmp84 = *((struct vmw_framebuffer **)__cil_tmp83);
62912#line 246
62913        __cil_tmp85 = (unsigned long )__cil_tmp84;
62914#line 246
62915        if (__cil_tmp85 != __cil_tmp78) {
62916          {
62917#line 250
62918          drm_err("vmw_ldu_crtc_set_config", "Multiple framebuffers not supported\n");
62919          }
62920#line 251
62921          return (-22);
62922        } else {
62923
62924        }
62925        }
62926      }
62927      }
62928    } else {
62929
62930    }
62931  } else {
62932
62933  }
62934  }
62935#line 255
62936  __cil_tmp86 = 0 + 616;
62937#line 255
62938  __cil_tmp87 = (unsigned long )ldu;
62939#line 255
62940  __cil_tmp88 = __cil_tmp87 + __cil_tmp86;
62941#line 255
62942  connector = (struct drm_connector *)__cil_tmp88;
62943#line 256
62944  __cil_tmp89 = 0 + 544;
62945#line 256
62946  __cil_tmp90 = (unsigned long )ldu;
62947#line 256
62948  __cil_tmp91 = __cil_tmp90 + __cil_tmp89;
62949#line 256
62950  encoder = (struct drm_encoder *)__cil_tmp91;
62951  {
62952#line 259
62953  __cil_tmp92 = (unsigned long )set;
62954#line 259
62955  __cil_tmp93 = __cil_tmp92 + 56;
62956#line 259
62957  __cil_tmp94 = *((size_t *)__cil_tmp93);
62958#line 259
62959  if (__cil_tmp94 == 0UL) {
62960#line 259
62961    goto _L___0;
62962  } else {
62963    {
62964#line 259
62965    __cil_tmp95 = (unsigned long )set;
62966#line 259
62967    __cil_tmp96 = __cil_tmp95 + 32;
62968#line 259
62969    __cil_tmp97 = *((struct drm_display_mode **)__cil_tmp96);
62970#line 259
62971    if (! __cil_tmp97) {
62972#line 259
62973      goto _L___0;
62974    } else {
62975      {
62976#line 259
62977      __cil_tmp98 = (unsigned long )set;
62978#line 259
62979      __cil_tmp99 = __cil_tmp98 + 16;
62980#line 259
62981      __cil_tmp100 = *((struct drm_framebuffer **)__cil_tmp99);
62982#line 259
62983      if (! __cil_tmp100) {
62984        _L___0: /* CIL Label */ 
62985        {
62986#line 261
62987        __cil_tmp101 = (unsigned long )connector;
62988#line 261
62989        __cil_tmp102 = __cil_tmp101 + 1208;
62990#line 261
62991        __cil_tmp103 = (void *)0;
62992#line 261
62993        *((struct drm_encoder **)__cil_tmp102) = (struct drm_encoder *)__cil_tmp103;
62994#line 262
62995        __cil_tmp104 = (unsigned long )encoder;
62996#line 262
62997        __cil_tmp105 = __cil_tmp104 + 48;
62998#line 262
62999        __cil_tmp106 = (void *)0;
63000#line 262
63001        *((struct drm_crtc **)__cil_tmp105) = (struct drm_crtc *)__cil_tmp106;
63002#line 263
63003        __cil_tmp107 = (unsigned long )crtc;
63004#line 263
63005        __cil_tmp108 = __cil_tmp107 + 32;
63006#line 263
63007        __cil_tmp109 = (void *)0;
63008#line 263
63009        *((struct drm_framebuffer **)__cil_tmp108) = (struct drm_framebuffer *)__cil_tmp109;
63010#line 265
63011        vmw_ldu_del_active(dev_priv, ldu);
63012#line 267
63013        tmp___8 = vmw_ldu_commit_list(dev_priv);
63014        }
63015#line 267
63016        return (tmp___8);
63017      } else {
63018
63019      }
63020      }
63021    }
63022    }
63023  }
63024  }
63025#line 272
63026  __cil_tmp110 = (unsigned long )set;
63027#line 272
63028  __cil_tmp111 = __cil_tmp110 + 32;
63029#line 272
63030  mode = *((struct drm_display_mode **)__cil_tmp111);
63031#line 273
63032  __cil_tmp112 = (unsigned long )set;
63033#line 273
63034  __cil_tmp113 = __cil_tmp112 + 16;
63035#line 273
63036  fb = *((struct drm_framebuffer **)__cil_tmp113);
63037  {
63038#line 275
63039  __cil_tmp114 = (unsigned long )fb;
63040#line 275
63041  __cil_tmp115 = __cil_tmp114 + 72;
63042#line 275
63043  __cil_tmp116 = *((unsigned int *)__cil_tmp115);
63044#line 275
63045  __cil_tmp117 = (unsigned long )mode;
63046#line 275
63047  __cil_tmp118 = __cil_tmp117 + 68;
63048#line 275
63049  __cil_tmp119 = *((int *)__cil_tmp118);
63050#line 275
63051  __cil_tmp120 = (uint32_t )__cil_tmp119;
63052#line 275
63053  __cil_tmp121 = (unsigned long )set;
63054#line 275
63055  __cil_tmp122 = __cil_tmp121 + 40;
63056#line 275
63057  __cil_tmp123 = *((uint32_t *)__cil_tmp122);
63058#line 275
63059  __cil_tmp124 = __cil_tmp123 + __cil_tmp120;
63060#line 275
63061  if (__cil_tmp124 > __cil_tmp116) {
63062    {
63063#line 277
63064    drm_err("vmw_ldu_crtc_set_config", "set outside of framebuffer\n");
63065    }
63066#line 278
63067    return (-22);
63068  } else {
63069    {
63070#line 275
63071    __cil_tmp125 = (unsigned long )fb;
63072#line 275
63073    __cil_tmp126 = __cil_tmp125 + 76;
63074#line 275
63075    __cil_tmp127 = *((unsigned int *)__cil_tmp126);
63076#line 275
63077    __cil_tmp128 = (unsigned long )mode;
63078#line 275
63079    __cil_tmp129 = __cil_tmp128 + 88;
63080#line 275
63081    __cil_tmp130 = *((int *)__cil_tmp129);
63082#line 275
63083    __cil_tmp131 = (uint32_t )__cil_tmp130;
63084#line 275
63085    __cil_tmp132 = (unsigned long )set;
63086#line 275
63087    __cil_tmp133 = __cil_tmp132 + 44;
63088#line 275
63089    __cil_tmp134 = *((uint32_t *)__cil_tmp133);
63090#line 275
63091    __cil_tmp135 = __cil_tmp134 + __cil_tmp131;
63092#line 275
63093    if (__cil_tmp135 > __cil_tmp127) {
63094      {
63095#line 277
63096      drm_err("vmw_ldu_crtc_set_config", "set outside of framebuffer\n");
63097      }
63098#line 278
63099      return (-22);
63100    } else {
63101
63102    }
63103    }
63104  }
63105  }
63106  {
63107#line 281
63108  vmw_fb_off(dev_priv);
63109#line 283
63110  __cil_tmp136 = (unsigned long )crtc;
63111#line 283
63112  __cil_tmp137 = __cil_tmp136 + 32;
63113#line 283
63114  *((struct drm_framebuffer **)__cil_tmp137) = fb;
63115#line 284
63116  __cil_tmp138 = (unsigned long )encoder;
63117#line 284
63118  __cil_tmp139 = __cil_tmp138 + 48;
63119#line 284
63120  *((struct drm_crtc **)__cil_tmp139) = crtc;
63121#line 285
63122  __cil_tmp140 = (unsigned long )connector;
63123#line 285
63124  __cil_tmp141 = __cil_tmp140 + 1208;
63125#line 285
63126  *((struct drm_encoder **)__cil_tmp141) = encoder;
63127#line 286
63128  __cil_tmp142 = (unsigned long )crtc;
63129#line 286
63130  __cil_tmp143 = __cil_tmp142 + 480;
63131#line 286
63132  __cil_tmp144 = (unsigned long )set;
63133#line 286
63134  __cil_tmp145 = __cil_tmp144 + 40;
63135#line 286
63136  __cil_tmp146 = *((uint32_t *)__cil_tmp145);
63137#line 286
63138  *((int *)__cil_tmp143) = (int )__cil_tmp146;
63139#line 287
63140  __cil_tmp147 = (unsigned long )crtc;
63141#line 287
63142  __cil_tmp148 = __cil_tmp147 + 484;
63143#line 287
63144  __cil_tmp149 = (unsigned long )set;
63145#line 287
63146  __cil_tmp150 = __cil_tmp149 + 44;
63147#line 287
63148  __cil_tmp151 = *((uint32_t *)__cil_tmp150);
63149#line 287
63150  *((int *)__cil_tmp148) = (int )__cil_tmp151;
63151#line 288
63152  __cil_tmp152 = (unsigned long )crtc;
63153#line 288
63154  __cil_tmp153 = __cil_tmp152 + 48;
63155#line 288
63156  *((struct drm_display_mode *)__cil_tmp153) = *mode;
63157#line 290
63158  vmw_ldu_add_active(dev_priv, ldu, vfb);
63159#line 292
63160  tmp___9 = vmw_ldu_commit_list(dev_priv);
63161  }
63162#line 292
63163  return (tmp___9);
63164}
63165}
63166#line 295 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63167static struct drm_crtc_funcs vmw_legacy_crtc_funcs  = 
63168#line 295
63169     {& vmw_du_crtc_save, & vmw_du_crtc_restore, (void (*)(struct drm_crtc *crtc ))0,
63170    & vmw_du_crtc_cursor_set, & vmw_du_crtc_cursor_move, & vmw_du_crtc_gamma_set,
63171    & vmw_ldu_crtc_destroy, & vmw_ldu_crtc_set_config, (int (*)(struct drm_crtc *crtc ,
63172                                                                struct drm_framebuffer *fb ,
63173                                                                struct drm_pending_vblank_event *event ))0};
63174#line 310 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63175static void vmw_ldu_encoder_destroy(struct drm_encoder *encoder ) 
63176{ struct drm_encoder    *__mptr ;
63177  unsigned long __cil_tmp3 ;
63178  struct vmw_legacy_display_unit *__cil_tmp4 ;
63179  unsigned long __cil_tmp5 ;
63180  unsigned long __cil_tmp6 ;
63181  struct drm_encoder *__cil_tmp7 ;
63182  unsigned int __cil_tmp8 ;
63183  char *__cil_tmp9 ;
63184  char *__cil_tmp10 ;
63185  struct vmw_legacy_display_unit *__cil_tmp11 ;
63186
63187  {
63188  {
63189#line 312
63190  __mptr = (struct drm_encoder    *)encoder;
63191#line 312
63192  __cil_tmp3 = 0 + 544;
63193#line 312
63194  __cil_tmp4 = (struct vmw_legacy_display_unit *)0;
63195#line 312
63196  __cil_tmp5 = (unsigned long )__cil_tmp4;
63197#line 312
63198  __cil_tmp6 = __cil_tmp5 + __cil_tmp3;
63199#line 312
63200  __cil_tmp7 = (struct drm_encoder *)__cil_tmp6;
63201#line 312
63202  __cil_tmp8 = (unsigned int )__cil_tmp7;
63203#line 312
63204  __cil_tmp9 = (char *)__mptr;
63205#line 312
63206  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
63207#line 312
63208  __cil_tmp11 = (struct vmw_legacy_display_unit *)__cil_tmp10;
63209#line 312
63210  vmw_ldu_destroy(__cil_tmp11);
63211  }
63212#line 313
63213  return;
63214}
63215}
63216#line 315 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63217static struct drm_encoder_funcs vmw_legacy_encoder_funcs  =    {(void (*)(struct drm_encoder *encoder ))0, & vmw_ldu_encoder_destroy};
63218#line 323 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63219static void vmw_ldu_connector_destroy(struct drm_connector *connector ) 
63220{ struct drm_connector    *__mptr ;
63221  unsigned long __cil_tmp3 ;
63222  struct vmw_legacy_display_unit *__cil_tmp4 ;
63223  unsigned long __cil_tmp5 ;
63224  unsigned long __cil_tmp6 ;
63225  struct drm_connector *__cil_tmp7 ;
63226  unsigned int __cil_tmp8 ;
63227  char *__cil_tmp9 ;
63228  char *__cil_tmp10 ;
63229  struct vmw_legacy_display_unit *__cil_tmp11 ;
63230
63231  {
63232  {
63233#line 325
63234  __mptr = (struct drm_connector    *)connector;
63235#line 325
63236  __cil_tmp3 = 0 + 616;
63237#line 325
63238  __cil_tmp4 = (struct vmw_legacy_display_unit *)0;
63239#line 325
63240  __cil_tmp5 = (unsigned long )__cil_tmp4;
63241#line 325
63242  __cil_tmp6 = __cil_tmp5 + __cil_tmp3;
63243#line 325
63244  __cil_tmp7 = (struct drm_connector *)__cil_tmp6;
63245#line 325
63246  __cil_tmp8 = (unsigned int )__cil_tmp7;
63247#line 325
63248  __cil_tmp9 = (char *)__mptr;
63249#line 325
63250  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
63251#line 325
63252  __cil_tmp11 = (struct vmw_legacy_display_unit *)__cil_tmp10;
63253#line 325
63254  vmw_ldu_destroy(__cil_tmp11);
63255  }
63256#line 326
63257  return;
63258}
63259}
63260#line 328 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63261static struct drm_connector_funcs vmw_legacy_connector_funcs  = 
63262#line 328
63263     {& vmw_du_connector_dpms, & vmw_du_connector_save, & vmw_du_connector_restore,
63264    (void (*)(struct drm_connector *connector ))0, & vmw_du_connector_detect, & vmw_du_connector_fill_modes,
63265    & vmw_du_connector_set_property, & vmw_ldu_connector_destroy, (void (*)(struct drm_connector *connector ))0};
63266#line 338 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63267static int vmw_ldu_init(struct vmw_private *dev_priv , unsigned int unit ) 
63268{ struct vmw_legacy_display_unit *ldu ;
63269  struct drm_device *dev ;
63270  struct drm_connector *connector ;
63271  struct drm_encoder *encoder ;
63272  struct drm_crtc *crtc ;
63273  void *tmp___7 ;
63274  unsigned long __cil_tmp9 ;
63275  unsigned long __cil_tmp10 ;
63276  unsigned long __cil_tmp11 ;
63277  unsigned long __cil_tmp12 ;
63278  unsigned long __cil_tmp13 ;
63279  unsigned long __cil_tmp14 ;
63280  unsigned long __cil_tmp15 ;
63281  unsigned long __cil_tmp16 ;
63282  unsigned long __cil_tmp17 ;
63283  unsigned long __cil_tmp18 ;
63284  unsigned long __cil_tmp19 ;
63285  unsigned long __cil_tmp20 ;
63286  unsigned long __cil_tmp21 ;
63287  struct list_head *__cil_tmp22 ;
63288  unsigned long __cil_tmp23 ;
63289  unsigned long __cil_tmp24 ;
63290  unsigned long __cil_tmp25 ;
63291  int __cil_tmp26 ;
63292  unsigned long __cil_tmp27 ;
63293  unsigned long __cil_tmp28 ;
63294  unsigned long __cil_tmp29 ;
63295  unsigned long __cil_tmp30 ;
63296  unsigned long __cil_tmp31 ;
63297  unsigned long __cil_tmp32 ;
63298  unsigned long __cil_tmp33 ;
63299  unsigned long __cil_tmp34 ;
63300  unsigned long __cil_tmp35 ;
63301  unsigned long __cil_tmp36 ;
63302  unsigned long __cil_tmp37 ;
63303  unsigned long __cil_tmp38 ;
63304  unsigned long __cil_tmp39 ;
63305  void *__cil_tmp40 ;
63306  unsigned long __cil_tmp41 ;
63307  unsigned long __cil_tmp42 ;
63308  unsigned long __cil_tmp43 ;
63309  struct drm_connector_funcs    *__cil_tmp44 ;
63310  unsigned long __cil_tmp45 ;
63311  unsigned long __cil_tmp46 ;
63312  bool __cil_tmp47 ;
63313  struct drm_encoder_funcs    *__cil_tmp48 ;
63314  unsigned long __cil_tmp49 ;
63315  unsigned long __cil_tmp50 ;
63316  int __cil_tmp51 ;
63317  unsigned long __cil_tmp52 ;
63318  unsigned long __cil_tmp53 ;
63319  struct drm_crtc_funcs    *__cil_tmp54 ;
63320  unsigned long __cil_tmp55 ;
63321  unsigned long __cil_tmp56 ;
63322  unsigned long __cil_tmp57 ;
63323  struct drm_property *__cil_tmp58 ;
63324  uint64_t __cil_tmp59 ;
63325
63326  {
63327  {
63328#line 341
63329  __cil_tmp9 = (unsigned long )dev_priv;
63330#line 341
63331  __cil_tmp10 = __cil_tmp9 + 2088;
63332#line 341
63333  dev = *((struct drm_device **)__cil_tmp10);
63334#line 346
63335  tmp___7 = kzalloc(2088UL, 208U);
63336#line 346
63337  ldu = (struct vmw_legacy_display_unit *)tmp___7;
63338  }
63339#line 347
63340  if (! ldu) {
63341#line 348
63342    return (-12);
63343  } else {
63344
63345  }
63346  {
63347#line 350
63348  __cil_tmp11 = 0 + 2032;
63349#line 350
63350  __cil_tmp12 = (unsigned long )ldu;
63351#line 350
63352  __cil_tmp13 = __cil_tmp12 + __cil_tmp11;
63353#line 350
63354  *((unsigned int *)__cil_tmp13) = unit;
63355#line 351
63356  crtc = (struct drm_crtc *)ldu;
63357#line 352
63358  __cil_tmp14 = 0 + 544;
63359#line 352
63360  __cil_tmp15 = (unsigned long )ldu;
63361#line 352
63362  __cil_tmp16 = __cil_tmp15 + __cil_tmp14;
63363#line 352
63364  encoder = (struct drm_encoder *)__cil_tmp16;
63365#line 353
63366  __cil_tmp17 = 0 + 616;
63367#line 353
63368  __cil_tmp18 = (unsigned long )ldu;
63369#line 353
63370  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
63371#line 353
63372  connector = (struct drm_connector *)__cil_tmp19;
63373#line 355
63374  __cil_tmp20 = (unsigned long )ldu;
63375#line 355
63376  __cil_tmp21 = __cil_tmp20 + 2072;
63377#line 355
63378  __cil_tmp22 = (struct list_head *)__cil_tmp21;
63379#line 355
63380  INIT_LIST_HEAD(__cil_tmp22);
63381#line 357
63382  __cil_tmp23 = 0 + 2044;
63383#line 357
63384  __cil_tmp24 = (unsigned long )ldu;
63385#line 357
63386  __cil_tmp25 = __cil_tmp24 + __cil_tmp23;
63387#line 357
63388  __cil_tmp26 = unit == 0U;
63389#line 357
63390  *((bool *)__cil_tmp25) = (bool )__cil_tmp26;
63391#line 358
63392  __cil_tmp27 = 0 + 2036;
63393#line 358
63394  __cil_tmp28 = (unsigned long )ldu;
63395#line 358
63396  __cil_tmp29 = __cil_tmp28 + __cil_tmp27;
63397#line 358
63398  __cil_tmp30 = (unsigned long )dev_priv;
63399#line 358
63400  __cil_tmp31 = __cil_tmp30 + 2132;
63401#line 358
63402  *((unsigned int *)__cil_tmp29) = *((uint32_t *)__cil_tmp31);
63403#line 359
63404  __cil_tmp32 = 0 + 2040;
63405#line 359
63406  __cil_tmp33 = (unsigned long )ldu;
63407#line 359
63408  __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
63409#line 359
63410  __cil_tmp35 = (unsigned long )dev_priv;
63411#line 359
63412  __cil_tmp36 = __cil_tmp35 + 2136;
63413#line 359
63414  *((unsigned int *)__cil_tmp34) = *((uint32_t *)__cil_tmp36);
63415#line 360
63416  __cil_tmp37 = 0 + 2048;
63417#line 360
63418  __cil_tmp38 = (unsigned long )ldu;
63419#line 360
63420  __cil_tmp39 = __cil_tmp38 + __cil_tmp37;
63421#line 360
63422  __cil_tmp40 = (void *)0;
63423#line 360
63424  *((struct drm_display_mode **)__cil_tmp39) = (struct drm_display_mode *)__cil_tmp40;
63425#line 361
63426  __cil_tmp41 = 0 + 2064;
63427#line 361
63428  __cil_tmp42 = (unsigned long )ldu;
63429#line 361
63430  __cil_tmp43 = __cil_tmp42 + __cil_tmp41;
63431#line 361
63432  *((bool *)__cil_tmp43) = (bool )1;
63433#line 363
63434  __cil_tmp44 = (struct drm_connector_funcs    *)(& vmw_legacy_connector_funcs);
63435#line 363
63436  drm_connector_init(dev, connector, __cil_tmp44, 15);
63437#line 365
63438  __cil_tmp45 = (unsigned long )connector;
63439#line 365
63440  __cil_tmp46 = __cil_tmp45 + 840;
63441#line 365
63442  __cil_tmp47 = (bool )1;
63443#line 365
63444  *((enum drm_connector_status *)__cil_tmp46) = vmw_du_connector_detect(connector,
63445                                                                        __cil_tmp47);
63446#line 367
63447  __cil_tmp48 = (struct drm_encoder_funcs    *)(& vmw_legacy_encoder_funcs);
63448#line 367
63449  drm_encoder_init(dev, encoder, __cil_tmp48, 5);
63450#line 369
63451  drm_mode_connector_attach_encoder(connector, encoder);
63452#line 370
63453  __cil_tmp49 = (unsigned long )encoder;
63454#line 370
63455  __cil_tmp50 = __cil_tmp49 + 36;
63456#line 370
63457  __cil_tmp51 = 1 << unit;
63458#line 370
63459  *((uint32_t *)__cil_tmp50) = (uint32_t )__cil_tmp51;
63460#line 371
63461  __cil_tmp52 = (unsigned long )encoder;
63462#line 371
63463  __cil_tmp53 = __cil_tmp52 + 40;
63464#line 371
63465  *((uint32_t *)__cil_tmp53) = (uint32_t )0;
63466#line 373
63467  __cil_tmp54 = (struct drm_crtc_funcs    *)(& vmw_legacy_crtc_funcs);
63468#line 373
63469  drm_crtc_init(dev, crtc, __cil_tmp54);
63470#line 375
63471  drm_mode_crtc_set_gamma_size(crtc, 256);
63472#line 377
63473  __cil_tmp55 = 1152 + 648;
63474#line 377
63475  __cil_tmp56 = (unsigned long )dev;
63476#line 377
63477  __cil_tmp57 = __cil_tmp56 + __cil_tmp55;
63478#line 377
63479  __cil_tmp58 = *((struct drm_property **)__cil_tmp57);
63480#line 377
63481  __cil_tmp59 = (uint64_t )1;
63482#line 377
63483  drm_connector_attach_property(connector, __cil_tmp58, __cil_tmp59);
63484  }
63485#line 381
63486  return (0);
63487}
63488}
63489#line 384 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63490int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv ) 
63491{ struct drm_device *dev ;
63492  int i ;
63493  int ret ;
63494  void *tmp___7 ;
63495  unsigned long __cil_tmp6 ;
63496  unsigned long __cil_tmp7 ;
63497  unsigned long __cil_tmp8 ;
63498  unsigned long __cil_tmp9 ;
63499  unsigned long __cil_tmp10 ;
63500  unsigned long __cil_tmp11 ;
63501  unsigned long __cil_tmp12 ;
63502  unsigned long __cil_tmp13 ;
63503  struct vmw_legacy_display *__cil_tmp14 ;
63504  unsigned long __cil_tmp15 ;
63505  unsigned long __cil_tmp16 ;
63506  struct vmw_legacy_display *__cil_tmp17 ;
63507  struct list_head *__cil_tmp18 ;
63508  unsigned long __cil_tmp19 ;
63509  unsigned long __cil_tmp20 ;
63510  struct vmw_legacy_display *__cil_tmp21 ;
63511  unsigned long __cil_tmp22 ;
63512  unsigned long __cil_tmp23 ;
63513  unsigned long __cil_tmp24 ;
63514  unsigned long __cil_tmp25 ;
63515  struct vmw_legacy_display *__cil_tmp26 ;
63516  unsigned long __cil_tmp27 ;
63517  unsigned long __cil_tmp28 ;
63518  unsigned long __cil_tmp29 ;
63519  unsigned long __cil_tmp30 ;
63520  struct vmw_legacy_display *__cil_tmp31 ;
63521  unsigned long __cil_tmp32 ;
63522  unsigned long __cil_tmp33 ;
63523  void *__cil_tmp34 ;
63524  unsigned long __cil_tmp35 ;
63525  unsigned long __cil_tmp36 ;
63526  uint32_t __cil_tmp37 ;
63527  unsigned long __cil_tmp38 ;
63528  unsigned long __cil_tmp39 ;
63529  uint32_t __cil_tmp40 ;
63530  unsigned int __cil_tmp41 ;
63531  unsigned long __cil_tmp42 ;
63532  unsigned long __cil_tmp43 ;
63533  struct vmw_legacy_display *__cil_tmp44 ;
63534  void    *__cil_tmp45 ;
63535  unsigned long __cil_tmp46 ;
63536  unsigned long __cil_tmp47 ;
63537  void *__cil_tmp48 ;
63538
63539  {
63540#line 386
63541  __cil_tmp6 = (unsigned long )dev_priv;
63542#line 386
63543  __cil_tmp7 = __cil_tmp6 + 2088;
63544#line 386
63545  dev = *((struct drm_device **)__cil_tmp7);
63546  {
63547#line 389
63548  __cil_tmp8 = (unsigned long )dev_priv;
63549#line 389
63550  __cil_tmp9 = __cil_tmp8 + 2608;
63551#line 389
63552  if (*((struct vmw_legacy_display **)__cil_tmp9)) {
63553    {
63554#line 390
63555    printk("<6>[drm] ldu system already on\n");
63556    }
63557#line 391
63558    return (-22);
63559  } else {
63560
63561  }
63562  }
63563  {
63564#line 394
63565  tmp___7 = kmalloc(32UL, 208U);
63566#line 394
63567  __cil_tmp10 = (unsigned long )dev_priv;
63568#line 394
63569  __cil_tmp11 = __cil_tmp10 + 2608;
63570#line 394
63571  *((struct vmw_legacy_display **)__cil_tmp11) = (struct vmw_legacy_display *)tmp___7;
63572  }
63573  {
63574#line 395
63575  __cil_tmp12 = (unsigned long )dev_priv;
63576#line 395
63577  __cil_tmp13 = __cil_tmp12 + 2608;
63578#line 395
63579  __cil_tmp14 = *((struct vmw_legacy_display **)__cil_tmp13);
63580#line 395
63581  if (! __cil_tmp14) {
63582#line 396
63583    return (-12);
63584  } else {
63585
63586  }
63587  }
63588  {
63589#line 398
63590  __cil_tmp15 = (unsigned long )dev_priv;
63591#line 398
63592  __cil_tmp16 = __cil_tmp15 + 2608;
63593#line 398
63594  __cil_tmp17 = *((struct vmw_legacy_display **)__cil_tmp16);
63595#line 398
63596  __cil_tmp18 = (struct list_head *)__cil_tmp17;
63597#line 398
63598  INIT_LIST_HEAD(__cil_tmp18);
63599#line 399
63600  __cil_tmp19 = (unsigned long )dev_priv;
63601#line 399
63602  __cil_tmp20 = __cil_tmp19 + 2608;
63603#line 399
63604  __cil_tmp21 = *((struct vmw_legacy_display **)__cil_tmp20);
63605#line 399
63606  __cil_tmp22 = (unsigned long )__cil_tmp21;
63607#line 399
63608  __cil_tmp23 = __cil_tmp22 + 16;
63609#line 399
63610  *((unsigned int *)__cil_tmp23) = 0U;
63611#line 400
63612  __cil_tmp24 = (unsigned long )dev_priv;
63613#line 400
63614  __cil_tmp25 = __cil_tmp24 + 2608;
63615#line 400
63616  __cil_tmp26 = *((struct vmw_legacy_display **)__cil_tmp25);
63617#line 400
63618  __cil_tmp27 = (unsigned long )__cil_tmp26;
63619#line 400
63620  __cil_tmp28 = __cil_tmp27 + 20;
63621#line 400
63622  *((unsigned int *)__cil_tmp28) = 0U;
63623#line 401
63624  __cil_tmp29 = (unsigned long )dev_priv;
63625#line 401
63626  __cil_tmp30 = __cil_tmp29 + 2608;
63627#line 401
63628  __cil_tmp31 = *((struct vmw_legacy_display **)__cil_tmp30);
63629#line 401
63630  __cil_tmp32 = (unsigned long )__cil_tmp31;
63631#line 401
63632  __cil_tmp33 = __cil_tmp32 + 24;
63633#line 401
63634  __cil_tmp34 = (void *)0;
63635#line 401
63636  *((struct vmw_framebuffer **)__cil_tmp33) = (struct vmw_framebuffer *)__cil_tmp34;
63637  }
63638  {
63639#line 404
63640  __cil_tmp35 = (unsigned long )dev_priv;
63641#line 404
63642  __cil_tmp36 = __cil_tmp35 + 2156;
63643#line 404
63644  __cil_tmp37 = *((uint32_t *)__cil_tmp36);
63645#line 404
63646  if (__cil_tmp37 & 65536U) {
63647    {
63648#line 405
63649    ret = drm_vblank_init(dev, 8);
63650    }
63651  } else {
63652    {
63653#line 407
63654    ret = drm_vblank_init(dev, 1);
63655    }
63656  }
63657  }
63658#line 408
63659  if (ret != 0) {
63660#line 409
63661    goto err_free;
63662  } else {
63663
63664  }
63665  {
63666#line 411
63667  ret = drm_mode_create_dirty_info_property(dev);
63668  }
63669#line 412
63670  if (ret != 0) {
63671#line 413
63672    goto err_vblank_cleanup;
63673  } else {
63674
63675  }
63676  {
63677#line 415
63678  __cil_tmp38 = (unsigned long )dev_priv;
63679#line 415
63680  __cil_tmp39 = __cil_tmp38 + 2156;
63681#line 415
63682  __cil_tmp40 = *((uint32_t *)__cil_tmp39);
63683#line 415
63684  if (__cil_tmp40 & 65536U) {
63685#line 416
63686    i = 0;
63687    {
63688#line 416
63689    while (1) {
63690      while_continue: /* CIL Label */ ;
63691#line 416
63692      if (i < 8) {
63693
63694      } else {
63695#line 416
63696        goto while_break;
63697      }
63698      {
63699#line 417
63700      __cil_tmp41 = (unsigned int )i;
63701#line 417
63702      vmw_ldu_init(dev_priv, __cil_tmp41);
63703#line 416
63704      i = i + 1;
63705      }
63706    }
63707    while_break: /* CIL Label */ ;
63708    }
63709  } else {
63710    {
63711#line 419
63712    vmw_ldu_init(dev_priv, 0U);
63713    }
63714  }
63715  }
63716#line 421
63717  return (0);
63718  err_vblank_cleanup: 
63719  {
63720#line 424
63721  drm_vblank_cleanup(dev);
63722  }
63723  err_free: 
63724  {
63725#line 426
63726  __cil_tmp42 = (unsigned long )dev_priv;
63727#line 426
63728  __cil_tmp43 = __cil_tmp42 + 2608;
63729#line 426
63730  __cil_tmp44 = *((struct vmw_legacy_display **)__cil_tmp43);
63731#line 426
63732  __cil_tmp45 = (void    *)__cil_tmp44;
63733#line 426
63734  kfree(__cil_tmp45);
63735#line 427
63736  __cil_tmp46 = (unsigned long )dev_priv;
63737#line 427
63738  __cil_tmp47 = __cil_tmp46 + 2608;
63739#line 427
63740  __cil_tmp48 = (void *)0;
63741#line 427
63742  *((struct vmw_legacy_display **)__cil_tmp47) = (struct vmw_legacy_display *)__cil_tmp48;
63743  }
63744#line 428
63745  return (ret);
63746}
63747}
63748#line 431 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63749int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv ) 
63750{ struct drm_device *dev ;
63751  int tmp___7 ;
63752  int tmp___8 ;
63753  long tmp___9 ;
63754  unsigned long __cil_tmp6 ;
63755  unsigned long __cil_tmp7 ;
63756  unsigned long __cil_tmp8 ;
63757  unsigned long __cil_tmp9 ;
63758  struct vmw_legacy_display *__cil_tmp10 ;
63759  unsigned long __cil_tmp11 ;
63760  unsigned long __cil_tmp12 ;
63761  struct vmw_legacy_display *__cil_tmp13 ;
63762  struct list_head *__cil_tmp14 ;
63763  struct list_head    *__cil_tmp15 ;
63764  long __cil_tmp16 ;
63765  unsigned long __cil_tmp17 ;
63766  unsigned long __cil_tmp18 ;
63767  struct vmw_legacy_display *__cil_tmp19 ;
63768  void    *__cil_tmp20 ;
63769
63770  {
63771#line 433
63772  __cil_tmp6 = (unsigned long )dev_priv;
63773#line 433
63774  __cil_tmp7 = __cil_tmp6 + 2088;
63775#line 433
63776  dev = *((struct drm_device **)__cil_tmp7);
63777  {
63778#line 435
63779  __cil_tmp8 = (unsigned long )dev_priv;
63780#line 435
63781  __cil_tmp9 = __cil_tmp8 + 2608;
63782#line 435
63783  __cil_tmp10 = *((struct vmw_legacy_display **)__cil_tmp9);
63784#line 435
63785  if (! __cil_tmp10) {
63786#line 436
63787    return (-38);
63788  } else {
63789
63790  }
63791  }
63792  {
63793#line 438
63794  drm_vblank_cleanup(dev);
63795  }
63796  {
63797#line 440
63798  while (1) {
63799    while_continue: /* CIL Label */ ;
63800    {
63801#line 440
63802    __cil_tmp11 = (unsigned long )dev_priv;
63803#line 440
63804    __cil_tmp12 = __cil_tmp11 + 2608;
63805#line 440
63806    __cil_tmp13 = *((struct vmw_legacy_display **)__cil_tmp12);
63807#line 440
63808    __cil_tmp14 = (struct list_head *)__cil_tmp13;
63809#line 440
63810    __cil_tmp15 = (struct list_head    *)__cil_tmp14;
63811#line 440
63812    tmp___7 = list_empty(__cil_tmp15);
63813    }
63814#line 440
63815    if (tmp___7) {
63816#line 440
63817      tmp___8 = 0;
63818    } else {
63819#line 440
63820      tmp___8 = 1;
63821    }
63822    {
63823#line 440
63824    __cil_tmp16 = (long )tmp___8;
63825#line 440
63826    tmp___9 = __builtin_expect(__cil_tmp16, 0L);
63827    }
63828#line 440
63829    if (tmp___9) {
63830      {
63831#line 440
63832      while (1) {
63833        while_continue___0: /* CIL Label */ ;
63834#line 440
63835        __asm__  volatile   ("1:\tud2\n"
63836                             ".pushsection __bug_table,\"a\"\n"
63837                             "2:\t.long 1b - 2b, %c0 - 2b\n"
63838                             "\t.word %c1, 0\n"
63839                             "\t.org 2b+%c2\n"
63840                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"),
63841                             "i" (440), "i" (12UL));
63842        {
63843#line 440
63844        while (1) {
63845          while_continue___1: /* CIL Label */ ;
63846        }
63847        while_break___1: /* CIL Label */ ;
63848        }
63849#line 440
63850        goto while_break___0;
63851      }
63852      while_break___0: /* CIL Label */ ;
63853      }
63854    } else {
63855
63856    }
63857#line 440
63858    goto while_break;
63859  }
63860  while_break: /* CIL Label */ ;
63861  }
63862  {
63863#line 442
63864  __cil_tmp17 = (unsigned long )dev_priv;
63865#line 442
63866  __cil_tmp18 = __cil_tmp17 + 2608;
63867#line 442
63868  __cil_tmp19 = *((struct vmw_legacy_display **)__cil_tmp18);
63869#line 442
63870  __cil_tmp20 = (void    *)__cil_tmp19;
63871#line 442
63872  kfree(__cil_tmp20);
63873  }
63874#line 444
63875  return (0);
63876}
63877}
63878#line 478 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c"
63879void ldv_main10_sequence_infinite_withcheck_stateful(void) 
63880{ struct drm_crtc *var_group1 ;
63881  struct drm_mode_set *var_group2 ;
63882  struct drm_encoder *var_group3 ;
63883  struct drm_connector *var_group4 ;
63884  int tmp___7 ;
63885  int tmp___8 ;
63886
63887  {
63888  {
63889#line 540
63890  LDV_IN_INTERRUPT = 1;
63891#line 549
63892  ldv_initialize();
63893  }
63894  {
63895#line 557
63896  while (1) {
63897    while_continue: /* CIL Label */ ;
63898    {
63899#line 557
63900    tmp___8 = __VERIFIER_nondet_int();
63901    }
63902#line 557
63903    if (tmp___8) {
63904
63905    } else {
63906#line 557
63907      goto while_break;
63908    }
63909    {
63910#line 560
63911    tmp___7 = __VERIFIER_nondet_int();
63912    }
63913#line 562
63914    if (tmp___7 == 0) {
63915#line 562
63916      goto case_0;
63917    } else
63918#line 585
63919    if (tmp___7 == 1) {
63920#line 585
63921      goto case_1;
63922    } else
63923#line 608
63924    if (tmp___7 == 2) {
63925#line 608
63926      goto case_2;
63927    } else
63928#line 631
63929    if (tmp___7 == 3) {
63930#line 631
63931      goto case_3;
63932    } else {
63933      {
63934#line 654
63935      goto switch_default;
63936#line 560
63937      if (0) {
63938        case_0: /* CIL Label */ 
63939        {
63940#line 577
63941        vmw_ldu_crtc_destroy(var_group1);
63942        }
63943#line 584
63944        goto switch_break;
63945        case_1: /* CIL Label */ 
63946        {
63947#line 600
63948        vmw_ldu_crtc_set_config(var_group2);
63949        }
63950#line 607
63951        goto switch_break;
63952        case_2: /* CIL Label */ 
63953        {
63954#line 623
63955        vmw_ldu_encoder_destroy(var_group3);
63956        }
63957#line 630
63958        goto switch_break;
63959        case_3: /* CIL Label */ 
63960        {
63961#line 646
63962        vmw_ldu_connector_destroy(var_group4);
63963        }
63964#line 653
63965        goto switch_break;
63966        switch_default: /* CIL Label */ 
63967#line 654
63968        goto switch_break;
63969      } else {
63970        switch_break: /* CIL Label */ ;
63971      }
63972      }
63973    }
63974  }
63975  while_break: /* CIL Label */ ;
63976  }
63977  {
63978#line 663
63979  ldv_check_final_state();
63980  }
63981#line 666
63982  return;
63983}
63984}
63985#line 50 "include/drm/drm_global.h"
63986extern int drm_global_item_ref(struct drm_global_reference *ref ) ;
63987#line 51
63988extern void drm_global_item_unref(struct drm_global_reference *ref ) ;
63989#line 702 "include/drm/ttm/ttm_bo_api.h"
63990extern int ttm_bo_mmap(struct file *filp , struct vm_area_struct *vma , struct ttm_bo_device *bdev ) ;
63991#line 148 "include/drm/ttm/ttm_memory.h"
63992extern int ttm_mem_global_init(struct ttm_mem_global *glob ) ;
63993#line 149
63994extern void ttm_mem_global_release(struct ttm_mem_global *glob ) ;
63995#line 747 "include/drm/ttm/ttm_bo_driver.h"
63996extern void ttm_bo_global_release(struct drm_global_reference *ref ) ;
63997#line 748
63998extern int ttm_bo_global_init(struct drm_global_reference *ref ) ;
63999#line 31 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c"
64000int vmw_mmap(struct file *filp , struct vm_area_struct *vma ) 
64001{ struct drm_file *file_priv ;
64002  struct vmw_private *dev_priv ;
64003  long tmp___7 ;
64004  int tmp___8 ;
64005  unsigned long __cil_tmp7 ;
64006  unsigned long __cil_tmp8 ;
64007  unsigned long __cil_tmp9 ;
64008  int __cil_tmp10 ;
64009  int __cil_tmp11 ;
64010  int __cil_tmp12 ;
64011  long __cil_tmp13 ;
64012  unsigned long __cil_tmp14 ;
64013  unsigned long __cil_tmp15 ;
64014  void *__cil_tmp16 ;
64015  unsigned long __cil_tmp17 ;
64016  unsigned long __cil_tmp18 ;
64017  struct drm_minor *__cil_tmp19 ;
64018  unsigned long __cil_tmp20 ;
64019  unsigned long __cil_tmp21 ;
64020  struct drm_device *__cil_tmp22 ;
64021  struct ttm_bo_device *__cil_tmp23 ;
64022
64023  {
64024  {
64025#line 36
64026  __cil_tmp7 = (unsigned long )vma;
64027#line 36
64028  __cil_tmp8 = __cil_tmp7 + 144;
64029#line 36
64030  __cil_tmp9 = *((unsigned long *)__cil_tmp8);
64031#line 36
64032  __cil_tmp10 = __cil_tmp9 < 1048576UL;
64033#line 36
64034  __cil_tmp11 = ! __cil_tmp10;
64035#line 36
64036  __cil_tmp12 = ! __cil_tmp11;
64037#line 36
64038  __cil_tmp13 = (long )__cil_tmp12;
64039#line 36
64040  tmp___7 = __builtin_expect(__cil_tmp13, 0L);
64041  }
64042#line 36
64043  if (tmp___7) {
64044    {
64045#line 37
64046    drm_err("vmw_mmap", "Illegal attempt to mmap old fifo space.\n");
64047    }
64048#line 38
64049    return (-22);
64050  } else {
64051
64052  }
64053  {
64054#line 41
64055  __cil_tmp14 = (unsigned long )filp;
64056#line 41
64057  __cil_tmp15 = __cil_tmp14 + 200;
64058#line 41
64059  __cil_tmp16 = *((void **)__cil_tmp15);
64060#line 41
64061  file_priv = (struct drm_file *)__cil_tmp16;
64062#line 42
64063  __cil_tmp17 = (unsigned long )file_priv;
64064#line 42
64065  __cil_tmp18 = __cil_tmp17 + 40;
64066#line 42
64067  __cil_tmp19 = *((struct drm_minor **)__cil_tmp18);
64068#line 42
64069  __cil_tmp20 = (unsigned long )__cil_tmp19;
64070#line 42
64071  __cil_tmp21 = __cil_tmp20 + 784;
64072#line 42
64073  __cil_tmp22 = *((struct drm_device **)__cil_tmp21);
64074#line 42
64075  dev_priv = vmw_priv(__cil_tmp22);
64076#line 43
64077  __cil_tmp23 = (struct ttm_bo_device *)dev_priv;
64078#line 43
64079  tmp___8 = ttm_bo_mmap(filp, vma, __cil_tmp23);
64080  }
64081#line 43
64082  return (tmp___8);
64083}
64084}
64085#line 46 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c"
64086static int vmw_ttm_mem_global_init(struct drm_global_reference *ref ) 
64087{ int tmp___7 ;
64088  unsigned long __cil_tmp3 ;
64089  unsigned long __cil_tmp4 ;
64090  void *__cil_tmp5 ;
64091  struct ttm_mem_global *__cil_tmp6 ;
64092
64093  {
64094  {
64095#line 48
64096  printk("<6>[drm] global init.\n");
64097#line 49
64098  __cil_tmp3 = (unsigned long )ref;
64099#line 49
64100  __cil_tmp4 = __cil_tmp3 + 16;
64101#line 49
64102  __cil_tmp5 = *((void **)__cil_tmp4);
64103#line 49
64104  __cil_tmp6 = (struct ttm_mem_global *)__cil_tmp5;
64105#line 49
64106  tmp___7 = ttm_mem_global_init(__cil_tmp6);
64107  }
64108#line 49
64109  return (tmp___7);
64110}
64111}
64112#line 52 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c"
64113static void vmw_ttm_mem_global_release(struct drm_global_reference *ref ) 
64114{ unsigned long __cil_tmp2 ;
64115  unsigned long __cil_tmp3 ;
64116  void *__cil_tmp4 ;
64117  struct ttm_mem_global *__cil_tmp5 ;
64118
64119  {
64120  {
64121#line 54
64122  __cil_tmp2 = (unsigned long )ref;
64123#line 54
64124  __cil_tmp3 = __cil_tmp2 + 16;
64125#line 54
64126  __cil_tmp4 = *((void **)__cil_tmp3);
64127#line 54
64128  __cil_tmp5 = (struct ttm_mem_global *)__cil_tmp4;
64129#line 54
64130  ttm_mem_global_release(__cil_tmp5);
64131  }
64132#line 55
64133  return;
64134}
64135}
64136#line 57 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c"
64137int vmw_ttm_global_init(struct vmw_private *dev_priv ) 
64138{ struct drm_global_reference *global_ref ;
64139  int ret ;
64140  long tmp___7 ;
64141  long tmp___8 ;
64142  unsigned long __cil_tmp6 ;
64143  unsigned long __cil_tmp7 ;
64144  unsigned long __cil_tmp8 ;
64145  unsigned long __cil_tmp9 ;
64146  unsigned long __cil_tmp10 ;
64147  unsigned long __cil_tmp11 ;
64148  unsigned long __cil_tmp12 ;
64149  unsigned long __cil_tmp13 ;
64150  int __cil_tmp14 ;
64151  int __cil_tmp15 ;
64152  int __cil_tmp16 ;
64153  long __cil_tmp17 ;
64154  unsigned long __cil_tmp18 ;
64155  unsigned long __cil_tmp19 ;
64156  unsigned long __cil_tmp20 ;
64157  unsigned long __cil_tmp21 ;
64158  unsigned long __cil_tmp22 ;
64159  unsigned long __cil_tmp23 ;
64160  void *__cil_tmp24 ;
64161  unsigned long __cil_tmp25 ;
64162  unsigned long __cil_tmp26 ;
64163  unsigned long __cil_tmp27 ;
64164  unsigned long __cil_tmp28 ;
64165  unsigned long __cil_tmp29 ;
64166  unsigned long __cil_tmp30 ;
64167  unsigned long __cil_tmp31 ;
64168  unsigned long __cil_tmp32 ;
64169  int __cil_tmp33 ;
64170  int __cil_tmp34 ;
64171  int __cil_tmp35 ;
64172  long __cil_tmp36 ;
64173  unsigned long __cil_tmp37 ;
64174  unsigned long __cil_tmp38 ;
64175  struct drm_global_reference *__cil_tmp39 ;
64176
64177  {
64178  {
64179#line 62
64180  __cil_tmp6 = (unsigned long )dev_priv;
64181#line 62
64182  __cil_tmp7 = __cil_tmp6 + 1816;
64183#line 62
64184  global_ref = (struct drm_global_reference *)__cil_tmp7;
64185#line 63
64186  *((enum drm_global_types *)global_ref) = (enum drm_global_types )0;
64187#line 64
64188  __cil_tmp8 = (unsigned long )global_ref;
64189#line 64
64190  __cil_tmp9 = __cil_tmp8 + 8;
64191#line 64
64192  *((size_t *)__cil_tmp9) = 216UL;
64193#line 65
64194  __cil_tmp10 = (unsigned long )global_ref;
64195#line 65
64196  __cil_tmp11 = __cil_tmp10 + 24;
64197#line 65
64198  *((int (**)(struct drm_global_reference * ))__cil_tmp11) = & vmw_ttm_mem_global_init;
64199#line 66
64200  __cil_tmp12 = (unsigned long )global_ref;
64201#line 66
64202  __cil_tmp13 = __cil_tmp12 + 32;
64203#line 66
64204  *((void (**)(struct drm_global_reference * ))__cil_tmp13) = & vmw_ttm_mem_global_release;
64205#line 68
64206  ret = drm_global_item_ref(global_ref);
64207#line 69
64208  __cil_tmp14 = ret != 0;
64209#line 69
64210  __cil_tmp15 = ! __cil_tmp14;
64211#line 69
64212  __cil_tmp16 = ! __cil_tmp15;
64213#line 69
64214  __cil_tmp17 = (long )__cil_tmp16;
64215#line 69
64216  tmp___7 = __builtin_expect(__cil_tmp17, 0L);
64217  }
64218#line 69
64219  if (tmp___7) {
64220    {
64221#line 70
64222    drm_err("vmw_ttm_global_init", "Failed setting up TTM memory accounting.\n");
64223    }
64224#line 71
64225    return (ret);
64226  } else {
64227
64228  }
64229  {
64230#line 74
64231  __cil_tmp18 = 1768 + 40;
64232#line 74
64233  __cil_tmp19 = (unsigned long )dev_priv;
64234#line 74
64235  __cil_tmp20 = __cil_tmp19 + __cil_tmp18;
64236#line 74
64237  __cil_tmp21 = 1816 + 16;
64238#line 74
64239  __cil_tmp22 = (unsigned long )dev_priv;
64240#line 74
64241  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
64242#line 74
64243  __cil_tmp24 = *((void **)__cil_tmp23);
64244#line 74
64245  *((struct ttm_mem_global **)__cil_tmp20) = (struct ttm_mem_global *)__cil_tmp24;
64246#line 76
64247  __cil_tmp25 = (unsigned long )dev_priv;
64248#line 76
64249  __cil_tmp26 = __cil_tmp25 + 1768;
64250#line 76
64251  global_ref = (struct drm_global_reference *)__cil_tmp26;
64252#line 77
64253  *((enum drm_global_types *)global_ref) = (enum drm_global_types )1;
64254#line 78
64255  __cil_tmp27 = (unsigned long )global_ref;
64256#line 78
64257  __cil_tmp28 = __cil_tmp27 + 8;
64258#line 78
64259  *((size_t *)__cil_tmp28) = 224UL;
64260#line 79
64261  __cil_tmp29 = (unsigned long )global_ref;
64262#line 79
64263  __cil_tmp30 = __cil_tmp29 + 24;
64264#line 79
64265  *((int (**)(struct drm_global_reference * ))__cil_tmp30) = & ttm_bo_global_init;
64266#line 80
64267  __cil_tmp31 = (unsigned long )global_ref;
64268#line 80
64269  __cil_tmp32 = __cil_tmp31 + 32;
64270#line 80
64271  *((void (**)(struct drm_global_reference * ))__cil_tmp32) = & ttm_bo_global_release;
64272#line 81
64273  ret = drm_global_item_ref(global_ref);
64274#line 83
64275  __cil_tmp33 = ret != 0;
64276#line 83
64277  __cil_tmp34 = ! __cil_tmp33;
64278#line 83
64279  __cil_tmp35 = ! __cil_tmp34;
64280#line 83
64281  __cil_tmp36 = (long )__cil_tmp35;
64282#line 83
64283  tmp___8 = __builtin_expect(__cil_tmp36, 0L);
64284  }
64285#line 83
64286  if (tmp___8) {
64287    {
64288#line 84
64289    drm_err("vmw_ttm_global_init", "Failed setting up TTM buffer objects.\n");
64290    }
64291#line 85
64292    goto out_no_bo;
64293  } else {
64294
64295  }
64296#line 88
64297  return (0);
64298  out_no_bo: 
64299  {
64300#line 90
64301  __cil_tmp37 = (unsigned long )dev_priv;
64302#line 90
64303  __cil_tmp38 = __cil_tmp37 + 1816;
64304#line 90
64305  __cil_tmp39 = (struct drm_global_reference *)__cil_tmp38;
64306#line 90
64307  drm_global_item_unref(__cil_tmp39);
64308  }
64309#line 91
64310  return (ret);
64311}
64312}
64313#line 94 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c"
64314void vmw_ttm_global_release(struct vmw_private *dev_priv ) 
64315{ unsigned long __cil_tmp2 ;
64316  unsigned long __cil_tmp3 ;
64317  struct drm_global_reference *__cil_tmp4 ;
64318  unsigned long __cil_tmp5 ;
64319  unsigned long __cil_tmp6 ;
64320  struct drm_global_reference *__cil_tmp7 ;
64321
64322  {
64323  {
64324#line 96
64325  __cil_tmp2 = (unsigned long )dev_priv;
64326#line 96
64327  __cil_tmp3 = __cil_tmp2 + 1768;
64328#line 96
64329  __cil_tmp4 = (struct drm_global_reference *)__cil_tmp3;
64330#line 96
64331  drm_global_item_unref(__cil_tmp4);
64332#line 97
64333  __cil_tmp5 = (unsigned long )dev_priv;
64334#line 97
64335  __cil_tmp6 = __cil_tmp5 + 1816;
64336#line 97
64337  __cil_tmp7 = (struct drm_global_reference *)__cil_tmp6;
64338#line 97
64339  drm_global_item_unref(__cil_tmp7);
64340  }
64341#line 98
64342  return;
64343}
64344}
64345#line 452 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
64346int vmw_dmabuf_to_vram(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
64347                       bool pin , bool interruptible ) ;
64348#line 455
64349int vmw_dmabuf_to_vram_or_gmr(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
64350                              bool pin , bool interruptible ) ;
64351#line 73 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
64352__inline static void fill_escape(struct vmw_escape_header *header , uint32_t size )  __attribute__((__no_instrument_function__)) ;
64353#line 73 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
64354__inline static void fill_escape(struct vmw_escape_header *header , uint32_t size ) 
64355{ unsigned long __cil_tmp3 ;
64356  unsigned long __cil_tmp4 ;
64357  unsigned long __cil_tmp5 ;
64358  unsigned long __cil_tmp6 ;
64359  unsigned long __cil_tmp7 ;
64360
64361  {
64362#line 76
64363  *((uint32_t *)header) = (uint32_t )33;
64364#line 77
64365  __cil_tmp3 = (unsigned long )header;
64366#line 77
64367  __cil_tmp4 = __cil_tmp3 + 4;
64368#line 77
64369  *((uint32 *)__cil_tmp4) = (uint32 )0;
64370#line 78
64371  __cil_tmp5 = 4 + 4;
64372#line 78
64373  __cil_tmp6 = (unsigned long )header;
64374#line 78
64375  __cil_tmp7 = __cil_tmp6 + __cil_tmp5;
64376#line 78
64377  *((uint32 *)__cil_tmp7) = size;
64378#line 79
64379  return;
64380}
64381}
64382#line 81
64383__inline static void fill_flush(struct vmw_escape_video_flush *cmd , uint32_t stream_id )  __attribute__((__no_instrument_function__)) ;
64384#line 81 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
64385__inline static void fill_flush(struct vmw_escape_video_flush *cmd , uint32_t stream_id ) 
64386{ struct vmw_escape_header *__cil_tmp3 ;
64387  uint32_t __cil_tmp4 ;
64388  unsigned long __cil_tmp5 ;
64389  unsigned long __cil_tmp6 ;
64390  unsigned long __cil_tmp7 ;
64391  unsigned long __cil_tmp8 ;
64392  unsigned long __cil_tmp9 ;
64393
64394  {
64395  {
64396#line 84
64397  __cil_tmp3 = (struct vmw_escape_header *)cmd;
64398#line 84
64399  __cil_tmp4 = (uint32_t )8UL;
64400#line 84
64401  fill_escape(__cil_tmp3, __cil_tmp4);
64402#line 85
64403  __cil_tmp5 = (unsigned long )cmd;
64404#line 85
64405  __cil_tmp6 = __cil_tmp5 + 12;
64406#line 85
64407  *((uint32 *)__cil_tmp6) = (uint32 )131074;
64408#line 86
64409  __cil_tmp7 = 12 + 4;
64410#line 86
64411  __cil_tmp8 = (unsigned long )cmd;
64412#line 86
64413  __cil_tmp9 = __cil_tmp8 + __cil_tmp7;
64414#line 86
64415  *((uint32 *)__cil_tmp9) = stream_id;
64416  }
64417#line 87
64418  return;
64419}
64420}
64421#line 95 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
64422static int vmw_overlay_send_put(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
64423                                struct drm_vmw_control_stream_arg *arg , bool interruptible ) 
64424{ struct vmw_escape_video_flush *flush ;
64425  size_t fifo_size ;
64426  bool have_so ;
64427  int tmp___7 ;
64428  int i ;
64429  int num_items ;
64430  SVGAGuestPtr ptr ;
64431  struct __anonstruct_cmds_440 *cmds ;
64432  struct __anonstruct_items_442 *items ;
64433  void *tmp___8 ;
64434  unsigned long __cil_tmp15 ;
64435  unsigned long __cil_tmp16 ;
64436  unsigned long __cil_tmp17 ;
64437  unsigned long __cil_tmp18 ;
64438  unsigned long __cil_tmp19 ;
64439  uint32_t __cil_tmp20 ;
64440  struct __anonstruct_cmds_440 *__cil_tmp21 ;
64441  struct __anonstruct_items_442 *__cil_tmp22 ;
64442  struct vmw_escape_header *__cil_tmp23 ;
64443  int __cil_tmp24 ;
64444  unsigned long __cil_tmp25 ;
64445  unsigned long __cil_tmp26 ;
64446  uint32_t __cil_tmp27 ;
64447  unsigned long __cil_tmp28 ;
64448  unsigned long __cil_tmp29 ;
64449  unsigned long __cil_tmp30 ;
64450  unsigned long __cil_tmp31 ;
64451  unsigned long __cil_tmp32 ;
64452  struct __anonstruct_items_442 *__cil_tmp33 ;
64453  struct ttm_buffer_object *__cil_tmp34 ;
64454  struct ttm_buffer_object    *__cil_tmp35 ;
64455  unsigned long __cil_tmp36 ;
64456  unsigned long __cil_tmp37 ;
64457  unsigned long __cil_tmp38 ;
64458  uint32_t __cil_tmp39 ;
64459  unsigned long __cil_tmp40 ;
64460  uint32 __cil_tmp41 ;
64461  struct __anonstruct_items_442 *__cil_tmp42 ;
64462  unsigned long __cil_tmp43 ;
64463  unsigned long __cil_tmp44 ;
64464  struct __anonstruct_items_442 *__cil_tmp45 ;
64465  unsigned long __cil_tmp46 ;
64466  unsigned long __cil_tmp47 ;
64467  unsigned long __cil_tmp48 ;
64468  unsigned long __cil_tmp49 ;
64469  struct __anonstruct_items_442 *__cil_tmp50 ;
64470  unsigned long __cil_tmp51 ;
64471  unsigned long __cil_tmp52 ;
64472  unsigned long __cil_tmp53 ;
64473  struct __anonstruct_items_442 *__cil_tmp54 ;
64474  unsigned long __cil_tmp55 ;
64475  unsigned long __cil_tmp56 ;
64476  unsigned long __cil_tmp57 ;
64477  unsigned long __cil_tmp58 ;
64478  int32_t __cil_tmp59 ;
64479  struct __anonstruct_items_442 *__cil_tmp60 ;
64480  unsigned long __cil_tmp61 ;
64481  unsigned long __cil_tmp62 ;
64482  unsigned long __cil_tmp63 ;
64483  unsigned long __cil_tmp64 ;
64484  struct __anonstruct_items_442 *__cil_tmp65 ;
64485  unsigned long __cil_tmp66 ;
64486  unsigned long __cil_tmp67 ;
64487  unsigned long __cil_tmp68 ;
64488  unsigned long __cil_tmp69 ;
64489  struct __anonstruct_items_442 *__cil_tmp70 ;
64490  unsigned long __cil_tmp71 ;
64491  unsigned long __cil_tmp72 ;
64492  unsigned long __cil_tmp73 ;
64493  unsigned long __cil_tmp74 ;
64494  struct __anonstruct_items_442 *__cil_tmp75 ;
64495  unsigned long __cil_tmp76 ;
64496  unsigned long __cil_tmp77 ;
64497  unsigned long __cil_tmp78 ;
64498  unsigned long __cil_tmp79 ;
64499  struct __anonstruct_items_442 *__cil_tmp80 ;
64500  unsigned long __cil_tmp81 ;
64501  unsigned long __cil_tmp82 ;
64502  unsigned long __cil_tmp83 ;
64503  unsigned long __cil_tmp84 ;
64504  int32_t __cil_tmp85 ;
64505  struct __anonstruct_items_442 *__cil_tmp86 ;
64506  unsigned long __cil_tmp87 ;
64507  unsigned long __cil_tmp88 ;
64508  unsigned long __cil_tmp89 ;
64509  unsigned long __cil_tmp90 ;
64510  unsigned long __cil_tmp91 ;
64511  int32_t __cil_tmp92 ;
64512  struct __anonstruct_items_442 *__cil_tmp93 ;
64513  unsigned long __cil_tmp94 ;
64514  unsigned long __cil_tmp95 ;
64515  unsigned long __cil_tmp96 ;
64516  unsigned long __cil_tmp97 ;
64517  unsigned long __cil_tmp98 ;
64518  struct __anonstruct_items_442 *__cil_tmp99 ;
64519  unsigned long __cil_tmp100 ;
64520  unsigned long __cil_tmp101 ;
64521  unsigned long __cil_tmp102 ;
64522  unsigned long __cil_tmp103 ;
64523  unsigned long __cil_tmp104 ;
64524  struct __anonstruct_items_442 *__cil_tmp105 ;
64525  unsigned long __cil_tmp106 ;
64526  unsigned long __cil_tmp107 ;
64527  unsigned long __cil_tmp108 ;
64528  unsigned long __cil_tmp109 ;
64529  int32_t __cil_tmp110 ;
64530  struct __anonstruct_items_442 *__cil_tmp111 ;
64531  unsigned long __cil_tmp112 ;
64532  unsigned long __cil_tmp113 ;
64533  unsigned long __cil_tmp114 ;
64534  unsigned long __cil_tmp115 ;
64535  unsigned long __cil_tmp116 ;
64536  int32_t __cil_tmp117 ;
64537  struct __anonstruct_items_442 *__cil_tmp118 ;
64538  unsigned long __cil_tmp119 ;
64539  unsigned long __cil_tmp120 ;
64540  unsigned long __cil_tmp121 ;
64541  unsigned long __cil_tmp122 ;
64542  unsigned long __cil_tmp123 ;
64543  struct __anonstruct_items_442 *__cil_tmp124 ;
64544  unsigned long __cil_tmp125 ;
64545  unsigned long __cil_tmp126 ;
64546  unsigned long __cil_tmp127 ;
64547  unsigned long __cil_tmp128 ;
64548  unsigned long __cil_tmp129 ;
64549  struct __anonstruct_items_442 *__cil_tmp130 ;
64550  unsigned long __cil_tmp131 ;
64551  unsigned long __cil_tmp132 ;
64552  unsigned long __cil_tmp133 ;
64553  unsigned long __cil_tmp134 ;
64554  unsigned long __cil_tmp135 ;
64555  unsigned long __cil_tmp136 ;
64556  struct __anonstruct_items_442 *__cil_tmp137 ;
64557  unsigned long __cil_tmp138 ;
64558  unsigned long __cil_tmp139 ;
64559  unsigned long __cil_tmp140 ;
64560  unsigned long __cil_tmp141 ;
64561  unsigned long __cil_tmp142 ;
64562  unsigned long __cil_tmp143 ;
64563  struct __anonstruct_items_442 *__cil_tmp144 ;
64564  unsigned long __cil_tmp145 ;
64565  unsigned long __cil_tmp146 ;
64566  unsigned long __cil_tmp147 ;
64567  unsigned long __cil_tmp148 ;
64568  unsigned long __cil_tmp149 ;
64569  unsigned long __cil_tmp150 ;
64570  struct __anonstruct_items_442 *__cil_tmp151 ;
64571  unsigned long __cil_tmp152 ;
64572  unsigned long __cil_tmp153 ;
64573  SVGAGuestPtr *__cil_tmp154 ;
64574  struct __anonstruct_items_442 *__cil_tmp155 ;
64575  unsigned long __cil_tmp156 ;
64576  unsigned long __cil_tmp157 ;
64577  uint32_t __cil_tmp158 ;
64578  uint32_t __cil_tmp159 ;
64579
64580  {
64581  {
64582#line 102
64583  __cil_tmp15 = (unsigned long )dev_priv;
64584#line 102
64585  __cil_tmp16 = __cil_tmp15 + 2616;
64586#line 102
64587  if (*((struct vmw_screen_object_display **)__cil_tmp16)) {
64588#line 102
64589    tmp___7 = 1;
64590  } else {
64591#line 102
64592    tmp___7 = 0;
64593  }
64594  }
64595#line 102
64596  have_so = (bool )tmp___7;
64597#line 119
64598  if (have_so) {
64599#line 120
64600    num_items = 21;
64601  } else {
64602#line 122
64603    num_items = 19;
64604  }
64605  {
64606#line 124
64607  __cil_tmp17 = (unsigned long )num_items;
64608#line 124
64609  __cil_tmp18 = 8UL * __cil_tmp17;
64610#line 124
64611  __cil_tmp19 = 20UL + 20UL;
64612#line 124
64613  fifo_size = __cil_tmp19 + __cil_tmp18;
64614#line 126
64615  __cil_tmp20 = (uint32_t )fifo_size;
64616#line 126
64617  tmp___8 = vmw_fifo_reserve(dev_priv, __cil_tmp20);
64618#line 126
64619  cmds = (struct __anonstruct_cmds_440 *)tmp___8;
64620  }
64621#line 128
64622  if (! cmds) {
64623#line 129
64624    return (-12);
64625  } else {
64626
64627  }
64628  {
64629#line 131
64630  __cil_tmp21 = cmds + 1;
64631#line 131
64632  items = (struct __anonstruct_items_442 *)__cil_tmp21;
64633#line 132
64634  __cil_tmp22 = items + num_items;
64635#line 132
64636  flush = (struct vmw_escape_video_flush *)__cil_tmp22;
64637#line 135
64638  __cil_tmp23 = (struct vmw_escape_header *)cmds;
64639#line 135
64640  __cil_tmp24 = num_items + 1;
64641#line 135
64642  __cil_tmp25 = (unsigned long )__cil_tmp24;
64643#line 135
64644  __cil_tmp26 = 8UL * __cil_tmp25;
64645#line 135
64646  __cil_tmp27 = (uint32_t )__cil_tmp26;
64647#line 135
64648  fill_escape(__cil_tmp23, __cil_tmp27);
64649#line 137
64650  __cil_tmp28 = (unsigned long )cmds;
64651#line 137
64652  __cil_tmp29 = __cil_tmp28 + 12;
64653#line 137
64654  *((uint32_t *)__cil_tmp29) = (uint32_t )131073;
64655#line 138
64656  __cil_tmp30 = 12 + 4;
64657#line 138
64658  __cil_tmp31 = (unsigned long )cmds;
64659#line 138
64660  __cil_tmp32 = __cil_tmp31 + __cil_tmp30;
64661#line 138
64662  *((uint32_t *)__cil_tmp32) = *((uint32_t *)arg);
64663#line 141
64664  i = 0;
64665  }
64666  {
64667#line 141
64668  while (1) {
64669    while_continue: /* CIL Label */ ;
64670#line 141
64671    if (i < num_items) {
64672
64673    } else {
64674#line 141
64675      goto while_break;
64676    }
64677#line 142
64678    __cil_tmp33 = items + i;
64679#line 142
64680    *((uint32_t *)__cil_tmp33) = (uint32_t )i;
64681#line 141
64682    i = i + 1;
64683  }
64684  while_break: /* CIL Label */ ;
64685  }
64686  {
64687#line 144
64688  __cil_tmp34 = (struct ttm_buffer_object *)buf;
64689#line 144
64690  __cil_tmp35 = (struct ttm_buffer_object    *)__cil_tmp34;
64691#line 144
64692  vmw_bo_get_guest_ptr(__cil_tmp35, & ptr);
64693#line 145
64694  __cil_tmp36 = (unsigned long )(& ptr) + 4;
64695#line 145
64696  __cil_tmp37 = (unsigned long )arg;
64697#line 145
64698  __cil_tmp38 = __cil_tmp37 + 20;
64699#line 145
64700  __cil_tmp39 = *((uint32_t *)__cil_tmp38);
64701#line 145
64702  __cil_tmp40 = (unsigned long )(& ptr) + 4;
64703#line 145
64704  __cil_tmp41 = *((uint32 *)__cil_tmp40);
64705#line 145
64706  *((uint32 *)__cil_tmp36) = __cil_tmp41 + __cil_tmp39;
64707#line 147
64708  __cil_tmp42 = items + 0;
64709#line 147
64710  __cil_tmp43 = (unsigned long )__cil_tmp42;
64711#line 147
64712  __cil_tmp44 = __cil_tmp43 + 4;
64713#line 147
64714  *((uint32_t *)__cil_tmp44) = (uint32_t )1;
64715#line 148
64716  __cil_tmp45 = items + 1;
64717#line 148
64718  __cil_tmp46 = (unsigned long )__cil_tmp45;
64719#line 148
64720  __cil_tmp47 = __cil_tmp46 + 4;
64721#line 148
64722  __cil_tmp48 = (unsigned long )arg;
64723#line 148
64724  __cil_tmp49 = __cil_tmp48 + 8;
64725#line 148
64726  *((uint32_t *)__cil_tmp47) = *((uint32_t *)__cil_tmp49);
64727#line 149
64728  __cil_tmp50 = items + 2;
64729#line 149
64730  __cil_tmp51 = (unsigned long )__cil_tmp50;
64731#line 149
64732  __cil_tmp52 = __cil_tmp51 + 4;
64733#line 149
64734  __cil_tmp53 = (unsigned long )(& ptr) + 4;
64735#line 149
64736  *((uint32_t *)__cil_tmp52) = *((uint32 *)__cil_tmp53);
64737#line 150
64738  __cil_tmp54 = items + 3;
64739#line 150
64740  __cil_tmp55 = (unsigned long )__cil_tmp54;
64741#line 150
64742  __cil_tmp56 = __cil_tmp55 + 4;
64743#line 150
64744  __cil_tmp57 = (unsigned long )arg;
64745#line 150
64746  __cil_tmp58 = __cil_tmp57 + 24;
64747#line 150
64748  __cil_tmp59 = *((int32_t *)__cil_tmp58);
64749#line 150
64750  *((uint32_t *)__cil_tmp56) = (uint32_t )__cil_tmp59;
64751#line 151
64752  __cil_tmp60 = items + 4;
64753#line 151
64754  __cil_tmp61 = (unsigned long )__cil_tmp60;
64755#line 151
64756  __cil_tmp62 = __cil_tmp61 + 4;
64757#line 151
64758  __cil_tmp63 = (unsigned long )arg;
64759#line 151
64760  __cil_tmp64 = __cil_tmp63 + 12;
64761#line 151
64762  *((uint32_t *)__cil_tmp62) = *((uint32_t *)__cil_tmp64);
64763#line 152
64764  __cil_tmp65 = items + 5;
64765#line 152
64766  __cil_tmp66 = (unsigned long )__cil_tmp65;
64767#line 152
64768  __cil_tmp67 = __cil_tmp66 + 4;
64769#line 152
64770  __cil_tmp68 = (unsigned long )arg;
64771#line 152
64772  __cil_tmp69 = __cil_tmp68 + 28;
64773#line 152
64774  *((uint32_t *)__cil_tmp67) = *((uint32_t *)__cil_tmp69);
64775#line 153
64776  __cil_tmp70 = items + 6;
64777#line 153
64778  __cil_tmp71 = (unsigned long )__cil_tmp70;
64779#line 153
64780  __cil_tmp72 = __cil_tmp71 + 4;
64781#line 153
64782  __cil_tmp73 = (unsigned long )arg;
64783#line 153
64784  __cil_tmp74 = __cil_tmp73 + 32;
64785#line 153
64786  *((uint32_t *)__cil_tmp72) = *((uint32_t *)__cil_tmp74);
64787#line 154
64788  __cil_tmp75 = items + 7;
64789#line 154
64790  __cil_tmp76 = (unsigned long )__cil_tmp75;
64791#line 154
64792  __cil_tmp77 = __cil_tmp76 + 4;
64793#line 154
64794  __cil_tmp78 = (unsigned long )arg;
64795#line 154
64796  __cil_tmp79 = __cil_tmp78 + 36;
64797#line 154
64798  *((uint32_t *)__cil_tmp77) = *((uint32_t *)__cil_tmp79);
64799#line 155
64800  __cil_tmp80 = items + 8;
64801#line 155
64802  __cil_tmp81 = (unsigned long )__cil_tmp80;
64803#line 155
64804  __cil_tmp82 = __cil_tmp81 + 4;
64805#line 155
64806  __cil_tmp83 = (unsigned long )arg;
64807#line 155
64808  __cil_tmp84 = __cil_tmp83 + 56;
64809#line 155
64810  __cil_tmp85 = *((int32_t *)__cil_tmp84);
64811#line 155
64812  *((uint32_t *)__cil_tmp82) = (uint32_t )__cil_tmp85;
64813#line 156
64814  __cil_tmp86 = items + 9;
64815#line 156
64816  __cil_tmp87 = (unsigned long )__cil_tmp86;
64817#line 156
64818  __cil_tmp88 = __cil_tmp87 + 4;
64819#line 156
64820  __cil_tmp89 = 56 + 4;
64821#line 156
64822  __cil_tmp90 = (unsigned long )arg;
64823#line 156
64824  __cil_tmp91 = __cil_tmp90 + __cil_tmp89;
64825#line 156
64826  __cil_tmp92 = *((int32_t *)__cil_tmp91);
64827#line 156
64828  *((uint32_t *)__cil_tmp88) = (uint32_t )__cil_tmp92;
64829#line 157
64830  __cil_tmp93 = items + 10;
64831#line 157
64832  __cil_tmp94 = (unsigned long )__cil_tmp93;
64833#line 157
64834  __cil_tmp95 = __cil_tmp94 + 4;
64835#line 157
64836  __cil_tmp96 = 56 + 8;
64837#line 157
64838  __cil_tmp97 = (unsigned long )arg;
64839#line 157
64840  __cil_tmp98 = __cil_tmp97 + __cil_tmp96;
64841#line 157
64842  *((uint32_t *)__cil_tmp95) = *((uint32_t *)__cil_tmp98);
64843#line 158
64844  __cil_tmp99 = items + 11;
64845#line 158
64846  __cil_tmp100 = (unsigned long )__cil_tmp99;
64847#line 158
64848  __cil_tmp101 = __cil_tmp100 + 4;
64849#line 158
64850  __cil_tmp102 = 56 + 12;
64851#line 158
64852  __cil_tmp103 = (unsigned long )arg;
64853#line 158
64854  __cil_tmp104 = __cil_tmp103 + __cil_tmp102;
64855#line 158
64856  *((uint32_t *)__cil_tmp101) = *((uint32_t *)__cil_tmp104);
64857#line 159
64858  __cil_tmp105 = items + 12;
64859#line 159
64860  __cil_tmp106 = (unsigned long )__cil_tmp105;
64861#line 159
64862  __cil_tmp107 = __cil_tmp106 + 4;
64863#line 159
64864  __cil_tmp108 = (unsigned long )arg;
64865#line 159
64866  __cil_tmp109 = __cil_tmp108 + 72;
64867#line 159
64868  __cil_tmp110 = *((int32_t *)__cil_tmp109);
64869#line 159
64870  *((uint32_t *)__cil_tmp107) = (uint32_t )__cil_tmp110;
64871#line 160
64872  __cil_tmp111 = items + 13;
64873#line 160
64874  __cil_tmp112 = (unsigned long )__cil_tmp111;
64875#line 160
64876  __cil_tmp113 = __cil_tmp112 + 4;
64877#line 160
64878  __cil_tmp114 = 72 + 4;
64879#line 160
64880  __cil_tmp115 = (unsigned long )arg;
64881#line 160
64882  __cil_tmp116 = __cil_tmp115 + __cil_tmp114;
64883#line 160
64884  __cil_tmp117 = *((int32_t *)__cil_tmp116);
64885#line 160
64886  *((uint32_t *)__cil_tmp113) = (uint32_t )__cil_tmp117;
64887#line 161
64888  __cil_tmp118 = items + 14;
64889#line 161
64890  __cil_tmp119 = (unsigned long )__cil_tmp118;
64891#line 161
64892  __cil_tmp120 = __cil_tmp119 + 4;
64893#line 161
64894  __cil_tmp121 = 72 + 8;
64895#line 161
64896  __cil_tmp122 = (unsigned long )arg;
64897#line 161
64898  __cil_tmp123 = __cil_tmp122 + __cil_tmp121;
64899#line 161
64900  *((uint32_t *)__cil_tmp120) = *((uint32_t *)__cil_tmp123);
64901#line 162
64902  __cil_tmp124 = items + 15;
64903#line 162
64904  __cil_tmp125 = (unsigned long )__cil_tmp124;
64905#line 162
64906  __cil_tmp126 = __cil_tmp125 + 4;
64907#line 162
64908  __cil_tmp127 = 72 + 12;
64909#line 162
64910  __cil_tmp128 = (unsigned long )arg;
64911#line 162
64912  __cil_tmp129 = __cil_tmp128 + __cil_tmp127;
64913#line 162
64914  *((uint32_t *)__cil_tmp126) = *((uint32_t *)__cil_tmp129);
64915#line 163
64916  __cil_tmp130 = items + 16;
64917#line 163
64918  __cil_tmp131 = (unsigned long )__cil_tmp130;
64919#line 163
64920  __cil_tmp132 = __cil_tmp131 + 4;
64921#line 163
64922  __cil_tmp133 = 0 * 4UL;
64923#line 163
64924  __cil_tmp134 = 40 + __cil_tmp133;
64925#line 163
64926  __cil_tmp135 = (unsigned long )arg;
64927#line 163
64928  __cil_tmp136 = __cil_tmp135 + __cil_tmp134;
64929#line 163
64930  *((uint32_t *)__cil_tmp132) = *((uint32_t *)__cil_tmp136);
64931#line 164
64932  __cil_tmp137 = items + 17;
64933#line 164
64934  __cil_tmp138 = (unsigned long )__cil_tmp137;
64935#line 164
64936  __cil_tmp139 = __cil_tmp138 + 4;
64937#line 164
64938  __cil_tmp140 = 1 * 4UL;
64939#line 164
64940  __cil_tmp141 = 40 + __cil_tmp140;
64941#line 164
64942  __cil_tmp142 = (unsigned long )arg;
64943#line 164
64944  __cil_tmp143 = __cil_tmp142 + __cil_tmp141;
64945#line 164
64946  *((uint32_t *)__cil_tmp139) = *((uint32_t *)__cil_tmp143);
64947#line 165
64948  __cil_tmp144 = items + 18;
64949#line 165
64950  __cil_tmp145 = (unsigned long )__cil_tmp144;
64951#line 165
64952  __cil_tmp146 = __cil_tmp145 + 4;
64953#line 165
64954  __cil_tmp147 = 2 * 4UL;
64955#line 165
64956  __cil_tmp148 = 40 + __cil_tmp147;
64957#line 165
64958  __cil_tmp149 = (unsigned long )arg;
64959#line 165
64960  __cil_tmp150 = __cil_tmp149 + __cil_tmp148;
64961#line 165
64962  *((uint32_t *)__cil_tmp146) = *((uint32_t *)__cil_tmp150);
64963  }
64964#line 166
64965  if (have_so) {
64966#line 167
64967    __cil_tmp151 = items + 19;
64968#line 167
64969    __cil_tmp152 = (unsigned long )__cil_tmp151;
64970#line 167
64971    __cil_tmp153 = __cil_tmp152 + 4;
64972#line 167
64973    __cil_tmp154 = & ptr;
64974#line 167
64975    *((uint32_t *)__cil_tmp153) = *((uint32 *)__cil_tmp154);
64976#line 168
64977    __cil_tmp155 = items + 20;
64978#line 168
64979    __cil_tmp156 = (unsigned long )__cil_tmp155;
64980#line 168
64981    __cil_tmp157 = __cil_tmp156 + 4;
64982#line 168
64983    *((uint32_t *)__cil_tmp157) = 4294967295U;
64984  } else {
64985
64986  }
64987  {
64988#line 171
64989  __cil_tmp158 = *((uint32_t *)arg);
64990#line 171
64991  fill_flush(flush, __cil_tmp158);
64992#line 173
64993  __cil_tmp159 = (uint32_t )fifo_size;
64994#line 173
64995  vmw_fifo_commit(dev_priv, __cil_tmp159);
64996  }
64997#line 175
64998  return (0);
64999}
65000}
65001#line 184 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65002static int vmw_overlay_send_stop(struct vmw_private *dev_priv , uint32_t stream_id ,
65003                                 bool interruptible ) 
65004{ struct __anonstruct_cmds_443 *cmds ;
65005  int ret ;
65006  void *tmp___7 ;
65007  long tmp___8 ;
65008  uint32_t __cil_tmp8 ;
65009  bool __cil_tmp9 ;
65010  bool __cil_tmp10 ;
65011  uint32_t __cil_tmp11 ;
65012  int __cil_tmp12 ;
65013  int __cil_tmp13 ;
65014  int __cil_tmp14 ;
65015  long __cil_tmp15 ;
65016  struct vmw_escape_header *__cil_tmp16 ;
65017  uint32_t __cil_tmp17 ;
65018  unsigned long __cil_tmp18 ;
65019  unsigned long __cil_tmp19 ;
65020  unsigned long __cil_tmp20 ;
65021  unsigned long __cil_tmp21 ;
65022  unsigned long __cil_tmp22 ;
65023  unsigned long __cil_tmp23 ;
65024  unsigned long __cil_tmp24 ;
65025  unsigned long __cil_tmp25 ;
65026  unsigned long __cil_tmp26 ;
65027  unsigned long __cil_tmp27 ;
65028  unsigned long __cil_tmp28 ;
65029  unsigned long __cil_tmp29 ;
65030  unsigned long __cil_tmp30 ;
65031  unsigned long __cil_tmp31 ;
65032  unsigned long __cil_tmp32 ;
65033  unsigned long __cil_tmp33 ;
65034  unsigned long __cil_tmp34 ;
65035  unsigned long __cil_tmp35 ;
65036  unsigned long __cil_tmp36 ;
65037  struct vmw_escape_video_flush *__cil_tmp37 ;
65038  uint32_t __cil_tmp38 ;
65039
65040  {
65041  {
65042#line 195
65043  while (1) {
65044    while_continue: /* CIL Label */ ;
65045    {
65046#line 196
65047    __cil_tmp8 = (uint32_t )48UL;
65048#line 196
65049    tmp___7 = vmw_fifo_reserve(dev_priv, __cil_tmp8);
65050#line 196
65051    cmds = (struct __anonstruct_cmds_443 *)tmp___7;
65052    }
65053#line 197
65054    if (cmds) {
65055#line 198
65056      goto while_break;
65057    } else {
65058
65059    }
65060    {
65061#line 200
65062    __cil_tmp9 = (bool )0;
65063#line 200
65064    __cil_tmp10 = (bool )1;
65065#line 200
65066    __cil_tmp11 = (uint32_t )0;
65067#line 200
65068    ret = vmw_fallback_wait(dev_priv, __cil_tmp9, __cil_tmp10, __cil_tmp11, interruptible,
65069                            750UL);
65070    }
65071#line 202
65072    if (interruptible) {
65073#line 202
65074      if (ret == -512) {
65075#line 203
65076        return (ret);
65077      } else {
65078#line 202
65079        goto _L;
65080      }
65081    } else {
65082      _L: /* CIL Label */ 
65083      {
65084#line 205
65085      while (1) {
65086        while_continue___0: /* CIL Label */ ;
65087        {
65088#line 205
65089        __cil_tmp12 = ret != 0;
65090#line 205
65091        __cil_tmp13 = ! __cil_tmp12;
65092#line 205
65093        __cil_tmp14 = ! __cil_tmp13;
65094#line 205
65095        __cil_tmp15 = (long )__cil_tmp14;
65096#line 205
65097        tmp___8 = __builtin_expect(__cil_tmp15, 0L);
65098        }
65099#line 205
65100        if (tmp___8) {
65101          {
65102#line 205
65103          while (1) {
65104            while_continue___1: /* CIL Label */ ;
65105#line 205
65106            __asm__  volatile   ("1:\tud2\n"
65107                                 ".pushsection __bug_table,\"a\"\n"
65108                                 "2:\t.long 1b - 2b, %c0 - 2b\n"
65109                                 "\t.word %c1, 0\n"
65110                                 "\t.org 2b+%c2\n"
65111                                 ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"),
65112                                 "i" (205), "i" (12UL));
65113            {
65114#line 205
65115            while (1) {
65116              while_continue___2: /* CIL Label */ ;
65117            }
65118            while_break___2: /* CIL Label */ ;
65119            }
65120#line 205
65121            goto while_break___1;
65122          }
65123          while_break___1: /* CIL Label */ ;
65124          }
65125        } else {
65126
65127        }
65128#line 205
65129        goto while_break___0;
65130      }
65131      while_break___0: /* CIL Label */ ;
65132      }
65133    }
65134  }
65135  while_break: /* CIL Label */ ;
65136  }
65137  {
65138#line 208
65139  __cil_tmp16 = (struct vmw_escape_header *)cmds;
65140#line 208
65141  __cil_tmp17 = (uint32_t )16UL;
65142#line 208
65143  fill_escape(__cil_tmp16, __cil_tmp17);
65144#line 209
65145  __cil_tmp18 = (unsigned long )cmds;
65146#line 209
65147  __cil_tmp19 = __cil_tmp18 + 12;
65148#line 209
65149  *((uint32 *)__cil_tmp19) = (uint32 )131073;
65150#line 210
65151  __cil_tmp20 = 0 + 4;
65152#line 210
65153  __cil_tmp21 = 12 + __cil_tmp20;
65154#line 210
65155  __cil_tmp22 = (unsigned long )cmds;
65156#line 210
65157  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
65158#line 210
65159  *((uint32 *)__cil_tmp23) = stream_id;
65160#line 211
65161  __cil_tmp24 = 0 * 8UL;
65162#line 211
65163  __cil_tmp25 = 8 + __cil_tmp24;
65164#line 211
65165  __cil_tmp26 = 12 + __cil_tmp25;
65166#line 211
65167  __cil_tmp27 = (unsigned long )cmds;
65168#line 211
65169  __cil_tmp28 = __cil_tmp27 + __cil_tmp26;
65170#line 211
65171  *((uint32 *)__cil_tmp28) = (uint32 )0;
65172#line 212
65173  __cil_tmp29 = 0 * 8UL;
65174#line 212
65175  __cil_tmp30 = __cil_tmp29 + 4;
65176#line 212
65177  __cil_tmp31 = 8 + __cil_tmp30;
65178#line 212
65179  __cil_tmp32 = 12 + __cil_tmp31;
65180#line 212
65181  __cil_tmp33 = (unsigned long )cmds;
65182#line 212
65183  __cil_tmp34 = __cil_tmp33 + __cil_tmp32;
65184#line 212
65185  *((uint32 *)__cil_tmp34) = (uint32 )0;
65186#line 213
65187  __cil_tmp35 = (unsigned long )cmds;
65188#line 213
65189  __cil_tmp36 = __cil_tmp35 + 28;
65190#line 213
65191  __cil_tmp37 = (struct vmw_escape_video_flush *)__cil_tmp36;
65192#line 213
65193  fill_flush(__cil_tmp37, stream_id);
65194#line 215
65195  __cil_tmp38 = (uint32_t )48UL;
65196#line 215
65197  vmw_fifo_commit(dev_priv, __cil_tmp38);
65198  }
65199#line 217
65200  return (0);
65201}
65202}
65203#line 226 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65204static int vmw_overlay_move_buffer(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
65205                                   bool pin , bool inter ) 
65206{ int tmp___7 ;
65207  int tmp___8 ;
65208  int tmp___9 ;
65209  unsigned long __cil_tmp8 ;
65210  unsigned long __cil_tmp9 ;
65211  struct vmw_screen_object_display *__cil_tmp10 ;
65212  bool __cil_tmp11 ;
65213  bool __cil_tmp12 ;
65214
65215  {
65216#line 230
65217  if (! pin) {
65218    {
65219#line 231
65220    tmp___7 = vmw_dmabuf_unpin(dev_priv, buf, inter);
65221    }
65222#line 231
65223    return (tmp___7);
65224  } else {
65225
65226  }
65227  {
65228#line 233
65229  __cil_tmp8 = (unsigned long )dev_priv;
65230#line 233
65231  __cil_tmp9 = __cil_tmp8 + 2616;
65232#line 233
65233  __cil_tmp10 = *((struct vmw_screen_object_display **)__cil_tmp9);
65234#line 233
65235  if (! __cil_tmp10) {
65236    {
65237#line 234
65238    __cil_tmp11 = (bool )1;
65239#line 234
65240    tmp___8 = vmw_dmabuf_to_vram(dev_priv, buf, __cil_tmp11, inter);
65241    }
65242#line 234
65243    return (tmp___8);
65244  } else {
65245
65246  }
65247  }
65248  {
65249#line 236
65250  __cil_tmp12 = (bool )1;
65251#line 236
65252  tmp___9 = vmw_dmabuf_to_vram_or_gmr(dev_priv, buf, __cil_tmp12, inter);
65253  }
65254#line 236
65255  return (tmp___9);
65256}
65257}
65258#line 251 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65259static int vmw_overlay_stop(struct vmw_private *dev_priv , uint32_t stream_id , bool pause ,
65260                            bool interruptible ) 
65261{ struct vmw_overlay *overlay ;
65262  struct vmw_stream___0 *stream ;
65263  int ret ;
65264  long tmp___7 ;
65265  unsigned long __cil_tmp9 ;
65266  unsigned long __cil_tmp10 ;
65267  unsigned long __cil_tmp11 ;
65268  unsigned long __cil_tmp12 ;
65269  unsigned long __cil_tmp13 ;
65270  unsigned long __cil_tmp14 ;
65271  struct vmw_dma_buffer *__cil_tmp15 ;
65272  unsigned long __cil_tmp16 ;
65273  unsigned long __cil_tmp17 ;
65274  bool __cil_tmp18 ;
65275  struct vmw_dma_buffer *__cil_tmp19 ;
65276  bool __cil_tmp20 ;
65277  int __cil_tmp21 ;
65278  int __cil_tmp22 ;
65279  int __cil_tmp23 ;
65280  long __cil_tmp24 ;
65281  struct vmw_dma_buffer **__cil_tmp25 ;
65282  unsigned long __cil_tmp26 ;
65283  unsigned long __cil_tmp27 ;
65284  unsigned long __cil_tmp28 ;
65285  unsigned long __cil_tmp29 ;
65286
65287  {
65288#line 255
65289  __cil_tmp9 = (unsigned long )dev_priv;
65290#line 255
65291  __cil_tmp10 = __cil_tmp9 + 2624;
65292#line 255
65293  overlay = *((struct vmw_overlay **)__cil_tmp10);
65294#line 256
65295  __cil_tmp11 = stream_id * 104UL;
65296#line 256
65297  __cil_tmp12 = 72 + __cil_tmp11;
65298#line 256
65299  __cil_tmp13 = (unsigned long )overlay;
65300#line 256
65301  __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
65302#line 256
65303  stream = (struct vmw_stream___0 *)__cil_tmp14;
65304  {
65305#line 260
65306  __cil_tmp15 = *((struct vmw_dma_buffer **)stream);
65307#line 260
65308  if (! __cil_tmp15) {
65309#line 261
65310    return (0);
65311  } else {
65312
65313  }
65314  }
65315  {
65316#line 264
65317  __cil_tmp16 = (unsigned long )stream;
65318#line 264
65319  __cil_tmp17 = __cil_tmp16 + 9;
65320#line 264
65321  __cil_tmp18 = *((bool *)__cil_tmp17);
65322#line 264
65323  if (! __cil_tmp18) {
65324    {
65325#line 265
65326    ret = vmw_overlay_send_stop(dev_priv, stream_id, interruptible);
65327    }
65328#line 267
65329    if (ret) {
65330#line 268
65331      return (ret);
65332    } else {
65333
65334    }
65335    {
65336#line 271
65337    __cil_tmp19 = *((struct vmw_dma_buffer **)stream);
65338#line 271
65339    __cil_tmp20 = (bool )0;
65340#line 271
65341    ret = vmw_overlay_move_buffer(dev_priv, __cil_tmp19, __cil_tmp20, interruptible);
65342    }
65343#line 273
65344    if (interruptible) {
65345#line 273
65346      if (ret == -512) {
65347#line 274
65348        return (ret);
65349      } else {
65350#line 273
65351        goto _L;
65352      }
65353    } else {
65354      _L: /* CIL Label */ 
65355      {
65356#line 276
65357      while (1) {
65358        while_continue: /* CIL Label */ ;
65359        {
65360#line 276
65361        __cil_tmp21 = ret != 0;
65362#line 276
65363        __cil_tmp22 = ! __cil_tmp21;
65364#line 276
65365        __cil_tmp23 = ! __cil_tmp22;
65366#line 276
65367        __cil_tmp24 = (long )__cil_tmp23;
65368#line 276
65369        tmp___7 = __builtin_expect(__cil_tmp24, 0L);
65370        }
65371#line 276
65372        if (tmp___7) {
65373          {
65374#line 276
65375          while (1) {
65376            while_continue___0: /* CIL Label */ ;
65377#line 276
65378            __asm__  volatile   ("1:\tud2\n"
65379                                 ".pushsection __bug_table,\"a\"\n"
65380                                 "2:\t.long 1b - 2b, %c0 - 2b\n"
65381                                 "\t.word %c1, 0\n"
65382                                 "\t.org 2b+%c2\n"
65383                                 ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"),
65384                                 "i" (276), "i" (12UL));
65385            {
65386#line 276
65387            while (1) {
65388              while_continue___1: /* CIL Label */ ;
65389            }
65390            while_break___1: /* CIL Label */ ;
65391            }
65392#line 276
65393            goto while_break___0;
65394          }
65395          while_break___0: /* CIL Label */ ;
65396          }
65397        } else {
65398
65399        }
65400#line 276
65401        goto while_break;
65402      }
65403      while_break: /* CIL Label */ ;
65404      }
65405    }
65406  } else {
65407
65408  }
65409  }
65410#line 279
65411  if (! pause) {
65412    {
65413#line 280
65414    __cil_tmp25 = (struct vmw_dma_buffer **)stream;
65415#line 280
65416    vmw_dmabuf_unreference(__cil_tmp25);
65417#line 281
65418    __cil_tmp26 = (unsigned long )stream;
65419#line 281
65420    __cil_tmp27 = __cil_tmp26 + 9;
65421#line 281
65422    *((bool *)__cil_tmp27) = (bool )0;
65423    }
65424  } else {
65425#line 283
65426    __cil_tmp28 = (unsigned long )stream;
65427#line 283
65428    __cil_tmp29 = __cil_tmp28 + 9;
65429#line 283
65430    *((bool *)__cil_tmp29) = (bool )1;
65431  }
65432#line 286
65433  return (0);
65434}
65435}
65436#line 298 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65437static int vmw_overlay_update_stream(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
65438                                     struct drm_vmw_control_stream_arg *arg , bool interruptible ) 
65439{ struct vmw_overlay *overlay ;
65440  struct vmw_stream___0 *stream ;
65441  int ret ;
65442  char    *tmp___7 ;
65443  long tmp___8 ;
65444  int tmp___9 ;
65445  int tmp___10 ;
65446  long tmp___11 ;
65447  unsigned long __cil_tmp13 ;
65448  unsigned long __cil_tmp14 ;
65449  uint32_t __cil_tmp15 ;
65450  unsigned long __cil_tmp16 ;
65451  unsigned long __cil_tmp17 ;
65452  unsigned long __cil_tmp18 ;
65453  unsigned long __cil_tmp19 ;
65454  unsigned long __cil_tmp20 ;
65455  unsigned long __cil_tmp21 ;
65456  struct vmw_dma_buffer *__cil_tmp22 ;
65457  unsigned long __cil_tmp23 ;
65458  struct vmw_dma_buffer *__cil_tmp24 ;
65459  unsigned long __cil_tmp25 ;
65460  uint32_t __cil_tmp26 ;
65461  bool __cil_tmp27 ;
65462  unsigned long __cil_tmp28 ;
65463  unsigned long __cil_tmp29 ;
65464  bool __cil_tmp30 ;
65465  unsigned long __cil_tmp31 ;
65466  unsigned long __cil_tmp32 ;
65467  int __cil_tmp33 ;
65468  int __cil_tmp34 ;
65469  int __cil_tmp35 ;
65470  long __cil_tmp36 ;
65471  bool __cil_tmp37 ;
65472  bool __cil_tmp38 ;
65473  bool __cil_tmp39 ;
65474  long __cil_tmp40 ;
65475  unsigned long __cil_tmp41 ;
65476  struct vmw_dma_buffer *__cil_tmp42 ;
65477  unsigned long __cil_tmp43 ;
65478  unsigned long __cil_tmp44 ;
65479  unsigned long __cil_tmp45 ;
65480  unsigned long __cil_tmp46 ;
65481  unsigned long __cil_tmp47 ;
65482
65483  {
65484#line 303
65485  __cil_tmp13 = (unsigned long )dev_priv;
65486#line 303
65487  __cil_tmp14 = __cil_tmp13 + 2624;
65488#line 303
65489  overlay = *((struct vmw_overlay **)__cil_tmp14);
65490#line 304
65491  __cil_tmp15 = *((uint32_t *)arg);
65492#line 304
65493  __cil_tmp16 = __cil_tmp15 * 104UL;
65494#line 304
65495  __cil_tmp17 = 72 + __cil_tmp16;
65496#line 304
65497  __cil_tmp18 = (unsigned long )overlay;
65498#line 304
65499  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
65500#line 304
65501  stream = (struct vmw_stream___0 *)__cil_tmp19;
65502#line 305
65503  ret = 0;
65504#line 307
65505  if (! buf) {
65506#line 308
65507    return (-22);
65508  } else {
65509
65510  }
65511  {
65512#line 310
65513  while (1) {
65514    while_continue: /* CIL Label */ ;
65515    {
65516#line 310
65517    __cil_tmp20 = (unsigned long )stream;
65518#line 310
65519    __cil_tmp21 = __cil_tmp20 + 9;
65520#line 310
65521    if (*((bool *)__cil_tmp21)) {
65522#line 310
65523      tmp___7 = "";
65524    } else {
65525#line 310
65526      tmp___7 = "not ";
65527    }
65528    }
65529    {
65530#line 310
65531    __cil_tmp22 = *((struct vmw_dma_buffer **)stream);
65532#line 310
65533    drm_ut_debug_printk(1U, "drm", "vmw_overlay_update_stream", "   %s: old %p, new %p, %spaused\n",
65534                        "vmw_overlay_update_stream", __cil_tmp22, buf, tmp___7);
65535    }
65536#line 310
65537    goto while_break;
65538  }
65539  while_break: /* CIL Label */ ;
65540  }
65541  {
65542#line 313
65543  __cil_tmp23 = (unsigned long )buf;
65544#line 313
65545  __cil_tmp24 = *((struct vmw_dma_buffer **)stream);
65546#line 313
65547  __cil_tmp25 = (unsigned long )__cil_tmp24;
65548#line 313
65549  if (__cil_tmp25 != __cil_tmp23) {
65550    {
65551#line 314
65552    __cil_tmp26 = *((uint32_t *)arg);
65553#line 314
65554    __cil_tmp27 = (bool )0;
65555#line 314
65556    ret = vmw_overlay_stop(dev_priv, __cil_tmp26, __cil_tmp27, interruptible);
65557    }
65558#line 316
65559    if (ret) {
65560#line 317
65561      return (ret);
65562    } else {
65563
65564    }
65565  } else {
65566    {
65567#line 318
65568    __cil_tmp28 = (unsigned long )stream;
65569#line 318
65570    __cil_tmp29 = __cil_tmp28 + 9;
65571#line 318
65572    __cil_tmp30 = *((bool *)__cil_tmp29);
65573#line 318
65574    if (! __cil_tmp30) {
65575      {
65576#line 322
65577      ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
65578      }
65579#line 323
65580      if (ret == 0) {
65581#line 324
65582        __cil_tmp31 = (unsigned long )stream;
65583#line 324
65584        __cil_tmp32 = __cil_tmp31 + 12;
65585#line 324
65586        *((struct drm_vmw_control_stream_arg *)__cil_tmp32) = *arg;
65587      } else {
65588        {
65589#line 326
65590        while (1) {
65591          while_continue___0: /* CIL Label */ ;
65592          {
65593#line 326
65594          __cil_tmp33 = ! interruptible;
65595#line 326
65596          __cil_tmp34 = ! __cil_tmp33;
65597#line 326
65598          __cil_tmp35 = ! __cil_tmp34;
65599#line 326
65600          __cil_tmp36 = (long )__cil_tmp35;
65601#line 326
65602          tmp___8 = __builtin_expect(__cil_tmp36, 0L);
65603          }
65604#line 326
65605          if (tmp___8) {
65606            {
65607#line 326
65608            while (1) {
65609              while_continue___1: /* CIL Label */ ;
65610#line 326
65611              __asm__  volatile   ("1:\tud2\n"
65612                                   ".pushsection __bug_table,\"a\"\n"
65613                                   "2:\t.long 1b - 2b, %c0 - 2b\n"
65614                                   "\t.word %c1, 0\n"
65615                                   "\t.org 2b+%c2\n"
65616                                   ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"),
65617                                   "i" (326), "i" (12UL));
65618              {
65619#line 326
65620              while (1) {
65621                while_continue___2: /* CIL Label */ ;
65622              }
65623              while_break___2: /* CIL Label */ ;
65624              }
65625#line 326
65626              goto while_break___1;
65627            }
65628            while_break___1: /* CIL Label */ ;
65629            }
65630          } else {
65631
65632          }
65633#line 326
65634          goto while_break___0;
65635        }
65636        while_break___0: /* CIL Label */ ;
65637        }
65638      }
65639#line 328
65640      return (ret);
65641    } else {
65642
65643    }
65644    }
65645  }
65646  }
65647  {
65648#line 334
65649  __cil_tmp37 = (bool )1;
65650#line 334
65651  ret = vmw_overlay_move_buffer(dev_priv, buf, __cil_tmp37, interruptible);
65652  }
65653#line 335
65654  if (ret) {
65655#line 336
65656    return (ret);
65657  } else {
65658
65659  }
65660  {
65661#line 338
65662  ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
65663  }
65664#line 339
65665  if (ret) {
65666    {
65667#line 343
65668    while (1) {
65669      while_continue___3: /* CIL Label */ ;
65670      {
65671#line 343
65672      __cil_tmp38 = (bool )0;
65673#line 343
65674      __cil_tmp39 = (bool )0;
65675#line 343
65676      tmp___9 = vmw_overlay_move_buffer(dev_priv, buf, __cil_tmp38, __cil_tmp39);
65677      }
65678#line 343
65679      if (tmp___9 != 0) {
65680#line 343
65681        tmp___10 = 1;
65682      } else {
65683#line 343
65684        tmp___10 = 0;
65685      }
65686      {
65687#line 343
65688      __cil_tmp40 = (long )tmp___10;
65689#line 343
65690      tmp___11 = __builtin_expect(__cil_tmp40, 0L);
65691      }
65692#line 343
65693      if (tmp___11) {
65694        {
65695#line 343
65696        while (1) {
65697          while_continue___4: /* CIL Label */ ;
65698#line 343
65699          __asm__  volatile   ("1:\tud2\n"
65700                               ".pushsection __bug_table,\"a\"\n"
65701                               "2:\t.long 1b - 2b, %c0 - 2b\n"
65702                               "\t.word %c1, 0\n"
65703                               "\t.org 2b+%c2\n"
65704                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"),
65705                               "i" (344), "i" (12UL));
65706          {
65707#line 343
65708          while (1) {
65709            while_continue___5: /* CIL Label */ ;
65710          }
65711          while_break___5: /* CIL Label */ ;
65712          }
65713#line 343
65714          goto while_break___4;
65715        }
65716        while_break___4: /* CIL Label */ ;
65717        }
65718      } else {
65719
65720      }
65721#line 343
65722      goto while_break___3;
65723    }
65724    while_break___3: /* CIL Label */ ;
65725    }
65726#line 345
65727    return (ret);
65728  } else {
65729
65730  }
65731  {
65732#line 348
65733  __cil_tmp41 = (unsigned long )buf;
65734#line 348
65735  __cil_tmp42 = *((struct vmw_dma_buffer **)stream);
65736#line 348
65737  __cil_tmp43 = (unsigned long )__cil_tmp42;
65738#line 348
65739  if (__cil_tmp43 != __cil_tmp41) {
65740    {
65741#line 349
65742    *((struct vmw_dma_buffer **)stream) = vmw_dmabuf_reference(buf);
65743    }
65744  } else {
65745
65746  }
65747  }
65748#line 350
65749  __cil_tmp44 = (unsigned long )stream;
65750#line 350
65751  __cil_tmp45 = __cil_tmp44 + 12;
65752#line 350
65753  *((struct drm_vmw_control_stream_arg *)__cil_tmp45) = *arg;
65754#line 352
65755  __cil_tmp46 = (unsigned long )stream;
65756#line 352
65757  __cil_tmp47 = __cil_tmp46 + 9;
65758#line 352
65759  *((bool *)__cil_tmp47) = (bool )0;
65760#line 354
65761  return (0);
65762}
65763}
65764#line 364 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65765int vmw_overlay_stop_all(struct vmw_private *dev_priv ) 
65766{ struct vmw_overlay *overlay ;
65767  int i ;
65768  int ret ;
65769  struct vmw_stream___0 *stream ;
65770  int __ret_warn_on ;
65771  long tmp___7 ;
65772  unsigned long __cil_tmp8 ;
65773  unsigned long __cil_tmp9 ;
65774  struct mutex *__cil_tmp10 ;
65775  unsigned long __cil_tmp11 ;
65776  unsigned long __cil_tmp12 ;
65777  unsigned long __cil_tmp13 ;
65778  unsigned long __cil_tmp14 ;
65779  struct vmw_dma_buffer *__cil_tmp15 ;
65780  uint32_t __cil_tmp16 ;
65781  bool __cil_tmp17 ;
65782  bool __cil_tmp18 ;
65783  int __cil_tmp19 ;
65784  int __cil_tmp20 ;
65785  int __cil_tmp21 ;
65786  int __cil_tmp22 ;
65787  long __cil_tmp23 ;
65788  int    __cil_tmp24 ;
65789  int __cil_tmp25 ;
65790  int __cil_tmp26 ;
65791  long __cil_tmp27 ;
65792  struct mutex *__cil_tmp28 ;
65793
65794  {
65795#line 366
65796  __cil_tmp8 = (unsigned long )dev_priv;
65797#line 366
65798  __cil_tmp9 = __cil_tmp8 + 2624;
65799#line 366
65800  overlay = *((struct vmw_overlay **)__cil_tmp9);
65801#line 369
65802  if (! overlay) {
65803#line 370
65804    return (0);
65805  } else {
65806
65807  }
65808  {
65809#line 372
65810  __cil_tmp10 = (struct mutex *)overlay;
65811#line 372
65812  mutex_lock(__cil_tmp10);
65813#line 374
65814  i = 0;
65815  }
65816  {
65817#line 374
65818  while (1) {
65819    while_continue: /* CIL Label */ ;
65820#line 374
65821    if (i < 1) {
65822
65823    } else {
65824#line 374
65825      goto while_break;
65826    }
65827#line 375
65828    __cil_tmp11 = i * 104UL;
65829#line 375
65830    __cil_tmp12 = 72 + __cil_tmp11;
65831#line 375
65832    __cil_tmp13 = (unsigned long )overlay;
65833#line 375
65834    __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
65835#line 375
65836    stream = (struct vmw_stream___0 *)__cil_tmp14;
65837    {
65838#line 376
65839    __cil_tmp15 = *((struct vmw_dma_buffer **)stream);
65840#line 376
65841    if (! __cil_tmp15) {
65842#line 377
65843      goto __Cont;
65844    } else {
65845
65846    }
65847    }
65848    {
65849#line 379
65850    __cil_tmp16 = (uint32_t )i;
65851#line 379
65852    __cil_tmp17 = (bool )0;
65853#line 379
65854    __cil_tmp18 = (bool )0;
65855#line 379
65856    ret = vmw_overlay_stop(dev_priv, __cil_tmp16, __cil_tmp17, __cil_tmp18);
65857#line 380
65858    __cil_tmp19 = ret != 0;
65859#line 380
65860    __cil_tmp20 = ! __cil_tmp19;
65861#line 380
65862    __ret_warn_on = ! __cil_tmp20;
65863#line 380
65864    __cil_tmp21 = ! __ret_warn_on;
65865#line 380
65866    __cil_tmp22 = ! __cil_tmp21;
65867#line 380
65868    __cil_tmp23 = (long )__cil_tmp22;
65869#line 380
65870    tmp___7 = __builtin_expect(__cil_tmp23, 0L);
65871    }
65872#line 380
65873    if (tmp___7) {
65874      {
65875#line 380
65876      __cil_tmp24 = (int    )380;
65877#line 380
65878      warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c",
65879                         __cil_tmp24);
65880      }
65881    } else {
65882
65883    }
65884    {
65885#line 380
65886    __cil_tmp25 = ! __ret_warn_on;
65887#line 380
65888    __cil_tmp26 = ! __cil_tmp25;
65889#line 380
65890    __cil_tmp27 = (long )__cil_tmp26;
65891#line 380
65892    __builtin_expect(__cil_tmp27, 0L);
65893    }
65894    __Cont: /* CIL Label */ 
65895#line 374
65896    i = i + 1;
65897  }
65898  while_break: /* CIL Label */ ;
65899  }
65900  {
65901#line 383
65902  __cil_tmp28 = (struct mutex *)overlay;
65903#line 383
65904  mutex_unlock(__cil_tmp28);
65905  }
65906#line 385
65907  return (0);
65908}
65909}
65910#line 395 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
65911int vmw_overlay_resume_all(struct vmw_private *dev_priv ) 
65912{ struct vmw_overlay *overlay ;
65913  int i ;
65914  int ret ;
65915  struct vmw_stream___0 *stream ;
65916  unsigned long __cil_tmp6 ;
65917  unsigned long __cil_tmp7 ;
65918  struct mutex *__cil_tmp8 ;
65919  unsigned long __cil_tmp9 ;
65920  unsigned long __cil_tmp10 ;
65921  unsigned long __cil_tmp11 ;
65922  unsigned long __cil_tmp12 ;
65923  unsigned long __cil_tmp13 ;
65924  unsigned long __cil_tmp14 ;
65925  bool __cil_tmp15 ;
65926  struct vmw_dma_buffer *__cil_tmp16 ;
65927  unsigned long __cil_tmp17 ;
65928  unsigned long __cil_tmp18 ;
65929  struct drm_vmw_control_stream_arg *__cil_tmp19 ;
65930  bool __cil_tmp20 ;
65931  struct mutex *__cil_tmp21 ;
65932
65933  {
65934#line 397
65935  __cil_tmp6 = (unsigned long )dev_priv;
65936#line 397
65937  __cil_tmp7 = __cil_tmp6 + 2624;
65938#line 397
65939  overlay = *((struct vmw_overlay **)__cil_tmp7);
65940#line 400
65941  if (! overlay) {
65942#line 401
65943    return (0);
65944  } else {
65945
65946  }
65947  {
65948#line 403
65949  __cil_tmp8 = (struct mutex *)overlay;
65950#line 403
65951  mutex_lock(__cil_tmp8);
65952#line 405
65953  i = 0;
65954  }
65955  {
65956#line 405
65957  while (1) {
65958    while_continue: /* CIL Label */ ;
65959#line 405
65960    if (i < 1) {
65961
65962    } else {
65963#line 405
65964      goto while_break;
65965    }
65966#line 406
65967    __cil_tmp9 = i * 104UL;
65968#line 406
65969    __cil_tmp10 = 72 + __cil_tmp9;
65970#line 406
65971    __cil_tmp11 = (unsigned long )overlay;
65972#line 406
65973    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
65974#line 406
65975    stream = (struct vmw_stream___0 *)__cil_tmp12;
65976    {
65977#line 407
65978    __cil_tmp13 = (unsigned long )stream;
65979#line 407
65980    __cil_tmp14 = __cil_tmp13 + 9;
65981#line 407
65982    __cil_tmp15 = *((bool *)__cil_tmp14);
65983#line 407
65984    if (! __cil_tmp15) {
65985#line 408
65986      goto __Cont;
65987    } else {
65988
65989    }
65990    }
65991    {
65992#line 410
65993    __cil_tmp16 = *((struct vmw_dma_buffer **)stream);
65994#line 410
65995    __cil_tmp17 = (unsigned long )stream;
65996#line 410
65997    __cil_tmp18 = __cil_tmp17 + 12;
65998#line 410
65999    __cil_tmp19 = (struct drm_vmw_control_stream_arg *)__cil_tmp18;
66000#line 410
66001    __cil_tmp20 = (bool )0;
66002#line 410
66003    ret = vmw_overlay_update_stream(dev_priv, __cil_tmp16, __cil_tmp19, __cil_tmp20);
66004    }
66005#line 412
66006    if (ret != 0) {
66007      {
66008#line 413
66009      printk("<6>[drm] %s: *warning* failed to resume stream %i\n", "vmw_overlay_resume_all",
66010             i);
66011      }
66012    } else {
66013
66014    }
66015    __Cont: /* CIL Label */ 
66016#line 405
66017    i = i + 1;
66018  }
66019  while_break: /* CIL Label */ ;
66020  }
66021  {
66022#line 417
66023  __cil_tmp21 = (struct mutex *)overlay;
66024#line 417
66025  mutex_unlock(__cil_tmp21);
66026  }
66027#line 419
66028  return (0);
66029}
66030}
66031#line 429 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66032int vmw_overlay_pause_all(struct vmw_private *dev_priv ) 
66033{ struct vmw_overlay *overlay ;
66034  int i ;
66035  int ret ;
66036  int __ret_warn_on ;
66037  long tmp___7 ;
66038  unsigned long __cil_tmp7 ;
66039  unsigned long __cil_tmp8 ;
66040  struct mutex *__cil_tmp9 ;
66041  unsigned long __cil_tmp10 ;
66042  unsigned long __cil_tmp11 ;
66043  unsigned long __cil_tmp12 ;
66044  unsigned long __cil_tmp13 ;
66045  unsigned long __cil_tmp14 ;
66046  uint32_t __cil_tmp15 ;
66047  bool __cil_tmp16 ;
66048  bool __cil_tmp17 ;
66049  int __cil_tmp18 ;
66050  int __cil_tmp19 ;
66051  int __cil_tmp20 ;
66052  int __cil_tmp21 ;
66053  long __cil_tmp22 ;
66054  int    __cil_tmp23 ;
66055  int __cil_tmp24 ;
66056  int __cil_tmp25 ;
66057  long __cil_tmp26 ;
66058  struct mutex *__cil_tmp27 ;
66059
66060  {
66061#line 431
66062  __cil_tmp7 = (unsigned long )dev_priv;
66063#line 431
66064  __cil_tmp8 = __cil_tmp7 + 2624;
66065#line 431
66066  overlay = *((struct vmw_overlay **)__cil_tmp8);
66067#line 434
66068  if (! overlay) {
66069#line 435
66070    return (0);
66071  } else {
66072
66073  }
66074  {
66075#line 437
66076  __cil_tmp9 = (struct mutex *)overlay;
66077#line 437
66078  mutex_lock(__cil_tmp9);
66079#line 439
66080  i = 0;
66081  }
66082  {
66083#line 439
66084  while (1) {
66085    while_continue: /* CIL Label */ ;
66086#line 439
66087    if (i < 1) {
66088
66089    } else {
66090#line 439
66091      goto while_break;
66092    }
66093    {
66094#line 440
66095    __cil_tmp10 = i * 104UL;
66096#line 440
66097    __cil_tmp11 = __cil_tmp10 + 9;
66098#line 440
66099    __cil_tmp12 = 72 + __cil_tmp11;
66100#line 440
66101    __cil_tmp13 = (unsigned long )overlay;
66102#line 440
66103    __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
66104#line 440
66105    if (*((bool *)__cil_tmp14)) {
66106      {
66107#line 441
66108      printk("<6>[drm] %s: *warning* stream %i already paused\n", "vmw_overlay_pause_all",
66109             i);
66110      }
66111    } else {
66112
66113    }
66114    }
66115    {
66116#line 443
66117    __cil_tmp15 = (uint32_t )i;
66118#line 443
66119    __cil_tmp16 = (bool )1;
66120#line 443
66121    __cil_tmp17 = (bool )0;
66122#line 443
66123    ret = vmw_overlay_stop(dev_priv, __cil_tmp15, __cil_tmp16, __cil_tmp17);
66124#line 444
66125    __cil_tmp18 = ret != 0;
66126#line 444
66127    __cil_tmp19 = ! __cil_tmp18;
66128#line 444
66129    __ret_warn_on = ! __cil_tmp19;
66130#line 444
66131    __cil_tmp20 = ! __ret_warn_on;
66132#line 444
66133    __cil_tmp21 = ! __cil_tmp20;
66134#line 444
66135    __cil_tmp22 = (long )__cil_tmp21;
66136#line 444
66137    tmp___7 = __builtin_expect(__cil_tmp22, 0L);
66138    }
66139#line 444
66140    if (tmp___7) {
66141      {
66142#line 444
66143      __cil_tmp23 = (int    )444;
66144#line 444
66145      warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c",
66146                         __cil_tmp23);
66147      }
66148    } else {
66149
66150    }
66151    {
66152#line 444
66153    __cil_tmp24 = ! __ret_warn_on;
66154#line 444
66155    __cil_tmp25 = ! __cil_tmp24;
66156#line 444
66157    __cil_tmp26 = (long )__cil_tmp25;
66158#line 444
66159    __builtin_expect(__cil_tmp26, 0L);
66160#line 439
66161    i = i + 1;
66162    }
66163  }
66164  while_break: /* CIL Label */ ;
66165  }
66166  {
66167#line 447
66168  __cil_tmp27 = (struct mutex *)overlay;
66169#line 447
66170  mutex_unlock(__cil_tmp27);
66171  }
66172#line 449
66173  return (0);
66174}
66175}
66176#line 452 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66177int vmw_overlay_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
66178{ struct ttm_object_file *tfile ;
66179  struct vmw_fpriv *tmp___7 ;
66180  struct vmw_private *dev_priv ;
66181  struct vmw_private *tmp___8 ;
66182  struct vmw_overlay *overlay ;
66183  struct drm_vmw_control_stream_arg *arg ;
66184  struct vmw_dma_buffer *buf ;
66185  struct vmw_resource *res ;
66186  int ret ;
66187  unsigned long __cil_tmp13 ;
66188  unsigned long __cil_tmp14 ;
66189  unsigned long __cil_tmp15 ;
66190  unsigned long __cil_tmp16 ;
66191  uint32_t *__cil_tmp17 ;
66192  struct mutex *__cil_tmp18 ;
66193  unsigned long __cil_tmp19 ;
66194  unsigned long __cil_tmp20 ;
66195  uint32_t __cil_tmp21 ;
66196  uint32_t __cil_tmp22 ;
66197  bool __cil_tmp23 ;
66198  bool __cil_tmp24 ;
66199  unsigned long __cil_tmp25 ;
66200  unsigned long __cil_tmp26 ;
66201  uint32_t __cil_tmp27 ;
66202  struct vmw_dma_buffer **__cil_tmp28 ;
66203  struct vmw_dma_buffer *__cil_tmp29 ;
66204  bool __cil_tmp30 ;
66205  struct mutex *__cil_tmp31 ;
66206
66207  {
66208  {
66209#line 455
66210  tmp___7 = vmw_fpriv(file_priv);
66211#line 455
66212  __cil_tmp13 = (unsigned long )tmp___7;
66213#line 455
66214  __cil_tmp14 = __cil_tmp13 + 8;
66215#line 455
66216  tfile = *((struct ttm_object_file **)__cil_tmp14);
66217#line 456
66218  tmp___8 = vmw_priv(dev);
66219#line 456
66220  dev_priv = tmp___8;
66221#line 457
66222  __cil_tmp15 = (unsigned long )dev_priv;
66223#line 457
66224  __cil_tmp16 = __cil_tmp15 + 2624;
66225#line 457
66226  overlay = *((struct vmw_overlay **)__cil_tmp16);
66227#line 458
66228  arg = (struct drm_vmw_control_stream_arg *)data;
66229  }
66230#line 464
66231  if (! overlay) {
66232#line 465
66233    return (-38);
66234  } else {
66235
66236  }
66237  {
66238#line 467
66239  __cil_tmp17 = (uint32_t *)arg;
66240#line 467
66241  ret = vmw_user_stream_lookup(dev_priv, tfile, __cil_tmp17, & res);
66242  }
66243#line 468
66244  if (ret) {
66245#line 469
66246    return (ret);
66247  } else {
66248
66249  }
66250  {
66251#line 471
66252  __cil_tmp18 = (struct mutex *)overlay;
66253#line 471
66254  mutex_lock(__cil_tmp18);
66255  }
66256  {
66257#line 473
66258  __cil_tmp19 = (unsigned long )arg;
66259#line 473
66260  __cil_tmp20 = __cil_tmp19 + 4;
66261#line 473
66262  __cil_tmp21 = *((uint32_t *)__cil_tmp20);
66263#line 473
66264  if (! __cil_tmp21) {
66265    {
66266#line 474
66267    __cil_tmp22 = *((uint32_t *)arg);
66268#line 474
66269    __cil_tmp23 = (bool )0;
66270#line 474
66271    __cil_tmp24 = (bool )1;
66272#line 474
66273    ret = vmw_overlay_stop(dev_priv, __cil_tmp22, __cil_tmp23, __cil_tmp24);
66274    }
66275#line 475
66276    goto out_unlock;
66277  } else {
66278
66279  }
66280  }
66281  {
66282#line 478
66283  __cil_tmp25 = (unsigned long )arg;
66284#line 478
66285  __cil_tmp26 = __cil_tmp25 + 16;
66286#line 478
66287  __cil_tmp27 = *((uint32_t *)__cil_tmp26);
66288#line 478
66289  ret = vmw_user_dmabuf_lookup(tfile, __cil_tmp27, & buf);
66290  }
66291#line 479
66292  if (ret) {
66293#line 480
66294    goto out_unlock;
66295  } else {
66296
66297  }
66298  {
66299#line 482
66300  __cil_tmp28 = & buf;
66301#line 482
66302  __cil_tmp29 = *__cil_tmp28;
66303#line 482
66304  __cil_tmp30 = (bool )1;
66305#line 482
66306  ret = vmw_overlay_update_stream(dev_priv, __cil_tmp29, arg, __cil_tmp30);
66307#line 484
66308  vmw_dmabuf_unreference(& buf);
66309  }
66310  out_unlock: 
66311  {
66312#line 487
66313  __cil_tmp31 = (struct mutex *)overlay;
66314#line 487
66315  mutex_unlock(__cil_tmp31);
66316#line 488
66317  vmw_resource_unreference(& res);
66318  }
66319#line 490
66320  return (ret);
66321}
66322}
66323#line 493 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66324int vmw_overlay_num_overlays(struct vmw_private *dev_priv ) 
66325{ unsigned long __cil_tmp2 ;
66326  unsigned long __cil_tmp3 ;
66327  struct vmw_overlay *__cil_tmp4 ;
66328
66329  {
66330  {
66331#line 495
66332  __cil_tmp2 = (unsigned long )dev_priv;
66333#line 495
66334  __cil_tmp3 = __cil_tmp2 + 2624;
66335#line 495
66336  __cil_tmp4 = *((struct vmw_overlay **)__cil_tmp3);
66337#line 495
66338  if (! __cil_tmp4) {
66339#line 496
66340    return (0);
66341  } else {
66342
66343  }
66344  }
66345#line 498
66346  return (1);
66347}
66348}
66349#line 501 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66350int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv ) 
66351{ struct vmw_overlay *overlay ;
66352  int i ;
66353  int k ;
66354  unsigned long __cil_tmp5 ;
66355  unsigned long __cil_tmp6 ;
66356  struct mutex *__cil_tmp7 ;
66357  unsigned long __cil_tmp8 ;
66358  unsigned long __cil_tmp9 ;
66359  unsigned long __cil_tmp10 ;
66360  unsigned long __cil_tmp11 ;
66361  unsigned long __cil_tmp12 ;
66362  bool __cil_tmp13 ;
66363  struct mutex *__cil_tmp14 ;
66364
66365  {
66366#line 503
66367  __cil_tmp5 = (unsigned long )dev_priv;
66368#line 503
66369  __cil_tmp6 = __cil_tmp5 + 2624;
66370#line 503
66371  overlay = *((struct vmw_overlay **)__cil_tmp6);
66372#line 506
66373  if (! overlay) {
66374#line 507
66375    return (0);
66376  } else {
66377
66378  }
66379  {
66380#line 509
66381  __cil_tmp7 = (struct mutex *)overlay;
66382#line 509
66383  mutex_lock(__cil_tmp7);
66384#line 511
66385  i = 0;
66386#line 511
66387  k = 0;
66388  }
66389  {
66390#line 511
66391  while (1) {
66392    while_continue: /* CIL Label */ ;
66393#line 511
66394    if (i < 1) {
66395
66396    } else {
66397#line 511
66398      goto while_break;
66399    }
66400    {
66401#line 512
66402    __cil_tmp8 = i * 104UL;
66403#line 512
66404    __cil_tmp9 = __cil_tmp8 + 8;
66405#line 512
66406    __cil_tmp10 = 72 + __cil_tmp9;
66407#line 512
66408    __cil_tmp11 = (unsigned long )overlay;
66409#line 512
66410    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
66411#line 512
66412    __cil_tmp13 = *((bool *)__cil_tmp12);
66413#line 512
66414    if (! __cil_tmp13) {
66415#line 513
66416      k = k + 1;
66417    } else {
66418
66419    }
66420    }
66421#line 511
66422    i = i + 1;
66423  }
66424  while_break: /* CIL Label */ ;
66425  }
66426  {
66427#line 515
66428  __cil_tmp14 = (struct mutex *)overlay;
66429#line 515
66430  mutex_unlock(__cil_tmp14);
66431  }
66432#line 517
66433  return (k);
66434}
66435}
66436#line 520 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66437int vmw_overlay_claim(struct vmw_private *dev_priv , uint32_t *out ) 
66438{ struct vmw_overlay *overlay ;
66439  int i ;
66440  unsigned long __cil_tmp5 ;
66441  unsigned long __cil_tmp6 ;
66442  struct mutex *__cil_tmp7 ;
66443  unsigned long __cil_tmp8 ;
66444  unsigned long __cil_tmp9 ;
66445  unsigned long __cil_tmp10 ;
66446  unsigned long __cil_tmp11 ;
66447  unsigned long __cil_tmp12 ;
66448  unsigned long __cil_tmp13 ;
66449  unsigned long __cil_tmp14 ;
66450  unsigned long __cil_tmp15 ;
66451  unsigned long __cil_tmp16 ;
66452  unsigned long __cil_tmp17 ;
66453  struct mutex *__cil_tmp18 ;
66454  struct mutex *__cil_tmp19 ;
66455
66456  {
66457#line 522
66458  __cil_tmp5 = (unsigned long )dev_priv;
66459#line 522
66460  __cil_tmp6 = __cil_tmp5 + 2624;
66461#line 522
66462  overlay = *((struct vmw_overlay **)__cil_tmp6);
66463#line 525
66464  if (! overlay) {
66465#line 526
66466    return (-38);
66467  } else {
66468
66469  }
66470  {
66471#line 528
66472  __cil_tmp7 = (struct mutex *)overlay;
66473#line 528
66474  mutex_lock(__cil_tmp7);
66475#line 530
66476  i = 0;
66477  }
66478  {
66479#line 530
66480  while (1) {
66481    while_continue: /* CIL Label */ ;
66482#line 530
66483    if (i < 1) {
66484
66485    } else {
66486#line 530
66487      goto while_break;
66488    }
66489    {
66490#line 532
66491    __cil_tmp8 = i * 104UL;
66492#line 532
66493    __cil_tmp9 = __cil_tmp8 + 8;
66494#line 532
66495    __cil_tmp10 = 72 + __cil_tmp9;
66496#line 532
66497    __cil_tmp11 = (unsigned long )overlay;
66498#line 532
66499    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
66500#line 532
66501    if (*((bool *)__cil_tmp12)) {
66502#line 533
66503      goto __Cont;
66504    } else {
66505
66506    }
66507    }
66508    {
66509#line 535
66510    __cil_tmp13 = i * 104UL;
66511#line 535
66512    __cil_tmp14 = __cil_tmp13 + 8;
66513#line 535
66514    __cil_tmp15 = 72 + __cil_tmp14;
66515#line 535
66516    __cil_tmp16 = (unsigned long )overlay;
66517#line 535
66518    __cil_tmp17 = __cil_tmp16 + __cil_tmp15;
66519#line 535
66520    *((bool *)__cil_tmp17) = (bool )1;
66521#line 536
66522    *out = (uint32_t )i;
66523#line 537
66524    __cil_tmp18 = (struct mutex *)overlay;
66525#line 537
66526    mutex_unlock(__cil_tmp18);
66527    }
66528#line 538
66529    return (0);
66530    __Cont: /* CIL Label */ 
66531#line 530
66532    i = i + 1;
66533  }
66534  while_break: /* CIL Label */ ;
66535  }
66536  {
66537#line 541
66538  __cil_tmp19 = (struct mutex *)overlay;
66539#line 541
66540  mutex_unlock(__cil_tmp19);
66541  }
66542#line 542
66543  return (-3);
66544}
66545}
66546#line 545 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66547int vmw_overlay_unref(struct vmw_private *dev_priv , uint32_t stream_id ) 
66548{ struct vmw_overlay *overlay ;
66549  long tmp___7 ;
66550  int __ret_warn_on ;
66551  long tmp___8 ;
66552  unsigned long __cil_tmp7 ;
66553  unsigned long __cil_tmp8 ;
66554  int __cil_tmp9 ;
66555  int __cil_tmp10 ;
66556  int __cil_tmp11 ;
66557  long __cil_tmp12 ;
66558  struct mutex *__cil_tmp13 ;
66559  unsigned long __cil_tmp14 ;
66560  unsigned long __cil_tmp15 ;
66561  unsigned long __cil_tmp16 ;
66562  unsigned long __cil_tmp17 ;
66563  unsigned long __cil_tmp18 ;
66564  bool __cil_tmp19 ;
66565  int __cil_tmp20 ;
66566  int __cil_tmp21 ;
66567  int __cil_tmp22 ;
66568  int __cil_tmp23 ;
66569  long __cil_tmp24 ;
66570  int    __cil_tmp25 ;
66571  int __cil_tmp26 ;
66572  int __cil_tmp27 ;
66573  long __cil_tmp28 ;
66574  bool __cil_tmp29 ;
66575  bool __cil_tmp30 ;
66576  unsigned long __cil_tmp31 ;
66577  unsigned long __cil_tmp32 ;
66578  unsigned long __cil_tmp33 ;
66579  unsigned long __cil_tmp34 ;
66580  unsigned long __cil_tmp35 ;
66581  struct mutex *__cil_tmp36 ;
66582
66583  {
66584#line 547
66585  __cil_tmp7 = (unsigned long )dev_priv;
66586#line 547
66587  __cil_tmp8 = __cil_tmp7 + 2624;
66588#line 547
66589  overlay = *((struct vmw_overlay **)__cil_tmp8);
66590  {
66591#line 549
66592  while (1) {
66593    while_continue: /* CIL Label */ ;
66594    {
66595#line 549
66596    __cil_tmp9 = stream_id >= 1U;
66597#line 549
66598    __cil_tmp10 = ! __cil_tmp9;
66599#line 549
66600    __cil_tmp11 = ! __cil_tmp10;
66601#line 549
66602    __cil_tmp12 = (long )__cil_tmp11;
66603#line 549
66604    tmp___7 = __builtin_expect(__cil_tmp12, 0L);
66605    }
66606#line 549
66607    if (tmp___7) {
66608      {
66609#line 549
66610      while (1) {
66611        while_continue___0: /* CIL Label */ ;
66612#line 549
66613        __asm__  volatile   ("1:\tud2\n"
66614                             ".pushsection __bug_table,\"a\"\n"
66615                             "2:\t.long 1b - 2b, %c0 - 2b\n"
66616                             "\t.word %c1, 0\n"
66617                             "\t.org 2b+%c2\n"
66618                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"),
66619                             "i" (549), "i" (12UL));
66620        {
66621#line 549
66622        while (1) {
66623          while_continue___1: /* CIL Label */ ;
66624        }
66625        while_break___1: /* CIL Label */ ;
66626        }
66627#line 549
66628        goto while_break___0;
66629      }
66630      while_break___0: /* CIL Label */ ;
66631      }
66632    } else {
66633
66634    }
66635#line 549
66636    goto while_break;
66637  }
66638  while_break: /* CIL Label */ ;
66639  }
66640#line 551
66641  if (! overlay) {
66642#line 552
66643    return (-38);
66644  } else {
66645
66646  }
66647  {
66648#line 554
66649  __cil_tmp13 = (struct mutex *)overlay;
66650#line 554
66651  mutex_lock(__cil_tmp13);
66652#line 556
66653  __cil_tmp14 = stream_id * 104UL;
66654#line 556
66655  __cil_tmp15 = __cil_tmp14 + 8;
66656#line 556
66657  __cil_tmp16 = 72 + __cil_tmp15;
66658#line 556
66659  __cil_tmp17 = (unsigned long )overlay;
66660#line 556
66661  __cil_tmp18 = __cil_tmp17 + __cil_tmp16;
66662#line 556
66663  __cil_tmp19 = *((bool *)__cil_tmp18);
66664#line 556
66665  __cil_tmp20 = ! __cil_tmp19;
66666#line 556
66667  __cil_tmp21 = ! __cil_tmp20;
66668#line 556
66669  __ret_warn_on = ! __cil_tmp21;
66670#line 556
66671  __cil_tmp22 = ! __ret_warn_on;
66672#line 556
66673  __cil_tmp23 = ! __cil_tmp22;
66674#line 556
66675  __cil_tmp24 = (long )__cil_tmp23;
66676#line 556
66677  tmp___8 = __builtin_expect(__cil_tmp24, 0L);
66678  }
66679#line 556
66680  if (tmp___8) {
66681    {
66682#line 556
66683    __cil_tmp25 = (int    )556;
66684#line 556
66685    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c",
66686                       __cil_tmp25);
66687    }
66688  } else {
66689
66690  }
66691  {
66692#line 556
66693  __cil_tmp26 = ! __ret_warn_on;
66694#line 556
66695  __cil_tmp27 = ! __cil_tmp26;
66696#line 556
66697  __cil_tmp28 = (long )__cil_tmp27;
66698#line 556
66699  __builtin_expect(__cil_tmp28, 0L);
66700#line 557
66701  __cil_tmp29 = (bool )0;
66702#line 557
66703  __cil_tmp30 = (bool )0;
66704#line 557
66705  vmw_overlay_stop(dev_priv, stream_id, __cil_tmp29, __cil_tmp30);
66706#line 558
66707  __cil_tmp31 = stream_id * 104UL;
66708#line 558
66709  __cil_tmp32 = __cil_tmp31 + 8;
66710#line 558
66711  __cil_tmp33 = 72 + __cil_tmp32;
66712#line 558
66713  __cil_tmp34 = (unsigned long )overlay;
66714#line 558
66715  __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
66716#line 558
66717  *((bool *)__cil_tmp35) = (bool )0;
66718#line 560
66719  __cil_tmp36 = (struct mutex *)overlay;
66720#line 560
66721  mutex_unlock(__cil_tmp36);
66722  }
66723#line 561
66724  return (0);
66725}
66726}
66727#line 582 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66728static struct lock_class_key __key___16  ;
66729#line 564 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66730int vmw_overlay_init(struct vmw_private *dev_priv ) 
66731{ struct vmw_overlay *overlay ;
66732  int i ;
66733  void *tmp___7 ;
66734  unsigned long __cil_tmp5 ;
66735  unsigned long __cil_tmp6 ;
66736  int __cil_tmp7 ;
66737  unsigned int __cil_tmp8 ;
66738  unsigned long __cil_tmp9 ;
66739  unsigned long __cil_tmp10 ;
66740  unsigned long __cil_tmp11 ;
66741  uint32_t __cil_tmp12 ;
66742  unsigned int __cil_tmp13 ;
66743  int __cil_tmp14 ;
66744  unsigned int __cil_tmp15 ;
66745  unsigned long __cil_tmp16 ;
66746  unsigned long __cil_tmp17 ;
66747  unsigned long __cil_tmp18 ;
66748  uint32_t __cil_tmp19 ;
66749  struct mutex *__cil_tmp20 ;
66750  unsigned long __cil_tmp21 ;
66751  unsigned long __cil_tmp22 ;
66752  unsigned long __cil_tmp23 ;
66753  unsigned long __cil_tmp24 ;
66754  void *__cil_tmp25 ;
66755  unsigned long __cil_tmp26 ;
66756  unsigned long __cil_tmp27 ;
66757  unsigned long __cil_tmp28 ;
66758  unsigned long __cil_tmp29 ;
66759  unsigned long __cil_tmp30 ;
66760  unsigned long __cil_tmp31 ;
66761  unsigned long __cil_tmp32 ;
66762  unsigned long __cil_tmp33 ;
66763  unsigned long __cil_tmp34 ;
66764  unsigned long __cil_tmp35 ;
66765  unsigned long __cil_tmp36 ;
66766  unsigned long __cil_tmp37 ;
66767
66768  {
66769  {
66770#line 569
66771  __cil_tmp5 = (unsigned long )dev_priv;
66772#line 569
66773  __cil_tmp6 = __cil_tmp5 + 2624;
66774#line 569
66775  if (*((struct vmw_overlay **)__cil_tmp6)) {
66776#line 570
66777    return (-22);
66778  } else {
66779
66780  }
66781  }
66782  {
66783#line 572
66784  __cil_tmp7 = 1 << 3;
66785#line 572
66786  __cil_tmp8 = (unsigned int )__cil_tmp7;
66787#line 572
66788  __cil_tmp9 = 1856 + 36;
66789#line 572
66790  __cil_tmp10 = (unsigned long )dev_priv;
66791#line 572
66792  __cil_tmp11 = __cil_tmp10 + __cil_tmp9;
66793#line 572
66794  __cil_tmp12 = *((uint32_t *)__cil_tmp11);
66795#line 572
66796  __cil_tmp13 = __cil_tmp12 & __cil_tmp8;
66797#line 572
66798  if (! __cil_tmp13) {
66799    {
66800#line 572
66801    __cil_tmp14 = 1 << 5;
66802#line 572
66803    __cil_tmp15 = (unsigned int )__cil_tmp14;
66804#line 572
66805    __cil_tmp16 = 1856 + 36;
66806#line 572
66807    __cil_tmp17 = (unsigned long )dev_priv;
66808#line 572
66809    __cil_tmp18 = __cil_tmp17 + __cil_tmp16;
66810#line 572
66811    __cil_tmp19 = *((uint32_t *)__cil_tmp18);
66812#line 572
66813    if (__cil_tmp19 & __cil_tmp15) {
66814      {
66815#line 574
66816      printk("<6>[drm] hardware doesn\'t support overlays\n");
66817      }
66818#line 575
66819      return (-38);
66820    } else {
66821
66822    }
66823    }
66824  } else {
66825
66826  }
66827  }
66828  {
66829#line 578
66830  tmp___7 = kzalloc(176UL, 208U);
66831#line 578
66832  overlay = (struct vmw_overlay *)tmp___7;
66833  }
66834#line 579
66835  if (! overlay) {
66836#line 580
66837    return (-12);
66838  } else {
66839
66840  }
66841  {
66842#line 582
66843  while (1) {
66844    while_continue: /* CIL Label */ ;
66845    {
66846#line 582
66847    __cil_tmp20 = (struct mutex *)overlay;
66848#line 582
66849    __mutex_init(__cil_tmp20, "&overlay->mutex", & __key___16);
66850    }
66851#line 582
66852    goto while_break;
66853  }
66854  while_break: /* CIL Label */ ;
66855  }
66856#line 583
66857  i = 0;
66858  {
66859#line 583
66860  while (1) {
66861    while_continue___0: /* CIL Label */ ;
66862#line 583
66863    if (i < 1) {
66864
66865    } else {
66866#line 583
66867      goto while_break___0;
66868    }
66869#line 584
66870    __cil_tmp21 = i * 104UL;
66871#line 584
66872    __cil_tmp22 = 72 + __cil_tmp21;
66873#line 584
66874    __cil_tmp23 = (unsigned long )overlay;
66875#line 584
66876    __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
66877#line 584
66878    __cil_tmp25 = (void *)0;
66879#line 584
66880    *((struct vmw_dma_buffer **)__cil_tmp24) = (struct vmw_dma_buffer *)__cil_tmp25;
66881#line 585
66882    __cil_tmp26 = i * 104UL;
66883#line 585
66884    __cil_tmp27 = __cil_tmp26 + 9;
66885#line 585
66886    __cil_tmp28 = 72 + __cil_tmp27;
66887#line 585
66888    __cil_tmp29 = (unsigned long )overlay;
66889#line 585
66890    __cil_tmp30 = __cil_tmp29 + __cil_tmp28;
66891#line 585
66892    *((bool *)__cil_tmp30) = (bool )0;
66893#line 586
66894    __cil_tmp31 = i * 104UL;
66895#line 586
66896    __cil_tmp32 = __cil_tmp31 + 8;
66897#line 586
66898    __cil_tmp33 = 72 + __cil_tmp32;
66899#line 586
66900    __cil_tmp34 = (unsigned long )overlay;
66901#line 586
66902    __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
66903#line 586
66904    *((bool *)__cil_tmp35) = (bool )0;
66905#line 583
66906    i = i + 1;
66907  }
66908  while_break___0: /* CIL Label */ ;
66909  }
66910#line 589
66911  __cil_tmp36 = (unsigned long )dev_priv;
66912#line 589
66913  __cil_tmp37 = __cil_tmp36 + 2624;
66914#line 589
66915  *((struct vmw_overlay **)__cil_tmp37) = overlay;
66916#line 591
66917  return (0);
66918}
66919}
66920#line 594 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c"
66921int vmw_overlay_close(struct vmw_private *dev_priv ) 
66922{ struct vmw_overlay *overlay ;
66923  bool forgotten_buffer ;
66924  int i ;
66925  int __ret_warn_on ;
66926  long tmp___7 ;
66927  unsigned long __cil_tmp7 ;
66928  unsigned long __cil_tmp8 ;
66929  unsigned long __cil_tmp9 ;
66930  unsigned long __cil_tmp10 ;
66931  unsigned long __cil_tmp11 ;
66932  unsigned long __cil_tmp12 ;
66933  uint32_t __cil_tmp13 ;
66934  bool __cil_tmp14 ;
66935  bool __cil_tmp15 ;
66936  int __cil_tmp16 ;
66937  int __cil_tmp17 ;
66938  int __cil_tmp18 ;
66939  long __cil_tmp19 ;
66940  int    __cil_tmp20 ;
66941  int __cil_tmp21 ;
66942  int __cil_tmp22 ;
66943  long __cil_tmp23 ;
66944  unsigned long __cil_tmp24 ;
66945  unsigned long __cil_tmp25 ;
66946  void *__cil_tmp26 ;
66947  void    *__cil_tmp27 ;
66948
66949  {
66950#line 596
66951  __cil_tmp7 = (unsigned long )dev_priv;
66952#line 596
66953  __cil_tmp8 = __cil_tmp7 + 2624;
66954#line 596
66955  overlay = *((struct vmw_overlay **)__cil_tmp8);
66956#line 597
66957  forgotten_buffer = (bool )0;
66958#line 600
66959  if (! overlay) {
66960#line 601
66961    return (-38);
66962  } else {
66963
66964  }
66965#line 603
66966  i = 0;
66967  {
66968#line 603
66969  while (1) {
66970    while_continue: /* CIL Label */ ;
66971#line 603
66972    if (i < 1) {
66973
66974    } else {
66975#line 603
66976      goto while_break;
66977    }
66978    {
66979#line 604
66980    __cil_tmp9 = i * 104UL;
66981#line 604
66982    __cil_tmp10 = 72 + __cil_tmp9;
66983#line 604
66984    __cil_tmp11 = (unsigned long )overlay;
66985#line 604
66986    __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
66987#line 604
66988    if (*((struct vmw_dma_buffer **)__cil_tmp12)) {
66989      {
66990#line 605
66991      forgotten_buffer = (bool )1;
66992#line 606
66993      __cil_tmp13 = (uint32_t )i;
66994#line 606
66995      __cil_tmp14 = (bool )0;
66996#line 606
66997      __cil_tmp15 = (bool )0;
66998#line 606
66999      vmw_overlay_stop(dev_priv, __cil_tmp13, __cil_tmp14, __cil_tmp15);
67000      }
67001    } else {
67002
67003    }
67004    }
67005#line 603
67006    i = i + 1;
67007  }
67008  while_break: /* CIL Label */ ;
67009  }
67010  {
67011#line 610
67012  __cil_tmp16 = ! forgotten_buffer;
67013#line 610
67014  __ret_warn_on = ! __cil_tmp16;
67015#line 610
67016  __cil_tmp17 = ! __ret_warn_on;
67017#line 610
67018  __cil_tmp18 = ! __cil_tmp17;
67019#line 610
67020  __cil_tmp19 = (long )__cil_tmp18;
67021#line 610
67022  tmp___7 = __builtin_expect(__cil_tmp19, 0L);
67023  }
67024#line 610
67025  if (tmp___7) {
67026    {
67027#line 610
67028    __cil_tmp20 = (int    )610;
67029#line 610
67030    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c",
67031                       __cil_tmp20);
67032    }
67033  } else {
67034
67035  }
67036  {
67037#line 610
67038  __cil_tmp21 = ! __ret_warn_on;
67039#line 610
67040  __cil_tmp22 = ! __cil_tmp21;
67041#line 610
67042  __cil_tmp23 = (long )__cil_tmp22;
67043#line 610
67044  __builtin_expect(__cil_tmp23, 0L);
67045#line 612
67046  __cil_tmp24 = (unsigned long )dev_priv;
67047#line 612
67048  __cil_tmp25 = __cil_tmp24 + 2624;
67049#line 612
67050  __cil_tmp26 = (void *)0;
67051#line 612
67052  *((struct vmw_overlay **)__cil_tmp25) = (struct vmw_overlay *)__cil_tmp26;
67053#line 613
67054  __cil_tmp27 = (void    *)overlay;
67055#line 613
67056  kfree(__cil_tmp27);
67057  }
67058#line 615
67059  return (0);
67060}
67061}
67062#line 56 "include/linux/time.h"
67063__inline static int timespec_compare(struct timespec    *lhs , struct timespec    *rhs )  __attribute__((__no_instrument_function__)) ;
67064#line 56 "include/linux/time.h"
67065__inline static int timespec_compare(struct timespec    *lhs , struct timespec    *rhs ) 
67066{ __kernel_time_t    __cil_tmp3 ;
67067  __kernel_time_t    __cil_tmp4 ;
67068  __kernel_time_t    __cil_tmp5 ;
67069  __kernel_time_t    __cil_tmp6 ;
67070  unsigned long __cil_tmp7 ;
67071  unsigned long __cil_tmp8 ;
67072  long    __cil_tmp9 ;
67073  unsigned long __cil_tmp10 ;
67074  unsigned long __cil_tmp11 ;
67075  long    __cil_tmp12 ;
67076  long    __cil_tmp13 ;
67077
67078  {
67079  {
67080#line 58
67081  __cil_tmp3 = *((__kernel_time_t    *)rhs);
67082#line 58
67083  __cil_tmp4 = *((__kernel_time_t    *)lhs);
67084#line 58
67085  if (__cil_tmp4 < __cil_tmp3) {
67086#line 59
67087    return (-1);
67088  } else {
67089
67090  }
67091  }
67092  {
67093#line 60
67094  __cil_tmp5 = *((__kernel_time_t    *)rhs);
67095#line 60
67096  __cil_tmp6 = *((__kernel_time_t    *)lhs);
67097#line 60
67098  if (__cil_tmp6 > __cil_tmp5) {
67099#line 61
67100    return (1);
67101  } else {
67102
67103  }
67104  }
67105  {
67106#line 62
67107  __cil_tmp7 = (unsigned long )rhs;
67108#line 62
67109  __cil_tmp8 = __cil_tmp7 + 8;
67110#line 62
67111  __cil_tmp9 = *((long    *)__cil_tmp8);
67112#line 62
67113  __cil_tmp10 = (unsigned long )lhs;
67114#line 62
67115  __cil_tmp11 = __cil_tmp10 + 8;
67116#line 62
67117  __cil_tmp12 = *((long    *)__cil_tmp11);
67118#line 62
67119  __cil_tmp13 = __cil_tmp12 - __cil_tmp9;
67120#line 62
67121  return ((int )__cil_tmp13);
67122  }
67123}
67124}
67125#line 78
67126extern void set_normalized_timespec(struct timespec *ts , time_t sec , s64 nsec ) ;
67127#line 101
67128__inline static struct timespec timespec_sub(__kernel_time_t lhs_tv_sec11 , long lhs_tv_nsec10 ,
67129                                             __kernel_time_t rhs_tv_sec9 , long rhs_tv_nsec8 )  __attribute__((__no_instrument_function__)) ;
67130#line 101 "include/linux/time.h"
67131__inline static struct timespec timespec_sub(__kernel_time_t lhs_tv_sec11 , long lhs_tv_nsec10 ,
67132                                             __kernel_time_t rhs_tv_sec9 , long rhs_tv_nsec8 ) 
67133{ struct timespec ts_delta ;
67134  __kernel_time_t __cil_tmp4 ;
67135  long __cil_tmp5 ;
67136  s64 __cil_tmp6 ;
67137  struct timespec *__cil_tmp7 ;
67138
67139  {
67140  {
67141#line 105
67142  __cil_tmp4 = lhs_tv_sec11 - rhs_tv_sec9;
67143#line 105
67144  __cil_tmp5 = lhs_tv_nsec10 - rhs_tv_nsec8;
67145#line 105
67146  __cil_tmp6 = (s64 )__cil_tmp5;
67147#line 105
67148  set_normalized_timespec(& ts_delta, __cil_tmp4, __cil_tmp6);
67149  }
67150  {
67151#line 107
67152  __cil_tmp7 = & ts_delta;
67153#line 107
67154  return (*__cil_tmp7);
67155  }
67156}
67157}
67158#line 160
67159extern void getrawmonotonic(struct timespec *ts ) ;
67160#line 235
67161extern struct timespec ns_to_timespec(s64    nsec ) ;
67162#line 42 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67163static struct lock_class_key __key___17  ;
67164#line 37 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67165void vmw_marker_queue_init(struct vmw_marker_queue *queue ) 
67166{ struct list_head *__cil_tmp2 ;
67167  unsigned long __cil_tmp3 ;
67168  unsigned long __cil_tmp4 ;
67169  s64    __cil_tmp5 ;
67170  unsigned long __cil_tmp6 ;
67171  unsigned long __cil_tmp7 ;
67172  struct timespec *__cil_tmp8 ;
67173  unsigned long __cil_tmp9 ;
67174  unsigned long __cil_tmp10 ;
67175  spinlock_t *__cil_tmp11 ;
67176  unsigned long __cil_tmp12 ;
67177  unsigned long __cil_tmp13 ;
67178  struct raw_spinlock *__cil_tmp14 ;
67179
67180  {
67181  {
67182#line 39
67183  __cil_tmp2 = (struct list_head *)queue;
67184#line 39
67185  INIT_LIST_HEAD(__cil_tmp2);
67186#line 40
67187  __cil_tmp3 = (unsigned long )queue;
67188#line 40
67189  __cil_tmp4 = __cil_tmp3 + 16;
67190#line 40
67191  __cil_tmp5 = (s64    )0;
67192#line 40
67193  *((struct timespec *)__cil_tmp4) = ns_to_timespec(__cil_tmp5);
67194#line 41
67195  __cil_tmp6 = (unsigned long )queue;
67196#line 41
67197  __cil_tmp7 = __cil_tmp6 + 32;
67198#line 41
67199  __cil_tmp8 = (struct timespec *)__cil_tmp7;
67200#line 41
67201  getrawmonotonic(__cil_tmp8);
67202  }
67203  {
67204#line 42
67205  while (1) {
67206    while_continue: /* CIL Label */ ;
67207    {
67208#line 42
67209    __cil_tmp9 = (unsigned long )queue;
67210#line 42
67211    __cil_tmp10 = __cil_tmp9 + 48;
67212#line 42
67213    __cil_tmp11 = (spinlock_t *)__cil_tmp10;
67214#line 42
67215    spinlock_check(__cil_tmp11);
67216    }
67217    {
67218#line 42
67219    while (1) {
67220      while_continue___0: /* CIL Label */ ;
67221      {
67222#line 42
67223      __cil_tmp12 = (unsigned long )queue;
67224#line 42
67225      __cil_tmp13 = __cil_tmp12 + 48;
67226#line 42
67227      __cil_tmp14 = (struct raw_spinlock *)__cil_tmp13;
67228#line 42
67229      __raw_spin_lock_init(__cil_tmp14, "&(&queue->lock)->rlock", & __key___17);
67230      }
67231#line 42
67232      goto while_break___0;
67233    }
67234    while_break___0: /* CIL Label */ ;
67235    }
67236#line 42
67237    goto while_break;
67238  }
67239  while_break: /* CIL Label */ ;
67240  }
67241#line 43
67242  return;
67243}
67244}
67245#line 45 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67246void vmw_marker_queue_takedown(struct vmw_marker_queue *queue ) 
67247{ struct vmw_marker *marker ;
67248  struct vmw_marker *next ;
67249  struct list_head    *__mptr ;
67250  struct list_head    *__mptr___0 ;
67251  struct list_head    *__mptr___1 ;
67252  unsigned long __cil_tmp7 ;
67253  unsigned long __cil_tmp8 ;
67254  spinlock_t *__cil_tmp9 ;
67255  struct list_head *__cil_tmp10 ;
67256  struct vmw_marker *__cil_tmp11 ;
67257  struct list_head *__cil_tmp12 ;
67258  unsigned int __cil_tmp13 ;
67259  char *__cil_tmp14 ;
67260  char *__cil_tmp15 ;
67261  struct list_head *__cil_tmp16 ;
67262  struct vmw_marker *__cil_tmp17 ;
67263  struct list_head *__cil_tmp18 ;
67264  unsigned int __cil_tmp19 ;
67265  char *__cil_tmp20 ;
67266  char *__cil_tmp21 ;
67267  struct list_head *__cil_tmp22 ;
67268  unsigned long __cil_tmp23 ;
67269  struct list_head *__cil_tmp24 ;
67270  unsigned long __cil_tmp25 ;
67271  void    *__cil_tmp26 ;
67272  struct list_head *__cil_tmp27 ;
67273  struct vmw_marker *__cil_tmp28 ;
67274  struct list_head *__cil_tmp29 ;
67275  unsigned int __cil_tmp30 ;
67276  char *__cil_tmp31 ;
67277  char *__cil_tmp32 ;
67278  unsigned long __cil_tmp33 ;
67279  unsigned long __cil_tmp34 ;
67280  spinlock_t *__cil_tmp35 ;
67281
67282  {
67283  {
67284#line 49
67285  __cil_tmp7 = (unsigned long )queue;
67286#line 49
67287  __cil_tmp8 = __cil_tmp7 + 48;
67288#line 49
67289  __cil_tmp9 = (spinlock_t *)__cil_tmp8;
67290#line 49
67291  spin_lock(__cil_tmp9);
67292#line 50
67293  __cil_tmp10 = *((struct list_head **)queue);
67294#line 50
67295  __mptr = (struct list_head    *)__cil_tmp10;
67296#line 50
67297  __cil_tmp11 = (struct vmw_marker *)0;
67298#line 50
67299  __cil_tmp12 = (struct list_head *)__cil_tmp11;
67300#line 50
67301  __cil_tmp13 = (unsigned int )__cil_tmp12;
67302#line 50
67303  __cil_tmp14 = (char *)__mptr;
67304#line 50
67305  __cil_tmp15 = __cil_tmp14 - __cil_tmp13;
67306#line 50
67307  marker = (struct vmw_marker *)__cil_tmp15;
67308#line 50
67309  __cil_tmp16 = *((struct list_head **)marker);
67310#line 50
67311  __mptr___0 = (struct list_head    *)__cil_tmp16;
67312#line 50
67313  __cil_tmp17 = (struct vmw_marker *)0;
67314#line 50
67315  __cil_tmp18 = (struct list_head *)__cil_tmp17;
67316#line 50
67317  __cil_tmp19 = (unsigned int )__cil_tmp18;
67318#line 50
67319  __cil_tmp20 = (char *)__mptr___0;
67320#line 50
67321  __cil_tmp21 = __cil_tmp20 - __cil_tmp19;
67322#line 50
67323  next = (struct vmw_marker *)__cil_tmp21;
67324  }
67325  {
67326#line 50
67327  while (1) {
67328    while_continue: /* CIL Label */ ;
67329    {
67330#line 50
67331    __cil_tmp22 = (struct list_head *)queue;
67332#line 50
67333    __cil_tmp23 = (unsigned long )__cil_tmp22;
67334#line 50
67335    __cil_tmp24 = (struct list_head *)marker;
67336#line 50
67337    __cil_tmp25 = (unsigned long )__cil_tmp24;
67338#line 50
67339    if (__cil_tmp25 != __cil_tmp23) {
67340
67341    } else {
67342#line 50
67343      goto while_break;
67344    }
67345    }
67346    {
67347#line 51
67348    __cil_tmp26 = (void    *)marker;
67349#line 51
67350    kfree(__cil_tmp26);
67351#line 50
67352    marker = next;
67353#line 50
67354    __cil_tmp27 = *((struct list_head **)next);
67355#line 50
67356    __mptr___1 = (struct list_head    *)__cil_tmp27;
67357#line 50
67358    __cil_tmp28 = (struct vmw_marker *)0;
67359#line 50
67360    __cil_tmp29 = (struct list_head *)__cil_tmp28;
67361#line 50
67362    __cil_tmp30 = (unsigned int )__cil_tmp29;
67363#line 50
67364    __cil_tmp31 = (char *)__mptr___1;
67365#line 50
67366    __cil_tmp32 = __cil_tmp31 - __cil_tmp30;
67367#line 50
67368    next = (struct vmw_marker *)__cil_tmp32;
67369    }
67370  }
67371  while_break: /* CIL Label */ ;
67372  }
67373  {
67374#line 53
67375  __cil_tmp33 = (unsigned long )queue;
67376#line 53
67377  __cil_tmp34 = __cil_tmp33 + 48;
67378#line 53
67379  __cil_tmp35 = (spinlock_t *)__cil_tmp34;
67380#line 53
67381  spin_unlock(__cil_tmp35);
67382  }
67383#line 54
67384  return;
67385}
67386}
67387#line 56 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67388int vmw_marker_push(struct vmw_marker_queue *queue , uint32_t seqno ) 
67389{ struct vmw_marker *marker ;
67390  void *tmp___7 ;
67391  long tmp___8 ;
67392  int __cil_tmp6 ;
67393  int __cil_tmp7 ;
67394  int __cil_tmp8 ;
67395  long __cil_tmp9 ;
67396  unsigned long __cil_tmp10 ;
67397  unsigned long __cil_tmp11 ;
67398  unsigned long __cil_tmp12 ;
67399  unsigned long __cil_tmp13 ;
67400  struct timespec *__cil_tmp14 ;
67401  unsigned long __cil_tmp15 ;
67402  unsigned long __cil_tmp16 ;
67403  spinlock_t *__cil_tmp17 ;
67404  struct list_head *__cil_tmp18 ;
67405  struct list_head *__cil_tmp19 ;
67406  unsigned long __cil_tmp20 ;
67407  unsigned long __cil_tmp21 ;
67408  spinlock_t *__cil_tmp22 ;
67409
67410  {
67411  {
67412#line 59
67413  tmp___7 = kmalloc(40UL, 208U);
67414#line 59
67415  marker = (struct vmw_marker *)tmp___7;
67416#line 61
67417  __cil_tmp6 = ! marker;
67418#line 61
67419  __cil_tmp7 = ! __cil_tmp6;
67420#line 61
67421  __cil_tmp8 = ! __cil_tmp7;
67422#line 61
67423  __cil_tmp9 = (long )__cil_tmp8;
67424#line 61
67425  tmp___8 = __builtin_expect(__cil_tmp9, 0L);
67426  }
67427#line 61
67428  if (tmp___8) {
67429#line 62
67430    return (-12);
67431  } else {
67432
67433  }
67434  {
67435#line 64
67436  __cil_tmp10 = (unsigned long )marker;
67437#line 64
67438  __cil_tmp11 = __cil_tmp10 + 16;
67439#line 64
67440  *((uint32_t *)__cil_tmp11) = seqno;
67441#line 65
67442  __cil_tmp12 = (unsigned long )marker;
67443#line 65
67444  __cil_tmp13 = __cil_tmp12 + 24;
67445#line 65
67446  __cil_tmp14 = (struct timespec *)__cil_tmp13;
67447#line 65
67448  getrawmonotonic(__cil_tmp14);
67449#line 66
67450  __cil_tmp15 = (unsigned long )queue;
67451#line 66
67452  __cil_tmp16 = __cil_tmp15 + 48;
67453#line 66
67454  __cil_tmp17 = (spinlock_t *)__cil_tmp16;
67455#line 66
67456  spin_lock(__cil_tmp17);
67457#line 67
67458  __cil_tmp18 = (struct list_head *)marker;
67459#line 67
67460  __cil_tmp19 = (struct list_head *)queue;
67461#line 67
67462  list_add_tail(__cil_tmp18, __cil_tmp19);
67463#line 68
67464  __cil_tmp20 = (unsigned long )queue;
67465#line 68
67466  __cil_tmp21 = __cil_tmp20 + 48;
67467#line 68
67468  __cil_tmp22 = (spinlock_t *)__cil_tmp21;
67469#line 68
67470  spin_unlock(__cil_tmp22);
67471  }
67472#line 70
67473  return (0);
67474}
67475}
67476#line 73 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67477int vmw_marker_pull(struct vmw_marker_queue *queue , uint32_t signaled_seqno ) 
67478{ struct vmw_marker *marker ;
67479  struct vmw_marker *next ;
67480  struct timespec now ;
67481  bool updated ;
67482  int tmp___7 ;
67483  struct list_head    *__mptr ;
67484  struct list_head    *__mptr___0 ;
67485  struct list_head    *__mptr___1 ;
67486  int tmp___8 ;
67487  unsigned long __cil_tmp12 ;
67488  unsigned long __cil_tmp13 ;
67489  spinlock_t *__cil_tmp14 ;
67490  struct list_head *__cil_tmp15 ;
67491  struct list_head    *__cil_tmp16 ;
67492  unsigned long __cil_tmp17 ;
67493  unsigned long __cil_tmp18 ;
67494  s64    __cil_tmp19 ;
67495  unsigned long __cil_tmp20 ;
67496  unsigned long __cil_tmp21 ;
67497  struct timespec *__cil_tmp22 ;
67498  struct list_head *__cil_tmp23 ;
67499  struct vmw_marker *__cil_tmp24 ;
67500  struct list_head *__cil_tmp25 ;
67501  unsigned int __cil_tmp26 ;
67502  char *__cil_tmp27 ;
67503  char *__cil_tmp28 ;
67504  struct list_head *__cil_tmp29 ;
67505  struct vmw_marker *__cil_tmp30 ;
67506  struct list_head *__cil_tmp31 ;
67507  unsigned int __cil_tmp32 ;
67508  char *__cil_tmp33 ;
67509  char *__cil_tmp34 ;
67510  struct list_head *__cil_tmp35 ;
67511  unsigned long __cil_tmp36 ;
67512  struct list_head *__cil_tmp37 ;
67513  unsigned long __cil_tmp38 ;
67514  int __cil_tmp39 ;
67515  uint32_t __cil_tmp40 ;
67516  unsigned long __cil_tmp41 ;
67517  unsigned long __cil_tmp42 ;
67518  uint32_t __cil_tmp43 ;
67519  uint32_t __cil_tmp44 ;
67520  unsigned long __cil_tmp45 ;
67521  unsigned long __cil_tmp46 ;
67522  struct timespec *__cil_tmp47 ;
67523  struct timespec __cil_tmp48 ;
67524  unsigned long __cil_tmp49 ;
67525  unsigned long __cil_tmp50 ;
67526  struct timespec __cil_tmp51 ;
67527  unsigned long __cil_tmp52 ;
67528  unsigned long __cil_tmp53 ;
67529  struct timespec *__cil_tmp54 ;
67530  struct list_head *__cil_tmp55 ;
67531  void    *__cil_tmp56 ;
67532  struct list_head *__cil_tmp57 ;
67533  struct vmw_marker *__cil_tmp58 ;
67534  struct list_head *__cil_tmp59 ;
67535  unsigned int __cil_tmp60 ;
67536  char *__cil_tmp61 ;
67537  char *__cil_tmp62 ;
67538  unsigned long __cil_tmp63 ;
67539  unsigned long __cil_tmp64 ;
67540  spinlock_t *__cil_tmp65 ;
67541  long __cil_tmp48_tv_nsec66 ;
67542  __kernel_time_t __cil_tmp48_tv_sec67 ;
67543  long __cil_tmp51_tv_nsec68 ;
67544  __kernel_time_t __cil_tmp51_tv_sec69 ;
67545  __kernel_time_t __cil_tmp70 ;
67546  long __cil_tmp71 ;
67547  __kernel_time_t __cil_tmp72 ;
67548  long __cil_tmp73 ;
67549
67550  {
67551  {
67552#line 78
67553  updated = (bool )0;
67554#line 80
67555  __cil_tmp12 = (unsigned long )queue;
67556#line 80
67557  __cil_tmp13 = __cil_tmp12 + 48;
67558#line 80
67559  __cil_tmp14 = (spinlock_t *)__cil_tmp13;
67560#line 80
67561  spin_lock(__cil_tmp14);
67562#line 81
67563  getrawmonotonic(& now);
67564#line 83
67565  __cil_tmp15 = (struct list_head *)queue;
67566#line 83
67567  __cil_tmp16 = (struct list_head    *)__cil_tmp15;
67568#line 83
67569  tmp___7 = list_empty(__cil_tmp16);
67570  }
67571#line 83
67572  if (tmp___7) {
67573    {
67574#line 84
67575    __cil_tmp17 = (unsigned long )queue;
67576#line 84
67577    __cil_tmp18 = __cil_tmp17 + 16;
67578#line 84
67579    __cil_tmp19 = (s64    )0;
67580#line 84
67581    *((struct timespec *)__cil_tmp18) = ns_to_timespec(__cil_tmp19);
67582#line 85
67583    __cil_tmp20 = (unsigned long )queue;
67584#line 85
67585    __cil_tmp21 = __cil_tmp20 + 32;
67586#line 85
67587    __cil_tmp22 = & now;
67588#line 85
67589    *((struct timespec *)__cil_tmp21) = *__cil_tmp22;
67590#line 86
67591    updated = (bool )1;
67592    }
67593#line 87
67594    goto out_unlock;
67595  } else {
67596
67597  }
67598#line 90
67599  __cil_tmp23 = *((struct list_head **)queue);
67600#line 90
67601  __mptr = (struct list_head    *)__cil_tmp23;
67602#line 90
67603  __cil_tmp24 = (struct vmw_marker *)0;
67604#line 90
67605  __cil_tmp25 = (struct list_head *)__cil_tmp24;
67606#line 90
67607  __cil_tmp26 = (unsigned int )__cil_tmp25;
67608#line 90
67609  __cil_tmp27 = (char *)__mptr;
67610#line 90
67611  __cil_tmp28 = __cil_tmp27 - __cil_tmp26;
67612#line 90
67613  marker = (struct vmw_marker *)__cil_tmp28;
67614#line 90
67615  __cil_tmp29 = *((struct list_head **)marker);
67616#line 90
67617  __mptr___0 = (struct list_head    *)__cil_tmp29;
67618#line 90
67619  __cil_tmp30 = (struct vmw_marker *)0;
67620#line 90
67621  __cil_tmp31 = (struct list_head *)__cil_tmp30;
67622#line 90
67623  __cil_tmp32 = (unsigned int )__cil_tmp31;
67624#line 90
67625  __cil_tmp33 = (char *)__mptr___0;
67626#line 90
67627  __cil_tmp34 = __cil_tmp33 - __cil_tmp32;
67628#line 90
67629  next = (struct vmw_marker *)__cil_tmp34;
67630  {
67631#line 90
67632  while (1) {
67633    while_continue: /* CIL Label */ ;
67634    {
67635#line 90
67636    __cil_tmp35 = (struct list_head *)queue;
67637#line 90
67638    __cil_tmp36 = (unsigned long )__cil_tmp35;
67639#line 90
67640    __cil_tmp37 = (struct list_head *)marker;
67641#line 90
67642    __cil_tmp38 = (unsigned long )__cil_tmp37;
67643#line 90
67644    if (__cil_tmp38 != __cil_tmp36) {
67645
67646    } else {
67647#line 90
67648      goto while_break;
67649    }
67650    }
67651    {
67652#line 91
67653    __cil_tmp39 = 1 << 30;
67654#line 91
67655    __cil_tmp40 = (uint32_t )__cil_tmp39;
67656#line 91
67657    __cil_tmp41 = (unsigned long )marker;
67658#line 91
67659    __cil_tmp42 = __cil_tmp41 + 16;
67660#line 91
67661    __cil_tmp43 = *((uint32_t *)__cil_tmp42);
67662#line 91
67663    __cil_tmp44 = signaled_seqno - __cil_tmp43;
67664#line 91
67665    if (__cil_tmp44 > __cil_tmp40) {
67666#line 92
67667      goto __Cont;
67668    } else {
67669
67670    }
67671    }
67672    {
67673#line 94
67674    __cil_tmp45 = (unsigned long )queue;
67675#line 94
67676    __cil_tmp46 = __cil_tmp45 + 16;
67677#line 94
67678    __cil_tmp47 = & now;
67679#line 94
67680    __cil_tmp70 = __cil_tmp47->tv_sec;
67681#line 94
67682    __cil_tmp71 = __cil_tmp47->tv_nsec;
67683#line 94
67684    __cil_tmp48_tv_sec67 = __cil_tmp70;
67685#line 94
67686    __cil_tmp48_tv_nsec66 = __cil_tmp71;
67687#line 94
67688    __cil_tmp49 = (unsigned long )marker;
67689#line 94
67690    __cil_tmp50 = __cil_tmp49 + 24;
67691#line 94
67692    __cil_tmp72 = ((struct timespec *)__cil_tmp50)->tv_sec;
67693#line 94
67694    __cil_tmp73 = ((struct timespec *)__cil_tmp50)->tv_nsec;
67695#line 94
67696    __cil_tmp51_tv_sec69 = __cil_tmp72;
67697#line 94
67698    __cil_tmp51_tv_nsec68 = __cil_tmp73;
67699#line 94
67700    *((struct timespec *)__cil_tmp46) = timespec_sub(__cil_tmp48_tv_sec67, __cil_tmp48_tv_nsec66,
67701                                                     __cil_tmp51_tv_sec69, __cil_tmp51_tv_nsec68);
67702#line 95
67703    __cil_tmp52 = (unsigned long )queue;
67704#line 95
67705    __cil_tmp53 = __cil_tmp52 + 32;
67706#line 95
67707    __cil_tmp54 = & now;
67708#line 95
67709    *((struct timespec *)__cil_tmp53) = *__cil_tmp54;
67710#line 96
67711    updated = (bool )1;
67712#line 97
67713    __cil_tmp55 = (struct list_head *)marker;
67714#line 97
67715    list_del(__cil_tmp55);
67716#line 98
67717    __cil_tmp56 = (void    *)marker;
67718#line 98
67719    kfree(__cil_tmp56);
67720    }
67721    __Cont: /* CIL Label */ 
67722#line 90
67723    marker = next;
67724#line 90
67725    __cil_tmp57 = *((struct list_head **)next);
67726#line 90
67727    __mptr___1 = (struct list_head    *)__cil_tmp57;
67728#line 90
67729    __cil_tmp58 = (struct vmw_marker *)0;
67730#line 90
67731    __cil_tmp59 = (struct list_head *)__cil_tmp58;
67732#line 90
67733    __cil_tmp60 = (unsigned int )__cil_tmp59;
67734#line 90
67735    __cil_tmp61 = (char *)__mptr___1;
67736#line 90
67737    __cil_tmp62 = __cil_tmp61 - __cil_tmp60;
67738#line 90
67739    next = (struct vmw_marker *)__cil_tmp62;
67740  }
67741  while_break: /* CIL Label */ ;
67742  }
67743  out_unlock: 
67744  {
67745#line 102
67746  __cil_tmp63 = (unsigned long )queue;
67747#line 102
67748  __cil_tmp64 = __cil_tmp63 + 48;
67749#line 102
67750  __cil_tmp65 = (spinlock_t *)__cil_tmp64;
67751#line 102
67752  spin_unlock(__cil_tmp65);
67753  }
67754#line 104
67755  if (updated) {
67756#line 104
67757    tmp___8 = 0;
67758  } else {
67759#line 104
67760    tmp___8 = -16;
67761  }
67762#line 104
67763  return (tmp___8);
67764}
67765}
67766#line 107 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67767static struct timespec vmw_timespec_add(__kernel_time_t t1_tv_sec6 , long t1_tv_nsec5 ,
67768                                        __kernel_time_t t2_tv_sec4 , long t2_tv_nsec3 ) 
67769{ 
67770
67771        struct timespec t1;
67772  {
67773#line 110
67774  t1_tv_sec6 = t1_tv_sec6 + t2_tv_sec4;
67775#line 111
67776  t1_tv_nsec5 = t1_tv_nsec5 + t2_tv_nsec3;
67777#line 112
67778  if (t1_tv_nsec5 >= 1000000000L) {
67779#line 113
67780    t1_tv_sec6 = t1_tv_sec6 + 1L;
67781#line 114
67782    t1_tv_nsec5 = t1_tv_nsec5 - 1000000000L;
67783  } else {
67784
67785  }
67786#line 117
67787  return (t1);
67788}
67789}
67790#line 120 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67791static struct timespec vmw_fifo_lag(struct vmw_marker_queue *queue ) 
67792{ struct timespec now ;
67793  struct timespec tmp___7 ;
67794  unsigned long __cil_tmp4 ;
67795  unsigned long __cil_tmp5 ;
67796  spinlock_t *__cil_tmp6 ;
67797  struct timespec *__cil_tmp7 ;
67798  struct timespec __cil_tmp8 ;
67799  unsigned long __cil_tmp9 ;
67800  unsigned long __cil_tmp10 ;
67801  struct timespec __cil_tmp11 ;
67802  unsigned long __cil_tmp12 ;
67803  unsigned long __cil_tmp13 ;
67804  unsigned long __cil_tmp14 ;
67805  unsigned long __cil_tmp15 ;
67806  struct timespec __cil_tmp16 ;
67807  unsigned long __cil_tmp17 ;
67808  unsigned long __cil_tmp18 ;
67809  struct timespec *__cil_tmp19 ;
67810  unsigned long __cil_tmp20 ;
67811  unsigned long __cil_tmp21 ;
67812  spinlock_t *__cil_tmp22 ;
67813  unsigned long __cil_tmp23 ;
67814  unsigned long __cil_tmp24 ;
67815  long __cil_tmp8_tv_nsec25 ;
67816  __kernel_time_t __cil_tmp8_tv_sec26 ;
67817  long __cil_tmp11_tv_nsec27 ;
67818  __kernel_time_t __cil_tmp11_tv_sec28 ;
67819  long __cil_tmp16_tv_nsec29 ;
67820  __kernel_time_t __cil_tmp16_tv_sec30 ;
67821  __kernel_time_t __cil_tmp31 ;
67822  long __cil_tmp32 ;
67823  __kernel_time_t __cil_tmp33 ;
67824  long __cil_tmp34 ;
67825  __kernel_time_t __cil_tmp35 ;
67826  long __cil_tmp36 ;
67827
67828  {
67829  {
67830#line 124
67831  __cil_tmp4 = (unsigned long )queue;
67832#line 124
67833  __cil_tmp5 = __cil_tmp4 + 48;
67834#line 124
67835  __cil_tmp6 = (spinlock_t *)__cil_tmp5;
67836#line 124
67837  spin_lock(__cil_tmp6);
67838#line 125
67839  getrawmonotonic(& now);
67840#line 126
67841  __cil_tmp7 = & now;
67842#line 126
67843  __cil_tmp31 = __cil_tmp7->tv_sec;
67844#line 126
67845  __cil_tmp32 = __cil_tmp7->tv_nsec;
67846#line 126
67847  __cil_tmp8_tv_sec26 = __cil_tmp31;
67848#line 126
67849  __cil_tmp8_tv_nsec25 = __cil_tmp32;
67850#line 126
67851  __cil_tmp9 = (unsigned long )queue;
67852#line 126
67853  __cil_tmp10 = __cil_tmp9 + 32;
67854#line 126
67855  __cil_tmp33 = ((struct timespec *)__cil_tmp10)->tv_sec;
67856#line 126
67857  __cil_tmp34 = ((struct timespec *)__cil_tmp10)->tv_nsec;
67858#line 126
67859  __cil_tmp11_tv_sec28 = __cil_tmp33;
67860#line 126
67861  __cil_tmp11_tv_nsec27 = __cil_tmp34;
67862#line 126
67863  tmp___7 = timespec_sub(__cil_tmp8_tv_sec26, __cil_tmp8_tv_nsec25, __cil_tmp11_tv_sec28,
67864                         __cil_tmp11_tv_nsec27);
67865#line 126
67866  __cil_tmp12 = (unsigned long )queue;
67867#line 126
67868  __cil_tmp13 = __cil_tmp12 + 16;
67869#line 126
67870  __cil_tmp14 = (unsigned long )queue;
67871#line 126
67872  __cil_tmp15 = __cil_tmp14 + 16;
67873#line 126
67874  __cil_tmp35 = ((struct timespec *)__cil_tmp15)->tv_sec;
67875#line 126
67876  __cil_tmp36 = ((struct timespec *)__cil_tmp15)->tv_nsec;
67877#line 126
67878  __cil_tmp16_tv_sec30 = __cil_tmp35;
67879#line 126
67880  __cil_tmp16_tv_nsec29 = __cil_tmp36;
67881#line 126
67882  *((struct timespec *)__cil_tmp13) = vmw_timespec_add(__cil_tmp16_tv_sec30, __cil_tmp16_tv_nsec29,
67883                                                       tmp___7.tv_sec, tmp___7.tv_nsec);
67884#line 128
67885  __cil_tmp17 = (unsigned long )queue;
67886#line 128
67887  __cil_tmp18 = __cil_tmp17 + 32;
67888#line 128
67889  __cil_tmp19 = & now;
67890#line 128
67891  *((struct timespec *)__cil_tmp18) = *__cil_tmp19;
67892#line 129
67893  __cil_tmp20 = (unsigned long )queue;
67894#line 129
67895  __cil_tmp21 = __cil_tmp20 + 48;
67896#line 129
67897  __cil_tmp22 = (spinlock_t *)__cil_tmp21;
67898#line 129
67899  spin_unlock(__cil_tmp22);
67900  }
67901  {
67902#line 130
67903  __cil_tmp23 = (unsigned long )queue;
67904#line 130
67905  __cil_tmp24 = __cil_tmp23 + 16;
67906#line 130
67907  return (*((struct timespec *)__cil_tmp24));
67908  }
67909}
67910}
67911#line 134 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67912static bool vmw_lag_lt(struct vmw_marker_queue *queue , uint32_t us ) 
67913{ struct timespec lag ;
67914  struct timespec cond ;
67915  int tmp___7 ;
67916  struct timespec *__cil_tmp6 ;
67917  s64 __cil_tmp7 ;
67918  s64 __cil_tmp8 ;
67919  s64    __cil_tmp9 ;
67920  struct timespec *__cil_tmp10 ;
67921  struct timespec    *__cil_tmp11 ;
67922  struct timespec    *__cil_tmp12 ;
67923  int __cil_tmp13 ;
67924
67925  {
67926  {
67927#line 139
67928  __cil_tmp6 = & cond;
67929#line 139
67930  __cil_tmp7 = (s64 )us;
67931#line 139
67932  __cil_tmp8 = __cil_tmp7 * 1000LL;
67933#line 139
67934  __cil_tmp9 = (s64    )__cil_tmp8;
67935#line 139
67936  *__cil_tmp6 = ns_to_timespec(__cil_tmp9);
67937#line 140
67938  __cil_tmp10 = & lag;
67939#line 140
67940  *__cil_tmp10 = vmw_fifo_lag(queue);
67941#line 141
67942  __cil_tmp11 = (struct timespec    *)(& lag);
67943#line 141
67944  __cil_tmp12 = (struct timespec    *)(& cond);
67945#line 141
67946  tmp___7 = timespec_compare(__cil_tmp11, __cil_tmp12);
67947  }
67948  {
67949#line 141
67950  __cil_tmp13 = tmp___7 < 1;
67951#line 141
67952  return ((bool )__cil_tmp13);
67953  }
67954}
67955}
67956#line 144 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_marker.c"
67957int vmw_wait_lag(struct vmw_private *dev_priv , struct vmw_marker_queue *queue , uint32_t us ) 
67958{ struct vmw_marker *marker ;
67959  uint32_t seqno ;
67960  int ret ;
67961  int tmp___7 ;
67962  struct list_head    *__mptr ;
67963  int tmp___8 ;
67964  long tmp___9 ;
67965  bool tmp___10 ;
67966  unsigned long __cil_tmp12 ;
67967  unsigned long __cil_tmp13 ;
67968  spinlock_t *__cil_tmp14 ;
67969  struct list_head *__cil_tmp15 ;
67970  struct list_head    *__cil_tmp16 ;
67971  unsigned long __cil_tmp17 ;
67972  unsigned long __cil_tmp18 ;
67973  atomic_t *__cil_tmp19 ;
67974  atomic_t    *__cil_tmp20 ;
67975  struct list_head *__cil_tmp21 ;
67976  struct vmw_marker *__cil_tmp22 ;
67977  struct list_head *__cil_tmp23 ;
67978  unsigned int __cil_tmp24 ;
67979  char *__cil_tmp25 ;
67980  char *__cil_tmp26 ;
67981  unsigned long __cil_tmp27 ;
67982  unsigned long __cil_tmp28 ;
67983  unsigned long __cil_tmp29 ;
67984  unsigned long __cil_tmp30 ;
67985  spinlock_t *__cil_tmp31 ;
67986  bool __cil_tmp32 ;
67987  bool __cil_tmp33 ;
67988  int __cil_tmp34 ;
67989  int __cil_tmp35 ;
67990  int __cil_tmp36 ;
67991  long __cil_tmp37 ;
67992
67993  {
67994  {
67995#line 151
67996  while (1) {
67997    while_continue: /* CIL Label */ ;
67998    {
67999#line 151
68000    tmp___10 = vmw_lag_lt(queue, us);
68001    }
68002#line 151
68003    if (tmp___10) {
68004#line 151
68005      goto while_break;
68006    } else {
68007
68008    }
68009    {
68010#line 152
68011    __cil_tmp12 = (unsigned long )queue;
68012#line 152
68013    __cil_tmp13 = __cil_tmp12 + 48;
68014#line 152
68015    __cil_tmp14 = (spinlock_t *)__cil_tmp13;
68016#line 152
68017    spin_lock(__cil_tmp14);
68018#line 153
68019    __cil_tmp15 = (struct list_head *)queue;
68020#line 153
68021    __cil_tmp16 = (struct list_head    *)__cil_tmp15;
68022#line 153
68023    tmp___8 = list_empty(__cil_tmp16);
68024    }
68025#line 153
68026    if (tmp___8) {
68027      {
68028#line 154
68029      __cil_tmp17 = (unsigned long )dev_priv;
68030#line 154
68031      __cil_tmp18 = __cil_tmp17 + 2880;
68032#line 154
68033      __cil_tmp19 = (atomic_t *)__cil_tmp18;
68034#line 154
68035      __cil_tmp20 = (atomic_t    *)__cil_tmp19;
68036#line 154
68037      tmp___7 = atomic_read(__cil_tmp20);
68038#line 154
68039      seqno = (uint32_t )tmp___7;
68040      }
68041    } else {
68042#line 156
68043      __cil_tmp21 = *((struct list_head **)queue);
68044#line 156
68045      __mptr = (struct list_head    *)__cil_tmp21;
68046#line 156
68047      __cil_tmp22 = (struct vmw_marker *)0;
68048#line 156
68049      __cil_tmp23 = (struct list_head *)__cil_tmp22;
68050#line 156
68051      __cil_tmp24 = (unsigned int )__cil_tmp23;
68052#line 156
68053      __cil_tmp25 = (char *)__mptr;
68054#line 156
68055      __cil_tmp26 = __cil_tmp25 - __cil_tmp24;
68056#line 156
68057      marker = (struct vmw_marker *)__cil_tmp26;
68058#line 158
68059      __cil_tmp27 = (unsigned long )marker;
68060#line 158
68061      __cil_tmp28 = __cil_tmp27 + 16;
68062#line 158
68063      seqno = *((uint32_t *)__cil_tmp28);
68064    }
68065    {
68066#line 160
68067    __cil_tmp29 = (unsigned long )queue;
68068#line 160
68069    __cil_tmp30 = __cil_tmp29 + 48;
68070#line 160
68071    __cil_tmp31 = (spinlock_t *)__cil_tmp30;
68072#line 160
68073    spin_unlock(__cil_tmp31);
68074#line 162
68075    __cil_tmp32 = (bool )0;
68076#line 162
68077    __cil_tmp33 = (bool )1;
68078#line 162
68079    ret = vmw_wait_seqno(dev_priv, __cil_tmp32, seqno, __cil_tmp33, 750UL);
68080#line 165
68081    __cil_tmp34 = ret != 0;
68082#line 165
68083    __cil_tmp35 = ! __cil_tmp34;
68084#line 165
68085    __cil_tmp36 = ! __cil_tmp35;
68086#line 165
68087    __cil_tmp37 = (long )__cil_tmp36;
68088#line 165
68089    tmp___9 = __builtin_expect(__cil_tmp37, 0L);
68090    }
68091#line 165
68092    if (tmp___9) {
68093#line 166
68094      return (ret);
68095    } else {
68096
68097    }
68098    {
68099#line 168
68100    vmw_marker_pull(queue, seqno);
68101    }
68102  }
68103  while_break: /* CIL Label */ ;
68104  }
68105#line 170
68106  return (0);
68107}
68108}
68109#line 142 "include/linux/idr.h"
68110extern int ida_pre_get(struct ida *ida , gfp_t gfp_mask ) ;
68111#line 144
68112extern int ida_get_new(struct ida *ida , int *p_id ) ;
68113#line 145
68114extern void ida_remove(struct ida *ida , int id ) ;
68115#line 146
68116extern void ida_destroy(struct ida *ida ) ;
68117#line 147
68118extern void ida_init(struct ida *ida ) ;
68119#line 47 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68120static int vmw_gmrid_man_get_node(struct ttm_mem_type_manager *man , struct ttm_buffer_object *bo ,
68121                                  struct ttm_placement *placement , struct ttm_mem_reg *mem ) 
68122{ struct vmwgfx_gmrid_man *gman ;
68123  int ret ;
68124  int id ;
68125  long tmp___7 ;
68126  int tmp___8 ;
68127  int tmp___9 ;
68128  long tmp___10 ;
68129  int tmp___11 ;
68130  long tmp___12 ;
68131  long tmp___13 ;
68132  unsigned long __cil_tmp15 ;
68133  unsigned long __cil_tmp16 ;
68134  void *__cil_tmp17 ;
68135  spinlock_t *__cil_tmp18 ;
68136  unsigned long __cil_tmp19 ;
68137  unsigned long __cil_tmp20 ;
68138  uint32_t __cil_tmp21 ;
68139  unsigned long __cil_tmp22 ;
68140  unsigned long __cil_tmp23 ;
68141  unsigned long __cil_tmp24 ;
68142  unsigned long __cil_tmp25 ;
68143  unsigned long __cil_tmp26 ;
68144  unsigned long __cil_tmp27 ;
68145  unsigned long __cil_tmp28 ;
68146  uint32_t __cil_tmp29 ;
68147  unsigned long __cil_tmp30 ;
68148  unsigned long __cil_tmp31 ;
68149  unsigned long __cil_tmp32 ;
68150  unsigned long __cil_tmp33 ;
68151  uint32_t __cil_tmp34 ;
68152  unsigned long __cil_tmp35 ;
68153  unsigned long __cil_tmp36 ;
68154  uint32_t __cil_tmp37 ;
68155  int __cil_tmp38 ;
68156  int __cil_tmp39 ;
68157  int __cil_tmp40 ;
68158  long __cil_tmp41 ;
68159  spinlock_t *__cil_tmp42 ;
68160  unsigned long __cil_tmp43 ;
68161  unsigned long __cil_tmp44 ;
68162  struct ida *__cil_tmp45 ;
68163  long __cil_tmp46 ;
68164  spinlock_t *__cil_tmp47 ;
68165  unsigned long __cil_tmp48 ;
68166  unsigned long __cil_tmp49 ;
68167  struct ida *__cil_tmp50 ;
68168  unsigned long __cil_tmp51 ;
68169  unsigned long __cil_tmp52 ;
68170  uint32_t __cil_tmp53 ;
68171  int *__cil_tmp54 ;
68172  int __cil_tmp55 ;
68173  uint32_t __cil_tmp56 ;
68174  long __cil_tmp57 ;
68175  unsigned long __cil_tmp58 ;
68176  unsigned long __cil_tmp59 ;
68177  struct ida *__cil_tmp60 ;
68178  int *__cil_tmp61 ;
68179  int __cil_tmp62 ;
68180  int __cil_tmp63 ;
68181  int __cil_tmp64 ;
68182  int __cil_tmp65 ;
68183  long __cil_tmp66 ;
68184  unsigned long __cil_tmp67 ;
68185  unsigned long __cil_tmp68 ;
68186  int *__cil_tmp69 ;
68187  int __cil_tmp70 ;
68188  unsigned long __cil_tmp71 ;
68189  unsigned long __cil_tmp72 ;
68190  unsigned long __cil_tmp73 ;
68191  unsigned long __cil_tmp74 ;
68192  spinlock_t *__cil_tmp75 ;
68193  spinlock_t *__cil_tmp76 ;
68194  unsigned long __cil_tmp77 ;
68195  unsigned long __cil_tmp78 ;
68196  unsigned long __cil_tmp79 ;
68197  unsigned long __cil_tmp80 ;
68198  unsigned long __cil_tmp81 ;
68199  unsigned long __cil_tmp82 ;
68200  unsigned long __cil_tmp83 ;
68201  uint32_t __cil_tmp84 ;
68202  unsigned long __cil_tmp85 ;
68203  unsigned long __cil_tmp86 ;
68204  spinlock_t *__cil_tmp87 ;
68205
68206  {
68207  {
68208#line 52
68209  __cil_tmp15 = (unsigned long )man;
68210#line 52
68211  __cil_tmp16 = __cil_tmp15 + 48;
68212#line 52
68213  __cil_tmp17 = *((void **)__cil_tmp16);
68214#line 52
68215  gman = (struct vmwgfx_gmrid_man *)__cil_tmp17;
68216#line 54
68217  ret = 0;
68218#line 57
68219  *((void **)mem) = (void *)0;
68220#line 59
68221  __cil_tmp18 = (spinlock_t *)gman;
68222#line 59
68223  spin_lock(__cil_tmp18);
68224  }
68225  {
68226#line 61
68227  __cil_tmp19 = (unsigned long )gman;
68228#line 61
68229  __cil_tmp20 = __cil_tmp19 + 84;
68230#line 61
68231  __cil_tmp21 = *((uint32_t *)__cil_tmp20);
68232#line 61
68233  if (__cil_tmp21 > 0U) {
68234    {
68235#line 62
68236    __cil_tmp22 = (unsigned long )gman;
68237#line 62
68238    __cil_tmp23 = __cil_tmp22 + 88;
68239#line 62
68240    __cil_tmp24 = (unsigned long )bo;
68241#line 62
68242    __cil_tmp25 = __cil_tmp24 + 40;
68243#line 62
68244    __cil_tmp26 = *((unsigned long *)__cil_tmp25);
68245#line 62
68246    __cil_tmp27 = (unsigned long )gman;
68247#line 62
68248    __cil_tmp28 = __cil_tmp27 + 88;
68249#line 62
68250    __cil_tmp29 = *((uint32_t *)__cil_tmp28);
68251#line 62
68252    __cil_tmp30 = (unsigned long )__cil_tmp29;
68253#line 62
68254    __cil_tmp31 = __cil_tmp30 + __cil_tmp26;
68255#line 62
68256    *((uint32_t *)__cil_tmp23) = (uint32_t )__cil_tmp31;
68257#line 63
68258    __cil_tmp32 = (unsigned long )gman;
68259#line 63
68260    __cil_tmp33 = __cil_tmp32 + 84;
68261#line 63
68262    __cil_tmp34 = *((uint32_t *)__cil_tmp33);
68263#line 63
68264    __cil_tmp35 = (unsigned long )gman;
68265#line 63
68266    __cil_tmp36 = __cil_tmp35 + 88;
68267#line 63
68268    __cil_tmp37 = *((uint32_t *)__cil_tmp36);
68269#line 63
68270    __cil_tmp38 = __cil_tmp37 > __cil_tmp34;
68271#line 63
68272    __cil_tmp39 = ! __cil_tmp38;
68273#line 63
68274    __cil_tmp40 = ! __cil_tmp39;
68275#line 63
68276    __cil_tmp41 = (long )__cil_tmp40;
68277#line 63
68278    tmp___7 = __builtin_expect(__cil_tmp41, 0L);
68279    }
68280#line 63
68281    if (tmp___7) {
68282#line 64
68283      goto out_err_locked;
68284    } else {
68285
68286    }
68287  } else {
68288
68289  }
68290  }
68291  {
68292#line 67
68293  while (1) {
68294    while_continue: /* CIL Label */ ;
68295    {
68296#line 68
68297    __cil_tmp42 = (spinlock_t *)gman;
68298#line 68
68299    spin_unlock(__cil_tmp42);
68300#line 69
68301    __cil_tmp43 = (unsigned long )gman;
68302#line 69
68303    __cil_tmp44 = __cil_tmp43 + 24;
68304#line 69
68305    __cil_tmp45 = (struct ida *)__cil_tmp44;
68306#line 69
68307    tmp___8 = ida_pre_get(__cil_tmp45, 208U);
68308    }
68309#line 69
68310    if (tmp___8 == 0) {
68311#line 69
68312      tmp___9 = 1;
68313    } else {
68314#line 69
68315      tmp___9 = 0;
68316    }
68317    {
68318#line 69
68319    __cil_tmp46 = (long )tmp___9;
68320#line 69
68321    tmp___10 = __builtin_expect(__cil_tmp46, 0L);
68322    }
68323#line 69
68324    if (tmp___10) {
68325#line 70
68326      ret = -12;
68327#line 71
68328      goto out_err;
68329    } else {
68330
68331    }
68332    {
68333#line 73
68334    __cil_tmp47 = (spinlock_t *)gman;
68335#line 73
68336    spin_lock(__cil_tmp47);
68337#line 75
68338    __cil_tmp48 = (unsigned long )gman;
68339#line 75
68340    __cil_tmp49 = __cil_tmp48 + 24;
68341#line 75
68342    __cil_tmp50 = (struct ida *)__cil_tmp49;
68343#line 75
68344    ret = ida_get_new(__cil_tmp50, & id);
68345    }
68346#line 76
68347    if (ret == 0) {
68348      {
68349#line 76
68350      __cil_tmp51 = (unsigned long )gman;
68351#line 76
68352      __cil_tmp52 = __cil_tmp51 + 80;
68353#line 76
68354      __cil_tmp53 = *((uint32_t *)__cil_tmp52);
68355#line 76
68356      __cil_tmp54 = & id;
68357#line 76
68358      __cil_tmp55 = *__cil_tmp54;
68359#line 76
68360      __cil_tmp56 = (uint32_t )__cil_tmp55;
68361#line 76
68362      if (__cil_tmp56 >= __cil_tmp53) {
68363#line 76
68364        tmp___11 = 1;
68365      } else {
68366#line 76
68367        tmp___11 = 0;
68368      }
68369      }
68370    } else {
68371#line 76
68372      tmp___11 = 0;
68373    }
68374    {
68375#line 76
68376    __cil_tmp57 = (long )tmp___11;
68377#line 76
68378    tmp___12 = __builtin_expect(__cil_tmp57, 0L);
68379    }
68380#line 76
68381    if (tmp___12) {
68382      {
68383#line 77
68384      __cil_tmp58 = (unsigned long )gman;
68385#line 77
68386      __cil_tmp59 = __cil_tmp58 + 24;
68387#line 77
68388      __cil_tmp60 = (struct ida *)__cil_tmp59;
68389#line 77
68390      __cil_tmp61 = & id;
68391#line 77
68392      __cil_tmp62 = *__cil_tmp61;
68393#line 77
68394      ida_remove(__cil_tmp60, __cil_tmp62);
68395#line 78
68396      ret = 0;
68397      }
68398#line 79
68399      goto out_err_locked;
68400    } else {
68401
68402    }
68403#line 67
68404    if (ret == -11) {
68405
68406    } else {
68407#line 67
68408      goto while_break;
68409    }
68410  }
68411  while_break: /* CIL Label */ ;
68412  }
68413  {
68414#line 83
68415  __cil_tmp63 = ret == 0;
68416#line 83
68417  __cil_tmp64 = ! __cil_tmp63;
68418#line 83
68419  __cil_tmp65 = ! __cil_tmp64;
68420#line 83
68421  __cil_tmp66 = (long )__cil_tmp65;
68422#line 83
68423  tmp___13 = __builtin_expect(__cil_tmp66, 1L);
68424  }
68425#line 83
68426  if (tmp___13) {
68427#line 84
68428    *((void **)mem) = (void *)gman;
68429#line 85
68430    __cil_tmp67 = (unsigned long )mem;
68431#line 85
68432    __cil_tmp68 = __cil_tmp67 + 8;
68433#line 85
68434    __cil_tmp69 = & id;
68435#line 85
68436    __cil_tmp70 = *__cil_tmp69;
68437#line 85
68438    *((unsigned long *)__cil_tmp68) = (unsigned long )__cil_tmp70;
68439#line 86
68440    __cil_tmp71 = (unsigned long )mem;
68441#line 86
68442    __cil_tmp72 = __cil_tmp71 + 24;
68443#line 86
68444    __cil_tmp73 = (unsigned long )bo;
68445#line 86
68446    __cil_tmp74 = __cil_tmp73 + 40;
68447#line 86
68448    *((unsigned long *)__cil_tmp72) = *((unsigned long *)__cil_tmp74);
68449  } else {
68450#line 88
68451    goto out_err_locked;
68452  }
68453  {
68454#line 90
68455  __cil_tmp75 = (spinlock_t *)gman;
68456#line 90
68457  spin_unlock(__cil_tmp75);
68458  }
68459#line 91
68460  return (0);
68461  out_err: 
68462  {
68463#line 94
68464  __cil_tmp76 = (spinlock_t *)gman;
68465#line 94
68466  spin_lock(__cil_tmp76);
68467  }
68468  out_err_locked: 
68469  {
68470#line 96
68471  __cil_tmp77 = (unsigned long )gman;
68472#line 96
68473  __cil_tmp78 = __cil_tmp77 + 88;
68474#line 96
68475  __cil_tmp79 = (unsigned long )bo;
68476#line 96
68477  __cil_tmp80 = __cil_tmp79 + 40;
68478#line 96
68479  __cil_tmp81 = *((unsigned long *)__cil_tmp80);
68480#line 96
68481  __cil_tmp82 = (unsigned long )gman;
68482#line 96
68483  __cil_tmp83 = __cil_tmp82 + 88;
68484#line 96
68485  __cil_tmp84 = *((uint32_t *)__cil_tmp83);
68486#line 96
68487  __cil_tmp85 = (unsigned long )__cil_tmp84;
68488#line 96
68489  __cil_tmp86 = __cil_tmp85 - __cil_tmp81;
68490#line 96
68491  *((uint32_t *)__cil_tmp78) = (uint32_t )__cil_tmp86;
68492#line 97
68493  __cil_tmp87 = (spinlock_t *)gman;
68494#line 97
68495  spin_unlock(__cil_tmp87);
68496  }
68497#line 98
68498  return (ret);
68499}
68500}
68501#line 101 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68502static void vmw_gmrid_man_put_node(struct ttm_mem_type_manager *man , struct ttm_mem_reg *mem ) 
68503{ struct vmwgfx_gmrid_man *gman ;
68504  unsigned long __cil_tmp4 ;
68505  unsigned long __cil_tmp5 ;
68506  void *__cil_tmp6 ;
68507  spinlock_t *__cil_tmp7 ;
68508  unsigned long __cil_tmp8 ;
68509  unsigned long __cil_tmp9 ;
68510  struct ida *__cil_tmp10 ;
68511  unsigned long __cil_tmp11 ;
68512  unsigned long __cil_tmp12 ;
68513  unsigned long __cil_tmp13 ;
68514  int __cil_tmp14 ;
68515  unsigned long __cil_tmp15 ;
68516  unsigned long __cil_tmp16 ;
68517  unsigned long __cil_tmp17 ;
68518  unsigned long __cil_tmp18 ;
68519  unsigned long __cil_tmp19 ;
68520  unsigned long __cil_tmp20 ;
68521  unsigned long __cil_tmp21 ;
68522  uint32_t __cil_tmp22 ;
68523  unsigned long __cil_tmp23 ;
68524  unsigned long __cil_tmp24 ;
68525  spinlock_t *__cil_tmp25 ;
68526
68527  {
68528#line 104
68529  __cil_tmp4 = (unsigned long )man;
68530#line 104
68531  __cil_tmp5 = __cil_tmp4 + 48;
68532#line 104
68533  __cil_tmp6 = *((void **)__cil_tmp5);
68534#line 104
68535  gman = (struct vmwgfx_gmrid_man *)__cil_tmp6;
68536#line 107
68537  if (*((void **)mem)) {
68538    {
68539#line 108
68540    __cil_tmp7 = (spinlock_t *)gman;
68541#line 108
68542    spin_lock(__cil_tmp7);
68543#line 109
68544    __cil_tmp8 = (unsigned long )gman;
68545#line 109
68546    __cil_tmp9 = __cil_tmp8 + 24;
68547#line 109
68548    __cil_tmp10 = (struct ida *)__cil_tmp9;
68549#line 109
68550    __cil_tmp11 = (unsigned long )mem;
68551#line 109
68552    __cil_tmp12 = __cil_tmp11 + 8;
68553#line 109
68554    __cil_tmp13 = *((unsigned long *)__cil_tmp12);
68555#line 109
68556    __cil_tmp14 = (int )__cil_tmp13;
68557#line 109
68558    ida_remove(__cil_tmp10, __cil_tmp14);
68559#line 110
68560    __cil_tmp15 = (unsigned long )gman;
68561#line 110
68562    __cil_tmp16 = __cil_tmp15 + 88;
68563#line 110
68564    __cil_tmp17 = (unsigned long )mem;
68565#line 110
68566    __cil_tmp18 = __cil_tmp17 + 24;
68567#line 110
68568    __cil_tmp19 = *((unsigned long *)__cil_tmp18);
68569#line 110
68570    __cil_tmp20 = (unsigned long )gman;
68571#line 110
68572    __cil_tmp21 = __cil_tmp20 + 88;
68573#line 110
68574    __cil_tmp22 = *((uint32_t *)__cil_tmp21);
68575#line 110
68576    __cil_tmp23 = (unsigned long )__cil_tmp22;
68577#line 110
68578    __cil_tmp24 = __cil_tmp23 - __cil_tmp19;
68579#line 110
68580    *((uint32_t *)__cil_tmp16) = (uint32_t )__cil_tmp24;
68581#line 111
68582    __cil_tmp25 = (spinlock_t *)gman;
68583#line 111
68584    spin_unlock(__cil_tmp25);
68585#line 112
68586    *((void **)mem) = (void *)0;
68587    }
68588  } else {
68589
68590  }
68591#line 114
68592  return;
68593}
68594}
68595#line 127 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68596static struct lock_class_key __key___18  ;
68597#line 116 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68598static int vmw_gmrid_man_init(struct ttm_mem_type_manager *man , unsigned long p_size ) 
68599{ struct vmw_private *dev_priv ;
68600  struct ttm_bo_device    *__mptr ;
68601  struct vmwgfx_gmrid_man *gman ;
68602  void *tmp___7 ;
68603  long tmp___8 ;
68604  struct ttm_bo_device *__cil_tmp8 ;
68605  struct vmw_private *__cil_tmp9 ;
68606  struct ttm_bo_device *__cil_tmp10 ;
68607  unsigned int __cil_tmp11 ;
68608  char *__cil_tmp12 ;
68609  char *__cil_tmp13 ;
68610  void *__cil_tmp14 ;
68611  unsigned long __cil_tmp15 ;
68612  unsigned long __cil_tmp16 ;
68613  int __cil_tmp17 ;
68614  int __cil_tmp18 ;
68615  int __cil_tmp19 ;
68616  long __cil_tmp20 ;
68617  spinlock_t *__cil_tmp21 ;
68618  struct raw_spinlock *__cil_tmp22 ;
68619  unsigned long __cil_tmp23 ;
68620  unsigned long __cil_tmp24 ;
68621  unsigned long __cil_tmp25 ;
68622  unsigned long __cil_tmp26 ;
68623  unsigned long __cil_tmp27 ;
68624  unsigned long __cil_tmp28 ;
68625  unsigned long __cil_tmp29 ;
68626  unsigned long __cil_tmp30 ;
68627  struct ida *__cil_tmp31 ;
68628  unsigned long __cil_tmp32 ;
68629  unsigned long __cil_tmp33 ;
68630  unsigned long __cil_tmp34 ;
68631  unsigned long __cil_tmp35 ;
68632
68633  {
68634  {
68635#line 120
68636  __cil_tmp8 = *((struct ttm_bo_device **)man);
68637#line 120
68638  __mptr = (struct ttm_bo_device    *)__cil_tmp8;
68639#line 120
68640  __cil_tmp9 = (struct vmw_private *)0;
68641#line 120
68642  __cil_tmp10 = (struct ttm_bo_device *)__cil_tmp9;
68643#line 120
68644  __cil_tmp11 = (unsigned int )__cil_tmp10;
68645#line 120
68646  __cil_tmp12 = (char *)__mptr;
68647#line 120
68648  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
68649#line 120
68650  dev_priv = (struct vmw_private *)__cil_tmp13;
68651#line 121
68652  tmp___7 = kzalloc(96UL, 208U);
68653#line 121
68654  gman = (struct vmwgfx_gmrid_man *)tmp___7;
68655#line 124
68656  __cil_tmp14 = (void *)0;
68657#line 124
68658  __cil_tmp15 = (unsigned long )__cil_tmp14;
68659#line 124
68660  __cil_tmp16 = (unsigned long )gman;
68661#line 124
68662  __cil_tmp17 = __cil_tmp16 == __cil_tmp15;
68663#line 124
68664  __cil_tmp18 = ! __cil_tmp17;
68665#line 124
68666  __cil_tmp19 = ! __cil_tmp18;
68667#line 124
68668  __cil_tmp20 = (long )__cil_tmp19;
68669#line 124
68670  tmp___8 = __builtin_expect(__cil_tmp20, 0L);
68671  }
68672#line 124
68673  if (tmp___8) {
68674#line 125
68675    return (-12);
68676  } else {
68677
68678  }
68679  {
68680#line 127
68681  while (1) {
68682    while_continue: /* CIL Label */ ;
68683    {
68684#line 127
68685    __cil_tmp21 = (spinlock_t *)gman;
68686#line 127
68687    spinlock_check(__cil_tmp21);
68688    }
68689    {
68690#line 127
68691    while (1) {
68692      while_continue___0: /* CIL Label */ ;
68693      {
68694#line 127
68695      __cil_tmp22 = (struct raw_spinlock *)gman;
68696#line 127
68697      __raw_spin_lock_init(__cil_tmp22, "&(&gman->lock)->rlock", & __key___18);
68698      }
68699#line 127
68700      goto while_break___0;
68701    }
68702    while_break___0: /* CIL Label */ ;
68703    }
68704#line 127
68705    goto while_break;
68706  }
68707  while_break: /* CIL Label */ ;
68708  }
68709  {
68710#line 128
68711  __cil_tmp23 = (unsigned long )gman;
68712#line 128
68713  __cil_tmp24 = __cil_tmp23 + 84;
68714#line 128
68715  __cil_tmp25 = (unsigned long )dev_priv;
68716#line 128
68717  __cil_tmp26 = __cil_tmp25 + 2168;
68718#line 128
68719  *((uint32_t *)__cil_tmp24) = *((uint32_t *)__cil_tmp26);
68720#line 129
68721  __cil_tmp27 = (unsigned long )gman;
68722#line 129
68723  __cil_tmp28 = __cil_tmp27 + 88;
68724#line 129
68725  *((uint32_t *)__cil_tmp28) = (uint32_t )0;
68726#line 130
68727  __cil_tmp29 = (unsigned long )gman;
68728#line 130
68729  __cil_tmp30 = __cil_tmp29 + 24;
68730#line 130
68731  __cil_tmp31 = (struct ida *)__cil_tmp30;
68732#line 130
68733  ida_init(__cil_tmp31);
68734#line 131
68735  __cil_tmp32 = (unsigned long )gman;
68736#line 131
68737  __cil_tmp33 = __cil_tmp32 + 80;
68738#line 131
68739  *((uint32_t *)__cil_tmp33) = (uint32_t )p_size;
68740#line 132
68741  __cil_tmp34 = (unsigned long )man;
68742#line 132
68743  __cil_tmp35 = __cil_tmp34 + 48;
68744#line 132
68745  *((void **)__cil_tmp35) = (void *)gman;
68746  }
68747#line 133
68748  return (0);
68749}
68750}
68751#line 136 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68752static int vmw_gmrid_man_takedown(struct ttm_mem_type_manager *man ) 
68753{ struct vmwgfx_gmrid_man *gman ;
68754  unsigned long __cil_tmp3 ;
68755  unsigned long __cil_tmp4 ;
68756  void *__cil_tmp5 ;
68757  unsigned long __cil_tmp6 ;
68758  unsigned long __cil_tmp7 ;
68759  struct ida *__cil_tmp8 ;
68760  void    *__cil_tmp9 ;
68761
68762  {
68763#line 138
68764  __cil_tmp3 = (unsigned long )man;
68765#line 138
68766  __cil_tmp4 = __cil_tmp3 + 48;
68767#line 138
68768  __cil_tmp5 = *((void **)__cil_tmp4);
68769#line 138
68770  gman = (struct vmwgfx_gmrid_man *)__cil_tmp5;
68771#line 141
68772  if (gman) {
68773    {
68774#line 142
68775    __cil_tmp6 = (unsigned long )gman;
68776#line 142
68777    __cil_tmp7 = __cil_tmp6 + 24;
68778#line 142
68779    __cil_tmp8 = (struct ida *)__cil_tmp7;
68780#line 142
68781    ida_destroy(__cil_tmp8);
68782#line 143
68783    __cil_tmp9 = (void    *)gman;
68784#line 143
68785    kfree(__cil_tmp9);
68786    }
68787  } else {
68788
68789  }
68790#line 145
68791  return (0);
68792}
68793}
68794#line 148 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68795static void vmw_gmrid_man_debug(struct ttm_mem_type_manager *man , char    *prefix ) 
68796{ 
68797
68798  {
68799  {
68800#line 151
68801  printk("<6>%s: No debug info available for the GMR id manager.\n", prefix);
68802  }
68803#line 153
68804  return;
68805}
68806}
68807#line 155 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c"
68808struct ttm_mem_type_manager_func    vmw_gmrid_manager_func  =    {& vmw_gmrid_man_init, & vmw_gmrid_man_takedown, & vmw_gmrid_man_get_node, & vmw_gmrid_man_put_node,
68809    & vmw_gmrid_man_debug};
68810#line 273 "include/linux/list.h"
68811__inline static void __list_splice(struct list_head    *list , struct list_head *prev ,
68812                                   struct list_head *next )  __attribute__((__no_instrument_function__)) ;
68813#line 273 "include/linux/list.h"
68814__inline static void __list_splice(struct list_head    *list , struct list_head *prev ,
68815                                   struct list_head *next ) 
68816{ struct list_head *first ;
68817  struct list_head *last ;
68818  struct list_head *   __cil_tmp6 ;
68819  unsigned long __cil_tmp7 ;
68820  unsigned long __cil_tmp8 ;
68821  struct list_head *   __cil_tmp9 ;
68822  unsigned long __cil_tmp10 ;
68823  unsigned long __cil_tmp11 ;
68824  unsigned long __cil_tmp12 ;
68825  unsigned long __cil_tmp13 ;
68826
68827  {
68828#line 277
68829  __cil_tmp6 = *((struct list_head *   *)list);
68830#line 277
68831  first = (struct list_head *)__cil_tmp6;
68832#line 278
68833  __cil_tmp7 = (unsigned long )list;
68834#line 278
68835  __cil_tmp8 = __cil_tmp7 + 8;
68836#line 278
68837  __cil_tmp9 = *((struct list_head *   *)__cil_tmp8);
68838#line 278
68839  last = (struct list_head *)__cil_tmp9;
68840#line 280
68841  __cil_tmp10 = (unsigned long )first;
68842#line 280
68843  __cil_tmp11 = __cil_tmp10 + 8;
68844#line 280
68845  *((struct list_head **)__cil_tmp11) = prev;
68846#line 281
68847  *((struct list_head **)prev) = first;
68848#line 283
68849  *((struct list_head **)last) = next;
68850#line 284
68851  __cil_tmp12 = (unsigned long )next;
68852#line 284
68853  __cil_tmp13 = __cil_tmp12 + 8;
68854#line 284
68855  *((struct list_head **)__cil_tmp13) = last;
68856#line 285
68857  return;
68858}
68859}
68860#line 318
68861__inline static void list_splice_init(struct list_head *list , struct list_head *head )  __attribute__((__no_instrument_function__)) ;
68862#line 318 "include/linux/list.h"
68863__inline static void list_splice_init(struct list_head *list , struct list_head *head ) 
68864{ int tmp ;
68865  struct list_head    *__cil_tmp4 ;
68866  struct list_head    *__cil_tmp5 ;
68867  struct list_head *__cil_tmp6 ;
68868
68869  {
68870  {
68871#line 321
68872  __cil_tmp4 = (struct list_head    *)list;
68873#line 321
68874  tmp = list_empty(__cil_tmp4);
68875  }
68876#line 321
68877  if (tmp) {
68878
68879  } else {
68880    {
68881#line 322
68882    __cil_tmp5 = (struct list_head    *)list;
68883#line 322
68884    __cil_tmp6 = *((struct list_head **)head);
68885#line 322
68886    __list_splice(__cil_tmp5, head, __cil_tmp6);
68887#line 323
68888    INIT_LIST_HEAD(list);
68889    }
68890  }
68891#line 325
68892  return;
68893}
68894}
68895#line 29 "include/linux/spinlock_api_smp.h"
68896extern void _raw_spin_lock_irq(raw_spinlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
68897#line 41
68898extern void _raw_spin_unlock_irq(raw_spinlock_t *lock )  __attribute__((__section__(".spinlock.text"))) ;
68899#line 308 "include/linux/spinlock.h"
68900__inline static void spin_lock_irq(spinlock_t *lock )  __attribute__((__no_instrument_function__)) ;
68901#line 308 "include/linux/spinlock.h"
68902__inline static void spin_lock_irq(spinlock_t *lock ) 
68903{ struct raw_spinlock *__cil_tmp2 ;
68904
68905  {
68906  {
68907#line 310
68908  __cil_tmp2 = (struct raw_spinlock *)lock;
68909#line 310
68910  _raw_spin_lock_irq(__cil_tmp2);
68911  }
68912#line 311
68913  return;
68914}
68915}
68916#line 333
68917__inline static void spin_unlock_irq(spinlock_t *lock )  __attribute__((__no_instrument_function__)) ;
68918#line 333 "include/linux/spinlock.h"
68919__inline static void spin_unlock_irq(spinlock_t *lock ) 
68920{ struct raw_spinlock *__cil_tmp2 ;
68921
68922  {
68923  {
68924#line 335
68925  __cil_tmp2 = (struct raw_spinlock *)lock;
68926#line 335
68927  _raw_spin_unlock_irq(__cil_tmp2);
68928  }
68929#line 336
68930  return;
68931}
68932}
68933#line 148 "include/linux/time.h"
68934extern void do_gettimeofday(struct timeval *tv ) ;
68935#line 156 "include/linux/workqueue.h"
68936extern void __init_work(struct work_struct *work , int onstack ) ;
68937#line 380
68938extern int schedule_work(struct work_struct *work ) ;
68939#line 392
68940extern bool cancel_work_sync(struct work_struct *work ) ;
68941#line 105 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
68942static void vmw_fence_obj_destroy_locked(struct kref *kref ) 
68943{ struct vmw_fence_obj *fence ;
68944  struct kref    *__mptr ;
68945  struct vmw_fence_manager *fman ;
68946  unsigned int num_fences ;
68947  struct vmw_fence_obj *__cil_tmp6 ;
68948  struct kref *__cil_tmp7 ;
68949  unsigned int __cil_tmp8 ;
68950  char *__cil_tmp9 ;
68951  char *__cil_tmp10 ;
68952  unsigned long __cil_tmp11 ;
68953  unsigned long __cil_tmp12 ;
68954  unsigned long __cil_tmp13 ;
68955  unsigned long __cil_tmp14 ;
68956  struct list_head *__cil_tmp15 ;
68957  int __cil_tmp16 ;
68958  int __cil_tmp17 ;
68959  unsigned long __cil_tmp18 ;
68960  unsigned long __cil_tmp19 ;
68961  spinlock_t *__cil_tmp20 ;
68962  unsigned long __cil_tmp21 ;
68963  unsigned long __cil_tmp22 ;
68964  unsigned long __cil_tmp23 ;
68965  unsigned long __cil_tmp24 ;
68966  void (*__cil_tmp25)(struct vmw_fence_obj *fence ) ;
68967  void    *__cil_tmp26 ;
68968  unsigned long __cil_tmp27 ;
68969  unsigned long __cil_tmp28 ;
68970  spinlock_t *__cil_tmp29 ;
68971
68972  {
68973  {
68974#line 108
68975  __mptr = (struct kref    *)kref;
68976#line 108
68977  __cil_tmp6 = (struct vmw_fence_obj *)0;
68978#line 108
68979  __cil_tmp7 = (struct kref *)__cil_tmp6;
68980#line 108
68981  __cil_tmp8 = (unsigned int )__cil_tmp7;
68982#line 108
68983  __cil_tmp9 = (char *)__mptr;
68984#line 108
68985  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
68986#line 108
68987  fence = (struct vmw_fence_obj *)__cil_tmp10;
68988#line 110
68989  __cil_tmp11 = (unsigned long )fence;
68990#line 110
68991  __cil_tmp12 = __cil_tmp11 + 8;
68992#line 110
68993  fman = *((struct vmw_fence_manager **)__cil_tmp12);
68994#line 113
68995  __cil_tmp13 = (unsigned long )fence;
68996#line 113
68997  __cil_tmp14 = __cil_tmp13 + 16;
68998#line 113
68999  __cil_tmp15 = (struct list_head *)__cil_tmp14;
69000#line 113
69001  list_del_init(__cil_tmp15);
69002#line 114
69003  __cil_tmp16 = *((int *)fman);
69004#line 114
69005  *((int *)fman) = __cil_tmp16 - 1;
69006#line 114
69007  __cil_tmp17 = *((int *)fman);
69008#line 114
69009  num_fences = (unsigned int )__cil_tmp17;
69010#line 115
69011  __cil_tmp18 = (unsigned long )fman;
69012#line 115
69013  __cil_tmp19 = __cil_tmp18 + 16;
69014#line 115
69015  __cil_tmp20 = (spinlock_t *)__cil_tmp19;
69016#line 115
69017  spin_unlock_irq(__cil_tmp20);
69018  }
69019  {
69020#line 116
69021  __cil_tmp21 = (unsigned long )fence;
69022#line 116
69023  __cil_tmp22 = __cil_tmp21 + 56;
69024#line 116
69025  if (*((void (**)(struct vmw_fence_obj *fence ))__cil_tmp22)) {
69026    {
69027#line 117
69028    __cil_tmp23 = (unsigned long )fence;
69029#line 117
69030    __cil_tmp24 = __cil_tmp23 + 56;
69031#line 117
69032    __cil_tmp25 = *((void (**)(struct vmw_fence_obj *fence ))__cil_tmp24);
69033#line 117
69034    (*__cil_tmp25)(fence);
69035    }
69036  } else {
69037    {
69038#line 119
69039    __cil_tmp26 = (void    *)fence;
69040#line 119
69041    kfree(__cil_tmp26);
69042    }
69043  }
69044  }
69045  {
69046#line 121
69047  __cil_tmp27 = (unsigned long )fman;
69048#line 121
69049  __cil_tmp28 = __cil_tmp27 + 16;
69050#line 121
69051  __cil_tmp29 = (spinlock_t *)__cil_tmp28;
69052#line 121
69053  spin_lock_irq(__cil_tmp29);
69054  }
69055#line 122
69056  return;
69057}
69058}
69059#line 131 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69060static void vmw_fence_work_func(struct work_struct *work ) 
69061{ struct vmw_fence_manager *fman ;
69062  struct work_struct    *__mptr ;
69063  struct list_head list ;
69064  struct vmw_fence_action *action ;
69065  struct vmw_fence_action *next_action ;
69066  bool seqno_valid ;
69067  int tmp___7 ;
69068  struct list_head    *__mptr___0 ;
69069  struct list_head    *__mptr___1 ;
69070  struct list_head    *__mptr___2 ;
69071  struct vmw_fence_manager *__cil_tmp12 ;
69072  unsigned long __cil_tmp13 ;
69073  unsigned long __cil_tmp14 ;
69074  struct work_struct *__cil_tmp15 ;
69075  unsigned int __cil_tmp16 ;
69076  char *__cil_tmp17 ;
69077  char *__cil_tmp18 ;
69078  unsigned long __cil_tmp19 ;
69079  unsigned long __cil_tmp20 ;
69080  struct mutex *__cil_tmp21 ;
69081  unsigned long __cil_tmp22 ;
69082  unsigned long __cil_tmp23 ;
69083  spinlock_t *__cil_tmp24 ;
69084  unsigned long __cil_tmp25 ;
69085  unsigned long __cil_tmp26 ;
69086  struct list_head *__cil_tmp27 ;
69087  unsigned long __cil_tmp28 ;
69088  unsigned long __cil_tmp29 ;
69089  unsigned long __cil_tmp30 ;
69090  unsigned long __cil_tmp31 ;
69091  spinlock_t *__cil_tmp32 ;
69092  unsigned long __cil_tmp33 ;
69093  unsigned long __cil_tmp34 ;
69094  unsigned long __cil_tmp35 ;
69095  unsigned long __cil_tmp36 ;
69096  unsigned long __cil_tmp37 ;
69097  unsigned long __cil_tmp38 ;
69098  struct vmw_private *__cil_tmp39 ;
69099  unsigned long __cil_tmp40 ;
69100  unsigned long __cil_tmp41 ;
69101  struct mutex *__cil_tmp42 ;
69102  struct list_head    *__cil_tmp43 ;
69103  struct list_head *__cil_tmp44 ;
69104  struct list_head *__cil_tmp45 ;
69105  struct vmw_fence_action *__cil_tmp46 ;
69106  struct list_head *__cil_tmp47 ;
69107  unsigned int __cil_tmp48 ;
69108  char *__cil_tmp49 ;
69109  char *__cil_tmp50 ;
69110  struct list_head *__cil_tmp51 ;
69111  struct vmw_fence_action *__cil_tmp52 ;
69112  struct list_head *__cil_tmp53 ;
69113  unsigned int __cil_tmp54 ;
69114  char *__cil_tmp55 ;
69115  char *__cil_tmp56 ;
69116  unsigned long __cil_tmp57 ;
69117  struct list_head *__cil_tmp58 ;
69118  unsigned long __cil_tmp59 ;
69119  struct list_head *__cil_tmp60 ;
69120  unsigned long __cil_tmp61 ;
69121  unsigned long __cil_tmp62 ;
69122  unsigned long __cil_tmp63 ;
69123  unsigned long __cil_tmp64 ;
69124  void (*__cil_tmp65)(struct vmw_fence_action *action ) ;
69125  struct list_head *__cil_tmp66 ;
69126  struct vmw_fence_action *__cil_tmp67 ;
69127  struct list_head *__cil_tmp68 ;
69128  unsigned int __cil_tmp69 ;
69129  char *__cil_tmp70 ;
69130  char *__cil_tmp71 ;
69131
69132  {
69133#line 134
69134  __mptr = (struct work_struct    *)work;
69135#line 134
69136  __cil_tmp12 = (struct vmw_fence_manager *)0;
69137#line 134
69138  __cil_tmp13 = (unsigned long )__cil_tmp12;
69139#line 134
69140  __cil_tmp14 = __cil_tmp13 + 56;
69141#line 134
69142  __cil_tmp15 = (struct work_struct *)__cil_tmp14;
69143#line 134
69144  __cil_tmp16 = (unsigned int )__cil_tmp15;
69145#line 134
69146  __cil_tmp17 = (char *)__mptr;
69147#line 134
69148  __cil_tmp18 = __cil_tmp17 - __cil_tmp16;
69149#line 134
69150  fman = (struct vmw_fence_manager *)__cil_tmp18;
69151  {
69152#line 139
69153  while (1) {
69154    while_continue: /* CIL Label */ ;
69155    {
69156#line 140
69157    INIT_LIST_HEAD(& list);
69158#line 141
69159    __cil_tmp19 = (unsigned long )fman;
69160#line 141
69161    __cil_tmp20 = __cil_tmp19 + 128;
69162#line 141
69163    __cil_tmp21 = (struct mutex *)__cil_tmp20;
69164#line 141
69165    mutex_lock(__cil_tmp21);
69166#line 143
69167    __cil_tmp22 = (unsigned long )fman;
69168#line 143
69169    __cil_tmp23 = __cil_tmp22 + 16;
69170#line 143
69171    __cil_tmp24 = (spinlock_t *)__cil_tmp23;
69172#line 143
69173    spin_lock_irq(__cil_tmp24);
69174#line 144
69175    __cil_tmp25 = (unsigned long )fman;
69176#line 144
69177    __cil_tmp26 = __cil_tmp25 + 104;
69178#line 144
69179    __cil_tmp27 = (struct list_head *)__cil_tmp26;
69180#line 144
69181    list_splice_init(__cil_tmp27, & list);
69182#line 145
69183    __cil_tmp28 = (unsigned long )fman;
69184#line 145
69185    __cil_tmp29 = __cil_tmp28 + 201;
69186#line 145
69187    seqno_valid = *((bool *)__cil_tmp29);
69188#line 146
69189    __cil_tmp30 = (unsigned long )fman;
69190#line 146
69191    __cil_tmp31 = __cil_tmp30 + 16;
69192#line 146
69193    __cil_tmp32 = (spinlock_t *)__cil_tmp31;
69194#line 146
69195    spin_unlock_irq(__cil_tmp32);
69196    }
69197#line 148
69198    if (! seqno_valid) {
69199      {
69200#line 148
69201      __cil_tmp33 = (unsigned long )fman;
69202#line 148
69203      __cil_tmp34 = __cil_tmp33 + 200;
69204#line 148
69205      if (*((bool *)__cil_tmp34)) {
69206        {
69207#line 149
69208        __cil_tmp35 = (unsigned long )fman;
69209#line 149
69210        __cil_tmp36 = __cil_tmp35 + 200;
69211#line 149
69212        *((bool *)__cil_tmp36) = (bool )0;
69213#line 150
69214        __cil_tmp37 = (unsigned long )fman;
69215#line 150
69216        __cil_tmp38 = __cil_tmp37 + 8;
69217#line 150
69218        __cil_tmp39 = *((struct vmw_private **)__cil_tmp38);
69219#line 150
69220        vmw_goal_waiter_remove(__cil_tmp39);
69221        }
69222      } else {
69223
69224      }
69225      }
69226    } else {
69227
69228    }
69229    {
69230#line 152
69231    __cil_tmp40 = (unsigned long )fman;
69232#line 152
69233    __cil_tmp41 = __cil_tmp40 + 128;
69234#line 152
69235    __cil_tmp42 = (struct mutex *)__cil_tmp41;
69236#line 152
69237    mutex_unlock(__cil_tmp42);
69238#line 154
69239    __cil_tmp43 = (struct list_head    *)(& list);
69240#line 154
69241    tmp___7 = list_empty(__cil_tmp43);
69242    }
69243#line 154
69244    if (tmp___7) {
69245#line 155
69246      return;
69247    } else {
69248
69249    }
69250#line 163
69251    __cil_tmp44 = & list;
69252#line 163
69253    __cil_tmp45 = *((struct list_head **)__cil_tmp44);
69254#line 163
69255    __mptr___0 = (struct list_head    *)__cil_tmp45;
69256#line 163
69257    __cil_tmp46 = (struct vmw_fence_action *)0;
69258#line 163
69259    __cil_tmp47 = (struct list_head *)__cil_tmp46;
69260#line 163
69261    __cil_tmp48 = (unsigned int )__cil_tmp47;
69262#line 163
69263    __cil_tmp49 = (char *)__mptr___0;
69264#line 163
69265    __cil_tmp50 = __cil_tmp49 - __cil_tmp48;
69266#line 163
69267    action = (struct vmw_fence_action *)__cil_tmp50;
69268#line 163
69269    __cil_tmp51 = *((struct list_head **)action);
69270#line 163
69271    __mptr___1 = (struct list_head    *)__cil_tmp51;
69272#line 163
69273    __cil_tmp52 = (struct vmw_fence_action *)0;
69274#line 163
69275    __cil_tmp53 = (struct list_head *)__cil_tmp52;
69276#line 163
69277    __cil_tmp54 = (unsigned int )__cil_tmp53;
69278#line 163
69279    __cil_tmp55 = (char *)__mptr___1;
69280#line 163
69281    __cil_tmp56 = __cil_tmp55 - __cil_tmp54;
69282#line 163
69283    next_action = (struct vmw_fence_action *)__cil_tmp56;
69284    {
69285#line 163
69286    while (1) {
69287      while_continue___0: /* CIL Label */ ;
69288      {
69289#line 163
69290      __cil_tmp57 = (unsigned long )(& list);
69291#line 163
69292      __cil_tmp58 = (struct list_head *)action;
69293#line 163
69294      __cil_tmp59 = (unsigned long )__cil_tmp58;
69295#line 163
69296      if (__cil_tmp59 != __cil_tmp57) {
69297
69298      } else {
69299#line 163
69300        goto while_break___0;
69301      }
69302      }
69303      {
69304#line 164
69305      __cil_tmp60 = (struct list_head *)action;
69306#line 164
69307      list_del_init(__cil_tmp60);
69308      }
69309      {
69310#line 165
69311      __cil_tmp61 = (unsigned long )action;
69312#line 165
69313      __cil_tmp62 = __cil_tmp61 + 32;
69314#line 165
69315      if (*((void (**)(struct vmw_fence_action *action ))__cil_tmp62)) {
69316        {
69317#line 166
69318        __cil_tmp63 = (unsigned long )action;
69319#line 166
69320        __cil_tmp64 = __cil_tmp63 + 32;
69321#line 166
69322        __cil_tmp65 = *((void (**)(struct vmw_fence_action *action ))__cil_tmp64);
69323#line 166
69324        (*__cil_tmp65)(action);
69325        }
69326      } else {
69327
69328      }
69329      }
69330#line 163
69331      action = next_action;
69332#line 163
69333      __cil_tmp66 = *((struct list_head **)next_action);
69334#line 163
69335      __mptr___2 = (struct list_head    *)__cil_tmp66;
69336#line 163
69337      __cil_tmp67 = (struct vmw_fence_action *)0;
69338#line 163
69339      __cil_tmp68 = (struct list_head *)__cil_tmp67;
69340#line 163
69341      __cil_tmp69 = (unsigned int )__cil_tmp68;
69342#line 163
69343      __cil_tmp70 = (char *)__mptr___2;
69344#line 163
69345      __cil_tmp71 = __cil_tmp70 - __cil_tmp69;
69346#line 163
69347      next_action = (struct vmw_fence_action *)__cil_tmp71;
69348    }
69349    while_break___0: /* CIL Label */ ;
69350    }
69351  }
69352  while_break: /* CIL Label */ ;
69353  }
69354}
69355}
69356#line 179 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69357static struct lock_class_key __key___19  ;
69358#line 188 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69359static struct lock_class_key __key___20  ;
69360#line 171 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69361struct vmw_fence_manager *vmw_fence_manager_init(struct vmw_private *dev_priv ) 
69362{ struct vmw_fence_manager *fman ;
69363  void *tmp___7 ;
69364  long tmp___8 ;
69365  atomic_long_t __r_expr_0 ;
69366  size_t tmp___9 ;
69367  size_t tmp___10 ;
69368  size_t tmp___11 ;
69369  void *__cil_tmp9 ;
69370  unsigned long __cil_tmp10 ;
69371  unsigned long __cil_tmp11 ;
69372  int __cil_tmp12 ;
69373  int __cil_tmp13 ;
69374  int __cil_tmp14 ;
69375  long __cil_tmp15 ;
69376  void *__cil_tmp16 ;
69377  unsigned long __cil_tmp17 ;
69378  unsigned long __cil_tmp18 ;
69379  unsigned long __cil_tmp19 ;
69380  unsigned long __cil_tmp20 ;
69381  spinlock_t *__cil_tmp21 ;
69382  unsigned long __cil_tmp22 ;
69383  unsigned long __cil_tmp23 ;
69384  struct raw_spinlock *__cil_tmp24 ;
69385  unsigned long __cil_tmp25 ;
69386  unsigned long __cil_tmp26 ;
69387  struct list_head *__cil_tmp27 ;
69388  unsigned long __cil_tmp28 ;
69389  unsigned long __cil_tmp29 ;
69390  struct list_head *__cil_tmp30 ;
69391  unsigned long __cil_tmp31 ;
69392  unsigned long __cil_tmp32 ;
69393  struct work_struct *__cil_tmp33 ;
69394  unsigned long __cil_tmp34 ;
69395  unsigned long __cil_tmp35 ;
69396  unsigned long __cil_tmp36 ;
69397  unsigned long __cil_tmp37 ;
69398  unsigned long __cil_tmp38 ;
69399  struct list_head *__cil_tmp39 ;
69400  unsigned long __cil_tmp40 ;
69401  unsigned long __cil_tmp41 ;
69402  unsigned long __cil_tmp42 ;
69403  unsigned long __cil_tmp43 ;
69404  unsigned long __cil_tmp44 ;
69405  unsigned long __cil_tmp45 ;
69406  unsigned long __cil_tmp46 ;
69407  unsigned long __cil_tmp47 ;
69408  unsigned long __cil_tmp48 ;
69409  unsigned long __cil_tmp49 ;
69410  unsigned long __cil_tmp50 ;
69411  unsigned long __cil_tmp51 ;
69412  unsigned long __cil_tmp52 ;
69413  struct mutex *__cil_tmp53 ;
69414  long __r_expr_0_counter54 ;
69415
69416  {
69417  {
69418#line 173
69419  tmp___7 = kzalloc(208UL, 208U);
69420#line 173
69421  fman = (struct vmw_fence_manager *)tmp___7;
69422#line 175
69423  __cil_tmp9 = (void *)0;
69424#line 175
69425  __cil_tmp10 = (unsigned long )__cil_tmp9;
69426#line 175
69427  __cil_tmp11 = (unsigned long )fman;
69428#line 175
69429  __cil_tmp12 = __cil_tmp11 == __cil_tmp10;
69430#line 175
69431  __cil_tmp13 = ! __cil_tmp12;
69432#line 175
69433  __cil_tmp14 = ! __cil_tmp13;
69434#line 175
69435  __cil_tmp15 = (long )__cil_tmp14;
69436#line 175
69437  tmp___8 = __builtin_expect(__cil_tmp15, 0L);
69438  }
69439#line 175
69440  if (tmp___8) {
69441    {
69442#line 176
69443    __cil_tmp16 = (void *)0;
69444#line 176
69445    return ((struct vmw_fence_manager *)__cil_tmp16);
69446    }
69447  } else {
69448
69449  }
69450#line 178
69451  __cil_tmp17 = (unsigned long )fman;
69452#line 178
69453  __cil_tmp18 = __cil_tmp17 + 8;
69454#line 178
69455  *((struct vmw_private **)__cil_tmp18) = dev_priv;
69456  {
69457#line 179
69458  while (1) {
69459    while_continue: /* CIL Label */ ;
69460    {
69461#line 179
69462    __cil_tmp19 = (unsigned long )fman;
69463#line 179
69464    __cil_tmp20 = __cil_tmp19 + 16;
69465#line 179
69466    __cil_tmp21 = (spinlock_t *)__cil_tmp20;
69467#line 179
69468    spinlock_check(__cil_tmp21);
69469    }
69470    {
69471#line 179
69472    while (1) {
69473      while_continue___0: /* CIL Label */ ;
69474      {
69475#line 179
69476      __cil_tmp22 = (unsigned long )fman;
69477#line 179
69478      __cil_tmp23 = __cil_tmp22 + 16;
69479#line 179
69480      __cil_tmp24 = (struct raw_spinlock *)__cil_tmp23;
69481#line 179
69482      __raw_spin_lock_init(__cil_tmp24, "&(&fman->lock)->rlock", & __key___19);
69483      }
69484#line 179
69485      goto while_break___0;
69486    }
69487    while_break___0: /* CIL Label */ ;
69488    }
69489#line 179
69490    goto while_break;
69491  }
69492  while_break: /* CIL Label */ ;
69493  }
69494  {
69495#line 180
69496  __cil_tmp25 = (unsigned long )fman;
69497#line 180
69498  __cil_tmp26 = __cil_tmp25 + 40;
69499#line 180
69500  __cil_tmp27 = (struct list_head *)__cil_tmp26;
69501#line 180
69502  INIT_LIST_HEAD(__cil_tmp27);
69503#line 181
69504  __cil_tmp28 = (unsigned long )fman;
69505#line 181
69506  __cil_tmp29 = __cil_tmp28 + 104;
69507#line 181
69508  __cil_tmp30 = (struct list_head *)__cil_tmp29;
69509#line 181
69510  INIT_LIST_HEAD(__cil_tmp30);
69511  }
69512  {
69513#line 182
69514  while (1) {
69515    while_continue___1: /* CIL Label */ ;
69516    {
69517#line 182
69518    while (1) {
69519      while_continue___2: /* CIL Label */ ;
69520      {
69521#line 182
69522      __cil_tmp31 = (unsigned long )fman;
69523#line 182
69524      __cil_tmp32 = __cil_tmp31 + 56;
69525#line 182
69526      __cil_tmp33 = (struct work_struct *)__cil_tmp32;
69527#line 182
69528      __init_work(__cil_tmp33, 0);
69529#line 182
69530      __r_expr_0_counter54 = 2097664L;
69531#line 182
69532      __cil_tmp34 = (unsigned long )fman;
69533#line 182
69534      __cil_tmp35 = __cil_tmp34 + 56;
69535#line 182
69536      ((atomic_long_t *)__cil_tmp35)->counter = __r_expr_0_counter54;
69537#line 182
69538      __cil_tmp36 = 56 + 8;
69539#line 182
69540      __cil_tmp37 = (unsigned long )fman;
69541#line 182
69542      __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
69543#line 182
69544      __cil_tmp39 = (struct list_head *)__cil_tmp38;
69545#line 182
69546      INIT_LIST_HEAD(__cil_tmp39);
69547      }
69548      {
69549#line 182
69550      while (1) {
69551        while_continue___3: /* CIL Label */ ;
69552#line 182
69553        __cil_tmp40 = 56 + 24;
69554#line 182
69555        __cil_tmp41 = (unsigned long )fman;
69556#line 182
69557        __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
69558#line 182
69559        *((void (**)(struct work_struct *work ))__cil_tmp42) = & vmw_fence_work_func;
69560#line 182
69561        goto while_break___3;
69562      }
69563      while_break___3: /* CIL Label */ ;
69564      }
69565#line 182
69566      goto while_break___2;
69567    }
69568    while_break___2: /* CIL Label */ ;
69569    }
69570#line 182
69571    goto while_break___1;
69572  }
69573  while_break___1: /* CIL Label */ ;
69574  }
69575  {
69576#line 183
69577  __cil_tmp43 = (unsigned long )fman;
69578#line 183
69579  __cil_tmp44 = __cil_tmp43 + 100;
69580#line 183
69581  *((bool *)__cil_tmp44) = (bool )1;
69582#line 184
69583  tmp___9 = ttm_round_pot(168UL);
69584#line 184
69585  __cil_tmp45 = (unsigned long )fman;
69586#line 184
69587  __cil_tmp46 = __cil_tmp45 + 88;
69588#line 184
69589  *((u32 *)__cil_tmp46) = (u32 )tmp___9;
69590#line 185
69591  tmp___10 = ttm_round_pot(104UL);
69592#line 185
69593  __cil_tmp47 = (unsigned long )fman;
69594#line 185
69595  __cil_tmp48 = __cil_tmp47 + 92;
69596#line 185
69597  *((u32 *)__cil_tmp48) = (u32 )tmp___10;
69598#line 186
69599  tmp___11 = ttm_round_pot(96UL);
69600#line 186
69601  __cil_tmp49 = (unsigned long )fman;
69602#line 186
69603  __cil_tmp50 = __cil_tmp49 + 96;
69604#line 186
69605  *((u32 *)__cil_tmp50) = (u32 )tmp___11;
69606  }
69607  {
69608#line 188
69609  while (1) {
69610    while_continue___4: /* CIL Label */ ;
69611    {
69612#line 188
69613    __cil_tmp51 = (unsigned long )fman;
69614#line 188
69615    __cil_tmp52 = __cil_tmp51 + 128;
69616#line 188
69617    __cil_tmp53 = (struct mutex *)__cil_tmp52;
69618#line 188
69619    __mutex_init(__cil_tmp53, "&fman->goal_irq_mutex", & __key___20);
69620    }
69621#line 188
69622    goto while_break___4;
69623  }
69624  while_break___4: /* CIL Label */ ;
69625  }
69626#line 190
69627  return (fman);
69628}
69629}
69630#line 193 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69631void vmw_fence_manager_takedown(struct vmw_fence_manager *fman ) 
69632{ unsigned long irq_flags ;
69633  bool lists_empty ;
69634  raw_spinlock_t *tmp___7 ;
69635  int tmp___8 ;
69636  int tmp___9 ;
69637  int tmp___10 ;
69638  long tmp___11 ;
69639  unsigned long __cil_tmp11 ;
69640  unsigned long __cil_tmp12 ;
69641  struct work_struct *__cil_tmp13 ;
69642  unsigned long __cil_tmp14 ;
69643  unsigned long __cil_tmp15 ;
69644  spinlock_t *__cil_tmp16 ;
69645  unsigned long __cil_tmp17 ;
69646  unsigned long __cil_tmp18 ;
69647  struct list_head *__cil_tmp19 ;
69648  struct list_head    *__cil_tmp20 ;
69649  unsigned long __cil_tmp21 ;
69650  unsigned long __cil_tmp22 ;
69651  struct list_head *__cil_tmp23 ;
69652  struct list_head    *__cil_tmp24 ;
69653  unsigned long __cil_tmp25 ;
69654  unsigned long __cil_tmp26 ;
69655  spinlock_t *__cil_tmp27 ;
69656  int __cil_tmp28 ;
69657  int __cil_tmp29 ;
69658  int __cil_tmp30 ;
69659  long __cil_tmp31 ;
69660  void    *__cil_tmp32 ;
69661
69662  {
69663  {
69664#line 198
69665  __cil_tmp11 = (unsigned long )fman;
69666#line 198
69667  __cil_tmp12 = __cil_tmp11 + 56;
69668#line 198
69669  __cil_tmp13 = (struct work_struct *)__cil_tmp12;
69670#line 198
69671  cancel_work_sync(__cil_tmp13);
69672  }
69673  {
69674#line 200
69675  while (1) {
69676    while_continue: /* CIL Label */ ;
69677    {
69678#line 200
69679    while (1) {
69680      while_continue___0: /* CIL Label */ ;
69681      {
69682#line 200
69683      __cil_tmp14 = (unsigned long )fman;
69684#line 200
69685      __cil_tmp15 = __cil_tmp14 + 16;
69686#line 200
69687      __cil_tmp16 = (spinlock_t *)__cil_tmp15;
69688#line 200
69689      tmp___7 = spinlock_check(__cil_tmp16);
69690#line 200
69691      irq_flags = _raw_spin_lock_irqsave(tmp___7);
69692      }
69693#line 200
69694      goto while_break___0;
69695    }
69696    while_break___0: /* CIL Label */ ;
69697    }
69698#line 200
69699    goto while_break;
69700  }
69701  while_break: /* CIL Label */ ;
69702  }
69703  {
69704#line 201
69705  __cil_tmp17 = (unsigned long )fman;
69706#line 201
69707  __cil_tmp18 = __cil_tmp17 + 40;
69708#line 201
69709  __cil_tmp19 = (struct list_head *)__cil_tmp18;
69710#line 201
69711  __cil_tmp20 = (struct list_head    *)__cil_tmp19;
69712#line 201
69713  tmp___8 = list_empty(__cil_tmp20);
69714  }
69715#line 201
69716  if (tmp___8) {
69717    {
69718#line 201
69719    __cil_tmp21 = (unsigned long )fman;
69720#line 201
69721    __cil_tmp22 = __cil_tmp21 + 104;
69722#line 201
69723    __cil_tmp23 = (struct list_head *)__cil_tmp22;
69724#line 201
69725    __cil_tmp24 = (struct list_head    *)__cil_tmp23;
69726#line 201
69727    tmp___9 = list_empty(__cil_tmp24);
69728    }
69729#line 201
69730    if (tmp___9) {
69731#line 201
69732      tmp___10 = 1;
69733    } else {
69734#line 201
69735      tmp___10 = 0;
69736    }
69737  } else {
69738#line 201
69739    tmp___10 = 0;
69740  }
69741  {
69742#line 201
69743  lists_empty = (bool )tmp___10;
69744#line 203
69745  __cil_tmp25 = (unsigned long )fman;
69746#line 203
69747  __cil_tmp26 = __cil_tmp25 + 16;
69748#line 203
69749  __cil_tmp27 = (spinlock_t *)__cil_tmp26;
69750#line 203
69751  spin_unlock_irqrestore(__cil_tmp27, irq_flags);
69752  }
69753  {
69754#line 205
69755  while (1) {
69756    while_continue___1: /* CIL Label */ ;
69757    {
69758#line 205
69759    __cil_tmp28 = ! lists_empty;
69760#line 205
69761    __cil_tmp29 = ! __cil_tmp28;
69762#line 205
69763    __cil_tmp30 = ! __cil_tmp29;
69764#line 205
69765    __cil_tmp31 = (long )__cil_tmp30;
69766#line 205
69767    tmp___11 = __builtin_expect(__cil_tmp31, 0L);
69768    }
69769#line 205
69770    if (tmp___11) {
69771      {
69772#line 205
69773      while (1) {
69774        while_continue___2: /* CIL Label */ ;
69775#line 205
69776        __asm__  volatile   ("1:\tud2\n"
69777                             ".pushsection __bug_table,\"a\"\n"
69778                             "2:\t.long 1b - 2b, %c0 - 2b\n"
69779                             "\t.word %c1, 0\n"
69780                             "\t.org 2b+%c2\n"
69781                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"),
69782                             "i" (205), "i" (12UL));
69783        {
69784#line 205
69785        while (1) {
69786          while_continue___3: /* CIL Label */ ;
69787        }
69788        while_break___3: /* CIL Label */ ;
69789        }
69790#line 205
69791        goto while_break___2;
69792      }
69793      while_break___2: /* CIL Label */ ;
69794      }
69795    } else {
69796
69797    }
69798#line 205
69799    goto while_break___1;
69800  }
69801  while_break___1: /* CIL Label */ ;
69802  }
69803  {
69804#line 206
69805  __cil_tmp32 = (void    *)fman;
69806#line 206
69807  kfree(__cil_tmp32);
69808  }
69809#line 207
69810  return;
69811}
69812}
69813#line 226 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69814static struct lock_class_key __key___21  ;
69815#line 209 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
69816static int vmw_fence_obj_init(struct vmw_fence_manager *fman , struct vmw_fence_obj *fence ,
69817                              u32 seqno , uint32_t mask , void (*destroy)(struct vmw_fence_obj *fence ) ) 
69818{ unsigned long irq_flags ;
69819  unsigned int num_fences ;
69820  int ret ;
69821  raw_spinlock_t *tmp___7 ;
69822  long tmp___8 ;
69823  unsigned long __cil_tmp13 ;
69824  unsigned long __cil_tmp14 ;
69825  unsigned long __cil_tmp15 ;
69826  unsigned long __cil_tmp16 ;
69827  struct list_head *__cil_tmp17 ;
69828  unsigned long __cil_tmp18 ;
69829  unsigned long __cil_tmp19 ;
69830  unsigned long __cil_tmp20 ;
69831  unsigned long __cil_tmp21 ;
69832  unsigned long __cil_tmp22 ;
69833  unsigned long __cil_tmp23 ;
69834  struct kref *__cil_tmp24 ;
69835  unsigned long __cil_tmp25 ;
69836  unsigned long __cil_tmp26 ;
69837  unsigned long __cil_tmp27 ;
69838  unsigned long __cil_tmp28 ;
69839  wait_queue_head_t *__cil_tmp29 ;
69840  unsigned long __cil_tmp30 ;
69841  unsigned long __cil_tmp31 ;
69842  spinlock_t *__cil_tmp32 ;
69843  unsigned long __cil_tmp33 ;
69844  unsigned long __cil_tmp34 ;
69845  bool __cil_tmp35 ;
69846  int __cil_tmp36 ;
69847  int __cil_tmp37 ;
69848  long __cil_tmp38 ;
69849  unsigned long __cil_tmp39 ;
69850  unsigned long __cil_tmp40 ;
69851  struct list_head *__cil_tmp41 ;
69852  unsigned long __cil_tmp42 ;
69853  unsigned long __cil_tmp43 ;
69854  struct list_head *__cil_tmp44 ;
69855  int __cil_tmp45 ;
69856  int __cil_tmp46 ;
69857  unsigned long __cil_tmp47 ;
69858  unsigned long __cil_tmp48 ;
69859  spinlock_t *__cil_tmp49 ;
69860
69861  {
69862  {
69863#line 217
69864  ret = 0;
69865#line 219
69866  __cil_tmp13 = (unsigned long )fence;
69867#line 219
69868  __cil_tmp14 = __cil_tmp13 + 4;
69869#line 219
69870  *((u32 *)__cil_tmp14) = seqno;
69871#line 220
69872  __cil_tmp15 = (unsigned long )fence;
69873#line 220
69874  __cil_tmp16 = __cil_tmp15 + 40;
69875#line 220
69876  __cil_tmp17 = (struct list_head *)__cil_tmp16;
69877#line 220
69878  INIT_LIST_HEAD(__cil_tmp17);
69879#line 221
69880  __cil_tmp18 = (unsigned long )fence;
69881#line 221
69882  __cil_tmp19 = __cil_tmp18 + 8;
69883#line 221
69884  *((struct vmw_fence_manager **)__cil_tmp19) = fman;
69885#line 222
69886  __cil_tmp20 = (unsigned long )fence;
69887#line 222
69888  __cil_tmp21 = __cil_tmp20 + 32;
69889#line 222
69890  *((uint32_t *)__cil_tmp21) = (uint32_t )0;
69891#line 223
69892  __cil_tmp22 = (unsigned long )fence;
69893#line 223
69894  __cil_tmp23 = __cil_tmp22 + 36;
69895#line 223
69896  *((uint32_t *)__cil_tmp23) = mask;
69897#line 224
69898  __cil_tmp24 = (struct kref *)fence;
69899#line 224
69900  kref_init(__cil_tmp24);
69901#line 225
69902  __cil_tmp25 = (unsigned long )fence;
69903#line 225
69904  __cil_tmp26 = __cil_tmp25 + 56;
69905#line 225
69906  *((void (**)(struct vmw_fence_obj *fence ))__cil_tmp26) = destroy;
69907  }
69908  {
69909#line 226
69910  while (1) {
69911    while_continue: /* CIL Label */ ;
69912    {
69913#line 226
69914    __cil_tmp27 = (unsigned long )fence;
69915#line 226
69916    __cil_tmp28 = __cil_tmp27 + 64;
69917#line 226
69918    __cil_tmp29 = (wait_queue_head_t *)__cil_tmp28;
69919#line 226
69920    __init_waitqueue_head(__cil_tmp29, "&fence->queue", & __key___21);
69921    }
69922#line 226
69923    goto while_break;
69924  }
69925  while_break: /* CIL Label */ ;
69926  }
69927  {
69928#line 228
69929  while (1) {
69930    while_continue___0: /* CIL Label */ ;
69931    {
69932#line 228
69933    while (1) {
69934      while_continue___1: /* CIL Label */ ;
69935      {
69936#line 228
69937      __cil_tmp30 = (unsigned long )fman;
69938#line 228
69939      __cil_tmp31 = __cil_tmp30 + 16;
69940#line 228
69941      __cil_tmp32 = (spinlock_t *)__cil_tmp31;
69942#line 228
69943      tmp___7 = spinlock_check(__cil_tmp32);
69944#line 228
69945      irq_flags = _raw_spin_lock_irqsave(tmp___7);
69946      }
69947#line 228
69948      goto while_break___1;
69949    }
69950    while_break___1: /* CIL Label */ ;
69951    }
69952#line 228
69953    goto while_break___0;
69954  }
69955  while_break___0: /* CIL Label */ ;
69956  }
69957  {
69958#line 229
69959  __cil_tmp33 = (unsigned long )fman;
69960#line 229
69961  __cil_tmp34 = __cil_tmp33 + 100;
69962#line 229
69963  __cil_tmp35 = *((bool *)__cil_tmp34);
69964#line 229
69965  __cil_tmp36 = ! __cil_tmp35;
69966#line 229
69967  __cil_tmp37 = ! __cil_tmp36;
69968#line 229
69969  __cil_tmp38 = (long )__cil_tmp37;
69970#line 229
69971  tmp___8 = __builtin_expect(__cil_tmp38, 0L);
69972  }
69973#line 229
69974  if (tmp___8) {
69975#line 230
69976    ret = -16;
69977#line 231
69978    goto out_unlock;
69979  } else {
69980
69981  }
69982  {
69983#line 233
69984  __cil_tmp39 = (unsigned long )fence;
69985#line 233
69986  __cil_tmp40 = __cil_tmp39 + 16;
69987#line 233
69988  __cil_tmp41 = (struct list_head *)__cil_tmp40;
69989#line 233
69990  __cil_tmp42 = (unsigned long )fman;
69991#line 233
69992  __cil_tmp43 = __cil_tmp42 + 40;
69993#line 233
69994  __cil_tmp44 = (struct list_head *)__cil_tmp43;
69995#line 233
69996  list_add_tail(__cil_tmp41, __cil_tmp44);
69997#line 234
69998  __cil_tmp45 = *((int *)fman);
69999#line 234
70000  *((int *)fman) = __cil_tmp45 + 1;
70001#line 234
70002  __cil_tmp46 = *((int *)fman);
70003#line 234
70004  num_fences = (unsigned int )__cil_tmp46;
70005  }
70006  out_unlock: 
70007  {
70008#line 237
70009  __cil_tmp47 = (unsigned long )fman;
70010#line 237
70011  __cil_tmp48 = __cil_tmp47 + 16;
70012#line 237
70013  __cil_tmp49 = (spinlock_t *)__cil_tmp48;
70014#line 237
70015  spin_unlock_irqrestore(__cil_tmp49, irq_flags);
70016  }
70017#line 238
70018  return (ret);
70019}
70020}
70021#line 242 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70022struct vmw_fence_obj *vmw_fence_obj_reference(struct vmw_fence_obj *fence ) 
70023{ long tmp___7 ;
70024  void *__cil_tmp3 ;
70025  unsigned long __cil_tmp4 ;
70026  unsigned long __cil_tmp5 ;
70027  int __cil_tmp6 ;
70028  int __cil_tmp7 ;
70029  int __cil_tmp8 ;
70030  long __cil_tmp9 ;
70031  void *__cil_tmp10 ;
70032  struct kref *__cil_tmp11 ;
70033
70034  {
70035  {
70036#line 244
70037  __cil_tmp3 = (void *)0;
70038#line 244
70039  __cil_tmp4 = (unsigned long )__cil_tmp3;
70040#line 244
70041  __cil_tmp5 = (unsigned long )fence;
70042#line 244
70043  __cil_tmp6 = __cil_tmp5 == __cil_tmp4;
70044#line 244
70045  __cil_tmp7 = ! __cil_tmp6;
70046#line 244
70047  __cil_tmp8 = ! __cil_tmp7;
70048#line 244
70049  __cil_tmp9 = (long )__cil_tmp8;
70050#line 244
70051  tmp___7 = __builtin_expect(__cil_tmp9, 0L);
70052  }
70053#line 244
70054  if (tmp___7) {
70055    {
70056#line 245
70057    __cil_tmp10 = (void *)0;
70058#line 245
70059    return ((struct vmw_fence_obj *)__cil_tmp10);
70060    }
70061  } else {
70062
70063  }
70064  {
70065#line 247
70066  __cil_tmp11 = (struct kref *)fence;
70067#line 247
70068  kref_get(__cil_tmp11);
70069  }
70070#line 248
70071  return (fence);
70072}
70073}
70074#line 258 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70075void vmw_fence_obj_unreference(struct vmw_fence_obj **fence_p ) 
70076{ struct vmw_fence_obj *fence ;
70077  struct vmw_fence_manager *fman ;
70078  long tmp___7 ;
70079  int tmp___8 ;
70080  int tmp___9 ;
70081  long tmp___10 ;
70082  void *__cil_tmp8 ;
70083  unsigned long __cil_tmp9 ;
70084  unsigned long __cil_tmp10 ;
70085  int __cil_tmp11 ;
70086  int __cil_tmp12 ;
70087  int __cil_tmp13 ;
70088  long __cil_tmp14 ;
70089  unsigned long __cil_tmp15 ;
70090  unsigned long __cil_tmp16 ;
70091  void *__cil_tmp17 ;
70092  unsigned long __cil_tmp18 ;
70093  unsigned long __cil_tmp19 ;
70094  spinlock_t *__cil_tmp20 ;
70095  atomic_t *__cil_tmp21 ;
70096  atomic_t    *__cil_tmp22 ;
70097  long __cil_tmp23 ;
70098  struct kref *__cil_tmp24 ;
70099  unsigned long __cil_tmp25 ;
70100  unsigned long __cil_tmp26 ;
70101  spinlock_t *__cil_tmp27 ;
70102
70103  {
70104  {
70105#line 260
70106  fence = *fence_p;
70107#line 263
70108  __cil_tmp8 = (void *)0;
70109#line 263
70110  __cil_tmp9 = (unsigned long )__cil_tmp8;
70111#line 263
70112  __cil_tmp10 = (unsigned long )fence;
70113#line 263
70114  __cil_tmp11 = __cil_tmp10 == __cil_tmp9;
70115#line 263
70116  __cil_tmp12 = ! __cil_tmp11;
70117#line 263
70118  __cil_tmp13 = ! __cil_tmp12;
70119#line 263
70120  __cil_tmp14 = (long )__cil_tmp13;
70121#line 263
70122  tmp___7 = __builtin_expect(__cil_tmp14, 0L);
70123  }
70124#line 263
70125  if (tmp___7) {
70126#line 264
70127    return;
70128  } else {
70129
70130  }
70131  {
70132#line 266
70133  __cil_tmp15 = (unsigned long )fence;
70134#line 266
70135  __cil_tmp16 = __cil_tmp15 + 8;
70136#line 266
70137  fman = *((struct vmw_fence_manager **)__cil_tmp16);
70138#line 267
70139  __cil_tmp17 = (void *)0;
70140#line 267
70141  *fence_p = (struct vmw_fence_obj *)__cil_tmp17;
70142#line 268
70143  __cil_tmp18 = (unsigned long )fman;
70144#line 268
70145  __cil_tmp19 = __cil_tmp18 + 16;
70146#line 268
70147  __cil_tmp20 = (spinlock_t *)__cil_tmp19;
70148#line 268
70149  spin_lock_irq(__cil_tmp20);
70150  }
70151  {
70152#line 269
70153  while (1) {
70154    while_continue: /* CIL Label */ ;
70155    {
70156#line 269
70157    __cil_tmp21 = (atomic_t *)fence;
70158#line 269
70159    __cil_tmp22 = (atomic_t    *)__cil_tmp21;
70160#line 269
70161    tmp___8 = atomic_read(__cil_tmp22);
70162    }
70163#line 269
70164    if (tmp___8 == 0) {
70165#line 269
70166      tmp___9 = 1;
70167    } else {
70168#line 269
70169      tmp___9 = 0;
70170    }
70171    {
70172#line 269
70173    __cil_tmp23 = (long )tmp___9;
70174#line 269
70175    tmp___10 = __builtin_expect(__cil_tmp23, 0L);
70176    }
70177#line 269
70178    if (tmp___10) {
70179      {
70180#line 269
70181      while (1) {
70182        while_continue___0: /* CIL Label */ ;
70183#line 269
70184        __asm__  volatile   ("1:\tud2\n"
70185                             ".pushsection __bug_table,\"a\"\n"
70186                             "2:\t.long 1b - 2b, %c0 - 2b\n"
70187                             "\t.word %c1, 0\n"
70188                             "\t.org 2b+%c2\n"
70189                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"),
70190                             "i" (269), "i" (12UL));
70191        {
70192#line 269
70193        while (1) {
70194          while_continue___1: /* CIL Label */ ;
70195        }
70196        while_break___1: /* CIL Label */ ;
70197        }
70198#line 269
70199        goto while_break___0;
70200      }
70201      while_break___0: /* CIL Label */ ;
70202      }
70203    } else {
70204
70205    }
70206#line 269
70207    goto while_break;
70208  }
70209  while_break: /* CIL Label */ ;
70210  }
70211  {
70212#line 270
70213  __cil_tmp24 = (struct kref *)fence;
70214#line 270
70215  kref_put(__cil_tmp24, & vmw_fence_obj_destroy_locked);
70216#line 271
70217  __cil_tmp25 = (unsigned long )fman;
70218#line 271
70219  __cil_tmp26 = __cil_tmp25 + 16;
70220#line 271
70221  __cil_tmp27 = (spinlock_t *)__cil_tmp26;
70222#line 271
70223  spin_unlock_irq(__cil_tmp27);
70224  }
70225#line 272
70226  return;
70227}
70228}
70229#line 274 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70230void vmw_fences_perform_actions(struct vmw_fence_manager *fman , struct list_head *list ) 
70231{ struct vmw_fence_action *action ;
70232  struct vmw_fence_action *next_action ;
70233  struct list_head    *__mptr ;
70234  struct list_head    *__mptr___0 ;
70235  struct list_head    *__mptr___1 ;
70236  struct list_head *__cil_tmp8 ;
70237  struct vmw_fence_action *__cil_tmp9 ;
70238  struct list_head *__cil_tmp10 ;
70239  unsigned int __cil_tmp11 ;
70240  char *__cil_tmp12 ;
70241  char *__cil_tmp13 ;
70242  struct list_head *__cil_tmp14 ;
70243  struct vmw_fence_action *__cil_tmp15 ;
70244  struct list_head *__cil_tmp16 ;
70245  unsigned int __cil_tmp17 ;
70246  char *__cil_tmp18 ;
70247  char *__cil_tmp19 ;
70248  unsigned long __cil_tmp20 ;
70249  struct list_head *__cil_tmp21 ;
70250  unsigned long __cil_tmp22 ;
70251  struct list_head *__cil_tmp23 ;
70252  unsigned long __cil_tmp24 ;
70253  unsigned long __cil_tmp25 ;
70254  enum vmw_action_type __cil_tmp26 ;
70255  unsigned long __cil_tmp27 ;
70256  unsigned long __cil_tmp28 ;
70257  unsigned long __cil_tmp29 ;
70258  unsigned long __cil_tmp30 ;
70259  unsigned long __cil_tmp31 ;
70260  unsigned long __cil_tmp32 ;
70261  enum vmw_action_type __cil_tmp33 ;
70262  unsigned long __cil_tmp34 ;
70263  unsigned long __cil_tmp35 ;
70264  unsigned long __cil_tmp36 ;
70265  unsigned long __cil_tmp37 ;
70266  uint32_t __cil_tmp38 ;
70267  void *__cil_tmp39 ;
70268  unsigned long __cil_tmp40 ;
70269  unsigned long __cil_tmp41 ;
70270  unsigned long __cil_tmp42 ;
70271  void (*__cil_tmp43)(struct vmw_fence_action *action ) ;
70272  unsigned long __cil_tmp44 ;
70273  unsigned long __cil_tmp45 ;
70274  unsigned long __cil_tmp46 ;
70275  void (*__cil_tmp47)(struct vmw_fence_action *action ) ;
70276  struct list_head *__cil_tmp48 ;
70277  unsigned long __cil_tmp49 ;
70278  unsigned long __cil_tmp50 ;
70279  struct list_head *__cil_tmp51 ;
70280  struct list_head *__cil_tmp52 ;
70281  struct vmw_fence_action *__cil_tmp53 ;
70282  struct list_head *__cil_tmp54 ;
70283  unsigned int __cil_tmp55 ;
70284  char *__cil_tmp56 ;
70285  char *__cil_tmp57 ;
70286
70287  {
70288#line 279
70289  __cil_tmp8 = *((struct list_head **)list);
70290#line 279
70291  __mptr = (struct list_head    *)__cil_tmp8;
70292#line 279
70293  __cil_tmp9 = (struct vmw_fence_action *)0;
70294#line 279
70295  __cil_tmp10 = (struct list_head *)__cil_tmp9;
70296#line 279
70297  __cil_tmp11 = (unsigned int )__cil_tmp10;
70298#line 279
70299  __cil_tmp12 = (char *)__mptr;
70300#line 279
70301  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
70302#line 279
70303  action = (struct vmw_fence_action *)__cil_tmp13;
70304#line 279
70305  __cil_tmp14 = *((struct list_head **)action);
70306#line 279
70307  __mptr___0 = (struct list_head    *)__cil_tmp14;
70308#line 279
70309  __cil_tmp15 = (struct vmw_fence_action *)0;
70310#line 279
70311  __cil_tmp16 = (struct list_head *)__cil_tmp15;
70312#line 279
70313  __cil_tmp17 = (unsigned int )__cil_tmp16;
70314#line 279
70315  __cil_tmp18 = (char *)__mptr___0;
70316#line 279
70317  __cil_tmp19 = __cil_tmp18 - __cil_tmp17;
70318#line 279
70319  next_action = (struct vmw_fence_action *)__cil_tmp19;
70320  {
70321#line 279
70322  while (1) {
70323    while_continue: /* CIL Label */ ;
70324    {
70325#line 279
70326    __cil_tmp20 = (unsigned long )list;
70327#line 279
70328    __cil_tmp21 = (struct list_head *)action;
70329#line 279
70330    __cil_tmp22 = (unsigned long )__cil_tmp21;
70331#line 279
70332    if (__cil_tmp22 != __cil_tmp20) {
70333
70334    } else {
70335#line 279
70336      goto while_break;
70337    }
70338    }
70339    {
70340#line 280
70341    __cil_tmp23 = (struct list_head *)action;
70342#line 280
70343    list_del_init(__cil_tmp23);
70344#line 281
70345    __cil_tmp24 = (unsigned long )action;
70346#line 281
70347    __cil_tmp25 = __cil_tmp24 + 16;
70348#line 281
70349    __cil_tmp26 = *((enum vmw_action_type *)__cil_tmp25);
70350#line 281
70351    __cil_tmp27 = __cil_tmp26 * 4UL;
70352#line 281
70353    __cil_tmp28 = 120 + __cil_tmp27;
70354#line 281
70355    __cil_tmp29 = (unsigned long )fman;
70356#line 281
70357    __cil_tmp30 = __cil_tmp29 + __cil_tmp28;
70358#line 281
70359    __cil_tmp31 = (unsigned long )action;
70360#line 281
70361    __cil_tmp32 = __cil_tmp31 + 16;
70362#line 281
70363    __cil_tmp33 = *((enum vmw_action_type *)__cil_tmp32);
70364#line 281
70365    __cil_tmp34 = __cil_tmp33 * 4UL;
70366#line 281
70367    __cil_tmp35 = 120 + __cil_tmp34;
70368#line 281
70369    __cil_tmp36 = (unsigned long )fman;
70370#line 281
70371    __cil_tmp37 = __cil_tmp36 + __cil_tmp35;
70372#line 281
70373    __cil_tmp38 = *((uint32_t *)__cil_tmp37);
70374#line 281
70375    *((uint32_t *)__cil_tmp30) = __cil_tmp38 - 1U;
70376    }
70377    {
70378#line 282
70379    __cil_tmp39 = (void *)0;
70380#line 282
70381    __cil_tmp40 = (unsigned long )__cil_tmp39;
70382#line 282
70383    __cil_tmp41 = (unsigned long )action;
70384#line 282
70385    __cil_tmp42 = __cil_tmp41 + 24;
70386#line 282
70387    __cil_tmp43 = *((void (**)(struct vmw_fence_action *action ))__cil_tmp42);
70388#line 282
70389    __cil_tmp44 = (unsigned long )__cil_tmp43;
70390#line 282
70391    if (__cil_tmp44 != __cil_tmp40) {
70392      {
70393#line 283
70394      __cil_tmp45 = (unsigned long )action;
70395#line 283
70396      __cil_tmp46 = __cil_tmp45 + 24;
70397#line 283
70398      __cil_tmp47 = *((void (**)(struct vmw_fence_action *action ))__cil_tmp46);
70399#line 283
70400      (*__cil_tmp47)(action);
70401      }
70402    } else {
70403
70404    }
70405    }
70406    {
70407#line 290
70408    __cil_tmp48 = (struct list_head *)action;
70409#line 290
70410    __cil_tmp49 = (unsigned long )fman;
70411#line 290
70412    __cil_tmp50 = __cil_tmp49 + 104;
70413#line 290
70414    __cil_tmp51 = (struct list_head *)__cil_tmp50;
70415#line 290
70416    list_add_tail(__cil_tmp48, __cil_tmp51);
70417#line 279
70418    action = next_action;
70419#line 279
70420    __cil_tmp52 = *((struct list_head **)next_action);
70421#line 279
70422    __mptr___1 = (struct list_head    *)__cil_tmp52;
70423#line 279
70424    __cil_tmp53 = (struct vmw_fence_action *)0;
70425#line 279
70426    __cil_tmp54 = (struct list_head *)__cil_tmp53;
70427#line 279
70428    __cil_tmp55 = (unsigned int )__cil_tmp54;
70429#line 279
70430    __cil_tmp56 = (char *)__mptr___1;
70431#line 279
70432    __cil_tmp57 = __cil_tmp56 - __cil_tmp55;
70433#line 279
70434    next_action = (struct vmw_fence_action *)__cil_tmp57;
70435    }
70436  }
70437  while_break: /* CIL Label */ ;
70438  }
70439#line 292
70440  return;
70441}
70442}
70443#line 310 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70444static bool vmw_fence_goal_new_locked(struct vmw_fence_manager *fman , u32 passed_seqno ) 
70445{ u32 goal_seqno ;
70446  __le32 *fifo_mem ;
70447  struct vmw_fence_obj *fence ;
70448  long tmp___7 ;
70449  long tmp___8 ;
70450  struct list_head    *__mptr ;
70451  struct list_head    *__mptr___0 ;
70452  int tmp___9 ;
70453  unsigned long __cil_tmp11 ;
70454  unsigned long __cil_tmp12 ;
70455  bool __cil_tmp13 ;
70456  int __cil_tmp14 ;
70457  int __cil_tmp15 ;
70458  int __cil_tmp16 ;
70459  long __cil_tmp17 ;
70460  unsigned long __cil_tmp18 ;
70461  unsigned long __cil_tmp19 ;
70462  struct vmw_private *__cil_tmp20 ;
70463  unsigned long __cil_tmp21 ;
70464  unsigned long __cil_tmp22 ;
70465  __le32 *__cil_tmp23 ;
70466  void *__cil_tmp24 ;
70467  int __cil_tmp25 ;
70468  u32 __cil_tmp26 ;
70469  u32 __cil_tmp27 ;
70470  int __cil_tmp28 ;
70471  int __cil_tmp29 ;
70472  int __cil_tmp30 ;
70473  long __cil_tmp31 ;
70474  unsigned long __cil_tmp32 ;
70475  unsigned long __cil_tmp33 ;
70476  unsigned long __cil_tmp34 ;
70477  unsigned long __cil_tmp35 ;
70478  struct list_head *__cil_tmp36 ;
70479  struct vmw_fence_obj *__cil_tmp37 ;
70480  unsigned long __cil_tmp38 ;
70481  unsigned long __cil_tmp39 ;
70482  struct list_head *__cil_tmp40 ;
70483  unsigned int __cil_tmp41 ;
70484  char *__cil_tmp42 ;
70485  char *__cil_tmp43 ;
70486  unsigned long __cil_tmp44 ;
70487  unsigned long __cil_tmp45 ;
70488  struct list_head *__cil_tmp46 ;
70489  unsigned long __cil_tmp47 ;
70490  unsigned long __cil_tmp48 ;
70491  unsigned long __cil_tmp49 ;
70492  struct list_head *__cil_tmp50 ;
70493  unsigned long __cil_tmp51 ;
70494  unsigned long __cil_tmp52 ;
70495  unsigned long __cil_tmp53 ;
70496  struct list_head *__cil_tmp54 ;
70497  struct list_head    *__cil_tmp55 ;
70498  unsigned long __cil_tmp56 ;
70499  unsigned long __cil_tmp57 ;
70500  unsigned long __cil_tmp58 ;
70501  unsigned long __cil_tmp59 ;
70502  u32 __cil_tmp60 ;
70503  __le32 *__cil_tmp61 ;
70504  void *__cil_tmp62 ;
70505  unsigned long __cil_tmp63 ;
70506  unsigned long __cil_tmp64 ;
70507  struct list_head *__cil_tmp65 ;
70508  struct vmw_fence_obj *__cil_tmp66 ;
70509  unsigned long __cil_tmp67 ;
70510  unsigned long __cil_tmp68 ;
70511  struct list_head *__cil_tmp69 ;
70512  unsigned int __cil_tmp70 ;
70513  char *__cil_tmp71 ;
70514  char *__cil_tmp72 ;
70515
70516  {
70517  {
70518#line 317
70519  __cil_tmp11 = (unsigned long )fman;
70520#line 317
70521  __cil_tmp12 = __cil_tmp11 + 201;
70522#line 317
70523  __cil_tmp13 = *((bool *)__cil_tmp12);
70524#line 317
70525  __cil_tmp14 = ! __cil_tmp13;
70526#line 317
70527  __cil_tmp15 = ! __cil_tmp14;
70528#line 317
70529  __cil_tmp16 = ! __cil_tmp15;
70530#line 317
70531  __cil_tmp17 = (long )__cil_tmp16;
70532#line 317
70533  tmp___7 = __builtin_expect(__cil_tmp17, 1L);
70534  }
70535#line 317
70536  if (tmp___7) {
70537#line 318
70538    return ((bool )0);
70539  } else {
70540
70541  }
70542  {
70543#line 320
70544  __cil_tmp18 = (unsigned long )fman;
70545#line 320
70546  __cil_tmp19 = __cil_tmp18 + 8;
70547#line 320
70548  __cil_tmp20 = *((struct vmw_private **)__cil_tmp19);
70549#line 320
70550  __cil_tmp21 = (unsigned long )__cil_tmp20;
70551#line 320
70552  __cil_tmp22 = __cil_tmp21 + 2144;
70553#line 320
70554  fifo_mem = *((__le32 **)__cil_tmp22);
70555#line 321
70556  __cil_tmp23 = fifo_mem + 289;
70557#line 321
70558  __cil_tmp24 = (void *)__cil_tmp23;
70559#line 321
70560  goal_seqno = ioread32(__cil_tmp24);
70561#line 322
70562  __cil_tmp25 = 1 << 31;
70563#line 322
70564  __cil_tmp26 = (u32 )__cil_tmp25;
70565#line 322
70566  __cil_tmp27 = passed_seqno - goal_seqno;
70567#line 322
70568  __cil_tmp28 = __cil_tmp27 >= __cil_tmp26;
70569#line 322
70570  __cil_tmp29 = ! __cil_tmp28;
70571#line 322
70572  __cil_tmp30 = ! __cil_tmp29;
70573#line 322
70574  __cil_tmp31 = (long )__cil_tmp30;
70575#line 322
70576  tmp___8 = __builtin_expect(__cil_tmp31, 1L);
70577  }
70578#line 322
70579  if (tmp___8) {
70580#line 323
70581    return ((bool )0);
70582  } else {
70583
70584  }
70585#line 325
70586  __cil_tmp32 = (unsigned long )fman;
70587#line 325
70588  __cil_tmp33 = __cil_tmp32 + 201;
70589#line 325
70590  *((bool *)__cil_tmp33) = (bool )0;
70591#line 326
70592  __cil_tmp34 = (unsigned long )fman;
70593#line 326
70594  __cil_tmp35 = __cil_tmp34 + 40;
70595#line 326
70596  __cil_tmp36 = *((struct list_head **)__cil_tmp35);
70597#line 326
70598  __mptr = (struct list_head    *)__cil_tmp36;
70599#line 326
70600  __cil_tmp37 = (struct vmw_fence_obj *)0;
70601#line 326
70602  __cil_tmp38 = (unsigned long )__cil_tmp37;
70603#line 326
70604  __cil_tmp39 = __cil_tmp38 + 16;
70605#line 326
70606  __cil_tmp40 = (struct list_head *)__cil_tmp39;
70607#line 326
70608  __cil_tmp41 = (unsigned int )__cil_tmp40;
70609#line 326
70610  __cil_tmp42 = (char *)__mptr;
70611#line 326
70612  __cil_tmp43 = __cil_tmp42 - __cil_tmp41;
70613#line 326
70614  fence = (struct vmw_fence_obj *)__cil_tmp43;
70615  {
70616#line 326
70617  while (1) {
70618    while_continue: /* CIL Label */ ;
70619    {
70620#line 326
70621    __cil_tmp44 = (unsigned long )fman;
70622#line 326
70623    __cil_tmp45 = __cil_tmp44 + 40;
70624#line 326
70625    __cil_tmp46 = (struct list_head *)__cil_tmp45;
70626#line 326
70627    __cil_tmp47 = (unsigned long )__cil_tmp46;
70628#line 326
70629    __cil_tmp48 = (unsigned long )fence;
70630#line 326
70631    __cil_tmp49 = __cil_tmp48 + 16;
70632#line 326
70633    __cil_tmp50 = (struct list_head *)__cil_tmp49;
70634#line 326
70635    __cil_tmp51 = (unsigned long )__cil_tmp50;
70636#line 326
70637    if (__cil_tmp51 != __cil_tmp47) {
70638
70639    } else {
70640#line 326
70641      goto while_break;
70642    }
70643    }
70644    {
70645#line 327
70646    __cil_tmp52 = (unsigned long )fence;
70647#line 327
70648    __cil_tmp53 = __cil_tmp52 + 40;
70649#line 327
70650    __cil_tmp54 = (struct list_head *)__cil_tmp53;
70651#line 327
70652    __cil_tmp55 = (struct list_head    *)__cil_tmp54;
70653#line 327
70654    tmp___9 = list_empty(__cil_tmp55);
70655    }
70656#line 327
70657    if (tmp___9) {
70658
70659    } else {
70660      {
70661#line 328
70662      __cil_tmp56 = (unsigned long )fman;
70663#line 328
70664      __cil_tmp57 = __cil_tmp56 + 201;
70665#line 328
70666      *((bool *)__cil_tmp57) = (bool )1;
70667#line 329
70668      __cil_tmp58 = (unsigned long )fence;
70669#line 329
70670      __cil_tmp59 = __cil_tmp58 + 4;
70671#line 329
70672      __cil_tmp60 = *((u32 *)__cil_tmp59);
70673#line 329
70674      __cil_tmp61 = fifo_mem + 289;
70675#line 329
70676      __cil_tmp62 = (void *)__cil_tmp61;
70677#line 329
70678      iowrite32(__cil_tmp60, __cil_tmp62);
70679      }
70680#line 331
70681      goto while_break;
70682    }
70683#line 326
70684    __cil_tmp63 = (unsigned long )fence;
70685#line 326
70686    __cil_tmp64 = __cil_tmp63 + 16;
70687#line 326
70688    __cil_tmp65 = *((struct list_head **)__cil_tmp64);
70689#line 326
70690    __mptr___0 = (struct list_head    *)__cil_tmp65;
70691#line 326
70692    __cil_tmp66 = (struct vmw_fence_obj *)0;
70693#line 326
70694    __cil_tmp67 = (unsigned long )__cil_tmp66;
70695#line 326
70696    __cil_tmp68 = __cil_tmp67 + 16;
70697#line 326
70698    __cil_tmp69 = (struct list_head *)__cil_tmp68;
70699#line 326
70700    __cil_tmp70 = (unsigned int )__cil_tmp69;
70701#line 326
70702    __cil_tmp71 = (char *)__mptr___0;
70703#line 326
70704    __cil_tmp72 = __cil_tmp71 - __cil_tmp70;
70705#line 326
70706    fence = (struct vmw_fence_obj *)__cil_tmp72;
70707  }
70708  while_break: /* CIL Label */ ;
70709  }
70710#line 335
70711  return ((bool )1);
70712}
70713}
70714#line 354 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70715static bool vmw_fence_goal_check_locked(struct vmw_fence_obj *fence ) 
70716{ u32 goal_seqno ;
70717  __le32 *fifo_mem ;
70718  int tmp___7 ;
70719  long tmp___8 ;
70720  unsigned long __cil_tmp6 ;
70721  unsigned long __cil_tmp7 ;
70722  uint32_t __cil_tmp8 ;
70723  unsigned long __cil_tmp9 ;
70724  unsigned long __cil_tmp10 ;
70725  struct vmw_fence_manager *__cil_tmp11 ;
70726  unsigned long __cil_tmp12 ;
70727  unsigned long __cil_tmp13 ;
70728  struct vmw_private *__cil_tmp14 ;
70729  unsigned long __cil_tmp15 ;
70730  unsigned long __cil_tmp16 ;
70731  __le32 *__cil_tmp17 ;
70732  void *__cil_tmp18 ;
70733  unsigned long __cil_tmp19 ;
70734  unsigned long __cil_tmp20 ;
70735  struct vmw_fence_manager *__cil_tmp21 ;
70736  unsigned long __cil_tmp22 ;
70737  unsigned long __cil_tmp23 ;
70738  int __cil_tmp24 ;
70739  u32 __cil_tmp25 ;
70740  unsigned long __cil_tmp26 ;
70741  unsigned long __cil_tmp27 ;
70742  u32 __cil_tmp28 ;
70743  u32 __cil_tmp29 ;
70744  long __cil_tmp30 ;
70745  unsigned long __cil_tmp31 ;
70746  unsigned long __cil_tmp32 ;
70747  u32 __cil_tmp33 ;
70748  __le32 *__cil_tmp34 ;
70749  void *__cil_tmp35 ;
70750  unsigned long __cil_tmp36 ;
70751  unsigned long __cil_tmp37 ;
70752  struct vmw_fence_manager *__cil_tmp38 ;
70753  unsigned long __cil_tmp39 ;
70754  unsigned long __cil_tmp40 ;
70755
70756  {
70757  {
70758#line 359
70759  __cil_tmp6 = (unsigned long )fence;
70760#line 359
70761  __cil_tmp7 = __cil_tmp6 + 32;
70762#line 359
70763  __cil_tmp8 = *((uint32_t *)__cil_tmp7);
70764#line 359
70765  if (__cil_tmp8 & 1U) {
70766#line 360
70767    return ((bool )0);
70768  } else {
70769
70770  }
70771  }
70772  {
70773#line 362
70774  __cil_tmp9 = (unsigned long )fence;
70775#line 362
70776  __cil_tmp10 = __cil_tmp9 + 8;
70777#line 362
70778  __cil_tmp11 = *((struct vmw_fence_manager **)__cil_tmp10);
70779#line 362
70780  __cil_tmp12 = (unsigned long )__cil_tmp11;
70781#line 362
70782  __cil_tmp13 = __cil_tmp12 + 8;
70783#line 362
70784  __cil_tmp14 = *((struct vmw_private **)__cil_tmp13);
70785#line 362
70786  __cil_tmp15 = (unsigned long )__cil_tmp14;
70787#line 362
70788  __cil_tmp16 = __cil_tmp15 + 2144;
70789#line 362
70790  fifo_mem = *((__le32 **)__cil_tmp16);
70791#line 363
70792  __cil_tmp17 = fifo_mem + 289;
70793#line 363
70794  __cil_tmp18 = (void *)__cil_tmp17;
70795#line 363
70796  goal_seqno = ioread32(__cil_tmp18);
70797  }
70798  {
70799#line 364
70800  __cil_tmp19 = (unsigned long )fence;
70801#line 364
70802  __cil_tmp20 = __cil_tmp19 + 8;
70803#line 364
70804  __cil_tmp21 = *((struct vmw_fence_manager **)__cil_tmp20);
70805#line 364
70806  __cil_tmp22 = (unsigned long )__cil_tmp21;
70807#line 364
70808  __cil_tmp23 = __cil_tmp22 + 201;
70809#line 364
70810  if (*((bool *)__cil_tmp23)) {
70811    {
70812#line 364
70813    __cil_tmp24 = 1 << 31;
70814#line 364
70815    __cil_tmp25 = (u32 )__cil_tmp24;
70816#line 364
70817    __cil_tmp26 = (unsigned long )fence;
70818#line 364
70819    __cil_tmp27 = __cil_tmp26 + 4;
70820#line 364
70821    __cil_tmp28 = *((u32 *)__cil_tmp27);
70822#line 364
70823    __cil_tmp29 = goal_seqno - __cil_tmp28;
70824#line 364
70825    if (__cil_tmp29 < __cil_tmp25) {
70826#line 364
70827      tmp___7 = 1;
70828    } else {
70829#line 364
70830      tmp___7 = 0;
70831    }
70832    }
70833  } else {
70834#line 364
70835    tmp___7 = 0;
70836  }
70837  }
70838  {
70839#line 364
70840  __cil_tmp30 = (long )tmp___7;
70841#line 364
70842  tmp___8 = __builtin_expect(__cil_tmp30, 1L);
70843  }
70844#line 364
70845  if (tmp___8) {
70846#line 366
70847    return ((bool )0);
70848  } else {
70849
70850  }
70851  {
70852#line 368
70853  __cil_tmp31 = (unsigned long )fence;
70854#line 368
70855  __cil_tmp32 = __cil_tmp31 + 4;
70856#line 368
70857  __cil_tmp33 = *((u32 *)__cil_tmp32);
70858#line 368
70859  __cil_tmp34 = fifo_mem + 289;
70860#line 368
70861  __cil_tmp35 = (void *)__cil_tmp34;
70862#line 368
70863  iowrite32(__cil_tmp33, __cil_tmp35);
70864#line 369
70865  __cil_tmp36 = (unsigned long )fence;
70866#line 369
70867  __cil_tmp37 = __cil_tmp36 + 8;
70868#line 369
70869  __cil_tmp38 = *((struct vmw_fence_manager **)__cil_tmp37);
70870#line 369
70871  __cil_tmp39 = (unsigned long )__cil_tmp38;
70872#line 369
70873  __cil_tmp40 = __cil_tmp39 + 201;
70874#line 369
70875  *((bool *)__cil_tmp40) = (bool )1;
70876  }
70877#line 371
70878  return ((bool )1);
70879}
70880}
70881#line 374 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
70882void vmw_fences_update(struct vmw_fence_manager *fman ) 
70883{ unsigned long flags ;
70884  struct vmw_fence_obj *fence ;
70885  struct vmw_fence_obj *next_fence ;
70886  struct list_head action_list ;
70887  bool needs_rerun ;
70888  uint32_t seqno ;
70889  uint32_t new_seqno ;
70890  __le32 *fifo_mem ;
70891  raw_spinlock_t *tmp___7 ;
70892  struct list_head    *__mptr ;
70893  struct list_head    *__mptr___0 ;
70894  struct list_head    *__mptr___1 ;
70895  int tmp___8 ;
70896  long tmp___9 ;
70897  unsigned long __cil_tmp18 ;
70898  unsigned long __cil_tmp19 ;
70899  struct vmw_private *__cil_tmp20 ;
70900  unsigned long __cil_tmp21 ;
70901  unsigned long __cil_tmp22 ;
70902  __le32 *__cil_tmp23 ;
70903  void *__cil_tmp24 ;
70904  unsigned long __cil_tmp25 ;
70905  unsigned long __cil_tmp26 ;
70906  spinlock_t *__cil_tmp27 ;
70907  unsigned long __cil_tmp28 ;
70908  unsigned long __cil_tmp29 ;
70909  struct list_head *__cil_tmp30 ;
70910  struct vmw_fence_obj *__cil_tmp31 ;
70911  unsigned long __cil_tmp32 ;
70912  unsigned long __cil_tmp33 ;
70913  struct list_head *__cil_tmp34 ;
70914  unsigned int __cil_tmp35 ;
70915  char *__cil_tmp36 ;
70916  char *__cil_tmp37 ;
70917  unsigned long __cil_tmp38 ;
70918  unsigned long __cil_tmp39 ;
70919  struct list_head *__cil_tmp40 ;
70920  struct vmw_fence_obj *__cil_tmp41 ;
70921  unsigned long __cil_tmp42 ;
70922  unsigned long __cil_tmp43 ;
70923  struct list_head *__cil_tmp44 ;
70924  unsigned int __cil_tmp45 ;
70925  char *__cil_tmp46 ;
70926  char *__cil_tmp47 ;
70927  unsigned long __cil_tmp48 ;
70928  unsigned long __cil_tmp49 ;
70929  struct list_head *__cil_tmp50 ;
70930  unsigned long __cil_tmp51 ;
70931  unsigned long __cil_tmp52 ;
70932  unsigned long __cil_tmp53 ;
70933  struct list_head *__cil_tmp54 ;
70934  unsigned long __cil_tmp55 ;
70935  int __cil_tmp56 ;
70936  uint32_t __cil_tmp57 ;
70937  unsigned long __cil_tmp58 ;
70938  unsigned long __cil_tmp59 ;
70939  u32 __cil_tmp60 ;
70940  uint32_t __cil_tmp61 ;
70941  unsigned long __cil_tmp62 ;
70942  unsigned long __cil_tmp63 ;
70943  struct list_head *__cil_tmp64 ;
70944  unsigned long __cil_tmp65 ;
70945  unsigned long __cil_tmp66 ;
70946  unsigned long __cil_tmp67 ;
70947  unsigned long __cil_tmp68 ;
70948  uint32_t __cil_tmp69 ;
70949  unsigned long __cil_tmp70 ;
70950  unsigned long __cil_tmp71 ;
70951  struct list_head *__cil_tmp72 ;
70952  unsigned long __cil_tmp73 ;
70953  unsigned long __cil_tmp74 ;
70954  wait_queue_head_t *__cil_tmp75 ;
70955  void *__cil_tmp76 ;
70956  unsigned long __cil_tmp77 ;
70957  unsigned long __cil_tmp78 ;
70958  struct list_head *__cil_tmp79 ;
70959  struct vmw_fence_obj *__cil_tmp80 ;
70960  unsigned long __cil_tmp81 ;
70961  unsigned long __cil_tmp82 ;
70962  struct list_head *__cil_tmp83 ;
70963  unsigned int __cil_tmp84 ;
70964  char *__cil_tmp85 ;
70965  char *__cil_tmp86 ;
70966  unsigned long __cil_tmp87 ;
70967  unsigned long __cil_tmp88 ;
70968  struct list_head *__cil_tmp89 ;
70969  struct list_head    *__cil_tmp90 ;
70970  unsigned long __cil_tmp91 ;
70971  unsigned long __cil_tmp92 ;
70972  struct work_struct *__cil_tmp93 ;
70973  unsigned long __cil_tmp94 ;
70974  unsigned long __cil_tmp95 ;
70975  spinlock_t *__cil_tmp96 ;
70976  int __cil_tmp97 ;
70977  int __cil_tmp98 ;
70978  long __cil_tmp99 ;
70979  __le32 *__cil_tmp100 ;
70980  void *__cil_tmp101 ;
70981
70982  {
70983  {
70984#line 381
70985  __cil_tmp18 = (unsigned long )fman;
70986#line 381
70987  __cil_tmp19 = __cil_tmp18 + 8;
70988#line 381
70989  __cil_tmp20 = *((struct vmw_private **)__cil_tmp19);
70990#line 381
70991  __cil_tmp21 = (unsigned long )__cil_tmp20;
70992#line 381
70993  __cil_tmp22 = __cil_tmp21 + 2144;
70994#line 381
70995  fifo_mem = *((__le32 **)__cil_tmp22);
70996#line 383
70997  __cil_tmp23 = fifo_mem + 6;
70998#line 383
70999  __cil_tmp24 = (void *)__cil_tmp23;
71000#line 383
71001  seqno = ioread32(__cil_tmp24);
71002  }
71003  rerun: 
71004  {
71005#line 385
71006  while (1) {
71007    while_continue: /* CIL Label */ ;
71008    {
71009#line 385
71010    while (1) {
71011      while_continue___0: /* CIL Label */ ;
71012      {
71013#line 385
71014      __cil_tmp25 = (unsigned long )fman;
71015#line 385
71016      __cil_tmp26 = __cil_tmp25 + 16;
71017#line 385
71018      __cil_tmp27 = (spinlock_t *)__cil_tmp26;
71019#line 385
71020      tmp___7 = spinlock_check(__cil_tmp27);
71021#line 385
71022      flags = _raw_spin_lock_irqsave(tmp___7);
71023      }
71024#line 385
71025      goto while_break___0;
71026    }
71027    while_break___0: /* CIL Label */ ;
71028    }
71029#line 385
71030    goto while_break;
71031  }
71032  while_break: /* CIL Label */ ;
71033  }
71034#line 386
71035  __cil_tmp28 = (unsigned long )fman;
71036#line 386
71037  __cil_tmp29 = __cil_tmp28 + 40;
71038#line 386
71039  __cil_tmp30 = *((struct list_head **)__cil_tmp29);
71040#line 386
71041  __mptr = (struct list_head    *)__cil_tmp30;
71042#line 386
71043  __cil_tmp31 = (struct vmw_fence_obj *)0;
71044#line 386
71045  __cil_tmp32 = (unsigned long )__cil_tmp31;
71046#line 386
71047  __cil_tmp33 = __cil_tmp32 + 16;
71048#line 386
71049  __cil_tmp34 = (struct list_head *)__cil_tmp33;
71050#line 386
71051  __cil_tmp35 = (unsigned int )__cil_tmp34;
71052#line 386
71053  __cil_tmp36 = (char *)__mptr;
71054#line 386
71055  __cil_tmp37 = __cil_tmp36 - __cil_tmp35;
71056#line 386
71057  fence = (struct vmw_fence_obj *)__cil_tmp37;
71058#line 386
71059  __cil_tmp38 = (unsigned long )fence;
71060#line 386
71061  __cil_tmp39 = __cil_tmp38 + 16;
71062#line 386
71063  __cil_tmp40 = *((struct list_head **)__cil_tmp39);
71064#line 386
71065  __mptr___0 = (struct list_head    *)__cil_tmp40;
71066#line 386
71067  __cil_tmp41 = (struct vmw_fence_obj *)0;
71068#line 386
71069  __cil_tmp42 = (unsigned long )__cil_tmp41;
71070#line 386
71071  __cil_tmp43 = __cil_tmp42 + 16;
71072#line 386
71073  __cil_tmp44 = (struct list_head *)__cil_tmp43;
71074#line 386
71075  __cil_tmp45 = (unsigned int )__cil_tmp44;
71076#line 386
71077  __cil_tmp46 = (char *)__mptr___0;
71078#line 386
71079  __cil_tmp47 = __cil_tmp46 - __cil_tmp45;
71080#line 386
71081  next_fence = (struct vmw_fence_obj *)__cil_tmp47;
71082  {
71083#line 386
71084  while (1) {
71085    while_continue___1: /* CIL Label */ ;
71086    {
71087#line 386
71088    __cil_tmp48 = (unsigned long )fman;
71089#line 386
71090    __cil_tmp49 = __cil_tmp48 + 40;
71091#line 386
71092    __cil_tmp50 = (struct list_head *)__cil_tmp49;
71093#line 386
71094    __cil_tmp51 = (unsigned long )__cil_tmp50;
71095#line 386
71096    __cil_tmp52 = (unsigned long )fence;
71097#line 386
71098    __cil_tmp53 = __cil_tmp52 + 16;
71099#line 386
71100    __cil_tmp54 = (struct list_head *)__cil_tmp53;
71101#line 386
71102    __cil_tmp55 = (unsigned long )__cil_tmp54;
71103#line 386
71104    if (__cil_tmp55 != __cil_tmp51) {
71105
71106    } else {
71107#line 386
71108      goto while_break___1;
71109    }
71110    }
71111    {
71112#line 387
71113    __cil_tmp56 = 1 << 31;
71114#line 387
71115    __cil_tmp57 = (uint32_t )__cil_tmp56;
71116#line 387
71117    __cil_tmp58 = (unsigned long )fence;
71118#line 387
71119    __cil_tmp59 = __cil_tmp58 + 4;
71120#line 387
71121    __cil_tmp60 = *((u32 *)__cil_tmp59);
71122#line 387
71123    __cil_tmp61 = seqno - __cil_tmp60;
71124#line 387
71125    if (__cil_tmp61 < __cil_tmp57) {
71126      {
71127#line 388
71128      __cil_tmp62 = (unsigned long )fence;
71129#line 388
71130      __cil_tmp63 = __cil_tmp62 + 16;
71131#line 388
71132      __cil_tmp64 = (struct list_head *)__cil_tmp63;
71133#line 388
71134      list_del_init(__cil_tmp64);
71135#line 389
71136      __cil_tmp65 = (unsigned long )fence;
71137#line 389
71138      __cil_tmp66 = __cil_tmp65 + 32;
71139#line 389
71140      __cil_tmp67 = (unsigned long )fence;
71141#line 389
71142      __cil_tmp68 = __cil_tmp67 + 32;
71143#line 389
71144      __cil_tmp69 = *((uint32_t *)__cil_tmp68);
71145#line 389
71146      *((uint32_t *)__cil_tmp66) = __cil_tmp69 | 1U;
71147#line 390
71148      INIT_LIST_HEAD(& action_list);
71149#line 391
71150      __cil_tmp70 = (unsigned long )fence;
71151#line 391
71152      __cil_tmp71 = __cil_tmp70 + 40;
71153#line 391
71154      __cil_tmp72 = (struct list_head *)__cil_tmp71;
71155#line 391
71156      list_splice_init(__cil_tmp72, & action_list);
71157#line 393
71158      vmw_fences_perform_actions(fman, & action_list);
71159#line 394
71160      __cil_tmp73 = (unsigned long )fence;
71161#line 394
71162      __cil_tmp74 = __cil_tmp73 + 64;
71163#line 394
71164      __cil_tmp75 = (wait_queue_head_t *)__cil_tmp74;
71165#line 394
71166      __cil_tmp76 = (void *)0;
71167#line 394
71168      __wake_up(__cil_tmp75, 3U, 0, __cil_tmp76);
71169      }
71170    } else {
71171#line 396
71172      goto while_break___1;
71173    }
71174    }
71175#line 386
71176    fence = next_fence;
71177#line 386
71178    __cil_tmp77 = (unsigned long )next_fence;
71179#line 386
71180    __cil_tmp78 = __cil_tmp77 + 16;
71181#line 386
71182    __cil_tmp79 = *((struct list_head **)__cil_tmp78);
71183#line 386
71184    __mptr___1 = (struct list_head    *)__cil_tmp79;
71185#line 386
71186    __cil_tmp80 = (struct vmw_fence_obj *)0;
71187#line 386
71188    __cil_tmp81 = (unsigned long )__cil_tmp80;
71189#line 386
71190    __cil_tmp82 = __cil_tmp81 + 16;
71191#line 386
71192    __cil_tmp83 = (struct list_head *)__cil_tmp82;
71193#line 386
71194    __cil_tmp84 = (unsigned int )__cil_tmp83;
71195#line 386
71196    __cil_tmp85 = (char *)__mptr___1;
71197#line 386
71198    __cil_tmp86 = __cil_tmp85 - __cil_tmp84;
71199#line 386
71200    next_fence = (struct vmw_fence_obj *)__cil_tmp86;
71201  }
71202  while_break___1: /* CIL Label */ ;
71203  }
71204  {
71205#line 399
71206  needs_rerun = vmw_fence_goal_new_locked(fman, seqno);
71207#line 401
71208  __cil_tmp87 = (unsigned long )fman;
71209#line 401
71210  __cil_tmp88 = __cil_tmp87 + 104;
71211#line 401
71212  __cil_tmp89 = (struct list_head *)__cil_tmp88;
71213#line 401
71214  __cil_tmp90 = (struct list_head    *)__cil_tmp89;
71215#line 401
71216  tmp___8 = list_empty(__cil_tmp90);
71217  }
71218#line 401
71219  if (tmp___8) {
71220
71221  } else {
71222    {
71223#line 402
71224    __cil_tmp91 = (unsigned long )fman;
71225#line 402
71226    __cil_tmp92 = __cil_tmp91 + 56;
71227#line 402
71228    __cil_tmp93 = (struct work_struct *)__cil_tmp92;
71229#line 402
71230    schedule_work(__cil_tmp93);
71231    }
71232  }
71233  {
71234#line 403
71235  __cil_tmp94 = (unsigned long )fman;
71236#line 403
71237  __cil_tmp95 = __cil_tmp94 + 16;
71238#line 403
71239  __cil_tmp96 = (spinlock_t *)__cil_tmp95;
71240#line 403
71241  spin_unlock_irqrestore(__cil_tmp96, flags);
71242#line 411
71243  __cil_tmp97 = ! needs_rerun;
71244#line 411
71245  __cil_tmp98 = ! __cil_tmp97;
71246#line 411
71247  __cil_tmp99 = (long )__cil_tmp98;
71248#line 411
71249  tmp___9 = __builtin_expect(__cil_tmp99, 0L);
71250  }
71251#line 411
71252  if (tmp___9) {
71253    {
71254#line 412
71255    __cil_tmp100 = fifo_mem + 6;
71256#line 412
71257    __cil_tmp101 = (void *)__cil_tmp100;
71258#line 412
71259    new_seqno = ioread32(__cil_tmp101);
71260    }
71261#line 413
71262    if (new_seqno != seqno) {
71263#line 414
71264      seqno = new_seqno;
71265#line 415
71266      goto rerun;
71267    } else {
71268
71269    }
71270  } else {
71271
71272  }
71273#line 418
71274  return;
71275}
71276}
71277#line 420 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
71278bool vmw_fence_obj_signaled(struct vmw_fence_obj *fence , uint32_t flags ) 
71279{ struct vmw_fence_manager *fman ;
71280  unsigned long irq_flags ;
71281  uint32_t signaled ;
71282  raw_spinlock_t *tmp___7 ;
71283  raw_spinlock_t *tmp___8 ;
71284  unsigned long __cil_tmp12 ;
71285  unsigned long __cil_tmp13 ;
71286  unsigned long __cil_tmp14 ;
71287  unsigned long __cil_tmp15 ;
71288  spinlock_t *__cil_tmp16 ;
71289  unsigned long __cil_tmp17 ;
71290  unsigned long __cil_tmp18 ;
71291  unsigned long __cil_tmp19 ;
71292  unsigned long __cil_tmp20 ;
71293  spinlock_t *__cil_tmp21 ;
71294  unsigned long __cil_tmp22 ;
71295  unsigned long __cil_tmp23 ;
71296  uint32_t __cil_tmp24 ;
71297  unsigned int __cil_tmp25 ;
71298  unsigned int __cil_tmp26 ;
71299  unsigned long __cil_tmp27 ;
71300  unsigned long __cil_tmp28 ;
71301  spinlock_t *__cil_tmp29 ;
71302  unsigned long __cil_tmp30 ;
71303  unsigned long __cil_tmp31 ;
71304  unsigned long __cil_tmp32 ;
71305  unsigned long __cil_tmp33 ;
71306  spinlock_t *__cil_tmp34 ;
71307  unsigned int __cil_tmp35 ;
71308  int __cil_tmp36 ;
71309
71310  {
71311#line 423
71312  __cil_tmp12 = (unsigned long )fence;
71313#line 423
71314  __cil_tmp13 = __cil_tmp12 + 8;
71315#line 423
71316  fman = *((struct vmw_fence_manager **)__cil_tmp13);
71317  {
71318#line 427
71319  while (1) {
71320    while_continue: /* CIL Label */ ;
71321    {
71322#line 427
71323    while (1) {
71324      while_continue___0: /* CIL Label */ ;
71325      {
71326#line 427
71327      __cil_tmp14 = (unsigned long )fman;
71328#line 427
71329      __cil_tmp15 = __cil_tmp14 + 16;
71330#line 427
71331      __cil_tmp16 = (spinlock_t *)__cil_tmp15;
71332#line 427
71333      tmp___7 = spinlock_check(__cil_tmp16);
71334#line 427
71335      irq_flags = _raw_spin_lock_irqsave(tmp___7);
71336      }
71337#line 427
71338      goto while_break___0;
71339    }
71340    while_break___0: /* CIL Label */ ;
71341    }
71342#line 427
71343    goto while_break;
71344  }
71345  while_break: /* CIL Label */ ;
71346  }
71347  {
71348#line 428
71349  __cil_tmp17 = (unsigned long )fence;
71350#line 428
71351  __cil_tmp18 = __cil_tmp17 + 32;
71352#line 428
71353  signaled = *((uint32_t *)__cil_tmp18);
71354#line 429
71355  __cil_tmp19 = (unsigned long )fman;
71356#line 429
71357  __cil_tmp20 = __cil_tmp19 + 16;
71358#line 429
71359  __cil_tmp21 = (spinlock_t *)__cil_tmp20;
71360#line 429
71361  spin_unlock_irqrestore(__cil_tmp21, irq_flags);
71362#line 431
71363  __cil_tmp22 = (unsigned long )fence;
71364#line 431
71365  __cil_tmp23 = __cil_tmp22 + 36;
71366#line 431
71367  __cil_tmp24 = *((uint32_t *)__cil_tmp23);
71368#line 431
71369  flags = flags & __cil_tmp24;
71370  }
71371  {
71372#line 432
71373  __cil_tmp25 = signaled & flags;
71374#line 432
71375  if (__cil_tmp25 == flags) {
71376#line 433
71377    return ((bool )1);
71378  } else {
71379
71380  }
71381  }
71382  {
71383#line 435
71384  __cil_tmp26 = signaled & 1U;
71385#line 435
71386  if (__cil_tmp26 == 0U) {
71387    {
71388#line 436
71389    vmw_fences_update(fman);
71390    }
71391  } else {
71392
71393  }
71394  }
71395  {
71396#line 438
71397  while (1) {
71398    while_continue___1: /* CIL Label */ ;
71399    {
71400#line 438
71401    while (1) {
71402      while_continue___2: /* CIL Label */ ;
71403      {
71404#line 438
71405      __cil_tmp27 = (unsigned long )fman;
71406#line 438
71407      __cil_tmp28 = __cil_tmp27 + 16;
71408#line 438
71409      __cil_tmp29 = (spinlock_t *)__cil_tmp28;
71410#line 438
71411      tmp___8 = spinlock_check(__cil_tmp29);
71412#line 438
71413      irq_flags = _raw_spin_lock_irqsave(tmp___8);
71414      }
71415#line 438
71416      goto while_break___2;
71417    }
71418    while_break___2: /* CIL Label */ ;
71419    }
71420#line 438
71421    goto while_break___1;
71422  }
71423  while_break___1: /* CIL Label */ ;
71424  }
71425  {
71426#line 439
71427  __cil_tmp30 = (unsigned long )fence;
71428#line 439
71429  __cil_tmp31 = __cil_tmp30 + 32;
71430#line 439
71431  signaled = *((uint32_t *)__cil_tmp31);
71432#line 440
71433  __cil_tmp32 = (unsigned long )fman;
71434#line 440
71435  __cil_tmp33 = __cil_tmp32 + 16;
71436#line 440
71437  __cil_tmp34 = (spinlock_t *)__cil_tmp33;
71438#line 440
71439  spin_unlock_irqrestore(__cil_tmp34, irq_flags);
71440  }
71441  {
71442#line 442
71443  __cil_tmp35 = signaled & flags;
71444#line 442
71445  __cil_tmp36 = __cil_tmp35 == flags;
71446#line 442
71447  return ((bool )__cil_tmp36);
71448  }
71449}
71450}
71451#line 445 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
71452int vmw_fence_obj_wait(struct vmw_fence_obj *fence , uint32_t flags , bool lazy ,
71453                       bool interruptible , unsigned long timeout ) 
71454{ struct vmw_private *dev_priv ;
71455  long ret ;
71456  bool tmp___7 ;
71457  int tmp___8 ;
71458  long tmp___9 ;
71459  long __ret ;
71460  wait_queue_t __wait ;
71461  struct task_struct *tmp___10 ;
71462  bool tmp___11 ;
71463  struct task_struct *tmp___12 ;
71464  int tmp___13 ;
71465  bool tmp___14 ;
71466  long __ret___0 ;
71467  wait_queue_t __wait___0 ;
71468  struct task_struct *tmp___15 ;
71469  bool tmp___16 ;
71470  bool tmp___17 ;
71471  long tmp___18 ;
71472  long tmp___19 ;
71473  unsigned long __cil_tmp25 ;
71474  unsigned long __cil_tmp26 ;
71475  struct vmw_fence_manager *__cil_tmp27 ;
71476  unsigned long __cil_tmp28 ;
71477  unsigned long __cil_tmp29 ;
71478  long __cil_tmp30 ;
71479  uint32_t __cil_tmp31 ;
71480  wait_queue_t *__cil_tmp32 ;
71481  unsigned long __cil_tmp33 ;
71482  unsigned long __cil_tmp34 ;
71483  unsigned long __cil_tmp35 ;
71484  unsigned long __cil_tmp36 ;
71485  unsigned long __cil_tmp37 ;
71486  unsigned long __cil_tmp38 ;
71487  unsigned long __cil_tmp39 ;
71488  unsigned long __cil_tmp40 ;
71489  unsigned long __cil_tmp41 ;
71490  wait_queue_head_t *__cil_tmp42 ;
71491  unsigned long __cil_tmp43 ;
71492  unsigned long __cil_tmp44 ;
71493  wait_queue_head_t *__cil_tmp45 ;
71494  wait_queue_t *__cil_tmp46 ;
71495  unsigned long __cil_tmp47 ;
71496  unsigned long __cil_tmp48 ;
71497  unsigned long __cil_tmp49 ;
71498  unsigned long __cil_tmp50 ;
71499  unsigned long __cil_tmp51 ;
71500  unsigned long __cil_tmp52 ;
71501  unsigned long __cil_tmp53 ;
71502  unsigned long __cil_tmp54 ;
71503  unsigned long __cil_tmp55 ;
71504  wait_queue_head_t *__cil_tmp56 ;
71505  unsigned long __cil_tmp57 ;
71506  unsigned long __cil_tmp58 ;
71507  wait_queue_head_t *__cil_tmp59 ;
71508  int __cil_tmp60 ;
71509  int __cil_tmp61 ;
71510  int __cil_tmp62 ;
71511  long __cil_tmp63 ;
71512  int __cil_tmp64 ;
71513  int __cil_tmp65 ;
71514  int __cil_tmp66 ;
71515  long __cil_tmp67 ;
71516
71517  {
71518  {
71519#line 449
71520  __cil_tmp25 = (unsigned long )fence;
71521#line 449
71522  __cil_tmp26 = __cil_tmp25 + 8;
71523#line 449
71524  __cil_tmp27 = *((struct vmw_fence_manager **)__cil_tmp26);
71525#line 449
71526  __cil_tmp28 = (unsigned long )__cil_tmp27;
71527#line 449
71528  __cil_tmp29 = __cil_tmp28 + 8;
71529#line 449
71530  dev_priv = *((struct vmw_private **)__cil_tmp29);
71531#line 452
71532  tmp___7 = vmw_fence_obj_signaled(fence, flags);
71533  }
71534#line 452
71535  if (tmp___7) {
71536#line 452
71537    tmp___8 = 1;
71538  } else {
71539#line 452
71540    tmp___8 = 0;
71541  }
71542  {
71543#line 452
71544  __cil_tmp30 = (long )tmp___8;
71545#line 452
71546  tmp___9 = __builtin_expect(__cil_tmp30, 1L);
71547  }
71548#line 452
71549  if (tmp___9) {
71550#line 453
71551    return (0);
71552  } else {
71553
71554  }
71555  {
71556#line 455
71557  __cil_tmp31 = (uint32_t )1;
71558#line 455
71559  vmw_fifo_ping_host(dev_priv, __cil_tmp31);
71560#line 456
71561  vmw_seqno_waiter_add(dev_priv);
71562  }
71563#line 458
71564  if (interruptible) {
71565    {
71566#line 459
71567    __ret = (long )timeout;
71568#line 459
71569    tmp___14 = vmw_fence_obj_signaled(fence, flags);
71570    }
71571#line 459
71572    if (tmp___14) {
71573
71574    } else {
71575      {
71576#line 459
71577      while (1) {
71578        while_continue: /* CIL Label */ ;
71579        {
71580#line 459
71581        tmp___10 = get_current();
71582#line 459
71583        __cil_tmp32 = & __wait;
71584#line 459
71585        *((unsigned int *)__cil_tmp32) = 0U;
71586#line 459
71587        __cil_tmp33 = (unsigned long )(& __wait) + 8;
71588#line 459
71589        *((void **)__cil_tmp33) = (void *)tmp___10;
71590#line 459
71591        __cil_tmp34 = (unsigned long )(& __wait) + 16;
71592#line 459
71593        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp34) = & autoremove_wake_function;
71594#line 459
71595        __cil_tmp35 = (unsigned long )(& __wait) + 24;
71596#line 459
71597        __cil_tmp36 = (unsigned long )(& __wait) + 24;
71598#line 459
71599        *((struct list_head **)__cil_tmp35) = (struct list_head *)__cil_tmp36;
71600#line 459
71601        __cil_tmp37 = 24 + 8;
71602#line 459
71603        __cil_tmp38 = (unsigned long )(& __wait) + __cil_tmp37;
71604#line 459
71605        __cil_tmp39 = (unsigned long )(& __wait) + 24;
71606#line 459
71607        *((struct list_head **)__cil_tmp38) = (struct list_head *)__cil_tmp39;
71608        }
71609        {
71610#line 459
71611        while (1) {
71612          while_continue___0: /* CIL Label */ ;
71613          {
71614#line 459
71615          __cil_tmp40 = (unsigned long )fence;
71616#line 459
71617          __cil_tmp41 = __cil_tmp40 + 64;
71618#line 459
71619          __cil_tmp42 = (wait_queue_head_t *)__cil_tmp41;
71620#line 459
71621          prepare_to_wait(__cil_tmp42, & __wait, 1);
71622#line 459
71623          tmp___11 = vmw_fence_obj_signaled(fence, flags);
71624          }
71625#line 459
71626          if (tmp___11) {
71627#line 459
71628            goto while_break___0;
71629          } else {
71630
71631          }
71632          {
71633#line 459
71634          tmp___12 = get_current();
71635#line 459
71636          tmp___13 = signal_pending(tmp___12);
71637          }
71638#line 459
71639          if (tmp___13) {
71640
71641          } else {
71642            {
71643#line 459
71644            __ret = schedule_timeout(__ret);
71645            }
71646#line 459
71647            if (! __ret) {
71648#line 459
71649              goto while_break___0;
71650            } else {
71651
71652            }
71653#line 459
71654            goto __Cont;
71655          }
71656#line 459
71657          __ret = -512L;
71658#line 459
71659          goto while_break___0;
71660          __Cont: /* CIL Label */ ;
71661        }
71662        while_break___0: /* CIL Label */ ;
71663        }
71664        {
71665#line 459
71666        __cil_tmp43 = (unsigned long )fence;
71667#line 459
71668        __cil_tmp44 = __cil_tmp43 + 64;
71669#line 459
71670        __cil_tmp45 = (wait_queue_head_t *)__cil_tmp44;
71671#line 459
71672        finish_wait(__cil_tmp45, & __wait);
71673        }
71674#line 459
71675        goto while_break;
71676      }
71677      while_break: /* CIL Label */ ;
71678      }
71679    }
71680#line 459
71681    ret = __ret;
71682  } else {
71683    {
71684#line 464
71685    __ret___0 = (long )timeout;
71686#line 464
71687    tmp___17 = vmw_fence_obj_signaled(fence, flags);
71688    }
71689#line 464
71690    if (tmp___17) {
71691
71692    } else {
71693      {
71694#line 464
71695      while (1) {
71696        while_continue___1: /* CIL Label */ ;
71697        {
71698#line 464
71699        tmp___15 = get_current();
71700#line 464
71701        __cil_tmp46 = & __wait___0;
71702#line 464
71703        *((unsigned int *)__cil_tmp46) = 0U;
71704#line 464
71705        __cil_tmp47 = (unsigned long )(& __wait___0) + 8;
71706#line 464
71707        *((void **)__cil_tmp47) = (void *)tmp___15;
71708#line 464
71709        __cil_tmp48 = (unsigned long )(& __wait___0) + 16;
71710#line 464
71711        *((int (**)(wait_queue_t *wait , unsigned int mode , int flags , void *key ))__cil_tmp48) = & autoremove_wake_function;
71712#line 464
71713        __cil_tmp49 = (unsigned long )(& __wait___0) + 24;
71714#line 464
71715        __cil_tmp50 = (unsigned long )(& __wait___0) + 24;
71716#line 464
71717        *((struct list_head **)__cil_tmp49) = (struct list_head *)__cil_tmp50;
71718#line 464
71719        __cil_tmp51 = 24 + 8;
71720#line 464
71721        __cil_tmp52 = (unsigned long )(& __wait___0) + __cil_tmp51;
71722#line 464
71723        __cil_tmp53 = (unsigned long )(& __wait___0) + 24;
71724#line 464
71725        *((struct list_head **)__cil_tmp52) = (struct list_head *)__cil_tmp53;
71726        }
71727        {
71728#line 464
71729        while (1) {
71730          while_continue___2: /* CIL Label */ ;
71731          {
71732#line 464
71733          __cil_tmp54 = (unsigned long )fence;
71734#line 464
71735          __cil_tmp55 = __cil_tmp54 + 64;
71736#line 464
71737          __cil_tmp56 = (wait_queue_head_t *)__cil_tmp55;
71738#line 464
71739          prepare_to_wait(__cil_tmp56, & __wait___0, 2);
71740#line 464
71741          tmp___16 = vmw_fence_obj_signaled(fence, flags);
71742          }
71743#line 464
71744          if (tmp___16) {
71745#line 464
71746            goto while_break___2;
71747          } else {
71748
71749          }
71750          {
71751#line 464
71752          __ret___0 = schedule_timeout(__ret___0);
71753          }
71754#line 464
71755          if (! __ret___0) {
71756#line 464
71757            goto while_break___2;
71758          } else {
71759
71760          }
71761        }
71762        while_break___2: /* CIL Label */ ;
71763        }
71764        {
71765#line 464
71766        __cil_tmp57 = (unsigned long )fence;
71767#line 464
71768        __cil_tmp58 = __cil_tmp57 + 64;
71769#line 464
71770        __cil_tmp59 = (wait_queue_head_t *)__cil_tmp58;
71771#line 464
71772        finish_wait(__cil_tmp59, & __wait___0);
71773        }
71774#line 464
71775        goto while_break___1;
71776      }
71777      while_break___1: /* CIL Label */ ;
71778      }
71779    }
71780#line 464
71781    ret = __ret___0;
71782  }
71783  {
71784#line 469
71785  vmw_seqno_waiter_remove(dev_priv);
71786#line 471
71787  __cil_tmp60 = ret == 0L;
71788#line 471
71789  __cil_tmp61 = ! __cil_tmp60;
71790#line 471
71791  __cil_tmp62 = ! __cil_tmp61;
71792#line 471
71793  __cil_tmp63 = (long )__cil_tmp62;
71794#line 471
71795  tmp___19 = __builtin_expect(__cil_tmp63, 0L);
71796  }
71797#line 471
71798  if (tmp___19) {
71799#line 472
71800    ret = -16L;
71801  } else {
71802    {
71803#line 473
71804    __cil_tmp64 = ret > 0L;
71805#line 473
71806    __cil_tmp65 = ! __cil_tmp64;
71807#line 473
71808    __cil_tmp66 = ! __cil_tmp65;
71809#line 473
71810    __cil_tmp67 = (long )__cil_tmp66;
71811#line 473
71812    tmp___18 = __builtin_expect(__cil_tmp67, 1L);
71813    }
71814#line 473
71815    if (tmp___18) {
71816#line 474
71817      ret = 0L;
71818    } else {
71819
71820    }
71821  }
71822#line 476
71823  return ((int )ret);
71824}
71825}
71826#line 479 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
71827void vmw_fence_obj_flush(struct vmw_fence_obj *fence ) 
71828{ struct vmw_private *dev_priv ;
71829  unsigned long __cil_tmp3 ;
71830  unsigned long __cil_tmp4 ;
71831  struct vmw_fence_manager *__cil_tmp5 ;
71832  unsigned long __cil_tmp6 ;
71833  unsigned long __cil_tmp7 ;
71834  uint32_t __cil_tmp8 ;
71835
71836  {
71837  {
71838#line 481
71839  __cil_tmp3 = (unsigned long )fence;
71840#line 481
71841  __cil_tmp4 = __cil_tmp3 + 8;
71842#line 481
71843  __cil_tmp5 = *((struct vmw_fence_manager **)__cil_tmp4);
71844#line 481
71845  __cil_tmp6 = (unsigned long )__cil_tmp5;
71846#line 481
71847  __cil_tmp7 = __cil_tmp6 + 8;
71848#line 481
71849  dev_priv = *((struct vmw_private **)__cil_tmp7);
71850#line 483
71851  __cil_tmp8 = (uint32_t )1;
71852#line 483
71853  vmw_fifo_ping_host(dev_priv, __cil_tmp8);
71854  }
71855#line 484
71856  return;
71857}
71858}
71859#line 486 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
71860static void vmw_fence_destroy(struct vmw_fence_obj *fence ) 
71861{ struct vmw_fence_manager *fman ;
71862  struct ttm_mem_global *tmp___7 ;
71863  unsigned long __cil_tmp4 ;
71864  unsigned long __cil_tmp5 ;
71865  void    *__cil_tmp6 ;
71866  unsigned long __cil_tmp7 ;
71867  unsigned long __cil_tmp8 ;
71868  struct vmw_private *__cil_tmp9 ;
71869  unsigned long __cil_tmp10 ;
71870  unsigned long __cil_tmp11 ;
71871  u32 __cil_tmp12 ;
71872  uint64_t __cil_tmp13 ;
71873
71874  {
71875  {
71876#line 488
71877  __cil_tmp4 = (unsigned long )fence;
71878#line 488
71879  __cil_tmp5 = __cil_tmp4 + 8;
71880#line 488
71881  fman = *((struct vmw_fence_manager **)__cil_tmp5);
71882#line 490
71883  __cil_tmp6 = (void    *)fence;
71884#line 490
71885  kfree(__cil_tmp6);
71886#line 494
71887  __cil_tmp7 = (unsigned long )fman;
71888#line 494
71889  __cil_tmp8 = __cil_tmp7 + 8;
71890#line 494
71891  __cil_tmp9 = *((struct vmw_private **)__cil_tmp8);
71892#line 494
71893  tmp___7 = vmw_mem_glob(__cil_tmp9);
71894#line 494
71895  __cil_tmp10 = (unsigned long )fman;
71896#line 494
71897  __cil_tmp11 = __cil_tmp10 + 92;
71898#line 494
71899  __cil_tmp12 = *((u32 *)__cil_tmp11);
71900#line 494
71901  __cil_tmp13 = (uint64_t )__cil_tmp12;
71902#line 494
71903  ttm_mem_global_free(tmp___7, __cil_tmp13);
71904  }
71905#line 496
71906  return;
71907}
71908}
71909#line 498 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
71910int vmw_fence_create(struct vmw_fence_manager *fman , uint32_t seqno , uint32_t mask ,
71911                     struct vmw_fence_obj **p_fence ) 
71912{ struct ttm_mem_global *mem_glob ;
71913  struct ttm_mem_global *tmp___7 ;
71914  struct vmw_fence_obj *fence ;
71915  int ret ;
71916  long tmp___8 ;
71917  void *tmp___9 ;
71918  long tmp___10 ;
71919  long tmp___11 ;
71920  unsigned long __cil_tmp13 ;
71921  unsigned long __cil_tmp14 ;
71922  struct vmw_private *__cil_tmp15 ;
71923  unsigned long __cil_tmp16 ;
71924  unsigned long __cil_tmp17 ;
71925  u32 __cil_tmp18 ;
71926  uint64_t __cil_tmp19 ;
71927  bool __cil_tmp20 ;
71928  bool __cil_tmp21 ;
71929  int __cil_tmp22 ;
71930  int __cil_tmp23 ;
71931  int __cil_tmp24 ;
71932  long __cil_tmp25 ;
71933  void *__cil_tmp26 ;
71934  unsigned long __cil_tmp27 ;
71935  unsigned long __cil_tmp28 ;
71936  int __cil_tmp29 ;
71937  int __cil_tmp30 ;
71938  int __cil_tmp31 ;
71939  long __cil_tmp32 ;
71940  int __cil_tmp33 ;
71941  int __cil_tmp34 ;
71942  int __cil_tmp35 ;
71943  long __cil_tmp36 ;
71944  void    *__cil_tmp37 ;
71945  unsigned long __cil_tmp38 ;
71946  unsigned long __cil_tmp39 ;
71947  u32 __cil_tmp40 ;
71948  uint64_t __cil_tmp41 ;
71949
71950  {
71951  {
71952#line 503
71953  __cil_tmp13 = (unsigned long )fman;
71954#line 503
71955  __cil_tmp14 = __cil_tmp13 + 8;
71956#line 503
71957  __cil_tmp15 = *((struct vmw_private **)__cil_tmp14);
71958#line 503
71959  tmp___7 = vmw_mem_glob(__cil_tmp15);
71960#line 503
71961  mem_glob = tmp___7;
71962#line 507
71963  __cil_tmp16 = (unsigned long )fman;
71964#line 507
71965  __cil_tmp17 = __cil_tmp16 + 92;
71966#line 507
71967  __cil_tmp18 = *((u32 *)__cil_tmp17);
71968#line 507
71969  __cil_tmp19 = (uint64_t )__cil_tmp18;
71970#line 507
71971  __cil_tmp20 = (bool )0;
71972#line 507
71973  __cil_tmp21 = (bool )0;
71974#line 507
71975  ret = ttm_mem_global_alloc(mem_glob, __cil_tmp19, __cil_tmp20, __cil_tmp21);
71976#line 509
71977  __cil_tmp22 = ret != 0;
71978#line 509
71979  __cil_tmp23 = ! __cil_tmp22;
71980#line 509
71981  __cil_tmp24 = ! __cil_tmp23;
71982#line 509
71983  __cil_tmp25 = (long )__cil_tmp24;
71984#line 509
71985  tmp___8 = __builtin_expect(__cil_tmp25, 0L);
71986  }
71987#line 509
71988  if (tmp___8) {
71989#line 510
71990    return (ret);
71991  } else {
71992
71993  }
71994  {
71995#line 512
71996  tmp___9 = kzalloc(104UL, 208U);
71997#line 512
71998  fence = (struct vmw_fence_obj *)tmp___9;
71999#line 513
72000  __cil_tmp26 = (void *)0;
72001#line 513
72002  __cil_tmp27 = (unsigned long )__cil_tmp26;
72003#line 513
72004  __cil_tmp28 = (unsigned long )fence;
72005#line 513
72006  __cil_tmp29 = __cil_tmp28 == __cil_tmp27;
72007#line 513
72008  __cil_tmp30 = ! __cil_tmp29;
72009#line 513
72010  __cil_tmp31 = ! __cil_tmp30;
72011#line 513
72012  __cil_tmp32 = (long )__cil_tmp31;
72013#line 513
72014  tmp___10 = __builtin_expect(__cil_tmp32, 0L);
72015  }
72016#line 513
72017  if (tmp___10) {
72018#line 514
72019    ret = -12;
72020#line 515
72021    goto out_no_object;
72022  } else {
72023
72024  }
72025  {
72026#line 518
72027  ret = vmw_fence_obj_init(fman, fence, seqno, mask, & vmw_fence_destroy);
72028#line 520
72029  __cil_tmp33 = ret != 0;
72030#line 520
72031  __cil_tmp34 = ! __cil_tmp33;
72032#line 520
72033  __cil_tmp35 = ! __cil_tmp34;
72034#line 520
72035  __cil_tmp36 = (long )__cil_tmp35;
72036#line 520
72037  tmp___11 = __builtin_expect(__cil_tmp36, 0L);
72038  }
72039#line 520
72040  if (tmp___11) {
72041#line 521
72042    goto out_err_init;
72043  } else {
72044
72045  }
72046#line 523
72047  *p_fence = fence;
72048#line 524
72049  return (0);
72050  out_err_init: 
72051  {
72052#line 527
72053  __cil_tmp37 = (void    *)fence;
72054#line 527
72055  kfree(__cil_tmp37);
72056  }
72057  out_no_object: 
72058  {
72059#line 529
72060  __cil_tmp38 = (unsigned long )fman;
72061#line 529
72062  __cil_tmp39 = __cil_tmp38 + 92;
72063#line 529
72064  __cil_tmp40 = *((u32 *)__cil_tmp39);
72065#line 529
72066  __cil_tmp41 = (uint64_t )__cil_tmp40;
72067#line 529
72068  ttm_mem_global_free(mem_glob, __cil_tmp41);
72069  }
72070#line 530
72071  return (ret);
72072}
72073}
72074#line 534 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72075static void vmw_user_fence_destroy(struct vmw_fence_obj *fence ) 
72076{ struct vmw_user_fence *ufence ;
72077  struct vmw_fence_obj    *__mptr ;
72078  struct vmw_fence_manager *fman ;
72079  struct ttm_mem_global *tmp___7 ;
72080  struct vmw_user_fence *__cil_tmp6 ;
72081  unsigned long __cil_tmp7 ;
72082  unsigned long __cil_tmp8 ;
72083  struct vmw_fence_obj *__cil_tmp9 ;
72084  unsigned int __cil_tmp10 ;
72085  char *__cil_tmp11 ;
72086  char *__cil_tmp12 ;
72087  unsigned long __cil_tmp13 ;
72088  unsigned long __cil_tmp14 ;
72089  void    *__cil_tmp15 ;
72090  unsigned long __cil_tmp16 ;
72091  unsigned long __cil_tmp17 ;
72092  struct vmw_private *__cil_tmp18 ;
72093  unsigned long __cil_tmp19 ;
72094  unsigned long __cil_tmp20 ;
72095  u32 __cil_tmp21 ;
72096  uint64_t __cil_tmp22 ;
72097
72098  {
72099  {
72100#line 537
72101  __mptr = (struct vmw_fence_obj    *)fence;
72102#line 537
72103  __cil_tmp6 = (struct vmw_user_fence *)0;
72104#line 537
72105  __cil_tmp7 = (unsigned long )__cil_tmp6;
72106#line 537
72107  __cil_tmp8 = __cil_tmp7 + 64;
72108#line 537
72109  __cil_tmp9 = (struct vmw_fence_obj *)__cil_tmp8;
72110#line 537
72111  __cil_tmp10 = (unsigned int )__cil_tmp9;
72112#line 537
72113  __cil_tmp11 = (char *)__mptr;
72114#line 537
72115  __cil_tmp12 = __cil_tmp11 - __cil_tmp10;
72116#line 537
72117  ufence = (struct vmw_user_fence *)__cil_tmp12;
72118#line 538
72119  __cil_tmp13 = (unsigned long )fence;
72120#line 538
72121  __cil_tmp14 = __cil_tmp13 + 8;
72122#line 538
72123  fman = *((struct vmw_fence_manager **)__cil_tmp14);
72124#line 540
72125  __cil_tmp15 = (void    *)ufence;
72126#line 540
72127  kfree(__cil_tmp15);
72128#line 544
72129  __cil_tmp16 = (unsigned long )fman;
72130#line 544
72131  __cil_tmp17 = __cil_tmp16 + 8;
72132#line 544
72133  __cil_tmp18 = *((struct vmw_private **)__cil_tmp17);
72134#line 544
72135  tmp___7 = vmw_mem_glob(__cil_tmp18);
72136#line 544
72137  __cil_tmp19 = (unsigned long )fman;
72138#line 544
72139  __cil_tmp20 = __cil_tmp19 + 88;
72140#line 544
72141  __cil_tmp21 = *((u32 *)__cil_tmp20);
72142#line 544
72143  __cil_tmp22 = (uint64_t )__cil_tmp21;
72144#line 544
72145  ttm_mem_global_free(tmp___7, __cil_tmp22);
72146  }
72147#line 546
72148  return;
72149}
72150}
72151#line 548 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72152static void vmw_user_fence_base_release(struct ttm_base_object **p_base ) 
72153{ struct ttm_base_object *base ;
72154  struct vmw_user_fence *ufence ;
72155  struct ttm_base_object    *__mptr ;
72156  struct vmw_fence_obj *fence ;
72157  struct vmw_user_fence *__cil_tmp6 ;
72158  struct ttm_base_object *__cil_tmp7 ;
72159  unsigned int __cil_tmp8 ;
72160  char *__cil_tmp9 ;
72161  char *__cil_tmp10 ;
72162  struct vmw_fence_obj **__cil_tmp11 ;
72163  unsigned long __cil_tmp12 ;
72164  unsigned long __cil_tmp13 ;
72165  void *__cil_tmp14 ;
72166
72167  {
72168  {
72169#line 550
72170  base = *p_base;
72171#line 552
72172  __mptr = (struct ttm_base_object    *)base;
72173#line 552
72174  __cil_tmp6 = (struct vmw_user_fence *)0;
72175#line 552
72176  __cil_tmp7 = (struct ttm_base_object *)__cil_tmp6;
72177#line 552
72178  __cil_tmp8 = (unsigned int )__cil_tmp7;
72179#line 552
72180  __cil_tmp9 = (char *)__mptr;
72181#line 552
72182  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
72183#line 552
72184  ufence = (struct vmw_user_fence *)__cil_tmp10;
72185#line 553
72186  __cil_tmp11 = & fence;
72187#line 553
72188  __cil_tmp12 = (unsigned long )ufence;
72189#line 553
72190  __cil_tmp13 = __cil_tmp12 + 64;
72191#line 553
72192  *__cil_tmp11 = (struct vmw_fence_obj *)__cil_tmp13;
72193#line 555
72194  __cil_tmp14 = (void *)0;
72195#line 555
72196  *p_base = (struct ttm_base_object *)__cil_tmp14;
72197#line 556
72198  vmw_fence_obj_unreference(& fence);
72199  }
72200#line 557
72201  return;
72202}
72203}
72204#line 559 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72205int vmw_user_fence_create(struct drm_file *file_priv , struct vmw_fence_manager *fman ,
72206                          uint32_t seqno , uint32_t mask , struct vmw_fence_obj **p_fence ,
72207                          uint32_t *p_handle ) 
72208{ struct ttm_object_file *tfile ;
72209  struct vmw_fpriv *tmp___7 ;
72210  struct vmw_user_fence *ufence ;
72211  struct vmw_fence_obj *tmp___8 ;
72212  struct ttm_mem_global *mem_glob ;
72213  struct ttm_mem_global *tmp___9 ;
72214  int ret ;
72215  long tmp___10 ;
72216  void *tmp___11 ;
72217  long tmp___12 ;
72218  long tmp___13 ;
72219  long tmp___14 ;
72220  unsigned long __cil_tmp19 ;
72221  unsigned long __cil_tmp20 ;
72222  unsigned long __cil_tmp21 ;
72223  unsigned long __cil_tmp22 ;
72224  struct vmw_private *__cil_tmp23 ;
72225  unsigned long __cil_tmp24 ;
72226  unsigned long __cil_tmp25 ;
72227  u32 __cil_tmp26 ;
72228  uint64_t __cil_tmp27 ;
72229  bool __cil_tmp28 ;
72230  bool __cil_tmp29 ;
72231  int __cil_tmp30 ;
72232  int __cil_tmp31 ;
72233  int __cil_tmp32 ;
72234  long __cil_tmp33 ;
72235  void *__cil_tmp34 ;
72236  unsigned long __cil_tmp35 ;
72237  unsigned long __cil_tmp36 ;
72238  int __cil_tmp37 ;
72239  int __cil_tmp38 ;
72240  int __cil_tmp39 ;
72241  long __cil_tmp40 ;
72242  unsigned long __cil_tmp41 ;
72243  unsigned long __cil_tmp42 ;
72244  struct vmw_fence_obj *__cil_tmp43 ;
72245  int __cil_tmp44 ;
72246  int __cil_tmp45 ;
72247  int __cil_tmp46 ;
72248  long __cil_tmp47 ;
72249  void    *__cil_tmp48 ;
72250  struct vmw_fence_obj **__cil_tmp49 ;
72251  unsigned long __cil_tmp50 ;
72252  unsigned long __cil_tmp51 ;
72253  struct vmw_fence_obj *__cil_tmp52 ;
72254  struct ttm_base_object *__cil_tmp53 ;
72255  bool __cil_tmp54 ;
72256  enum ttm_object_type __cil_tmp55 ;
72257  void *__cil_tmp56 ;
72258  void (*__cil_tmp57)(struct ttm_base_object * , enum ttm_ref_type ref_type ) ;
72259  int __cil_tmp58 ;
72260  int __cil_tmp59 ;
72261  int __cil_tmp60 ;
72262  long __cil_tmp61 ;
72263  unsigned long __cil_tmp62 ;
72264  unsigned long __cil_tmp63 ;
72265  unsigned long __cil_tmp64 ;
72266  unsigned long __cil_tmp65 ;
72267  unsigned long __cil_tmp66 ;
72268  unsigned long __cil_tmp67 ;
72269  unsigned long __cil_tmp68 ;
72270  struct vmw_fence_obj **__cil_tmp69 ;
72271  unsigned long __cil_tmp70 ;
72272  unsigned long __cil_tmp71 ;
72273  unsigned long __cil_tmp72 ;
72274  unsigned long __cil_tmp73 ;
72275  u32 __cil_tmp74 ;
72276  uint64_t __cil_tmp75 ;
72277
72278  {
72279  {
72280#line 566
72281  tmp___7 = vmw_fpriv(file_priv);
72282#line 566
72283  __cil_tmp19 = (unsigned long )tmp___7;
72284#line 566
72285  __cil_tmp20 = __cil_tmp19 + 8;
72286#line 566
72287  tfile = *((struct ttm_object_file **)__cil_tmp20);
72288#line 569
72289  __cil_tmp21 = (unsigned long )fman;
72290#line 569
72291  __cil_tmp22 = __cil_tmp21 + 8;
72292#line 569
72293  __cil_tmp23 = *((struct vmw_private **)__cil_tmp22);
72294#line 569
72295  tmp___9 = vmw_mem_glob(__cil_tmp23);
72296#line 569
72297  mem_glob = tmp___9;
72298#line 577
72299  __cil_tmp24 = (unsigned long )fman;
72300#line 577
72301  __cil_tmp25 = __cil_tmp24 + 88;
72302#line 577
72303  __cil_tmp26 = *((u32 *)__cil_tmp25);
72304#line 577
72305  __cil_tmp27 = (uint64_t )__cil_tmp26;
72306#line 577
72307  __cil_tmp28 = (bool )0;
72308#line 577
72309  __cil_tmp29 = (bool )0;
72310#line 577
72311  ret = ttm_mem_global_alloc(mem_glob, __cil_tmp27, __cil_tmp28, __cil_tmp29);
72312#line 579
72313  __cil_tmp30 = ret != 0;
72314#line 579
72315  __cil_tmp31 = ! __cil_tmp30;
72316#line 579
72317  __cil_tmp32 = ! __cil_tmp31;
72318#line 579
72319  __cil_tmp33 = (long )__cil_tmp32;
72320#line 579
72321  tmp___10 = __builtin_expect(__cil_tmp33, 0L);
72322  }
72323#line 579
72324  if (tmp___10) {
72325#line 580
72326    return (ret);
72327  } else {
72328
72329  }
72330  {
72331#line 582
72332  tmp___11 = kzalloc(168UL, 208U);
72333#line 582
72334  ufence = (struct vmw_user_fence *)tmp___11;
72335#line 583
72336  __cil_tmp34 = (void *)0;
72337#line 583
72338  __cil_tmp35 = (unsigned long )__cil_tmp34;
72339#line 583
72340  __cil_tmp36 = (unsigned long )ufence;
72341#line 583
72342  __cil_tmp37 = __cil_tmp36 == __cil_tmp35;
72343#line 583
72344  __cil_tmp38 = ! __cil_tmp37;
72345#line 583
72346  __cil_tmp39 = ! __cil_tmp38;
72347#line 583
72348  __cil_tmp40 = (long )__cil_tmp39;
72349#line 583
72350  tmp___12 = __builtin_expect(__cil_tmp40, 0L);
72351  }
72352#line 583
72353  if (tmp___12) {
72354#line 584
72355    ret = -12;
72356#line 585
72357    goto out_no_object;
72358  } else {
72359
72360  }
72361  {
72362#line 588
72363  __cil_tmp41 = (unsigned long )ufence;
72364#line 588
72365  __cil_tmp42 = __cil_tmp41 + 64;
72366#line 588
72367  __cil_tmp43 = (struct vmw_fence_obj *)__cil_tmp42;
72368#line 588
72369  ret = vmw_fence_obj_init(fman, __cil_tmp43, seqno, mask, & vmw_user_fence_destroy);
72370#line 590
72371  __cil_tmp44 = ret != 0;
72372#line 590
72373  __cil_tmp45 = ! __cil_tmp44;
72374#line 590
72375  __cil_tmp46 = ! __cil_tmp45;
72376#line 590
72377  __cil_tmp47 = (long )__cil_tmp46;
72378#line 590
72379  tmp___13 = __builtin_expect(__cil_tmp47, 0L);
72380  }
72381#line 590
72382  if (tmp___13) {
72383    {
72384#line 591
72385    __cil_tmp48 = (void    *)ufence;
72386#line 591
72387    kfree(__cil_tmp48);
72388    }
72389#line 592
72390    goto out_no_object;
72391  } else {
72392
72393  }
72394  {
72395#line 599
72396  __cil_tmp49 = & tmp___8;
72397#line 599
72398  __cil_tmp50 = (unsigned long )ufence;
72399#line 599
72400  __cil_tmp51 = __cil_tmp50 + 64;
72401#line 599
72402  __cil_tmp52 = (struct vmw_fence_obj *)__cil_tmp51;
72403#line 599
72404  *__cil_tmp49 = vmw_fence_obj_reference(__cil_tmp52);
72405#line 600
72406  __cil_tmp53 = (struct ttm_base_object *)ufence;
72407#line 600
72408  __cil_tmp54 = (bool )0;
72409#line 600
72410  __cil_tmp55 = (enum ttm_object_type )259;
72411#line 600
72412  __cil_tmp56 = (void *)0;
72413#line 600
72414  __cil_tmp57 = (void (*)(struct ttm_base_object * , enum ttm_ref_type ref_type ))__cil_tmp56;
72415#line 600
72416  ret = ttm_base_object_init(tfile, __cil_tmp53, __cil_tmp54, __cil_tmp55, & vmw_user_fence_base_release,
72417                             __cil_tmp57);
72418#line 605
72419  __cil_tmp58 = ret != 0;
72420#line 605
72421  __cil_tmp59 = ! __cil_tmp58;
72422#line 605
72423  __cil_tmp60 = ! __cil_tmp59;
72424#line 605
72425  __cil_tmp61 = (long )__cil_tmp60;
72426#line 605
72427  tmp___14 = __builtin_expect(__cil_tmp61, 0L);
72428  }
72429#line 605
72430  if (tmp___14) {
72431    {
72432#line 609
72433    vmw_fence_obj_unreference(& tmp___8);
72434    }
72435#line 610
72436    goto out_err;
72437  } else {
72438
72439  }
72440#line 613
72441  __cil_tmp62 = (unsigned long )ufence;
72442#line 613
72443  __cil_tmp63 = __cil_tmp62 + 64;
72444#line 613
72445  *p_fence = (struct vmw_fence_obj *)__cil_tmp63;
72446#line 614
72447  __cil_tmp64 = 0 + 16;
72448#line 614
72449  __cil_tmp65 = 0 + __cil_tmp64;
72450#line 614
72451  __cil_tmp66 = (unsigned long )ufence;
72452#line 614
72453  __cil_tmp67 = __cil_tmp66 + __cil_tmp65;
72454#line 614
72455  __cil_tmp68 = *((unsigned long *)__cil_tmp67);
72456#line 614
72457  *p_handle = (uint32_t )__cil_tmp68;
72458#line 616
72459  return (0);
72460  out_err: 
72461  {
72462#line 618
72463  __cil_tmp69 = & tmp___8;
72464#line 618
72465  __cil_tmp70 = (unsigned long )ufence;
72466#line 618
72467  __cil_tmp71 = __cil_tmp70 + 64;
72468#line 618
72469  *__cil_tmp69 = (struct vmw_fence_obj *)__cil_tmp71;
72470#line 619
72471  vmw_fence_obj_unreference(& tmp___8);
72472  }
72473  out_no_object: 
72474  {
72475#line 621
72476  __cil_tmp72 = (unsigned long )fman;
72477#line 621
72478  __cil_tmp73 = __cil_tmp72 + 88;
72479#line 621
72480  __cil_tmp74 = *((u32 *)__cil_tmp73);
72481#line 621
72482  __cil_tmp75 = (uint64_t )__cil_tmp74;
72483#line 621
72484  ttm_mem_global_free(mem_glob, __cil_tmp75);
72485  }
72486#line 622
72487  return (ret);
72488}
72489}
72490#line 630 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72491void vmw_fence_fifo_down(struct vmw_fence_manager *fman ) 
72492{ unsigned long irq_flags ;
72493  struct list_head action_list ;
72494  int ret ;
72495  raw_spinlock_t *tmp___7 ;
72496  struct vmw_fence_obj *fence ;
72497  struct list_head    *__mptr ;
72498  long tmp___8 ;
72499  int tmp___9 ;
72500  int tmp___10 ;
72501  long tmp___11 ;
72502  int tmp___12 ;
72503  unsigned long __cil_tmp15 ;
72504  unsigned long __cil_tmp16 ;
72505  spinlock_t *__cil_tmp17 ;
72506  unsigned long __cil_tmp18 ;
72507  unsigned long __cil_tmp19 ;
72508  unsigned long __cil_tmp20 ;
72509  unsigned long __cil_tmp21 ;
72510  struct list_head *__cil_tmp22 ;
72511  struct list_head    *__cil_tmp23 ;
72512  unsigned long __cil_tmp24 ;
72513  unsigned long __cil_tmp25 ;
72514  unsigned long __cil_tmp26 ;
72515  struct list_head *__cil_tmp27 ;
72516  struct vmw_fence_obj *__cil_tmp28 ;
72517  unsigned long __cil_tmp29 ;
72518  unsigned long __cil_tmp30 ;
72519  struct list_head *__cil_tmp31 ;
72520  unsigned int __cil_tmp32 ;
72521  char *__cil_tmp33 ;
72522  char *__cil_tmp34 ;
72523  struct kref *__cil_tmp35 ;
72524  unsigned long __cil_tmp36 ;
72525  unsigned long __cil_tmp37 ;
72526  spinlock_t *__cil_tmp38 ;
72527  unsigned long __cil_tmp39 ;
72528  unsigned long __cil_tmp40 ;
72529  uint32_t __cil_tmp41 ;
72530  bool __cil_tmp42 ;
72531  bool __cil_tmp43 ;
72532  int __cil_tmp44 ;
72533  int __cil_tmp45 ;
72534  int __cil_tmp46 ;
72535  long __cil_tmp47 ;
72536  unsigned long __cil_tmp48 ;
72537  unsigned long __cil_tmp49 ;
72538  struct list_head *__cil_tmp50 ;
72539  unsigned long __cil_tmp51 ;
72540  unsigned long __cil_tmp52 ;
72541  unsigned long __cil_tmp53 ;
72542  unsigned long __cil_tmp54 ;
72543  uint32_t __cil_tmp55 ;
72544  unsigned long __cil_tmp56 ;
72545  unsigned long __cil_tmp57 ;
72546  struct list_head *__cil_tmp58 ;
72547  unsigned long __cil_tmp59 ;
72548  unsigned long __cil_tmp60 ;
72549  wait_queue_head_t *__cil_tmp61 ;
72550  void *__cil_tmp62 ;
72551  unsigned long __cil_tmp63 ;
72552  unsigned long __cil_tmp64 ;
72553  spinlock_t *__cil_tmp65 ;
72554  unsigned long __cil_tmp66 ;
72555  unsigned long __cil_tmp67 ;
72556  struct list_head *__cil_tmp68 ;
72557  struct list_head    *__cil_tmp69 ;
72558  long __cil_tmp70 ;
72559  struct kref *__cil_tmp71 ;
72560  unsigned long __cil_tmp72 ;
72561  unsigned long __cil_tmp73 ;
72562  spinlock_t *__cil_tmp74 ;
72563
72564  {
72565  {
72566#line 641
72567  while (1) {
72568    while_continue: /* CIL Label */ ;
72569    {
72570#line 641
72571    while (1) {
72572      while_continue___0: /* CIL Label */ ;
72573      {
72574#line 641
72575      __cil_tmp15 = (unsigned long )fman;
72576#line 641
72577      __cil_tmp16 = __cil_tmp15 + 16;
72578#line 641
72579      __cil_tmp17 = (spinlock_t *)__cil_tmp16;
72580#line 641
72581      tmp___7 = spinlock_check(__cil_tmp17);
72582#line 641
72583      irq_flags = _raw_spin_lock_irqsave(tmp___7);
72584      }
72585#line 641
72586      goto while_break___0;
72587    }
72588    while_break___0: /* CIL Label */ ;
72589    }
72590#line 641
72591    goto while_break;
72592  }
72593  while_break: /* CIL Label */ ;
72594  }
72595#line 642
72596  __cil_tmp18 = (unsigned long )fman;
72597#line 642
72598  __cil_tmp19 = __cil_tmp18 + 100;
72599#line 642
72600  *((bool *)__cil_tmp19) = (bool )1;
72601  {
72602#line 643
72603  while (1) {
72604    while_continue___1: /* CIL Label */ ;
72605    {
72606#line 643
72607    __cil_tmp20 = (unsigned long )fman;
72608#line 643
72609    __cil_tmp21 = __cil_tmp20 + 40;
72610#line 643
72611    __cil_tmp22 = (struct list_head *)__cil_tmp21;
72612#line 643
72613    __cil_tmp23 = (struct list_head    *)__cil_tmp22;
72614#line 643
72615    tmp___12 = list_empty(__cil_tmp23);
72616    }
72617#line 643
72618    if (tmp___12) {
72619#line 643
72620      goto while_break___1;
72621    } else {
72622
72623    }
72624    {
72625#line 645
72626    __cil_tmp24 = 40 + 8;
72627#line 645
72628    __cil_tmp25 = (unsigned long )fman;
72629#line 645
72630    __cil_tmp26 = __cil_tmp25 + __cil_tmp24;
72631#line 645
72632    __cil_tmp27 = *((struct list_head **)__cil_tmp26);
72633#line 645
72634    __mptr = (struct list_head    *)__cil_tmp27;
72635#line 645
72636    __cil_tmp28 = (struct vmw_fence_obj *)0;
72637#line 645
72638    __cil_tmp29 = (unsigned long )__cil_tmp28;
72639#line 645
72640    __cil_tmp30 = __cil_tmp29 + 16;
72641#line 645
72642    __cil_tmp31 = (struct list_head *)__cil_tmp30;
72643#line 645
72644    __cil_tmp32 = (unsigned int )__cil_tmp31;
72645#line 645
72646    __cil_tmp33 = (char *)__mptr;
72647#line 645
72648    __cil_tmp34 = __cil_tmp33 - __cil_tmp32;
72649#line 645
72650    fence = (struct vmw_fence_obj *)__cil_tmp34;
72651#line 647
72652    __cil_tmp35 = (struct kref *)fence;
72653#line 647
72654    kref_get(__cil_tmp35);
72655#line 648
72656    __cil_tmp36 = (unsigned long )fman;
72657#line 648
72658    __cil_tmp37 = __cil_tmp36 + 16;
72659#line 648
72660    __cil_tmp38 = (spinlock_t *)__cil_tmp37;
72661#line 648
72662    spin_unlock_irq(__cil_tmp38);
72663#line 650
72664    __cil_tmp39 = (unsigned long )fence;
72665#line 650
72666    __cil_tmp40 = __cil_tmp39 + 36;
72667#line 650
72668    __cil_tmp41 = *((uint32_t *)__cil_tmp40);
72669#line 650
72670    __cil_tmp42 = (bool )0;
72671#line 650
72672    __cil_tmp43 = (bool )0;
72673#line 650
72674    ret = vmw_fence_obj_wait(fence, __cil_tmp41, __cil_tmp42, __cil_tmp43, 1250UL);
72675#line 654
72676    __cil_tmp44 = ret != 0;
72677#line 654
72678    __cil_tmp45 = ! __cil_tmp44;
72679#line 654
72680    __cil_tmp46 = ! __cil_tmp45;
72681#line 654
72682    __cil_tmp47 = (long )__cil_tmp46;
72683#line 654
72684    tmp___8 = __builtin_expect(__cil_tmp47, 0L);
72685    }
72686#line 654
72687    if (tmp___8) {
72688      {
72689#line 655
72690      __cil_tmp48 = (unsigned long )fence;
72691#line 655
72692      __cil_tmp49 = __cil_tmp48 + 16;
72693#line 655
72694      __cil_tmp50 = (struct list_head *)__cil_tmp49;
72695#line 655
72696      list_del_init(__cil_tmp50);
72697#line 656
72698      __cil_tmp51 = (unsigned long )fence;
72699#line 656
72700      __cil_tmp52 = __cil_tmp51 + 32;
72701#line 656
72702      __cil_tmp53 = (unsigned long )fence;
72703#line 656
72704      __cil_tmp54 = __cil_tmp53 + 32;
72705#line 656
72706      __cil_tmp55 = *((uint32_t *)__cil_tmp54);
72707#line 656
72708      *((uint32_t *)__cil_tmp52) = __cil_tmp55 | 1U;
72709#line 657
72710      INIT_LIST_HEAD(& action_list);
72711#line 658
72712      __cil_tmp56 = (unsigned long )fence;
72713#line 658
72714      __cil_tmp57 = __cil_tmp56 + 40;
72715#line 658
72716      __cil_tmp58 = (struct list_head *)__cil_tmp57;
72717#line 658
72718      list_splice_init(__cil_tmp58, & action_list);
72719#line 660
72720      vmw_fences_perform_actions(fman, & action_list);
72721#line 661
72722      __cil_tmp59 = (unsigned long )fence;
72723#line 661
72724      __cil_tmp60 = __cil_tmp59 + 64;
72725#line 661
72726      __cil_tmp61 = (wait_queue_head_t *)__cil_tmp60;
72727#line 661
72728      __cil_tmp62 = (void *)0;
72729#line 661
72730      __wake_up(__cil_tmp61, 3U, 0, __cil_tmp62);
72731      }
72732    } else {
72733
72734    }
72735    {
72736#line 664
72737    __cil_tmp63 = (unsigned long )fman;
72738#line 664
72739    __cil_tmp64 = __cil_tmp63 + 16;
72740#line 664
72741    __cil_tmp65 = (spinlock_t *)__cil_tmp64;
72742#line 664
72743    spin_lock_irq(__cil_tmp65);
72744    }
72745    {
72746#line 666
72747    while (1) {
72748      while_continue___2: /* CIL Label */ ;
72749      {
72750#line 666
72751      __cil_tmp66 = (unsigned long )fence;
72752#line 666
72753      __cil_tmp67 = __cil_tmp66 + 16;
72754#line 666
72755      __cil_tmp68 = (struct list_head *)__cil_tmp67;
72756#line 666
72757      __cil_tmp69 = (struct list_head    *)__cil_tmp68;
72758#line 666
72759      tmp___9 = list_empty(__cil_tmp69);
72760      }
72761#line 666
72762      if (tmp___9) {
72763#line 666
72764        tmp___10 = 0;
72765      } else {
72766#line 666
72767        tmp___10 = 1;
72768      }
72769      {
72770#line 666
72771      __cil_tmp70 = (long )tmp___10;
72772#line 666
72773      tmp___11 = __builtin_expect(__cil_tmp70, 0L);
72774      }
72775#line 666
72776      if (tmp___11) {
72777        {
72778#line 666
72779        while (1) {
72780          while_continue___3: /* CIL Label */ ;
72781#line 666
72782          __asm__  volatile   ("1:\tud2\n"
72783                               ".pushsection __bug_table,\"a\"\n"
72784                               "2:\t.long 1b - 2b, %c0 - 2b\n"
72785                               "\t.word %c1, 0\n"
72786                               "\t.org 2b+%c2\n"
72787                               ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"),
72788                               "i" (666), "i" (12UL));
72789          {
72790#line 666
72791          while (1) {
72792            while_continue___4: /* CIL Label */ ;
72793          }
72794          while_break___4: /* CIL Label */ ;
72795          }
72796#line 666
72797          goto while_break___3;
72798        }
72799        while_break___3: /* CIL Label */ ;
72800        }
72801      } else {
72802
72803      }
72804#line 666
72805      goto while_break___2;
72806    }
72807    while_break___2: /* CIL Label */ ;
72808    }
72809    {
72810#line 667
72811    __cil_tmp71 = (struct kref *)fence;
72812#line 667
72813    kref_put(__cil_tmp71, & vmw_fence_obj_destroy_locked);
72814    }
72815  }
72816  while_break___1: /* CIL Label */ ;
72817  }
72818  {
72819#line 669
72820  __cil_tmp72 = (unsigned long )fman;
72821#line 669
72822  __cil_tmp73 = __cil_tmp72 + 16;
72823#line 669
72824  __cil_tmp74 = (spinlock_t *)__cil_tmp73;
72825#line 669
72826  spin_unlock_irqrestore(__cil_tmp74, irq_flags);
72827  }
72828#line 670
72829  return;
72830}
72831}
72832#line 672 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72833void vmw_fence_fifo_up(struct vmw_fence_manager *fman ) 
72834{ unsigned long irq_flags ;
72835  raw_spinlock_t *tmp___7 ;
72836  unsigned long __cil_tmp6 ;
72837  unsigned long __cil_tmp7 ;
72838  spinlock_t *__cil_tmp8 ;
72839  unsigned long __cil_tmp9 ;
72840  unsigned long __cil_tmp10 ;
72841  unsigned long __cil_tmp11 ;
72842  unsigned long __cil_tmp12 ;
72843  spinlock_t *__cil_tmp13 ;
72844
72845  {
72846  {
72847#line 676
72848  while (1) {
72849    while_continue: /* CIL Label */ ;
72850    {
72851#line 676
72852    while (1) {
72853      while_continue___0: /* CIL Label */ ;
72854      {
72855#line 676
72856      __cil_tmp6 = (unsigned long )fman;
72857#line 676
72858      __cil_tmp7 = __cil_tmp6 + 16;
72859#line 676
72860      __cil_tmp8 = (spinlock_t *)__cil_tmp7;
72861#line 676
72862      tmp___7 = spinlock_check(__cil_tmp8);
72863#line 676
72864      irq_flags = _raw_spin_lock_irqsave(tmp___7);
72865      }
72866#line 676
72867      goto while_break___0;
72868    }
72869    while_break___0: /* CIL Label */ ;
72870    }
72871#line 676
72872    goto while_break;
72873  }
72874  while_break: /* CIL Label */ ;
72875  }
72876  {
72877#line 677
72878  __cil_tmp9 = (unsigned long )fman;
72879#line 677
72880  __cil_tmp10 = __cil_tmp9 + 100;
72881#line 677
72882  *((bool *)__cil_tmp10) = (bool )0;
72883#line 678
72884  __cil_tmp11 = (unsigned long )fman;
72885#line 678
72886  __cil_tmp12 = __cil_tmp11 + 16;
72887#line 678
72888  __cil_tmp13 = (spinlock_t *)__cil_tmp12;
72889#line 678
72890  spin_unlock_irqrestore(__cil_tmp13, irq_flags);
72891  }
72892#line 679
72893  return;
72894}
72895}
72896#line 682 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
72897int vmw_fence_obj_wait_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
72898{ struct drm_vmw_fence_wait_arg *arg ;
72899  unsigned long timeout ;
72900  struct ttm_base_object *base ;
72901  struct vmw_fence_obj *fence ;
72902  struct ttm_object_file *tfile ;
72903  struct vmw_fpriv *tmp___7 ;
72904  int ret ;
72905  uint64_t wait_timeout ;
72906  long tmp___8 ;
72907  struct ttm_base_object    *__mptr ;
72908  bool tmp___10 ;
72909  int tmp___11 ;
72910  unsigned long __cil_tmp21 ;
72911  unsigned long __cil_tmp22 ;
72912  unsigned long __cil_tmp23 ;
72913  unsigned long __cil_tmp24 ;
72914  uint64_t __cil_tmp25 ;
72915  uint64_t __cil_tmp26 ;
72916  uint64_t __cil_tmp27 ;
72917  uint64_t __cil_tmp28 ;
72918  uint64_t __cil_tmp29 ;
72919  unsigned long __cil_tmp30 ;
72920  unsigned long __cil_tmp31 ;
72921  int32_t __cil_tmp32 ;
72922  unsigned long __cil_tmp33 ;
72923  unsigned long __cil_tmp34 ;
72924  unsigned long __cil_tmp35 ;
72925  unsigned long __cil_tmp36 ;
72926  uint64_t __cil_tmp37 ;
72927  struct ttm_base_object **__cil_tmp38 ;
72928  uint32_t __cil_tmp39 ;
72929  void *__cil_tmp40 ;
72930  unsigned long __cil_tmp41 ;
72931  struct ttm_base_object **__cil_tmp42 ;
72932  struct ttm_base_object *__cil_tmp43 ;
72933  unsigned long __cil_tmp44 ;
72934  int __cil_tmp45 ;
72935  int __cil_tmp46 ;
72936  int __cil_tmp47 ;
72937  long __cil_tmp48 ;
72938  uint32_t __cil_tmp49 ;
72939  unsigned long __cil_tmp50 ;
72940  struct ttm_base_object **__cil_tmp51 ;
72941  struct ttm_base_object *__cil_tmp52 ;
72942  struct vmw_user_fence *__cil_tmp53 ;
72943  struct ttm_base_object *__cil_tmp54 ;
72944  unsigned int __cil_tmp55 ;
72945  char *__cil_tmp56 ;
72946  char *__cil_tmp57 ;
72947  struct vmw_user_fence *__cil_tmp58 ;
72948  unsigned long __cil_tmp59 ;
72949  unsigned long __cil_tmp60 ;
72950  unsigned long __cil_tmp61 ;
72951  unsigned long __cil_tmp62 ;
72952  uint64_t __cil_tmp63 ;
72953  unsigned long __cil_tmp64 ;
72954  long __cil_tmp65 ;
72955  long __cil_tmp66 ;
72956  long __cil_tmp67 ;
72957  unsigned long __cil_tmp68 ;
72958  unsigned long __cil_tmp69 ;
72959  int32_t __cil_tmp70 ;
72960  uint32_t __cil_tmp71 ;
72961  unsigned long __cil_tmp72 ;
72962  unsigned long __cil_tmp73 ;
72963  uint64_t __cil_tmp74 ;
72964  unsigned long __cil_tmp75 ;
72965  unsigned long __cil_tmp76 ;
72966  unsigned long __cil_tmp77 ;
72967  int32_t __cil_tmp78 ;
72968  uint32_t __cil_tmp79 ;
72969  unsigned long __cil_tmp80 ;
72970  unsigned long __cil_tmp81 ;
72971  int32_t __cil_tmp82 ;
72972  bool __cil_tmp83 ;
72973  bool __cil_tmp84 ;
72974  unsigned long __cil_tmp85 ;
72975  unsigned long __cil_tmp86 ;
72976  int32_t __cil_tmp87 ;
72977  uint32_t __cil_tmp88 ;
72978  unsigned long __cil_tmp89 ;
72979  enum ttm_ref_type __cil_tmp90 ;
72980
72981  {
72982  {
72983#line 685
72984  arg = (struct drm_vmw_fence_wait_arg *)data;
72985#line 690
72986  tmp___7 = vmw_fpriv(file_priv);
72987#line 690
72988  __cil_tmp21 = (unsigned long )tmp___7;
72989#line 690
72990  __cil_tmp22 = __cil_tmp21 + 8;
72991#line 690
72992  tfile = *((struct ttm_object_file **)__cil_tmp22);
72993#line 692
72994  __cil_tmp23 = (unsigned long )arg;
72995#line 692
72996  __cil_tmp24 = __cil_tmp23 + 16;
72997#line 692
72998  __cil_tmp25 = *((uint64_t *)__cil_tmp24);
72999#line 692
73000  wait_timeout = __cil_tmp25 * 250ULL;
73001#line 699
73002  __cil_tmp26 = wait_timeout >> 26;
73003#line 699
73004  __cil_tmp27 = wait_timeout >> 24;
73005#line 699
73006  __cil_tmp28 = wait_timeout >> 20;
73007#line 699
73008  __cil_tmp29 = __cil_tmp28 + __cil_tmp27;
73009#line 699
73010  wait_timeout = __cil_tmp29 - __cil_tmp26;
73011  }
73012  {
73013#line 702
73014  __cil_tmp30 = (unsigned long )arg;
73015#line 702
73016  __cil_tmp31 = __cil_tmp30 + 4;
73017#line 702
73018  __cil_tmp32 = *((int32_t *)__cil_tmp31);
73019#line 702
73020  if (! __cil_tmp32) {
73021#line 703
73022    __cil_tmp33 = (unsigned long )arg;
73023#line 703
73024    __cil_tmp34 = __cil_tmp33 + 4;
73025#line 703
73026    *((int32_t *)__cil_tmp34) = 1;
73027#line 704
73028    __cil_tmp35 = (unsigned long )arg;
73029#line 704
73030    __cil_tmp36 = __cil_tmp35 + 8;
73031#line 704
73032    __cil_tmp37 = (uint64_t )jiffies;
73033#line 704
73034    *((uint64_t *)__cil_tmp36) = __cil_tmp37 + wait_timeout;
73035  } else {
73036
73037  }
73038  }
73039  {
73040#line 707
73041  __cil_tmp38 = & base;
73042#line 707
73043  __cil_tmp39 = *((uint32_t *)arg);
73044#line 707
73045  *__cil_tmp38 = ttm_base_object_lookup(tfile, __cil_tmp39);
73046#line 708
73047  __cil_tmp40 = (void *)0;
73048#line 708
73049  __cil_tmp41 = (unsigned long )__cil_tmp40;
73050#line 708
73051  __cil_tmp42 = & base;
73052#line 708
73053  __cil_tmp43 = *__cil_tmp42;
73054#line 708
73055  __cil_tmp44 = (unsigned long )__cil_tmp43;
73056#line 708
73057  __cil_tmp45 = __cil_tmp44 == __cil_tmp41;
73058#line 708
73059  __cil_tmp46 = ! __cil_tmp45;
73060#line 708
73061  __cil_tmp47 = ! __cil_tmp46;
73062#line 708
73063  __cil_tmp48 = (long )__cil_tmp47;
73064#line 708
73065  tmp___8 = __builtin_expect(__cil_tmp48, 0L);
73066  }
73067#line 708
73068  if (tmp___8) {
73069    {
73070#line 709
73071    __cil_tmp49 = *((uint32_t *)arg);
73072#line 709
73073    __cil_tmp50 = (unsigned long )__cil_tmp49;
73074#line 709
73075    printk("<3>Wait invalid fence object handle 0x%08lx.\n", __cil_tmp50);
73076    }
73077#line 712
73078    return (-22);
73079  } else {
73080
73081  }
73082#line 715
73083  __cil_tmp51 = & base;
73084#line 715
73085  __cil_tmp52 = *__cil_tmp51;
73086#line 715
73087  __mptr = (struct ttm_base_object    *)__cil_tmp52;
73088#line 715
73089  __cil_tmp53 = (struct vmw_user_fence *)0;
73090#line 715
73091  __cil_tmp54 = (struct ttm_base_object *)__cil_tmp53;
73092#line 715
73093  __cil_tmp55 = (unsigned int )__cil_tmp54;
73094#line 715
73095  __cil_tmp56 = (char *)__mptr;
73096#line 715
73097  __cil_tmp57 = __cil_tmp56 - __cil_tmp55;
73098#line 715
73099  __cil_tmp58 = (struct vmw_user_fence *)__cil_tmp57;
73100#line 715
73101  __cil_tmp59 = (unsigned long )__cil_tmp58;
73102#line 715
73103  __cil_tmp60 = __cil_tmp59 + 64;
73104#line 715
73105  fence = (struct vmw_fence_obj *)__cil_tmp60;
73106#line 717
73107  timeout = (unsigned long )jiffies;
73108  {
73109#line 718
73110  __cil_tmp61 = (unsigned long )arg;
73111#line 718
73112  __cil_tmp62 = __cil_tmp61 + 8;
73113#line 718
73114  __cil_tmp63 = *((uint64_t *)__cil_tmp62);
73115#line 718
73116  __cil_tmp64 = (unsigned long )__cil_tmp63;
73117#line 718
73118  __cil_tmp65 = (long )__cil_tmp64;
73119#line 718
73120  __cil_tmp66 = (long )timeout;
73121#line 718
73122  __cil_tmp67 = __cil_tmp66 - __cil_tmp65;
73123#line 718
73124  if (__cil_tmp67 >= 0L) {
73125    {
73126#line 719
73127    __cil_tmp68 = (unsigned long )arg;
73128#line 719
73129    __cil_tmp69 = __cil_tmp68 + 28;
73130#line 719
73131    __cil_tmp70 = *((int32_t *)__cil_tmp69);
73132#line 719
73133    __cil_tmp71 = (uint32_t )__cil_tmp70;
73134#line 719
73135    tmp___10 = vmw_fence_obj_signaled(fence, __cil_tmp71);
73136    }
73137#line 719
73138    if (tmp___10) {
73139#line 719
73140      ret = 0;
73141    } else {
73142#line 719
73143      ret = -16;
73144    }
73145#line 721
73146    goto out;
73147  } else {
73148
73149  }
73150  }
73151  {
73152#line 724
73153  __cil_tmp72 = (unsigned long )arg;
73154#line 724
73155  __cil_tmp73 = __cil_tmp72 + 8;
73156#line 724
73157  __cil_tmp74 = *((uint64_t *)__cil_tmp73);
73158#line 724
73159  __cil_tmp75 = (unsigned long )__cil_tmp74;
73160#line 724
73161  timeout = __cil_tmp75 - timeout;
73162#line 726
73163  __cil_tmp76 = (unsigned long )arg;
73164#line 726
73165  __cil_tmp77 = __cil_tmp76 + 28;
73166#line 726
73167  __cil_tmp78 = *((int32_t *)__cil_tmp77);
73168#line 726
73169  __cil_tmp79 = (uint32_t )__cil_tmp78;
73170#line 726
73171  __cil_tmp80 = (unsigned long )arg;
73172#line 726
73173  __cil_tmp81 = __cil_tmp80 + 24;
73174#line 726
73175  __cil_tmp82 = *((int32_t *)__cil_tmp81);
73176#line 726
73177  __cil_tmp83 = (bool )__cil_tmp82;
73178#line 726
73179  __cil_tmp84 = (bool )1;
73180#line 726
73181  ret = vmw_fence_obj_wait(fence, __cil_tmp79, __cil_tmp83, __cil_tmp84, timeout);
73182  }
73183  out: 
73184  {
73185#line 729
73186  ttm_base_object_unref(& base);
73187  }
73188#line 735
73189  if (ret == 0) {
73190    {
73191#line 735
73192    __cil_tmp85 = (unsigned long )arg;
73193#line 735
73194    __cil_tmp86 = __cil_tmp85 + 32;
73195#line 735
73196    __cil_tmp87 = *((int32_t *)__cil_tmp86);
73197#line 735
73198    if (__cil_tmp87 & 1) {
73199      {
73200#line 736
73201      __cil_tmp88 = *((uint32_t *)arg);
73202#line 736
73203      __cil_tmp89 = (unsigned long )__cil_tmp88;
73204#line 736
73205      __cil_tmp90 = (enum ttm_ref_type )0;
73206#line 736
73207      tmp___11 = ttm_ref_object_base_unref(tfile, __cil_tmp89, __cil_tmp90);
73208      }
73209#line 736
73210      return (tmp___11);
73211    } else {
73212
73213    }
73214    }
73215  } else {
73216
73217  }
73218#line 738
73219  return (ret);
73220}
73221}
73222#line 741 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
73223int vmw_fence_obj_signaled_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
73224{ struct drm_vmw_fence_signaled_arg *arg ;
73225  struct ttm_base_object *base ;
73226  struct vmw_fence_obj *fence ;
73227  struct vmw_fence_manager *fman ;
73228  struct ttm_object_file *tfile ;
73229  struct vmw_fpriv *tmp___7 ;
73230  struct vmw_private *dev_priv ;
73231  struct vmw_private *tmp___8 ;
73232  long tmp___9 ;
73233  struct ttm_base_object    *__mptr ;
73234  bool tmp___10 ;
73235  unsigned long __cil_tmp15 ;
73236  unsigned long __cil_tmp16 ;
73237  struct ttm_base_object **__cil_tmp17 ;
73238  uint32_t __cil_tmp18 ;
73239  void *__cil_tmp19 ;
73240  unsigned long __cil_tmp20 ;
73241  struct ttm_base_object **__cil_tmp21 ;
73242  struct ttm_base_object *__cil_tmp22 ;
73243  unsigned long __cil_tmp23 ;
73244  int __cil_tmp24 ;
73245  int __cil_tmp25 ;
73246  int __cil_tmp26 ;
73247  long __cil_tmp27 ;
73248  uint32_t __cil_tmp28 ;
73249  unsigned long __cil_tmp29 ;
73250  struct ttm_base_object **__cil_tmp30 ;
73251  struct ttm_base_object *__cil_tmp31 ;
73252  struct vmw_user_fence *__cil_tmp32 ;
73253  struct ttm_base_object *__cil_tmp33 ;
73254  unsigned int __cil_tmp34 ;
73255  char *__cil_tmp35 ;
73256  char *__cil_tmp36 ;
73257  struct vmw_user_fence *__cil_tmp37 ;
73258  unsigned long __cil_tmp38 ;
73259  unsigned long __cil_tmp39 ;
73260  unsigned long __cil_tmp40 ;
73261  unsigned long __cil_tmp41 ;
73262  unsigned long __cil_tmp42 ;
73263  unsigned long __cil_tmp43 ;
73264  uint32_t __cil_tmp44 ;
73265  unsigned long __cil_tmp45 ;
73266  unsigned long __cil_tmp46 ;
73267  unsigned long __cil_tmp47 ;
73268  unsigned long __cil_tmp48 ;
73269  spinlock_t *__cil_tmp49 ;
73270  unsigned long __cil_tmp50 ;
73271  unsigned long __cil_tmp51 ;
73272  unsigned long __cil_tmp52 ;
73273  unsigned long __cil_tmp53 ;
73274  unsigned long __cil_tmp54 ;
73275  unsigned long __cil_tmp55 ;
73276  unsigned long __cil_tmp56 ;
73277  unsigned long __cil_tmp57 ;
73278  unsigned long __cil_tmp58 ;
73279  unsigned long __cil_tmp59 ;
73280  spinlock_t *__cil_tmp60 ;
73281
73282  {
73283  {
73284#line 744
73285  arg = (struct drm_vmw_fence_signaled_arg *)data;
73286#line 749
73287  tmp___7 = vmw_fpriv(file_priv);
73288#line 749
73289  __cil_tmp15 = (unsigned long )tmp___7;
73290#line 749
73291  __cil_tmp16 = __cil_tmp15 + 8;
73292#line 749
73293  tfile = *((struct ttm_object_file **)__cil_tmp16);
73294#line 750
73295  tmp___8 = vmw_priv(dev);
73296#line 750
73297  dev_priv = tmp___8;
73298#line 752
73299  __cil_tmp17 = & base;
73300#line 752
73301  __cil_tmp18 = *((uint32_t *)arg);
73302#line 752
73303  *__cil_tmp17 = ttm_base_object_lookup(tfile, __cil_tmp18);
73304#line 753
73305  __cil_tmp19 = (void *)0;
73306#line 753
73307  __cil_tmp20 = (unsigned long )__cil_tmp19;
73308#line 753
73309  __cil_tmp21 = & base;
73310#line 753
73311  __cil_tmp22 = *__cil_tmp21;
73312#line 753
73313  __cil_tmp23 = (unsigned long )__cil_tmp22;
73314#line 753
73315  __cil_tmp24 = __cil_tmp23 == __cil_tmp20;
73316#line 753
73317  __cil_tmp25 = ! __cil_tmp24;
73318#line 753
73319  __cil_tmp26 = ! __cil_tmp25;
73320#line 753
73321  __cil_tmp27 = (long )__cil_tmp26;
73322#line 753
73323  tmp___9 = __builtin_expect(__cil_tmp27, 0L);
73324  }
73325#line 753
73326  if (tmp___9) {
73327    {
73328#line 754
73329    __cil_tmp28 = *((uint32_t *)arg);
73330#line 754
73331    __cil_tmp29 = (unsigned long )__cil_tmp28;
73332#line 754
73333    printk("<3>Fence signaled invalid fence object handle 0x%08lx.\n", __cil_tmp29);
73334    }
73335#line 757
73336    return (-22);
73337  } else {
73338
73339  }
73340  {
73341#line 760
73342  __cil_tmp30 = & base;
73343#line 760
73344  __cil_tmp31 = *__cil_tmp30;
73345#line 760
73346  __mptr = (struct ttm_base_object    *)__cil_tmp31;
73347#line 760
73348  __cil_tmp32 = (struct vmw_user_fence *)0;
73349#line 760
73350  __cil_tmp33 = (struct ttm_base_object *)__cil_tmp32;
73351#line 760
73352  __cil_tmp34 = (unsigned int )__cil_tmp33;
73353#line 760
73354  __cil_tmp35 = (char *)__mptr;
73355#line 760
73356  __cil_tmp36 = __cil_tmp35 - __cil_tmp34;
73357#line 760
73358  __cil_tmp37 = (struct vmw_user_fence *)__cil_tmp36;
73359#line 760
73360  __cil_tmp38 = (unsigned long )__cil_tmp37;
73361#line 760
73362  __cil_tmp39 = __cil_tmp38 + 64;
73363#line 760
73364  fence = (struct vmw_fence_obj *)__cil_tmp39;
73365#line 761
73366  __cil_tmp40 = (unsigned long )fence;
73367#line 761
73368  __cil_tmp41 = __cil_tmp40 + 8;
73369#line 761
73370  fman = *((struct vmw_fence_manager **)__cil_tmp41);
73371#line 763
73372  __cil_tmp42 = (unsigned long )arg;
73373#line 763
73374  __cil_tmp43 = __cil_tmp42 + 4;
73375#line 763
73376  __cil_tmp44 = *((uint32_t *)__cil_tmp43);
73377#line 763
73378  tmp___10 = vmw_fence_obj_signaled(fence, __cil_tmp44);
73379#line 763
73380  __cil_tmp45 = (unsigned long )arg;
73381#line 763
73382  __cil_tmp46 = __cil_tmp45 + 8;
73383#line 763
73384  *((int32_t *)__cil_tmp46) = (int32_t )tmp___10;
73385#line 764
73386  __cil_tmp47 = (unsigned long )fman;
73387#line 764
73388  __cil_tmp48 = __cil_tmp47 + 16;
73389#line 764
73390  __cil_tmp49 = (spinlock_t *)__cil_tmp48;
73391#line 764
73392  spin_lock_irq(__cil_tmp49);
73393#line 766
73394  __cil_tmp50 = (unsigned long )arg;
73395#line 766
73396  __cil_tmp51 = __cil_tmp50 + 16;
73397#line 766
73398  __cil_tmp52 = (unsigned long )fence;
73399#line 766
73400  __cil_tmp53 = __cil_tmp52 + 32;
73401#line 766
73402  *((uint32_t *)__cil_tmp51) = *((uint32_t *)__cil_tmp53);
73403#line 767
73404  __cil_tmp54 = (unsigned long )arg;
73405#line 767
73406  __cil_tmp55 = __cil_tmp54 + 12;
73407#line 767
73408  __cil_tmp56 = (unsigned long )dev_priv;
73409#line 767
73410  __cil_tmp57 = __cil_tmp56 + 2980;
73411#line 767
73412  *((uint32_t *)__cil_tmp55) = *((uint32_t *)__cil_tmp57);
73413#line 768
73414  __cil_tmp58 = (unsigned long )fman;
73415#line 768
73416  __cil_tmp59 = __cil_tmp58 + 16;
73417#line 768
73418  __cil_tmp60 = (spinlock_t *)__cil_tmp59;
73419#line 768
73420  spin_unlock_irq(__cil_tmp60);
73421#line 770
73422  ttm_base_object_unref(& base);
73423  }
73424#line 772
73425  return (0);
73426}
73427}
73428#line 776 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
73429int vmw_fence_obj_unref_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
73430{ struct drm_vmw_fence_arg *arg ;
73431  struct vmw_fpriv *tmp___7 ;
73432  int tmp___8 ;
73433  unsigned long __cil_tmp7 ;
73434  unsigned long __cil_tmp8 ;
73435  struct ttm_object_file *__cil_tmp9 ;
73436  uint32_t __cil_tmp10 ;
73437  unsigned long __cil_tmp11 ;
73438  enum ttm_ref_type __cil_tmp12 ;
73439
73440  {
73441  {
73442#line 779
73443  arg = (struct drm_vmw_fence_arg *)data;
73444#line 782
73445  tmp___7 = vmw_fpriv(file_priv);
73446#line 782
73447  __cil_tmp7 = (unsigned long )tmp___7;
73448#line 782
73449  __cil_tmp8 = __cil_tmp7 + 8;
73450#line 782
73451  __cil_tmp9 = *((struct ttm_object_file **)__cil_tmp8);
73452#line 782
73453  __cil_tmp10 = *((uint32_t *)arg);
73454#line 782
73455  __cil_tmp11 = (unsigned long )__cil_tmp10;
73456#line 782
73457  __cil_tmp12 = (enum ttm_ref_type )0;
73458#line 782
73459  tmp___8 = ttm_ref_object_base_unref(__cil_tmp9, __cil_tmp11, __cil_tmp12);
73460  }
73461#line 782
73462  return (tmp___8);
73463}
73464}
73465#line 800 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
73466void vmw_event_fence_fpriv_gone(struct vmw_fence_manager *fman , struct list_head *event_list ) 
73467{ struct vmw_event_fence_action *eaction ;
73468  struct drm_pending_event *event ;
73469  unsigned long irq_flags ;
73470  raw_spinlock_t *tmp___7 ;
73471  int tmp___8 ;
73472  struct list_head    *__mptr ;
73473  unsigned long __cil_tmp11 ;
73474  unsigned long __cil_tmp12 ;
73475  spinlock_t *__cil_tmp13 ;
73476  struct list_head    *__cil_tmp14 ;
73477  struct list_head *__cil_tmp15 ;
73478  struct vmw_event_fence_action *__cil_tmp16 ;
73479  unsigned long __cil_tmp17 ;
73480  unsigned long __cil_tmp18 ;
73481  struct list_head *__cil_tmp19 ;
73482  unsigned int __cil_tmp20 ;
73483  char *__cil_tmp21 ;
73484  char *__cil_tmp22 ;
73485  unsigned long __cil_tmp23 ;
73486  unsigned long __cil_tmp24 ;
73487  struct list_head *__cil_tmp25 ;
73488  unsigned long __cil_tmp26 ;
73489  unsigned long __cil_tmp27 ;
73490  unsigned long __cil_tmp28 ;
73491  unsigned long __cil_tmp29 ;
73492  void *__cil_tmp30 ;
73493  unsigned long __cil_tmp31 ;
73494  unsigned long __cil_tmp32 ;
73495  spinlock_t *__cil_tmp33 ;
73496  unsigned long __cil_tmp34 ;
73497  unsigned long __cil_tmp35 ;
73498  void (*__cil_tmp36)(struct drm_pending_event *event ) ;
73499  unsigned long __cil_tmp37 ;
73500  unsigned long __cil_tmp38 ;
73501  spinlock_t *__cil_tmp39 ;
73502
73503  {
73504  {
73505#line 807
73506  while (1) {
73507    while_continue: /* CIL Label */ ;
73508    {
73509#line 808
73510    while (1) {
73511      while_continue___0: /* CIL Label */ ;
73512      {
73513#line 808
73514      while (1) {
73515        while_continue___1: /* CIL Label */ ;
73516        {
73517#line 808
73518        __cil_tmp11 = (unsigned long )fman;
73519#line 808
73520        __cil_tmp12 = __cil_tmp11 + 16;
73521#line 808
73522        __cil_tmp13 = (spinlock_t *)__cil_tmp12;
73523#line 808
73524        tmp___7 = spinlock_check(__cil_tmp13);
73525#line 808
73526        irq_flags = _raw_spin_lock_irqsave(tmp___7);
73527        }
73528#line 808
73529        goto while_break___1;
73530      }
73531      while_break___1: /* CIL Label */ ;
73532      }
73533#line 808
73534      goto while_break___0;
73535    }
73536    while_break___0: /* CIL Label */ ;
73537    }
73538    {
73539#line 809
73540    __cil_tmp14 = (struct list_head    *)event_list;
73541#line 809
73542    tmp___8 = list_empty(__cil_tmp14);
73543    }
73544#line 809
73545    if (tmp___8) {
73546#line 810
73547      goto out_unlock;
73548    } else {
73549
73550    }
73551    {
73552#line 811
73553    __cil_tmp15 = *((struct list_head **)event_list);
73554#line 811
73555    __mptr = (struct list_head    *)__cil_tmp15;
73556#line 811
73557    __cil_tmp16 = (struct vmw_event_fence_action *)0;
73558#line 811
73559    __cil_tmp17 = (unsigned long )__cil_tmp16;
73560#line 811
73561    __cil_tmp18 = __cil_tmp17 + 40;
73562#line 811
73563    __cil_tmp19 = (struct list_head *)__cil_tmp18;
73564#line 811
73565    __cil_tmp20 = (unsigned int )__cil_tmp19;
73566#line 811
73567    __cil_tmp21 = (char *)__mptr;
73568#line 811
73569    __cil_tmp22 = __cil_tmp21 - __cil_tmp20;
73570#line 811
73571    eaction = (struct vmw_event_fence_action *)__cil_tmp22;
73572#line 814
73573    __cil_tmp23 = (unsigned long )eaction;
73574#line 814
73575    __cil_tmp24 = __cil_tmp23 + 40;
73576#line 814
73577    __cil_tmp25 = (struct list_head *)__cil_tmp24;
73578#line 814
73579    list_del_init(__cil_tmp25);
73580#line 815
73581    __cil_tmp26 = (unsigned long )eaction;
73582#line 815
73583    __cil_tmp27 = __cil_tmp26 + 56;
73584#line 815
73585    event = *((struct drm_pending_event **)__cil_tmp27);
73586#line 816
73587    __cil_tmp28 = (unsigned long )eaction;
73588#line 816
73589    __cil_tmp29 = __cil_tmp28 + 56;
73590#line 816
73591    __cil_tmp30 = (void *)0;
73592#line 816
73593    *((struct drm_pending_event **)__cil_tmp29) = (struct drm_pending_event *)__cil_tmp30;
73594#line 817
73595    __cil_tmp31 = (unsigned long )fman;
73596#line 817
73597    __cil_tmp32 = __cil_tmp31 + 16;
73598#line 817
73599    __cil_tmp33 = (spinlock_t *)__cil_tmp32;
73600#line 817
73601    spin_unlock_irqrestore(__cil_tmp33, irq_flags);
73602#line 818
73603    __cil_tmp34 = (unsigned long )event;
73604#line 818
73605    __cil_tmp35 = __cil_tmp34 + 40;
73606#line 818
73607    __cil_tmp36 = *((void (**)(struct drm_pending_event *event ))__cil_tmp35);
73608#line 818
73609    (*__cil_tmp36)(event);
73610    }
73611  }
73612  while_break: /* CIL Label */ ;
73613  }
73614  out_unlock: 
73615  {
73616#line 821
73617  __cil_tmp37 = (unsigned long )fman;
73618#line 821
73619  __cil_tmp38 = __cil_tmp37 + 16;
73620#line 821
73621  __cil_tmp39 = (spinlock_t *)__cil_tmp38;
73622#line 821
73623  spin_unlock_irqrestore(__cil_tmp39, irq_flags);
73624  }
73625#line 822
73626  return;
73627}
73628}
73629#line 836 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
73630static void vmw_event_fence_action_seq_passed(struct vmw_fence_action *action ) 
73631{ struct vmw_event_fence_action *eaction ;
73632  struct vmw_fence_action    *__mptr ;
73633  struct drm_device *dev ;
73634  struct drm_pending_event *event ;
73635  struct drm_file *file_priv ;
73636  unsigned long irq_flags ;
73637  long tmp___7 ;
73638  raw_spinlock_t *tmp___8 ;
73639  struct timeval tv ;
73640  long tmp___9 ;
73641  struct vmw_event_fence_action *__cil_tmp14 ;
73642  struct vmw_fence_action *__cil_tmp15 ;
73643  unsigned int __cil_tmp16 ;
73644  char *__cil_tmp17 ;
73645  char *__cil_tmp18 ;
73646  unsigned long __cil_tmp19 ;
73647  unsigned long __cil_tmp20 ;
73648  unsigned long __cil_tmp21 ;
73649  unsigned long __cil_tmp22 ;
73650  void *__cil_tmp23 ;
73651  unsigned long __cil_tmp24 ;
73652  unsigned long __cil_tmp25 ;
73653  int __cil_tmp26 ;
73654  int __cil_tmp27 ;
73655  int __cil_tmp28 ;
73656  long __cil_tmp29 ;
73657  unsigned long __cil_tmp30 ;
73658  unsigned long __cil_tmp31 ;
73659  unsigned long __cil_tmp32 ;
73660  unsigned long __cil_tmp33 ;
73661  spinlock_t *__cil_tmp34 ;
73662  void *__cil_tmp35 ;
73663  unsigned long __cil_tmp36 ;
73664  unsigned long __cil_tmp37 ;
73665  unsigned long __cil_tmp38 ;
73666  uint32_t *__cil_tmp39 ;
73667  unsigned long __cil_tmp40 ;
73668  int __cil_tmp41 ;
73669  int __cil_tmp42 ;
73670  int __cil_tmp43 ;
73671  long __cil_tmp44 ;
73672  unsigned long __cil_tmp45 ;
73673  unsigned long __cil_tmp46 ;
73674  uint32_t *__cil_tmp47 ;
73675  struct timeval *__cil_tmp48 ;
73676  __kernel_time_t __cil_tmp49 ;
73677  unsigned long __cil_tmp50 ;
73678  unsigned long __cil_tmp51 ;
73679  uint32_t *__cil_tmp52 ;
73680  unsigned long __cil_tmp53 ;
73681  __kernel_suseconds_t __cil_tmp54 ;
73682  unsigned long __cil_tmp55 ;
73683  unsigned long __cil_tmp56 ;
73684  struct list_head *__cil_tmp57 ;
73685  unsigned long __cil_tmp58 ;
73686  unsigned long __cil_tmp59 ;
73687  struct drm_pending_event *__cil_tmp60 ;
73688  unsigned long __cil_tmp61 ;
73689  unsigned long __cil_tmp62 ;
73690  struct list_head *__cil_tmp63 ;
73691  unsigned long __cil_tmp64 ;
73692  unsigned long __cil_tmp65 ;
73693  struct list_head *__cil_tmp66 ;
73694  unsigned long __cil_tmp67 ;
73695  unsigned long __cil_tmp68 ;
73696  void *__cil_tmp69 ;
73697  unsigned long __cil_tmp70 ;
73698  unsigned long __cil_tmp71 ;
73699  wait_queue_head_t *__cil_tmp72 ;
73700  void *__cil_tmp73 ;
73701  unsigned long __cil_tmp74 ;
73702  unsigned long __cil_tmp75 ;
73703  spinlock_t *__cil_tmp76 ;
73704
73705  {
73706  {
73707#line 839
73708  __mptr = (struct vmw_fence_action    *)action;
73709#line 839
73710  __cil_tmp14 = (struct vmw_event_fence_action *)0;
73711#line 839
73712  __cil_tmp15 = (struct vmw_fence_action *)__cil_tmp14;
73713#line 839
73714  __cil_tmp16 = (unsigned int )__cil_tmp15;
73715#line 839
73716  __cil_tmp17 = (char *)__mptr;
73717#line 839
73718  __cil_tmp18 = __cil_tmp17 - __cil_tmp16;
73719#line 839
73720  eaction = (struct vmw_event_fence_action *)__cil_tmp18;
73721#line 840
73722  __cil_tmp19 = (unsigned long )eaction;
73723#line 840
73724  __cil_tmp20 = __cil_tmp19 + 72;
73725#line 840
73726  dev = *((struct drm_device **)__cil_tmp20);
73727#line 841
73728  __cil_tmp21 = (unsigned long )eaction;
73729#line 841
73730  __cil_tmp22 = __cil_tmp21 + 56;
73731#line 841
73732  event = *((struct drm_pending_event **)__cil_tmp22);
73733#line 845
73734  __cil_tmp23 = (void *)0;
73735#line 845
73736  __cil_tmp24 = (unsigned long )__cil_tmp23;
73737#line 845
73738  __cil_tmp25 = (unsigned long )event;
73739#line 845
73740  __cil_tmp26 = __cil_tmp25 == __cil_tmp24;
73741#line 845
73742  __cil_tmp27 = ! __cil_tmp26;
73743#line 845
73744  __cil_tmp28 = ! __cil_tmp27;
73745#line 845
73746  __cil_tmp29 = (long )__cil_tmp28;
73747#line 845
73748  tmp___7 = __builtin_expect(__cil_tmp29, 0L);
73749  }
73750#line 845
73751  if (tmp___7) {
73752#line 846
73753    return;
73754  } else {
73755
73756  }
73757#line 848
73758  __cil_tmp30 = (unsigned long )event;
73759#line 848
73760  __cil_tmp31 = __cil_tmp30 + 24;
73761#line 848
73762  file_priv = *((struct drm_file **)__cil_tmp31);
73763  {
73764#line 849
73765  while (1) {
73766    while_continue: /* CIL Label */ ;
73767    {
73768#line 849
73769    while (1) {
73770      while_continue___0: /* CIL Label */ ;
73771      {
73772#line 849
73773      __cil_tmp32 = (unsigned long )dev;
73774#line 849
73775      __cil_tmp33 = __cil_tmp32 + 872;
73776#line 849
73777      __cil_tmp34 = (spinlock_t *)__cil_tmp33;
73778#line 849
73779      tmp___8 = spinlock_check(__cil_tmp34);
73780#line 849
73781      irq_flags = _raw_spin_lock_irqsave(tmp___8);
73782      }
73783#line 849
73784      goto while_break___0;
73785    }
73786    while_break___0: /* CIL Label */ ;
73787    }
73788#line 849
73789    goto while_break;
73790  }
73791  while_break: /* CIL Label */ ;
73792  }
73793  {
73794#line 851
73795  __cil_tmp35 = (void *)0;
73796#line 851
73797  __cil_tmp36 = (unsigned long )__cil_tmp35;
73798#line 851
73799  __cil_tmp37 = (unsigned long )eaction;
73800#line 851
73801  __cil_tmp38 = __cil_tmp37 + 80;
73802#line 851
73803  __cil_tmp39 = *((uint32_t **)__cil_tmp38);
73804#line 851
73805  __cil_tmp40 = (unsigned long )__cil_tmp39;
73806#line 851
73807  __cil_tmp41 = __cil_tmp40 != __cil_tmp36;
73808#line 851
73809  __cil_tmp42 = ! __cil_tmp41;
73810#line 851
73811  __cil_tmp43 = ! __cil_tmp42;
73812#line 851
73813  __cil_tmp44 = (long )__cil_tmp43;
73814#line 851
73815  tmp___9 = __builtin_expect(__cil_tmp44, 1L);
73816  }
73817#line 851
73818  if (tmp___9) {
73819    {
73820#line 854
73821    do_gettimeofday(& tv);
73822#line 855
73823    __cil_tmp45 = (unsigned long )eaction;
73824#line 855
73825    __cil_tmp46 = __cil_tmp45 + 80;
73826#line 855
73827    __cil_tmp47 = *((uint32_t **)__cil_tmp46);
73828#line 855
73829    __cil_tmp48 = & tv;
73830#line 855
73831    __cil_tmp49 = *((__kernel_time_t *)__cil_tmp48);
73832#line 855
73833    *__cil_tmp47 = (uint32_t )__cil_tmp49;
73834#line 856
73835    __cil_tmp50 = (unsigned long )eaction;
73836#line 856
73837    __cil_tmp51 = __cil_tmp50 + 88;
73838#line 856
73839    __cil_tmp52 = *((uint32_t **)__cil_tmp51);
73840#line 856
73841    __cil_tmp53 = (unsigned long )(& tv) + 8;
73842#line 856
73843    __cil_tmp54 = *((__kernel_suseconds_t *)__cil_tmp53);
73844#line 856
73845    *__cil_tmp52 = (uint32_t )__cil_tmp54;
73846    }
73847  } else {
73848
73849  }
73850  {
73851#line 859
73852  __cil_tmp55 = (unsigned long )eaction;
73853#line 859
73854  __cil_tmp56 = __cil_tmp55 + 40;
73855#line 859
73856  __cil_tmp57 = (struct list_head *)__cil_tmp56;
73857#line 859
73858  list_del_init(__cil_tmp57);
73859#line 860
73860  __cil_tmp58 = (unsigned long )eaction;
73861#line 860
73862  __cil_tmp59 = __cil_tmp58 + 56;
73863#line 860
73864  __cil_tmp60 = *((struct drm_pending_event **)__cil_tmp59);
73865#line 860
73866  __cil_tmp61 = (unsigned long )__cil_tmp60;
73867#line 860
73868  __cil_tmp62 = __cil_tmp61 + 8;
73869#line 860
73870  __cil_tmp63 = (struct list_head *)__cil_tmp62;
73871#line 860
73872  __cil_tmp64 = (unsigned long )file_priv;
73873#line 860
73874  __cil_tmp65 = __cil_tmp64 + 216;
73875#line 860
73876  __cil_tmp66 = (struct list_head *)__cil_tmp65;
73877#line 860
73878  list_add_tail(__cil_tmp63, __cil_tmp66);
73879#line 861
73880  __cil_tmp67 = (unsigned long )eaction;
73881#line 861
73882  __cil_tmp68 = __cil_tmp67 + 56;
73883#line 861
73884  __cil_tmp69 = (void *)0;
73885#line 861
73886  *((struct drm_pending_event **)__cil_tmp68) = (struct drm_pending_event *)__cil_tmp69;
73887#line 862
73888  __cil_tmp70 = (unsigned long )file_priv;
73889#line 862
73890  __cil_tmp71 = __cil_tmp70 + 176;
73891#line 862
73892  __cil_tmp72 = (wait_queue_head_t *)__cil_tmp71;
73893#line 862
73894  __cil_tmp73 = (void *)0;
73895#line 862
73896  __wake_up(__cil_tmp72, 3U, 0, __cil_tmp73);
73897#line 863
73898  __cil_tmp74 = (unsigned long )dev;
73899#line 863
73900  __cil_tmp75 = __cil_tmp74 + 872;
73901#line 863
73902  __cil_tmp76 = (spinlock_t *)__cil_tmp75;
73903#line 863
73904  spin_unlock_irqrestore(__cil_tmp76, irq_flags);
73905  }
73906#line 864
73907  return;
73908}
73909}
73910#line 875 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
73911static void vmw_event_fence_action_cleanup(struct vmw_fence_action *action ) 
73912{ struct vmw_event_fence_action *eaction ;
73913  struct vmw_fence_action    *__mptr ;
73914  struct vmw_fence_manager *fman ;
73915  unsigned long irq_flags ;
73916  raw_spinlock_t *tmp___7 ;
73917  struct vmw_event_fence_action *__cil_tmp9 ;
73918  struct vmw_fence_action *__cil_tmp10 ;
73919  unsigned int __cil_tmp11 ;
73920  char *__cil_tmp12 ;
73921  char *__cil_tmp13 ;
73922  unsigned long __cil_tmp14 ;
73923  unsigned long __cil_tmp15 ;
73924  struct vmw_fence_obj *__cil_tmp16 ;
73925  unsigned long __cil_tmp17 ;
73926  unsigned long __cil_tmp18 ;
73927  unsigned long __cil_tmp19 ;
73928  unsigned long __cil_tmp20 ;
73929  spinlock_t *__cil_tmp21 ;
73930  unsigned long __cil_tmp22 ;
73931  unsigned long __cil_tmp23 ;
73932  struct list_head *__cil_tmp24 ;
73933  unsigned long __cil_tmp25 ;
73934  unsigned long __cil_tmp26 ;
73935  spinlock_t *__cil_tmp27 ;
73936  unsigned long __cil_tmp28 ;
73937  unsigned long __cil_tmp29 ;
73938  struct vmw_fence_obj **__cil_tmp30 ;
73939  void    *__cil_tmp31 ;
73940
73941  {
73942#line 878
73943  __mptr = (struct vmw_fence_action    *)action;
73944#line 878
73945  __cil_tmp9 = (struct vmw_event_fence_action *)0;
73946#line 878
73947  __cil_tmp10 = (struct vmw_fence_action *)__cil_tmp9;
73948#line 878
73949  __cil_tmp11 = (unsigned int )__cil_tmp10;
73950#line 878
73951  __cil_tmp12 = (char *)__mptr;
73952#line 878
73953  __cil_tmp13 = __cil_tmp12 - __cil_tmp11;
73954#line 878
73955  eaction = (struct vmw_event_fence_action *)__cil_tmp13;
73956#line 879
73957  __cil_tmp14 = (unsigned long )eaction;
73958#line 879
73959  __cil_tmp15 = __cil_tmp14 + 64;
73960#line 879
73961  __cil_tmp16 = *((struct vmw_fence_obj **)__cil_tmp15);
73962#line 879
73963  __cil_tmp17 = (unsigned long )__cil_tmp16;
73964#line 879
73965  __cil_tmp18 = __cil_tmp17 + 8;
73966#line 879
73967  fman = *((struct vmw_fence_manager **)__cil_tmp18);
73968  {
73969#line 882
73970  while (1) {
73971    while_continue: /* CIL Label */ ;
73972    {
73973#line 882
73974    while (1) {
73975      while_continue___0: /* CIL Label */ ;
73976      {
73977#line 882
73978      __cil_tmp19 = (unsigned long )fman;
73979#line 882
73980      __cil_tmp20 = __cil_tmp19 + 16;
73981#line 882
73982      __cil_tmp21 = (spinlock_t *)__cil_tmp20;
73983#line 882
73984      tmp___7 = spinlock_check(__cil_tmp21);
73985#line 882
73986      irq_flags = _raw_spin_lock_irqsave(tmp___7);
73987      }
73988#line 882
73989      goto while_break___0;
73990    }
73991    while_break___0: /* CIL Label */ ;
73992    }
73993#line 882
73994    goto while_break;
73995  }
73996  while_break: /* CIL Label */ ;
73997  }
73998  {
73999#line 883
74000  __cil_tmp22 = (unsigned long )eaction;
74001#line 883
74002  __cil_tmp23 = __cil_tmp22 + 40;
74003#line 883
74004  __cil_tmp24 = (struct list_head *)__cil_tmp23;
74005#line 883
74006  list_del(__cil_tmp24);
74007#line 884
74008  __cil_tmp25 = (unsigned long )fman;
74009#line 884
74010  __cil_tmp26 = __cil_tmp25 + 16;
74011#line 884
74012  __cil_tmp27 = (spinlock_t *)__cil_tmp26;
74013#line 884
74014  spin_unlock_irqrestore(__cil_tmp27, irq_flags);
74015#line 886
74016  __cil_tmp28 = (unsigned long )eaction;
74017#line 886
74018  __cil_tmp29 = __cil_tmp28 + 64;
74019#line 886
74020  __cil_tmp30 = (struct vmw_fence_obj **)__cil_tmp29;
74021#line 886
74022  vmw_fence_obj_unreference(__cil_tmp30);
74023#line 887
74024  __cil_tmp31 = (void    *)eaction;
74025#line 887
74026  kfree(__cil_tmp31);
74027  }
74028#line 888
74029  return;
74030}
74031}
74032#line 900 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
74033void vmw_fence_obj_add_action(struct vmw_fence_obj *fence , struct vmw_fence_action *action ) 
74034{ struct vmw_fence_manager *fman ;
74035  unsigned long irq_flags ;
74036  bool run_update ;
74037  raw_spinlock_t *tmp___7 ;
74038  struct list_head action_list ;
74039  unsigned long __cil_tmp10 ;
74040  unsigned long __cil_tmp11 ;
74041  unsigned long __cil_tmp12 ;
74042  unsigned long __cil_tmp13 ;
74043  struct mutex *__cil_tmp14 ;
74044  unsigned long __cil_tmp15 ;
74045  unsigned long __cil_tmp16 ;
74046  spinlock_t *__cil_tmp17 ;
74047  unsigned long __cil_tmp18 ;
74048  unsigned long __cil_tmp19 ;
74049  enum vmw_action_type __cil_tmp20 ;
74050  unsigned long __cil_tmp21 ;
74051  unsigned long __cil_tmp22 ;
74052  unsigned long __cil_tmp23 ;
74053  unsigned long __cil_tmp24 ;
74054  unsigned long __cil_tmp25 ;
74055  unsigned long __cil_tmp26 ;
74056  enum vmw_action_type __cil_tmp27 ;
74057  unsigned long __cil_tmp28 ;
74058  unsigned long __cil_tmp29 ;
74059  unsigned long __cil_tmp30 ;
74060  unsigned long __cil_tmp31 ;
74061  uint32_t __cil_tmp32 ;
74062  unsigned long __cil_tmp33 ;
74063  unsigned long __cil_tmp34 ;
74064  uint32_t __cil_tmp35 ;
74065  struct list_head *__cil_tmp36 ;
74066  struct list_head *__cil_tmp37 ;
74067  unsigned long __cil_tmp38 ;
74068  unsigned long __cil_tmp39 ;
74069  struct list_head *__cil_tmp40 ;
74070  unsigned long __cil_tmp41 ;
74071  unsigned long __cil_tmp42 ;
74072  spinlock_t *__cil_tmp43 ;
74073  unsigned long __cil_tmp44 ;
74074  unsigned long __cil_tmp45 ;
74075  bool __cil_tmp46 ;
74076  unsigned long __cil_tmp47 ;
74077  unsigned long __cil_tmp48 ;
74078  unsigned long __cil_tmp49 ;
74079  unsigned long __cil_tmp50 ;
74080  struct vmw_private *__cil_tmp51 ;
74081  unsigned long __cil_tmp52 ;
74082  unsigned long __cil_tmp53 ;
74083  struct mutex *__cil_tmp54 ;
74084
74085  {
74086  {
74087#line 903
74088  __cil_tmp10 = (unsigned long )fence;
74089#line 903
74090  __cil_tmp11 = __cil_tmp10 + 8;
74091#line 903
74092  fman = *((struct vmw_fence_manager **)__cil_tmp11);
74093#line 905
74094  run_update = (bool )0;
74095#line 907
74096  __cil_tmp12 = (unsigned long )fman;
74097#line 907
74098  __cil_tmp13 = __cil_tmp12 + 128;
74099#line 907
74100  __cil_tmp14 = (struct mutex *)__cil_tmp13;
74101#line 907
74102  mutex_lock(__cil_tmp14);
74103  }
74104  {
74105#line 908
74106  while (1) {
74107    while_continue: /* CIL Label */ ;
74108    {
74109#line 908
74110    while (1) {
74111      while_continue___0: /* CIL Label */ ;
74112      {
74113#line 908
74114      __cil_tmp15 = (unsigned long )fman;
74115#line 908
74116      __cil_tmp16 = __cil_tmp15 + 16;
74117#line 908
74118      __cil_tmp17 = (spinlock_t *)__cil_tmp16;
74119#line 908
74120      tmp___7 = spinlock_check(__cil_tmp17);
74121#line 908
74122      irq_flags = _raw_spin_lock_irqsave(tmp___7);
74123      }
74124#line 908
74125      goto while_break___0;
74126    }
74127    while_break___0: /* CIL Label */ ;
74128    }
74129#line 908
74130    goto while_break;
74131  }
74132  while_break: /* CIL Label */ ;
74133  }
74134#line 910
74135  __cil_tmp18 = (unsigned long )action;
74136#line 910
74137  __cil_tmp19 = __cil_tmp18 + 16;
74138#line 910
74139  __cil_tmp20 = *((enum vmw_action_type *)__cil_tmp19);
74140#line 910
74141  __cil_tmp21 = __cil_tmp20 * 4UL;
74142#line 910
74143  __cil_tmp22 = 120 + __cil_tmp21;
74144#line 910
74145  __cil_tmp23 = (unsigned long )fman;
74146#line 910
74147  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
74148#line 910
74149  __cil_tmp25 = (unsigned long )action;
74150#line 910
74151  __cil_tmp26 = __cil_tmp25 + 16;
74152#line 910
74153  __cil_tmp27 = *((enum vmw_action_type *)__cil_tmp26);
74154#line 910
74155  __cil_tmp28 = __cil_tmp27 * 4UL;
74156#line 910
74157  __cil_tmp29 = 120 + __cil_tmp28;
74158#line 910
74159  __cil_tmp30 = (unsigned long )fman;
74160#line 910
74161  __cil_tmp31 = __cil_tmp30 + __cil_tmp29;
74162#line 910
74163  __cil_tmp32 = *((uint32_t *)__cil_tmp31);
74164#line 910
74165  *((uint32_t *)__cil_tmp24) = __cil_tmp32 + 1U;
74166  {
74167#line 911
74168  __cil_tmp33 = (unsigned long )fence;
74169#line 911
74170  __cil_tmp34 = __cil_tmp33 + 32;
74171#line 911
74172  __cil_tmp35 = *((uint32_t *)__cil_tmp34);
74173#line 911
74174  if (__cil_tmp35 & 1U) {
74175    {
74176#line 914
74177    INIT_LIST_HEAD(& action_list);
74178#line 915
74179    __cil_tmp36 = (struct list_head *)action;
74180#line 915
74181    list_add_tail(__cil_tmp36, & action_list);
74182#line 916
74183    vmw_fences_perform_actions(fman, & action_list);
74184    }
74185  } else {
74186    {
74187#line 918
74188    __cil_tmp37 = (struct list_head *)action;
74189#line 918
74190    __cil_tmp38 = (unsigned long )fence;
74191#line 918
74192    __cil_tmp39 = __cil_tmp38 + 40;
74193#line 918
74194    __cil_tmp40 = (struct list_head *)__cil_tmp39;
74195#line 918
74196    list_add_tail(__cil_tmp37, __cil_tmp40);
74197#line 924
74198    run_update = vmw_fence_goal_check_locked(fence);
74199    }
74200  }
74201  }
74202  {
74203#line 927
74204  __cil_tmp41 = (unsigned long )fman;
74205#line 927
74206  __cil_tmp42 = __cil_tmp41 + 16;
74207#line 927
74208  __cil_tmp43 = (spinlock_t *)__cil_tmp42;
74209#line 927
74210  spin_unlock_irqrestore(__cil_tmp43, irq_flags);
74211  }
74212#line 929
74213  if (run_update) {
74214    {
74215#line 930
74216    __cil_tmp44 = (unsigned long )fman;
74217#line 930
74218    __cil_tmp45 = __cil_tmp44 + 200;
74219#line 930
74220    __cil_tmp46 = *((bool *)__cil_tmp45);
74221#line 930
74222    if (! __cil_tmp46) {
74223      {
74224#line 931
74225      __cil_tmp47 = (unsigned long )fman;
74226#line 931
74227      __cil_tmp48 = __cil_tmp47 + 200;
74228#line 931
74229      *((bool *)__cil_tmp48) = (bool )1;
74230#line 932
74231      __cil_tmp49 = (unsigned long )fman;
74232#line 932
74233      __cil_tmp50 = __cil_tmp49 + 8;
74234#line 932
74235      __cil_tmp51 = *((struct vmw_private **)__cil_tmp50);
74236#line 932
74237      vmw_goal_waiter_add(__cil_tmp51);
74238      }
74239    } else {
74240
74241    }
74242    }
74243    {
74244#line 934
74245    vmw_fences_update(fman);
74246    }
74247  } else {
74248
74249  }
74250  {
74251#line 936
74252  __cil_tmp52 = (unsigned long )fman;
74253#line 936
74254  __cil_tmp53 = __cil_tmp52 + 128;
74255#line 936
74256  __cil_tmp54 = (struct mutex *)__cil_tmp53;
74257#line 936
74258  mutex_unlock(__cil_tmp54);
74259  }
74260#line 938
74261  return;
74262}
74263}
74264#line 955 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
74265int vmw_event_fence_action_queue(struct drm_file *file_priv , struct vmw_fence_obj *fence ,
74266                                 struct drm_pending_event *event , uint32_t *tv_sec ,
74267                                 uint32_t *tv_usec , bool interruptible ) 
74268{ struct vmw_event_fence_action *eaction ;
74269  struct vmw_fence_manager *fman ;
74270  struct vmw_fpriv *vmw_fp ;
74271  struct vmw_fpriv *tmp___7 ;
74272  unsigned long irq_flags ;
74273  void *tmp___8 ;
74274  long tmp___9 ;
74275  raw_spinlock_t *tmp___10 ;
74276  unsigned long __cil_tmp17 ;
74277  unsigned long __cil_tmp18 ;
74278  void *__cil_tmp19 ;
74279  unsigned long __cil_tmp20 ;
74280  unsigned long __cil_tmp21 ;
74281  int __cil_tmp22 ;
74282  int __cil_tmp23 ;
74283  int __cil_tmp24 ;
74284  long __cil_tmp25 ;
74285  unsigned long __cil_tmp26 ;
74286  unsigned long __cil_tmp27 ;
74287  unsigned long __cil_tmp28 ;
74288  unsigned long __cil_tmp29 ;
74289  unsigned long __cil_tmp30 ;
74290  unsigned long __cil_tmp31 ;
74291  unsigned long __cil_tmp32 ;
74292  unsigned long __cil_tmp33 ;
74293  unsigned long __cil_tmp34 ;
74294  unsigned long __cil_tmp35 ;
74295  unsigned long __cil_tmp36 ;
74296  unsigned long __cil_tmp37 ;
74297  unsigned long __cil_tmp38 ;
74298  unsigned long __cil_tmp39 ;
74299  unsigned long __cil_tmp40 ;
74300  unsigned long __cil_tmp41 ;
74301  unsigned long __cil_tmp42 ;
74302  struct vmw_private *__cil_tmp43 ;
74303  unsigned long __cil_tmp44 ;
74304  unsigned long __cil_tmp45 ;
74305  unsigned long __cil_tmp46 ;
74306  unsigned long __cil_tmp47 ;
74307  unsigned long __cil_tmp48 ;
74308  unsigned long __cil_tmp49 ;
74309  unsigned long __cil_tmp50 ;
74310  unsigned long __cil_tmp51 ;
74311  spinlock_t *__cil_tmp52 ;
74312  unsigned long __cil_tmp53 ;
74313  unsigned long __cil_tmp54 ;
74314  struct list_head *__cil_tmp55 ;
74315  unsigned long __cil_tmp56 ;
74316  unsigned long __cil_tmp57 ;
74317  struct list_head *__cil_tmp58 ;
74318  unsigned long __cil_tmp59 ;
74319  unsigned long __cil_tmp60 ;
74320  spinlock_t *__cil_tmp61 ;
74321  struct vmw_fence_action *__cil_tmp62 ;
74322
74323  {
74324  {
74325#line 963
74326  __cil_tmp17 = (unsigned long )fence;
74327#line 963
74328  __cil_tmp18 = __cil_tmp17 + 8;
74329#line 963
74330  fman = *((struct vmw_fence_manager **)__cil_tmp18);
74331#line 964
74332  tmp___7 = vmw_fpriv(file_priv);
74333#line 964
74334  vmw_fp = tmp___7;
74335#line 967
74336  tmp___8 = kzalloc(96UL, 208U);
74337#line 967
74338  eaction = (struct vmw_event_fence_action *)tmp___8;
74339#line 968
74340  __cil_tmp19 = (void *)0;
74341#line 968
74342  __cil_tmp20 = (unsigned long )__cil_tmp19;
74343#line 968
74344  __cil_tmp21 = (unsigned long )eaction;
74345#line 968
74346  __cil_tmp22 = __cil_tmp21 == __cil_tmp20;
74347#line 968
74348  __cil_tmp23 = ! __cil_tmp22;
74349#line 968
74350  __cil_tmp24 = ! __cil_tmp23;
74351#line 968
74352  __cil_tmp25 = (long )__cil_tmp24;
74353#line 968
74354  tmp___9 = __builtin_expect(__cil_tmp25, 0L);
74355  }
74356#line 968
74357  if (tmp___9) {
74358#line 969
74359    return (-12);
74360  } else {
74361
74362  }
74363  {
74364#line 971
74365  __cil_tmp26 = (unsigned long )eaction;
74366#line 971
74367  __cil_tmp27 = __cil_tmp26 + 56;
74368#line 971
74369  *((struct drm_pending_event **)__cil_tmp27) = event;
74370#line 973
74371  __cil_tmp28 = 0 + 24;
74372#line 973
74373  __cil_tmp29 = (unsigned long )eaction;
74374#line 973
74375  __cil_tmp30 = __cil_tmp29 + __cil_tmp28;
74376#line 973
74377  *((void (**)(struct vmw_fence_action *action ))__cil_tmp30) = & vmw_event_fence_action_seq_passed;
74378#line 974
74379  __cil_tmp31 = 0 + 32;
74380#line 974
74381  __cil_tmp32 = (unsigned long )eaction;
74382#line 974
74383  __cil_tmp33 = __cil_tmp32 + __cil_tmp31;
74384#line 974
74385  *((void (**)(struct vmw_fence_action *action ))__cil_tmp33) = & vmw_event_fence_action_cleanup;
74386#line 975
74387  __cil_tmp34 = 0 + 16;
74388#line 975
74389  __cil_tmp35 = (unsigned long )eaction;
74390#line 975
74391  __cil_tmp36 = __cil_tmp35 + __cil_tmp34;
74392#line 975
74393  *((enum vmw_action_type *)__cil_tmp36) = (enum vmw_action_type )0;
74394#line 977
74395  __cil_tmp37 = (unsigned long )eaction;
74396#line 977
74397  __cil_tmp38 = __cil_tmp37 + 64;
74398#line 977
74399  *((struct vmw_fence_obj **)__cil_tmp38) = vmw_fence_obj_reference(fence);
74400#line 978
74401  __cil_tmp39 = (unsigned long )eaction;
74402#line 978
74403  __cil_tmp40 = __cil_tmp39 + 72;
74404#line 978
74405  __cil_tmp41 = (unsigned long )fman;
74406#line 978
74407  __cil_tmp42 = __cil_tmp41 + 8;
74408#line 978
74409  __cil_tmp43 = *((struct vmw_private **)__cil_tmp42);
74410#line 978
74411  __cil_tmp44 = (unsigned long )__cil_tmp43;
74412#line 978
74413  __cil_tmp45 = __cil_tmp44 + 2088;
74414#line 978
74415  *((struct drm_device **)__cil_tmp40) = *((struct drm_device **)__cil_tmp45);
74416#line 979
74417  __cil_tmp46 = (unsigned long )eaction;
74418#line 979
74419  __cil_tmp47 = __cil_tmp46 + 80;
74420#line 979
74421  *((uint32_t **)__cil_tmp47) = tv_sec;
74422#line 980
74423  __cil_tmp48 = (unsigned long )eaction;
74424#line 980
74425  __cil_tmp49 = __cil_tmp48 + 88;
74426#line 980
74427  *((uint32_t **)__cil_tmp49) = tv_usec;
74428  }
74429  {
74430#line 982
74431  while (1) {
74432    while_continue: /* CIL Label */ ;
74433    {
74434#line 982
74435    while (1) {
74436      while_continue___0: /* CIL Label */ ;
74437      {
74438#line 982
74439      __cil_tmp50 = (unsigned long )fman;
74440#line 982
74441      __cil_tmp51 = __cil_tmp50 + 16;
74442#line 982
74443      __cil_tmp52 = (spinlock_t *)__cil_tmp51;
74444#line 982
74445      tmp___10 = spinlock_check(__cil_tmp52);
74446#line 982
74447      irq_flags = _raw_spin_lock_irqsave(tmp___10);
74448      }
74449#line 982
74450      goto while_break___0;
74451    }
74452    while_break___0: /* CIL Label */ ;
74453    }
74454#line 982
74455    goto while_break;
74456  }
74457  while_break: /* CIL Label */ ;
74458  }
74459  {
74460#line 983
74461  __cil_tmp53 = (unsigned long )eaction;
74462#line 983
74463  __cil_tmp54 = __cil_tmp53 + 40;
74464#line 983
74465  __cil_tmp55 = (struct list_head *)__cil_tmp54;
74466#line 983
74467  __cil_tmp56 = (unsigned long )vmw_fp;
74468#line 983
74469  __cil_tmp57 = __cil_tmp56 + 16;
74470#line 983
74471  __cil_tmp58 = (struct list_head *)__cil_tmp57;
74472#line 983
74473  list_add_tail(__cil_tmp55, __cil_tmp58);
74474#line 984
74475  __cil_tmp59 = (unsigned long )fman;
74476#line 984
74477  __cil_tmp60 = __cil_tmp59 + 16;
74478#line 984
74479  __cil_tmp61 = (spinlock_t *)__cil_tmp60;
74480#line 984
74481  spin_unlock_irqrestore(__cil_tmp61, irq_flags);
74482#line 986
74483  __cil_tmp62 = (struct vmw_fence_action *)eaction;
74484#line 986
74485  vmw_fence_obj_add_action(fence, __cil_tmp62);
74486  }
74487#line 988
74488  return (0);
74489}
74490}
74491#line 996 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
74492int vmw_event_fence_action_create(struct drm_file *file_priv , struct vmw_fence_obj *fence ,
74493                                  uint32_t flags , uint64_t user_data , bool interruptible ) 
74494{ struct vmw_event_fence_pending *event ;
74495  struct drm_device *dev ;
74496  unsigned long irq_flags ;
74497  int ret ;
74498  raw_spinlock_t *tmp___7 ;
74499  long tmp___8 ;
74500  long tmp___9 ;
74501  void *tmp___10 ;
74502  long tmp___11 ;
74503  raw_spinlock_t *tmp___12 ;
74504  unsigned long __cil_tmp20 ;
74505  unsigned long __cil_tmp21 ;
74506  struct vmw_fence_manager *__cil_tmp22 ;
74507  unsigned long __cil_tmp23 ;
74508  unsigned long __cil_tmp24 ;
74509  struct vmw_private *__cil_tmp25 ;
74510  unsigned long __cil_tmp26 ;
74511  unsigned long __cil_tmp27 ;
74512  unsigned long __cil_tmp28 ;
74513  unsigned long __cil_tmp29 ;
74514  spinlock_t *__cil_tmp30 ;
74515  unsigned long __cil_tmp31 ;
74516  unsigned long __cil_tmp32 ;
74517  int __cil_tmp33 ;
74518  unsigned long __cil_tmp34 ;
74519  int __cil_tmp35 ;
74520  int __cil_tmp36 ;
74521  int __cil_tmp37 ;
74522  long __cil_tmp38 ;
74523  unsigned long __cil_tmp39 ;
74524  unsigned long __cil_tmp40 ;
74525  unsigned long __cil_tmp41 ;
74526  unsigned long __cil_tmp42 ;
74527  int __cil_tmp43 ;
74528  unsigned long __cil_tmp44 ;
74529  unsigned long __cil_tmp45 ;
74530  unsigned long __cil_tmp46 ;
74531  unsigned long __cil_tmp47 ;
74532  spinlock_t *__cil_tmp48 ;
74533  int __cil_tmp49 ;
74534  int __cil_tmp50 ;
74535  int __cil_tmp51 ;
74536  long __cil_tmp52 ;
74537  void *__cil_tmp53 ;
74538  unsigned long __cil_tmp54 ;
74539  unsigned long __cil_tmp55 ;
74540  int __cil_tmp56 ;
74541  int __cil_tmp57 ;
74542  int __cil_tmp58 ;
74543  long __cil_tmp59 ;
74544  unsigned long __cil_tmp60 ;
74545  unsigned long __cil_tmp61 ;
74546  unsigned long __cil_tmp62 ;
74547  unsigned long __cil_tmp63 ;
74548  unsigned long __cil_tmp64 ;
74549  unsigned long __cil_tmp65 ;
74550  unsigned long __cil_tmp66 ;
74551  unsigned long __cil_tmp67 ;
74552  unsigned long __cil_tmp68 ;
74553  unsigned long __cil_tmp69 ;
74554  unsigned long __cil_tmp70 ;
74555  unsigned long __cil_tmp71 ;
74556  unsigned long __cil_tmp72 ;
74557  unsigned long __cil_tmp73 ;
74558  unsigned long __cil_tmp74 ;
74559  unsigned long __cil_tmp75 ;
74560  unsigned long __cil_tmp76 ;
74561  struct drm_pending_event *__cil_tmp77 ;
74562  unsigned long __cil_tmp78 ;
74563  unsigned long __cil_tmp79 ;
74564  unsigned long __cil_tmp80 ;
74565  uint32_t *__cil_tmp81 ;
74566  unsigned long __cil_tmp82 ;
74567  unsigned long __cil_tmp83 ;
74568  unsigned long __cil_tmp84 ;
74569  uint32_t *__cil_tmp85 ;
74570  struct drm_pending_event *__cil_tmp86 ;
74571  void *__cil_tmp87 ;
74572  uint32_t *__cil_tmp88 ;
74573  void *__cil_tmp89 ;
74574  uint32_t *__cil_tmp90 ;
74575  unsigned long __cil_tmp91 ;
74576  unsigned long __cil_tmp92 ;
74577  unsigned long __cil_tmp93 ;
74578  void (*__cil_tmp94)(struct drm_pending_event *event ) ;
74579  struct drm_pending_event *__cil_tmp95 ;
74580  unsigned long __cil_tmp96 ;
74581  unsigned long __cil_tmp97 ;
74582  spinlock_t *__cil_tmp98 ;
74583  unsigned long __cil_tmp99 ;
74584  unsigned long __cil_tmp100 ;
74585  unsigned long __cil_tmp101 ;
74586  unsigned long __cil_tmp102 ;
74587  int __cil_tmp103 ;
74588  unsigned long __cil_tmp104 ;
74589  unsigned long __cil_tmp105 ;
74590  unsigned long __cil_tmp106 ;
74591  unsigned long __cil_tmp107 ;
74592  spinlock_t *__cil_tmp108 ;
74593
74594  {
74595#line 1003
74596  __cil_tmp20 = (unsigned long )fence;
74597#line 1003
74598  __cil_tmp21 = __cil_tmp20 + 8;
74599#line 1003
74600  __cil_tmp22 = *((struct vmw_fence_manager **)__cil_tmp21);
74601#line 1003
74602  __cil_tmp23 = (unsigned long )__cil_tmp22;
74603#line 1003
74604  __cil_tmp24 = __cil_tmp23 + 8;
74605#line 1003
74606  __cil_tmp25 = *((struct vmw_private **)__cil_tmp24);
74607#line 1003
74608  __cil_tmp26 = (unsigned long )__cil_tmp25;
74609#line 1003
74610  __cil_tmp27 = __cil_tmp26 + 2088;
74611#line 1003
74612  dev = *((struct drm_device **)__cil_tmp27);
74613  {
74614#line 1007
74615  while (1) {
74616    while_continue: /* CIL Label */ ;
74617    {
74618#line 1007
74619    while (1) {
74620      while_continue___0: /* CIL Label */ ;
74621      {
74622#line 1007
74623      __cil_tmp28 = (unsigned long )dev;
74624#line 1007
74625      __cil_tmp29 = __cil_tmp28 + 872;
74626#line 1007
74627      __cil_tmp30 = (spinlock_t *)__cil_tmp29;
74628#line 1007
74629      tmp___7 = spinlock_check(__cil_tmp30);
74630#line 1007
74631      irq_flags = _raw_spin_lock_irqsave(tmp___7);
74632      }
74633#line 1007
74634      goto while_break___0;
74635    }
74636    while_break___0: /* CIL Label */ ;
74637    }
74638#line 1007
74639    goto while_break;
74640  }
74641  while_break: /* CIL Label */ ;
74642  }
74643  {
74644#line 1009
74645  __cil_tmp31 = (unsigned long )file_priv;
74646#line 1009
74647  __cil_tmp32 = __cil_tmp31 + 232;
74648#line 1009
74649  __cil_tmp33 = *((int *)__cil_tmp32);
74650#line 1009
74651  __cil_tmp34 = (unsigned long )__cil_tmp33;
74652#line 1009
74653  if (__cil_tmp34 < 24UL) {
74654#line 1009
74655    ret = -16;
74656  } else {
74657#line 1009
74658    ret = 0;
74659  }
74660  }
74661  {
74662#line 1010
74663  __cil_tmp35 = ret == 0;
74664#line 1010
74665  __cil_tmp36 = ! __cil_tmp35;
74666#line 1010
74667  __cil_tmp37 = ! __cil_tmp36;
74668#line 1010
74669  __cil_tmp38 = (long )__cil_tmp37;
74670#line 1010
74671  tmp___8 = __builtin_expect(__cil_tmp38, 1L);
74672  }
74673#line 1010
74674  if (tmp___8) {
74675#line 1011
74676    __cil_tmp39 = (unsigned long )file_priv;
74677#line 1011
74678    __cil_tmp40 = __cil_tmp39 + 232;
74679#line 1011
74680    __cil_tmp41 = (unsigned long )file_priv;
74681#line 1011
74682    __cil_tmp42 = __cil_tmp41 + 232;
74683#line 1011
74684    __cil_tmp43 = *((int *)__cil_tmp42);
74685#line 1011
74686    __cil_tmp44 = (unsigned long )__cil_tmp43;
74687#line 1011
74688    __cil_tmp45 = __cil_tmp44 - 24UL;
74689#line 1011
74690    *((int *)__cil_tmp40) = (int )__cil_tmp45;
74691  } else {
74692
74693  }
74694  {
74695#line 1013
74696  __cil_tmp46 = (unsigned long )dev;
74697#line 1013
74698  __cil_tmp47 = __cil_tmp46 + 872;
74699#line 1013
74700  __cil_tmp48 = (spinlock_t *)__cil_tmp47;
74701#line 1013
74702  spin_unlock_irqrestore(__cil_tmp48, irq_flags);
74703#line 1015
74704  __cil_tmp49 = ret != 0;
74705#line 1015
74706  __cil_tmp50 = ! __cil_tmp49;
74707#line 1015
74708  __cil_tmp51 = ! __cil_tmp50;
74709#line 1015
74710  __cil_tmp52 = (long )__cil_tmp51;
74711#line 1015
74712  tmp___9 = __builtin_expect(__cil_tmp52, 0L);
74713  }
74714#line 1015
74715  if (tmp___9) {
74716    {
74717#line 1016
74718    drm_err("vmw_event_fence_action_create", "Failed to allocate event space for this file.\n");
74719    }
74720#line 1017
74721    goto out_no_space;
74722  } else {
74723
74724  }
74725  {
74726#line 1021
74727  tmp___10 = kzalloc(24UL, 208U);
74728#line 1021
74729  event = (struct vmw_event_fence_pending *)tmp___10;
74730#line 1022
74731  __cil_tmp53 = (void *)0;
74732#line 1022
74733  __cil_tmp54 = (unsigned long )__cil_tmp53;
74734#line 1022
74735  __cil_tmp55 = (unsigned long )event;
74736#line 1022
74737  __cil_tmp56 = __cil_tmp55 == __cil_tmp54;
74738#line 1022
74739  __cil_tmp57 = ! __cil_tmp56;
74740#line 1022
74741  __cil_tmp58 = ! __cil_tmp57;
74742#line 1022
74743  __cil_tmp59 = (long )__cil_tmp58;
74744#line 1022
74745  tmp___11 = __builtin_expect(__cil_tmp59, 0L);
74746  }
74747#line 1022
74748  if (tmp___11) {
74749    {
74750#line 1023
74751    drm_err("vmw_event_fence_action_create", "Failed to allocate an event.\n");
74752#line 1024
74753    ret = -12;
74754    }
74755#line 1025
74756    goto out_no_event;
74757  } else {
74758
74759  }
74760#line 1028
74761  __cil_tmp60 = (unsigned long )event;
74762#line 1028
74763  __cil_tmp61 = __cil_tmp60 + 48;
74764#line 1028
74765  *((__u32 *)__cil_tmp61) = (__u32 )(-0x7FFFFFFF-1);
74766#line 1029
74767  __cil_tmp62 = 0 + 4;
74768#line 1029
74769  __cil_tmp63 = 48 + __cil_tmp62;
74770#line 1029
74771  __cil_tmp64 = (unsigned long )event;
74772#line 1029
74773  __cil_tmp65 = __cil_tmp64 + __cil_tmp63;
74774#line 1029
74775  *((__u32 *)__cil_tmp65) = (__u32 )72UL;
74776#line 1030
74777  __cil_tmp66 = 48 + 8;
74778#line 1030
74779  __cil_tmp67 = (unsigned long )event;
74780#line 1030
74781  __cil_tmp68 = __cil_tmp67 + __cil_tmp66;
74782#line 1030
74783  *((uint64_t *)__cil_tmp68) = user_data;
74784#line 1032
74785  __cil_tmp69 = (unsigned long )event;
74786#line 1032
74787  __cil_tmp70 = __cil_tmp69 + 48;
74788#line 1032
74789  *((struct drm_event **)event) = (struct drm_event *)__cil_tmp70;
74790#line 1033
74791  __cil_tmp71 = 0 + 24;
74792#line 1033
74793  __cil_tmp72 = (unsigned long )event;
74794#line 1033
74795  __cil_tmp73 = __cil_tmp72 + __cil_tmp71;
74796#line 1033
74797  *((struct drm_file **)__cil_tmp73) = file_priv;
74798#line 1034
74799  __cil_tmp74 = 0 + 40;
74800#line 1034
74801  __cil_tmp75 = (unsigned long )event;
74802#line 1034
74803  __cil_tmp76 = __cil_tmp75 + __cil_tmp74;
74804#line 1034
74805  *((void (**)(struct drm_pending_event *event ))__cil_tmp76) = (void (*)(struct drm_pending_event * ))(& kfree);
74806#line 1037
74807  if (flags & 1U) {
74808    {
74809#line 1038
74810    __cil_tmp77 = (struct drm_pending_event *)event;
74811#line 1038
74812    __cil_tmp78 = 48 + 16;
74813#line 1038
74814    __cil_tmp79 = (unsigned long )event;
74815#line 1038
74816    __cil_tmp80 = __cil_tmp79 + __cil_tmp78;
74817#line 1038
74818    __cil_tmp81 = (uint32_t *)__cil_tmp80;
74819#line 1038
74820    __cil_tmp82 = 48 + 20;
74821#line 1038
74822    __cil_tmp83 = (unsigned long )event;
74823#line 1038
74824    __cil_tmp84 = __cil_tmp83 + __cil_tmp82;
74825#line 1038
74826    __cil_tmp85 = (uint32_t *)__cil_tmp84;
74827#line 1038
74828    ret = vmw_event_fence_action_queue(file_priv, fence, __cil_tmp77, __cil_tmp81,
74829                                       __cil_tmp85, interruptible);
74830    }
74831  } else {
74832    {
74833#line 1044
74834    __cil_tmp86 = (struct drm_pending_event *)event;
74835#line 1044
74836    __cil_tmp87 = (void *)0;
74837#line 1044
74838    __cil_tmp88 = (uint32_t *)__cil_tmp87;
74839#line 1044
74840    __cil_tmp89 = (void *)0;
74841#line 1044
74842    __cil_tmp90 = (uint32_t *)__cil_tmp89;
74843#line 1044
74844    ret = vmw_event_fence_action_queue(file_priv, fence, __cil_tmp86, __cil_tmp88,
74845                                       __cil_tmp90, interruptible);
74846    }
74847  }
74848#line 1049
74849  if (ret != 0) {
74850#line 1050
74851    goto out_no_queue;
74852  } else {
74853
74854  }
74855  out_no_queue: 
74856  {
74857#line 1053
74858  __cil_tmp91 = 0 + 40;
74859#line 1053
74860  __cil_tmp92 = (unsigned long )event;
74861#line 1053
74862  __cil_tmp93 = __cil_tmp92 + __cil_tmp91;
74863#line 1053
74864  __cil_tmp94 = *((void (**)(struct drm_pending_event *event ))__cil_tmp93);
74865#line 1053
74866  __cil_tmp95 = (struct drm_pending_event *)event;
74867#line 1053
74868  (*__cil_tmp94)(__cil_tmp95);
74869  }
74870  out_no_event: 
74871  {
74872#line 1055
74873  while (1) {
74874    while_continue___1: /* CIL Label */ ;
74875    {
74876#line 1055
74877    while (1) {
74878      while_continue___2: /* CIL Label */ ;
74879      {
74880#line 1055
74881      __cil_tmp96 = (unsigned long )dev;
74882#line 1055
74883      __cil_tmp97 = __cil_tmp96 + 872;
74884#line 1055
74885      __cil_tmp98 = (spinlock_t *)__cil_tmp97;
74886#line 1055
74887      tmp___12 = spinlock_check(__cil_tmp98);
74888#line 1055
74889      irq_flags = _raw_spin_lock_irqsave(tmp___12);
74890      }
74891#line 1055
74892      goto while_break___2;
74893    }
74894    while_break___2: /* CIL Label */ ;
74895    }
74896#line 1055
74897    goto while_break___1;
74898  }
74899  while_break___1: /* CIL Label */ ;
74900  }
74901  {
74902#line 1056
74903  __cil_tmp99 = (unsigned long )file_priv;
74904#line 1056
74905  __cil_tmp100 = __cil_tmp99 + 232;
74906#line 1056
74907  __cil_tmp101 = (unsigned long )file_priv;
74908#line 1056
74909  __cil_tmp102 = __cil_tmp101 + 232;
74910#line 1056
74911  __cil_tmp103 = *((int *)__cil_tmp102);
74912#line 1056
74913  __cil_tmp104 = (unsigned long )__cil_tmp103;
74914#line 1056
74915  __cil_tmp105 = __cil_tmp104 + 72UL;
74916#line 1056
74917  *((int *)__cil_tmp100) = (int )__cil_tmp105;
74918#line 1057
74919  __cil_tmp106 = (unsigned long )dev;
74920#line 1057
74921  __cil_tmp107 = __cil_tmp106 + 872;
74922#line 1057
74923  __cil_tmp108 = (spinlock_t *)__cil_tmp107;
74924#line 1057
74925  spin_unlock_irqrestore(__cil_tmp108, irq_flags);
74926  }
74927  out_no_space: 
74928#line 1059
74929  return (ret);
74930}
74931}
74932#line 1062 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"
74933int vmw_fence_event_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) 
74934{ struct vmw_private *dev_priv ;
74935  struct vmw_private *tmp___7 ;
74936  struct drm_vmw_fence_event_arg *arg ;
74937  struct vmw_fence_obj *fence ;
74938  struct vmw_fpriv *vmw_fp ;
74939  struct vmw_fpriv *tmp___8 ;
74940  struct drm_vmw_fence_rep *user_fence_rep ;
74941  uint32_t handle ;
74942  int ret ;
74943  struct ttm_base_object *base ;
74944  struct ttm_base_object *tmp___9 ;
74945  long tmp___10 ;
74946  struct ttm_base_object    *__mptr ;
74947  bool existed ;
74948  long tmp___11 ;
74949  uint32_t *tmp___12 ;
74950  long tmp___13 ;
74951  long tmp___14 ;
74952  long tmp___15 ;
74953  struct vmw_fpriv *tmp___16 ;
74954  struct vmw_fence_obj **__cil_tmp24 ;
74955  void *__cil_tmp25 ;
74956  uint64_t __cil_tmp26 ;
74957  unsigned long __cil_tmp27 ;
74958  unsigned long __cil_tmp28 ;
74959  unsigned long __cil_tmp29 ;
74960  unsigned long __cil_tmp30 ;
74961  unsigned long __cil_tmp31 ;
74962  struct ttm_object_file *__cil_tmp32 ;
74963  unsigned long __cil_tmp33 ;
74964  unsigned long __cil_tmp34 ;
74965  uint32_t __cil_tmp35 ;
74966  struct ttm_base_object **__cil_tmp36 ;
74967  void *__cil_tmp37 ;
74968  unsigned long __cil_tmp38 ;
74969  struct ttm_base_object **__cil_tmp39 ;
74970  struct ttm_base_object *__cil_tmp40 ;
74971  unsigned long __cil_tmp41 ;
74972  int __cil_tmp42 ;
74973  int __cil_tmp43 ;
74974  int __cil_tmp44 ;
74975  long __cil_tmp45 ;
74976  unsigned long __cil_tmp46 ;
74977  unsigned long __cil_tmp47 ;
74978  uint32_t __cil_tmp48 ;
74979  unsigned long __cil_tmp49 ;
74980  struct ttm_base_object **__cil_tmp50 ;
74981  struct ttm_base_object *__cil_tmp51 ;
74982  struct vmw_fence_obj **__cil_tmp52 ;
74983  struct vmw_user_fence *__cil_tmp53 ;
74984  struct ttm_base_object *__cil_tmp54 ;
74985  unsigned int __cil_tmp55 ;
74986  char *__cil_tmp56 ;
74987  char *__cil_tmp57 ;
74988  struct vmw_user_fence *__cil_tmp58 ;
74989  unsigned long __cil_tmp59 ;
74990  unsigned long __cil_tmp60 ;
74991  struct vmw_fence_obj **__cil_tmp61 ;
74992  struct vmw_fence_obj *__cil_tmp62 ;
74993  void *__cil_tmp63 ;
74994  unsigned long __cil_tmp64 ;
74995  unsigned long __cil_tmp65 ;
74996  unsigned long __cil_tmp66 ;
74997  unsigned long __cil_tmp67 ;
74998  struct ttm_object_file *__cil_tmp68 ;
74999  struct ttm_base_object **__cil_tmp69 ;
75000  struct ttm_base_object *__cil_tmp70 ;
75001  enum ttm_ref_type __cil_tmp71 ;
75002  int __cil_tmp72 ;
75003  int __cil_tmp73 ;
75004  int __cil_tmp74 ;
75005  long __cil_tmp75 ;
75006  uint32_t *__cil_tmp76 ;
75007  unsigned long __cil_tmp77 ;
75008  struct ttm_base_object **__cil_tmp78 ;
75009  struct ttm_base_object *__cil_tmp79 ;
75010  unsigned long __cil_tmp80 ;
75011  unsigned long __cil_tmp81 ;
75012  unsigned long __cil_tmp82 ;
75013  struct vmw_fence_obj **__cil_tmp83 ;
75014  struct vmw_fence_obj *__cil_tmp84 ;
75015  void *__cil_tmp85 ;
75016  int __cil_tmp86 ;
75017  int __cil_tmp87 ;
75018  int __cil_tmp88 ;
75019  long __cil_tmp89 ;
75020  void *__cil_tmp90 ;
75021  unsigned long __cil_tmp91 ;
75022  struct vmw_fence_obj **__cil_tmp92 ;
75023  struct vmw_fence_obj *__cil_tmp93 ;
75024  unsigned long __cil_tmp94 ;
75025  int __cil_tmp95 ;
75026  int __cil_tmp96 ;
75027  int __cil_tmp97 ;
75028  long __cil_tmp98 ;
75029  unsigned long __cil_tmp99 ;
75030  unsigned long __cil_tmp100 ;
75031  uint32_t __cil_tmp101 ;
75032  struct vmw_fence_obj **__cil_tmp102 ;
75033  struct vmw_fence_obj *__cil_tmp103 ;
75034  unsigned long __cil_tmp104 ;
75035  unsigned long __cil_tmp105 ;
75036  uint32_t __cil_tmp106 ;
75037  unsigned long __cil_tmp107 ;
75038  unsigned long __cil_tmp108 ;
75039  uint64_t __cil_tmp109 ;
75040  bool __cil_tmp110 ;
75041  struct vmw_fence_obj **__cil_tmp111 ;
75042  struct vmw_fence_obj *__cil_tmp112 ;
75043  unsigned long __cil_tmp113 ;
75044  unsigned long __cil_tmp114 ;
75045  uint32_t __cil_tmp115 ;
75046  unsigned long __cil_tmp116 ;
75047  unsigned long __cil_tmp117 ;
75048  uint64_t __cil_tmp118 ;
75049  bool __cil_tmp119 ;
75050  int __cil_tmp120 ;
75051  int __cil_tmp121 ;
75052  int __cil_tmp122 ;
75053  long __cil_tmp123 ;
75054  struct vmw_fence_obj **__cil_tmp124 ;
75055  struct vmw_fence_obj *__cil_tmp125 ;
75056  uint32_t *__cil_tmp126 ;
75057  uint32_t __cil_tmp127 ;
75058  void *__cil_tmp128 ;
75059  unsigned long __cil_tmp129 ;
75060  unsigned long __cil_tmp130 ;
75061  unsigned long __cil_tmp131 ;
75062  unsigned long __cil_tmp132 ;
75063  struct ttm_object_file *__cil_tmp133 ;
75064  uint32_t *__cil_tmp134 ;
75065  uint32_t __cil_tmp135 ;
75066  unsigned long __cil_tmp136 ;
75067  enum ttm_ref_type __cil_tmp137 ;
75068
75069  {
75070  {
75071#line 1065
75072  tmp___7 = vmw_priv(dev);
75073#line 1065
75074  dev_priv = tmp___7;
75075#line 1066
75076  arg = (struct drm_vmw_fence_event_arg *)data;
75077#line 1068
75078  __cil_tmp24 = & fence;
75079#line 1068
75080  __cil_tmp25 = (void *)0;
75081#line 1068
75082  *__cil_tmp24 = (struct vmw_fence_obj *)__cil_tmp25;
75083#line 1069
75084  tmp___8 = vmw_fpriv(file_priv);
75085#line 1069
75086  vmw_fp = tmp___8;
75087#line 1070
75088  __cil_tmp26 = *((uint64_t *)arg);
75089#line 1070
75090  __cil_tmp27 = (unsigned long )__cil_tmp26;
75091#line 1070
75092  user_fence_rep = (struct drm_vmw_fence_rep *)__cil_tmp27;
75093  }
75094  {
75095#line 1081
75096  __cil_tmp28 = (unsigned long )arg;
75097#line 1081
75098  __cil_tmp29 = __cil_tmp28 + 16;
75099#line 1081
75100  if (*((uint32_t *)__cil_tmp29)) {
75101    {
75102#line 1082
75103    __cil_tmp30 = (unsigned long )vmw_fp;
75104#line 1082
75105    __cil_tmp31 = __cil_tmp30 + 8;
75106#line 1082
75107    __cil_tmp32 = *((struct ttm_object_file **)__cil_tmp31);
75108#line 1082
75109    __cil_tmp33 = (unsigned long )arg;
75110#line 1082
75111    __cil_tmp34 = __cil_tmp33 + 16;
75112#line 1082
75113    __cil_tmp35 = *((uint32_t *)__cil_tmp34);
75114#line 1082
75115    tmp___9 = ttm_base_object_lookup(__cil_tmp32, __cil_tmp35);
75116#line 1082
75117    __cil_tmp36 = & base;
75118#line 1082
75119    *__cil_tmp36 = tmp___9;
75120#line 1085
75121    __cil_tmp37 = (void *)0;
75122#line 1085
75123    __cil_tmp38 = (unsigned long )__cil_tmp37;
75124#line 1085
75125    __cil_tmp39 = & base;
75126#line 1085
75127    __cil_tmp40 = *__cil_tmp39;
75128#line 1085
75129    __cil_tmp41 = (unsigned long )__cil_tmp40;
75130#line 1085
75131    __cil_tmp42 = __cil_tmp41 == __cil_tmp38;
75132#line 1085
75133    __cil_tmp43 = ! __cil_tmp42;
75134#line 1085
75135    __cil_tmp44 = ! __cil_tmp43;
75136#line 1085
75137    __cil_tmp45 = (long )__cil_tmp44;
75138#line 1085
75139    tmp___10 = __builtin_expect(__cil_tmp45, 0L);
75140    }
75141#line 1085
75142    if (tmp___10) {
75143      {
75144#line 1086
75145      __cil_tmp46 = (unsigned long )arg;
75146#line 1086
75147      __cil_tmp47 = __cil_tmp46 + 16;
75148#line 1086
75149      __cil_tmp48 = *((uint32_t *)__cil_tmp47);
75150#line 1086
75151      __cil_tmp49 = (unsigned long )__cil_tmp48;
75152#line 1086
75153      drm_err("vmw_fence_event_ioctl", "Fence event invalid fence object handle 0x%08lx.\n",
75154              __cil_tmp49);
75155      }
75156#line 1089
75157      return (-22);
75158    } else {
75159
75160    }
75161    {
75162#line 1091
75163    __cil_tmp50 = & base;
75164#line 1091
75165    __cil_tmp51 = *__cil_tmp50;
75166#line 1091
75167    __mptr = (struct ttm_base_object    *)__cil_tmp51;
75168#line 1091
75169    __cil_tmp52 = & fence;
75170#line 1091
75171    __cil_tmp53 = (struct vmw_user_fence *)0;
75172#line 1091
75173    __cil_tmp54 = (struct ttm_base_object *)__cil_tmp53;
75174#line 1091
75175    __cil_tmp55 = (unsigned int )__cil_tmp54;
75176#line 1091
75177    __cil_tmp56 = (char *)__mptr;
75178#line 1091
75179    __cil_tmp57 = __cil_tmp56 - __cil_tmp55;
75180#line 1091
75181    __cil_tmp58 = (struct vmw_user_fence *)__cil_tmp57;
75182#line 1091
75183    __cil_tmp59 = (unsigned long )__cil_tmp58;
75184#line 1091
75185    __cil_tmp60 = __cil_tmp59 + 64;
75186#line 1091
75187    *__cil_tmp52 = (struct vmw_fence_obj *)__cil_tmp60;
75188#line 1093
75189    __cil_tmp61 = & fence;
75190#line 1093
75191    __cil_tmp62 = *__cil_tmp61;
75192#line 1093
75193    vmw_fence_obj_reference(__cil_tmp62);
75194    }
75195    {
75196#line 1095
75197    __cil_tmp63 = (void *)0;
75198#line 1095
75199    __cil_tmp64 = (unsigned long )__cil_tmp63;
75200#line 1095
75201    __cil_tmp65 = (unsigned long )user_fence_rep;
75202#line 1095
75203    if (__cil_tmp65 != __cil_tmp64) {
75204      {
75205#line 1098
75206      __cil_tmp66 = (unsigned long )vmw_fp;
75207#line 1098
75208      __cil_tmp67 = __cil_tmp66 + 8;
75209#line 1098
75210      __cil_tmp68 = *((struct ttm_object_file **)__cil_tmp67);
75211#line 1098
75212      __cil_tmp69 = & base;
75213#line 1098
75214      __cil_tmp70 = *__cil_tmp69;
75215#line 1098
75216      __cil_tmp71 = (enum ttm_ref_type )0;
75217#line 1098
75218      ret = ttm_ref_object_add(__cil_tmp68, __cil_tmp70, __cil_tmp71, & existed);
75219#line 1100
75220      __cil_tmp72 = ret != 0;
75221#line 1100
75222      __cil_tmp73 = ! __cil_tmp72;
75223#line 1100
75224      __cil_tmp74 = ! __cil_tmp73;
75225#line 1100
75226      __cil_tmp75 = (long )__cil_tmp74;
75227#line 1100
75228      tmp___11 = __builtin_expect(__cil_tmp75, 0L);
75229      }
75230#line 1100
75231      if (tmp___11) {
75232        {
75233#line 1101
75234        drm_err("vmw_fence_event_ioctl", "Failed to reference a fence object.\n");
75235        }
75236#line 1103
75237        goto out_no_ref_obj;
75238      } else {
75239
75240      }
75241#line 1105
75242      __cil_tmp76 = & handle;
75243#line 1105
75244      __cil_tmp77 = 0 + 16;
75245#line 1105
75246      __cil_tmp78 = & base;
75247#line 1105
75248      __cil_tmp79 = *__cil_tmp78;
75249#line 1105
75250      __cil_tmp80 = (unsigned long )__cil_tmp79;
75251#line 1105
75252      __cil_tmp81 = __cil_tmp80 + __cil_tmp77;
75253#line 1105
75254      __cil_tmp82 = *((unsigned long *)__cil_tmp81);
75255#line 1105
75256      *__cil_tmp76 = (uint32_t )__cil_tmp82;
75257    } else {
75258
75259    }
75260    }
75261    {
75262#line 1107
75263    ttm_base_object_unref(& base);
75264    }
75265  } else {
75266
75267  }
75268  }
75269  {
75270#line 1113
75271  __cil_tmp83 = & fence;
75272#line 1113
75273  __cil_tmp84 = *__cil_tmp83;
75274#line 1113
75275  if (! __cil_tmp84) {
75276#line 1114
75277    if (user_fence_rep) {
75278#line 1114
75279      tmp___12 = & handle;
75280    } else {
75281#line 1114
75282      __cil_tmp85 = (void *)0;
75283#line 1114
75284      tmp___12 = (uint32_t *)__cil_tmp85;
75285    }
75286    {
75287#line 1114
75288    ret = vmw_execbuf_fence_commands(file_priv, dev_priv, & fence, tmp___12);
75289#line 1118
75290    __cil_tmp86 = ret != 0;
75291#line 1118
75292    __cil_tmp87 = ! __cil_tmp86;
75293#line 1118
75294    __cil_tmp88 = ! __cil_tmp87;
75295#line 1118
75296    __cil_tmp89 = (long )__cil_tmp88;
75297#line 1118
75298    tmp___13 = __builtin_expect(__cil_tmp89, 0L);
75299    }
75300#line 1118
75301    if (tmp___13) {
75302      {
75303#line 1119
75304      drm_err("vmw_fence_event_ioctl", "Fence event failed to create fence.\n");
75305      }
75306#line 1120
75307      return (ret);
75308    } else {
75309
75310    }
75311  } else {
75312
75313  }
75314  }
75315  {
75316#line 1124
75317  while (1) {
75318    while_continue: /* CIL Label */ ;
75319    {
75320#line 1124
75321    __cil_tmp90 = (void *)0;
75322#line 1124
75323    __cil_tmp91 = (unsigned long )__cil_tmp90;
75324#line 1124
75325    __cil_tmp92 = & fence;
75326#line 1124
75327    __cil_tmp93 = *__cil_tmp92;
75328#line 1124
75329    __cil_tmp94 = (unsigned long )__cil_tmp93;
75330#line 1124
75331    __cil_tmp95 = __cil_tmp94 == __cil_tmp91;
75332#line 1124
75333    __cil_tmp96 = ! __cil_tmp95;
75334#line 1124
75335    __cil_tmp97 = ! __cil_tmp96;
75336#line 1124
75337    __cil_tmp98 = (long )__cil_tmp97;
75338#line 1124
75339    tmp___14 = __builtin_expect(__cil_tmp98, 0L);
75340    }
75341#line 1124
75342    if (tmp___14) {
75343      {
75344#line 1124
75345      while (1) {
75346        while_continue___0: /* CIL Label */ ;
75347#line 1124
75348        __asm__  volatile   ("1:\tud2\n"
75349                             ".pushsection __bug_table,\"a\"\n"
75350                             "2:\t.long 1b - 2b, %c0 - 2b\n"
75351                             "\t.word %c1, 0\n"
75352                             "\t.org 2b+%c2\n"
75353                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c"),
75354                             "i" (1124), "i" (12UL));
75355        {
75356#line 1124
75357        while (1) {
75358          while_continue___1: /* CIL Label */ ;
75359        }
75360        while_break___1: /* CIL Label */ ;
75361        }
75362#line 1124
75363        goto while_break___0;
75364      }
75365      while_break___0: /* CIL Label */ ;
75366      }
75367    } else {
75368
75369    }
75370#line 1124
75371    goto while_break;
75372  }
75373  while_break: /* CIL Label */ ;
75374  }
75375  {
75376#line 1126
75377  __cil_tmp99 = (unsigned long )arg;
75378#line 1126
75379  __cil_tmp100 = __cil_tmp99 + 20;
75380#line 1126
75381  __cil_tmp101 = *((uint32_t *)__cil_tmp100);
75382#line 1126
75383  if (__cil_tmp101 & 1U) {
75384    {
75385#line 1127
75386    __cil_tmp102 = & fence;
75387#line 1127
75388    __cil_tmp103 = *__cil_tmp102;
75389#line 1127
75390    __cil_tmp104 = (unsigned long )arg;
75391#line 1127
75392    __cil_tmp105 = __cil_tmp104 + 20;
75393#line 1127
75394    __cil_tmp106 = *((uint32_t *)__cil_tmp105);
75395#line 1127
75396    __cil_tmp107 = (unsigned long )arg;
75397#line 1127
75398    __cil_tmp108 = __cil_tmp107 + 8;
75399#line 1127
75400    __cil_tmp109 = *((uint64_t *)__cil_tmp108);
75401#line 1127
75402    __cil_tmp110 = (bool )1;
75403#line 1127
75404    ret = vmw_event_fence_action_create(file_priv, __cil_tmp103, __cil_tmp106, __cil_tmp109,
75405                                        __cil_tmp110);
75406    }
75407  } else {
75408    {
75409#line 1132
75410    __cil_tmp111 = & fence;
75411#line 1132
75412    __cil_tmp112 = *__cil_tmp111;
75413#line 1132
75414    __cil_tmp113 = (unsigned long )arg;
75415#line 1132
75416    __cil_tmp114 = __cil_tmp113 + 20;
75417#line 1132
75418    __cil_tmp115 = *((uint32_t *)__cil_tmp114);
75419#line 1132
75420    __cil_tmp116 = (unsigned long )arg;
75421#line 1132
75422    __cil_tmp117 = __cil_tmp116 + 8;
75423#line 1132
75424    __cil_tmp118 = *((uint64_t *)__cil_tmp117);
75425#line 1132
75426    __cil_tmp119 = (bool )1;
75427#line 1132
75428    ret = vmw_event_fence_action_create(file_priv, __cil_tmp112, __cil_tmp115, __cil_tmp118,
75429                                        __cil_tmp119);
75430    }
75431  }
75432  }
75433  {
75434#line 1137
75435  __cil_tmp120 = ret != 0;
75436#line 1137
75437  __cil_tmp121 = ! __cil_tmp120;
75438#line 1137
75439  __cil_tmp122 = ! __cil_tmp121;
75440#line 1137
75441  __cil_tmp123 = (long )__cil_tmp122;
75442#line 1137
75443  tmp___15 = __builtin_expect(__cil_tmp123, 0L);
75444  }
75445#line 1137
75446  if (tmp___15) {
75447#line 1138
75448    if (ret != -512) {
75449      {
75450#line 1139
75451      drm_err("vmw_fence_event_ioctl", "Failed to attach event to fence.\n");
75452      }
75453    } else {
75454
75455    }
75456#line 1140
75457    goto out_no_create;
75458  } else {
75459
75460  }
75461  {
75462#line 1143
75463  __cil_tmp124 = & fence;
75464#line 1143
75465  __cil_tmp125 = *__cil_tmp124;
75466#line 1143
75467  __cil_tmp126 = & handle;
75468#line 1143
75469  __cil_tmp127 = *__cil_tmp126;
75470#line 1143
75471  vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, __cil_tmp125, __cil_tmp127);
75472#line 1145
75473  vmw_fence_obj_unreference(& fence);
75474  }
75475#line 1146
75476  return (0);
75477  out_no_create: 
75478  {
75479#line 1148
75480  __cil_tmp128 = (void *)0;
75481#line 1148
75482  __cil_tmp129 = (unsigned long )__cil_tmp128;
75483#line 1148
75484  __cil_tmp130 = (unsigned long )user_fence_rep;
75485#line 1148
75486  if (__cil_tmp130 != __cil_tmp129) {
75487    {
75488#line 1149
75489    tmp___16 = vmw_fpriv(file_priv);
75490#line 1149
75491    __cil_tmp131 = (unsigned long )tmp___16;
75492#line 1149
75493    __cil_tmp132 = __cil_tmp131 + 8;
75494#line 1149
75495    __cil_tmp133 = *((struct ttm_object_file **)__cil_tmp132);
75496#line 1149
75497    __cil_tmp134 = & handle;
75498#line 1149
75499    __cil_tmp135 = *__cil_tmp134;
75500#line 1149
75501    __cil_tmp136 = (unsigned long )__cil_tmp135;
75502#line 1149
75503    __cil_tmp137 = (enum ttm_ref_type )0;
75504#line 1149
75505    ttm_ref_object_base_unref(__cil_tmp133, __cil_tmp136, __cil_tmp137);
75506    }
75507  } else {
75508
75509  }
75510  }
75511  out_no_ref_obj: 
75512  {
75513#line 1152
75514  vmw_fence_obj_unreference(& fence);
75515  }
75516#line 1153
75517  return (ret);
75518}
75519}
75520#line 448 "/home/zakharov/launch/inst/current/envs/linux-3.4/linux-3.4/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h"
75521int vmw_dmabuf_to_placement(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
75522                            struct ttm_placement *placement , bool interruptible ) ;
75523#line 50 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
75524int vmw_dmabuf_to_placement(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
75525                            struct ttm_placement *placement , bool interruptible ) 
75526{ struct vmw_master *vmaster ;
75527  struct ttm_buffer_object *bo ;
75528  int ret ;
75529  long tmp___7 ;
75530  long tmp___8 ;
75531  unsigned long __cil_tmp10 ;
75532  unsigned long __cil_tmp11 ;
75533  struct ttm_lock *__cil_tmp12 ;
75534  int __cil_tmp13 ;
75535  int __cil_tmp14 ;
75536  int __cil_tmp15 ;
75537  long __cil_tmp16 ;
75538  bool __cil_tmp17 ;
75539  uint32_t __cil_tmp18 ;
75540  bool __cil_tmp19 ;
75541  bool __cil_tmp20 ;
75542  uint32_t __cil_tmp21 ;
75543  int __cil_tmp22 ;
75544  int __cil_tmp23 ;
75545  int __cil_tmp24 ;
75546  long __cil_tmp25 ;
75547  bool __cil_tmp26 ;
75548  bool __cil_tmp27 ;
75549  struct ttm_lock *__cil_tmp28 ;
75550
75551  {
75552  {
75553#line 55
75554  __cil_tmp10 = (unsigned long )dev_priv;
75555#line 55
75556  __cil_tmp11 = __cil_tmp10 + 134384;
75557#line 55
75558  vmaster = *((struct vmw_master **)__cil_tmp11);
75559#line 56
75560  bo = (struct ttm_buffer_object *)buf;
75561#line 59
75562  __cil_tmp12 = (struct ttm_lock *)vmaster;
75563#line 59
75564  ret = ttm_write_lock(__cil_tmp12, interruptible);
75565#line 60
75566  __cil_tmp13 = ret != 0;
75567#line 60
75568  __cil_tmp14 = ! __cil_tmp13;
75569#line 60
75570  __cil_tmp15 = ! __cil_tmp14;
75571#line 60
75572  __cil_tmp16 = (long )__cil_tmp15;
75573#line 60
75574  tmp___7 = __builtin_expect(__cil_tmp16, 0L);
75575  }
75576#line 60
75577  if (tmp___7) {
75578#line 61
75579    return (ret);
75580  } else {
75581
75582  }
75583  {
75584#line 63
75585  __cil_tmp17 = (bool )0;
75586#line 63
75587  __cil_tmp18 = (uint32_t )0;
75588#line 63
75589  vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp17, __cil_tmp18);
75590#line 65
75591  __cil_tmp19 = (bool )0;
75592#line 65
75593  __cil_tmp20 = (bool )0;
75594#line 65
75595  __cil_tmp21 = (uint32_t )0;
75596#line 65
75597  ret = ttm_bo_reserve(bo, interruptible, __cil_tmp19, __cil_tmp20, __cil_tmp21);
75598#line 66
75599  __cil_tmp22 = ret != 0;
75600#line 66
75601  __cil_tmp23 = ! __cil_tmp22;
75602#line 66
75603  __cil_tmp24 = ! __cil_tmp23;
75604#line 66
75605  __cil_tmp25 = (long )__cil_tmp24;
75606#line 66
75607  tmp___8 = __builtin_expect(__cil_tmp25, 0L);
75608  }
75609#line 66
75610  if (tmp___8) {
75611#line 67
75612    goto err;
75613  } else {
75614
75615  }
75616  {
75617#line 69
75618  __cil_tmp26 = (bool )0;
75619#line 69
75620  __cil_tmp27 = (bool )0;
75621#line 69
75622  ret = ttm_bo_validate(bo, placement, interruptible, __cil_tmp26, __cil_tmp27);
75623#line 71
75624  ttm_bo_unreserve(bo);
75625  }
75626  err: 
75627  {
75628#line 74
75629  __cil_tmp28 = (struct ttm_lock *)vmaster;
75630#line 74
75631  ttm_write_unlock(__cil_tmp28);
75632  }
75633#line 75
75634  return (ret);
75635}
75636}
75637#line 94 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
75638int vmw_dmabuf_to_vram_or_gmr(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
75639                              bool pin , bool interruptible ) 
75640{ struct vmw_master *vmaster ;
75641  struct ttm_buffer_object *bo ;
75642  struct ttm_placement *placement ;
75643  int ret ;
75644  long tmp___7 ;
75645  long tmp___8 ;
75646  long tmp___9 ;
75647  unsigned long __cil_tmp12 ;
75648  unsigned long __cil_tmp13 ;
75649  struct ttm_lock *__cil_tmp14 ;
75650  int __cil_tmp15 ;
75651  int __cil_tmp16 ;
75652  int __cil_tmp17 ;
75653  long __cil_tmp18 ;
75654  bool __cil_tmp19 ;
75655  uint32_t __cil_tmp20 ;
75656  bool __cil_tmp21 ;
75657  bool __cil_tmp22 ;
75658  uint32_t __cil_tmp23 ;
75659  int __cil_tmp24 ;
75660  int __cil_tmp25 ;
75661  int __cil_tmp26 ;
75662  long __cil_tmp27 ;
75663  bool __cil_tmp28 ;
75664  bool __cil_tmp29 ;
75665  int __cil_tmp30 ;
75666  int __cil_tmp31 ;
75667  int __cil_tmp32 ;
75668  long __cil_tmp33 ;
75669  bool __cil_tmp34 ;
75670  bool __cil_tmp35 ;
75671  struct ttm_lock *__cil_tmp36 ;
75672
75673  {
75674  {
75675#line 98
75676  __cil_tmp12 = (unsigned long )dev_priv;
75677#line 98
75678  __cil_tmp13 = __cil_tmp12 + 134384;
75679#line 98
75680  vmaster = *((struct vmw_master **)__cil_tmp13);
75681#line 99
75682  bo = (struct ttm_buffer_object *)buf;
75683#line 103
75684  __cil_tmp14 = (struct ttm_lock *)vmaster;
75685#line 103
75686  ret = ttm_write_lock(__cil_tmp14, interruptible);
75687#line 104
75688  __cil_tmp15 = ret != 0;
75689#line 104
75690  __cil_tmp16 = ! __cil_tmp15;
75691#line 104
75692  __cil_tmp17 = ! __cil_tmp16;
75693#line 104
75694  __cil_tmp18 = (long )__cil_tmp17;
75695#line 104
75696  tmp___7 = __builtin_expect(__cil_tmp18, 0L);
75697  }
75698#line 104
75699  if (tmp___7) {
75700#line 105
75701    return (ret);
75702  } else {
75703
75704  }
75705#line 107
75706  if (pin) {
75707    {
75708#line 108
75709    __cil_tmp19 = (bool )0;
75710#line 108
75711    __cil_tmp20 = (uint32_t )0;
75712#line 108
75713    vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp19, __cil_tmp20);
75714    }
75715  } else {
75716
75717  }
75718  {
75719#line 110
75720  __cil_tmp21 = (bool )0;
75721#line 110
75722  __cil_tmp22 = (bool )0;
75723#line 110
75724  __cil_tmp23 = (uint32_t )0;
75725#line 110
75726  ret = ttm_bo_reserve(bo, interruptible, __cil_tmp21, __cil_tmp22, __cil_tmp23);
75727#line 111
75728  __cil_tmp24 = ret != 0;
75729#line 111
75730  __cil_tmp25 = ! __cil_tmp24;
75731#line 111
75732  __cil_tmp26 = ! __cil_tmp25;
75733#line 111
75734  __cil_tmp27 = (long )__cil_tmp26;
75735#line 111
75736  tmp___8 = __builtin_expect(__cil_tmp27, 0L);
75737  }
75738#line 111
75739  if (tmp___8) {
75740#line 112
75741    goto err;
75742  } else {
75743
75744  }
75745#line 121
75746  if (pin) {
75747#line 122
75748    placement = & vmw_vram_gmr_ne_placement;
75749  } else {
75750#line 124
75751    placement = & vmw_vram_gmr_placement;
75752  }
75753  {
75754#line 126
75755  __cil_tmp28 = (bool )0;
75756#line 126
75757  __cil_tmp29 = (bool )0;
75758#line 126
75759  ret = ttm_bo_validate(bo, placement, interruptible, __cil_tmp28, __cil_tmp29);
75760#line 127
75761  __cil_tmp30 = ret == 0;
75762#line 127
75763  __cil_tmp31 = ! __cil_tmp30;
75764#line 127
75765  __cil_tmp32 = ! __cil_tmp31;
75766#line 127
75767  __cil_tmp33 = (long )__cil_tmp32;
75768#line 127
75769  tmp___9 = __builtin_expect(__cil_tmp33, 1L);
75770  }
75771#line 127
75772  if (tmp___9) {
75773#line 128
75774    goto err_unreserve;
75775  } else
75776#line 127
75777  if (ret == -512) {
75778#line 128
75779    goto err_unreserve;
75780  } else {
75781
75782  }
75783#line 136
75784  if (pin) {
75785#line 137
75786    placement = & vmw_vram_ne_placement;
75787  } else {
75788#line 139
75789    placement = & vmw_vram_placement;
75790  }
75791  {
75792#line 141
75793  __cil_tmp34 = (bool )0;
75794#line 141
75795  __cil_tmp35 = (bool )0;
75796#line 141
75797  ret = ttm_bo_validate(bo, placement, interruptible, __cil_tmp34, __cil_tmp35);
75798  }
75799  err_unreserve: 
75800  {
75801#line 144
75802  ttm_bo_unreserve(bo);
75803  }
75804  err: 
75805  {
75806#line 146
75807  __cil_tmp36 = (struct ttm_lock *)vmaster;
75808#line 146
75809  ttm_write_unlock(__cil_tmp36);
75810  }
75811#line 147
75812  return (ret);
75813}
75814}
75815#line 165 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
75816int vmw_dmabuf_to_vram(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
75817                       bool pin , bool interruptible ) 
75818{ struct ttm_placement *placement ;
75819  int tmp___7 ;
75820
75821  {
75822#line 171
75823  if (pin) {
75824#line 172
75825    placement = & vmw_vram_ne_placement;
75826  } else {
75827#line 174
75828    placement = & vmw_vram_placement;
75829  }
75830  {
75831#line 176
75832  tmp___7 = vmw_dmabuf_to_placement(dev_priv, buf, placement, interruptible);
75833  }
75834#line 176
75835  return (tmp___7);
75836}
75837}
75838#line 197 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
75839int vmw_dmabuf_to_start_of_vram(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf ,
75840                                bool pin , bool interruptible ) 
75841{ struct vmw_master *vmaster ;
75842  struct ttm_buffer_object *bo ;
75843  struct ttm_placement placement ;
75844  int ret ;
75845  long tmp___7 ;
75846  long tmp___8 ;
75847  int __ret_warn_on ;
75848  int tmp___9 ;
75849  long tmp___10 ;
75850  unsigned long __cil_tmp14 ;
75851  unsigned long __cil_tmp15 ;
75852  struct ttm_placement *__cil_tmp16 ;
75853  struct ttm_placement *__cil_tmp17 ;
75854  struct ttm_placement *__cil_tmp18 ;
75855  struct ttm_placement *__cil_tmp19 ;
75856  unsigned long __cil_tmp20 ;
75857  unsigned long __cil_tmp21 ;
75858  unsigned long __cil_tmp22 ;
75859  unsigned long __cil_tmp23 ;
75860  struct ttm_lock *__cil_tmp24 ;
75861  int __cil_tmp25 ;
75862  int __cil_tmp26 ;
75863  int __cil_tmp27 ;
75864  long __cil_tmp28 ;
75865  bool __cil_tmp29 ;
75866  uint32_t __cil_tmp30 ;
75867  bool __cil_tmp31 ;
75868  bool __cil_tmp32 ;
75869  uint32_t __cil_tmp33 ;
75870  int __cil_tmp34 ;
75871  int __cil_tmp35 ;
75872  int __cil_tmp36 ;
75873  long __cil_tmp37 ;
75874  unsigned long __cil_tmp38 ;
75875  unsigned long __cil_tmp39 ;
75876  unsigned long __cil_tmp40 ;
75877  uint32_t __cil_tmp41 ;
75878  unsigned long __cil_tmp42 ;
75879  unsigned long __cil_tmp43 ;
75880  unsigned long __cil_tmp44 ;
75881  unsigned long __cil_tmp45 ;
75882  unsigned long __cil_tmp46 ;
75883  unsigned long __cil_tmp47 ;
75884  unsigned long __cil_tmp48 ;
75885  unsigned long __cil_tmp49 ;
75886  unsigned long __cil_tmp50 ;
75887  unsigned long __cil_tmp51 ;
75888  unsigned long __cil_tmp52 ;
75889  bool __cil_tmp53 ;
75890  bool __cil_tmp54 ;
75891  bool __cil_tmp55 ;
75892  bool __cil_tmp56 ;
75893  bool __cil_tmp57 ;
75894  unsigned long __cil_tmp58 ;
75895  unsigned long __cil_tmp59 ;
75896  unsigned long __cil_tmp60 ;
75897  int __cil_tmp61 ;
75898  int __cil_tmp62 ;
75899  long __cil_tmp63 ;
75900  int    __cil_tmp64 ;
75901  int __cil_tmp65 ;
75902  int __cil_tmp66 ;
75903  long __cil_tmp67 ;
75904  struct ttm_lock *__cil_tmp68 ;
75905
75906  {
75907#line 201
75908  __cil_tmp14 = (unsigned long )dev_priv;
75909#line 201
75910  __cil_tmp15 = __cil_tmp14 + 134384;
75911#line 201
75912  vmaster = *((struct vmw_master **)__cil_tmp15);
75913#line 202
75914  bo = (struct ttm_buffer_object *)buf;
75915#line 204
75916  ret = 0;
75917#line 206
75918  if (pin) {
75919#line 207
75920    __cil_tmp16 = & placement;
75921#line 207
75922    __cil_tmp17 = & vmw_vram_ne_placement;
75923#line 207
75924    *__cil_tmp16 = *__cil_tmp17;
75925  } else {
75926#line 209
75927    __cil_tmp18 = & placement;
75928#line 209
75929    __cil_tmp19 = & vmw_vram_placement;
75930#line 209
75931    *__cil_tmp18 = *__cil_tmp19;
75932  }
75933  {
75934#line 210
75935  __cil_tmp20 = (unsigned long )(& placement) + 4;
75936#line 210
75937  __cil_tmp21 = (unsigned long )bo;
75938#line 210
75939  __cil_tmp22 = __cil_tmp21 + 40;
75940#line 210
75941  __cil_tmp23 = *((unsigned long *)__cil_tmp22);
75942#line 210
75943  *((unsigned int *)__cil_tmp20) = (unsigned int )__cil_tmp23;
75944#line 212
75945  __cil_tmp24 = (struct ttm_lock *)vmaster;
75946#line 212
75947  ret = ttm_write_lock(__cil_tmp24, interruptible);
75948#line 213
75949  __cil_tmp25 = ret != 0;
75950#line 213
75951  __cil_tmp26 = ! __cil_tmp25;
75952#line 213
75953  __cil_tmp27 = ! __cil_tmp26;
75954#line 213
75955  __cil_tmp28 = (long )__cil_tmp27;
75956#line 213
75957  tmp___7 = __builtin_expect(__cil_tmp28, 0L);
75958  }
75959#line 213
75960  if (tmp___7) {
75961#line 214
75962    return (ret);
75963  } else {
75964
75965  }
75966#line 216
75967  if (pin) {
75968    {
75969#line 217
75970    __cil_tmp29 = (bool )0;
75971#line 217
75972    __cil_tmp30 = (uint32_t )0;
75973#line 217
75974    vmw_execbuf_release_pinned_bo(dev_priv, __cil_tmp29, __cil_tmp30);
75975    }
75976  } else {
75977
75978  }
75979  {
75980#line 219
75981  __cil_tmp31 = (bool )0;
75982#line 219
75983  __cil_tmp32 = (bool )0;
75984#line 219
75985  __cil_tmp33 = (uint32_t )0;
75986#line 219
75987  ret = ttm_bo_reserve(bo, interruptible, __cil_tmp31, __cil_tmp32, __cil_tmp33);
75988#line 220
75989  __cil_tmp34 = ret != 0;
75990#line 220
75991  __cil_tmp35 = ! __cil_tmp34;
75992#line 220
75993  __cil_tmp36 = ! __cil_tmp35;
75994#line 220
75995  __cil_tmp37 = (long )__cil_tmp36;
75996#line 220
75997  tmp___8 = __builtin_expect(__cil_tmp37, 0L);
75998  }
75999#line 220
76000  if (tmp___8) {
76001#line 221
76002    goto err_unlock;
76003  } else {
76004
76005  }
76006  {
76007#line 224
76008  __cil_tmp38 = 112 + 36;
76009#line 224
76010  __cil_tmp39 = (unsigned long )bo;
76011#line 224
76012  __cil_tmp40 = __cil_tmp39 + __cil_tmp38;
76013#line 224
76014  __cil_tmp41 = *((uint32_t *)__cil_tmp40);
76015#line 224
76016  if (__cil_tmp41 == 2U) {
76017    {
76018#line 224
76019    __cil_tmp42 = (unsigned long )bo;
76020#line 224
76021    __cil_tmp43 = __cil_tmp42 + 40;
76022#line 224
76023    __cil_tmp44 = *((unsigned long *)__cil_tmp43);
76024#line 224
76025    __cil_tmp45 = 112 + 8;
76026#line 224
76027    __cil_tmp46 = (unsigned long )bo;
76028#line 224
76029    __cil_tmp47 = __cil_tmp46 + __cil_tmp45;
76030#line 224
76031    __cil_tmp48 = *((unsigned long *)__cil_tmp47);
76032#line 224
76033    if (__cil_tmp48 < __cil_tmp44) {
76034      {
76035#line 224
76036      __cil_tmp49 = 112 + 8;
76037#line 224
76038      __cil_tmp50 = (unsigned long )bo;
76039#line 224
76040      __cil_tmp51 = __cil_tmp50 + __cil_tmp49;
76041#line 224
76042      __cil_tmp52 = *((unsigned long *)__cil_tmp51);
76043#line 224
76044      if (__cil_tmp52 > 0UL) {
76045        {
76046#line 227
76047        __cil_tmp53 = (bool )0;
76048#line 227
76049        __cil_tmp54 = (bool )0;
76050#line 227
76051        __cil_tmp55 = (bool )0;
76052#line 227
76053        ttm_bo_validate(bo, & vmw_sys_placement, __cil_tmp53, __cil_tmp54, __cil_tmp55);
76054        }
76055      } else {
76056
76057      }
76058      }
76059    } else {
76060
76061    }
76062    }
76063  } else {
76064
76065  }
76066  }
76067  {
76068#line 230
76069  __cil_tmp56 = (bool )0;
76070#line 230
76071  __cil_tmp57 = (bool )0;
76072#line 230
76073  ret = ttm_bo_validate(bo, & placement, interruptible, __cil_tmp56, __cil_tmp57);
76074  }
76075#line 233
76076  if (ret == 0) {
76077    {
76078#line 233
76079    __cil_tmp58 = (unsigned long )bo;
76080#line 233
76081    __cil_tmp59 = __cil_tmp58 + 368;
76082#line 233
76083    __cil_tmp60 = *((unsigned long *)__cil_tmp59);
76084#line 233
76085    if (__cil_tmp60 != 0UL) {
76086#line 233
76087      tmp___9 = 1;
76088    } else {
76089#line 233
76090      tmp___9 = 0;
76091    }
76092    }
76093  } else {
76094#line 233
76095    tmp___9 = 0;
76096  }
76097  {
76098#line 233
76099  __ret_warn_on = tmp___9;
76100#line 233
76101  __cil_tmp61 = ! __ret_warn_on;
76102#line 233
76103  __cil_tmp62 = ! __cil_tmp61;
76104#line 233
76105  __cil_tmp63 = (long )__cil_tmp62;
76106#line 233
76107  tmp___10 = __builtin_expect(__cil_tmp63, 0L);
76108  }
76109#line 233
76110  if (tmp___10) {
76111    {
76112#line 233
76113    __cil_tmp64 = (int    )233;
76114#line 233
76115    warn_slowpath_null("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c",
76116                       __cil_tmp64);
76117    }
76118  } else {
76119
76120  }
76121  {
76122#line 233
76123  __cil_tmp65 = ! __ret_warn_on;
76124#line 233
76125  __cil_tmp66 = ! __cil_tmp65;
76126#line 233
76127  __cil_tmp67 = (long )__cil_tmp66;
76128#line 233
76129  __builtin_expect(__cil_tmp67, 0L);
76130#line 235
76131  ttm_bo_unreserve(bo);
76132  }
76133  err_unlock: 
76134  {
76135#line 237
76136  __cil_tmp68 = (struct ttm_lock *)vmaster;
76137#line 237
76138  ttm_write_unlock(__cil_tmp68);
76139  }
76140#line 239
76141  return (ret);
76142}
76143}
76144#line 257 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
76145int vmw_dmabuf_unpin(struct vmw_private *dev_priv , struct vmw_dma_buffer *buf , bool interruptible ) 
76146{ int tmp___7 ;
76147
76148  {
76149  {
76150#line 266
76151  tmp___7 = vmw_dmabuf_to_placement(dev_priv, buf, & vmw_evictable_placement, interruptible);
76152  }
76153#line 266
76154  return (tmp___7);
76155}
76156}
76157#line 279 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
76158void vmw_bo_get_guest_ptr(struct ttm_buffer_object    *bo , SVGAGuestPtr *ptr ) 
76159{ unsigned long __cil_tmp3 ;
76160  unsigned long __cil_tmp4 ;
76161  unsigned long __cil_tmp5 ;
76162  uint32_t    __cil_tmp6 ;
76163  unsigned long __cil_tmp7 ;
76164  unsigned long __cil_tmp8 ;
76165  unsigned long __cil_tmp9 ;
76166  unsigned long __cil_tmp10 ;
76167  unsigned long    __cil_tmp11 ;
76168  unsigned long __cil_tmp12 ;
76169  unsigned long __cil_tmp13 ;
76170  unsigned long __cil_tmp14 ;
76171  unsigned long    __cil_tmp15 ;
76172  unsigned long __cil_tmp16 ;
76173  unsigned long __cil_tmp17 ;
76174
76175  {
76176  {
76177#line 282
76178  __cil_tmp3 = 112 + 36;
76179#line 282
76180  __cil_tmp4 = (unsigned long )bo;
76181#line 282
76182  __cil_tmp5 = __cil_tmp4 + __cil_tmp3;
76183#line 282
76184  __cil_tmp6 = *((uint32_t    *)__cil_tmp5);
76185#line 282
76186  if (__cil_tmp6 == 2U) {
76187#line 283
76188    *((uint32 *)ptr) = (uint32 )-2;
76189#line 284
76190    __cil_tmp7 = (unsigned long )ptr;
76191#line 284
76192    __cil_tmp8 = __cil_tmp7 + 4;
76193#line 284
76194    __cil_tmp9 = (unsigned long )bo;
76195#line 284
76196    __cil_tmp10 = __cil_tmp9 + 368;
76197#line 284
76198    __cil_tmp11 = *((unsigned long    *)__cil_tmp10);
76199#line 284
76200    *((uint32 *)__cil_tmp8) = (uint32 )__cil_tmp11;
76201  } else {
76202#line 286
76203    __cil_tmp12 = 112 + 8;
76204#line 286
76205    __cil_tmp13 = (unsigned long )bo;
76206#line 286
76207    __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
76208#line 286
76209    __cil_tmp15 = *((unsigned long    *)__cil_tmp14);
76210#line 286
76211    *((uint32 *)ptr) = (uint32 )__cil_tmp15;
76212#line 287
76213    __cil_tmp16 = (unsigned long )ptr;
76214#line 287
76215    __cil_tmp17 = __cil_tmp16 + 4;
76216#line 287
76217    *((uint32 *)__cil_tmp17) = (uint32 )0;
76218  }
76219  }
76220#line 289
76221  return;
76222}
76223}
76224#line 300 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"
76225void vmw_bo_pin(struct ttm_buffer_object *bo , bool pin ) 
76226{ uint32_t pl_flags ;
76227  struct ttm_placement placement ;
76228  uint32_t old_mem_type ;
76229  int ret ;
76230  int tmp___7 ;
76231  int tmp___8 ;
76232  long tmp___9 ;
76233  int tmp___10 ;
76234  long tmp___11 ;
76235  int tmp___12 ;
76236  long tmp___13 ;
76237  unsigned long __cil_tmp14 ;
76238  unsigned long __cil_tmp15 ;
76239  unsigned long __cil_tmp16 ;
76240  unsigned long __cil_tmp17 ;
76241  unsigned long __cil_tmp18 ;
76242  atomic_t *__cil_tmp19 ;
76243  atomic_t    *__cil_tmp20 ;
76244  long __cil_tmp21 ;
76245  int __cil_tmp22 ;
76246  uint32_t __cil_tmp23 ;
76247  long __cil_tmp24 ;
76248  uint32_t *__cil_tmp25 ;
76249  int __cil_tmp26 ;
76250  int __cil_tmp27 ;
76251  int __cil_tmp28 ;
76252  int __cil_tmp29 ;
76253  int __cil_tmp30 ;
76254  uint32_t *__cil_tmp31 ;
76255  int __cil_tmp32 ;
76256  unsigned int __cil_tmp33 ;
76257  uint32_t *__cil_tmp34 ;
76258  uint32_t __cil_tmp35 ;
76259  void *__cil_tmp36 ;
76260  unsigned long __cil_tmp37 ;
76261  unsigned long __cil_tmp38 ;
76262  bool __cil_tmp39 ;
76263  bool __cil_tmp40 ;
76264  bool __cil_tmp41 ;
76265  unsigned long __cil_tmp42 ;
76266  unsigned long __cil_tmp43 ;
76267  unsigned long __cil_tmp44 ;
76268  uint32_t __cil_tmp45 ;
76269  long __cil_tmp46 ;
76270
76271  {
76272#line 304
76273  __cil_tmp14 = 112 + 36;
76274#line 304
76275  __cil_tmp15 = (unsigned long )bo;
76276#line 304
76277  __cil_tmp16 = __cil_tmp15 + __cil_tmp14;
76278#line 304
76279  old_mem_type = *((uint32_t *)__cil_tmp16);
76280  {
76281#line 307
76282  while (1) {
76283    while_continue: /* CIL Label */ ;
76284    {
76285#line 307
76286    __cil_tmp17 = (unsigned long )bo;
76287#line 307
76288    __cil_tmp18 = __cil_tmp17 + 304;
76289#line 307
76290    __cil_tmp19 = (atomic_t *)__cil_tmp18;
76291#line 307
76292    __cil_tmp20 = (atomic_t    *)__cil_tmp19;
76293#line 307
76294    tmp___7 = atomic_read(__cil_tmp20);
76295    }
76296#line 307
76297    if (tmp___7) {
76298#line 307
76299      tmp___8 = 0;
76300    } else {
76301#line 307
76302      tmp___8 = 1;
76303    }
76304    {
76305#line 307
76306    __cil_tmp21 = (long )tmp___8;
76307#line 307
76308    tmp___9 = __builtin_expect(__cil_tmp21, 0L);
76309    }
76310#line 307
76311    if (tmp___9) {
76312      {
76313#line 307
76314      while (1) {
76315        while_continue___0: /* CIL Label */ ;
76316#line 307
76317        __asm__  volatile   ("1:\tud2\n"
76318                             ".pushsection __bug_table,\"a\"\n"
76319                             "2:\t.long 1b - 2b, %c0 - 2b\n"
76320                             "\t.word %c1, 0\n"
76321                             "\t.org 2b+%c2\n"
76322                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"),
76323                             "i" (307), "i" (12UL));
76324        {
76325#line 307
76326        while (1) {
76327          while_continue___1: /* CIL Label */ ;
76328        }
76329        while_break___1: /* CIL Label */ ;
76330        }
76331#line 307
76332        goto while_break___0;
76333      }
76334      while_break___0: /* CIL Label */ ;
76335      }
76336    } else {
76337
76338    }
76339#line 307
76340    goto while_break;
76341  }
76342  while_break: /* CIL Label */ ;
76343  }
76344  {
76345#line 308
76346  while (1) {
76347    while_continue___2: /* CIL Label */ ;
76348#line 308
76349    if (old_mem_type != 2U) {
76350      {
76351#line 308
76352      __cil_tmp22 = 1 << 3;
76353#line 308
76354      __cil_tmp23 = (uint32_t )__cil_tmp22;
76355#line 308
76356      if (old_mem_type != __cil_tmp23) {
76357#line 308
76358        tmp___10 = 1;
76359      } else {
76360#line 308
76361        tmp___10 = 0;
76362      }
76363      }
76364    } else {
76365#line 308
76366      tmp___10 = 0;
76367    }
76368    {
76369#line 308
76370    __cil_tmp24 = (long )tmp___10;
76371#line 308
76372    tmp___11 = __builtin_expect(__cil_tmp24, 0L);
76373    }
76374#line 308
76375    if (tmp___11) {
76376      {
76377#line 308
76378      while (1) {
76379        while_continue___3: /* CIL Label */ ;
76380#line 308
76381        __asm__  volatile   ("1:\tud2\n"
76382                             ".pushsection __bug_table,\"a\"\n"
76383                             "2:\t.long 1b - 2b, %c0 - 2b\n"
76384                             "\t.word %c1, 0\n"
76385                             "\t.org 2b+%c2\n"
76386                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"),
76387                             "i" (309), "i" (12UL));
76388        {
76389#line 308
76390        while (1) {
76391          while_continue___4: /* CIL Label */ ;
76392        }
76393        while_break___4: /* CIL Label */ ;
76394        }
76395#line 308
76396        goto while_break___3;
76397      }
76398      while_break___3: /* CIL Label */ ;
76399      }
76400    } else {
76401
76402    }
76403#line 308
76404    goto while_break___2;
76405  }
76406  while_break___2: /* CIL Label */ ;
76407  }
76408#line 311
76409  __cil_tmp25 = & pl_flags;
76410#line 311
76411  __cil_tmp26 = 1 << 16;
76412#line 311
76413  __cil_tmp27 = 1 << 3;
76414#line 311
76415  __cil_tmp28 = 1 << 2;
76416#line 311
76417  __cil_tmp29 = __cil_tmp28 | __cil_tmp27;
76418#line 311
76419  __cil_tmp30 = __cil_tmp29 | __cil_tmp26;
76420#line 311
76421  *__cil_tmp25 = (uint32_t )__cil_tmp30;
76422#line 312
76423  if (pin) {
76424#line 313
76425    __cil_tmp31 = & pl_flags;
76426#line 313
76427    __cil_tmp32 = 1 << 21;
76428#line 313
76429    __cil_tmp33 = (unsigned int )__cil_tmp32;
76430#line 313
76431    __cil_tmp34 = & pl_flags;
76432#line 313
76433    __cil_tmp35 = *__cil_tmp34;
76434#line 313
76435    *__cil_tmp31 = __cil_tmp35 | __cil_tmp33;
76436  } else {
76437
76438  }
76439  {
76440#line 315
76441  __cil_tmp36 = (void *)(& placement);
76442#line 315
76443  memset(__cil_tmp36, 0, 40UL);
76444#line 316
76445  __cil_tmp37 = (unsigned long )(& placement) + 8;
76446#line 316
76447  *((unsigned int *)__cil_tmp37) = 1U;
76448#line 317
76449  __cil_tmp38 = (unsigned long )(& placement) + 16;
76450#line 317
76451  *((uint32_t    **)__cil_tmp38) = (uint32_t    *)(& pl_flags);
76452#line 319
76453  __cil_tmp39 = (bool )0;
76454#line 319
76455  __cil_tmp40 = (bool )1;
76456#line 319
76457  __cil_tmp41 = (bool )1;
76458#line 319
76459  ret = ttm_bo_validate(bo, & placement, __cil_tmp39, __cil_tmp40, __cil_tmp41);
76460  }
76461  {
76462#line 321
76463  while (1) {
76464    while_continue___5: /* CIL Label */ ;
76465#line 321
76466    if (ret != 0) {
76467#line 321
76468      tmp___12 = 1;
76469    } else {
76470      {
76471#line 321
76472      __cil_tmp42 = 112 + 36;
76473#line 321
76474      __cil_tmp43 = (unsigned long )bo;
76475#line 321
76476      __cil_tmp44 = __cil_tmp43 + __cil_tmp42;
76477#line 321
76478      __cil_tmp45 = *((uint32_t *)__cil_tmp44);
76479#line 321
76480      if (__cil_tmp45 != old_mem_type) {
76481#line 321
76482        tmp___12 = 1;
76483      } else {
76484#line 321
76485        tmp___12 = 0;
76486      }
76487      }
76488    }
76489    {
76490#line 321
76491    __cil_tmp46 = (long )tmp___12;
76492#line 321
76493    tmp___13 = __builtin_expect(__cil_tmp46, 0L);
76494    }
76495#line 321
76496    if (tmp___13) {
76497      {
76498#line 321
76499      while (1) {
76500        while_continue___6: /* CIL Label */ ;
76501#line 321
76502        __asm__  volatile   ("1:\tud2\n"
76503                             ".pushsection __bug_table,\"a\"\n"
76504                             "2:\t.long 1b - 2b, %c0 - 2b\n"
76505                             "\t.word %c1, 0\n"
76506                             "\t.org 2b+%c2\n"
76507                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c"),
76508                             "i" (321), "i" (12UL));
76509        {
76510#line 321
76511        while (1) {
76512          while_continue___7: /* CIL Label */ ;
76513        }
76514        while_break___7: /* CIL Label */ ;
76515        }
76516#line 321
76517        goto while_break___6;
76518      }
76519      while_break___6: /* CIL Label */ ;
76520      }
76521    } else {
76522
76523    }
76524#line 321
76525    goto while_break___5;
76526  }
76527  while_break___5: /* CIL Label */ ;
76528  }
76529#line 322
76530  return;
76531}
76532}
76533#line 58 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
76534static void vmw_sou_destroy(struct vmw_screen_object_unit *sou ) 
76535{ struct vmw_display_unit *__cil_tmp2 ;
76536  void    *__cil_tmp3 ;
76537
76538  {
76539  {
76540#line 60
76541  __cil_tmp2 = (struct vmw_display_unit *)sou;
76542#line 60
76543  vmw_display_unit_cleanup(__cil_tmp2);
76544#line 61
76545  __cil_tmp3 = (void    *)sou;
76546#line 61
76547  kfree(__cil_tmp3);
76548  }
76549#line 62
76550  return;
76551}
76552}
76553#line 69 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
76554static void vmw_sou_crtc_destroy(struct drm_crtc *crtc ) 
76555{ struct drm_crtc    *__mptr ;
76556  struct vmw_screen_object_unit *__cil_tmp3 ;
76557  struct drm_crtc *__cil_tmp4 ;
76558  unsigned int __cil_tmp5 ;
76559  char *__cil_tmp6 ;
76560  char *__cil_tmp7 ;
76561  struct vmw_screen_object_unit *__cil_tmp8 ;
76562
76563  {
76564  {
76565#line 71
76566  __mptr = (struct drm_crtc    *)crtc;
76567#line 71
76568  __cil_tmp3 = (struct vmw_screen_object_unit *)0;
76569#line 71
76570  __cil_tmp4 = (struct drm_crtc *)__cil_tmp3;
76571#line 71
76572  __cil_tmp5 = (unsigned int )__cil_tmp4;
76573#line 71
76574  __cil_tmp6 = (char *)__mptr;
76575#line 71
76576  __cil_tmp7 = __cil_tmp6 - __cil_tmp5;
76577#line 71
76578  __cil_tmp8 = (struct vmw_screen_object_unit *)__cil_tmp7;
76579#line 71
76580  vmw_sou_destroy(__cil_tmp8);
76581  }
76582#line 72
76583  return;
76584}
76585}
76586#line 74 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
76587static void vmw_sou_del_active(struct vmw_private *vmw_priv___0 , struct vmw_screen_object_unit *sou ) 
76588{ struct vmw_screen_object_display *ld ;
76589  unsigned long __cil_tmp4 ;
76590  unsigned long __cil_tmp5 ;
76591  unsigned long __cil_tmp6 ;
76592  unsigned long __cil_tmp7 ;
76593  unsigned int __cil_tmp8 ;
76594  unsigned int __cil_tmp9 ;
76595  unsigned long __cil_tmp10 ;
76596  unsigned long __cil_tmp11 ;
76597  void *__cil_tmp12 ;
76598  unsigned long __cil_tmp13 ;
76599  unsigned long __cil_tmp14 ;
76600
76601  {
76602#line 77
76603  __cil_tmp4 = (unsigned long )vmw_priv___0;
76604#line 77
76605  __cil_tmp5 = __cil_tmp4 + 2616;
76606#line 77
76607  ld = *((struct vmw_screen_object_display **)__cil_tmp5);
76608  {
76609#line 79
76610  __cil_tmp6 = (unsigned long )sou;
76611#line 79
76612  __cil_tmp7 = __cil_tmp6 + 2089;
76613#line 79
76614  if (*((bool *)__cil_tmp7)) {
76615#line 80
76616    __cil_tmp8 = *((unsigned int *)ld);
76617#line 80
76618    *((unsigned int *)ld) = __cil_tmp8 - 1U;
76619    {
76620#line 80
76621    __cil_tmp9 = *((unsigned int *)ld);
76622#line 80
76623    if (__cil_tmp9 == 0U) {
76624#line 81
76625      __cil_tmp10 = (unsigned long )ld;
76626#line 81
76627      __cil_tmp11 = __cil_tmp10 + 8;
76628#line 81
76629      __cil_tmp12 = (void *)0;
76630#line 81
76631      *((struct vmw_framebuffer **)__cil_tmp11) = (struct vmw_framebuffer *)__cil_tmp12;
76632    } else {
76633
76634    }
76635    }
76636#line 82
76637    __cil_tmp13 = (unsigned long )sou;
76638#line 82
76639    __cil_tmp14 = __cil_tmp13 + 2089;
76640#line 82
76641    *((bool *)__cil_tmp14) = (bool )0;
76642  } else {
76643
76644  }
76645  }
76646#line 84
76647  return;
76648}
76649}
76650#line 86 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
76651static void vmw_sou_add_active(struct vmw_private *vmw_priv___0 , struct vmw_screen_object_unit *sou ,
76652                               struct vmw_framebuffer *vfb ) 
76653{ struct vmw_screen_object_display *ld ;
76654  int tmp___7 ;
76655  long tmp___8 ;
76656  unsigned long __cil_tmp7 ;
76657  unsigned long __cil_tmp8 ;
76658  unsigned int __cil_tmp9 ;
76659  unsigned long __cil_tmp10 ;
76660  unsigned long __cil_tmp11 ;
76661  long __cil_tmp12 ;
76662  unsigned long __cil_tmp13 ;
76663  unsigned long __cil_tmp14 ;
76664  bool __cil_tmp15 ;
76665  unsigned long __cil_tmp16 ;
76666  unsigned long __cil_tmp17 ;
76667  unsigned long __cil_tmp18 ;
76668  unsigned long __cil_tmp19 ;
76669  unsigned long __cil_tmp20 ;
76670  unsigned long __cil_tmp21 ;
76671  unsigned long __cil_tmp22 ;
76672  unsigned int __cil_tmp23 ;
76673
76674  {
76675#line 90
76676  __cil_tmp7 = (unsigned long )vmw_priv___0;
76677#line 90
76678  __cil_tmp8 = __cil_tmp7 + 2616;
76679#line 90
76680  ld = *((struct vmw_screen_object_display **)__cil_tmp8);
76681  {
76682#line 92
76683  while (1) {
76684    while_continue: /* CIL Label */ ;
76685    {
76686#line 92
76687    __cil_tmp9 = *((unsigned int *)ld);
76688#line 92
76689    if (! __cil_tmp9) {
76690      {
76691#line 92
76692      __cil_tmp10 = (unsigned long )ld;
76693#line 92
76694      __cil_tmp11 = __cil_tmp10 + 8;
76695#line 92
76696      if (*((struct vmw_framebuffer **)__cil_tmp11)) {
76697#line 92
76698        tmp___7 = 1;
76699      } else {
76700#line 92
76701        tmp___7 = 0;
76702      }
76703      }
76704    } else {
76705#line 92
76706      tmp___7 = 0;
76707    }
76708    }
76709    {
76710#line 92
76711    __cil_tmp12 = (long )tmp___7;
76712#line 92
76713    tmp___8 = __builtin_expect(__cil_tmp12, 0L);
76714    }
76715#line 92
76716    if (tmp___8) {
76717      {
76718#line 92
76719      while (1) {
76720        while_continue___0: /* CIL Label */ ;
76721#line 92
76722        __asm__  volatile   ("1:\tud2\n"
76723                             ".pushsection __bug_table,\"a\"\n"
76724                             "2:\t.long 1b - 2b, %c0 - 2b\n"
76725                             "\t.word %c1, 0\n"
76726                             "\t.org 2b+%c2\n"
76727                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"),
76728                             "i" (92), "i" (12UL));
76729        {
76730#line 92
76731        while (1) {
76732          while_continue___1: /* CIL Label */ ;
76733        }
76734        while_break___1: /* CIL Label */ ;
76735        }
76736#line 92
76737        goto while_break___0;
76738      }
76739      while_break___0: /* CIL Label */ ;
76740      }
76741    } else {
76742
76743    }
76744#line 92
76745    goto while_break;
76746  }
76747  while_break: /* CIL Label */ ;
76748  }
76749  {
76750#line 94
76751  __cil_tmp13 = (unsigned long )sou;
76752#line 94
76753  __cil_tmp14 = __cil_tmp13 + 2089;
76754#line 94
76755  __cil_tmp15 = *((bool *)__cil_tmp14);
76756#line 94
76757  if (! __cil_tmp15) {
76758    {
76759#line 94
76760    __cil_tmp16 = 0 + 2064;
76761#line 94
76762    __cil_tmp17 = (unsigned long )sou;
76763#line 94
76764    __cil_tmp18 = __cil_tmp17 + __cil_tmp16;
76765#line 94
76766    if (*((bool *)__cil_tmp18)) {
76767#line 95
76768      __cil_tmp19 = (unsigned long )ld;
76769#line 95
76770      __cil_tmp20 = __cil_tmp19 + 8;
76771#line 95
76772      *((struct vmw_framebuffer **)__cil_tmp20) = vfb;
76773#line 96
76774      __cil_tmp21 = (unsigned long )sou;
76775#line 96
76776      __cil_tmp22 = __cil_tmp21 + 2089;
76777#line 96
76778      *((bool *)__cil_tmp22) = (bool )1;
76779#line 97
76780      __cil_tmp23 = *((unsigned int *)ld);
76781#line 97
76782      *((unsigned int *)ld) = __cil_tmp23 + 1U;
76783    } else {
76784
76785    }
76786    }
76787  } else {
76788
76789  }
76790  }
76791#line 99
76792  return;
76793}
76794}
76795#line 104 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
76796static int vmw_sou_fifo_create(struct vmw_private *dev_priv , struct vmw_screen_object_unit *sou ,
76797                               uint32_t x , uint32_t y , struct drm_display_mode *mode ) 
76798{ size_t fifo_size ;
76799  struct __anonstruct_cmd_429___3 *cmd ;
76800  long tmp___7 ;
76801  void *tmp___8 ;
76802  long tmp___9 ;
76803  int tmp___10 ;
76804  unsigned long __cil_tmp12 ;
76805  unsigned long __cil_tmp13 ;
76806  struct vmw_dma_buffer *__cil_tmp14 ;
76807  int __cil_tmp15 ;
76808  int __cil_tmp16 ;
76809  int __cil_tmp17 ;
76810  long __cil_tmp18 ;
76811  uint32_t __cil_tmp19 ;
76812  void *__cil_tmp20 ;
76813  unsigned long __cil_tmp21 ;
76814  unsigned long __cil_tmp22 ;
76815  int __cil_tmp23 ;
76816  int __cil_tmp24 ;
76817  int __cil_tmp25 ;
76818  long __cil_tmp26 ;
76819  void *__cil_tmp27 ;
76820  unsigned long __cil_tmp28 ;
76821  unsigned long __cil_tmp29 ;
76822  unsigned long __cil_tmp30 ;
76823  unsigned long __cil_tmp31 ;
76824  unsigned long __cil_tmp32 ;
76825  unsigned long __cil_tmp33 ;
76826  unsigned long __cil_tmp34 ;
76827  unsigned long __cil_tmp35 ;
76828  unsigned long __cil_tmp36 ;
76829  unsigned long __cil_tmp37 ;
76830  unsigned long __cil_tmp38 ;
76831  unsigned int __cil_tmp39 ;
76832  unsigned long __cil_tmp40 ;
76833  unsigned long __cil_tmp41 ;
76834  unsigned long __cil_tmp42 ;
76835  int __cil_tmp43 ;
76836  unsigned long __cil_tmp44 ;
76837  unsigned long __cil_tmp45 ;
76838  unsigned long __cil_tmp46 ;
76839  unsigned long __cil_tmp47 ;
76840  unsigned long __cil_tmp48 ;
76841  int __cil_tmp49 ;
76842  unsigned long __cil_tmp50 ;
76843  unsigned long __cil_tmp51 ;
76844  unsigned long __cil_tmp52 ;
76845  unsigned long __cil_tmp53 ;
76846  unsigned long __cil_tmp54 ;
76847  unsigned long __cil_tmp55 ;
76848  int __cil_tmp56 ;
76849  unsigned long __cil_tmp57 ;
76850  unsigned long __cil_tmp58 ;
76851  unsigned long __cil_tmp59 ;
76852  unsigned long __cil_tmp60 ;
76853  unsigned long __cil_tmp61 ;
76854  unsigned long __cil_tmp62 ;
76855  unsigned long __cil_tmp63 ;
76856  unsigned long __cil_tmp64 ;
76857  unsigned long __cil_tmp65 ;
76858  unsigned long __cil_tmp66 ;
76859  unsigned long __cil_tmp67 ;
76860  unsigned long __cil_tmp68 ;
76861  unsigned long __cil_tmp69 ;
76862  unsigned long __cil_tmp70 ;
76863  unsigned long __cil_tmp71 ;
76864  unsigned long __cil_tmp72 ;
76865  unsigned long __cil_tmp73 ;
76866  unsigned long __cil_tmp74 ;
76867  unsigned long __cil_tmp75 ;
76868  unsigned long __cil_tmp76 ;
76869  unsigned long __cil_tmp77 ;
76870  unsigned long __cil_tmp78 ;
76871  unsigned long __cil_tmp79 ;
76872  unsigned long __cil_tmp80 ;
76873  unsigned long __cil_tmp81 ;
76874  struct vmw_dma_buffer *__cil_tmp82 ;
76875  struct ttm_buffer_object *__cil_tmp83 ;
76876  struct ttm_buffer_object    *__cil_tmp84 ;
76877  unsigned long __cil_tmp85 ;
76878  unsigned long __cil_tmp86 ;
76879  unsigned long __cil_tmp87 ;
76880  SVGAGuestPtr *__cil_tmp88 ;
76881  unsigned long __cil_tmp89 ;
76882  unsigned long __cil_tmp90 ;
76883  unsigned long __cil_tmp91 ;
76884  unsigned long __cil_tmp92 ;
76885  unsigned long __cil_tmp93 ;
76886  unsigned long __cil_tmp94 ;
76887  int __cil_tmp95 ;
76888  int __cil_tmp96 ;
76889  uint32_t __cil_tmp97 ;
76890  unsigned long __cil_tmp98 ;
76891  unsigned long __cil_tmp99 ;
76892
76893  {
76894  {
76895#line 118
76896  while (1) {
76897    while_continue: /* CIL Label */ ;
76898    {
76899#line 118
76900    __cil_tmp12 = (unsigned long )sou;
76901#line 118
76902    __cil_tmp13 = __cil_tmp12 + 2080;
76903#line 118
76904    __cil_tmp14 = *((struct vmw_dma_buffer **)__cil_tmp13);
76905#line 118
76906    __cil_tmp15 = ! __cil_tmp14;
76907#line 118
76908    __cil_tmp16 = ! __cil_tmp15;
76909#line 118
76910    __cil_tmp17 = ! __cil_tmp16;
76911#line 118
76912    __cil_tmp18 = (long )__cil_tmp17;
76913#line 118
76914    tmp___7 = __builtin_expect(__cil_tmp18, 0L);
76915    }
76916#line 118
76917    if (tmp___7) {
76918      {
76919#line 118
76920      while (1) {
76921        while_continue___0: /* CIL Label */ ;
76922#line 118
76923        __asm__  volatile   ("1:\tud2\n"
76924                             ".pushsection __bug_table,\"a\"\n"
76925                             "2:\t.long 1b - 2b, %c0 - 2b\n"
76926                             "\t.word %c1, 0\n"
76927                             "\t.org 2b+%c2\n"
76928                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"),
76929                             "i" (118), "i" (12UL));
76930        {
76931#line 118
76932        while (1) {
76933          while_continue___1: /* CIL Label */ ;
76934        }
76935        while_break___1: /* CIL Label */ ;
76936        }
76937#line 118
76938        goto while_break___0;
76939      }
76940      while_break___0: /* CIL Label */ ;
76941      }
76942    } else {
76943
76944    }
76945#line 118
76946    goto while_break;
76947  }
76948  while_break: /* CIL Label */ ;
76949  }
76950  {
76951#line 120
76952  fifo_size = 48UL;
76953#line 121
76954  __cil_tmp19 = (uint32_t )fifo_size;
76955#line 121
76956  tmp___8 = vmw_fifo_reserve(dev_priv, __cil_tmp19);
76957#line 121
76958  cmd = (struct __anonstruct_cmd_429___3 *)tmp___8;
76959#line 123
76960  __cil_tmp20 = (void *)0;
76961#line 123
76962  __cil_tmp21 = (unsigned long )__cil_tmp20;
76963#line 123
76964  __cil_tmp22 = (unsigned long )cmd;
76965#line 123
76966  __cil_tmp23 = __cil_tmp22 == __cil_tmp21;
76967#line 123
76968  __cil_tmp24 = ! __cil_tmp23;
76969#line 123
76970  __cil_tmp25 = ! __cil_tmp24;
76971#line 123
76972  __cil_tmp26 = (long )__cil_tmp25;
76973#line 123
76974  tmp___9 = __builtin_expect(__cil_tmp26, 0L);
76975  }
76976#line 123
76977  if (tmp___9) {
76978    {
76979#line 124
76980    drm_err("vmw_sou_fifo_create", "Fifo reserve failed.\n");
76981    }
76982#line 125
76983    return (-12);
76984  } else {
76985
76986  }
76987  {
76988#line 128
76989  __cil_tmp27 = (void *)cmd;
76990#line 128
76991  memset(__cil_tmp27, 0, fifo_size);
76992#line 129
76993  *((uint32_t *)cmd) = (uint32_t )34;
76994#line 130
76995  __cil_tmp28 = (unsigned long )cmd;
76996#line 130
76997  __cil_tmp29 = __cil_tmp28 + 4;
76998#line 130
76999  *((uint32 *)__cil_tmp29) = (uint32 )44UL;
77000#line 131
77001  __cil_tmp30 = 4 + 4;
77002#line 131
77003  __cil_tmp31 = (unsigned long )cmd;
77004#line 131
77005  __cil_tmp32 = __cil_tmp31 + __cil_tmp30;
77006#line 131
77007  __cil_tmp33 = 0 + 2032;
77008#line 131
77009  __cil_tmp34 = (unsigned long )sou;
77010#line 131
77011  __cil_tmp35 = __cil_tmp34 + __cil_tmp33;
77012#line 131
77013  *((uint32 *)__cil_tmp32) = *((unsigned int *)__cil_tmp35);
77014  }
77015  {
77016#line 132
77017  __cil_tmp36 = 0 + 2032;
77018#line 132
77019  __cil_tmp37 = (unsigned long )sou;
77020#line 132
77021  __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
77022#line 132
77023  __cil_tmp39 = *((unsigned int *)__cil_tmp38);
77024#line 132
77025  if (__cil_tmp39 == 0U) {
77026#line 132
77027    tmp___10 = 1 << 1;
77028  } else {
77029#line 132
77030    tmp___10 = 0;
77031  }
77032  }
77033#line 132
77034  __cil_tmp40 = 4 + 8;
77035#line 132
77036  __cil_tmp41 = (unsigned long )cmd;
77037#line 132
77038  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
77039#line 132
77040  __cil_tmp43 = 1 | tmp___10;
77041#line 132
77042  *((uint32 *)__cil_tmp42) = (uint32 )__cil_tmp43;
77043#line 134
77044  __cil_tmp44 = 4 + 12;
77045#line 134
77046  __cil_tmp45 = (unsigned long )cmd;
77047#line 134
77048  __cil_tmp46 = __cil_tmp45 + __cil_tmp44;
77049#line 134
77050  __cil_tmp47 = (unsigned long )mode;
77051#line 134
77052  __cil_tmp48 = __cil_tmp47 + 68;
77053#line 134
77054  __cil_tmp49 = *((int *)__cil_tmp48);
77055#line 134
77056  *((uint32 *)__cil_tmp46) = (uint32 )__cil_tmp49;
77057#line 135
77058  __cil_tmp50 = 12 + 4;
77059#line 135
77060  __cil_tmp51 = 4 + __cil_tmp50;
77061#line 135
77062  __cil_tmp52 = (unsigned long )cmd;
77063#line 135
77064  __cil_tmp53 = __cil_tmp52 + __cil_tmp51;
77065#line 135
77066  __cil_tmp54 = (unsigned long )mode;
77067#line 135
77068  __cil_tmp55 = __cil_tmp54 + 88;
77069#line 135
77070  __cil_tmp56 = *((int *)__cil_tmp55);
77071#line 135
77072  *((uint32 *)__cil_tmp53) = (uint32 )__cil_tmp56;
77073  {
77074#line 136
77075  __cil_tmp57 = 0 + 2064;
77076#line 136
77077  __cil_tmp58 = (unsigned long )sou;
77078#line 136
77079  __cil_tmp59 = __cil_tmp58 + __cil_tmp57;
77080#line 136
77081  if (*((bool *)__cil_tmp59)) {
77082#line 137
77083    __cil_tmp60 = 4 + 20;
77084#line 137
77085    __cil_tmp61 = (unsigned long )cmd;
77086#line 137
77087    __cil_tmp62 = __cil_tmp61 + __cil_tmp60;
77088#line 137
77089    *((int32 *)__cil_tmp62) = (int32 )x;
77090#line 138
77091    __cil_tmp63 = 20 + 4;
77092#line 138
77093    __cil_tmp64 = 4 + __cil_tmp63;
77094#line 138
77095    __cil_tmp65 = (unsigned long )cmd;
77096#line 138
77097    __cil_tmp66 = __cil_tmp65 + __cil_tmp64;
77098#line 138
77099    *((int32 *)__cil_tmp66) = (int32 )y;
77100  } else {
77101#line 140
77102    __cil_tmp67 = 4 + 20;
77103#line 140
77104    __cil_tmp68 = (unsigned long )cmd;
77105#line 140
77106    __cil_tmp69 = __cil_tmp68 + __cil_tmp67;
77107#line 140
77108    __cil_tmp70 = 0 + 2056;
77109#line 140
77110    __cil_tmp71 = (unsigned long )sou;
77111#line 140
77112    __cil_tmp72 = __cil_tmp71 + __cil_tmp70;
77113#line 140
77114    *((int32 *)__cil_tmp69) = *((int *)__cil_tmp72);
77115#line 141
77116    __cil_tmp73 = 20 + 4;
77117#line 141
77118    __cil_tmp74 = 4 + __cil_tmp73;
77119#line 141
77120    __cil_tmp75 = (unsigned long )cmd;
77121#line 141
77122    __cil_tmp76 = __cil_tmp75 + __cil_tmp74;
77123#line 141
77124    __cil_tmp77 = 0 + 2060;
77125#line 141
77126    __cil_tmp78 = (unsigned long )sou;
77127#line 141
77128    __cil_tmp79 = __cil_tmp78 + __cil_tmp77;
77129#line 141
77130    *((int32 *)__cil_tmp76) = *((int *)__cil_tmp79);
77131  }
77132  }
77133  {
77134#line 145
77135  __cil_tmp80 = (unsigned long )sou;
77136#line 145
77137  __cil_tmp81 = __cil_tmp80 + 2080;
77138#line 145
77139  __cil_tmp82 = *((struct vmw_dma_buffer **)__cil_tmp81);
77140#line 145
77141  __cil_tmp83 = (struct ttm_buffer_object *)__cil_tmp82;
77142#line 145
77143  __cil_tmp84 = (struct ttm_buffer_object    *)__cil_tmp83;
77144#line 145
77145  __cil_tmp85 = 4 + 28;
77146#line 145
77147  __cil_tmp86 = (unsigned long )cmd;
77148#line 145
77149  __cil_tmp87 = __cil_tmp86 + __cil_tmp85;
77150#line 145
77151  __cil_tmp88 = (SVGAGuestPtr *)__cil_tmp87;
77152#line 145
77153  vmw_bo_get_guest_ptr(__cil_tmp84, __cil_tmp88);
77154#line 146
77155  __cil_tmp89 = 28 + 8;
77156#line 146
77157  __cil_tmp90 = 4 + __cil_tmp89;
77158#line 146
77159  __cil_tmp91 = (unsigned long )cmd;
77160#line 146
77161  __cil_tmp92 = __cil_tmp91 + __cil_tmp90;
77162#line 146
77163  __cil_tmp93 = (unsigned long )mode;
77164#line 146
77165  __cil_tmp94 = __cil_tmp93 + 68;
77166#line 146
77167  __cil_tmp95 = *((int *)__cil_tmp94);
77168#line 146
77169  __cil_tmp96 = __cil_tmp95 * 4;
77170#line 146
77171  *((uint32 *)__cil_tmp92) = (uint32 )__cil_tmp96;
77172#line 148
77173  __cil_tmp97 = (uint32_t )fifo_size;
77174#line 148
77175  vmw_fifo_commit(dev_priv, __cil_tmp97);
77176#line 150
77177  __cil_tmp98 = (unsigned long )sou;
77178#line 150
77179  __cil_tmp99 = __cil_tmp98 + 2088;
77180#line 150
77181  *((bool *)__cil_tmp99) = (bool )1;
77182  }
77183#line 152
77184  return (0);
77185}
77186}
77187#line 158 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
77188static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv , struct vmw_screen_object_unit *sou ) 
77189{ size_t fifo_size ;
77190  int ret ;
77191  struct __anonstruct_cmd_431___0 *cmd ;
77192  long tmp___7 ;
77193  void *tmp___8 ;
77194  long tmp___9 ;
77195  long tmp___10 ;
77196  unsigned long __cil_tmp10 ;
77197  unsigned long __cil_tmp11 ;
77198  bool __cil_tmp12 ;
77199  int __cil_tmp13 ;
77200  int __cil_tmp14 ;
77201  int __cil_tmp15 ;
77202  long __cil_tmp16 ;
77203  uint32_t __cil_tmp17 ;
77204  void *__cil_tmp18 ;
77205  unsigned long __cil_tmp19 ;
77206  unsigned long __cil_tmp20 ;
77207  int __cil_tmp21 ;
77208  int __cil_tmp22 ;
77209  int __cil_tmp23 ;
77210  long __cil_tmp24 ;
77211  void *__cil_tmp25 ;
77212  unsigned long __cil_tmp26 ;
77213  unsigned long __cil_tmp27 ;
77214  unsigned long __cil_tmp28 ;
77215  unsigned long __cil_tmp29 ;
77216  unsigned long __cil_tmp30 ;
77217  uint32_t __cil_tmp31 ;
77218  bool __cil_tmp32 ;
77219  bool __cil_tmp33 ;
77220  uint32_t __cil_tmp34 ;
77221  bool __cil_tmp35 ;
77222  int __cil_tmp36 ;
77223  int __cil_tmp37 ;
77224  int __cil_tmp38 ;
77225  long __cil_tmp39 ;
77226  unsigned long __cil_tmp40 ;
77227  unsigned long __cil_tmp41 ;
77228
77229  {
77230  {
77231#line 172
77232  __cil_tmp10 = (unsigned long )sou;
77233#line 172
77234  __cil_tmp11 = __cil_tmp10 + 2088;
77235#line 172
77236  __cil_tmp12 = *((bool *)__cil_tmp11);
77237#line 172
77238  __cil_tmp13 = ! __cil_tmp12;
77239#line 172
77240  __cil_tmp14 = ! __cil_tmp13;
77241#line 172
77242  __cil_tmp15 = ! __cil_tmp14;
77243#line 172
77244  __cil_tmp16 = (long )__cil_tmp15;
77245#line 172
77246  tmp___7 = __builtin_expect(__cil_tmp16, 0L);
77247  }
77248#line 172
77249  if (tmp___7) {
77250#line 173
77251    return (0);
77252  } else {
77253
77254  }
77255  {
77256#line 175
77257  fifo_size = 8UL;
77258#line 176
77259  __cil_tmp17 = (uint32_t )fifo_size;
77260#line 176
77261  tmp___8 = vmw_fifo_reserve(dev_priv, __cil_tmp17);
77262#line 176
77263  cmd = (struct __anonstruct_cmd_431___0 *)tmp___8;
77264#line 178
77265  __cil_tmp18 = (void *)0;
77266#line 178
77267  __cil_tmp19 = (unsigned long )__cil_tmp18;
77268#line 178
77269  __cil_tmp20 = (unsigned long )cmd;
77270#line 178
77271  __cil_tmp21 = __cil_tmp20 == __cil_tmp19;
77272#line 178
77273  __cil_tmp22 = ! __cil_tmp21;
77274#line 178
77275  __cil_tmp23 = ! __cil_tmp22;
77276#line 178
77277  __cil_tmp24 = (long )__cil_tmp23;
77278#line 178
77279  tmp___9 = __builtin_expect(__cil_tmp24, 0L);
77280  }
77281#line 178
77282  if (tmp___9) {
77283    {
77284#line 179
77285    drm_err("vmw_sou_fifo_destroy", "Fifo reserve failed.\n");
77286    }
77287#line 180
77288    return (-12);
77289  } else {
77290
77291  }
77292  {
77293#line 183
77294  __cil_tmp25 = (void *)cmd;
77295#line 183
77296  memset(__cil_tmp25, 0, fifo_size);
77297#line 184
77298  *((uint32_t *)cmd) = (uint32_t )35;
77299#line 185
77300  __cil_tmp26 = (unsigned long )cmd;
77301#line 185
77302  __cil_tmp27 = __cil_tmp26 + 4;
77303#line 185
77304  __cil_tmp28 = 0 + 2032;
77305#line 185
77306  __cil_tmp29 = (unsigned long )sou;
77307#line 185
77308  __cil_tmp30 = __cil_tmp29 + __cil_tmp28;
77309#line 185
77310  *((uint32 *)__cil_tmp27) = *((unsigned int *)__cil_tmp30);
77311#line 187
77312  __cil_tmp31 = (uint32_t )fifo_size;
77313#line 187
77314  vmw_fifo_commit(dev_priv, __cil_tmp31);
77315#line 190
77316  __cil_tmp32 = (bool )0;
77317#line 190
77318  __cil_tmp33 = (bool )1;
77319#line 190
77320  __cil_tmp34 = (uint32_t )0;
77321#line 190
77322  __cil_tmp35 = (bool )0;
77323#line 190
77324  ret = vmw_fallback_wait(dev_priv, __cil_tmp32, __cil_tmp33, __cil_tmp34, __cil_tmp35,
77325                          750UL);
77326#line 191
77327  __cil_tmp36 = ret != 0;
77328#line 191
77329  __cil_tmp37 = ! __cil_tmp36;
77330#line 191
77331  __cil_tmp38 = ! __cil_tmp37;
77332#line 191
77333  __cil_tmp39 = (long )__cil_tmp38;
77334#line 191
77335  tmp___10 = __builtin_expect(__cil_tmp39, 0L);
77336  }
77337#line 191
77338  if (tmp___10) {
77339    {
77340#line 192
77341    drm_err("vmw_sou_fifo_destroy", "Failed to sync with HW");
77342    }
77343  } else {
77344#line 194
77345    __cil_tmp40 = (unsigned long )sou;
77346#line 194
77347    __cil_tmp41 = __cil_tmp40 + 2088;
77348#line 194
77349    *((bool *)__cil_tmp41) = (bool )0;
77350  }
77351#line 196
77352  return (ret);
77353}
77354}
77355#line 202 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
77356static void vmw_sou_backing_free(struct vmw_private *dev_priv , struct vmw_screen_object_unit *sou ) 
77357{ struct ttm_buffer_object *bo ;
77358  long tmp___7 ;
77359  void *__cil_tmp5 ;
77360  unsigned long __cil_tmp6 ;
77361  unsigned long __cil_tmp7 ;
77362  unsigned long __cil_tmp8 ;
77363  struct vmw_dma_buffer *__cil_tmp9 ;
77364  unsigned long __cil_tmp10 ;
77365  int __cil_tmp11 ;
77366  int __cil_tmp12 ;
77367  int __cil_tmp13 ;
77368  long __cil_tmp14 ;
77369  struct ttm_buffer_object **__cil_tmp15 ;
77370  unsigned long __cil_tmp16 ;
77371  unsigned long __cil_tmp17 ;
77372  struct vmw_dma_buffer *__cil_tmp18 ;
77373  unsigned long __cil_tmp19 ;
77374  unsigned long __cil_tmp20 ;
77375  void *__cil_tmp21 ;
77376  unsigned long __cil_tmp22 ;
77377  unsigned long __cil_tmp23 ;
77378
77379  {
77380  {
77381#line 207
77382  __cil_tmp5 = (void *)0;
77383#line 207
77384  __cil_tmp6 = (unsigned long )__cil_tmp5;
77385#line 207
77386  __cil_tmp7 = (unsigned long )sou;
77387#line 207
77388  __cil_tmp8 = __cil_tmp7 + 2080;
77389#line 207
77390  __cil_tmp9 = *((struct vmw_dma_buffer **)__cil_tmp8);
77391#line 207
77392  __cil_tmp10 = (unsigned long )__cil_tmp9;
77393#line 207
77394  __cil_tmp11 = __cil_tmp10 == __cil_tmp6;
77395#line 207
77396  __cil_tmp12 = ! __cil_tmp11;
77397#line 207
77398  __cil_tmp13 = ! __cil_tmp12;
77399#line 207
77400  __cil_tmp14 = (long )__cil_tmp13;
77401#line 207
77402  tmp___7 = __builtin_expect(__cil_tmp14, 0L);
77403  }
77404#line 207
77405  if (tmp___7) {
77406#line 208
77407    return;
77408  } else {
77409
77410  }
77411  {
77412#line 210
77413  __cil_tmp15 = & bo;
77414#line 210
77415  __cil_tmp16 = (unsigned long )sou;
77416#line 210
77417  __cil_tmp17 = __cil_tmp16 + 2080;
77418#line 210
77419  __cil_tmp18 = *((struct vmw_dma_buffer **)__cil_tmp17);
77420#line 210
77421  *__cil_tmp15 = (struct ttm_buffer_object *)__cil_tmp18;
77422#line 211
77423  ttm_bo_unref(& bo);
77424#line 212
77425  __cil_tmp19 = (unsigned long )sou;
77426#line 212
77427  __cil_tmp20 = __cil_tmp19 + 2080;
77428#line 212
77429  __cil_tmp21 = (void *)0;
77430#line 212
77431  *((struct vmw_dma_buffer **)__cil_tmp20) = (struct vmw_dma_buffer *)__cil_tmp21;
77432#line 213
77433  __cil_tmp22 = (unsigned long )sou;
77434#line 213
77435  __cil_tmp23 = __cil_tmp22 + 2072;
77436#line 213
77437  *((unsigned long *)__cil_tmp23) = 0UL;
77438  }
77439#line 214
77440  return;
77441}
77442}
77443#line 219 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
77444static int vmw_sou_backing_alloc(struct vmw_private *dev_priv , struct vmw_screen_object_unit *sou ,
77445                                 unsigned long size ) 
77446{ int ret ;
77447  void *tmp___7 ;
77448  long tmp___8 ;
77449  long tmp___9 ;
77450  unsigned long __cil_tmp8 ;
77451  unsigned long __cil_tmp9 ;
77452  unsigned long __cil_tmp10 ;
77453  unsigned long __cil_tmp11 ;
77454  unsigned long __cil_tmp12 ;
77455  unsigned long __cil_tmp13 ;
77456  unsigned long __cil_tmp14 ;
77457  void *__cil_tmp15 ;
77458  unsigned long __cil_tmp16 ;
77459  unsigned long __cil_tmp17 ;
77460  unsigned long __cil_tmp18 ;
77461  struct vmw_dma_buffer *__cil_tmp19 ;
77462  unsigned long __cil_tmp20 ;
77463  int __cil_tmp21 ;
77464  int __cil_tmp22 ;
77465  int __cil_tmp23 ;
77466  long __cil_tmp24 ;
77467  unsigned long __cil_tmp25 ;
77468  unsigned long __cil_tmp26 ;
77469  struct vmw_dma_buffer *__cil_tmp27 ;
77470  bool __cil_tmp28 ;
77471  int __cil_tmp29 ;
77472  int __cil_tmp30 ;
77473  int __cil_tmp31 ;
77474  long __cil_tmp32 ;
77475  unsigned long __cil_tmp33 ;
77476  unsigned long __cil_tmp34 ;
77477  void *__cil_tmp35 ;
77478  unsigned long __cil_tmp36 ;
77479  unsigned long __cil_tmp37 ;
77480
77481  {
77482  {
77483#line 225
77484  __cil_tmp8 = (unsigned long )sou;
77485#line 225
77486  __cil_tmp9 = __cil_tmp8 + 2072;
77487#line 225
77488  __cil_tmp10 = *((unsigned long *)__cil_tmp9);
77489#line 225
77490  if (__cil_tmp10 == size) {
77491#line 226
77492    return (0);
77493  } else {
77494
77495  }
77496  }
77497  {
77498#line 228
77499  __cil_tmp11 = (unsigned long )sou;
77500#line 228
77501  __cil_tmp12 = __cil_tmp11 + 2080;
77502#line 228
77503  if (*((struct vmw_dma_buffer **)__cil_tmp12)) {
77504    {
77505#line 229
77506    vmw_sou_backing_free(dev_priv, sou);
77507    }
77508  } else {
77509
77510  }
77511  }
77512  {
77513#line 231
77514  tmp___7 = kzalloc(416UL, 208U);
77515#line 231
77516  __cil_tmp13 = (unsigned long )sou;
77517#line 231
77518  __cil_tmp14 = __cil_tmp13 + 2080;
77519#line 231
77520  *((struct vmw_dma_buffer **)__cil_tmp14) = (struct vmw_dma_buffer *)tmp___7;
77521#line 232
77522  __cil_tmp15 = (void *)0;
77523#line 232
77524  __cil_tmp16 = (unsigned long )__cil_tmp15;
77525#line 232
77526  __cil_tmp17 = (unsigned long )sou;
77527#line 232
77528  __cil_tmp18 = __cil_tmp17 + 2080;
77529#line 232
77530  __cil_tmp19 = *((struct vmw_dma_buffer **)__cil_tmp18);
77531#line 232
77532  __cil_tmp20 = (unsigned long )__cil_tmp19;
77533#line 232
77534  __cil_tmp21 = __cil_tmp20 == __cil_tmp16;
77535#line 232
77536  __cil_tmp22 = ! __cil_tmp21;
77537#line 232
77538  __cil_tmp23 = ! __cil_tmp22;
77539#line 232
77540  __cil_tmp24 = (long )__cil_tmp23;
77541#line 232
77542  tmp___8 = __builtin_expect(__cil_tmp24, 0L);
77543  }
77544#line 232
77545  if (tmp___8) {
77546#line 233
77547    return (-12);
77548  } else {
77549
77550  }
77551  {
77552#line 238
77553  vmw_overlay_pause_all(dev_priv);
77554#line 239
77555  __cil_tmp25 = (unsigned long )sou;
77556#line 239
77557  __cil_tmp26 = __cil_tmp25 + 2080;
77558#line 239
77559  __cil_tmp27 = *((struct vmw_dma_buffer **)__cil_tmp26);
77560#line 239
77561  __cil_tmp28 = (bool )0;
77562#line 239
77563  ret = vmw_dmabuf_init(dev_priv, __cil_tmp27, size, & vmw_vram_ne_placement, __cil_tmp28,
77564                        & vmw_dmabuf_bo_free);
77565#line 242
77566  vmw_overlay_resume_all(dev_priv);
77567#line 244
77568  __cil_tmp29 = ret != 0;
77569#line 244
77570  __cil_tmp30 = ! __cil_tmp29;
77571#line 244
77572  __cil_tmp31 = ! __cil_tmp30;
77573#line 244
77574  __cil_tmp32 = (long )__cil_tmp31;
77575#line 244
77576  tmp___9 = __builtin_expect(__cil_tmp32, 0L);
77577  }
77578#line 244
77579  if (tmp___9) {
77580#line 245
77581    __cil_tmp33 = (unsigned long )sou;
77582#line 245
77583    __cil_tmp34 = __cil_tmp33 + 2080;
77584#line 245
77585    __cil_tmp35 = (void *)0;
77586#line 245
77587    *((struct vmw_dma_buffer **)__cil_tmp34) = (struct vmw_dma_buffer *)__cil_tmp35;
77588  } else {
77589#line 247
77590    __cil_tmp36 = (unsigned long )sou;
77591#line 247
77592    __cil_tmp37 = __cil_tmp36 + 2072;
77593#line 247
77594    *((unsigned long *)__cil_tmp37) = size;
77595  }
77596#line 249
77597  return (ret);
77598}
77599}
77600#line 252 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
77601static int vmw_sou_crtc_set_config(struct drm_mode_set *set ) 
77602{ struct vmw_private *dev_priv ;
77603  struct vmw_screen_object_unit *sou ;
77604  struct drm_connector *connector ;
77605  struct drm_display_mode *mode ;
77606  struct drm_encoder *encoder ;
77607  struct vmw_framebuffer *vfb ;
77608  struct drm_framebuffer *fb ;
77609  struct drm_crtc *crtc ;
77610  int ret ;
77611  struct drm_crtc    *__mptr ;
77612  struct drm_framebuffer    *__mptr___0 ;
77613  long tmp___7 ;
77614  long tmp___8 ;
77615  size_t size ;
77616  long tmp___9 ;
77617  long tmp___10 ;
77618  unsigned long __cil_tmp18 ;
77619  unsigned long __cil_tmp19 ;
77620  struct drm_crtc *__cil_tmp20 ;
77621  unsigned long __cil_tmp21 ;
77622  unsigned long __cil_tmp22 ;
77623  struct vmw_screen_object_unit *__cil_tmp23 ;
77624  struct drm_crtc *__cil_tmp24 ;
77625  unsigned int __cil_tmp25 ;
77626  char *__cil_tmp26 ;
77627  char *__cil_tmp27 ;
77628  unsigned long __cil_tmp28 ;
77629  unsigned long __cil_tmp29 ;
77630  unsigned long __cil_tmp30 ;
77631  unsigned long __cil_tmp31 ;
77632  struct drm_framebuffer *__cil_tmp32 ;
77633  struct vmw_framebuffer *__cil_tmp33 ;
77634  struct drm_framebuffer *__cil_tmp34 ;
77635  unsigned int __cil_tmp35 ;
77636  char *__cil_tmp36 ;
77637  char *__cil_tmp37 ;
77638  void *__cil_tmp38 ;
77639  struct drm_device *__cil_tmp39 ;
77640  unsigned long __cil_tmp40 ;
77641  unsigned long __cil_tmp41 ;
77642  size_t __cil_tmp42 ;
77643  unsigned long __cil_tmp43 ;
77644  unsigned long __cil_tmp44 ;
77645  size_t __cil_tmp45 ;
77646  unsigned long __cil_tmp46 ;
77647  unsigned long __cil_tmp47 ;
77648  unsigned long __cil_tmp48 ;
77649  struct drm_connector *__cil_tmp49 ;
77650  unsigned long __cil_tmp50 ;
77651  unsigned long __cil_tmp51 ;
77652  unsigned long __cil_tmp52 ;
77653  struct drm_connector **__cil_tmp53 ;
77654  struct drm_connector **__cil_tmp54 ;
77655  struct drm_connector *__cil_tmp55 ;
77656  unsigned long __cil_tmp56 ;
77657  unsigned long __cil_tmp57 ;
77658  unsigned long __cil_tmp58 ;
77659  struct drm_connector **__cil_tmp59 ;
77660  struct drm_connector **__cil_tmp60 ;
77661  struct drm_connector *__cil_tmp61 ;
77662  unsigned long __cil_tmp62 ;
77663  unsigned long __cil_tmp63 ;
77664  unsigned long __cil_tmp64 ;
77665  struct drm_connector *__cil_tmp65 ;
77666  unsigned long __cil_tmp66 ;
77667  unsigned long __cil_tmp67 ;
77668  unsigned long __cil_tmp68 ;
77669  unsigned long __cil_tmp69 ;
77670  unsigned long __cil_tmp70 ;
77671  struct vmw_screen_object_display *__cil_tmp71 ;
77672  unsigned long __cil_tmp72 ;
77673  unsigned long __cil_tmp73 ;
77674  unsigned long __cil_tmp74 ;
77675  unsigned long __cil_tmp75 ;
77676  struct vmw_screen_object_display *__cil_tmp76 ;
77677  unsigned int __cil_tmp77 ;
77678  unsigned long __cil_tmp78 ;
77679  unsigned long __cil_tmp79 ;
77680  unsigned long __cil_tmp80 ;
77681  unsigned long __cil_tmp81 ;
77682  unsigned long __cil_tmp82 ;
77683  struct vmw_screen_object_display *__cil_tmp83 ;
77684  unsigned long __cil_tmp84 ;
77685  unsigned long __cil_tmp85 ;
77686  struct vmw_framebuffer *__cil_tmp86 ;
77687  unsigned long __cil_tmp87 ;
77688  unsigned long __cil_tmp88 ;
77689  unsigned long __cil_tmp89 ;
77690  unsigned long __cil_tmp90 ;
77691  unsigned long __cil_tmp91 ;
77692  unsigned long __cil_tmp92 ;
77693  unsigned long __cil_tmp93 ;
77694  unsigned long __cil_tmp94 ;
77695  unsigned long __cil_tmp95 ;
77696  size_t __cil_tmp96 ;
77697  unsigned long __cil_tmp97 ;
77698  unsigned long __cil_tmp98 ;
77699  struct drm_display_mode *__cil_tmp99 ;
77700  unsigned long __cil_tmp100 ;
77701  unsigned long __cil_tmp101 ;
77702  struct drm_framebuffer *__cil_tmp102 ;
77703  int __cil_tmp103 ;
77704  int __cil_tmp104 ;
77705  int __cil_tmp105 ;
77706  long __cil_tmp106 ;
77707  unsigned long __cil_tmp107 ;
77708  unsigned long __cil_tmp108 ;
77709  void *__cil_tmp109 ;
77710  unsigned long __cil_tmp110 ;
77711  unsigned long __cil_tmp111 ;
77712  void *__cil_tmp112 ;
77713  unsigned long __cil_tmp113 ;
77714  unsigned long __cil_tmp114 ;
77715  void *__cil_tmp115 ;
77716  unsigned long __cil_tmp116 ;
77717  unsigned long __cil_tmp117 ;
77718  unsigned long __cil_tmp118 ;
77719  unsigned long __cil_tmp119 ;
77720  unsigned long __cil_tmp120 ;
77721  unsigned long __cil_tmp121 ;
77722  unsigned long __cil_tmp122 ;
77723  unsigned long __cil_tmp123 ;
77724  unsigned long __cil_tmp124 ;
77725  unsigned long __cil_tmp125 ;
77726  unsigned int __cil_tmp126 ;
77727  unsigned long __cil_tmp127 ;
77728  unsigned long __cil_tmp128 ;
77729  int __cil_tmp129 ;
77730  uint32_t __cil_tmp130 ;
77731  unsigned long __cil_tmp131 ;
77732  unsigned long __cil_tmp132 ;
77733  uint32_t __cil_tmp133 ;
77734  uint32_t __cil_tmp134 ;
77735  unsigned long __cil_tmp135 ;
77736  unsigned long __cil_tmp136 ;
77737  unsigned int __cil_tmp137 ;
77738  unsigned long __cil_tmp138 ;
77739  unsigned long __cil_tmp139 ;
77740  int __cil_tmp140 ;
77741  uint32_t __cil_tmp141 ;
77742  unsigned long __cil_tmp142 ;
77743  unsigned long __cil_tmp143 ;
77744  uint32_t __cil_tmp144 ;
77745  uint32_t __cil_tmp145 ;
77746  unsigned long __cil_tmp146 ;
77747  unsigned long __cil_tmp147 ;
77748  unsigned long __cil_tmp148 ;
77749  int __cil_tmp149 ;
77750  unsigned long __cil_tmp150 ;
77751  unsigned long __cil_tmp151 ;
77752  int __cil_tmp152 ;
77753  unsigned long __cil_tmp153 ;
77754  unsigned long __cil_tmp154 ;
77755  unsigned long __cil_tmp155 ;
77756  int __cil_tmp156 ;
77757  unsigned long __cil_tmp157 ;
77758  unsigned long __cil_tmp158 ;
77759  int __cil_tmp159 ;
77760  int __cil_tmp160 ;
77761  int __cil_tmp161 ;
77762  int __cil_tmp162 ;
77763  long __cil_tmp163 ;
77764  unsigned long __cil_tmp164 ;
77765  unsigned long __cil_tmp165 ;
77766  struct vmw_dma_buffer *__cil_tmp166 ;
77767  unsigned long __cil_tmp167 ;
77768  unsigned long __cil_tmp168 ;
77769  int __cil_tmp169 ;
77770  unsigned long __cil_tmp170 ;
77771  unsigned long __cil_tmp171 ;
77772  int __cil_tmp172 ;
77773  int __cil_tmp173 ;
77774  int __cil_tmp174 ;
77775  int __cil_tmp175 ;
77776  int __cil_tmp176 ;
77777  int __cil_tmp177 ;
77778  long __cil_tmp178 ;
77779  unsigned long __cil_tmp179 ;
77780  unsigned long __cil_tmp180 ;
77781  uint32_t __cil_tmp181 ;
77782  unsigned long __cil_tmp182 ;
77783  unsigned long __cil_tmp183 ;
77784  uint32_t __cil_tmp184 ;
77785  int __cil_tmp185 ;
77786  int __cil_tmp186 ;
77787  int __cil_tmp187 ;
77788  long __cil_tmp188 ;
77789  unsigned long __cil_tmp189 ;
77790  unsigned long __cil_tmp190 ;
77791  unsigned long __cil_tmp191 ;
77792  unsigned long __cil_tmp192 ;
77793  void *__cil_tmp193 ;
77794  unsigned long __cil_tmp194 ;
77795  unsigned long __cil_tmp195 ;
77796  void *__cil_tmp196 ;
77797  unsigned long __cil_tmp197 ;
77798  unsigned long __cil_tmp198 ;
77799  void *__cil_tmp199 ;
77800  unsigned long __cil_tmp200 ;
77801  unsigned long __cil_tmp201 ;
77802  unsigned long __cil_tmp202 ;
77803  unsigned long __cil_tmp203 ;
77804  unsigned long __cil_tmp204 ;
77805  unsigned long __cil_tmp205 ;
77806  unsigned long __cil_tmp206 ;
77807  unsigned long __cil_tmp207 ;
77808  unsigned long __cil_tmp208 ;
77809  unsigned long __cil_tmp209 ;
77810  unsigned long __cil_tmp210 ;
77811  unsigned long __cil_tmp211 ;
77812  unsigned long __cil_tmp212 ;
77813  unsigned long __cil_tmp213 ;
77814  unsigned long __cil_tmp214 ;
77815  unsigned long __cil_tmp215 ;
77816  uint32_t __cil_tmp216 ;
77817  unsigned long __cil_tmp217 ;
77818  unsigned long __cil_tmp218 ;
77819  unsigned long __cil_tmp219 ;
77820  unsigned long __cil_tmp220 ;
77821  uint32_t __cil_tmp221 ;
77822
77823  {
77824#line 262
77825  ret = 0;
77826#line 264
77827  if (! set) {
77828#line 265
77829    return (-22);
77830  } else {
77831
77832  }
77833  {
77834#line 267
77835  __cil_tmp18 = (unsigned long )set;
77836#line 267
77837  __cil_tmp19 = __cil_tmp18 + 24;
77838#line 267
77839  __cil_tmp20 = *((struct drm_crtc **)__cil_tmp19);
77840#line 267
77841  if (! __cil_tmp20) {
77842#line 268
77843    return (-22);
77844  } else {
77845
77846  }
77847  }
77848#line 271
77849  __cil_tmp21 = (unsigned long )set;
77850#line 271
77851  __cil_tmp22 = __cil_tmp21 + 24;
77852#line 271
77853  crtc = *((struct drm_crtc **)__cil_tmp22);
77854#line 272
77855  __mptr = (struct drm_crtc    *)crtc;
77856#line 272
77857  __cil_tmp23 = (struct vmw_screen_object_unit *)0;
77858#line 272
77859  __cil_tmp24 = (struct drm_crtc *)__cil_tmp23;
77860#line 272
77861  __cil_tmp25 = (unsigned int )__cil_tmp24;
77862#line 272
77863  __cil_tmp26 = (char *)__mptr;
77864#line 272
77865  __cil_tmp27 = __cil_tmp26 - __cil_tmp25;
77866#line 272
77867  sou = (struct vmw_screen_object_unit *)__cil_tmp27;
77868  {
77869#line 273
77870  __cil_tmp28 = (unsigned long )set;
77871#line 273
77872  __cil_tmp29 = __cil_tmp28 + 16;
77873#line 273
77874  if (*((struct drm_framebuffer **)__cil_tmp29)) {
77875#line 273
77876    __cil_tmp30 = (unsigned long )set;
77877#line 273
77878    __cil_tmp31 = __cil_tmp30 + 16;
77879#line 273
77880    __cil_tmp32 = *((struct drm_framebuffer **)__cil_tmp31);
77881#line 273
77882    __mptr___0 = (struct drm_framebuffer    *)__cil_tmp32;
77883#line 273
77884    __cil_tmp33 = (struct vmw_framebuffer *)0;
77885#line 273
77886    __cil_tmp34 = (struct drm_framebuffer *)__cil_tmp33;
77887#line 273
77888    __cil_tmp35 = (unsigned int )__cil_tmp34;
77889#line 273
77890    __cil_tmp36 = (char *)__mptr___0;
77891#line 273
77892    __cil_tmp37 = __cil_tmp36 - __cil_tmp35;
77893#line 273
77894    vfb = (struct vmw_framebuffer *)__cil_tmp37;
77895  } else {
77896#line 273
77897    __cil_tmp38 = (void *)0;
77898#line 273
77899    vfb = (struct vmw_framebuffer *)__cil_tmp38;
77900  }
77901  }
77902  {
77903#line 274
77904  __cil_tmp39 = *((struct drm_device **)crtc);
77905#line 274
77906  dev_priv = vmw_priv(__cil_tmp39);
77907  }
77908  {
77909#line 276
77910  __cil_tmp40 = (unsigned long )set;
77911#line 276
77912  __cil_tmp41 = __cil_tmp40 + 56;
77913#line 276
77914  __cil_tmp42 = *((size_t *)__cil_tmp41);
77915#line 276
77916  if (__cil_tmp42 > 1UL) {
77917    {
77918#line 277
77919    drm_err("vmw_sou_crtc_set_config", "to many connectors\n");
77920    }
77921#line 278
77922    return (-22);
77923  } else {
77924
77925  }
77926  }
77927  {
77928#line 281
77929  __cil_tmp43 = (unsigned long )set;
77930#line 281
77931  __cil_tmp44 = __cil_tmp43 + 56;
77932#line 281
77933  __cil_tmp45 = *((size_t *)__cil_tmp44);
77934#line 281
77935  if (__cil_tmp45 == 1UL) {
77936    {
77937#line 281
77938    __cil_tmp46 = 0 + 616;
77939#line 281
77940    __cil_tmp47 = (unsigned long )sou;
77941#line 281
77942    __cil_tmp48 = __cil_tmp47 + __cil_tmp46;
77943#line 281
77944    __cil_tmp49 = (struct drm_connector *)__cil_tmp48;
77945#line 281
77946    __cil_tmp50 = (unsigned long )__cil_tmp49;
77947#line 281
77948    __cil_tmp51 = (unsigned long )set;
77949#line 281
77950    __cil_tmp52 = __cil_tmp51 + 48;
77951#line 281
77952    __cil_tmp53 = *((struct drm_connector ***)__cil_tmp52);
77953#line 281
77954    __cil_tmp54 = __cil_tmp53 + 0;
77955#line 281
77956    __cil_tmp55 = *__cil_tmp54;
77957#line 281
77958    __cil_tmp56 = (unsigned long )__cil_tmp55;
77959#line 281
77960    if (__cil_tmp56 != __cil_tmp50) {
77961      {
77962#line 283
77963      __cil_tmp57 = (unsigned long )set;
77964#line 283
77965      __cil_tmp58 = __cil_tmp57 + 48;
77966#line 283
77967      __cil_tmp59 = *((struct drm_connector ***)__cil_tmp58);
77968#line 283
77969      __cil_tmp60 = __cil_tmp59 + 0;
77970#line 283
77971      __cil_tmp61 = *__cil_tmp60;
77972#line 283
77973      __cil_tmp62 = 0 + 616;
77974#line 283
77975      __cil_tmp63 = (unsigned long )sou;
77976#line 283
77977      __cil_tmp64 = __cil_tmp63 + __cil_tmp62;
77978#line 283
77979      __cil_tmp65 = (struct drm_connector *)__cil_tmp64;
77980#line 283
77981      drm_err("vmw_sou_crtc_set_config", "connector doesn\'t match %p %p\n", __cil_tmp61,
77982              __cil_tmp65);
77983      }
77984#line 285
77985      return (-22);
77986    } else {
77987
77988    }
77989    }
77990  } else {
77991
77992  }
77993  }
77994  {
77995#line 289
77996  __cil_tmp66 = 0 + 2064;
77997#line 289
77998  __cil_tmp67 = (unsigned long )sou;
77999#line 289
78000  __cil_tmp68 = __cil_tmp67 + __cil_tmp66;
78001#line 289
78002  if (*((bool *)__cil_tmp68)) {
78003    {
78004#line 289
78005    __cil_tmp69 = (unsigned long )dev_priv;
78006#line 289
78007    __cil_tmp70 = __cil_tmp69 + 2616;
78008#line 289
78009    __cil_tmp71 = *((struct vmw_screen_object_display **)__cil_tmp70);
78010#line 289
78011    __cil_tmp72 = (unsigned long )__cil_tmp71;
78012#line 289
78013    __cil_tmp73 = __cil_tmp72 + 8;
78014#line 289
78015    if (*((struct vmw_framebuffer **)__cil_tmp73)) {
78016#line 289
78017      if (vfb) {
78018        {
78019#line 289
78020        __cil_tmp74 = (unsigned long )dev_priv;
78021#line 289
78022        __cil_tmp75 = __cil_tmp74 + 2616;
78023#line 289
78024        __cil_tmp76 = *((struct vmw_screen_object_display **)__cil_tmp75);
78025#line 289
78026        __cil_tmp77 = *((unsigned int *)__cil_tmp76);
78027#line 289
78028        if (__cil_tmp77 == 1U) {
78029          {
78030#line 289
78031          __cil_tmp78 = (unsigned long )sou;
78032#line 289
78033          __cil_tmp79 = __cil_tmp78 + 2089;
78034#line 289
78035          if (*((bool *)__cil_tmp79)) {
78036
78037          } else {
78038#line 289
78039            goto _L;
78040          }
78041          }
78042        } else {
78043          _L: /* CIL Label */ 
78044          {
78045#line 289
78046          __cil_tmp80 = (unsigned long )vfb;
78047#line 289
78048          __cil_tmp81 = (unsigned long )dev_priv;
78049#line 289
78050          __cil_tmp82 = __cil_tmp81 + 2616;
78051#line 289
78052          __cil_tmp83 = *((struct vmw_screen_object_display **)__cil_tmp82);
78053#line 289
78054          __cil_tmp84 = (unsigned long )__cil_tmp83;
78055#line 289
78056          __cil_tmp85 = __cil_tmp84 + 8;
78057#line 289
78058          __cil_tmp86 = *((struct vmw_framebuffer **)__cil_tmp85);
78059#line 289
78060          __cil_tmp87 = (unsigned long )__cil_tmp86;
78061#line 289
78062          if (__cil_tmp87 != __cil_tmp80) {
78063            {
78064#line 294
78065            drm_err("vmw_sou_crtc_set_config", "Multiple framebuffers not supported\n");
78066            }
78067#line 295
78068            return (-22);
78069          } else {
78070
78071          }
78072          }
78073        }
78074        }
78075      } else {
78076
78077      }
78078    } else {
78079
78080    }
78081    }
78082  } else {
78083
78084  }
78085  }
78086#line 299
78087  __cil_tmp88 = 0 + 616;
78088#line 299
78089  __cil_tmp89 = (unsigned long )sou;
78090#line 299
78091  __cil_tmp90 = __cil_tmp89 + __cil_tmp88;
78092#line 299
78093  connector = (struct drm_connector *)__cil_tmp90;
78094#line 300
78095  __cil_tmp91 = 0 + 544;
78096#line 300
78097  __cil_tmp92 = (unsigned long )sou;
78098#line 300
78099  __cil_tmp93 = __cil_tmp92 + __cil_tmp91;
78100#line 300
78101  encoder = (struct drm_encoder *)__cil_tmp93;
78102  {
78103#line 303
78104  __cil_tmp94 = (unsigned long )set;
78105#line 303
78106  __cil_tmp95 = __cil_tmp94 + 56;
78107#line 303
78108  __cil_tmp96 = *((size_t *)__cil_tmp95);
78109#line 303
78110  if (__cil_tmp96 == 0UL) {
78111#line 303
78112    goto _L___0;
78113  } else {
78114    {
78115#line 303
78116    __cil_tmp97 = (unsigned long )set;
78117#line 303
78118    __cil_tmp98 = __cil_tmp97 + 32;
78119#line 303
78120    __cil_tmp99 = *((struct drm_display_mode **)__cil_tmp98);
78121#line 303
78122    if (! __cil_tmp99) {
78123#line 303
78124      goto _L___0;
78125    } else {
78126      {
78127#line 303
78128      __cil_tmp100 = (unsigned long )set;
78129#line 303
78130      __cil_tmp101 = __cil_tmp100 + 16;
78131#line 303
78132      __cil_tmp102 = *((struct drm_framebuffer **)__cil_tmp101);
78133#line 303
78134      if (! __cil_tmp102) {
78135        _L___0: /* CIL Label */ 
78136        {
78137#line 304
78138        ret = vmw_sou_fifo_destroy(dev_priv, sou);
78139#line 306
78140        __cil_tmp103 = ret != 0;
78141#line 306
78142        __cil_tmp104 = ! __cil_tmp103;
78143#line 306
78144        __cil_tmp105 = ! __cil_tmp104;
78145#line 306
78146        __cil_tmp106 = (long )__cil_tmp105;
78147#line 306
78148        tmp___7 = __builtin_expect(__cil_tmp106, 0L);
78149        }
78150#line 306
78151        if (tmp___7) {
78152#line 307
78153          return (ret);
78154        } else {
78155
78156        }
78157        {
78158#line 309
78159        __cil_tmp107 = (unsigned long )connector;
78160#line 309
78161        __cil_tmp108 = __cil_tmp107 + 1208;
78162#line 309
78163        __cil_tmp109 = (void *)0;
78164#line 309
78165        *((struct drm_encoder **)__cil_tmp108) = (struct drm_encoder *)__cil_tmp109;
78166#line 310
78167        __cil_tmp110 = (unsigned long )encoder;
78168#line 310
78169        __cil_tmp111 = __cil_tmp110 + 48;
78170#line 310
78171        __cil_tmp112 = (void *)0;
78172#line 310
78173        *((struct drm_crtc **)__cil_tmp111) = (struct drm_crtc *)__cil_tmp112;
78174#line 311
78175        __cil_tmp113 = (unsigned long )crtc;
78176#line 311
78177        __cil_tmp114 = __cil_tmp113 + 32;
78178#line 311
78179        __cil_tmp115 = (void *)0;
78180#line 311
78181        *((struct drm_framebuffer **)__cil_tmp114) = (struct drm_framebuffer *)__cil_tmp115;
78182#line 312
78183        __cil_tmp116 = (unsigned long )crtc;
78184#line 312
78185        __cil_tmp117 = __cil_tmp116 + 480;
78186#line 312
78187        *((int *)__cil_tmp117) = 0;
78188#line 313
78189        __cil_tmp118 = (unsigned long )crtc;
78190#line 313
78191        __cil_tmp119 = __cil_tmp118 + 484;
78192#line 313
78193        *((int *)__cil_tmp119) = 0;
78194#line 315
78195        vmw_sou_del_active(dev_priv, sou);
78196#line 317
78197        vmw_sou_backing_free(dev_priv, sou);
78198        }
78199#line 319
78200        return (0);
78201      } else {
78202
78203      }
78204      }
78205    }
78206    }
78207  }
78208  }
78209#line 324
78210  __cil_tmp120 = (unsigned long )set;
78211#line 324
78212  __cil_tmp121 = __cil_tmp120 + 32;
78213#line 324
78214  mode = *((struct drm_display_mode **)__cil_tmp121);
78215#line 325
78216  __cil_tmp122 = (unsigned long )set;
78217#line 325
78218  __cil_tmp123 = __cil_tmp122 + 16;
78219#line 325
78220  fb = *((struct drm_framebuffer **)__cil_tmp123);
78221  {
78222#line 327
78223  __cil_tmp124 = (unsigned long )fb;
78224#line 327
78225  __cil_tmp125 = __cil_tmp124 + 72;
78226#line 327
78227  __cil_tmp126 = *((unsigned int *)__cil_tmp125);
78228#line 327
78229  __cil_tmp127 = (unsigned long )mode;
78230#line 327
78231  __cil_tmp128 = __cil_tmp127 + 68;
78232#line 327
78233  __cil_tmp129 = *((int *)__cil_tmp128);
78234#line 327
78235  __cil_tmp130 = (uint32_t )__cil_tmp129;
78236#line 327
78237  __cil_tmp131 = (unsigned long )set;
78238#line 327
78239  __cil_tmp132 = __cil_tmp131 + 40;
78240#line 327
78241  __cil_tmp133 = *((uint32_t *)__cil_tmp132);
78242#line 327
78243  __cil_tmp134 = __cil_tmp133 + __cil_tmp130;
78244#line 327
78245  if (__cil_tmp134 > __cil_tmp126) {
78246    {
78247#line 329
78248    drm_err("vmw_sou_crtc_set_config", "set outside of framebuffer\n");
78249    }
78250#line 330
78251    return (-22);
78252  } else {
78253    {
78254#line 327
78255    __cil_tmp135 = (unsigned long )fb;
78256#line 327
78257    __cil_tmp136 = __cil_tmp135 + 76;
78258#line 327
78259    __cil_tmp137 = *((unsigned int *)__cil_tmp136);
78260#line 327
78261    __cil_tmp138 = (unsigned long )mode;
78262#line 327
78263    __cil_tmp139 = __cil_tmp138 + 88;
78264#line 327
78265    __cil_tmp140 = *((int *)__cil_tmp139);
78266#line 327
78267    __cil_tmp141 = (uint32_t )__cil_tmp140;
78268#line 327
78269    __cil_tmp142 = (unsigned long )set;
78270#line 327
78271    __cil_tmp143 = __cil_tmp142 + 44;
78272#line 327
78273    __cil_tmp144 = *((uint32_t *)__cil_tmp143);
78274#line 327
78275    __cil_tmp145 = __cil_tmp144 + __cil_tmp141;
78276#line 327
78277    if (__cil_tmp145 > __cil_tmp137) {
78278      {
78279#line 329
78280      drm_err("vmw_sou_crtc_set_config", "set outside of framebuffer\n");
78281      }
78282#line 330
78283      return (-22);
78284    } else {
78285
78286    }
78287    }
78288  }
78289  }
78290  {
78291#line 333
78292  vmw_fb_off(dev_priv);
78293  }
78294  {
78295#line 335
78296  __cil_tmp146 = 48 + 68;
78297#line 335
78298  __cil_tmp147 = (unsigned long )crtc;
78299#line 335
78300  __cil_tmp148 = __cil_tmp147 + __cil_tmp146;
78301#line 335
78302  __cil_tmp149 = *((int *)__cil_tmp148);
78303#line 335
78304  __cil_tmp150 = (unsigned long )mode;
78305#line 335
78306  __cil_tmp151 = __cil_tmp150 + 68;
78307#line 335
78308  __cil_tmp152 = *((int *)__cil_tmp151);
78309#line 335
78310  if (__cil_tmp152 != __cil_tmp149) {
78311#line 335
78312    goto _L___1;
78313  } else {
78314    {
78315#line 335
78316    __cil_tmp153 = 48 + 88;
78317#line 335
78318    __cil_tmp154 = (unsigned long )crtc;
78319#line 335
78320    __cil_tmp155 = __cil_tmp154 + __cil_tmp153;
78321#line 335
78322    __cil_tmp156 = *((int *)__cil_tmp155);
78323#line 335
78324    __cil_tmp157 = (unsigned long )mode;
78325#line 335
78326    __cil_tmp158 = __cil_tmp157 + 88;
78327#line 335
78328    __cil_tmp159 = *((int *)__cil_tmp158);
78329#line 335
78330    if (__cil_tmp159 != __cil_tmp156) {
78331      _L___1: /* CIL Label */ 
78332      {
78333#line 341
78334      ret = vmw_sou_fifo_destroy(dev_priv, sou);
78335#line 343
78336      __cil_tmp160 = ret != 0;
78337#line 343
78338      __cil_tmp161 = ! __cil_tmp160;
78339#line 343
78340      __cil_tmp162 = ! __cil_tmp161;
78341#line 343
78342      __cil_tmp163 = (long )__cil_tmp162;
78343#line 343
78344      tmp___8 = __builtin_expect(__cil_tmp163, 0L);
78345      }
78346#line 343
78347      if (tmp___8) {
78348#line 344
78349        return (ret);
78350      } else {
78351
78352      }
78353      {
78354#line 346
78355      vmw_sou_backing_free(dev_priv, sou);
78356      }
78357    } else {
78358
78359    }
78360    }
78361  }
78362  }
78363  {
78364#line 349
78365  __cil_tmp164 = (unsigned long )sou;
78366#line 349
78367  __cil_tmp165 = __cil_tmp164 + 2080;
78368#line 349
78369  __cil_tmp166 = *((struct vmw_dma_buffer **)__cil_tmp165);
78370#line 349
78371  if (! __cil_tmp166) {
78372    {
78373#line 351
78374    __cil_tmp167 = (unsigned long )mode;
78375#line 351
78376    __cil_tmp168 = __cil_tmp167 + 88;
78377#line 351
78378    __cil_tmp169 = *((int *)__cil_tmp168);
78379#line 351
78380    __cil_tmp170 = (unsigned long )mode;
78381#line 351
78382    __cil_tmp171 = __cil_tmp170 + 68;
78383#line 351
78384    __cil_tmp172 = *((int *)__cil_tmp171);
78385#line 351
78386    __cil_tmp173 = __cil_tmp172 * __cil_tmp169;
78387#line 351
78388    __cil_tmp174 = __cil_tmp173 * 4;
78389#line 351
78390    size = (size_t )__cil_tmp174;
78391#line 352
78392    ret = vmw_sou_backing_alloc(dev_priv, sou, size);
78393#line 353
78394    __cil_tmp175 = ret != 0;
78395#line 353
78396    __cil_tmp176 = ! __cil_tmp175;
78397#line 353
78398    __cil_tmp177 = ! __cil_tmp176;
78399#line 353
78400    __cil_tmp178 = (long )__cil_tmp177;
78401#line 353
78402    tmp___9 = __builtin_expect(__cil_tmp178, 0L);
78403    }
78404#line 353
78405    if (tmp___9) {
78406#line 354
78407      return (ret);
78408    } else {
78409
78410    }
78411  } else {
78412
78413  }
78414  }
78415  {
78416#line 357
78417  __cil_tmp179 = (unsigned long )set;
78418#line 357
78419  __cil_tmp180 = __cil_tmp179 + 40;
78420#line 357
78421  __cil_tmp181 = *((uint32_t *)__cil_tmp180);
78422#line 357
78423  __cil_tmp182 = (unsigned long )set;
78424#line 357
78425  __cil_tmp183 = __cil_tmp182 + 44;
78426#line 357
78427  __cil_tmp184 = *((uint32_t *)__cil_tmp183);
78428#line 357
78429  ret = vmw_sou_fifo_create(dev_priv, sou, __cil_tmp181, __cil_tmp184, mode);
78430#line 358
78431  __cil_tmp185 = ret != 0;
78432#line 358
78433  __cil_tmp186 = ! __cil_tmp185;
78434#line 358
78435  __cil_tmp187 = ! __cil_tmp186;
78436#line 358
78437  __cil_tmp188 = (long )__cil_tmp187;
78438#line 358
78439  tmp___10 = __builtin_expect(__cil_tmp188, 0L);
78440  }
78441#line 358
78442  if (tmp___10) {
78443    {
78444#line 366
78445    __cil_tmp189 = (unsigned long )sou;
78446#line 366
78447    __cil_tmp190 = __cil_tmp189 + 2088;
78448#line 366
78449    if (*((bool *)__cil_tmp190)) {
78450#line 367
78451      return (ret);
78452    } else {
78453
78454    }
78455    }
78456#line 369
78457    __cil_tmp191 = (unsigned long )connector;
78458#line 369
78459    __cil_tmp192 = __cil_tmp191 + 1208;
78460#line 369
78461    __cil_tmp193 = (void *)0;
78462#line 369
78463    *((struct drm_encoder **)__cil_tmp192) = (struct drm_encoder *)__cil_tmp193;
78464#line 370
78465    __cil_tmp194 = (unsigned long )encoder;
78466#line 370
78467    __cil_tmp195 = __cil_tmp194 + 48;
78468#line 370
78469    __cil_tmp196 = (void *)0;
78470#line 370
78471    *((struct drm_crtc **)__cil_tmp195) = (struct drm_crtc *)__cil_tmp196;
78472#line 371
78473    __cil_tmp197 = (unsigned long )crtc;
78474#line 371
78475    __cil_tmp198 = __cil_tmp197 + 32;
78476#line 371
78477    __cil_tmp199 = (void *)0;
78478#line 371
78479    *((struct drm_framebuffer **)__cil_tmp198) = (struct drm_framebuffer *)__cil_tmp199;
78480#line 372
78481    __cil_tmp200 = (unsigned long )crtc;
78482#line 372
78483    __cil_tmp201 = __cil_tmp200 + 480;
78484#line 372
78485    *((int *)__cil_tmp201) = 0;
78486#line 373
78487    __cil_tmp202 = (unsigned long )crtc;
78488#line 373
78489    __cil_tmp203 = __cil_tmp202 + 484;
78490#line 373
78491    *((int *)__cil_tmp203) = 0;
78492#line 375
78493    return (ret);
78494  } else {
78495
78496  }
78497  {
78498#line 378
78499  vmw_sou_add_active(dev_priv, sou, vfb);
78500#line 380
78501  __cil_tmp204 = (unsigned long )connector;
78502#line 380
78503  __cil_tmp205 = __cil_tmp204 + 1208;
78504#line 380
78505  *((struct drm_encoder **)__cil_tmp205) = encoder;
78506#line 381
78507  __cil_tmp206 = (unsigned long )encoder;
78508#line 381
78509  __cil_tmp207 = __cil_tmp206 + 48;
78510#line 381
78511  *((struct drm_crtc **)__cil_tmp207) = crtc;
78512#line 382
78513  __cil_tmp208 = (unsigned long )crtc;
78514#line 382
78515  __cil_tmp209 = __cil_tmp208 + 48;
78516#line 382
78517  *((struct drm_display_mode *)__cil_tmp209) = *mode;
78518#line 383
78519  __cil_tmp210 = (unsigned long )crtc;
78520#line 383
78521  __cil_tmp211 = __cil_tmp210 + 32;
78522#line 383
78523  *((struct drm_framebuffer **)__cil_tmp211) = fb;
78524#line 384
78525  __cil_tmp212 = (unsigned long )crtc;
78526#line 384
78527  __cil_tmp213 = __cil_tmp212 + 480;
78528#line 384
78529  __cil_tmp214 = (unsigned long )set;
78530#line 384
78531  __cil_tmp215 = __cil_tmp214 + 40;
78532#line 384
78533  __cil_tmp216 = *((uint32_t *)__cil_tmp215);
78534#line 384
78535  *((int *)__cil_tmp213) = (int )__cil_tmp216;
78536#line 385
78537  __cil_tmp217 = (unsigned long )crtc;
78538#line 385
78539  __cil_tmp218 = __cil_tmp217 + 484;
78540#line 385
78541  __cil_tmp219 = (unsigned long )set;
78542#line 385
78543  __cil_tmp220 = __cil_tmp219 + 44;
78544#line 385
78545  __cil_tmp221 = *((uint32_t *)__cil_tmp220);
78546#line 385
78547  *((int *)__cil_tmp218) = (int )__cil_tmp221;
78548  }
78549#line 387
78550  return (0);
78551}
78552}
78553#line 390 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78554static struct drm_crtc_funcs vmw_screen_object_crtc_funcs  = 
78555#line 390
78556     {& vmw_du_crtc_save, & vmw_du_crtc_restore, (void (*)(struct drm_crtc *crtc ))0,
78557    & vmw_du_crtc_cursor_set, & vmw_du_crtc_cursor_move, & vmw_du_crtc_gamma_set,
78558    & vmw_sou_crtc_destroy, & vmw_sou_crtc_set_config, & vmw_du_page_flip};
78559#line 405 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78560static void vmw_sou_encoder_destroy(struct drm_encoder *encoder ) 
78561{ struct drm_encoder    *__mptr ;
78562  unsigned long __cil_tmp3 ;
78563  struct vmw_screen_object_unit *__cil_tmp4 ;
78564  unsigned long __cil_tmp5 ;
78565  unsigned long __cil_tmp6 ;
78566  struct drm_encoder *__cil_tmp7 ;
78567  unsigned int __cil_tmp8 ;
78568  char *__cil_tmp9 ;
78569  char *__cil_tmp10 ;
78570  struct vmw_screen_object_unit *__cil_tmp11 ;
78571
78572  {
78573  {
78574#line 407
78575  __mptr = (struct drm_encoder    *)encoder;
78576#line 407
78577  __cil_tmp3 = 0 + 544;
78578#line 407
78579  __cil_tmp4 = (struct vmw_screen_object_unit *)0;
78580#line 407
78581  __cil_tmp5 = (unsigned long )__cil_tmp4;
78582#line 407
78583  __cil_tmp6 = __cil_tmp5 + __cil_tmp3;
78584#line 407
78585  __cil_tmp7 = (struct drm_encoder *)__cil_tmp6;
78586#line 407
78587  __cil_tmp8 = (unsigned int )__cil_tmp7;
78588#line 407
78589  __cil_tmp9 = (char *)__mptr;
78590#line 407
78591  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
78592#line 407
78593  __cil_tmp11 = (struct vmw_screen_object_unit *)__cil_tmp10;
78594#line 407
78595  vmw_sou_destroy(__cil_tmp11);
78596  }
78597#line 408
78598  return;
78599}
78600}
78601#line 410 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78602static struct drm_encoder_funcs vmw_screen_object_encoder_funcs  =    {(void (*)(struct drm_encoder *encoder ))0, & vmw_sou_encoder_destroy};
78603#line 418 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78604static void vmw_sou_connector_destroy(struct drm_connector *connector ) 
78605{ struct drm_connector    *__mptr ;
78606  unsigned long __cil_tmp3 ;
78607  struct vmw_screen_object_unit *__cil_tmp4 ;
78608  unsigned long __cil_tmp5 ;
78609  unsigned long __cil_tmp6 ;
78610  struct drm_connector *__cil_tmp7 ;
78611  unsigned int __cil_tmp8 ;
78612  char *__cil_tmp9 ;
78613  char *__cil_tmp10 ;
78614  struct vmw_screen_object_unit *__cil_tmp11 ;
78615
78616  {
78617  {
78618#line 420
78619  __mptr = (struct drm_connector    *)connector;
78620#line 420
78621  __cil_tmp3 = 0 + 616;
78622#line 420
78623  __cil_tmp4 = (struct vmw_screen_object_unit *)0;
78624#line 420
78625  __cil_tmp5 = (unsigned long )__cil_tmp4;
78626#line 420
78627  __cil_tmp6 = __cil_tmp5 + __cil_tmp3;
78628#line 420
78629  __cil_tmp7 = (struct drm_connector *)__cil_tmp6;
78630#line 420
78631  __cil_tmp8 = (unsigned int )__cil_tmp7;
78632#line 420
78633  __cil_tmp9 = (char *)__mptr;
78634#line 420
78635  __cil_tmp10 = __cil_tmp9 - __cil_tmp8;
78636#line 420
78637  __cil_tmp11 = (struct vmw_screen_object_unit *)__cil_tmp10;
78638#line 420
78639  vmw_sou_destroy(__cil_tmp11);
78640  }
78641#line 421
78642  return;
78643}
78644}
78645#line 423 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78646static struct drm_connector_funcs vmw_legacy_connector_funcs___0  = 
78647#line 423
78648     {& vmw_du_connector_dpms, & vmw_du_connector_save, & vmw_du_connector_restore,
78649    (void (*)(struct drm_connector *connector ))0, & vmw_du_connector_detect, & vmw_du_connector_fill_modes,
78650    & vmw_du_connector_set_property, & vmw_sou_connector_destroy, (void (*)(struct drm_connector *connector ))0};
78651#line 433 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78652static int vmw_sou_init(struct vmw_private *dev_priv , unsigned int unit ) 
78653{ struct vmw_screen_object_unit *sou ;
78654  struct drm_device *dev ;
78655  struct drm_connector *connector ;
78656  struct drm_encoder *encoder ;
78657  struct drm_crtc *crtc ;
78658  void *tmp___7 ;
78659  unsigned long __cil_tmp9 ;
78660  unsigned long __cil_tmp10 ;
78661  unsigned long __cil_tmp11 ;
78662  unsigned long __cil_tmp12 ;
78663  unsigned long __cil_tmp13 ;
78664  unsigned long __cil_tmp14 ;
78665  unsigned long __cil_tmp15 ;
78666  unsigned long __cil_tmp16 ;
78667  unsigned long __cil_tmp17 ;
78668  unsigned long __cil_tmp18 ;
78669  unsigned long __cil_tmp19 ;
78670  unsigned long __cil_tmp20 ;
78671  unsigned long __cil_tmp21 ;
78672  unsigned long __cil_tmp22 ;
78673  unsigned long __cil_tmp23 ;
78674  unsigned long __cil_tmp24 ;
78675  int __cil_tmp25 ;
78676  unsigned long __cil_tmp26 ;
78677  unsigned long __cil_tmp27 ;
78678  unsigned long __cil_tmp28 ;
78679  unsigned long __cil_tmp29 ;
78680  unsigned long __cil_tmp30 ;
78681  unsigned long __cil_tmp31 ;
78682  unsigned long __cil_tmp32 ;
78683  unsigned long __cil_tmp33 ;
78684  unsigned long __cil_tmp34 ;
78685  unsigned long __cil_tmp35 ;
78686  unsigned long __cil_tmp36 ;
78687  unsigned long __cil_tmp37 ;
78688  unsigned long __cil_tmp38 ;
78689  void *__cil_tmp39 ;
78690  unsigned long __cil_tmp40 ;
78691  unsigned long __cil_tmp41 ;
78692  unsigned long __cil_tmp42 ;
78693  struct drm_connector_funcs    *__cil_tmp43 ;
78694  unsigned long __cil_tmp44 ;
78695  unsigned long __cil_tmp45 ;
78696  bool __cil_tmp46 ;
78697  struct drm_encoder_funcs    *__cil_tmp47 ;
78698  unsigned long __cil_tmp48 ;
78699  unsigned long __cil_tmp49 ;
78700  int __cil_tmp50 ;
78701  unsigned long __cil_tmp51 ;
78702  unsigned long __cil_tmp52 ;
78703  struct drm_crtc_funcs    *__cil_tmp53 ;
78704  unsigned long __cil_tmp54 ;
78705  unsigned long __cil_tmp55 ;
78706  unsigned long __cil_tmp56 ;
78707  struct drm_property *__cil_tmp57 ;
78708  uint64_t __cil_tmp58 ;
78709
78710  {
78711  {
78712#line 436
78713  __cil_tmp9 = (unsigned long )dev_priv;
78714#line 436
78715  __cil_tmp10 = __cil_tmp9 + 2088;
78716#line 436
78717  dev = *((struct drm_device **)__cil_tmp10);
78718#line 441
78719  tmp___7 = kzalloc(2096UL, 208U);
78720#line 441
78721  sou = (struct vmw_screen_object_unit *)tmp___7;
78722  }
78723#line 442
78724  if (! sou) {
78725#line 443
78726    return (-12);
78727  } else {
78728
78729  }
78730  {
78731#line 445
78732  __cil_tmp11 = 0 + 2032;
78733#line 445
78734  __cil_tmp12 = (unsigned long )sou;
78735#line 445
78736  __cil_tmp13 = __cil_tmp12 + __cil_tmp11;
78737#line 445
78738  *((unsigned int *)__cil_tmp13) = unit;
78739#line 446
78740  crtc = (struct drm_crtc *)sou;
78741#line 447
78742  __cil_tmp14 = 0 + 544;
78743#line 447
78744  __cil_tmp15 = (unsigned long )sou;
78745#line 447
78746  __cil_tmp16 = __cil_tmp15 + __cil_tmp14;
78747#line 447
78748  encoder = (struct drm_encoder *)__cil_tmp16;
78749#line 448
78750  __cil_tmp17 = 0 + 616;
78751#line 448
78752  __cil_tmp18 = (unsigned long )sou;
78753#line 448
78754  __cil_tmp19 = __cil_tmp18 + __cil_tmp17;
78755#line 448
78756  connector = (struct drm_connector *)__cil_tmp19;
78757#line 450
78758  __cil_tmp20 = (unsigned long )sou;
78759#line 450
78760  __cil_tmp21 = __cil_tmp20 + 2089;
78761#line 450
78762  *((bool *)__cil_tmp21) = (bool )0;
78763#line 452
78764  __cil_tmp22 = 0 + 2044;
78765#line 452
78766  __cil_tmp23 = (unsigned long )sou;
78767#line 452
78768  __cil_tmp24 = __cil_tmp23 + __cil_tmp22;
78769#line 452
78770  __cil_tmp25 = unit == 0U;
78771#line 452
78772  *((bool *)__cil_tmp24) = (bool )__cil_tmp25;
78773#line 453
78774  __cil_tmp26 = 0 + 2036;
78775#line 453
78776  __cil_tmp27 = (unsigned long )sou;
78777#line 453
78778  __cil_tmp28 = __cil_tmp27 + __cil_tmp26;
78779#line 453
78780  __cil_tmp29 = (unsigned long )dev_priv;
78781#line 453
78782  __cil_tmp30 = __cil_tmp29 + 2132;
78783#line 453
78784  *((unsigned int *)__cil_tmp28) = *((uint32_t *)__cil_tmp30);
78785#line 454
78786  __cil_tmp31 = 0 + 2040;
78787#line 454
78788  __cil_tmp32 = (unsigned long )sou;
78789#line 454
78790  __cil_tmp33 = __cil_tmp32 + __cil_tmp31;
78791#line 454
78792  __cil_tmp34 = (unsigned long )dev_priv;
78793#line 454
78794  __cil_tmp35 = __cil_tmp34 + 2136;
78795#line 454
78796  *((unsigned int *)__cil_tmp33) = *((uint32_t *)__cil_tmp35);
78797#line 455
78798  __cil_tmp36 = 0 + 2048;
78799#line 455
78800  __cil_tmp37 = (unsigned long )sou;
78801#line 455
78802  __cil_tmp38 = __cil_tmp37 + __cil_tmp36;
78803#line 455
78804  __cil_tmp39 = (void *)0;
78805#line 455
78806  *((struct drm_display_mode **)__cil_tmp38) = (struct drm_display_mode *)__cil_tmp39;
78807#line 456
78808  __cil_tmp40 = 0 + 2064;
78809#line 456
78810  __cil_tmp41 = (unsigned long )sou;
78811#line 456
78812  __cil_tmp42 = __cil_tmp41 + __cil_tmp40;
78813#line 456
78814  *((bool *)__cil_tmp42) = (bool )1;
78815#line 458
78816  __cil_tmp43 = (struct drm_connector_funcs    *)(& vmw_legacy_connector_funcs___0);
78817#line 458
78818  drm_connector_init(dev, connector, __cil_tmp43, 15);
78819#line 460
78820  __cil_tmp44 = (unsigned long )connector;
78821#line 460
78822  __cil_tmp45 = __cil_tmp44 + 840;
78823#line 460
78824  __cil_tmp46 = (bool )1;
78825#line 460
78826  *((enum drm_connector_status *)__cil_tmp45) = vmw_du_connector_detect(connector,
78827                                                                        __cil_tmp46);
78828#line 462
78829  __cil_tmp47 = (struct drm_encoder_funcs    *)(& vmw_screen_object_encoder_funcs);
78830#line 462
78831  drm_encoder_init(dev, encoder, __cil_tmp47, 5);
78832#line 464
78833  drm_mode_connector_attach_encoder(connector, encoder);
78834#line 465
78835  __cil_tmp48 = (unsigned long )encoder;
78836#line 465
78837  __cil_tmp49 = __cil_tmp48 + 36;
78838#line 465
78839  __cil_tmp50 = 1 << unit;
78840#line 465
78841  *((uint32_t *)__cil_tmp49) = (uint32_t )__cil_tmp50;
78842#line 466
78843  __cil_tmp51 = (unsigned long )encoder;
78844#line 466
78845  __cil_tmp52 = __cil_tmp51 + 40;
78846#line 466
78847  *((uint32_t *)__cil_tmp52) = (uint32_t )0;
78848#line 468
78849  __cil_tmp53 = (struct drm_crtc_funcs    *)(& vmw_screen_object_crtc_funcs);
78850#line 468
78851  drm_crtc_init(dev, crtc, __cil_tmp53);
78852#line 470
78853  drm_mode_crtc_set_gamma_size(crtc, 256);
78854#line 472
78855  __cil_tmp54 = 1152 + 648;
78856#line 472
78857  __cil_tmp55 = (unsigned long )dev;
78858#line 472
78859  __cil_tmp56 = __cil_tmp55 + __cil_tmp54;
78860#line 472
78861  __cil_tmp57 = *((struct drm_property **)__cil_tmp56);
78862#line 472
78863  __cil_tmp58 = (uint64_t )1;
78864#line 472
78865  drm_connector_attach_property(connector, __cil_tmp57, __cil_tmp58);
78866  }
78867#line 476
78868  return (0);
78869}
78870}
78871#line 479 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
78872int vmw_kms_init_screen_object_display(struct vmw_private *dev_priv ) 
78873{ struct drm_device *dev ;
78874  int i ;
78875  int ret ;
78876  void *tmp___7 ;
78877  long tmp___8 ;
78878  long tmp___9 ;
78879  long tmp___10 ;
78880  unsigned long __cil_tmp9 ;
78881  unsigned long __cil_tmp10 ;
78882  unsigned long __cil_tmp11 ;
78883  unsigned long __cil_tmp12 ;
78884  int __cil_tmp13 ;
78885  unsigned int __cil_tmp14 ;
78886  unsigned long __cil_tmp15 ;
78887  unsigned long __cil_tmp16 ;
78888  unsigned long __cil_tmp17 ;
78889  uint32_t __cil_tmp18 ;
78890  unsigned int __cil_tmp19 ;
78891  unsigned long __cil_tmp20 ;
78892  unsigned long __cil_tmp21 ;
78893  unsigned long __cil_tmp22 ;
78894  unsigned long __cil_tmp23 ;
78895  struct vmw_screen_object_display *__cil_tmp24 ;
78896  int __cil_tmp25 ;
78897  int __cil_tmp26 ;
78898  int __cil_tmp27 ;
78899  long __cil_tmp28 ;
78900  unsigned long __cil_tmp29 ;
78901  unsigned long __cil_tmp30 ;
78902  struct vmw_screen_object_display *__cil_tmp31 ;
78903  unsigned long __cil_tmp32 ;
78904  unsigned long __cil_tmp33 ;
78905  struct vmw_screen_object_display *__cil_tmp34 ;
78906  unsigned long __cil_tmp35 ;
78907  unsigned long __cil_tmp36 ;
78908  void *__cil_tmp37 ;
78909  int __cil_tmp38 ;
78910  int __cil_tmp39 ;
78911  int __cil_tmp40 ;
78912  long __cil_tmp41 ;
78913  int __cil_tmp42 ;
78914  int __cil_tmp43 ;
78915  int __cil_tmp44 ;
78916  long __cil_tmp45 ;
78917  unsigned int __cil_tmp46 ;
78918  unsigned long __cil_tmp47 ;
78919  unsigned long __cil_tmp48 ;
78920  struct vmw_screen_object_display *__cil_tmp49 ;
78921  void    *__cil_tmp50 ;
78922  unsigned long __cil_tmp51 ;
78923  unsigned long __cil_tmp52 ;
78924  void *__cil_tmp53 ;
78925
78926  {
78927#line 481
78928  __cil_tmp9 = (unsigned long )dev_priv;
78929#line 481
78930  __cil_tmp10 = __cil_tmp9 + 2088;
78931#line 481
78932  dev = *((struct drm_device **)__cil_tmp10);
78933  {
78934#line 484
78935  __cil_tmp11 = (unsigned long )dev_priv;
78936#line 484
78937  __cil_tmp12 = __cil_tmp11 + 2616;
78938#line 484
78939  if (*((struct vmw_screen_object_display **)__cil_tmp12)) {
78940    {
78941#line 485
78942    printk("<6>[drm] sou system already on\n");
78943    }
78944#line 486
78945    return (-22);
78946  } else {
78947
78948  }
78949  }
78950  {
78951#line 489
78952  __cil_tmp13 = 1 << 9;
78953#line 489
78954  __cil_tmp14 = (unsigned int )__cil_tmp13;
78955#line 489
78956  __cil_tmp15 = 1856 + 36;
78957#line 489
78958  __cil_tmp16 = (unsigned long )dev_priv;
78959#line 489
78960  __cil_tmp17 = __cil_tmp16 + __cil_tmp15;
78961#line 489
78962  __cil_tmp18 = *((uint32_t *)__cil_tmp17);
78963#line 489
78964  __cil_tmp19 = __cil_tmp18 & __cil_tmp14;
78965#line 489
78966  if (! __cil_tmp19) {
78967    {
78968#line 490
78969    printk("<6>[drm] Not using screen objects, missing cap SCREEN_OBJECT_2\n");
78970    }
78971#line 492
78972    return (-38);
78973  } else {
78974
78975  }
78976  }
78977  {
78978#line 495
78979  ret = -12;
78980#line 496
78981  tmp___7 = kmalloc(16UL, 208U);
78982#line 496
78983  __cil_tmp20 = (unsigned long )dev_priv;
78984#line 496
78985  __cil_tmp21 = __cil_tmp20 + 2616;
78986#line 496
78987  *((struct vmw_screen_object_display **)__cil_tmp21) = (struct vmw_screen_object_display *)tmp___7;
78988#line 497
78989  __cil_tmp22 = (unsigned long )dev_priv;
78990#line 497
78991  __cil_tmp23 = __cil_tmp22 + 2616;
78992#line 497
78993  __cil_tmp24 = *((struct vmw_screen_object_display **)__cil_tmp23);
78994#line 497
78995  __cil_tmp25 = ! __cil_tmp24;
78996#line 497
78997  __cil_tmp26 = ! __cil_tmp25;
78998#line 497
78999  __cil_tmp27 = ! __cil_tmp26;
79000#line 497
79001  __cil_tmp28 = (long )__cil_tmp27;
79002#line 497
79003  tmp___8 = __builtin_expect(__cil_tmp28, 0L);
79004  }
79005#line 497
79006  if (tmp___8) {
79007#line 498
79008    goto err_no_mem;
79009  } else {
79010
79011  }
79012  {
79013#line 500
79014  __cil_tmp29 = (unsigned long )dev_priv;
79015#line 500
79016  __cil_tmp30 = __cil_tmp29 + 2616;
79017#line 500
79018  __cil_tmp31 = *((struct vmw_screen_object_display **)__cil_tmp30);
79019#line 500
79020  *((unsigned int *)__cil_tmp31) = 0U;
79021#line 501
79022  __cil_tmp32 = (unsigned long )dev_priv;
79023#line 501
79024  __cil_tmp33 = __cil_tmp32 + 2616;
79025#line 501
79026  __cil_tmp34 = *((struct vmw_screen_object_display **)__cil_tmp33);
79027#line 501
79028  __cil_tmp35 = (unsigned long )__cil_tmp34;
79029#line 501
79030  __cil_tmp36 = __cil_tmp35 + 8;
79031#line 501
79032  __cil_tmp37 = (void *)0;
79033#line 501
79034  *((struct vmw_framebuffer **)__cil_tmp36) = (struct vmw_framebuffer *)__cil_tmp37;
79035#line 503
79036  ret = drm_vblank_init(dev, 8);
79037#line 504
79038  __cil_tmp38 = ret != 0;
79039#line 504
79040  __cil_tmp39 = ! __cil_tmp38;
79041#line 504
79042  __cil_tmp40 = ! __cil_tmp39;
79043#line 504
79044  __cil_tmp41 = (long )__cil_tmp40;
79045#line 504
79046  tmp___9 = __builtin_expect(__cil_tmp41, 0L);
79047  }
79048#line 504
79049  if (tmp___9) {
79050#line 505
79051    goto err_free;
79052  } else {
79053
79054  }
79055  {
79056#line 507
79057  ret = drm_mode_create_dirty_info_property(dev);
79058#line 508
79059  __cil_tmp42 = ret != 0;
79060#line 508
79061  __cil_tmp43 = ! __cil_tmp42;
79062#line 508
79063  __cil_tmp44 = ! __cil_tmp43;
79064#line 508
79065  __cil_tmp45 = (long )__cil_tmp44;
79066#line 508
79067  tmp___10 = __builtin_expect(__cil_tmp45, 0L);
79068  }
79069#line 508
79070  if (tmp___10) {
79071#line 509
79072    goto err_vblank_cleanup;
79073  } else {
79074
79075  }
79076#line 511
79077  i = 0;
79078  {
79079#line 511
79080  while (1) {
79081    while_continue: /* CIL Label */ ;
79082#line 511
79083    if (i < 8) {
79084
79085    } else {
79086#line 511
79087      goto while_break;
79088    }
79089    {
79090#line 512
79091    __cil_tmp46 = (unsigned int )i;
79092#line 512
79093    vmw_sou_init(dev_priv, __cil_tmp46);
79094#line 511
79095    i = i + 1;
79096    }
79097  }
79098  while_break: /* CIL Label */ ;
79099  }
79100  {
79101#line 514
79102  printk("<6>[drm] Screen objects system initialized\n");
79103  }
79104#line 516
79105  return (0);
79106  err_vblank_cleanup: 
79107  {
79108#line 519
79109  drm_vblank_cleanup(dev);
79110  }
79111  err_free: 
79112  {
79113#line 521
79114  __cil_tmp47 = (unsigned long )dev_priv;
79115#line 521
79116  __cil_tmp48 = __cil_tmp47 + 2616;
79117#line 521
79118  __cil_tmp49 = *((struct vmw_screen_object_display **)__cil_tmp48);
79119#line 521
79120  __cil_tmp50 = (void    *)__cil_tmp49;
79121#line 521
79122  kfree(__cil_tmp50);
79123#line 522
79124  __cil_tmp51 = (unsigned long )dev_priv;
79125#line 522
79126  __cil_tmp52 = __cil_tmp51 + 2616;
79127#line 522
79128  __cil_tmp53 = (void *)0;
79129#line 522
79130  *((struct vmw_screen_object_display **)__cil_tmp52) = (struct vmw_screen_object_display *)__cil_tmp53;
79131  }
79132  err_no_mem: 
79133#line 524
79134  return (ret);
79135}
79136}
79137#line 527 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
79138int vmw_kms_close_screen_object_display(struct vmw_private *dev_priv ) 
79139{ struct drm_device *dev ;
79140  unsigned long __cil_tmp3 ;
79141  unsigned long __cil_tmp4 ;
79142  unsigned long __cil_tmp5 ;
79143  unsigned long __cil_tmp6 ;
79144  struct vmw_screen_object_display *__cil_tmp7 ;
79145  unsigned long __cil_tmp8 ;
79146  unsigned long __cil_tmp9 ;
79147  struct vmw_screen_object_display *__cil_tmp10 ;
79148  void    *__cil_tmp11 ;
79149
79150  {
79151#line 529
79152  __cil_tmp3 = (unsigned long )dev_priv;
79153#line 529
79154  __cil_tmp4 = __cil_tmp3 + 2088;
79155#line 529
79156  dev = *((struct drm_device **)__cil_tmp4);
79157  {
79158#line 531
79159  __cil_tmp5 = (unsigned long )dev_priv;
79160#line 531
79161  __cil_tmp6 = __cil_tmp5 + 2616;
79162#line 531
79163  __cil_tmp7 = *((struct vmw_screen_object_display **)__cil_tmp6);
79164#line 531
79165  if (! __cil_tmp7) {
79166#line 532
79167    return (-38);
79168  } else {
79169
79170  }
79171  }
79172  {
79173#line 534
79174  drm_vblank_cleanup(dev);
79175#line 536
79176  __cil_tmp8 = (unsigned long )dev_priv;
79177#line 536
79178  __cil_tmp9 = __cil_tmp8 + 2616;
79179#line 536
79180  __cil_tmp10 = *((struct vmw_screen_object_display **)__cil_tmp9);
79181#line 536
79182  __cil_tmp11 = (void    *)__cil_tmp10;
79183#line 536
79184  kfree(__cil_tmp11);
79185  }
79186#line 538
79187  return (0);
79188}
79189}
79190#line 545 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
79191bool vmw_kms_screen_object_flippable(struct vmw_private *dev_priv , struct drm_crtc *crtc ) 
79192{ struct vmw_screen_object_unit *sou ;
79193  struct drm_crtc    *__mptr ;
79194  struct vmw_screen_object_unit *__cil_tmp5 ;
79195  struct drm_crtc *__cil_tmp6 ;
79196  unsigned int __cil_tmp7 ;
79197  char *__cil_tmp8 ;
79198  char *__cil_tmp9 ;
79199  unsigned long __cil_tmp10 ;
79200  unsigned long __cil_tmp11 ;
79201  unsigned long __cil_tmp12 ;
79202  bool __cil_tmp13 ;
79203  unsigned long __cil_tmp14 ;
79204  unsigned long __cil_tmp15 ;
79205  struct vmw_screen_object_display *__cil_tmp16 ;
79206  unsigned int __cil_tmp17 ;
79207
79208  {
79209#line 548
79210  __mptr = (struct drm_crtc    *)crtc;
79211#line 548
79212  __cil_tmp5 = (struct vmw_screen_object_unit *)0;
79213#line 548
79214  __cil_tmp6 = (struct drm_crtc *)__cil_tmp5;
79215#line 548
79216  __cil_tmp7 = (unsigned int )__cil_tmp6;
79217#line 548
79218  __cil_tmp8 = (char *)__mptr;
79219#line 548
79220  __cil_tmp9 = __cil_tmp8 - __cil_tmp7;
79221#line 548
79222  sou = (struct vmw_screen_object_unit *)__cil_tmp9;
79223  {
79224#line 550
79225  __cil_tmp10 = 0 + 2064;
79226#line 550
79227  __cil_tmp11 = (unsigned long )sou;
79228#line 550
79229  __cil_tmp12 = __cil_tmp11 + __cil_tmp10;
79230#line 550
79231  __cil_tmp13 = *((bool *)__cil_tmp12);
79232#line 550
79233  if (! __cil_tmp13) {
79234#line 551
79235    return ((bool )1);
79236  } else {
79237
79238  }
79239  }
79240  {
79241#line 553
79242  __cil_tmp14 = (unsigned long )dev_priv;
79243#line 553
79244  __cil_tmp15 = __cil_tmp14 + 2616;
79245#line 553
79246  __cil_tmp16 = *((struct vmw_screen_object_display **)__cil_tmp15);
79247#line 553
79248  __cil_tmp17 = *((unsigned int *)__cil_tmp16);
79249#line 553
79250  if (__cil_tmp17 != 1U) {
79251#line 554
79252    return ((bool )0);
79253  } else {
79254
79255  }
79256  }
79257#line 556
79258  return ((bool )1);
79259}
79260}
79261#line 563 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
79262void vmw_kms_screen_object_update_implicit_fb(struct vmw_private *dev_priv , struct drm_crtc *crtc ) 
79263{ struct vmw_screen_object_unit *sou ;
79264  struct drm_crtc    *__mptr ;
79265  long tmp___7 ;
79266  struct drm_framebuffer    *__mptr___0 ;
79267  struct vmw_screen_object_unit *__cil_tmp7 ;
79268  struct drm_crtc *__cil_tmp8 ;
79269  unsigned int __cil_tmp9 ;
79270  char *__cil_tmp10 ;
79271  char *__cil_tmp11 ;
79272  unsigned long __cil_tmp12 ;
79273  unsigned long __cil_tmp13 ;
79274  unsigned long __cil_tmp14 ;
79275  bool __cil_tmp15 ;
79276  int __cil_tmp16 ;
79277  int __cil_tmp17 ;
79278  int __cil_tmp18 ;
79279  long __cil_tmp19 ;
79280  unsigned long __cil_tmp20 ;
79281  unsigned long __cil_tmp21 ;
79282  unsigned long __cil_tmp22 ;
79283  unsigned long __cil_tmp23 ;
79284  struct drm_framebuffer *__cil_tmp24 ;
79285  unsigned long __cil_tmp25 ;
79286  unsigned long __cil_tmp26 ;
79287  struct vmw_screen_object_display *__cil_tmp27 ;
79288  unsigned long __cil_tmp28 ;
79289  unsigned long __cil_tmp29 ;
79290  struct vmw_framebuffer *__cil_tmp30 ;
79291  struct drm_framebuffer *__cil_tmp31 ;
79292  unsigned int __cil_tmp32 ;
79293  char *__cil_tmp33 ;
79294  char *__cil_tmp34 ;
79295
79296  {
79297#line 566
79298  __mptr = (struct drm_crtc    *)crtc;
79299#line 566
79300  __cil_tmp7 = (struct vmw_screen_object_unit *)0;
79301#line 566
79302  __cil_tmp8 = (struct drm_crtc *)__cil_tmp7;
79303#line 566
79304  __cil_tmp9 = (unsigned int )__cil_tmp8;
79305#line 566
79306  __cil_tmp10 = (char *)__mptr;
79307#line 566
79308  __cil_tmp11 = __cil_tmp10 - __cil_tmp9;
79309#line 566
79310  sou = (struct vmw_screen_object_unit *)__cil_tmp11;
79311  {
79312#line 568
79313  while (1) {
79314    while_continue: /* CIL Label */ ;
79315    {
79316#line 568
79317    __cil_tmp12 = 0 + 2064;
79318#line 568
79319    __cil_tmp13 = (unsigned long )sou;
79320#line 568
79321    __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
79322#line 568
79323    __cil_tmp15 = *((bool *)__cil_tmp14);
79324#line 568
79325    __cil_tmp16 = ! __cil_tmp15;
79326#line 568
79327    __cil_tmp17 = ! __cil_tmp16;
79328#line 568
79329    __cil_tmp18 = ! __cil_tmp17;
79330#line 568
79331    __cil_tmp19 = (long )__cil_tmp18;
79332#line 568
79333    tmp___7 = __builtin_expect(__cil_tmp19, 0L);
79334    }
79335#line 568
79336    if (tmp___7) {
79337      {
79338#line 568
79339      while (1) {
79340        while_continue___0: /* CIL Label */ ;
79341#line 568
79342        __asm__  volatile   ("1:\tud2\n"
79343                             ".pushsection __bug_table,\"a\"\n"
79344                             "2:\t.long 1b - 2b, %c0 - 2b\n"
79345                             "\t.word %c1, 0\n"
79346                             "\t.org 2b+%c2\n"
79347                             ".popsection": : "i" ("/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"),
79348                             "i" (568), "i" (12UL));
79349        {
79350#line 568
79351        while (1) {
79352          while_continue___1: /* CIL Label */ ;
79353        }
79354        while_break___1: /* CIL Label */ ;
79355        }
79356#line 568
79357        goto while_break___0;
79358      }
79359      while_break___0: /* CIL Label */ ;
79360      }
79361    } else {
79362
79363    }
79364#line 568
79365    goto while_break;
79366  }
79367  while_break: /* CIL Label */ ;
79368  }
79369#line 571
79370  __cil_tmp20 = 0 + 32;
79371#line 571
79372  __cil_tmp21 = 0 + __cil_tmp20;
79373#line 571
79374  __cil_tmp22 = (unsigned long )sou;
79375#line 571
79376  __cil_tmp23 = __cil_tmp22 + __cil_tmp21;
79377#line 571
79378  __cil_tmp24 = *((struct drm_framebuffer **)__cil_tmp23);
79379#line 571
79380  __mptr___0 = (struct drm_framebuffer    *)__cil_tmp24;
79381#line 571
79382  __cil_tmp25 = (unsigned long )dev_priv;
79383#line 571
79384  __cil_tmp26 = __cil_tmp25 + 2616;
79385#line 571
79386  __cil_tmp27 = *((struct vmw_screen_object_display **)__cil_tmp26);
79387#line 571
79388  __cil_tmp28 = (unsigned long )__cil_tmp27;
79389#line 571
79390  __cil_tmp29 = __cil_tmp28 + 8;
79391#line 571
79392  __cil_tmp30 = (struct vmw_framebuffer *)0;
79393#line 571
79394  __cil_tmp31 = (struct drm_framebuffer *)__cil_tmp30;
79395#line 571
79396  __cil_tmp32 = (unsigned int )__cil_tmp31;
79397#line 571
79398  __cil_tmp33 = (char *)__mptr___0;
79399#line 571
79400  __cil_tmp34 = __cil_tmp33 - __cil_tmp32;
79401#line 571
79402  *((struct vmw_framebuffer **)__cil_tmp29) = (struct vmw_framebuffer *)__cil_tmp34;
79403#line 572
79404  return;
79405}
79406}
79407#line 605 "/home/zakharov/launch/work/current--X--drivers/--X--defaultlinux-3.4--X--32_1--X--cpachecker/linux-3.4/csd_deg_dscv/6447/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c"
79408void ldv_main17_sequence_infinite_withcheck_stateful(void) 
79409{ struct drm_crtc *var_group1 ;
79410  struct drm_mode_set *var_group2 ;
79411  struct drm_encoder *var_group3 ;
79412  struct drm_connector *var_group4 ;
79413  int tmp___7 ;
79414  int tmp___8 ;
79415
79416  {
79417  {
79418#line 667
79419  LDV_IN_INTERRUPT = 1;
79420#line 676
79421  ldv_initialize();
79422  }
79423  {
79424#line 684
79425  while (1) {
79426    while_continue: /* CIL Label */ ;
79427    {
79428#line 684
79429    tmp___8 = __VERIFIER_nondet_int();
79430    }
79431#line 684
79432    if (tmp___8) {
79433
79434    } else {
79435#line 684
79436      goto while_break;
79437    }
79438    {
79439#line 687
79440    tmp___7 = __VERIFIER_nondet_int();
79441    }
79442#line 689
79443    if (tmp___7 == 0) {
79444#line 689
79445      goto case_0;
79446    } else
79447#line 712
79448    if (tmp___7 == 1) {
79449#line 712
79450      goto case_1;
79451    } else
79452#line 735
79453    if (tmp___7 == 2) {
79454#line 735
79455      goto case_2;
79456    } else
79457#line 758
79458    if (tmp___7 == 3) {
79459#line 758
79460      goto case_3;
79461    } else {
79462      {
79463#line 781
79464      goto switch_default;
79465#line 687
79466      if (0) {
79467        case_0: /* CIL Label */ 
79468        {
79469#line 704
79470        vmw_sou_crtc_destroy(var_group1);
79471        }
79472#line 711
79473        goto switch_break;
79474        case_1: /* CIL Label */ 
79475        {
79476#line 727
79477        vmw_sou_crtc_set_config(var_group2);
79478        }
79479#line 734
79480        goto switch_break;
79481        case_2: /* CIL Label */ 
79482        {
79483#line 750
79484        vmw_sou_encoder_destroy(var_group3);
79485        }
79486#line 757
79487        goto switch_break;
79488        case_3: /* CIL Label */ 
79489        {
79490#line 773
79491        vmw_sou_connector_destroy(var_group4);
79492        }
79493#line 780
79494        goto switch_break;
79495        switch_default: /* CIL Label */ 
79496#line 781
79497        goto switch_break;
79498      } else {
79499        switch_break: /* CIL Label */ ;
79500      }
79501      }
79502    }
79503  }
79504  while_break: /* CIL Label */ ;
79505  }
79506  {
79507#line 790
79508  ldv_check_final_state();
79509  }
79510#line 793
79511  return;
79512}
79513}