ClabureDB: Classified Bug-Reports Database

    /* Generated by CIL v. 1.3.7 */
    /* print_CIL_Input is true */
    
    #line 19 "include/asm-generic/int-ll64.h"
    typedef signed char __s8;
    #line 20 "include/asm-generic/int-ll64.h"
    typedef unsigned char __u8;
    #line 22 "include/asm-generic/int-ll64.h"
    typedef short __s16;
   #line 23 "include/asm-generic/int-ll64.h"
   typedef unsigned short __u16;
   #line 25 "include/asm-generic/int-ll64.h"
   typedef int __s32;
   #line 26 "include/asm-generic/int-ll64.h"
   typedef unsigned int __u32;
   #line 29 "include/asm-generic/int-ll64.h"
   typedef long long __s64;
   #line 30 "include/asm-generic/int-ll64.h"
   typedef unsigned long long __u64;
   #line 43 "include/asm-generic/int-ll64.h"
   typedef unsigned char u8;
   #line 46 "include/asm-generic/int-ll64.h"
   typedef unsigned short u16;
   #line 48 "include/asm-generic/int-ll64.h"
   typedef int s32;
   #line 49 "include/asm-generic/int-ll64.h"
   typedef unsigned int u32;
   #line 51 "include/asm-generic/int-ll64.h"
   typedef long long s64;
   #line 52 "include/asm-generic/int-ll64.h"
   typedef unsigned long long u64;
   #line 11 "include/asm-generic/types.h"
   typedef unsigned short umode_t;
   #line 11 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef unsigned int __kernel_mode_t;
   #line 12 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef unsigned long __kernel_nlink_t;
   #line 13 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef long __kernel_off_t;
   #line 14 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef int __kernel_pid_t;
   #line 16 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef unsigned int __kernel_uid_t;
   #line 17 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef unsigned int __kernel_gid_t;
   #line 18 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef unsigned long __kernel_size_t;
   #line 19 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef long __kernel_ssize_t;
   #line 21 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef long __kernel_time_t;
   #line 23 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef long __kernel_clock_t;
   #line 24 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef int __kernel_timer_t;
   #line 25 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef int __kernel_clockid_t;
   #line 32 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef long long __kernel_loff_t;
   #line 41 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef __kernel_uid_t __kernel_uid32_t;
   #line 42 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/posix_types_64.h"
   typedef __kernel_gid_t __kernel_gid32_t;
   #line 21 "include/linux/types.h"
   typedef __u32 __kernel_dev_t;
   #line 24 "include/linux/types.h"
   typedef __kernel_dev_t dev_t;
   #line 26 "include/linux/types.h"
   typedef __kernel_mode_t mode_t;
   #line 27 "include/linux/types.h"
   typedef __kernel_nlink_t nlink_t;
   #line 28 "include/linux/types.h"
   typedef __kernel_off_t off_t;
   #line 29 "include/linux/types.h"
   typedef __kernel_pid_t pid_t;
   #line 34 "include/linux/types.h"
   typedef __kernel_clockid_t clockid_t;
   #line 37 "include/linux/types.h"
   typedef _Bool bool;
   #line 39 "include/linux/types.h"
   typedef __kernel_uid32_t uid_t;
   #line 40 "include/linux/types.h"
   typedef __kernel_gid32_t gid_t;
   #line 53 "include/linux/types.h"
   typedef __kernel_loff_t loff_t;
   #line 62 "include/linux/types.h"
   typedef __kernel_size_t size_t;
   #line 67 "include/linux/types.h"
   typedef __kernel_ssize_t ssize_t;
   #line 77 "include/linux/types.h"
   typedef __kernel_time_t time_t;
   #line 110 "include/linux/types.h"
   typedef __s32 int32_t;
   #line 116 "include/linux/types.h"
   typedef __u32 uint32_t;
   #line 119 "include/linux/types.h"
   typedef __u64 uint64_t;
   #line 141 "include/linux/types.h"
   typedef unsigned long sector_t;
  #line 142 "include/linux/types.h"
  typedef unsigned long blkcnt_t;
  #line 154 "include/linux/types.h"
  typedef u64 dma_addr_t;
  #line 178 "include/linux/types.h"
  typedef __u16 __be16;
  #line 180 "include/linux/types.h"
  typedef __u32 __be32;
  #line 185 "include/linux/types.h"
  typedef __u32 __wsum;
  #line 201 "include/linux/types.h"
  typedef unsigned int gfp_t;
  #line 202 "include/linux/types.h"
  typedef unsigned int fmode_t;
  #line 205 "include/linux/types.h"
  typedef u64 phys_addr_t;
  #line 210 "include/linux/types.h"
  typedef phys_addr_t resource_size_t;
  #line 214 "include/linux/types.h"
  struct __anonstruct_atomic_t_6 {
     int counter ;
  };
  #line 214 "include/linux/types.h"
  typedef struct __anonstruct_atomic_t_6 atomic_t;
  #line 219 "include/linux/types.h"
  struct __anonstruct_atomic64_t_7 {
     long counter ;
  };
  #line 219 "include/linux/types.h"
  typedef struct __anonstruct_atomic64_t_7 atomic64_t;
  #line 220 "include/linux/types.h"
  struct list_head {
     struct list_head *next ;
     struct list_head *prev ;
  };
  #line 225
  struct hlist_node;
  #line 225
  struct hlist_node;
  #line 225 "include/linux/types.h"
  struct hlist_head {
     struct hlist_node *first ;
  };
  #line 229 "include/linux/types.h"
  struct hlist_node {
     struct hlist_node *next ;
     struct hlist_node **pprev ;
  };
  #line 58 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/alternative.h"
  struct module;
  #line 58
  struct module;
  #line 145 "include/linux/init.h"
  typedef void (*ctor_fn_t)(void);
  #line 48 "include/linux/dynamic_debug.h"
  struct bug_entry {
     int bug_addr_disp ;
     int file_disp ;
     unsigned short line ;
     unsigned short flags ;
  };
  #line 70 "include/asm-generic/bug.h"
  struct completion;
  #line 70
  struct completion;
  #line 71
  struct pt_regs;
  #line 71
  struct pt_regs;
  #line 321 "include/linux/kernel.h"
  struct pid;
  #line 321
  struct pid;
  #line 671
  struct timespec;
  #line 671
  struct timespec;
  #line 59 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/page_types.h"
  struct page;
  #line 59
  struct page;
  #line 21 "include/asm-generic/getorder.h"
  struct task_struct;
  #line 21
  struct task_struct;
  #line 23
  struct mm_struct;
  #line 23
  struct mm_struct;
  #line 215 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/segment.h"
  struct pt_regs {
     unsigned long r15 ;
     unsigned long r14 ;
     unsigned long r13 ;
     unsigned long r12 ;
     unsigned long bp ;
     unsigned long bx ;
     unsigned long r11 ;
     unsigned long r10 ;
     unsigned long r9 ;
     unsigned long r8 ;
     unsigned long ax ;
     unsigned long cx ;
     unsigned long dx ;
     unsigned long si ;
     unsigned long di ;
     unsigned long orig_ax ;
     unsigned long ip ;
     unsigned long cs ;
     unsigned long flags ;
     unsigned long sp ;
     unsigned long ss ;
  };
  #line 282 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/ptrace.h"
  struct kernel_vm86_regs {
     struct pt_regs pt ;
     unsigned short es ;
     unsigned short __esh ;
     unsigned short ds ;
     unsigned short __dsh ;
     unsigned short fs ;
     unsigned short __fsh ;
     unsigned short gs ;
     unsigned short __gsh ;
  };
  #line 203 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/vm86.h"
  union __anonunion_ldv_2292_12 {
     struct pt_regs *regs ;
     struct kernel_vm86_regs *vm86 ;
  };
  #line 203 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/vm86.h"
  struct math_emu_info {
     long ___orig_eip ;
     union __anonunion_ldv_2292_12 ldv_2292 ;
  };
  #line 13 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_64_types.h"
  typedef unsigned long pgdval_t;
  #line 14 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_64_types.h"
  typedef unsigned long pgprotval_t;
  #line 18 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_64_types.h"
  struct pgprot {
     pgprotval_t pgprot ;
  };
  #line 190 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  typedef struct pgprot pgprot_t;
  #line 192 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  struct __anonstruct_pgd_t_15 {
     pgdval_t pgd ;
  };
  #line 192 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  typedef struct __anonstruct_pgd_t_15 pgd_t;
  #line 280 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  typedef struct page *pgtable_t;
  #line 288
  struct file;
  #line 288
  struct file;
  #line 303
  struct seq_file;
  #line 303
  struct seq_file;
  #line 335 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  struct __anonstruct_ldv_2526_19 {
     unsigned int a ;
     unsigned int b ;
  };
  #line 335 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  struct __anonstruct_ldv_2541_20 {
     u16 limit0 ;
     u16 base0 ;
     unsigned char base1 ;
     unsigned char type : 4 ;
     unsigned char s : 1 ;
     unsigned char dpl : 2 ;
     unsigned char p : 1 ;
     unsigned char limit : 4 ;
     unsigned char avl : 1 ;
     unsigned char l : 1 ;
     unsigned char d : 1 ;
     unsigned char g : 1 ;
     unsigned char base2 ;
  };
  #line 335 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  union __anonunion_ldv_2542_18 {
     struct __anonstruct_ldv_2526_19 ldv_2526 ;
     struct __anonstruct_ldv_2541_20 ldv_2541 ;
  };
  #line 335 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/pgtable_types.h"
  struct desc_struct {
     union __anonunion_ldv_2542_18 ldv_2542 ;
  };
  #line 122 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/desc_defs.h"
  struct thread_struct;
  #line 122
  struct thread_struct;
  #line 124
  struct cpumask;
  #line 124
  struct cpumask;
  #line 320 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/paravirt_types.h"
  struct arch_spinlock;
  #line 320
  struct arch_spinlock;
  #line 304 "include/linux/bitmap.h"
  struct cpumask {
     unsigned long bits[64U] ;
  };
  #line 13 "include/linux/cpumask.h"
  typedef struct cpumask cpumask_t;
  #line 622 "include/linux/cpumask.h"
  typedef struct cpumask *cpumask_var_t;
  #line 145 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct seq_operations;
  #line 145
  struct seq_operations;
  #line 277 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct i387_fsave_struct {
     u32 cwd ;
     u32 swd ;
     u32 twd ;
     u32 fip ;
     u32 fcs ;
     u32 foo ;
     u32 fos ;
     u32 st_space[20U] ;
     u32 status ;
  };
  #line 295 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct __anonstruct_ldv_5171_24 {
     u64 rip ;
     u64 rdp ;
  };
  #line 295 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct __anonstruct_ldv_5177_25 {
     u32 fip ;
     u32 fcs ;
     u32 foo ;
     u32 fos ;
  };
  #line 295 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  union __anonunion_ldv_5178_23 {
     struct __anonstruct_ldv_5171_24 ldv_5171 ;
     struct __anonstruct_ldv_5177_25 ldv_5177 ;
  };
  #line 295 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  union __anonunion_ldv_5187_26 {
     u32 padding1[12U] ;
     u32 sw_reserved[12U] ;
  };
  #line 295 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct i387_fxsave_struct {
     u16 cwd ;
     u16 swd ;
     u16 twd ;
     u16 fop ;
     union __anonunion_ldv_5178_23 ldv_5178 ;
     u32 mxcsr ;
     u32 mxcsr_mask ;
     u32 st_space[32U] ;
     u32 xmm_space[64U] ;
     u32 padding[12U] ;
     union __anonunion_ldv_5187_26 ldv_5187 ;
  };
  #line 329 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct i387_soft_struct {
     u32 cwd ;
     u32 swd ;
     u32 twd ;
     u32 fip ;
     u32 fcs ;
     u32 foo ;
     u32 fos ;
     u32 st_space[20U] ;
     u8 ftop ;
     u8 changed ;
     u8 lookahead ;
     u8 no_update ;
     u8 rm ;
     u8 alimit ;
     struct math_emu_info *info ;
     u32 entry_eip ;
  };
  #line 350 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct ymmh_struct {
     u32 ymmh_space[64U] ;
  };
  #line 355 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct xsave_hdr_struct {
     u64 xstate_bv ;
     u64 reserved1[2U] ;
     u64 reserved2[5U] ;
  };
  #line 361 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct xsave_struct {
     struct i387_fxsave_struct i387 ;
     struct xsave_hdr_struct xsave_hdr ;
     struct ymmh_struct ymmh ;
  };
  #line 367 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  union thread_xstate {
     struct i387_fsave_struct fsave ;
     struct i387_fxsave_struct fxsave ;
     struct i387_soft_struct soft ;
     struct xsave_struct xsave ;
  };
  #line 375 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct fpu {
     union thread_xstate *state ;
  };
  #line 421
  struct kmem_cache;
  #line 421
  struct kmem_cache;
  #line 422
  struct perf_event;
  #line 422
  struct perf_event;
  #line 423 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/processor.h"
  struct thread_struct {
     struct desc_struct tls_array[3U] ;
     unsigned long sp0 ;
     unsigned long sp ;
     unsigned long usersp ;
     unsigned short es ;
     unsigned short ds ;
     unsigned short fsindex ;
     unsigned short gsindex ;
     unsigned long fs ;
     unsigned long gs ;
     struct perf_event *ptrace_bps[4U] ;
     unsigned long debugreg6 ;
     unsigned long ptrace_dr7 ;
     unsigned long cr2 ;
     unsigned long trap_no ;
     unsigned long error_code ;
     struct fpu fpu ;
     unsigned long *io_bitmap_ptr ;
     unsigned long iopl ;
     unsigned int io_bitmap_max ;
  };
  #line 23 "include/asm-generic/atomic-long.h"
  typedef atomic64_t atomic_long_t;
  #line 8 "include/linux/bottom_half.h"
  struct arch_spinlock {
     unsigned int slock ;
  };
  #line 10 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/spinlock_types.h"
  typedef struct arch_spinlock arch_spinlock_t;
  #line 16 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/spinlock_types.h"
  struct __anonstruct_arch_rwlock_t_29 {
     unsigned int lock ;
  };
  #line 16 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/spinlock_types.h"
  typedef struct __anonstruct_arch_rwlock_t_29 arch_rwlock_t;
  #line 17
  struct lockdep_map;
  #line 17
  struct lockdep_map;
  #line 55 "include/linux/debug_locks.h"
  struct stack_trace {
     unsigned int nr_entries ;
     unsigned int max_entries ;
     unsigned long *entries ;
     int skip ;
  };
  #line 26 "include/linux/stacktrace.h"
  struct lockdep_subclass_key {
     char __one_byte ;
  };
  #line 53 "include/linux/lockdep.h"
  struct lock_class_key {
     struct lockdep_subclass_key subkeys[8U] ;
  };
  #line 59 "include/linux/lockdep.h"
  struct lock_class {
     struct list_head hash_entry ;
     struct list_head lock_entry ;
     struct lockdep_subclass_key *key ;
     unsigned int subclass ;
     unsigned int dep_gen_id ;
     unsigned long usage_mask ;
     struct stack_trace usage_traces[13U] ;
     struct list_head locks_after ;
     struct list_head locks_before ;
     unsigned int version ;
     unsigned long ops ;
     char const   *name ;
     int name_version ;
     unsigned long contention_point[4U] ;
     unsigned long contending_point[4U] ;
  };
  #line 144 "include/linux/lockdep.h"
  struct lockdep_map {
     struct lock_class_key *key ;
     struct lock_class *class_cache[2U] ;
     char const   *name ;
     int cpu ;
     unsigned long ip ;
  };
  #line 187 "include/linux/lockdep.h"
  struct held_lock {
     u64 prev_chain_key ;
     unsigned long acquire_ip ;
     struct lockdep_map *instance ;
     struct lockdep_map *nest_lock ;
     u64 waittime_stamp ;
     u64 holdtime_stamp ;
     unsigned short class_idx : 13 ;
     unsigned char irq_context : 2 ;
     unsigned char trylock : 1 ;
     unsigned char read : 2 ;
     unsigned char check : 2 ;
     unsigned char hardirqs_off : 1 ;
     unsigned short references : 11 ;
  };
  #line 552 "include/linux/lockdep.h"
  struct raw_spinlock {
     arch_spinlock_t raw_lock ;
     unsigned int magic ;
     unsigned int owner_cpu ;
     void *owner ;
     struct lockdep_map dep_map ;
  };
  #line 32 "include/linux/spinlock_types.h"
  typedef struct raw_spinlock raw_spinlock_t;
  #line 33 "include/linux/spinlock_types.h"
  struct __anonstruct_ldv_6059_31 {
     u8 __padding[24U] ;
     struct lockdep_map dep_map ;
  };
  #line 33 "include/linux/spinlock_types.h"
  union __anonunion_ldv_6060_30 {
     struct raw_spinlock rlock ;
     struct __anonstruct_ldv_6059_31 ldv_6059 ;
  };
  #line 33 "include/linux/spinlock_types.h"
  struct spinlock {
     union __anonunion_ldv_6060_30 ldv_6060 ;
  };
  #line 76 "include/linux/spinlock_types.h"
  typedef struct spinlock spinlock_t;
  #line 23 "include/linux/rwlock_types.h"
  struct __anonstruct_rwlock_t_32 {
     arch_rwlock_t raw_lock ;
     unsigned int magic ;
     unsigned int owner_cpu ;
     void *owner ;
     struct lockdep_map dep_map ;
  };
  #line 23 "include/linux/rwlock_types.h"
  typedef struct __anonstruct_rwlock_t_32 rwlock_t;
  #line 36 "include/linux/seqlock.h"
  struct __anonstruct_seqlock_t_33 {
     unsigned int sequence ;
     spinlock_t lock ;
  };
  #line 36 "include/linux/seqlock.h"
  typedef struct __anonstruct_seqlock_t_33 seqlock_t;
  #line 110 "include/linux/seqlock.h"
  struct seqcount {
     unsigned int sequence ;
  };
  #line 121 "include/linux/seqlock.h"
  typedef struct seqcount seqcount_t;
  #line 233 "include/linux/seqlock.h"
  struct timespec {
     __kernel_time_t tv_sec ;
     long tv_nsec ;
  };
  #line 286 "include/linux/time.h"
  struct kstat {
     u64 ino ;
     dev_t dev ;
     umode_t mode ;
     unsigned int nlink ;
     uid_t uid ;
     gid_t gid ;
     dev_t rdev ;
     loff_t size ;
     struct timespec atime ;
     struct timespec mtime ;
     struct timespec ctime ;
     unsigned long blksize ;
     unsigned long long blocks ;
  };
  #line 49 "include/linux/wait.h"
  struct __wait_queue_head {
     spinlock_t lock ;
     struct list_head task_list ;
  };
  #line 54 "include/linux/wait.h"
  typedef struct __wait_queue_head wait_queue_head_t;
  #line 96 "include/linux/nodemask.h"
  struct __anonstruct_nodemask_t_34 {
     unsigned long bits[16U] ;
  };
  #line 96 "include/linux/nodemask.h"
  typedef struct __anonstruct_nodemask_t_34 nodemask_t;
  #line 640 "include/linux/mmzone.h"
  struct mutex {
     atomic_t count ;
     spinlock_t wait_lock ;
     struct list_head wait_list ;
     struct task_struct *owner ;
     char const   *name ;
     void *magic ;
     struct lockdep_map dep_map ;
  };
  #line 63 "include/linux/mutex.h"
  struct mutex_waiter {
     struct list_head list ;
     struct task_struct *task ;
     void *magic ;
  };
  #line 171
  struct rw_semaphore;
  #line 171
  struct rw_semaphore;
  #line 172 "include/linux/mutex.h"
  struct rw_semaphore {
     long count ;
     spinlock_t wait_lock ;
     struct list_head wait_list ;
     struct lockdep_map dep_map ;
  };
  #line 763 "include/linux/mmzone.h"
  struct ctl_table;
  #line 763
  struct ctl_table;
  #line 139 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/e820.h"
  struct resource {
     resource_size_t start ;
     resource_size_t end ;
     char const   *name ;
     unsigned long flags ;
     struct resource *parent ;
     struct resource *sibling ;
     struct resource *child ;
  };
  #line 25 "include/linux/ioport.h"
  struct pci_dev;
  #line 25
  struct pci_dev;
  #line 175
  struct device;
  #line 175
  struct device;
  #line 312 "include/linux/jiffies.h"
  union ktime {
     s64 tv64 ;
  };
  #line 59 "include/linux/ktime.h"
  typedef union ktime ktime_t;
  #line 99 "include/linux/debugobjects.h"
  struct tvec_base;
  #line 99
  struct tvec_base;
  #line 100 "include/linux/debugobjects.h"
  struct timer_list {
     struct list_head entry ;
     unsigned long expires ;
     struct tvec_base *base ;
     void (*function)(unsigned long  ) ;
     unsigned long data ;
     int slack ;
     int start_pid ;
     void *start_site ;
     char start_comm[16U] ;
     struct lockdep_map lockdep_map ;
  };
  #line 289 "include/linux/timer.h"
  struct hrtimer;
  #line 289
  struct hrtimer;
  #line 290
  enum hrtimer_restart;
  #line 290
  enum hrtimer_restart;
  #line 290
  enum hrtimer_restart;
  #line 302
  struct work_struct;
  #line 302
  struct work_struct;
  #line 45 "include/linux/workqueue.h"
  struct work_struct {
     atomic_long_t data ;
     struct list_head entry ;
     void (*func)(struct work_struct * ) ;
     struct lockdep_map lockdep_map ;
  };
  #line 86 "include/linux/workqueue.h"
  struct delayed_work {
     struct work_struct work ;
     struct timer_list timer ;
  };
  #line 443 "include/linux/workqueue.h"
  struct completion {
     unsigned int done ;
     wait_queue_head_t wait ;
  };
  #line 46 "include/linux/pm.h"
  struct pm_message {
     int event ;
  };
  #line 52 "include/linux/pm.h"
  typedef struct pm_message pm_message_t;
  #line 53 "include/linux/pm.h"
  struct dev_pm_ops {
     int (*prepare)(struct device * ) ;
     void (*complete)(struct device * ) ;
     int (*suspend)(struct device * ) ;
     int (*resume)(struct device * ) ;
     int (*freeze)(struct device * ) ;
     int (*thaw)(struct device * ) ;
     int (*poweroff)(struct device * ) ;
     int (*restore)(struct device * ) ;
     int (*suspend_noirq)(struct device * ) ;
     int (*resume_noirq)(struct device * ) ;
     int (*freeze_noirq)(struct device * ) ;
     int (*thaw_noirq)(struct device * ) ;
     int (*poweroff_noirq)(struct device * ) ;
     int (*restore_noirq)(struct device * ) ;
     int (*runtime_suspend)(struct device * ) ;
     int (*runtime_resume)(struct device * ) ;
     int (*runtime_idle)(struct device * ) ;
  };
  #line 272
  enum rpm_status {
      RPM_ACTIVE = 0,
      RPM_RESUMING = 1,
      RPM_SUSPENDED = 2,
      RPM_SUSPENDING = 3
  } ;
  #line 279
  enum rpm_request {
      RPM_REQ_NONE = 0,
      RPM_REQ_IDLE = 1,
      RPM_REQ_SUSPEND = 2,
      RPM_REQ_AUTOSUSPEND = 3,
      RPM_REQ_RESUME = 4
  } ;
  #line 287
  struct wakeup_source;
  #line 287
  struct wakeup_source;
  #line 288 "include/linux/pm.h"
  struct dev_pm_info {
     pm_message_t power_state ;
     unsigned char can_wakeup : 1 ;
     unsigned char async_suspend : 1 ;
     bool is_prepared ;
     bool is_suspended ;
     spinlock_t lock ;
     struct list_head entry ;
     struct completion completion ;
     struct wakeup_source *wakeup ;
     struct timer_list suspend_timer ;
     unsigned long timer_expires ;
     struct work_struct work ;
     wait_queue_head_t wait_queue ;
     atomic_t usage_count ;
     atomic_t child_count ;
     unsigned char disable_depth : 3 ;
     unsigned char ignore_children : 1 ;
     unsigned char idle_notification : 1 ;
     unsigned char request_pending : 1 ;
     unsigned char deferred_resume : 1 ;
     unsigned char run_wake : 1 ;
     unsigned char runtime_auto : 1 ;
     unsigned char no_callbacks : 1 ;
     unsigned char irq_safe : 1 ;
     unsigned char use_autosuspend : 1 ;
     unsigned char timer_autosuspends : 1 ;
     enum rpm_request request ;
     enum rpm_status runtime_status ;
     int runtime_error ;
     int autosuspend_delay ;
     unsigned long last_busy ;
     unsigned long active_jiffies ;
     unsigned long suspended_jiffies ;
     unsigned long accounting_timestamp ;
     void *subsys_data ;
  };
  #line 469 "include/linux/pm.h"
  struct dev_power_domain {
     struct dev_pm_ops ops ;
  };
  #line 175 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/topology.h"
  struct pci_bus;
  #line 175
  struct pci_bus;
  #line 22 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/mmu.h"
  struct __anonstruct_mm_context_t_99 {
     void *ldt ;
     int size ;
     unsigned short ia32_compat ;
     struct mutex lock ;
     void *vdso ;
  };
  #line 22 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/mmu.h"
  typedef struct __anonstruct_mm_context_t_99 mm_context_t;
  #line 71 "include/asm-generic/iomap.h"
  struct vm_area_struct;
  #line 71
  struct vm_area_struct;
  #line 53 "include/linux/rcupdate.h"
  struct rcu_head {
     struct rcu_head *next ;
     void (*func)(struct rcu_head * ) ;
  };
  #line 841
  struct nsproxy;
  #line 841
  struct nsproxy;
  #line 842
  struct ctl_table_root;
  #line 842
  struct ctl_table_root;
  #line 843 "include/linux/rcupdate.h"
  struct ctl_table_set {
     struct list_head list ;
     struct ctl_table_set *parent ;
     int (*is_seen)(struct ctl_table_set * ) ;
  };
  #line 947 "include/linux/sysctl.h"
  struct ctl_table_header;
  #line 947
  struct ctl_table_header;
  #line 965 "include/linux/sysctl.h"
  typedef int proc_handler(struct ctl_table * , int  , void * , size_t * , loff_t * );
  #line 985 "include/linux/sysctl.h"
  struct ctl_table {
     char const   *procname ;
     void *data ;
     int maxlen ;
     mode_t mode ;
     struct ctl_table *child ;
     struct ctl_table *parent ;
     proc_handler *proc_handler ;
     void *extra1 ;
     void *extra2 ;
  };
  #line 1027 "include/linux/sysctl.h"
  struct ctl_table_root {
     struct list_head root_list ;
     struct ctl_table_set default_set ;
     struct ctl_table_set *(*lookup)(struct ctl_table_root * , struct nsproxy * ) ;
     int (*permissions)(struct ctl_table_root * , struct nsproxy * , struct ctl_table * ) ;
  };
  #line 1035 "include/linux/sysctl.h"
  struct __anonstruct_ldv_12193_124 {
     struct ctl_table *ctl_table ;
     struct list_head ctl_entry ;
     int used ;
     int count ;
  };
  #line 1035 "include/linux/sysctl.h"
  union __anonunion_ldv_12195_123 {
     struct __anonstruct_ldv_12193_124 ldv_12193 ;
     struct rcu_head rcu ;
  };
  #line 1035 "include/linux/sysctl.h"
  struct ctl_table_header {
     union __anonunion_ldv_12195_123 ldv_12195 ;
     struct completion *unregistering ;
     struct ctl_table *ctl_table_arg ;
     struct ctl_table_root *root ;
     struct ctl_table_set *set ;
     struct ctl_table *attached_by ;
     struct ctl_table *attached_to ;
     struct ctl_table_header *parent ;
  };
  #line 36 "include/linux/kmod.h"
  struct cred;
  #line 36
  struct cred;
  #line 27 "include/linux/elf.h"
  typedef __u64 Elf64_Addr;
  #line 28 "include/linux/elf.h"
  typedef __u16 Elf64_Half;
  #line 32 "include/linux/elf.h"
  typedef __u32 Elf64_Word;
  #line 33 "include/linux/elf.h"
  typedef __u64 Elf64_Xword;
  #line 202 "include/linux/elf.h"
  struct elf64_sym {
     Elf64_Word st_name ;
     unsigned char st_info ;
     unsigned char st_other ;
     Elf64_Half st_shndx ;
     Elf64_Addr st_value ;
     Elf64_Xword st_size ;
  };
  #line 210 "include/linux/elf.h"
  typedef struct elf64_sym Elf64_Sym;
  #line 444
  struct sock;
  #line 444
  struct sock;
  #line 445
  struct kobject;
  #line 445
  struct kobject;
  #line 446
  enum kobj_ns_type {
      KOBJ_NS_TYPE_NONE = 0,
      KOBJ_NS_TYPE_NET = 1,
      KOBJ_NS_TYPES = 2
  } ;
  #line 452 "include/linux/elf.h"
  struct kobj_ns_type_operations {
     enum kobj_ns_type type ;
     void *(*grab_current_ns)(void) ;
     void const   *(*netlink_ns)(struct sock * ) ;
     void const   *(*initial_ns)(void) ;
     void (*drop_ns)(void * ) ;
  };
  #line 57 "include/linux/kobject_ns.h"
  struct attribute {
     char const   *name ;
     mode_t mode ;
     struct lock_class_key *key ;
     struct lock_class_key skey ;
  };
  #line 33 "include/linux/sysfs.h"
  struct attribute_group {
     char const   *name ;
     mode_t (*is_visible)(struct kobject * , struct attribute * , int  ) ;
     struct attribute **attrs ;
  };
  #line 62 "include/linux/sysfs.h"
  struct bin_attribute {
     struct attribute attr ;
     size_t size ;
     void *private ;
     ssize_t (*read)(struct file * , struct kobject * , struct bin_attribute * , char * ,
                     loff_t  , size_t  ) ;
     ssize_t (*write)(struct file * , struct kobject * , struct bin_attribute * , char * ,
                      loff_t  , size_t  ) ;
     int (*mmap)(struct file * , struct kobject * , struct bin_attribute * , struct vm_area_struct * ) ;
  };
  #line 98 "include/linux/sysfs.h"
  struct sysfs_ops {
     ssize_t (*show)(struct kobject * , struct attribute * , char * ) ;
     ssize_t (*store)(struct kobject * , struct attribute * , char const   * , size_t  ) ;
  };
  #line 116
  struct sysfs_dirent;
  #line 116
  struct sysfs_dirent;
  #line 181 "include/linux/sysfs.h"
  struct kref {
     atomic_t refcount ;
  };
  #line 49 "include/linux/kobject.h"
  struct kset;
  #line 49
  struct kset;
  #line 49
  struct kobj_type;
  #line 49
  struct kobj_type;
  #line 49 "include/linux/kobject.h"
  struct kobject {
     char const   *name ;
     struct list_head entry ;
     struct kobject *parent ;
     struct kset *kset ;
     struct kobj_type *ktype ;
     struct sysfs_dirent *sd ;
     struct kref kref ;
     unsigned char state_initialized : 1 ;
     unsigned char state_in_sysfs : 1 ;
     unsigned char state_add_uevent_sent : 1 ;
     unsigned char state_remove_uevent_sent : 1 ;
     unsigned char uevent_suppress : 1 ;
  };
  #line 109 "include/linux/kobject.h"
  struct kobj_type {
     void (*release)(struct kobject * ) ;
     struct sysfs_ops  const  *sysfs_ops ;
     struct attribute **default_attrs ;
     struct kobj_ns_type_operations  const  *(*child_ns_type)(struct kobject * ) ;
     void const   *(*namespace)(struct kobject * ) ;
  };
  #line 117 "include/linux/kobject.h"
  struct kobj_uevent_env {
     char *envp[32U] ;
     int envp_idx ;
     char buf[2048U] ;
     int buflen ;
  };
  #line 124 "include/linux/kobject.h"
  struct kset_uevent_ops {
     int (* const  filter)(struct kset * , struct kobject * ) ;
     char const   *(* const  name)(struct kset * , struct kobject * ) ;
     int (* const  uevent)(struct kset * , struct kobject * , struct kobj_uevent_env * ) ;
  };
  #line 141 "include/linux/kobject.h"
 struct kset {
    struct list_head list ;
    spinlock_t list_lock ;
    struct kobject kobj ;
    struct kset_uevent_ops  const  *uevent_ops ;
 };
 #line 219
 struct kernel_param;
 #line 219
 struct kernel_param;
 #line 220 "include/linux/kobject.h"
 struct kernel_param_ops {
    int (*set)(char const   * , struct kernel_param  const  * ) ;
    int (*get)(char * , struct kernel_param  const  * ) ;
    void (*free)(void * ) ;
 };
 #line 44 "include/linux/moduleparam.h"
 struct kparam_string;
 #line 44
 struct kparam_string;
 #line 44
 struct kparam_array;
 #line 44
 struct kparam_array;
 #line 44 "include/linux/moduleparam.h"
 union __anonunion_ldv_12924_129 {
    void *arg ;
    struct kparam_string  const  *str ;
    struct kparam_array  const  *arr ;
 };
 #line 44 "include/linux/moduleparam.h"
 struct kernel_param {
    char const   *name ;
    struct kernel_param_ops  const  *ops ;
    u16 perm ;
    u16 flags ;
    union __anonunion_ldv_12924_129 ldv_12924 ;
 };
 #line 59 "include/linux/moduleparam.h"
 struct kparam_string {
    unsigned int maxlen ;
    char *string ;
 };
 #line 65 "include/linux/moduleparam.h"
 struct kparam_array {
    unsigned int max ;
    unsigned int elemsize ;
    unsigned int *num ;
    struct kernel_param_ops  const  *ops ;
    void *elem ;
 };
 #line 404 "include/linux/moduleparam.h"
 struct jump_label_key {
    atomic_t enabled ;
 };
 #line 99 "include/linux/jump_label.h"
 struct tracepoint;
 #line 99
 struct tracepoint;
 #line 100 "include/linux/jump_label.h"
 struct tracepoint_func {
    void *func ;
    void *data ;
 };
 #line 29 "include/linux/tracepoint.h"
 struct tracepoint {
    char const   *name ;
    struct jump_label_key key ;
    void (*regfunc)(void) ;
    void (*unregfunc)(void) ;
    struct tracepoint_func *funcs ;
 };
 #line 84 "include/linux/tracepoint.h"
 struct mod_arch_specific {
 
 };
 #line 127 "include/trace/events/module.h"
 struct kernel_symbol {
    unsigned long value ;
    char const   *name ;
 };
 #line 48 "include/linux/module.h"
 struct module_attribute {
    struct attribute attr ;
    ssize_t (*show)(struct module_attribute * , struct module * , char * ) ;
    ssize_t (*store)(struct module_attribute * , struct module * , char const   * ,
                     size_t  ) ;
    void (*setup)(struct module * , char const   * ) ;
    int (*test)(struct module * ) ;
    void (*free)(struct module * ) ;
 };
 #line 68
 struct module_param_attrs;
 #line 68
 struct module_param_attrs;
 #line 68 "include/linux/module.h"
 struct module_kobject {
    struct kobject kobj ;
    struct module *mod ;
    struct kobject *drivers_dir ;
    struct module_param_attrs *mp ;
 };
 #line 81
 struct exception_table_entry;
 #line 81
 struct exception_table_entry;
 #line 218
 enum module_state {
     MODULE_STATE_LIVE = 0,
     MODULE_STATE_COMING = 1,
     MODULE_STATE_GOING = 2
 } ;
 #line 224 "include/linux/module.h"
 struct module_ref {
    unsigned int incs ;
    unsigned int decs ;
 };
 #line 418
 struct module_sect_attrs;
 #line 418
 struct module_sect_attrs;
 #line 418
 struct module_notes_attrs;
 #line 418
 struct module_notes_attrs;
 #line 418
 struct ftrace_event_call;
 #line 418
 struct ftrace_event_call;
 #line 418 "include/linux/module.h"
 struct module {
    enum module_state state ;
    struct list_head list ;
    char name[56U] ;
    struct module_kobject mkobj ;
    struct module_attribute *modinfo_attrs ;
    char const   *version ;
    char const   *srcversion ;
    struct kobject *holders_dir ;
    struct kernel_symbol  const  *syms ;
    unsigned long const   *crcs ;
    unsigned int num_syms ;
    struct kernel_param *kp ;
    unsigned int num_kp ;
    unsigned int num_gpl_syms ;
    struct kernel_symbol  const  *gpl_syms ;
    unsigned long const   *gpl_crcs ;
    struct kernel_symbol  const  *unused_syms ;
    unsigned long const   *unused_crcs ;
    unsigned int num_unused_syms ;
    unsigned int num_unused_gpl_syms ;
    struct kernel_symbol  const  *unused_gpl_syms ;
    unsigned long const   *unused_gpl_crcs ;
    struct kernel_symbol  const  *gpl_future_syms ;
    unsigned long const   *gpl_future_crcs ;
    unsigned int num_gpl_future_syms ;
    unsigned int num_exentries ;
    struct exception_table_entry *extable ;
    int (*init)(void) ;
    void *module_init ;
    void *module_core ;
    unsigned int init_size ;
    unsigned int core_size ;
    unsigned int init_text_size ;
    unsigned int core_text_size ;
    unsigned int init_ro_size ;
    unsigned int core_ro_size ;
    struct mod_arch_specific arch ;
    unsigned int taints ;
    unsigned int num_bugs ;
    struct list_head bug_list ;
    struct bug_entry *bug_table ;
    Elf64_Sym *symtab ;
    Elf64_Sym *core_symtab ;
    unsigned int num_symtab ;
    unsigned int core_num_syms ;
    char *strtab ;
    char *core_strtab ;
    struct module_sect_attrs *sect_attrs ;
    struct module_notes_attrs *notes_attrs ;
    char *args ;
    void *percpu ;
    unsigned int percpu_size ;
    unsigned int num_tracepoints ;
    struct tracepoint * const  *tracepoints_ptrs ;
    unsigned int num_trace_bprintk_fmt ;
    char const   **trace_bprintk_fmt_start ;
    struct ftrace_event_call **trace_events ;
    unsigned int num_trace_events ;
    unsigned int num_ftrace_callsites ;
    unsigned long *ftrace_callsites ;
    struct list_head source_list ;
    struct list_head target_list ;
    struct task_struct *waiter ;
    void (*exit)(void) ;
    struct module_ref *refptr ;
    ctor_fn_t (**ctors)(void) ;
    unsigned int num_ctors ;
 };
 #line 12 "include/linux/mod_devicetable.h"
 typedef unsigned long kernel_ulong_t;
 #line 13 "include/linux/mod_devicetable.h"
 struct pci_device_id {
    __u32 vendor ;
    __u32 device ;
    __u32 subvendor ;
    __u32 subdevice ;
    __u32 class ;
    __u32 class_mask ;
    kernel_ulong_t driver_data ;
 };
 #line 215 "include/linux/mod_devicetable.h"
 struct of_device_id {
    char name[32U] ;
    char type[32U] ;
    char compatible[128U] ;
    void *data ;
 };
 #line 535
 struct klist_node;
 #line 535
 struct klist_node;
 #line 37 "include/linux/klist.h"
 struct klist_node {
    void *n_klist ;
    struct list_head n_node ;
    struct kref n_ref ;
 };
 #line 67
 struct dma_map_ops;
 #line 67
 struct dma_map_ops;
 #line 67 "include/linux/klist.h"
 struct dev_archdata {
    void *acpi_handle ;
    struct dma_map_ops *dma_ops ;
    void *iommu ;
 };
 #line 17 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/device.h"
 struct device_private;
 #line 17
 struct device_private;
 #line 18
 struct device_driver;
 #line 18
 struct device_driver;
 #line 19
 struct driver_private;
 #line 19
 struct driver_private;
 #line 20
 struct class;
 #line 20
 struct class;
 #line 21
 struct subsys_private;
 #line 21
 struct subsys_private;
 #line 22
 struct bus_type;
 #line 22
 struct bus_type;
 #line 23
 struct device_node;
 #line 23
 struct device_node;
 #line 24 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/device.h"
 struct bus_attribute {
    struct attribute attr ;
    ssize_t (*show)(struct bus_type * , char * ) ;
    ssize_t (*store)(struct bus_type * , char const   * , size_t  ) ;
 };
 #line 49 "include/linux/device.h"
 struct device_attribute;
 #line 49
 struct device_attribute;
 #line 49
 struct driver_attribute;
 #line 49
 struct driver_attribute;
 #line 49 "include/linux/device.h"
 struct bus_type {
    char const   *name ;
    struct bus_attribute *bus_attrs ;
    struct device_attribute *dev_attrs ;
    struct driver_attribute *drv_attrs ;
    int (*match)(struct device * , struct device_driver * ) ;
    int (*uevent)(struct device * , struct kobj_uevent_env * ) ;
    int (*probe)(struct device * ) ;
    int (*remove)(struct device * ) ;
    void (*shutdown)(struct device * ) ;
    int (*suspend)(struct device * , pm_message_t  ) ;
    int (*resume)(struct device * ) ;
    struct dev_pm_ops  const  *pm ;
    struct subsys_private *p ;
 };
 #line 153 "include/linux/device.h"
 struct device_driver {
    char const   *name ;
    struct bus_type *bus ;
    struct module *owner ;
    char const   *mod_name ;
    bool suppress_bind_attrs ;
    struct of_device_id  const  *of_match_table ;
    int (*probe)(struct device * ) ;
    int (*remove)(struct device * ) ;
    void (*shutdown)(struct device * ) ;
    int (*suspend)(struct device * , pm_message_t  ) ;
    int (*resume)(struct device * ) ;
    struct attribute_group  const  **groups ;
    struct dev_pm_ops  const  *pm ;
    struct driver_private *p ;
 };
 #line 218 "include/linux/device.h"
 struct driver_attribute {
    struct attribute attr ;
    ssize_t (*show)(struct device_driver * , char * ) ;
    ssize_t (*store)(struct device_driver * , char const   * , size_t  ) ;
 };
 #line 248
 struct class_attribute;
 #line 248
 struct class_attribute;
 #line 248 "include/linux/device.h"
 struct class {
    char const   *name ;
    struct module *owner ;
    struct class_attribute *class_attrs ;
    struct device_attribute *dev_attrs ;
    struct bin_attribute *dev_bin_attrs ;
    struct kobject *dev_kobj ;
    int (*dev_uevent)(struct device * , struct kobj_uevent_env * ) ;
    char *(*devnode)(struct device * , mode_t * ) ;
    void (*class_release)(struct class * ) ;
    void (*dev_release)(struct device * ) ;
    int (*suspend)(struct device * , pm_message_t  ) ;
    int (*resume)(struct device * ) ;
    struct kobj_ns_type_operations  const  *ns_type ;
    void const   *(*namespace)(struct device * ) ;
    struct dev_pm_ops  const  *pm ;
    struct subsys_private *p ;
 };
 #line 305
 struct device_type;
 #line 305
 struct device_type;
 #line 344 "include/linux/device.h"
 struct class_attribute {
    struct attribute attr ;
    ssize_t (*show)(struct class * , struct class_attribute * , char * ) ;
    ssize_t (*store)(struct class * , struct class_attribute * , char const   * , size_t  ) ;
 };
 #line 395 "include/linux/device.h"
 struct device_type {
    char const   *name ;
    struct attribute_group  const  **groups ;
    int (*uevent)(struct device * , struct kobj_uevent_env * ) ;
    char *(*devnode)(struct device * , mode_t * ) ;
    void (*release)(struct device * ) ;
    struct dev_pm_ops  const  *pm ;
 };
 #line 422 "include/linux/device.h"
 struct device_attribute {
    struct attribute attr ;
    ssize_t (*show)(struct device * , struct device_attribute * , char * ) ;
    ssize_t (*store)(struct device * , struct device_attribute * , char const   * ,
                     size_t  ) ;
 };
 #line 483 "include/linux/device.h"
 struct device_dma_parameters {
    unsigned int max_segment_size ;
    unsigned long segment_boundary_mask ;
 };
 #line 492
 struct dma_coherent_mem;
 #line 492
 struct dma_coherent_mem;
 #line 492 "include/linux/device.h"
 struct device {
    struct device *parent ;
    struct device_private *p ;
    struct kobject kobj ;
    char const   *init_name ;
    struct device_type  const  *type ;
    struct mutex mutex ;
    struct bus_type *bus ;
    struct device_driver *driver ;
    void *platform_data ;
    struct dev_pm_info power ;
    struct dev_power_domain *pwr_domain ;
    int numa_node ;
    u64 *dma_mask ;
    u64 coherent_dma_mask ;
    struct device_dma_parameters *dma_parms ;
    struct list_head dma_pools ;
    struct dma_coherent_mem *dma_mem ;
    struct dev_archdata archdata ;
    struct device_node *of_node ;
    dev_t devt ;
    spinlock_t devres_lock ;
    struct list_head devres_head ;
    struct klist_node knode_class ;
    struct class *class ;
    struct attribute_group  const  **groups ;
    void (*release)(struct device * ) ;
 };
 #line 604 "include/linux/device.h"
 struct wakeup_source {
    char *name ;
    struct list_head entry ;
    spinlock_t lock ;
    struct timer_list timer ;
    unsigned long timer_expires ;
    ktime_t total_time ;
    ktime_t max_time ;
    ktime_t last_time ;
    unsigned long event_count ;
    unsigned long active_count ;
    unsigned long relax_count ;
    unsigned long hit_count ;
    unsigned char active : 1 ;
 };
 #line 69 "include/linux/io.h"
 enum irqreturn {
     IRQ_NONE = 0,
     IRQ_HANDLED = 1,
     IRQ_WAKE_THREAD = 2
 } ;
 #line 16 "include/linux/irqreturn.h"
 typedef enum irqreturn irqreturn_t;
 #line 17
 struct hotplug_slot;
 #line 17
 struct hotplug_slot;
 #line 17 "include/linux/irqreturn.h"
 struct pci_slot {
    struct pci_bus *bus ;
    struct list_head list ;
    struct hotplug_slot *hotplug ;
    unsigned char number ;
    struct kobject kobj ;
 };
 #line 117 "include/linux/pci.h"
 typedef int pci_power_t;
 #line 143 "include/linux/pci.h"
 typedef unsigned int pci_channel_state_t;
 #line 144
 enum pci_channel_state {
     pci_channel_io_normal = 1,
     pci_channel_io_frozen = 2,
     pci_channel_io_perm_failure = 3
 } ;
 #line 169 "include/linux/pci.h"
 typedef unsigned short pci_dev_flags_t;
 #line 184 "include/linux/pci.h"
 typedef unsigned short pci_bus_flags_t;
 #line 227
 struct pcie_link_state;
 #line 227
 struct pcie_link_state;
 #line 228
 struct pci_vpd;
 #line 228
 struct pci_vpd;
 #line 229
 struct pci_sriov;
 #line 229
 struct pci_sriov;
 #line 230
 struct pci_ats;
 #line 230
 struct pci_ats;
 #line 231
 struct proc_dir_entry;
 #line 231
 struct proc_dir_entry;
 #line 231
 struct pci_driver;
 #line 231
 struct pci_driver;
 #line 231 "include/linux/pci.h"
 union __anonunion_ldv_14722_131 {
    struct pci_sriov *sriov ;
    struct pci_dev *physfn ;
 };
 #line 231 "include/linux/pci.h"
 struct pci_dev {
    struct list_head bus_list ;
    struct pci_bus *bus ;
    struct pci_bus *subordinate ;
    void *sysdata ;
    struct proc_dir_entry *procent ;
    struct pci_slot *slot ;
    unsigned int devfn ;
    unsigned short vendor ;
    unsigned short device ;
    unsigned short subsystem_vendor ;
    unsigned short subsystem_device ;
    unsigned int class ;
    u8 revision ;
    u8 hdr_type ;
    u8 pcie_cap ;
    u8 pcie_type ;
    u8 rom_base_reg ;
    u8 pin ;
    struct pci_driver *driver ;
    u64 dma_mask ;
    struct device_dma_parameters dma_parms ;
    pci_power_t current_state ;
    int pm_cap ;
    unsigned char pme_support : 5 ;
    unsigned char pme_interrupt : 1 ;
    unsigned char d1_support : 1 ;
    unsigned char d2_support : 1 ;
    unsigned char no_d1d2 : 1 ;
    unsigned char mmio_always_on : 1 ;
    unsigned char wakeup_prepared : 1 ;
    unsigned int d3_delay ;
    struct pcie_link_state *link_state ;
    pci_channel_state_t error_state ;
    struct device dev ;
    int cfg_size ;
    unsigned int irq ;
    struct resource resource[18U] ;
    resource_size_t fw_addr[18U] ;
    unsigned char transparent : 1 ;
    unsigned char multifunction : 1 ;
    unsigned char is_added : 1 ;
    unsigned char is_busmaster : 1 ;
    unsigned char no_msi : 1 ;
    unsigned char block_ucfg_access : 1 ;
    unsigned char broken_parity_status : 1 ;
    unsigned char irq_reroute_variant : 2 ;
    unsigned char msi_enabled : 1 ;
    unsigned char msix_enabled : 1 ;
    unsigned char ari_enabled : 1 ;
    unsigned char is_managed : 1 ;
    unsigned char is_pcie : 1 ;
    unsigned char needs_freset : 1 ;
    unsigned char state_saved : 1 ;
    unsigned char is_physfn : 1 ;
    unsigned char is_virtfn : 1 ;
    unsigned char reset_fn : 1 ;
    unsigned char is_hotplug_bridge : 1 ;
    unsigned char __aer_firmware_first_valid : 1 ;
    unsigned char __aer_firmware_first : 1 ;
    pci_dev_flags_t dev_flags ;
    atomic_t enable_cnt ;
    u32 saved_config_space[16U] ;
    struct hlist_head saved_cap_space ;
    struct bin_attribute *rom_attr ;
    int rom_attr_enabled ;
    struct bin_attribute *res_attr[18U] ;
    struct bin_attribute *res_attr_wc[18U] ;
    struct list_head msi_list ;
    struct pci_vpd *vpd ;
    union __anonunion_ldv_14722_131 ldv_14722 ;
    struct pci_ats *ats ;
 };
 #line 406
 struct pci_ops;
 #line 406
 struct pci_ops;
 #line 406 "include/linux/pci.h"
 struct pci_bus {
    struct list_head node ;
    struct pci_bus *parent ;
    struct list_head children ;
    struct list_head devices ;
    struct pci_dev *self ;
    struct list_head slots ;
    struct resource *resource[4U] ;
    struct list_head resources ;
    struct pci_ops *ops ;
    void *sysdata ;
    struct proc_dir_entry *procdir ;
    unsigned char number ;
    unsigned char primary ;
    unsigned char secondary ;
    unsigned char subordinate ;
    unsigned char max_bus_speed ;
    unsigned char cur_bus_speed ;
    char name[48U] ;
    unsigned short bridge_ctl ;
    pci_bus_flags_t bus_flags ;
    struct device *bridge ;
    struct device dev ;
    struct bin_attribute *legacy_io ;
    struct bin_attribute *legacy_mem ;
    unsigned char is_added : 1 ;
 };
 #line 458 "include/linux/pci.h"
 struct pci_ops {
    int (*read)(struct pci_bus * , unsigned int  , int  , int  , u32 * ) ;
    int (*write)(struct pci_bus * , unsigned int  , int  , int  , u32  ) ;
 };
 #line 493 "include/linux/pci.h"
 struct pci_dynids {
    spinlock_t lock ;
    struct list_head list ;
 };
 #line 506 "include/linux/pci.h"
 typedef unsigned int pci_ers_result_t;
 #line 515 "include/linux/pci.h"
 struct pci_error_handlers {
    pci_ers_result_t (*error_detected)(struct pci_dev * , enum pci_channel_state  ) ;
    pci_ers_result_t (*mmio_enabled)(struct pci_dev * ) ;
    pci_ers_result_t (*link_reset)(struct pci_dev * ) ;
    pci_ers_result_t (*slot_reset)(struct pci_dev * ) ;
    void (*resume)(struct pci_dev * ) ;
 };
 #line 543 "include/linux/pci.h"
 struct pci_driver {
    struct list_head node ;
    char const   *name ;
    struct pci_device_id  const  *id_table ;
    int (*probe)(struct pci_dev * , struct pci_device_id  const  * ) ;
    void (*remove)(struct pci_dev * ) ;
    int (*suspend)(struct pci_dev * , pm_message_t  ) ;
    int (*suspend_late)(struct pci_dev * , pm_message_t  ) ;
    int (*resume_early)(struct pci_dev * ) ;
    int (*resume)(struct pci_dev * ) ;
    void (*shutdown)(struct pci_dev * ) ;
    struct pci_error_handlers *err_handler ;
    struct device_driver driver ;
    struct pci_dynids dynids ;
 };
 #line 948 "include/linux/pci.h"
 struct scatterlist {
    unsigned long sg_magic ;
    unsigned long page_link ;
    unsigned int offset ;
    unsigned int length ;
    dma_addr_t dma_address ;
    unsigned int dma_length ;
 };
 #line 1095 "include/linux/pci.h"
 struct rb_node {
    unsigned long rb_parent_color ;
    struct rb_node *rb_right ;
    struct rb_node *rb_left ;
 };
 #line 108 "include/linux/rbtree.h"
 struct rb_root {
    struct rb_node *rb_node ;
 };
 #line 176
 struct prio_tree_node;
 #line 176
 struct prio_tree_node;
 #line 176 "include/linux/rbtree.h"
 struct raw_prio_tree_node {
    struct prio_tree_node *left ;
    struct prio_tree_node *right ;
    struct prio_tree_node *parent ;
 };
 #line 19 "include/linux/prio_tree.h"
 struct prio_tree_node {
    struct prio_tree_node *left ;
    struct prio_tree_node *right ;
    struct prio_tree_node *parent ;
    unsigned long start ;
    unsigned long last ;
 };
 #line 27 "include/linux/prio_tree.h"
 struct prio_tree_root {
    struct prio_tree_node *prio_tree_node ;
    unsigned short index_bits ;
    unsigned short raw ;
 };
 #line 115
 struct address_space;
 #line 115
 struct address_space;
 #line 116 "include/linux/prio_tree.h"
 struct __anonstruct_ldv_15597_133 {
    u16 inuse ;
    u16 objects ;
 };
 #line 116 "include/linux/prio_tree.h"
 union __anonunion_ldv_15598_132 {
    atomic_t _mapcount ;
    struct __anonstruct_ldv_15597_133 ldv_15597 ;
 };
 #line 116 "include/linux/prio_tree.h"
 struct __anonstruct_ldv_15603_135 {
    unsigned long private ;
    struct address_space *mapping ;
 };
 #line 116 "include/linux/prio_tree.h"
 union __anonunion_ldv_15606_134 {
    struct __anonstruct_ldv_15603_135 ldv_15603 ;
    struct kmem_cache *slab ;
    struct page *first_page ;
 };
 #line 116 "include/linux/prio_tree.h"
 union __anonunion_ldv_15610_136 {
    unsigned long index ;
    void *freelist ;
 };
 #line 116 "include/linux/prio_tree.h"
 struct page {
    unsigned long flags ;
    atomic_t _count ;
    union __anonunion_ldv_15598_132 ldv_15598 ;
    union __anonunion_ldv_15606_134 ldv_15606 ;
    union __anonunion_ldv_15610_136 ldv_15610 ;
    struct list_head lru ;
 };
 #line 124 "include/linux/mm_types.h"
 struct __anonstruct_vm_set_138 {
    struct list_head list ;
    void *parent ;
    struct vm_area_struct *head ;
 };
 #line 124 "include/linux/mm_types.h"
 union __anonunion_shared_137 {
    struct __anonstruct_vm_set_138 vm_set ;
    struct raw_prio_tree_node prio_tree_node ;
 };
 #line 124
 struct anon_vma;
 #line 124
 struct anon_vma;
 #line 124
 struct vm_operations_struct;
 #line 124
 struct vm_operations_struct;
 #line 124
 struct mempolicy;
 #line 124
 struct mempolicy;
 #line 124 "include/linux/mm_types.h"
 struct vm_area_struct {
    struct mm_struct *vm_mm ;
    unsigned long vm_start ;
    unsigned long vm_end ;
    struct vm_area_struct *vm_next ;
    struct vm_area_struct *vm_prev ;
    pgprot_t vm_page_prot ;
    unsigned long vm_flags ;
    struct rb_node vm_rb ;
    union __anonunion_shared_137 shared ;
    struct list_head anon_vma_chain ;
    struct anon_vma *anon_vma ;
    struct vm_operations_struct  const  *vm_ops ;
    unsigned long vm_pgoff ;
    struct file *vm_file ;
    void *vm_private_data ;
    struct mempolicy *vm_policy ;
 };
 #line 187 "include/linux/mm_types.h"
 struct core_thread {
    struct task_struct *task ;
    struct core_thread *next ;
 };
 #line 193 "include/linux/mm_types.h"
 struct core_state {
    atomic_t nr_threads ;
    struct core_thread dumper ;
    struct completion startup ;
 };
 #line 206 "include/linux/mm_types.h"
 struct mm_rss_stat {
    atomic_long_t count[3U] ;
 };
 #line 219
 struct linux_binfmt;
 #line 219
 struct linux_binfmt;
 #line 219
 struct mmu_notifier_mm;
 #line 219
 struct mmu_notifier_mm;
 #line 219 "include/linux/mm_types.h"
 struct mm_struct {
    struct vm_area_struct *mmap ;
    struct rb_root mm_rb ;
    struct vm_area_struct *mmap_cache ;
    unsigned long (*get_unmapped_area)(struct file * , unsigned long  , unsigned long  ,
                                       unsigned long  , unsigned long  ) ;
    void (*unmap_area)(struct mm_struct * , unsigned long  ) ;
    unsigned long mmap_base ;
    unsigned long task_size ;
    unsigned long cached_hole_size ;
    unsigned long free_area_cache ;
    pgd_t *pgd ;
    atomic_t mm_users ;
    atomic_t mm_count ;
    int map_count ;
    spinlock_t page_table_lock ;
    struct rw_semaphore mmap_sem ;
    struct list_head mmlist ;
    unsigned long hiwater_rss ;
    unsigned long hiwater_vm ;
    unsigned long total_vm ;
    unsigned long locked_vm ;
    unsigned long shared_vm ;
    unsigned long exec_vm ;
    unsigned long stack_vm ;
    unsigned long reserved_vm ;
    unsigned long def_flags ;
    unsigned long nr_ptes ;
    unsigned long start_code ;
    unsigned long end_code ;
    unsigned long start_data ;
    unsigned long end_data ;
    unsigned long start_brk ;
    unsigned long brk ;
    unsigned long start_stack ;
    unsigned long arg_start ;
    unsigned long arg_end ;
    unsigned long env_start ;
    unsigned long env_end ;
    unsigned long saved_auxv[44U] ;
    struct mm_rss_stat rss_stat ;
    struct linux_binfmt *binfmt ;
    cpumask_var_t cpu_vm_mask_var ;
    mm_context_t context ;
    unsigned int faultstamp ;
    unsigned int token_priority ;
    unsigned int last_interval ;
    atomic_t oom_disable_count ;
    unsigned long flags ;
    struct core_state *core_state ;
    spinlock_t ioctx_lock ;
    struct hlist_head ioctx_list ;
    struct task_struct *owner ;
    struct file *exe_file ;
    unsigned long num_exe_file_vmas ;
    struct mmu_notifier_mm *mmu_notifier_mm ;
    pgtable_t pmd_huge_pte ;
    struct cpumask cpumask_allocation ;
 };
 #line 92 "include/linux/bit_spinlock.h"
 struct file_ra_state;
 #line 92
 struct file_ra_state;
 #line 93
 struct user_struct;
 #line 93
 struct user_struct;
 #line 94
 struct writeback_control;
 #line 94
 struct writeback_control;
 #line 175 "include/linux/mm.h"
 struct vm_fault {
    unsigned int flags ;
    unsigned long pgoff ;
    void *virtual_address ;
    struct page *page ;
 };
 #line 192 "include/linux/mm.h"
 struct vm_operations_struct {
    void (*open)(struct vm_area_struct * ) ;
    void (*close)(struct vm_area_struct * ) ;
    int (*fault)(struct vm_area_struct * , struct vm_fault * ) ;
    int (*page_mkwrite)(struct vm_area_struct * , struct vm_fault * ) ;
    int (*access)(struct vm_area_struct * , unsigned long  , void * , int  , int  ) ;
    int (*set_policy)(struct vm_area_struct * , struct mempolicy * ) ;
    struct mempolicy *(*get_policy)(struct vm_area_struct * , unsigned long  ) ;
    int (*migrate)(struct vm_area_struct * , nodemask_t const   * , nodemask_t const   * ,
                   unsigned long  ) ;
 };
 #line 241
 struct inode;
 #line 241
 struct inode;
 #line 118 "include/linux/kmemleak.h"
 struct kmem_cache_cpu {
    void **freelist ;
    unsigned long tid ;
    struct page *page ;
    int node ;
    unsigned int stat[19U] ;
 };
 #line 46 "include/linux/slub_def.h"
 struct kmem_cache_node {
    spinlock_t list_lock ;
    unsigned long nr_partial ;
    struct list_head partial ;
    atomic_long_t nr_slabs ;
    atomic_long_t total_objects ;
    struct list_head full ;
 };
 #line 57 "include/linux/slub_def.h"
 struct kmem_cache_order_objects {
    unsigned long x ;
 };
 #line 67 "include/linux/slub_def.h"
 struct kmem_cache {
    struct kmem_cache_cpu *cpu_slab ;
    unsigned long flags ;
    unsigned long min_partial ;
    int size ;
    int objsize ;
    int offset ;
    struct kmem_cache_order_objects oo ;
    struct kmem_cache_order_objects max ;
    struct kmem_cache_order_objects min ;
    gfp_t allocflags ;
    int refcount ;
    void (*ctor)(void * ) ;
    int inuse ;
    int align ;
    int reserved ;
    char const   *name ;
    struct list_head list ;
    struct kobject kobj ;
    int remote_node_defrag_ratio ;
    struct kmem_cache_node *node[1024U] ;
 };
 #line 34 "include/linux/bug.h"
 struct dma_attrs {
    unsigned long flags[1U] ;
 };
 #line 266 "include/linux/scatterlist.h"
 enum dma_data_direction {
     DMA_BIDIRECTIONAL = 0,
     DMA_TO_DEVICE = 1,
     DMA_FROM_DEVICE = 2,
     DMA_NONE = 3
 } ;
 #line 273 "include/linux/scatterlist.h"
 struct dma_map_ops {
    void *(*alloc_coherent)(struct device * , size_t  , dma_addr_t * , gfp_t  ) ;
    void (*free_coherent)(struct device * , size_t  , void * , dma_addr_t  ) ;
    dma_addr_t (*map_page)(struct device * , struct page * , unsigned long  , size_t  ,
                           enum dma_data_direction  , struct dma_attrs * ) ;
    void (*unmap_page)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ,
                       struct dma_attrs * ) ;
    int (*map_sg)(struct device * , struct scatterlist * , int  , enum dma_data_direction  ,
                  struct dma_attrs * ) ;
    void (*unmap_sg)(struct device * , struct scatterlist * , int  , enum dma_data_direction  ,
                     struct dma_attrs * ) ;
    void (*sync_single_for_cpu)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ) ;
    void (*sync_single_for_device)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ) ;
    void (*sync_sg_for_cpu)(struct device * , struct scatterlist * , int  , enum dma_data_direction  ) ;
    void (*sync_sg_for_device)(struct device * , struct scatterlist * , int  , enum dma_data_direction  ) ;
    int (*mapping_error)(struct device * , dma_addr_t  ) ;
    int (*dma_supported)(struct device * , u64  ) ;
    int (*set_dma_mask)(struct device * , u64  ) ;
    int is_phys ;
 };
 #line 93 "include/linux/capability.h"
 struct kernel_cap_struct {
    __u32 cap[2U] ;
 };
 #line 96 "include/linux/capability.h"
 typedef struct kernel_cap_struct kernel_cap_t;
 #line 104
 struct dentry;
 #line 104
 struct dentry;
 #line 105
 struct user_namespace;
 #line 105
 struct user_namespace;
 #line 7 "include/asm-generic/cputime.h"
 typedef unsigned long cputime_t;
 #line 118 "include/linux/sem.h"
 struct sem_undo_list;
 #line 118
 struct sem_undo_list;
 #line 131 "include/linux/sem.h"
 struct sem_undo_list {
    atomic_t refcnt ;
    spinlock_t lock ;
    struct list_head list_proc ;
 };
 #line 140 "include/linux/sem.h"
 struct sysv_sem {
    struct sem_undo_list *undo_list ;
 };
 #line 149
 struct siginfo;
 #line 149
 struct siginfo;
 #line 32 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/signal.h"
 struct __anonstruct_sigset_t_140 {
    unsigned long sig[1U] ;
 };
 #line 32 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/signal.h"
 typedef struct __anonstruct_sigset_t_140 sigset_t;
 #line 17 "include/asm-generic/signal-defs.h"
 typedef void __signalfn_t(int  );
 #line 18 "include/asm-generic/signal-defs.h"
 typedef __signalfn_t *__sighandler_t;
 #line 20 "include/asm-generic/signal-defs.h"
 typedef void __restorefn_t(void);
 #line 21 "include/asm-generic/signal-defs.h"
 typedef __restorefn_t *__sigrestore_t;
 #line 126 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/signal.h"
 struct sigaction {
    __sighandler_t sa_handler ;
    unsigned long sa_flags ;
    __sigrestore_t sa_restorer ;
    sigset_t sa_mask ;
 };
 #line 173 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/signal.h"
 struct k_sigaction {
    struct sigaction sa ;
 };
 #line 185 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/signal.h"
 union sigval {
    int sival_int ;
    void *sival_ptr ;
 };
 #line 10 "include/asm-generic/siginfo.h"
 typedef union sigval sigval_t;
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__kill_142 {
    __kernel_pid_t _pid ;
    __kernel_uid32_t _uid ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__timer_143 {
    __kernel_timer_t _tid ;
    int _overrun ;
    char _pad[0U] ;
    sigval_t _sigval ;
    int _sys_private ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__rt_144 {
    __kernel_pid_t _pid ;
    __kernel_uid32_t _uid ;
    sigval_t _sigval ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__sigchld_145 {
    __kernel_pid_t _pid ;
    __kernel_uid32_t _uid ;
    int _status ;
    __kernel_clock_t _utime ;
    __kernel_clock_t _stime ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__sigfault_146 {
    void *_addr ;
    short _addr_lsb ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct __anonstruct__sigpoll_147 {
    long _band ;
    int _fd ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 union __anonunion__sifields_141 {
    int _pad[28U] ;
    struct __anonstruct__kill_142 _kill ;
    struct __anonstruct__timer_143 _timer ;
    struct __anonstruct__rt_144 _rt ;
    struct __anonstruct__sigchld_145 _sigchld ;
    struct __anonstruct__sigfault_146 _sigfault ;
    struct __anonstruct__sigpoll_147 _sigpoll ;
 };
 #line 11 "include/asm-generic/siginfo.h"
 struct siginfo {
    int si_signo ;
    int si_errno ;
    int si_code ;
    union __anonunion__sifields_141 _sifields ;
 };
 #line 94 "include/asm-generic/siginfo.h"
 typedef struct siginfo siginfo_t;
 #line 24 "include/linux/signal.h"
 struct sigpending {
    struct list_head list ;
    sigset_t signal ;
 };
 #line 387
 enum pid_type {
     PIDTYPE_PID = 0,
     PIDTYPE_PGID = 1,
     PIDTYPE_SID = 2,
     PIDTYPE_MAX = 3
 } ;
 #line 394
 struct pid_namespace;
 #line 394
 struct pid_namespace;
 #line 394 "include/linux/signal.h"
 struct upid {
    int nr ;
    struct pid_namespace *ns ;
    struct hlist_node pid_chain ;
 };
 #line 56 "include/linux/pid.h"
 struct pid {
    atomic_t count ;
    unsigned int level ;
    struct hlist_head tasks[3U] ;
    struct rcu_head rcu ;
    struct upid numbers[1U] ;
 };
 #line 68 "include/linux/pid.h"
 struct pid_link {
    struct hlist_node node ;
    struct pid *pid ;
 };
 #line 175 "include/linux/pid.h"
 struct percpu_counter {
    spinlock_t lock ;
    s64 count ;
    struct list_head list ;
    s32 *counters ;
 };
 #line 90 "include/linux/proportions.h"
 struct prop_local_single {
    unsigned long events ;
    unsigned long period ;
    int shift ;
    spinlock_t lock ;
 };
 #line 10 "include/linux/seccomp.h"
 struct __anonstruct_seccomp_t_150 {
    int mode ;
 };
 #line 10 "include/linux/seccomp.h"
 typedef struct __anonstruct_seccomp_t_150 seccomp_t;
 #line 427 "include/linux/rculist.h"
 struct plist_head {
    struct list_head node_list ;
    raw_spinlock_t *rawlock ;
    spinlock_t *spinlock ;
 };
 #line 88 "include/linux/plist.h"
 struct plist_node {
    int prio ;
    struct list_head prio_list ;
    struct list_head node_list ;
 };
 #line 38 "include/linux/rtmutex.h"
 struct rt_mutex_waiter;
 #line 38
 struct rt_mutex_waiter;
 #line 41 "include/linux/resource.h"
 struct rlimit {
    unsigned long rlim_cur ;
    unsigned long rlim_max ;
 };
 #line 85 "include/linux/resource.h"
 struct timerqueue_node {
    struct rb_node node ;
    ktime_t expires ;
 };
 #line 12 "include/linux/timerqueue.h"
 struct timerqueue_head {
    struct rb_root head ;
    struct timerqueue_node *next ;
 };
 #line 50
 struct hrtimer_clock_base;
 #line 50
 struct hrtimer_clock_base;
 #line 51
 struct hrtimer_cpu_base;
 #line 51
 struct hrtimer_cpu_base;
 #line 60
 enum hrtimer_restart {
     HRTIMER_NORESTART = 0,
     HRTIMER_RESTART = 1
 } ;
 #line 65 "include/linux/timerqueue.h"
 struct hrtimer {
    struct timerqueue_node node ;
    ktime_t _softexpires ;
    enum hrtimer_restart (*function)(struct hrtimer * ) ;
    struct hrtimer_clock_base *base ;
    unsigned long state ;
    int start_pid ;
    void *start_site ;
    char start_comm[16U] ;
 };
 #line 132 "include/linux/hrtimer.h"
 struct hrtimer_clock_base {
    struct hrtimer_cpu_base *cpu_base ;
    int index ;
    clockid_t clockid ;
    struct timerqueue_head active ;
    ktime_t resolution ;
    ktime_t (*get_time)(void) ;
    ktime_t softirq_time ;
    ktime_t offset ;
 };
 #line 162 "include/linux/hrtimer.h"
 struct hrtimer_cpu_base {
    raw_spinlock_t lock ;
    unsigned long active_bases ;
    ktime_t expires_next ;
    int hres_active ;
    int hang_detected ;
    unsigned long nr_events ;
    unsigned long nr_retries ;
    unsigned long nr_hangs ;
    ktime_t max_hang_time ;
    struct hrtimer_clock_base clock_base[3U] ;
 };
 #line 452 "include/linux/hrtimer.h"
 struct task_io_accounting {
    u64 rchar ;
    u64 wchar ;
    u64 syscr ;
    u64 syscw ;
    u64 read_bytes ;
    u64 write_bytes ;
    u64 cancelled_write_bytes ;
 };
 #line 45 "include/linux/task_io_accounting.h"
 struct latency_record {
    unsigned long backtrace[12U] ;
    unsigned int count ;
    unsigned long time ;
    unsigned long max ;
 };
 #line 29 "include/linux/key.h"
 typedef int32_t key_serial_t;
 #line 32 "include/linux/key.h"
 typedef uint32_t key_perm_t;
 #line 33
 struct key;
 #line 33
 struct key;
 #line 34
 struct signal_struct;
 #line 34
 struct signal_struct;
 #line 35
 struct key_type;
 #line 35
 struct key_type;
 #line 37
 struct keyring_list;
 #line 37
 struct keyring_list;
 #line 115
 struct key_user;
 #line 115
 struct key_user;
 #line 115 "include/linux/key.h"
 union __anonunion_ldv_20678_151 {
    time_t expiry ;
    time_t revoked_at ;
 };
 #line 115 "include/linux/key.h"
 union __anonunion_type_data_152 {
    struct list_head link ;
    unsigned long x[2U] ;
    void *p[2U] ;
    int reject_error ;
 };
 #line 115 "include/linux/key.h"
 union __anonunion_payload_153 {
    unsigned long value ;
    void *rcudata ;
    void *data ;
    struct keyring_list *subscriptions ;
 };
 #line 115 "include/linux/key.h"
 struct key {
    atomic_t usage ;
    key_serial_t serial ;
    struct rb_node serial_node ;
    struct key_type *type ;
    struct rw_semaphore sem ;
    struct key_user *user ;
    void *security ;
    union __anonunion_ldv_20678_151 ldv_20678 ;
    uid_t uid ;
    gid_t gid ;
    key_perm_t perm ;
    unsigned short quotalen ;
    unsigned short datalen ;
    unsigned long flags ;
    char *description ;
    union __anonunion_type_data_152 type_data ;
    union __anonunion_payload_153 payload ;
 };
 #line 310
 struct audit_context;
 #line 310
 struct audit_context;
 #line 27 "include/linux/selinux.h"
 struct group_info {
    atomic_t usage ;
    int ngroups ;
    int nblocks ;
    gid_t small_block[32U] ;
    gid_t *blocks[0U] ;
 };
 #line 77 "include/linux/cred.h"
 struct thread_group_cred {
    atomic_t usage ;
    pid_t tgid ;
    spinlock_t lock ;
    struct key *session_keyring ;
    struct key *process_keyring ;
    struct rcu_head rcu ;
 };
 #line 91 "include/linux/cred.h"
 struct cred {
    atomic_t usage ;
    atomic_t subscribers ;
    void *put_addr ;
    unsigned int magic ;
    uid_t uid ;
    gid_t gid ;
    uid_t suid ;
    gid_t sgid ;
    uid_t euid ;
    gid_t egid ;
    uid_t fsuid ;
    gid_t fsgid ;
    unsigned int securebits ;
    kernel_cap_t cap_inheritable ;
    kernel_cap_t cap_permitted ;
    kernel_cap_t cap_effective ;
    kernel_cap_t cap_bset ;
    unsigned char jit_keyring ;
    struct key *thread_keyring ;
    struct key *request_key_auth ;
    struct thread_group_cred *tgcred ;
    void *security ;
    struct user_struct *user ;
    struct user_namespace *user_ns ;
    struct group_info *group_info ;
    struct rcu_head rcu ;
 };
 #line 264
 struct futex_pi_state;
 #line 264
 struct futex_pi_state;
 #line 265
 struct robust_list_head;
 #line 265
 struct robust_list_head;
 #line 266
 struct bio_list;
 #line 266
 struct bio_list;
 #line 267
 struct fs_struct;
 #line 267
 struct fs_struct;
 #line 268
 struct perf_event_context;
 #line 268
 struct perf_event_context;
 #line 269
 struct blk_plug;
 #line 269
 struct blk_plug;
 #line 149 "include/linux/sched.h"
 struct cfs_rq;
 #line 149
 struct cfs_rq;
 #line 44 "include/linux/aio_abi.h"
 struct io_event {
    __u64 data ;
    __u64 obj ;
    __s64 res ;
    __s64 res2 ;
 };
 #line 106 "include/linux/aio_abi.h"
 struct iovec {
    void *iov_base ;
    __kernel_size_t iov_len ;
 };
 #line 54 "include/linux/uio.h"
 struct kioctx;
 #line 54
 struct kioctx;
 #line 55 "include/linux/uio.h"
 union __anonunion_ki_obj_154 {
    void *user ;
    struct task_struct *tsk ;
 };
 #line 55
 struct eventfd_ctx;
 #line 55
 struct eventfd_ctx;
 #line 55 "include/linux/uio.h"
 struct kiocb {
    struct list_head ki_run_list ;
    unsigned long ki_flags ;
    int ki_users ;
    unsigned int ki_key ;
    struct file *ki_filp ;
    struct kioctx *ki_ctx ;
    int (*ki_cancel)(struct kiocb * , struct io_event * ) ;
    ssize_t (*ki_retry)(struct kiocb * ) ;
    void (*ki_dtor)(struct kiocb * ) ;
    union __anonunion_ki_obj_154 ki_obj ;
    __u64 ki_user_data ;
    loff_t ki_pos ;
    void *private ;
    unsigned short ki_opcode ;
    size_t ki_nbytes ;
    char *ki_buf ;
    size_t ki_left ;
    struct iovec ki_inline_vec ;
    struct iovec *ki_iovec ;
    unsigned long ki_nr_segs ;
    unsigned long ki_cur_seg ;
    struct list_head ki_list ;
    struct eventfd_ctx *ki_eventfd ;
 };
 #line 161 "include/linux/aio.h"
 struct aio_ring_info {
    unsigned long mmap_base ;
    unsigned long mmap_size ;
    struct page **ring_pages ;
    spinlock_t ring_lock ;
    long nr_pages ;
    unsigned int nr ;
    unsigned int tail ;
    struct page *internal_pages[8U] ;
 };
 #line 177 "include/linux/aio.h"
 struct kioctx {
    atomic_t users ;
    int dead ;
    struct mm_struct *mm ;
    unsigned long user_id ;
    struct hlist_node list ;
    wait_queue_head_t wait ;
    spinlock_t ctx_lock ;
    int reqs_active ;
    struct list_head active_reqs ;
    struct list_head run_list ;
    unsigned int max_reqs ;
    struct aio_ring_info ring_info ;
    struct delayed_work wq ;
    struct rcu_head rcu_head ;
 };
 #line 404 "include/linux/sched.h"
 struct sighand_struct {
    atomic_t count ;
    struct k_sigaction action[64U] ;
    spinlock_t siglock ;
    wait_queue_head_t signalfd_wqh ;
 };
 #line 447 "include/linux/sched.h"
 struct pacct_struct {
    int ac_flag ;
    long ac_exitcode ;
    unsigned long ac_mem ;
    cputime_t ac_utime ;
    cputime_t ac_stime ;
    unsigned long ac_minflt ;
    unsigned long ac_majflt ;
 };
 #line 455 "include/linux/sched.h"
 struct cpu_itimer {
    cputime_t expires ;
    cputime_t incr ;
    u32 error ;
    u32 incr_error ;
 };
 #line 462 "include/linux/sched.h"
 struct task_cputime {
    cputime_t utime ;
    cputime_t stime ;
    unsigned long long sum_exec_runtime ;
 };
 #line 479 "include/linux/sched.h"
 struct thread_group_cputimer {
    struct task_cputime cputime ;
    int running ;
    spinlock_t lock ;
 };
 #line 515
 struct autogroup;
 #line 515
 struct autogroup;
 #line 516
 struct tty_struct;
 #line 516
 struct tty_struct;
 #line 516
 struct taskstats;
 #line 516
 struct taskstats;
 #line 516
 struct tty_audit_buf;
 #line 516
 struct tty_audit_buf;
 #line 516 "include/linux/sched.h"
 struct signal_struct {
    atomic_t sigcnt ;
    atomic_t live ;
    int nr_threads ;
    wait_queue_head_t wait_chldexit ;
    struct task_struct *curr_target ;
    struct sigpending shared_pending ;
    int group_exit_code ;
    int notify_count ;
    struct task_struct *group_exit_task ;
    int group_stop_count ;
    unsigned int flags ;
    struct list_head posix_timers ;
    struct hrtimer real_timer ;
    struct pid *leader_pid ;
    ktime_t it_real_incr ;
    struct cpu_itimer it[2U] ;
    struct thread_group_cputimer cputimer ;
    struct task_cputime cputime_expires ;
    struct list_head cpu_timers[3U] ;
    struct pid *tty_old_pgrp ;
    int leader ;
    struct tty_struct *tty ;
    struct autogroup *autogroup ;
    cputime_t utime ;
    cputime_t stime ;
    cputime_t cutime ;
    cputime_t cstime ;
    cputime_t gtime ;
    cputime_t cgtime ;
    cputime_t prev_utime ;
    cputime_t prev_stime ;
    unsigned long nvcsw ;
    unsigned long nivcsw ;
    unsigned long cnvcsw ;
    unsigned long cnivcsw ;
    unsigned long min_flt ;
    unsigned long maj_flt ;
    unsigned long cmin_flt ;
    unsigned long cmaj_flt ;
    unsigned long inblock ;
    unsigned long oublock ;
    unsigned long cinblock ;
    unsigned long coublock ;
    unsigned long maxrss ;
    unsigned long cmaxrss ;
    struct task_io_accounting ioac ;
    unsigned long long sum_sched_runtime ;
    struct rlimit rlim[16U] ;
    struct pacct_struct pacct ;
    struct taskstats *stats ;
    unsigned int audit_tty ;
    struct tty_audit_buf *tty_audit_buf ;
    struct rw_semaphore threadgroup_fork_lock ;
    int oom_adj ;
    int oom_score_adj ;
    int oom_score_adj_min ;
    struct mutex cred_guard_mutex ;
 };
 #line 683 "include/linux/sched.h"
 struct user_struct {
    atomic_t __count ;
    atomic_t processes ;
    atomic_t files ;
    atomic_t sigpending ;
    atomic_t inotify_watches ;
    atomic_t inotify_devs ;
    atomic_t fanotify_listeners ;
    atomic_long_t epoll_watches ;
    unsigned long mq_bytes ;
    unsigned long locked_shm ;
    struct key *uid_keyring ;
    struct key *session_keyring ;
    struct hlist_node uidhash_node ;
    uid_t uid ;
    struct user_namespace *user_ns ;
    atomic_long_t locked_vm ;
 };
 #line 728
 struct backing_dev_info;
 #line 728
 struct backing_dev_info;
 #line 729
 struct reclaim_state;
 #line 729
 struct reclaim_state;
 #line 730 "include/linux/sched.h"
 struct sched_info {
    unsigned long pcount ;
    unsigned long long run_delay ;
    unsigned long long last_arrival ;
    unsigned long long last_queued ;
 };
 #line 744 "include/linux/sched.h"
 struct task_delay_info {
    spinlock_t lock ;
    unsigned int flags ;
    struct timespec blkio_start ;
    struct timespec blkio_end ;
    u64 blkio_delay ;
    u64 swapin_delay ;
    u32 blkio_count ;
    u32 swapin_count ;
    struct timespec freepages_start ;
    struct timespec freepages_end ;
    u64 freepages_delay ;
    u32 freepages_count ;
 };
 #line 1037
 struct io_context;
 #line 1037
 struct io_context;
 #line 1059
 struct pipe_inode_info;
 #line 1059
 struct pipe_inode_info;
 #line 1061
 struct rq;
 #line 1061
 struct rq;
 #line 1062 "include/linux/sched.h"
 struct sched_class {
    struct sched_class  const  *next ;
    void (*enqueue_task)(struct rq * , struct task_struct * , int  ) ;
    void (*dequeue_task)(struct rq * , struct task_struct * , int  ) ;
    void (*yield_task)(struct rq * ) ;
    bool (*yield_to_task)(struct rq * , struct task_struct * , bool  ) ;
    void (*check_preempt_curr)(struct rq * , struct task_struct * , int  ) ;
    struct task_struct *(*pick_next_task)(struct rq * ) ;
    void (*put_prev_task)(struct rq * , struct task_struct * ) ;
    int (*select_task_rq)(struct task_struct * , int  , int  ) ;
    void (*pre_schedule)(struct rq * , struct task_struct * ) ;
    void (*post_schedule)(struct rq * ) ;
    void (*task_waking)(struct task_struct * ) ;
    void (*task_woken)(struct rq * , struct task_struct * ) ;
    void (*set_cpus_allowed)(struct task_struct * , struct cpumask  const  * ) ;
    void (*rq_online)(struct rq * ) ;
    void (*rq_offline)(struct rq * ) ;
    void (*set_curr_task)(struct rq * ) ;
    void (*task_tick)(struct rq * , struct task_struct * , int  ) ;
    void (*task_fork)(struct task_struct * ) ;
    void (*switched_from)(struct rq * , struct task_struct * ) ;
    void (*switched_to)(struct rq * , struct task_struct * ) ;
    void (*prio_changed)(struct rq * , struct task_struct * , int  ) ;
    unsigned int (*get_rr_interval)(struct rq * , struct task_struct * ) ;
    void (*task_move_group)(struct task_struct * , int  ) ;
 };
 #line 1127 "include/linux/sched.h"
 struct load_weight {
    unsigned long weight ;
    unsigned long inv_weight ;
 };
 #line 1132 "include/linux/sched.h"
 struct sched_statistics {
    u64 wait_start ;
    u64 wait_max ;
    u64 wait_count ;
    u64 wait_sum ;
    u64 iowait_count ;
    u64 iowait_sum ;
    u64 sleep_start ;
    u64 sleep_max ;
    s64 sum_sleep_runtime ;
    u64 block_start ;
    u64 block_max ;
    u64 exec_max ;
    u64 slice_max ;
    u64 nr_migrations_cold ;
    u64 nr_failed_migrations_affine ;
    u64 nr_failed_migrations_running ;
    u64 nr_failed_migrations_hot ;
    u64 nr_forced_migrations ;
    u64 nr_wakeups ;
    u64 nr_wakeups_sync ;
    u64 nr_wakeups_migrate ;
    u64 nr_wakeups_local ;
    u64 nr_wakeups_remote ;
    u64 nr_wakeups_affine ;
    u64 nr_wakeups_affine_attempts ;
    u64 nr_wakeups_passive ;
    u64 nr_wakeups_idle ;
 };
 #line 1167 "include/linux/sched.h"
 struct sched_entity {
    struct load_weight load ;
    struct rb_node run_node ;
    struct list_head group_node ;
    unsigned int on_rq ;
    u64 exec_start ;
    u64 sum_exec_runtime ;
    u64 vruntime ;
    u64 prev_sum_exec_runtime ;
    u64 nr_migrations ;
    struct sched_statistics statistics ;
    struct sched_entity *parent ;
    struct cfs_rq *cfs_rq ;
    struct cfs_rq *my_q ;
 };
 #line 1193
 struct rt_rq;
 #line 1193
 struct rt_rq;
 #line 1193 "include/linux/sched.h"
 struct sched_rt_entity {
    struct list_head run_list ;
    unsigned long timeout ;
    unsigned int time_slice ;
    int nr_cpus_allowed ;
    struct sched_rt_entity *back ;
    struct sched_rt_entity *parent ;
    struct rt_rq *rt_rq ;
    struct rt_rq *my_q ;
 };
 #line 1217
 struct mem_cgroup;
 #line 1217
 struct mem_cgroup;
 #line 1217 "include/linux/sched.h"
 struct memcg_batch_info {
    int do_batch ;
    struct mem_cgroup *memcg ;
    unsigned long nr_pages ;
    unsigned long memsw_nr_pages ;
 };
 #line 1569
 struct files_struct;
 #line 1569
 struct files_struct;
 #line 1569
 struct irqaction;
 #line 1569
 struct irqaction;
 #line 1569
 struct css_set;
 #line 1569
 struct css_set;
 #line 1569
 struct compat_robust_list_head;
 #line 1569
 struct compat_robust_list_head;
 #line 1569
 struct ftrace_ret_stack;
 #line 1569
 struct ftrace_ret_stack;
 #line 1569 "include/linux/sched.h"
 struct task_struct {
    long volatile   state ;
    void *stack ;
    atomic_t usage ;
    unsigned int flags ;
    unsigned int ptrace ;
    struct task_struct *wake_entry ;
    int on_cpu ;
    int on_rq ;
    int prio ;
    int static_prio ;
    int normal_prio ;
    unsigned int rt_priority ;
    struct sched_class  const  *sched_class ;
    struct sched_entity se ;
    struct sched_rt_entity rt ;
    struct hlist_head preempt_notifiers ;
    unsigned char fpu_counter ;
    unsigned int btrace_seq ;
    unsigned int policy ;
    cpumask_t cpus_allowed ;
    struct sched_info sched_info ;
    struct list_head tasks ;
    struct plist_node pushable_tasks ;
    struct mm_struct *mm ;
    struct mm_struct *active_mm ;
    unsigned char brk_randomized : 1 ;
    int exit_state ;
    int exit_code ;
    int exit_signal ;
    int pdeath_signal ;
    unsigned int group_stop ;
    unsigned int personality ;
    unsigned char did_exec : 1 ;
    unsigned char in_execve : 1 ;
    unsigned char in_iowait : 1 ;
    unsigned char sched_reset_on_fork : 1 ;
    unsigned char sched_contributes_to_load : 1 ;
    pid_t pid ;
    pid_t tgid ;
    unsigned long stack_canary ;
    struct task_struct *real_parent ;
    struct task_struct *parent ;
    struct list_head children ;
    struct list_head sibling ;
    struct task_struct *group_leader ;
    struct list_head ptraced ;
    struct list_head ptrace_entry ;
    struct pid_link pids[3U] ;
    struct list_head thread_group ;
    struct completion *vfork_done ;
    int *set_child_tid ;
    int *clear_child_tid ;
    cputime_t utime ;
    cputime_t stime ;
    cputime_t utimescaled ;
    cputime_t stimescaled ;
    cputime_t gtime ;
    cputime_t prev_utime ;
    cputime_t prev_stime ;
    unsigned long nvcsw ;
    unsigned long nivcsw ;
    struct timespec start_time ;
    struct timespec real_start_time ;
    unsigned long min_flt ;
    unsigned long maj_flt ;
    struct task_cputime cputime_expires ;
    struct list_head cpu_timers[3U] ;
    struct cred  const  *real_cred ;
    struct cred  const  *cred ;
    struct cred *replacement_session_keyring ;
    char comm[16U] ;
    int link_count ;
    int total_link_count ;
    struct sysv_sem sysvsem ;
    unsigned long last_switch_count ;
    struct thread_struct thread ;
    struct fs_struct *fs ;
    struct files_struct *files ;
    struct nsproxy *nsproxy ;
    struct signal_struct *signal ;
    struct sighand_struct *sighand ;
    sigset_t blocked ;
    sigset_t real_blocked ;
    sigset_t saved_sigmask ;
    struct sigpending pending ;
    unsigned long sas_ss_sp ;
    size_t sas_ss_size ;
    int (*notifier)(void * ) ;
    void *notifier_data ;
    sigset_t *notifier_mask ;
    struct audit_context *audit_context ;
    uid_t loginuid ;
    unsigned int sessionid ;
    seccomp_t seccomp ;
    u32 parent_exec_id ;
    u32 self_exec_id ;
    spinlock_t alloc_lock ;
    struct irqaction *irqaction ;
    raw_spinlock_t pi_lock ;
    struct plist_head pi_waiters ;
    struct rt_mutex_waiter *pi_blocked_on ;
    struct mutex_waiter *blocked_on ;
    unsigned int irq_events ;
    unsigned long hardirq_enable_ip ;
    unsigned long hardirq_disable_ip ;
    unsigned int hardirq_enable_event ;
    unsigned int hardirq_disable_event ;
    int hardirqs_enabled ;
    int hardirq_context ;
    unsigned long softirq_disable_ip ;
    unsigned long softirq_enable_ip ;
    unsigned int softirq_disable_event ;
    unsigned int softirq_enable_event ;
    int softirqs_enabled ;
    int softirq_context ;
    u64 curr_chain_key ;
    int lockdep_depth ;
    unsigned int lockdep_recursion ;
    struct held_lock held_locks[48U] ;
    gfp_t lockdep_reclaim_gfp ;
    void *journal_info ;
    struct bio_list *bio_list ;
    struct blk_plug *plug ;
    struct reclaim_state *reclaim_state ;
    struct backing_dev_info *backing_dev_info ;
    struct io_context *io_context ;
    unsigned long ptrace_message ;
    siginfo_t *last_siginfo ;
    struct task_io_accounting ioac ;
    u64 acct_rss_mem1 ;
    u64 acct_vm_mem1 ;
    cputime_t acct_timexpd ;
    nodemask_t mems_allowed ;
    int mems_allowed_change_disable ;
    int cpuset_mem_spread_rotor ;
    int cpuset_slab_spread_rotor ;
    struct css_set *cgroups ;
    struct list_head cg_list ;
    struct robust_list_head *robust_list ;
    struct compat_robust_list_head *compat_robust_list ;
    struct list_head pi_state_list ;
    struct futex_pi_state *pi_state_cache ;
    struct perf_event_context *perf_event_ctxp[2U] ;
    struct mutex perf_event_mutex ;
    struct list_head perf_event_list ;
    struct mempolicy *mempolicy ;
    short il_next ;
    short pref_node_fork ;
    atomic_t fs_excl ;
    struct rcu_head rcu ;
    struct pipe_inode_info *splice_pipe ;
    struct task_delay_info *delays ;
    int make_it_fail ;
    struct prop_local_single dirties ;
    int latency_record_count ;
    struct latency_record latency_record[32U] ;
    unsigned long timer_slack_ns ;
    unsigned long default_timer_slack_ns ;
    struct list_head *scm_work_list ;
    int curr_ret_stack ;
    struct ftrace_ret_stack *ret_stack ;
    unsigned long long ftrace_timestamp ;
    atomic_t trace_overrun ;
    atomic_t tracing_graph_pause ;
    unsigned long trace ;
    unsigned long trace_recursion ;
    struct memcg_batch_info memcg_batch ;
    atomic_t ptrace_bp_refcnt ;
 };
 #line 41 "include/asm-generic/sections.h"
 struct exception_table_entry {
    unsigned long insn ;
    unsigned long fixup ;
 };
 #line 91 "include/linux/interrupt.h"
 struct irqaction {
    irqreturn_t (*handler)(int  , void * ) ;
    unsigned long flags ;
    void *dev_id ;
    struct irqaction *next ;
    int irq ;
    irqreturn_t (*thread_fn)(int  , void * ) ;
    struct task_struct *thread ;
    unsigned long thread_flags ;
    unsigned long thread_mask ;
    char const   *name ;
    struct proc_dir_entry *dir ;
 };
 #line 38 "include/linux/socket.h"
 typedef unsigned short sa_family_t;
 #line 39 "include/linux/socket.h"
 struct sockaddr {
    sa_family_t sa_family ;
    char sa_data[14U] ;
 };
 #line 41 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_sync_serial_settings_157 {
    unsigned int clock_rate ;
    unsigned int clock_type ;
    unsigned short loopback ;
 };
 #line 41 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_sync_serial_settings_157 sync_serial_settings;
 #line 48 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_te1_settings_158 {
    unsigned int clock_rate ;
    unsigned int clock_type ;
    unsigned short loopback ;
    unsigned int slot_map ;
 };
 #line 48 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_te1_settings_158 te1_settings;
 #line 53 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_raw_hdlc_proto_159 {
    unsigned short encoding ;
    unsigned short parity ;
 };
 #line 53 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_raw_hdlc_proto_159 raw_hdlc_proto;
 #line 63 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_fr_proto_160 {
    unsigned int t391 ;
    unsigned int t392 ;
    unsigned int n391 ;
    unsigned int n392 ;
    unsigned int n393 ;
    unsigned short lmi ;
    unsigned short dce ;
 };
 #line 63 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_fr_proto_160 fr_proto;
 #line 67 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_fr_proto_pvc_161 {
    unsigned int dlci ;
 };
 #line 67 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_fr_proto_pvc_161 fr_proto_pvc;
 #line 72 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_fr_proto_pvc_info_162 {
    unsigned int dlci ;
    char master[16U] ;
 };
 #line 72 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_fr_proto_pvc_info_162 fr_proto_pvc_info;
 #line 77 "include/linux/hdlc/ioctl.h"
 struct __anonstruct_cisco_proto_163 {
    unsigned int interval ;
    unsigned int timeout ;
 };
 #line 77 "include/linux/hdlc/ioctl.h"
 typedef struct __anonstruct_cisco_proto_163 cisco_proto;
 #line 93 "include/linux/hdlc/ioctl.h"
 struct ifmap {
    unsigned long mem_start ;
    unsigned long mem_end ;
    unsigned short base_addr ;
    unsigned char irq ;
    unsigned char dma ;
    unsigned char port ;
 };
 #line 142 "include/linux/if.h"
 union __anonunion_ifs_ifsu_164 {
    raw_hdlc_proto *raw_hdlc ;
    cisco_proto *cisco ;
    fr_proto *fr ;
    fr_proto_pvc *fr_pvc ;
    fr_proto_pvc_info *fr_pvc_info ;
    sync_serial_settings *sync ;
    te1_settings *te1 ;
 };
 #line 142 "include/linux/if.h"
 struct if_settings {
    unsigned int type ;
    unsigned int size ;
    union __anonunion_ifs_ifsu_164 ifs_ifsu ;
 };
 #line 160 "include/linux/if.h"
 union __anonunion_ifr_ifrn_165 {
    char ifrn_name[16U] ;
 };
 #line 160 "include/linux/if.h"
 union __anonunion_ifr_ifru_166 {
    struct sockaddr ifru_addr ;
    struct sockaddr ifru_dstaddr ;
    struct sockaddr ifru_broadaddr ;
    struct sockaddr ifru_netmask ;
    struct sockaddr ifru_hwaddr ;
    short ifru_flags ;
    int ifru_ivalue ;
    int ifru_mtu ;
    struct ifmap ifru_map ;
    char ifru_slave[16U] ;
    char ifru_newname[16U] ;
    void *ifru_data ;
    struct if_settings ifru_settings ;
 };
 #line 160 "include/linux/if.h"
 struct ifreq {
    union __anonunion_ifr_ifrn_165 ifr_ifrn ;
    union __anonunion_ifr_ifru_166 ifr_ifru ;
 };
 #line 224 "include/linux/if.h"
 struct ethhdr {
    unsigned char h_dest[6U] ;
    unsigned char h_source[6U] ;
    __be16 h_proto ;
 };
 #line 179 "include/asm-generic/fcntl.h"
 struct poll_table_struct;
 #line 179
 struct poll_table_struct;
 #line 180
 struct net;
 #line 180
 struct net;
 #line 197
 struct fasync_struct;
 #line 197
 struct fasync_struct;
 #line 108 "include/net/checksum.h"
 struct sk_buff;
 #line 108
 struct sk_buff;
 #line 33 "include/linux/dmaengine.h"
 typedef s32 dma_cookie_t;
 #line 874
 struct net_device;
 #line 874
 struct net_device;
 #line 875 "include/linux/dmaengine.h"
 struct nf_conntrack {
    atomic_t use ;
 };
 #line 102 "include/linux/skbuff.h"
 struct nf_bridge_info {
    atomic_t use ;
    struct net_device *physindev ;
    struct net_device *physoutdev ;
    unsigned int mask ;
    unsigned long data[4U] ;
 };
 #line 112 "include/linux/skbuff.h"
 struct sk_buff_head {
    struct sk_buff *next ;
    struct sk_buff *prev ;
    __u32 qlen ;
    spinlock_t lock ;
 };
 #line 259 "include/linux/skbuff.h"
 typedef unsigned int sk_buff_data_t;
 #line 260
 struct sec_path;
 #line 260
 struct sec_path;
 #line 260 "include/linux/skbuff.h"
 struct __anonstruct_ldv_25382_170 {
    __u16 csum_start ;
    __u16 csum_offset ;
 };
 #line 260 "include/linux/skbuff.h"
 union __anonunion_ldv_25383_169 {
    __wsum csum ;
    struct __anonstruct_ldv_25382_170 ldv_25382 ;
 };
 #line 260 "include/linux/skbuff.h"
 union __anonunion_ldv_25413_171 {
    __u32 mark ;
    __u32 dropcount ;
 };
 #line 260 "include/linux/skbuff.h"
 struct sk_buff {
    struct sk_buff *next ;
    struct sk_buff *prev ;
    ktime_t tstamp ;
    struct sock *sk ;
    struct net_device *dev ;
    char cb[48U] ;
    unsigned long _skb_refdst ;
    struct sec_path *sp ;
    unsigned int len ;
    unsigned int data_len ;
    __u16 mac_len ;
    __u16 hdr_len ;
    union __anonunion_ldv_25383_169 ldv_25383 ;
    __u32 priority ;
    unsigned char local_df : 1 ;
    unsigned char cloned : 1 ;
    unsigned char ip_summed : 2 ;
    unsigned char nohdr : 1 ;
    unsigned char nfctinfo : 3 ;
    unsigned char pkt_type : 3 ;
    unsigned char fclone : 2 ;
    unsigned char ipvs_property : 1 ;
    unsigned char peeked : 1 ;
    unsigned char nf_trace : 1 ;
    __be16 protocol ;
    void (*destructor)(struct sk_buff * ) ;
    struct nf_conntrack *nfct ;
    struct sk_buff *nfct_reasm ;
    struct nf_bridge_info *nf_bridge ;
    int skb_iif ;
    __u16 tc_index ;
    __u16 tc_verd ;
    __u32 rxhash ;
    __u16 queue_mapping ;
    unsigned char ndisc_nodetype : 2 ;
    unsigned char ooo_okay : 1 ;
    dma_cookie_t dma_cookie ;
    __u32 secmark ;
    union __anonunion_ldv_25413_171 ldv_25413 ;
    __u16 vlan_tci ;
    sk_buff_data_t transport_header ;
    sk_buff_data_t network_header ;
    sk_buff_data_t mac_header ;
    sk_buff_data_t tail ;
    sk_buff_data_t end ;
    unsigned char *head ;
    unsigned char *data ;
    unsigned int truesize ;
    atomic_t users ;
 };
 #line 450
 struct dst_entry;
 #line 450
 struct dst_entry;
 #line 113 "include/linux/netlink.h"
 struct nlattr {
    __u16 nla_len ;
    __u16 nla_type ;
 };
 #line 39 "include/linux/if_link.h"
 struct rtnl_link_stats64 {
    __u64 rx_packets ;
    __u64 tx_packets ;
    __u64 rx_bytes ;
    __u64 tx_bytes ;
    __u64 rx_errors ;
    __u64 tx_errors ;
    __u64 rx_dropped ;
    __u64 tx_dropped ;
    __u64 multicast ;
    __u64 collisions ;
    __u64 rx_length_errors ;
    __u64 rx_over_errors ;
    __u64 rx_crc_errors ;
    __u64 rx_frame_errors ;
    __u64 rx_fifo_errors ;
    __u64 rx_missed_errors ;
    __u64 tx_aborted_errors ;
    __u64 tx_carrier_errors ;
    __u64 tx_fifo_errors ;
    __u64 tx_heartbeat_errors ;
    __u64 tx_window_errors ;
    __u64 rx_compressed ;
    __u64 tx_compressed ;
 };
 #line 302 "include/linux/if_link.h"
 struct ifla_vf_info {
    __u32 vf ;
    __u8 mac[32U] ;
    __u32 vlan ;
    __u32 qos ;
    __u32 tx_rate ;
 };
 #line 382
 struct file_operations;
 #line 382
 struct file_operations;
 #line 60 "include/linux/miscdevice.h"
 struct pm_qos_request_list {
    struct plist_node list ;
    int pm_qos_class ;
 };
 #line 40 "include/linux/pm_qos_params.h"
 struct block_device;
 #line 40
 struct block_device;
 #line 89 "include/linux/kdev_t.h"
 struct hlist_bl_node;
 #line 89
 struct hlist_bl_node;
 #line 89 "include/linux/kdev_t.h"
 struct hlist_bl_head {
    struct hlist_bl_node *first ;
 };
 #line 36 "include/linux/list_bl.h"
 struct hlist_bl_node {
    struct hlist_bl_node *next ;
    struct hlist_bl_node **pprev ;
 };
 #line 114 "include/linux/rculist_bl.h"
 struct nameidata;
 #line 114
 struct nameidata;
 #line 115
 struct path;
 #line 115
 struct path;
 #line 116
 struct vfsmount;
 #line 116
 struct vfsmount;
 #line 117 "include/linux/rculist_bl.h"
 struct qstr {
    unsigned int hash ;
    unsigned int len ;
    unsigned char const   *name ;
 };
 #line 100 "include/linux/dcache.h"
 struct dentry_operations;
 #line 100
 struct dentry_operations;
 #line 100
 struct super_block;
 #line 100
 struct super_block;
 #line 100 "include/linux/dcache.h"
 union __anonunion_d_u_172 {
    struct list_head d_child ;
    struct rcu_head d_rcu ;
 };
 #line 100 "include/linux/dcache.h"
 struct dentry {
    unsigned int d_flags ;
    seqcount_t d_seq ;
    struct hlist_bl_node d_hash ;
    struct dentry *d_parent ;
    struct qstr d_name ;
    struct inode *d_inode ;
    unsigned char d_iname[32U] ;
    unsigned int d_count ;
    spinlock_t d_lock ;
    struct dentry_operations  const  *d_op ;
    struct super_block *d_sb ;
    unsigned long d_time ;
    void *d_fsdata ;
    struct list_head d_lru ;
    union __anonunion_d_u_172 d_u ;
    struct list_head d_subdirs ;
    struct list_head d_alias ;
 };
 #line 151 "include/linux/dcache.h"
 struct dentry_operations {
    int (*d_revalidate)(struct dentry * , struct nameidata * ) ;
    int (*d_hash)(struct dentry  const  * , struct inode  const  * , struct qstr * ) ;
    int (*d_compare)(struct dentry  const  * , struct inode  const  * , struct dentry  const  * ,
                     struct inode  const  * , unsigned int  , char const   * , struct qstr  const  * ) ;
    int (*d_delete)(struct dentry  const  * ) ;
    void (*d_release)(struct dentry * ) ;
    void (*d_iput)(struct dentry * , struct inode * ) ;
    char *(*d_dname)(struct dentry * , char * , int  ) ;
    struct vfsmount *(*d_automount)(struct path * ) ;
    int (*d_manage)(struct dentry * , bool  ) ;
 };
 #line 422 "include/linux/dcache.h"
 struct path {
    struct vfsmount *mnt ;
    struct dentry *dentry ;
 };
 #line 51 "include/linux/radix-tree.h"
 struct radix_tree_node;
 #line 51
 struct radix_tree_node;
 #line 51 "include/linux/radix-tree.h"
 struct radix_tree_root {
    unsigned int height ;
    gfp_t gfp_mask ;
    struct radix_tree_node *rnode ;
 };
 #line 45 "include/linux/semaphore.h"
 struct fiemap_extent {
    __u64 fe_logical ;
    __u64 fe_physical ;
    __u64 fe_length ;
    __u64 fe_reserved64[2U] ;
    __u32 fe_flags ;
    __u32 fe_reserved[3U] ;
 };
 #line 38 "include/linux/fiemap.h"
 struct export_operations;
 #line 38
 struct export_operations;
 #line 40
 struct kstatfs;
 #line 40
 struct kstatfs;
 #line 426 "include/linux/fs.h"
 struct iattr {
    unsigned int ia_valid ;
    umode_t ia_mode ;
    uid_t ia_uid ;
    gid_t ia_gid ;
    loff_t ia_size ;
    struct timespec ia_atime ;
    struct timespec ia_mtime ;
    struct timespec ia_ctime ;
    struct file *ia_file ;
 };
 #line 119 "include/linux/quota.h"
 struct if_dqinfo {
    __u64 dqi_bgrace ;
    __u64 dqi_igrace ;
    __u32 dqi_flags ;
    __u32 dqi_valid ;
 };
 #line 152 "include/linux/quota.h"
 struct fs_disk_quota {
    __s8 d_version ;
    __s8 d_flags ;
    __u16 d_fieldmask ;
    __u32 d_id ;
    __u64 d_blk_hardlimit ;
    __u64 d_blk_softlimit ;
    __u64 d_ino_hardlimit ;
    __u64 d_ino_softlimit ;
    __u64 d_bcount ;
    __u64 d_icount ;
    __s32 d_itimer ;
    __s32 d_btimer ;
    __u16 d_iwarns ;
    __u16 d_bwarns ;
    __s32 d_padding2 ;
    __u64 d_rtb_hardlimit ;
    __u64 d_rtb_softlimit ;
    __u64 d_rtbcount ;
    __s32 d_rtbtimer ;
    __u16 d_rtbwarns ;
    __s16 d_padding3 ;
    char d_padding4[8U] ;
 };
 #line 75 "include/linux/dqblk_xfs.h"
 struct fs_qfilestat {
    __u64 qfs_ino ;
    __u64 qfs_nblks ;
    __u32 qfs_nextents ;
 };
 #line 150 "include/linux/dqblk_xfs.h"
 typedef struct fs_qfilestat fs_qfilestat_t;
 #line 151 "include/linux/dqblk_xfs.h"
 struct fs_quota_stat {
    __s8 qs_version ;
    __u16 qs_flags ;
    __s8 qs_pad ;
    fs_qfilestat_t qs_uquota ;
    fs_qfilestat_t qs_gquota ;
    __u32 qs_incoredqs ;
    __s32 qs_btimelimit ;
    __s32 qs_itimelimit ;
    __s32 qs_rtbtimelimit ;
    __u16 qs_bwarnlimit ;
    __u16 qs_iwarnlimit ;
 };
 #line 165
 struct dquot;
 #line 165
 struct dquot;
 #line 185 "include/linux/quota.h"
 typedef __kernel_uid32_t qid_t;
 #line 186 "include/linux/quota.h"
 typedef long long qsize_t;
 #line 189 "include/linux/quota.h"
 struct mem_dqblk {
    qsize_t dqb_bhardlimit ;
    qsize_t dqb_bsoftlimit ;
    qsize_t dqb_curspace ;
    qsize_t dqb_rsvspace ;
    qsize_t dqb_ihardlimit ;
    qsize_t dqb_isoftlimit ;
    qsize_t dqb_curinodes ;
    time_t dqb_btime ;
    time_t dqb_itime ;
 };
 #line 211
 struct quota_format_type;
 #line 211
 struct quota_format_type;
 #line 212 "include/linux/quota.h"
 struct mem_dqinfo {
    struct quota_format_type *dqi_format ;
    int dqi_fmt_id ;
    struct list_head dqi_dirty_list ;
    unsigned long dqi_flags ;
    unsigned int dqi_bgrace ;
    unsigned int dqi_igrace ;
    qsize_t dqi_maxblimit ;
    qsize_t dqi_maxilimit ;
    void *dqi_priv ;
 };
 #line 271 "include/linux/quota.h"
 struct dquot {
    struct hlist_node dq_hash ;
    struct list_head dq_inuse ;
    struct list_head dq_free ;
    struct list_head dq_dirty ;
    struct mutex dq_lock ;
    atomic_t dq_count ;
    wait_queue_head_t dq_wait_unused ;
    struct super_block *dq_sb ;
    unsigned int dq_id ;
    loff_t dq_off ;
    unsigned long dq_flags ;
    short dq_type ;
    struct mem_dqblk dq_dqb ;
 };
 #line 299 "include/linux/quota.h"
 struct quota_format_ops {
    int (*check_quota_file)(struct super_block * , int  ) ;
    int (*read_file_info)(struct super_block * , int  ) ;
    int (*write_file_info)(struct super_block * , int  ) ;
    int (*free_file_info)(struct super_block * , int  ) ;
    int (*read_dqblk)(struct dquot * ) ;
    int (*commit_dqblk)(struct dquot * ) ;
    int (*release_dqblk)(struct dquot * ) ;
 };
 #line 310 "include/linux/quota.h"
 struct dquot_operations {
    int (*write_dquot)(struct dquot * ) ;
    struct dquot *(*alloc_dquot)(struct super_block * , int  ) ;
    void (*destroy_dquot)(struct dquot * ) ;
    int (*acquire_dquot)(struct dquot * ) ;
    int (*release_dquot)(struct dquot * ) ;
    int (*mark_dirty)(struct dquot * ) ;
    int (*write_info)(struct super_block * , int  ) ;
    qsize_t *(*get_reserved_space)(struct inode * ) ;
 };
 #line 324 "include/linux/quota.h"
 struct quotactl_ops {
    int (*quota_on)(struct super_block * , int  , int  , struct path * ) ;
    int (*quota_on_meta)(struct super_block * , int  , int  ) ;
    int (*quota_off)(struct super_block * , int  ) ;
    int (*quota_sync)(struct super_block * , int  , int  ) ;
    int (*get_info)(struct super_block * , int  , struct if_dqinfo * ) ;
    int (*set_info)(struct super_block * , int  , struct if_dqinfo * ) ;
    int (*get_dqblk)(struct super_block * , int  , qid_t  , struct fs_disk_quota * ) ;
    int (*set_dqblk)(struct super_block * , int  , qid_t  , struct fs_disk_quota * ) ;
    int (*get_xstate)(struct super_block * , struct fs_quota_stat * ) ;
    int (*set_xstate)(struct super_block * , unsigned int  , int  ) ;
 };
 #line 340 "include/linux/quota.h"
 struct quota_format_type {
    int qf_fmt_id ;
    struct quota_format_ops  const  *qf_ops ;
    struct module *qf_owner ;
    struct quota_format_type *qf_next ;
 };
 #line 386 "include/linux/quota.h"
 struct quota_info {
    unsigned int flags ;
    struct mutex dqio_mutex ;
    struct mutex dqonoff_mutex ;
    struct rw_semaphore dqptr_sem ;
    struct inode *files[2U] ;
    struct mem_dqinfo info[2U] ;
    struct quota_format_ops  const  *ops[2U] ;
 };
 #line 576 "include/linux/fs.h"
 union __anonunion_arg_174 {
    char *buf ;
    void *data ;
 };
 #line 576 "include/linux/fs.h"
 struct __anonstruct_read_descriptor_t_173 {
    size_t written ;
    size_t count ;
    union __anonunion_arg_174 arg ;
    int error ;
 };
 #line 576 "include/linux/fs.h"
 typedef struct __anonstruct_read_descriptor_t_173 read_descriptor_t;
 #line 579 "include/linux/fs.h"
 struct address_space_operations {
    int (*writepage)(struct page * , struct writeback_control * ) ;
    int (*readpage)(struct file * , struct page * ) ;
    int (*writepages)(struct address_space * , struct writeback_control * ) ;
    int (*set_page_dirty)(struct page * ) ;
    int (*readpages)(struct file * , struct address_space * , struct list_head * ,
                     unsigned int  ) ;
    int (*write_begin)(struct file * , struct address_space * , loff_t  , unsigned int  ,
                       unsigned int  , struct page ** , void ** ) ;
    int (*write_end)(struct file * , struct address_space * , loff_t  , unsigned int  ,
                     unsigned int  , struct page * , void * ) ;
    sector_t (*bmap)(struct address_space * , sector_t  ) ;
    void (*invalidatepage)(struct page * , unsigned long  ) ;
    int (*releasepage)(struct page * , gfp_t  ) ;
    void (*freepage)(struct page * ) ;
    ssize_t (*direct_IO)(int  , struct kiocb * , struct iovec  const  * , loff_t  ,
                         unsigned long  ) ;
    int (*get_xip_mem)(struct address_space * , unsigned long  , int  , void ** , unsigned long * ) ;
    int (*migratepage)(struct address_space * , struct page * , struct page * ) ;
    int (*launder_page)(struct page * ) ;
    int (*is_partially_uptodate)(struct page * , read_descriptor_t * , unsigned long  ) ;
    int (*error_remove_page)(struct address_space * , struct page * ) ;
 };
 #line 630 "include/linux/fs.h"
 struct address_space {
    struct inode *host ;
    struct radix_tree_root page_tree ;
    spinlock_t tree_lock ;
    unsigned int i_mmap_writable ;
    struct prio_tree_root i_mmap ;
    struct list_head i_mmap_nonlinear ;
    struct mutex i_mmap_mutex ;
    unsigned long nrpages ;
    unsigned long writeback_index ;
    struct address_space_operations  const  *a_ops ;
    unsigned long flags ;
    struct backing_dev_info *backing_dev_info ;
    spinlock_t private_lock ;
    struct list_head private_list ;
    struct address_space *assoc_mapping ;
 };
 #line 652
 struct hd_struct;
 #line 652
 struct hd_struct;
 #line 652
 struct gendisk;
 #line 652
 struct gendisk;
 #line 652 "include/linux/fs.h"
 struct block_device {
    dev_t bd_dev ;
    int bd_openers ;
    struct inode *bd_inode ;
    struct super_block *bd_super ;
    struct mutex bd_mutex ;
    struct list_head bd_inodes ;
    void *bd_claiming ;
    void *bd_holder ;
    int bd_holders ;
    bool bd_write_holder ;
    struct list_head bd_holder_disks ;
    struct block_device *bd_contains ;
    unsigned int bd_block_size ;
    struct hd_struct *bd_part ;
    unsigned int bd_part_count ;
    int bd_invalidated ;
    struct gendisk *bd_disk ;
    struct list_head bd_list ;
    unsigned long bd_private ;
    int bd_fsfreeze_count ;
    struct mutex bd_fsfreeze_mutex ;
 };
 #line 723
 struct posix_acl;
 #line 723
 struct posix_acl;
 #line 724
 struct inode_operations;
 #line 724
 struct inode_operations;
 #line 724 "include/linux/fs.h"
 union __anonunion_ldv_27846_175 {
    struct list_head i_dentry ;
    struct rcu_head i_rcu ;
 };
 #line 724
 struct file_lock;
 #line 724
 struct file_lock;
 #line 724
 struct cdev;
 #line 724
 struct cdev;
 #line 724 "include/linux/fs.h"
 union __anonunion_ldv_27872_176 {
    struct pipe_inode_info *i_pipe ;
    struct block_device *i_bdev ;
    struct cdev *i_cdev ;
 };
 #line 724 "include/linux/fs.h"
 struct inode {
    umode_t i_mode ;
    uid_t i_uid ;
    gid_t i_gid ;
    struct inode_operations  const  *i_op ;
    struct super_block *i_sb ;
    spinlock_t i_lock ;
    unsigned int i_flags ;
    unsigned long i_state ;
    void *i_security ;
    struct mutex i_mutex ;
    unsigned long dirtied_when ;
    struct hlist_node i_hash ;
    struct list_head i_wb_list ;
    struct list_head i_lru ;
    struct list_head i_sb_list ;
    union __anonunion_ldv_27846_175 ldv_27846 ;
    unsigned long i_ino ;
    atomic_t i_count ;
    unsigned int i_nlink ;
    dev_t i_rdev ;
    unsigned int i_blkbits ;
    u64 i_version ;
    loff_t i_size ;
    struct timespec i_atime ;
    struct timespec i_mtime ;
    struct timespec i_ctime ;
    blkcnt_t i_blocks ;
    unsigned short i_bytes ;
    struct rw_semaphore i_alloc_sem ;
    struct file_operations  const  *i_fop ;
    struct file_lock *i_flock ;
    struct address_space *i_mapping ;
    struct address_space i_data ;
    struct dquot *i_dquot[2U] ;
    struct list_head i_devices ;
    union __anonunion_ldv_27872_176 ldv_27872 ;
    __u32 i_generation ;
    __u32 i_fsnotify_mask ;
    struct hlist_head i_fsnotify_marks ;
    atomic_t i_readcount ;
    atomic_t i_writecount ;
    struct posix_acl *i_acl ;
    struct posix_acl *i_default_acl ;
    void *i_private ;
 };
 #line 902 "include/linux/fs.h"
 struct fown_struct {
    rwlock_t lock ;
    struct pid *pid ;
    enum pid_type pid_type ;
    uid_t uid ;
    uid_t euid ;
    int signum ;
 };
 #line 910 "include/linux/fs.h"
 struct file_ra_state {
    unsigned long start ;
    unsigned int size ;
    unsigned int async_size ;
    unsigned int ra_pages ;
    unsigned int mmap_miss ;
    loff_t prev_pos ;
 };
 #line 933 "include/linux/fs.h"
 union __anonunion_f_u_177 {
    struct list_head fu_list ;
    struct rcu_head fu_rcuhead ;
 };
 #line 933 "include/linux/fs.h"
 struct file {
    union __anonunion_f_u_177 f_u ;
    struct path f_path ;
    struct file_operations  const  *f_op ;
    spinlock_t f_lock ;
    int f_sb_list_cpu ;
    atomic_long_t f_count ;
    unsigned int f_flags ;
    fmode_t f_mode ;
    loff_t f_pos ;
    struct fown_struct f_owner ;
    struct cred  const  *f_cred ;
    struct file_ra_state f_ra ;
    u64 f_version ;
    void *f_security ;
    void *private_data ;
    struct list_head f_ep_links ;
    struct address_space *f_mapping ;
    unsigned long f_mnt_write_state ;
 };
 #line 1064 "include/linux/fs.h"
 typedef struct files_struct *fl_owner_t;
 #line 1065 "include/linux/fs.h"
 struct file_lock_operations {
    void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
    void (*fl_release_private)(struct file_lock * ) ;
 };
 #line 1070 "include/linux/fs.h"
 struct lock_manager_operations {
    int (*fl_compare_owner)(struct file_lock * , struct file_lock * ) ;
    void (*fl_notify)(struct file_lock * ) ;
    int (*fl_grant)(struct file_lock * , struct file_lock * , int  ) ;
    void (*fl_release_private)(struct file_lock * ) ;
    void (*fl_break)(struct file_lock * ) ;
    int (*fl_change)(struct file_lock ** , int  ) ;
 };
 #line 163 "include/linux/nfs.h"
 struct nlm_lockowner;
 #line 163
 struct nlm_lockowner;
 #line 164 "include/linux/nfs.h"
 struct nfs_lock_info {
    u32 state ;
    struct nlm_lockowner *owner ;
    struct list_head list ;
 };
 #line 18 "include/linux/nfs_fs_i.h"
 struct nfs4_lock_state;
 #line 18
 struct nfs4_lock_state;
 #line 19 "include/linux/nfs_fs_i.h"
 struct nfs4_lock_info {
    struct nfs4_lock_state *owner ;
 };
 #line 23 "include/linux/nfs_fs_i.h"
 struct __anonstruct_afs_179 {
    struct list_head link ;
    int state ;
 };
 #line 23 "include/linux/nfs_fs_i.h"
 union __anonunion_fl_u_178 {
    struct nfs_lock_info nfs_fl ;
    struct nfs4_lock_info nfs4_fl ;
    struct __anonstruct_afs_179 afs ;
 };
 #line 23 "include/linux/nfs_fs_i.h"
 struct file_lock {
    struct file_lock *fl_next ;
    struct list_head fl_link ;
    struct list_head fl_block ;
    fl_owner_t fl_owner ;
    unsigned char fl_flags ;
    unsigned char fl_type ;
    unsigned int fl_pid ;
    struct pid *fl_nspid ;
    wait_queue_head_t fl_wait ;
    struct file *fl_file ;
    loff_t fl_start ;
    loff_t fl_end ;
    struct fasync_struct *fl_fasync ;
    unsigned long fl_break_time ;
    struct file_lock_operations  const  *fl_ops ;
    struct lock_manager_operations  const  *fl_lmops ;
    union __anonunion_fl_u_178 fl_u ;
 };
 #line 1171 "include/linux/fs.h"
 struct fasync_struct {
    spinlock_t fa_lock ;
    int magic ;
    int fa_fd ;
    struct fasync_struct *fa_next ;
    struct file *fa_file ;
    struct rcu_head fa_rcu ;
 };
 #line 1363
 struct file_system_type;
 #line 1363
 struct file_system_type;
 #line 1363
 struct super_operations;
 #line 1363
 struct super_operations;
 #line 1363
 struct xattr_handler;
 #line 1363
 struct xattr_handler;
 #line 1363
 struct mtd_info;
 #line 1363
 struct mtd_info;
 #line 1363 "include/linux/fs.h"
 struct super_block {
    struct list_head s_list ;
    dev_t s_dev ;
    unsigned char s_dirt ;
    unsigned char s_blocksize_bits ;
    unsigned long s_blocksize ;
    loff_t s_maxbytes ;
    struct file_system_type *s_type ;
    struct super_operations  const  *s_op ;
    struct dquot_operations  const  *dq_op ;
    struct quotactl_ops  const  *s_qcop ;
    struct export_operations  const  *s_export_op ;
    unsigned long s_flags ;
    unsigned long s_magic ;
    struct dentry *s_root ;
    struct rw_semaphore s_umount ;
    struct mutex s_lock ;
    int s_count ;
    atomic_t s_active ;
    void *s_security ;
    struct xattr_handler  const  **s_xattr ;
    struct list_head s_inodes ;
    struct hlist_bl_head s_anon ;
    struct list_head *s_files ;
    struct list_head s_dentry_lru ;
    int s_nr_dentry_unused ;
    struct block_device *s_bdev ;
    struct backing_dev_info *s_bdi ;
    struct mtd_info *s_mtd ;
    struct list_head s_instances ;
    struct quota_info s_dquot ;
    int s_frozen ;
    wait_queue_head_t s_wait_unfrozen ;
    char s_id[32U] ;
    u8 s_uuid[16U] ;
    void *s_fs_info ;
    fmode_t s_mode ;
    u32 s_time_gran ;
    struct mutex s_vfs_rename_mutex ;
    char *s_subtype ;
    char *s_options ;
    struct dentry_operations  const  *s_d_op ;
    int cleancache_poolid ;
 };
 #line 1495 "include/linux/fs.h"
 struct fiemap_extent_info {
    unsigned int fi_flags ;
    unsigned int fi_extents_mapped ;
    unsigned int fi_extents_max ;
    struct fiemap_extent *fi_extents_start ;
 };
 #line 1534 "include/linux/fs.h"
 struct file_operations {
    struct module *owner ;
    loff_t (*llseek)(struct file * , loff_t  , int  ) ;
    ssize_t (*read)(struct file * , char * , size_t  , loff_t * ) ;
    ssize_t (*write)(struct file * , char const   * , size_t  , loff_t * ) ;
    ssize_t (*aio_read)(struct kiocb * , struct iovec  const  * , unsigned long  ,
                        loff_t  ) ;
    ssize_t (*aio_write)(struct kiocb * , struct iovec  const  * , unsigned long  ,
                         loff_t  ) ;
    int (*readdir)(struct file * , void * , int (*)(void * , char const   * , int  ,
                                                    loff_t  , u64  , unsigned int  ) ) ;
    unsigned int (*poll)(struct file * , struct poll_table_struct * ) ;
    long (*unlocked_ioctl)(struct file * , unsigned int  , unsigned long  ) ;
    long (*compat_ioctl)(struct file * , unsigned int  , unsigned long  ) ;
    int (*mmap)(struct file * , struct vm_area_struct * ) ;
    int (*open)(struct inode * , struct file * ) ;
    int (*flush)(struct file * , fl_owner_t  ) ;
    int (*release)(struct inode * , struct file * ) ;
    int (*fsync)(struct file * , int  ) ;
    int (*aio_fsync)(struct kiocb * , int  ) ;
    int (*fasync)(int  , struct file * , int  ) ;
    int (*lock)(struct file * , int  , struct file_lock * ) ;
    ssize_t (*sendpage)(struct file * , struct page * , int  , size_t  , loff_t * ,
                        int  ) ;
    unsigned long (*get_unmapped_area)(struct file * , unsigned long  , unsigned long  ,
                                       unsigned long  , unsigned long  ) ;
    int (*check_flags)(int  ) ;
    int (*flock)(struct file * , int  , struct file_lock * ) ;
    ssize_t (*splice_write)(struct pipe_inode_info * , struct file * , loff_t * , size_t  ,
                            unsigned int  ) ;
    ssize_t (*splice_read)(struct file * , loff_t * , struct pipe_inode_info * , size_t  ,
                           unsigned int  ) ;
    int (*setlease)(struct file * , long  , struct file_lock ** ) ;
    long (*fallocate)(struct file * , int  , loff_t  , loff_t  ) ;
 };
 #line 1574 "include/linux/fs.h"
 struct inode_operations {
    struct dentry *(*lookup)(struct inode * , struct dentry * , struct nameidata * ) ;
    void *(*follow_link)(struct dentry * , struct nameidata * ) ;
    int (*permission)(struct inode * , int  , unsigned int  ) ;
    int (*check_acl)(struct inode * , int  , unsigned int  ) ;
    int (*readlink)(struct dentry * , char * , int  ) ;
    void (*put_link)(struct dentry * , struct nameidata * , void * ) ;
    int (*create)(struct inode * , struct dentry * , int  , struct nameidata * ) ;
    int (*link)(struct dentry * , struct inode * , struct dentry * ) ;
    int (*unlink)(struct inode * , struct dentry * ) ;
    int (*symlink)(struct inode * , struct dentry * , char const   * ) ;
    int (*mkdir)(struct inode * , struct dentry * , int  ) ;
    int (*rmdir)(struct inode * , struct dentry * ) ;
    int (*mknod)(struct inode * , struct dentry * , int  , dev_t  ) ;
    int (*rename)(struct inode * , struct dentry * , struct inode * , struct dentry * ) ;
    void (*truncate)(struct inode * ) ;
    int (*setattr)(struct dentry * , struct iattr * ) ;
    int (*getattr)(struct vfsmount * , struct dentry * , struct kstat * ) ;
    int (*setxattr)(struct dentry * , char const   * , void const   * , size_t  , int  ) ;
    ssize_t (*getxattr)(struct dentry * , char const   * , void * , size_t  ) ;
    ssize_t (*listxattr)(struct dentry * , char * , size_t  ) ;
    int (*removexattr)(struct dentry * , char const   * ) ;
    void (*truncate_range)(struct inode * , loff_t  , loff_t  ) ;
    int (*fiemap)(struct inode * , struct fiemap_extent_info * , u64  , u64  ) ;
 };
 #line 1620 "include/linux/fs.h"
 struct super_operations {
    struct inode *(*alloc_inode)(struct super_block * ) ;
    void (*destroy_inode)(struct inode * ) ;
    void (*dirty_inode)(struct inode * , int  ) ;
    int (*write_inode)(struct inode * , struct writeback_control * ) ;
    int (*drop_inode)(struct inode * ) ;
    void (*evict_inode)(struct inode * ) ;
    void (*put_super)(struct super_block * ) ;
    void (*write_super)(struct super_block * ) ;
    int (*sync_fs)(struct super_block * , int  ) ;
    int (*freeze_fs)(struct super_block * ) ;
    int (*unfreeze_fs)(struct super_block * ) ;
    int (*statfs)(struct dentry * , struct kstatfs * ) ;
    int (*remount_fs)(struct super_block * , int * , char * ) ;
    void (*umount_begin)(struct super_block * ) ;
    int (*show_options)(struct seq_file * , struct vfsmount * ) ;
    int (*show_devname)(struct seq_file * , struct vfsmount * ) ;
    int (*show_path)(struct seq_file * , struct vfsmount * ) ;
    int (*show_stats)(struct seq_file * , struct vfsmount * ) ;
    ssize_t (*quota_read)(struct super_block * , int  , char * , size_t  , loff_t  ) ;
    ssize_t (*quota_write)(struct super_block * , int  , char const   * , size_t  ,
                           loff_t  ) ;
    int (*bdev_try_to_free_page)(struct super_block * , struct page * , gfp_t  ) ;
 };
 #line 1801 "include/linux/fs.h"
 struct file_system_type {
    char const   *name ;
    int fs_flags ;
    struct dentry *(*mount)(struct file_system_type * , int  , char const   * , void * ) ;
    void (*kill_sb)(struct super_block * ) ;
    struct module *owner ;
    struct file_system_type *next ;
    struct list_head fs_supers ;
    struct lock_class_key s_lock_key ;
    struct lock_class_key s_umount_key ;
    struct lock_class_key s_vfs_rename_key ;
    struct lock_class_key i_lock_key ;
    struct lock_class_key i_mutex_key ;
    struct lock_class_key i_mutex_dir_key ;
    struct lock_class_key i_alloc_sem_key ;
 };
 #line 37 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/compat.h"
 typedef s32 compat_long_t;
 #line 196 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/compat.h"
 typedef u32 compat_uptr_t;
 #line 205 "include/linux/compat.h"
 struct compat_robust_list {
    compat_uptr_t next ;
 };
 #line 209 "include/linux/compat.h"
 struct compat_robust_list_head {
    struct compat_robust_list list ;
    compat_long_t futex_offset ;
    compat_uptr_t list_op_pending ;
 };
 #line 563 "include/linux/compat.h"
 struct ethtool_cmd {
    __u32 cmd ;
    __u32 supported ;
    __u32 advertising ;
    __u16 speed ;
    __u8 duplex ;
    __u8 port ;
    __u8 phy_address ;
    __u8 transceiver ;
    __u8 autoneg ;
    __u8 mdio_support ;
    __u32 maxtxpkt ;
    __u32 maxrxpkt ;
    __u16 speed_hi ;
    __u8 eth_tp_mdix ;
    __u8 reserved2 ;
    __u32 lp_advertising ;
    __u32 reserved[2U] ;
 };
 #line 61 "include/linux/ethtool.h"
 struct ethtool_drvinfo {
    __u32 cmd ;
    char driver[32U] ;
    char version[32U] ;
    char fw_version[32U] ;
    char bus_info[32U] ;
    char reserved1[32U] ;
    char reserved2[12U] ;
    __u32 n_priv_flags ;
    __u32 n_stats ;
    __u32 testinfo_len ;
    __u32 eedump_len ;
    __u32 regdump_len ;
 };
 #line 87 "include/linux/ethtool.h"
 struct ethtool_wolinfo {
    __u32 cmd ;
    __u32 supported ;
    __u32 wolopts ;
    __u8 sopass[6U] ;
 };
 #line 102 "include/linux/ethtool.h"
 struct ethtool_regs {
    __u32 cmd ;
    __u32 version ;
    __u32 len ;
    __u8 data[0U] ;
 };
 #line 110 "include/linux/ethtool.h"
 struct ethtool_eeprom {
    __u32 cmd ;
    __u32 magic ;
    __u32 offset ;
    __u32 len ;
    __u8 data[0U] ;
 };
 #line 119 "include/linux/ethtool.h"
 struct ethtool_coalesce {
    __u32 cmd ;
    __u32 rx_coalesce_usecs ;
    __u32 rx_max_coalesced_frames ;
    __u32 rx_coalesce_usecs_irq ;
    __u32 rx_max_coalesced_frames_irq ;
    __u32 tx_coalesce_usecs ;
    __u32 tx_max_coalesced_frames ;
    __u32 tx_coalesce_usecs_irq ;
    __u32 tx_max_coalesced_frames_irq ;
    __u32 stats_block_coalesce_usecs ;
    __u32 use_adaptive_rx_coalesce ;
    __u32 use_adaptive_tx_coalesce ;
    __u32 pkt_rate_low ;
    __u32 rx_coalesce_usecs_low ;
    __u32 rx_max_coalesced_frames_low ;
    __u32 tx_coalesce_usecs_low ;
    __u32 tx_max_coalesced_frames_low ;
    __u32 pkt_rate_high ;
    __u32 rx_coalesce_usecs_high ;
    __u32 rx_max_coalesced_frames_high ;
    __u32 tx_coalesce_usecs_high ;
    __u32 tx_max_coalesced_frames_high ;
    __u32 rate_sample_interval ;
 };
 #line 215 "include/linux/ethtool.h"
 struct ethtool_ringparam {
    __u32 cmd ;
    __u32 rx_max_pending ;
    __u32 rx_mini_max_pending ;
    __u32 rx_jumbo_max_pending ;
    __u32 tx_max_pending ;
    __u32 rx_pending ;
    __u32 rx_mini_pending ;
    __u32 rx_jumbo_pending ;
    __u32 tx_pending ;
 };
 #line 237 "include/linux/ethtool.h"
 struct ethtool_channels {
    __u32 cmd ;
    __u32 max_rx ;
    __u32 max_tx ;
    __u32 max_other ;
    __u32 max_combined ;
    __u32 rx_count ;
    __u32 tx_count ;
    __u32 other_count ;
    __u32 combined_count ;
 };
 #line 265 "include/linux/ethtool.h"
 struct ethtool_pauseparam {
    __u32 cmd ;
    __u32 autoneg ;
    __u32 rx_pause ;
    __u32 tx_pause ;
 };
 #line 314 "include/linux/ethtool.h"
 struct ethtool_test {
    __u32 cmd ;
    __u32 flags ;
    __u32 reserved ;
    __u32 len ;
    __u64 data[0U] ;
 };
 #line 326 "include/linux/ethtool.h"
 struct ethtool_stats {
    __u32 cmd ;
    __u32 n_stats ;
    __u64 data[0U] ;
 };
 #line 347 "include/linux/ethtool.h"
 struct ethtool_tcpip4_spec {
    __be32 ip4src ;
    __be32 ip4dst ;
    __be16 psrc ;
    __be16 pdst ;
    __u8 tos ;
 };
 #line 380 "include/linux/ethtool.h"
 struct ethtool_ah_espip4_spec {
    __be32 ip4src ;
    __be32 ip4dst ;
    __be32 spi ;
    __u8 tos ;
 };
 #line 396 "include/linux/ethtool.h"
 struct ethtool_usrip4_spec {
    __be32 ip4src ;
    __be32 ip4dst ;
    __be32 l4_4_bytes ;
    __u8 tos ;
    __u8 ip_ver ;
    __u8 proto ;
 };
 #line 416 "include/linux/ethtool.h"
 union ethtool_flow_union {
    struct ethtool_tcpip4_spec tcp_ip4_spec ;
    struct ethtool_tcpip4_spec udp_ip4_spec ;
    struct ethtool_tcpip4_spec sctp_ip4_spec ;
    struct ethtool_ah_espip4_spec ah_ip4_spec ;
    struct ethtool_ah_espip4_spec esp_ip4_spec ;
    struct ethtool_usrip4_spec usr_ip4_spec ;
    struct ethhdr ether_spec ;
    __u8 hdata[60U] ;
 };
 #line 427 "include/linux/ethtool.h"
 struct ethtool_flow_ext {
    __be16 vlan_etype ;
    __be16 vlan_tci ;
    __be32 data[2U] ;
 };
 #line 433 "include/linux/ethtool.h"
 struct ethtool_rx_flow_spec {
    __u32 flow_type ;
    union ethtool_flow_union h_u ;
    struct ethtool_flow_ext h_ext ;
    union ethtool_flow_union m_u ;
    struct ethtool_flow_ext m_ext ;
    __u64 ring_cookie ;
    __u32 location ;
 };
 #line 456 "include/linux/ethtool.h"
 struct ethtool_rxnfc {
    __u32 cmd ;
    __u32 flow_type ;
    __u64 data ;
    struct ethtool_rx_flow_spec fs ;
    __u32 rule_cnt ;
    __u32 rule_locs[0U] ;
 };
 #line 526 "include/linux/ethtool.h"
 struct ethtool_rxfh_indir {
    __u32 cmd ;
    __u32 size ;
    __u32 ring_index[0U] ;
 };
 #line 542 "include/linux/ethtool.h"
 union __anonunion_h_u_185 {
    struct ethtool_tcpip4_spec tcp_ip4_spec ;
    struct ethtool_tcpip4_spec udp_ip4_spec ;
    struct ethtool_tcpip4_spec sctp_ip4_spec ;
    struct ethtool_ah_espip4_spec ah_ip4_spec ;
    struct ethtool_ah_espip4_spec esp_ip4_spec ;
    struct ethtool_usrip4_spec usr_ip4_spec ;
    struct ethhdr ether_spec ;
    __u8 hdata[72U] ;
 };
 #line 542 "include/linux/ethtool.h"
 union __anonunion_m_u_186 {
    struct ethtool_tcpip4_spec tcp_ip4_spec ;
    struct ethtool_tcpip4_spec udp_ip4_spec ;
    struct ethtool_tcpip4_spec sctp_ip4_spec ;
    struct ethtool_ah_espip4_spec ah_ip4_spec ;
    struct ethtool_ah_espip4_spec esp_ip4_spec ;
    struct ethtool_usrip4_spec usr_ip4_spec ;
    struct ethhdr ether_spec ;
    __u8 hdata[72U] ;
 };
 #line 542 "include/linux/ethtool.h"
 struct ethtool_rx_ntuple_flow_spec {
    __u32 flow_type ;
    union __anonunion_h_u_185 h_u ;
    union __anonunion_m_u_186 m_u ;
    __u16 vlan_tag ;
    __u16 vlan_tag_mask ;
    __u64 data ;
    __u64 data_mask ;
    __s32 action ;
 };
 #line 579 "include/linux/ethtool.h"
 struct ethtool_rx_ntuple {
    __u32 cmd ;
    struct ethtool_rx_ntuple_flow_spec fs ;
 };
 #line 595 "include/linux/ethtool.h"
 struct ethtool_flash {
    __u32 cmd ;
    __u32 region ;
    char data[128U] ;
 };
 #line 603 "include/linux/ethtool.h"
 struct ethtool_dump {
    __u32 cmd ;
    __u32 version ;
    __u32 flag ;
    __u32 len ;
    __u8 data[0U] ;
 };
 #line 721 "include/linux/ethtool.h"
 struct ethtool_rx_ntuple_list {
    struct list_head list ;
    unsigned int count ;
 };
 #line 728
 enum ethtool_phys_id_state {
     ETHTOOL_ID_INACTIVE = 0,
     ETHTOOL_ID_ACTIVE = 1,
     ETHTOOL_ID_ON = 2,
     ETHTOOL_ID_OFF = 3
 } ;
 #line 763 "include/linux/ethtool.h"
 struct ethtool_ops {
    int (*get_settings)(struct net_device * , struct ethtool_cmd * ) ;
    int (*set_settings)(struct net_device * , struct ethtool_cmd * ) ;
    void (*get_drvinfo)(struct net_device * , struct ethtool_drvinfo * ) ;
    int (*get_regs_len)(struct net_device * ) ;
    void (*get_regs)(struct net_device * , struct ethtool_regs * , void * ) ;
    void (*get_wol)(struct net_device * , struct ethtool_wolinfo * ) ;
    int (*set_wol)(struct net_device * , struct ethtool_wolinfo * ) ;
    u32 (*get_msglevel)(struct net_device * ) ;
    void (*set_msglevel)(struct net_device * , u32  ) ;
    int (*nway_reset)(struct net_device * ) ;
    u32 (*get_link)(struct net_device * ) ;
    int (*get_eeprom_len)(struct net_device * ) ;
    int (*get_eeprom)(struct net_device * , struct ethtool_eeprom * , u8 * ) ;
    int (*set_eeprom)(struct net_device * , struct ethtool_eeprom * , u8 * ) ;
    int (*get_coalesce)(struct net_device * , struct ethtool_coalesce * ) ;
    int (*set_coalesce)(struct net_device * , struct ethtool_coalesce * ) ;
    void (*get_ringparam)(struct net_device * , struct ethtool_ringparam * ) ;
    int (*set_ringparam)(struct net_device * , struct ethtool_ringparam * ) ;
    void (*get_pauseparam)(struct net_device * , struct ethtool_pauseparam * ) ;
    int (*set_pauseparam)(struct net_device * , struct ethtool_pauseparam * ) ;
    u32 (*get_rx_csum)(struct net_device * ) ;
    int (*set_rx_csum)(struct net_device * , u32  ) ;
    u32 (*get_tx_csum)(struct net_device * ) ;
    int (*set_tx_csum)(struct net_device * , u32  ) ;
    u32 (*get_sg)(struct net_device * ) ;
    int (*set_sg)(struct net_device * , u32  ) ;
    u32 (*get_tso)(struct net_device * ) ;
    int (*set_tso)(struct net_device * , u32  ) ;
    void (*self_test)(struct net_device * , struct ethtool_test * , u64 * ) ;
    void (*get_strings)(struct net_device * , u32  , u8 * ) ;
    int (*set_phys_id)(struct net_device * , enum ethtool_phys_id_state  ) ;
    void (*get_ethtool_stats)(struct net_device * , struct ethtool_stats * , u64 * ) ;
    int (*begin)(struct net_device * ) ;
    void (*complete)(struct net_device * ) ;
    u32 (*get_ufo)(struct net_device * ) ;
    int (*set_ufo)(struct net_device * , u32  ) ;
    u32 (*get_flags)(struct net_device * ) ;
    int (*set_flags)(struct net_device * , u32  ) ;
    u32 (*get_priv_flags)(struct net_device * ) ;
    int (*set_priv_flags)(struct net_device * , u32  ) ;
    int (*get_sset_count)(struct net_device * , int  ) ;
    int (*get_rxnfc)(struct net_device * , struct ethtool_rxnfc * , void * ) ;
    int (*set_rxnfc)(struct net_device * , struct ethtool_rxnfc * ) ;
    int (*flash_device)(struct net_device * , struct ethtool_flash * ) ;
    int (*reset)(struct net_device * , u32 * ) ;
    int (*set_rx_ntuple)(struct net_device * , struct ethtool_rx_ntuple * ) ;
    int (*get_rx_ntuple)(struct net_device * , u32  , void * ) ;
    int (*get_rxfh_indir)(struct net_device * , struct ethtool_rxfh_indir * ) ;
    int (*set_rxfh_indir)(struct net_device * , struct ethtool_rxfh_indir  const  * ) ;
    void (*get_channels)(struct net_device * , struct ethtool_channels * ) ;
    int (*set_channels)(struct net_device * , struct ethtool_channels * ) ;
    int (*get_dump_flag)(struct net_device * , struct ethtool_dump * ) ;
    int (*get_dump_data)(struct net_device * , struct ethtool_dump * , void * ) ;
    int (*set_dump)(struct net_device * , struct ethtool_dump * ) ;
 };
 #line 972
 struct prot_inuse;
 #line 972
 struct prot_inuse;
 #line 973 "include/linux/ethtool.h"
 struct netns_core {
    struct ctl_table_header *sysctl_hdr ;
    int sysctl_somaxconn ;
    struct prot_inuse *inuse ;
 };
 #line 38 "include/net/snmp.h"
 struct u64_stats_sync {
 
 };
 #line 138 "include/linux/u64_stats_sync.h"
 struct ipstats_mib {
    u64 mibs[31U] ;
    struct u64_stats_sync syncp ;
 };
 #line 61 "include/net/snmp.h"
 struct icmp_mib {
    unsigned long mibs[27U] ;
 };
 #line 67 "include/net/snmp.h"
 struct icmpmsg_mib {
    unsigned long mibs[512U] ;
 };
 #line 72 "include/net/snmp.h"
 struct icmpv6_mib {
    unsigned long mibs[5U] ;
 };
 #line 83 "include/net/snmp.h"
 struct icmpv6msg_mib {
    unsigned long mibs[512U] ;
 };
 #line 93 "include/net/snmp.h"
 struct tcp_mib {
    unsigned long mibs[15U] ;
 };
 #line 100 "include/net/snmp.h"
 struct udp_mib {
    unsigned long mibs[7U] ;
 };
 #line 106 "include/net/snmp.h"
 struct linux_mib {
    unsigned long mibs[80U] ;
 };
 #line 112 "include/net/snmp.h"
 struct linux_xfrm_mib {
    unsigned long mibs[27U] ;
 };
 #line 118 "include/net/snmp.h"
 struct netns_mib {
    struct tcp_mib *tcp_statistics[2U] ;
    struct ipstats_mib *ip_statistics[2U] ;
    struct linux_mib *net_statistics[2U] ;
    struct udp_mib *udp_statistics[2U] ;
    struct udp_mib *udplite_statistics[2U] ;
    struct icmp_mib *icmp_statistics[2U] ;
    struct icmpmsg_mib *icmpmsg_statistics[2U] ;
    struct proc_dir_entry *proc_net_devsnmp6 ;
    struct udp_mib *udp_stats_in6[2U] ;
    struct udp_mib *udplite_stats_in6[2U] ;
    struct ipstats_mib *ipv6_statistics[2U] ;
    struct icmpv6_mib *icmpv6_statistics[2U] ;
    struct icmpv6msg_mib *icmpv6msg_statistics[2U] ;
    struct linux_xfrm_mib *xfrm_statistics[2U] ;
 };
 #line 26 "include/net/netns/mib.h"
 struct netns_unix {
    int sysctl_max_dgram_qlen ;
    struct ctl_table_header *ctl ;
 };
 #line 12 "include/net/netns/unix.h"
 struct netns_packet {
    spinlock_t sklist_lock ;
    struct hlist_head sklist ;
 };
 #line 14 "include/net/netns/packet.h"
 struct netns_frags {
    int nqueues ;
    atomic_t mem ;
    struct list_head lru_list ;
    int timeout ;
    int high_thresh ;
    int low_thresh ;
 };
 #line 73 "include/net/inet_frag.h"
 struct ipv4_devconf;
 #line 73
 struct ipv4_devconf;
 #line 74
 struct fib_rules_ops;
 #line 74
 struct fib_rules_ops;
 #line 75
 struct xt_table;
 #line 75
 struct xt_table;
 #line 75 "include/net/inet_frag.h"
 struct netns_ipv4 {
    struct ctl_table_header *forw_hdr ;
    struct ctl_table_header *frags_hdr ;
    struct ctl_table_header *ipv4_hdr ;
    struct ctl_table_header *route_hdr ;
    struct ipv4_devconf *devconf_all ;
    struct ipv4_devconf *devconf_dflt ;
    struct fib_rules_ops *rules_ops ;
    struct hlist_head *fib_table_hash ;
    struct sock *fibnl ;
    struct sock **icmp_sk ;
    struct sock *tcp_sock ;
    struct netns_frags frags ;
    struct xt_table *iptable_filter ;
    struct xt_table *iptable_mangle ;
    struct xt_table *iptable_raw ;
    struct xt_table *arptable_filter ;
    struct xt_table *iptable_security ;
    struct xt_table *nat_table ;
    struct hlist_head *nat_bysource ;
    unsigned int nat_htable_size ;
    int sysctl_icmp_echo_ignore_all ;
    int sysctl_icmp_echo_ignore_broadcasts ;
    int sysctl_icmp_ignore_bogus_error_responses ;
    int sysctl_icmp_ratelimit ;
    int sysctl_icmp_ratemask ;
    int sysctl_icmp_errors_use_inbound_ifaddr ;
    int sysctl_rt_cache_rebuild_count ;
    int current_rt_cache_rebuild_count ;
    unsigned int sysctl_ping_group_range[2U] ;
    atomic_t rt_genid ;
    atomic_t dev_addr_genid ;
    struct list_head mr_tables ;
    struct fib_rules_ops *mr_rules_ops ;
 };
 #line 70 "include/net/netns/ipv4.h"
 struct dst_ops {
    unsigned short family ;
    __be16 protocol ;
    unsigned int gc_thresh ;
    int (*gc)(struct dst_ops * ) ;
    struct dst_entry *(*check)(struct dst_entry * , __u32  ) ;
    unsigned int (*default_advmss)(struct dst_entry  const  * ) ;
    unsigned int (*default_mtu)(struct dst_entry  const  * ) ;
    u32 *(*cow_metrics)(struct dst_entry * , unsigned long  ) ;
    void (*destroy)(struct dst_entry * ) ;
    void (*ifdown)(struct dst_entry * , struct net_device * , int  ) ;
    struct dst_entry *(*negative_advice)(struct dst_entry * ) ;
    void (*link_failure)(struct sk_buff * ) ;
    void (*update_pmtu)(struct dst_entry * , u32  ) ;
    int (*local_out)(struct sk_buff * ) ;
    struct kmem_cache *kmem_cachep ;
    struct percpu_counter pcpuc_entries ;
 };
 #line 66 "include/net/dst_ops.h"
 struct netns_sysctl_ipv6 {
    struct ctl_table_header *table ;
    struct ctl_table_header *frags_hdr ;
    int bindv6only ;
    int flush_delay ;
    int ip6_rt_max_size ;
    int ip6_rt_gc_min_interval ;
    int ip6_rt_gc_timeout ;
    int ip6_rt_gc_interval ;
    int ip6_rt_gc_elasticity ;
    int ip6_rt_mtu_expires ;
    int ip6_rt_min_advmss ;
    int icmpv6_time ;
 };
 #line 29 "include/net/netns/ipv6.h"
 struct ipv6_devconf;
 #line 29
 struct ipv6_devconf;
 #line 29
 struct rt6_info;
 #line 29
 struct rt6_info;
 #line 29
 struct rt6_statistics;
 #line 29
 struct rt6_statistics;
 #line 29
 struct fib6_table;
 #line 29
 struct fib6_table;
 #line 29 "include/net/netns/ipv6.h"
 struct netns_ipv6 {
    struct netns_sysctl_ipv6 sysctl ;
    struct ipv6_devconf *devconf_all ;
    struct ipv6_devconf *devconf_dflt ;
    struct netns_frags frags ;
    struct xt_table *ip6table_filter ;
    struct xt_table *ip6table_mangle ;
    struct xt_table *ip6table_raw ;
    struct xt_table *ip6table_security ;
    struct rt6_info *ip6_null_entry ;
    struct rt6_statistics *rt6_stats ;
    struct timer_list ip6_fib_timer ;
    struct hlist_head *fib_table_hash ;
    struct fib6_table *fib6_main_tbl ;
    struct dst_ops ip6_dst_ops ;
    unsigned int ip6_rt_gc_expire ;
    unsigned long ip6_rt_last_gc ;
    struct rt6_info *ip6_prohibit_entry ;
    struct rt6_info *ip6_blk_hole_entry ;
    struct fib6_table *fib6_local_tbl ;
    struct fib_rules_ops *fib6_rules_ops ;
    struct sock **icmp_sk ;
    struct sock *ndisc_sk ;
    struct sock *tcp_sk ;
    struct sock *igmp_sk ;
    struct list_head mr6_tables ;
    struct fib_rules_ops *mr6_rules_ops ;
 };
 #line 68 "include/net/netns/ipv6.h"
 struct netns_dccp {
    struct sock *v4_ctl_sk ;
    struct sock *v6_ctl_sk ;
 };
 #line 46 "include/linux/proc_fs.h"
 typedef int read_proc_t(char * , char ** , off_t  , int  , int * , void * );
 #line 48 "include/linux/proc_fs.h"
 typedef int write_proc_t(struct file * , char const   * , unsigned long  , void * );
 #line 49 "include/linux/proc_fs.h"
 struct proc_dir_entry {
    unsigned int low_ino ;
    unsigned int namelen ;
    char const   *name ;
    mode_t mode ;
    nlink_t nlink ;
    uid_t uid ;
    gid_t gid ;
    loff_t size ;
    struct inode_operations  const  *proc_iops ;
    struct file_operations  const  *proc_fops ;
    struct proc_dir_entry *next ;
    struct proc_dir_entry *parent ;
    struct proc_dir_entry *subdir ;
    void *data ;
    read_proc_t *read_proc ;
    write_proc_t *write_proc ;
    atomic_t count ;
    int pde_users ;
    spinlock_t pde_unload_lock ;
    struct completion *pde_unload_completion ;
    struct list_head pde_openers ;
 };
 #line 376 "include/linux/netfilter.h"
 struct ebt_table;
 #line 376
 struct ebt_table;
 #line 377 "include/linux/netfilter.h"
 struct netns_xt {
    struct list_head tables[13U] ;
    struct ebt_table *broute_table ;
    struct ebt_table *frame_filter ;
    struct ebt_table *frame_nat ;
 };
 #line 17 "include/net/netns/x_tables.h"
 struct hlist_nulls_node;
 #line 17
 struct hlist_nulls_node;
 #line 17 "include/net/netns/x_tables.h"
 struct hlist_nulls_head {
    struct hlist_nulls_node *first ;
 };
 #line 20 "include/linux/list_nulls.h"
 struct hlist_nulls_node {
    struct hlist_nulls_node *next ;
    struct hlist_nulls_node **pprev ;
 };
 #line 86
 struct ip_conntrack_stat;
 #line 86
 struct ip_conntrack_stat;
 #line 86 "include/linux/list_nulls.h"
 struct netns_ct {
    atomic_t count ;
    unsigned int expect_count ;
    unsigned int htable_size ;
    struct kmem_cache *nf_conntrack_cachep ;
    struct hlist_nulls_head *hash ;
    struct hlist_head *expect_hash ;
    struct hlist_nulls_head unconfirmed ;
    struct hlist_nulls_head dying ;
    struct ip_conntrack_stat *stat ;
    int sysctl_events ;
    unsigned int sysctl_events_retry_timeout ;
    int sysctl_acct ;
    int sysctl_tstamp ;
    int sysctl_checksum ;
    unsigned int sysctl_log_invalid ;
    struct ctl_table_header *sysctl_header ;
    struct ctl_table_header *acct_sysctl_header ;
    struct ctl_table_header *tstamp_sysctl_header ;
    struct ctl_table_header *event_sysctl_header ;
    char *slabname ;
 };
 #line 484 "include/linux/xfrm.h"
 struct xfrm_policy_hash {
    struct hlist_head *table ;
    unsigned int hmask ;
 };
 #line 16 "include/net/netns/xfrm.h"
 struct netns_xfrm {
    struct list_head state_all ;
    struct hlist_head *state_bydst ;
    struct hlist_head *state_bysrc ;
    struct hlist_head *state_byspi ;
    unsigned int state_hmask ;
    unsigned int state_num ;
    struct work_struct state_hash_work ;
    struct hlist_head state_gc_list ;
    struct work_struct state_gc_work ;
    wait_queue_head_t km_waitq ;
    struct list_head policy_all ;
    struct hlist_head *policy_byidx ;
    unsigned int policy_idx_hmask ;
    struct hlist_head policy_inexact[6U] ;
    struct xfrm_policy_hash policy_bydst[6U] ;
    unsigned int policy_count[6U] ;
    struct work_struct policy_hash_work ;
    struct sock *nlsk ;
    struct sock *nlsk_stash ;
    u32 sysctl_aevent_etime ;
    u32 sysctl_aevent_rseqth ;
    int sysctl_larval_drop ;
    u32 sysctl_acq_expires ;
    struct ctl_table_header *sysctl_hdr ;
    struct dst_ops xfrm4_dst_ops ;
    struct dst_ops xfrm6_dst_ops ;
 };
 #line 62
 struct net_generic;
 #line 62
 struct net_generic;
 #line 63
 struct netns_ipvs;
 #line 63
 struct netns_ipvs;
 #line 64 "include/net/netns/xfrm.h"
 struct net {
    atomic_t passive ;
    atomic_t count ;
    spinlock_t rules_mod_lock ;
    struct list_head list ;
    struct list_head cleanup_list ;
    struct list_head exit_list ;
    struct proc_dir_entry *proc_net ;
    struct proc_dir_entry *proc_net_stat ;
    struct ctl_table_set sysctls ;
    struct sock *rtnl ;
    struct sock *genl_sock ;
    struct list_head dev_base_head ;
    struct hlist_head *dev_name_head ;
    struct hlist_head *dev_index_head ;
    struct list_head rules_ops ;
    struct net_device *loopback_dev ;
    struct netns_core core ;
    struct netns_mib mib ;
    struct netns_packet packet ;
    struct netns_unix unx ;
    struct netns_ipv4 ipv4 ;
    struct netns_ipv6 ipv6 ;
    struct netns_dccp dccp ;
    struct netns_xt xt ;
    struct netns_ct ct ;
    struct sock *nfnl ;
    struct sock *nfnl_stash ;
    struct sk_buff_head wext_nlevents ;
    struct net_generic *gen ;
    struct netns_xfrm xfrm ;
    struct netns_ipvs *ipvs ;
 };
 #line 104 "include/net/net_namespace.h"
 struct seq_file {
    char *buf ;
    size_t size ;
    size_t from ;
    size_t count ;
    loff_t index ;
    loff_t read_pos ;
    u64 version ;
    struct mutex lock ;
    struct seq_operations  const  *op ;
    void *private ;
 };
 #line 28 "include/linux/seq_file.h"
 struct seq_operations {
    void *(*start)(struct seq_file * , loff_t * ) ;
    void (*stop)(struct seq_file * , void * ) ;
    void *(*next)(struct seq_file * , void * , loff_t * ) ;
    int (*show)(struct seq_file * , void * ) ;
 };
 #line 59 "include/net/dsa.h"
 struct ieee_ets {
    __u8 willing ;
    __u8 ets_cap ;
    __u8 cbs ;
    __u8 tc_tx_bw[8U] ;
    __u8 tc_rx_bw[8U] ;
    __u8 tc_tsa[8U] ;
    __u8 prio_tc[8U] ;
    __u8 tc_reco_bw[8U] ;
    __u8 tc_reco_tsa[8U] ;
    __u8 reco_prio_tc[8U] ;
 };
 #line 69 "include/linux/dcbnl.h"
 struct ieee_pfc {
    __u8 pfc_cap ;
    __u8 pfc_en ;
    __u8 mbc ;
    __u16 delay ;
    __u64 requests[8U] ;
    __u64 indications[8U] ;
 };
 #line 89 "include/linux/dcbnl.h"
 struct cee_pg {
    __u8 willing ;
    __u8 error ;
    __u8 pg_en ;
    __u8 tcs_supported ;
    __u8 pg_bw[8U] ;
    __u8 prio_pg[8U] ;
 };
 #line 112 "include/linux/dcbnl.h"
 struct cee_pfc {
    __u8 willing ;
    __u8 error ;
    __u8 pfc_en ;
    __u8 tcs_supported ;
 };
 #line 127 "include/linux/dcbnl.h"
 struct dcb_app {
    __u8 selector ;
    __u8 priority ;
    __u16 protocol ;
 };
 #line 156 "include/linux/dcbnl.h"
 struct dcb_peer_app_info {
    __u8 willing ;
    __u8 error ;
 };
 #line 33 "include/net/dcbnl.h"
 struct dcbnl_rtnl_ops {
    int (*ieee_getets)(struct net_device * , struct ieee_ets * ) ;
    int (*ieee_setets)(struct net_device * , struct ieee_ets * ) ;
    int (*ieee_getpfc)(struct net_device * , struct ieee_pfc * ) ;
    int (*ieee_setpfc)(struct net_device * , struct ieee_pfc * ) ;
    int (*ieee_getapp)(struct net_device * , struct dcb_app * ) ;
    int (*ieee_setapp)(struct net_device * , struct dcb_app * ) ;
    int (*ieee_peer_getets)(struct net_device * , struct ieee_ets * ) ;
    int (*ieee_peer_getpfc)(struct net_device * , struct ieee_pfc * ) ;
    u8 (*getstate)(struct net_device * ) ;
    u8 (*setstate)(struct net_device * , u8  ) ;
    void (*getpermhwaddr)(struct net_device * , u8 * ) ;
    void (*setpgtccfgtx)(struct net_device * , int  , u8  , u8  , u8  , u8  ) ;
    void (*setpgbwgcfgtx)(struct net_device * , int  , u8  ) ;
    void (*setpgtccfgrx)(struct net_device * , int  , u8  , u8  , u8  , u8  ) ;
    void (*setpgbwgcfgrx)(struct net_device * , int  , u8  ) ;
    void (*getpgtccfgtx)(struct net_device * , int  , u8 * , u8 * , u8 * , u8 * ) ;
    void (*getpgbwgcfgtx)(struct net_device * , int  , u8 * ) ;
    void (*getpgtccfgrx)(struct net_device * , int  , u8 * , u8 * , u8 * , u8 * ) ;
    void (*getpgbwgcfgrx)(struct net_device * , int  , u8 * ) ;
    void (*setpfccfg)(struct net_device * , int  , u8  ) ;
    void (*getpfccfg)(struct net_device * , int  , u8 * ) ;
    u8 (*setall)(struct net_device * ) ;
    u8 (*getcap)(struct net_device * , int  , u8 * ) ;
    u8 (*getnumtcs)(struct net_device * , int  , u8 * ) ;
    u8 (*setnumtcs)(struct net_device * , int  , u8  ) ;
    u8 (*getpfcstate)(struct net_device * ) ;
    void (*setpfcstate)(struct net_device * , u8  ) ;
    void (*getbcncfg)(struct net_device * , int  , u32 * ) ;
    void (*setbcncfg)(struct net_device * , int  , u32  ) ;
    void (*getbcnrp)(struct net_device * , int  , u8 * ) ;
    void (*setbcnrp)(struct net_device * , int  , u8  ) ;
    u8 (*setapp)(struct net_device * , u8  , u16  , u8  ) ;
    u8 (*getapp)(struct net_device * , u8  , u16  ) ;
    u8 (*getfeatcfg)(struct net_device * , int  , u8 * ) ;
    u8 (*setfeatcfg)(struct net_device * , int  , u8  ) ;
    u8 (*getdcbx)(struct net_device * ) ;
    u8 (*setdcbx)(struct net_device * , u8  ) ;
    int (*peer_getappinfo)(struct net_device * , struct dcb_peer_app_info * , u16 * ) ;
    int (*peer_getapptable)(struct net_device * , struct dcb_app * ) ;
    int (*cee_peer_getpg)(struct net_device * , struct cee_pg * ) ;
    int (*cee_peer_getpfc)(struct net_device * , struct cee_pfc * ) ;
 };
 #line 91
 struct vlan_group;
 #line 91
 struct vlan_group;
 #line 92
 struct netpoll_info;
 #line 92
 struct netpoll_info;
 #line 93
 struct phy_device;
 #line 93
 struct phy_device;
 #line 94
 struct wireless_dev;
 #line 94
 struct wireless_dev;
 #line 95
 enum netdev_tx {
     __NETDEV_TX_MIN = (-0x7FFFFFFF-1),
     NETDEV_TX_OK = 0,
     NETDEV_TX_BUSY = 16,
     NETDEV_TX_LOCKED = 32
 } ;
 #line 117 "include/linux/netdevice.h"
 typedef enum netdev_tx netdev_tx_t;
 #line 136 "include/linux/netdevice.h"
 struct net_device_stats {
    unsigned long rx_packets ;
    unsigned long tx_packets ;
    unsigned long rx_bytes ;
    unsigned long tx_bytes ;
    unsigned long rx_errors ;
    unsigned long tx_errors ;
    unsigned long rx_dropped ;
    unsigned long tx_dropped ;
    unsigned long multicast ;
    unsigned long collisions ;
    unsigned long rx_length_errors ;
    unsigned long rx_over_errors ;
    unsigned long rx_crc_errors ;
    unsigned long rx_frame_errors ;
    unsigned long rx_fifo_errors ;
    unsigned long rx_missed_errors ;
    unsigned long tx_aborted_errors ;
    unsigned long tx_carrier_errors ;
    unsigned long tx_fifo_errors ;
    unsigned long tx_heartbeat_errors ;
    unsigned long tx_window_errors ;
    unsigned long rx_compressed ;
    unsigned long tx_compressed ;
 };
 #line 211
 struct neighbour;
 #line 211
 struct neighbour;
 #line 212
 struct neigh_parms;
 #line 212
 struct neigh_parms;
 #line 239 "include/linux/netdevice.h"
 struct netdev_hw_addr_list {
    struct list_head list ;
    int count ;
 };
 #line 244 "include/linux/netdevice.h"
 struct hh_cache {
    struct hh_cache *hh_next ;
    atomic_t hh_refcnt ;
    __be16 hh_type ;
    u16 hh_len ;
    int (*hh_output)(struct sk_buff * ) ;
    seqlock_t hh_lock ;
    unsigned long hh_data[16U] ;
 };
 #line 292 "include/linux/netdevice.h"
 struct header_ops {
    int (*create)(struct sk_buff * , struct net_device * , unsigned short  , void const   * ,
                  void const   * , unsigned int  ) ;
    int (*parse)(struct sk_buff  const  * , unsigned char * ) ;
    int (*rebuild)(struct sk_buff * ) ;
    int (*cache)(struct neighbour  const  * , struct hh_cache * ) ;
    void (*cache_update)(struct hh_cache * , struct net_device  const  * , unsigned char const   * ) ;
 };
 #line 392
 enum rx_handler_result {
     RX_HANDLER_CONSUMED = 0,
     RX_HANDLER_ANOTHER = 1,
     RX_HANDLER_EXACT = 2,
     RX_HANDLER_PASS = 3
 } ;
 #line 440 "include/linux/netdevice.h"
 typedef enum rx_handler_result rx_handler_result_t;
 #line 441 "include/linux/netdevice.h"
 typedef rx_handler_result_t rx_handler_func_t(struct sk_buff ** );
 #line 548
 struct Qdisc;
 #line 548
 struct Qdisc;
 #line 548 "include/linux/netdevice.h"
 struct netdev_queue {
    struct net_device *dev ;
    struct Qdisc *qdisc ;
    unsigned long state ;
    struct Qdisc *qdisc_sleeping ;
    struct kobject kobj ;
    int numa_node ;
    spinlock_t _xmit_lock ;
    int xmit_lock_owner ;
    unsigned long trans_start ;
 };
 #line 590 "include/linux/netdevice.h"
 struct rps_map {
    unsigned int len ;
    struct rcu_head rcu ;
    u16 cpus[0U] ;
 };
 #line 602 "include/linux/netdevice.h"
 struct rps_dev_flow {
    u16 cpu ;
    u16 filter ;
    unsigned int last_qtail ;
 };
 #line 614 "include/linux/netdevice.h"
 struct rps_dev_flow_table {
    unsigned int mask ;
    struct rcu_head rcu ;
    struct work_struct free_work ;
    struct rps_dev_flow flows[0U] ;
 };
 #line 666 "include/linux/netdevice.h"
 struct netdev_rx_queue {
    struct rps_map *rps_map ;
    struct rps_dev_flow_table *rps_flow_table ;
    struct kobject kobj ;
    struct net_device *dev ;
 };
 #line 676 "include/linux/netdevice.h"
 struct xps_map {
    unsigned int len ;
    unsigned int alloc_len ;
    struct rcu_head rcu ;
    u16 queues[0U] ;
 };
 #line 689 "include/linux/netdevice.h"
 struct xps_dev_maps {
    struct rcu_head rcu ;
    struct xps_map *cpu_map[0U] ;
 };
 #line 700 "include/linux/netdevice.h"
 struct netdev_tc_txq {
    u16 count ;
    u16 offset ;
 };
 #line 711 "include/linux/netdevice.h"
 struct net_device_ops {
    int (*ndo_init)(struct net_device * ) ;
    void (*ndo_uninit)(struct net_device * ) ;
    int (*ndo_open)(struct net_device * ) ;
    int (*ndo_stop)(struct net_device * ) ;
    netdev_tx_t (*ndo_start_xmit)(struct sk_buff * , struct net_device * ) ;
    u16 (*ndo_select_queue)(struct net_device * , struct sk_buff * ) ;
    void (*ndo_change_rx_flags)(struct net_device * , int  ) ;
    void (*ndo_set_rx_mode)(struct net_device * ) ;
    void (*ndo_set_multicast_list)(struct net_device * ) ;
    int (*ndo_set_mac_address)(struct net_device * , void * ) ;
    int (*ndo_validate_addr)(struct net_device * ) ;
    int (*ndo_do_ioctl)(struct net_device * , struct ifreq * , int  ) ;
    int (*ndo_set_config)(struct net_device * , struct ifmap * ) ;
    int (*ndo_change_mtu)(struct net_device * , int  ) ;
    int (*ndo_neigh_setup)(struct net_device * , struct neigh_parms * ) ;
    void (*ndo_tx_timeout)(struct net_device * ) ;
    struct rtnl_link_stats64 *(*ndo_get_stats64)(struct net_device * , struct rtnl_link_stats64 * ) ;
    struct net_device_stats *(*ndo_get_stats)(struct net_device * ) ;
    void (*ndo_vlan_rx_register)(struct net_device * , struct vlan_group * ) ;
    void (*ndo_vlan_rx_add_vid)(struct net_device * , unsigned short  ) ;
    void (*ndo_vlan_rx_kill_vid)(struct net_device * , unsigned short  ) ;
    void (*ndo_poll_controller)(struct net_device * ) ;
    int (*ndo_netpoll_setup)(struct net_device * , struct netpoll_info * ) ;
    void (*ndo_netpoll_cleanup)(struct net_device * ) ;
    int (*ndo_set_vf_mac)(struct net_device * , int  , u8 * ) ;
    int (*ndo_set_vf_vlan)(struct net_device * , int  , u16  , u8  ) ;
    int (*ndo_set_vf_tx_rate)(struct net_device * , int  , int  ) ;
    int (*ndo_get_vf_config)(struct net_device * , int  , struct ifla_vf_info * ) ;
    int (*ndo_set_vf_port)(struct net_device * , int  , struct nlattr ** ) ;
    int (*ndo_get_vf_port)(struct net_device * , int  , struct sk_buff * ) ;
    int (*ndo_setup_tc)(struct net_device * , u8  ) ;
    int (*ndo_fcoe_enable)(struct net_device * ) ;
    int (*ndo_fcoe_disable)(struct net_device * ) ;
    int (*ndo_fcoe_ddp_setup)(struct net_device * , u16  , struct scatterlist * , unsigned int  ) ;
    int (*ndo_fcoe_ddp_done)(struct net_device * , u16  ) ;
    int (*ndo_fcoe_ddp_target)(struct net_device * , u16  , struct scatterlist * ,
                               unsigned int  ) ;
    int (*ndo_fcoe_get_wwn)(struct net_device * , u64 * , int  ) ;
    int (*ndo_rx_flow_steer)(struct net_device * , struct sk_buff  const  * , u16  ,
                             u32  ) ;
    int (*ndo_add_slave)(struct net_device * , struct net_device * ) ;
    int (*ndo_del_slave)(struct net_device * , struct net_device * ) ;
    u32 (*ndo_fix_features)(struct net_device * , u32  ) ;
    int (*ndo_set_features)(struct net_device * , u32  ) ;
 };
 #line 995
 struct iw_handler_def;
 #line 995
 struct iw_handler_def;
 #line 995
 struct iw_public_data;
 #line 995
 struct iw_public_data;
 #line 995
 struct in_device;
 #line 995
 struct in_device;
 #line 995
 struct dn_dev;
 #line 995
 struct dn_dev;
 #line 995
 struct inet6_dev;
 #line 995
 struct inet6_dev;
 #line 995
 struct cpu_rmap;
 #line 995
 struct cpu_rmap;
 #line 995
 struct pcpu_lstats;
 #line 995
 struct pcpu_lstats;
 #line 995
 struct pcpu_tstats;
 #line 995
 struct pcpu_tstats;
 #line 995
 struct pcpu_dstats;
 #line 995
 struct pcpu_dstats;
 #line 995 "include/linux/netdevice.h"
 union __anonunion_ldv_33812_194 {
    void *ml_priv ;
    struct pcpu_lstats *lstats ;
    struct pcpu_tstats *tstats ;
    struct pcpu_dstats *dstats ;
 };
 #line 995
 struct garp_port;
 #line 995
 struct garp_port;
 #line 995
 struct rtnl_link_ops;
 #line 995
 struct rtnl_link_ops;
 #line 995 "include/linux/netdevice.h"
 struct net_device {
    char name[16U] ;
    struct pm_qos_request_list pm_qos_req ;
    struct hlist_node name_hlist ;
    char *ifalias ;
    unsigned long mem_end ;
    unsigned long mem_start ;
    unsigned long base_addr ;
    unsigned int irq ;
    unsigned long state ;
    struct list_head dev_list ;
    struct list_head napi_list ;
    struct list_head unreg_list ;
    u32 features ;
    u32 hw_features ;
    u32 wanted_features ;
    u32 vlan_features ;
    int ifindex ;
    int iflink ;
    struct net_device_stats stats ;
    atomic_long_t rx_dropped ;
    struct iw_handler_def  const  *wireless_handlers ;
    struct iw_public_data *wireless_data ;
    struct net_device_ops  const  *netdev_ops ;
    struct ethtool_ops  const  *ethtool_ops ;
    struct header_ops  const  *header_ops ;
    unsigned int flags ;
    unsigned int priv_flags ;
    unsigned short gflags ;
    unsigned short padded ;
    unsigned char operstate ;
    unsigned char link_mode ;
    unsigned char if_port ;
    unsigned char dma ;
    unsigned int mtu ;
    unsigned short type ;
    unsigned short hard_header_len ;
    unsigned short needed_headroom ;
    unsigned short needed_tailroom ;
    unsigned char perm_addr[32U] ;
    unsigned char addr_assign_type ;
    unsigned char addr_len ;
    unsigned short dev_id ;
    spinlock_t addr_list_lock ;
    struct netdev_hw_addr_list uc ;
    struct netdev_hw_addr_list mc ;
    int uc_promisc ;
    unsigned int promiscuity ;
    unsigned int allmulti ;
    struct vlan_group *vlgrp ;
    void *dsa_ptr ;
    void *atalk_ptr ;
    struct in_device *ip_ptr ;
    struct dn_dev *dn_ptr ;
    struct inet6_dev *ip6_ptr ;
    void *ec_ptr ;
    void *ax25_ptr ;
    struct wireless_dev *ieee80211_ptr ;
    unsigned long last_rx ;
    struct net_device *master ;
    unsigned char *dev_addr ;
    struct netdev_hw_addr_list dev_addrs ;
    unsigned char broadcast[32U] ;
    struct kset *queues_kset ;
    struct netdev_rx_queue *_rx ;
    unsigned int num_rx_queues ;
    unsigned int real_num_rx_queues ;
    struct cpu_rmap *rx_cpu_rmap ;
    rx_handler_func_t *rx_handler ;
    void *rx_handler_data ;
    struct netdev_queue *ingress_queue ;
    struct netdev_queue *_tx ;
    unsigned int num_tx_queues ;
    unsigned int real_num_tx_queues ;
    struct Qdisc *qdisc ;
    unsigned long tx_queue_len ;
    spinlock_t tx_global_lock ;
    struct xps_dev_maps *xps_maps ;
    unsigned long trans_start ;
    int watchdog_timeo ;
    struct timer_list watchdog_timer ;
    int *pcpu_refcnt ;
    struct list_head todo_list ;
    struct hlist_node index_hlist ;
    struct list_head link_watch_list ;
    unsigned char reg_state ;
    bool dismantle ;
    unsigned short rtnl_link_state ;
    void (*destructor)(struct net_device * ) ;
    struct netpoll_info *npinfo ;
    struct net *nd_net ;
    union __anonunion_ldv_33812_194 ldv_33812 ;
    struct garp_port *garp_port ;
    struct device dev ;
    struct attribute_group  const  *sysfs_groups[4U] ;
    struct rtnl_link_ops  const  *rtnl_link_ops ;
    unsigned int gso_max_size ;
    struct dcbnl_rtnl_ops  const  *dcbnl_ops ;
    u8 num_tc ;
    struct netdev_tc_txq tc_to_txq[16U] ;
    u8 prio_tc_map[16U] ;
    unsigned int fcoe_ddp_xid ;
    struct ethtool_rx_ntuple_list ethtool_ntuple_list ;
    struct phy_device *phydev ;
    int group ;
 };
 #line 169 "include/linux/if_arp.h"
 struct global_regs {
    u32 txq_start_addr ;
    u32 txq_end_addr ;
    u32 rxq_start_addr ;
    u32 rxq_end_addr ;
    u32 pm_csr ;
    u32 unused ;
    u32 int_status ;
    u32 int_mask ;
    u32 int_alias_clr_en ;
    u32 int_status_alias ;
    u32 sw_reset ;
    u32 slv_timer ;
    u32 msi_config ;
    u32 loopback ;
    u32 watchdog_timer ;
 };
 #line 224 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct txdma_regs {
    u32 csr ;
    u32 pr_base_hi ;
    u32 pr_base_lo ;
    u32 pr_num_des ;
    u32 txq_wr_addr ;
    u32 txq_wr_addr_ext ;
    u32 txq_rd_addr ;
    u32 dma_wb_base_hi ;
    u32 dma_wb_base_lo ;
    u32 service_request ;
    u32 service_complete ;
    u32 cache_rd_index ;
    u32 cache_wr_index ;
    u32 TxDmaError ;
    u32 DescAbortCount ;
    u32 PayloadAbortCnt ;
    u32 WriteBackAbortCnt ;
    u32 DescTimeoutCnt ;
    u32 PayloadTimeoutCnt ;
    u32 WriteBackTimeoutCnt ;
    u32 DescErrorCount ;
    u32 PayloadErrorCnt ;
    u32 WriteBackErrorCnt ;
    u32 DroppedTLPCount ;
    u32 NewServiceComplete ;
    u32 EthernetPacketCount ;
 };
 #line 284 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct rxdma_regs {
    u32 csr ;
    u32 dma_wb_base_lo ;
    u32 dma_wb_base_hi ;
    u32 num_pkt_done ;
    u32 max_pkt_time ;
    u32 rxq_rd_addr ;
    u32 rxq_rd_addr_ext ;
    u32 rxq_wr_addr ;
    u32 psr_base_lo ;
    u32 psr_base_hi ;
    u32 psr_num_des ;
    u32 psr_avail_offset ;
    u32 psr_full_offset ;
    u32 psr_access_index ;
    u32 psr_min_des ;
    u32 fbr0_base_lo ;
    u32 fbr0_base_hi ;
    u32 fbr0_num_des ;
    u32 fbr0_avail_offset ;
    u32 fbr0_full_offset ;
    u32 fbr0_rd_index ;
    u32 fbr0_min_des ;
    u32 fbr1_base_lo ;
    u32 fbr1_base_hi ;
    u32 fbr1_num_des ;
    u32 fbr1_avail_offset ;
    u32 fbr1_full_offset ;
    u32 fbr1_rd_index ;
    u32 fbr1_min_des ;
 };
 #line 532 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct txmac_regs {
    u32 ctl ;
    u32 shadow_ptr ;
    u32 err_cnt ;
    u32 max_fill ;
    u32 cf_param ;
    u32 tx_test ;
    u32 err ;
    u32 err_int ;
    u32 bp_ctrl ;
 };
 #line 650 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_195 {
    unsigned char sa6 ;
    unsigned char sa5 ;
    unsigned char sa4 ;
    unsigned char sa3 ;
 };
 #line 650 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _RXMAC_WOL_SA_LO_t {
    u32 value ;
    struct __anonstruct_bits_195 bits ;
 };
 #line 719 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _RXMAC_WOL_SA_LO_t RXMAC_WOL_SA_LO_t;
 #line 720 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_196 {
    unsigned char sa2 ;
    unsigned char sa1 ;
    unsigned short reserved ;
 };
 #line 720 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _RXMAC_WOL_SA_HI_t {
    u32 value ;
    struct __anonstruct_bits_196 bits ;
 };
 #line 738 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _RXMAC_WOL_SA_HI_t RXMAC_WOL_SA_HI_t;
 #line 739 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_197 {
    unsigned char addr1_6 ;
    unsigned char addr1_5 ;
    unsigned char addr1_4 ;
    unsigned char addr1_3 ;
 };
 #line 739 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _RXMAC_UNI_PF_ADDR1_t {
    u32 value ;
    struct __anonstruct_bits_197 bits ;
 };
 #line 765 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _RXMAC_UNI_PF_ADDR1_t RXMAC_UNI_PF_ADDR1_t;
 #line 766 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_198 {
    unsigned char addr2_6 ;
    unsigned char addr2_5 ;
    unsigned char addr2_4 ;
    unsigned char addr2_3 ;
 };
 #line 766 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _RXMAC_UNI_PF_ADDR2_t {
    u32 value ;
    struct __anonstruct_bits_198 bits ;
 };
 #line 786 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _RXMAC_UNI_PF_ADDR2_t RXMAC_UNI_PF_ADDR2_t;
 #line 787 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_199 {
    unsigned char addr1_2 ;
    unsigned char addr1_1 ;
    unsigned char addr2_2 ;
    unsigned char addr2_1 ;
 };
 #line 787 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _RXMAC_UNI_PF_ADDR3_t {
    u32 value ;
    struct __anonstruct_bits_199 bits ;
 };
 #line 807 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _RXMAC_UNI_PF_ADDR3_t RXMAC_UNI_PF_ADDR3_t;
 #line 808 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct _RXMAC_t {
    u32 ctrl ;
    u32 crc0 ;
    u32 crc12 ;
    u32 crc34 ;
    RXMAC_WOL_SA_LO_t sa_lo ;
    RXMAC_WOL_SA_HI_t sa_hi ;
    u32 mask0_word0 ;
    u32 mask0_word1 ;
    u32 mask0_word2 ;
    u32 mask0_word3 ;
    u32 mask1_word0 ;
    u32 mask1_word1 ;
    u32 mask1_word2 ;
    u32 mask1_word3 ;
    u32 mask2_word0 ;
    u32 mask2_word1 ;
    u32 mask2_word2 ;
    u32 mask2_word3 ;
    u32 mask3_word0 ;
    u32 mask3_word1 ;
    u32 mask3_word2 ;
    u32 mask3_word3 ;
    u32 mask4_word0 ;
    u32 mask4_word1 ;
    u32 mask4_word2 ;
    u32 mask4_word3 ;
    RXMAC_UNI_PF_ADDR1_t uni_pf_addr1 ;
    RXMAC_UNI_PF_ADDR2_t uni_pf_addr2 ;
    RXMAC_UNI_PF_ADDR3_t uni_pf_addr3 ;
    u32 multi_hash1 ;
    u32 multi_hash2 ;
    u32 multi_hash3 ;
    u32 multi_hash4 ;
    u32 pf_ctrl ;
    u32 mcif_ctrl_max_seg ;
    u32 mcif_water_mark ;
    u32 rxq_diag ;
    u32 space_avail ;
    u32 mif_ctrl ;
    u32 err_reg ;
 };
 #line 933 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef struct _RXMAC_t RXMAC_t;
 #line 934 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_200 {
    unsigned char Octet3 ;
    unsigned char Octet4 ;
    unsigned char Octet5 ;
    unsigned char Octet6 ;
 };
 #line 934 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _MAC_STATION_ADDR1_t {
    u32 value ;
    struct __anonstruct_bits_200 bits ;
 };
 #line 1142 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _MAC_STATION_ADDR1_t MAC_STATION_ADDR1_t;
 #line 1143 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct __anonstruct_bits_201 {
    unsigned short reserved ;
    unsigned char Octet1 ;
    unsigned char Octet2 ;
 };
 #line 1143 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 union _MAC_STATION_ADDR2_t {
    u32 value ;
    struct __anonstruct_bits_201 bits ;
 };
 #line 1161 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef union _MAC_STATION_ADDR2_t MAC_STATION_ADDR2_t;
 #line 1162 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct _MAC_t {
    u32 cfg1 ;
    u32 cfg2 ;
    u32 ipg ;
    u32 hfdp ;
    u32 max_fm_len ;
    u32 rsv1 ;
    u32 rsv2 ;
    u32 mac_test ;
    u32 mii_mgmt_cfg ;
    u32 mii_mgmt_cmd ;
    u32 mii_mgmt_addr ;
    u32 mii_mgmt_ctrl ;
    u32 mii_mgmt_stat ;
    u32 mii_mgmt_indicator ;
    u32 if_ctrl ;
    u32 if_stat ;
    MAC_STATION_ADDR1_t station_addr_1 ;
    MAC_STATION_ADDR2_t station_addr_2 ;
 };
 #line 1185 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef struct _MAC_t MAC_t;
 #line 1186 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct macstat_regs {
    u32 pad[32U] ;
    u32 TR64 ;
    u32 TR127 ;
    u32 TR255 ;
    u32 TR511 ;
    u32 TR1K ;
    u32 TRMax ;
    u32 TRMgv ;
    u32 RByt ;
    u32 RPkt ;
    u32 RFcs ;
    u32 RMca ;
    u32 RBca ;
    u32 RxCf ;
    u32 RxPf ;
    u32 RxUo ;
    u32 RAln ;
    u32 RFlr ;
    u32 RCde ;
    u32 RCse ;
    u32 RUnd ;
    u32 ROvr ;
    u32 RFrg ;
    u32 RJbr ;
    u32 RDrp ;
    u32 TByt ;
    u32 TPkt ;
    u32 TMca ;
    u32 TBca ;
    u32 TxPf ;
    u32 TDfr ;
    u32 TEdf ;
    u32 TScl ;
    u32 TMcl ;
    u32 TLcl ;
    u32 TXcl ;
    u32 TNcl ;
    u32 TPfh ;
    u32 TDrp ;
    u32 TJbr ;
    u32 TFcs ;
    u32 TxCf ;
    u32 TOvr ;
    u32 TUnd ;
    u32 TFrg ;
    u32 Carry1 ;
    u32 Carry2 ;
    u32 Carry1M ;
    u32 Carry2M ;
 };
 #line 1399 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct mmc_regs {
    u32 mmc_ctrl ;
    u32 sram_access ;
    u32 sram_word1 ;
    u32 sram_word2 ;
    u32 sram_word3 ;
    u32 sram_word4 ;
 };
 #line 1444 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 struct _ADDRESS_MAP_t {
    struct global_regs global ;
    u8 unused_global[4036U] ;
    struct txdma_regs txdma ;
    u8 unused_txdma[3992U] ;
    struct rxdma_regs rxdma ;
    u8 unused_rxdma[3980U] ;
    struct txmac_regs txmac ;
    u8 unused_txmac[4060U] ;
    RXMAC_t rxmac ;
    u8 unused_rxmac[3936U] ;
    MAC_t mac ;
    u8 unused_mac[4024U] ;
    struct macstat_regs macstat ;
    u8 unused_mac_stat[3776U] ;
    struct mmc_regs mmc ;
    u8 unused_mmc[4072U] ;
    u8 unused_[1015808U] ;
    u8 unused_exp_rom[4096U] ;
    u8 unused__[524288U] ;
 };
 #line 1481 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 typedef struct _ADDRESS_MAP_t ADDRESS_MAP_t;
 #line 160 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_phy.h"
 struct __anonstruct_bits_203 {
    unsigned char ext_cap : 1 ;
    unsigned char jabber_detect : 1 ;
    unsigned char link_status : 1 ;
    unsigned char auto_neg_able : 1 ;
    unsigned char remote_fault : 1 ;
    unsigned char auto_neg_complete : 1 ;
    unsigned char preamble_supress : 1 ;
    unsigned char res1 : 1 ;
    unsigned char extend_status : 1 ;
    unsigned char link_100T2hdx : 1 ;
    unsigned char link_100T2fdx : 1 ;
    unsigned char link_10hdx : 1 ;
    unsigned char link_10fdx : 1 ;
    unsigned char link_100hdx : 1 ;
    unsigned char link_100fdx : 1 ;
    unsigned char link_100T4 : 1 ;
 };
 #line 160 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_phy.h"
 union _MI_BMSR_t {
    u16 value ;
    struct __anonstruct_bits_203 bits ;
 };
 #line 201 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_phy.h"
 typedef union _MI_BMSR_t MI_BMSR_t;
 #line 236 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_phy.h"
 struct tx_desc {
    u32 addr_hi ;
    u32 addr_lo ;
    u32 len_vlan ;
    u32 flags ;
 };
 #line 99 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_tx.h"
 struct tcb {
    struct tcb *next ;
    u32 flags ;
    u32 count ;
    u32 stale ;
    struct sk_buff *skb ;
    u32 index ;
    u32 index_start ;
 };
 #line 115 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_tx.h"
 struct tx_ring {
    struct tcb *tcb_ring ;
    struct tcb *tcb_qhead ;
    struct tcb *tcb_qtail ;
    struct tcb *send_head ;
    struct tcb *send_tail ;
    int used ;
    struct tx_desc *tx_desc_ring ;
    dma_addr_t tx_desc_ring_pa ;
    u32 send_idx ;
    u32 *tx_status ;
    dma_addr_t tx_status_pa ;
    int since_irq ;
 };
 #line 147 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_rx.h"
 struct rx_status_block {
    u32 Word0 ;
    u32 Word1 ;
 };
 #line 180 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_rx.h"
 struct fbr_lookup {
    void *virt[1024U] ;
    void *buffer1[1024U] ;
    void *buffer2[1024U] ;
    u32 bus_high[1024U] ;
    u32 bus_low[1024U] ;
 };
 #line 191 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_rx.h"
 struct rx_ring {
    void *pFbr0RingVa ;
    dma_addr_t pFbr0RingPa ;
    void *Fbr0MemVa[32U] ;
    dma_addr_t Fbr0MemPa[32U] ;
    uint64_t Fbr0Realpa ;
    uint64_t Fbr0offset ;
    u32 local_Fbr0_full ;
    u32 Fbr0NumEntries ;
    u32 Fbr0BufferSize ;
    void *pFbr1RingVa ;
    dma_addr_t pFbr1RingPa ;
    void *Fbr1MemVa[32U] ;
    dma_addr_t Fbr1MemPa[32U] ;
    uint64_t Fbr1Realpa ;
    uint64_t Fbr1offset ;
    struct fbr_lookup *fbr[2U] ;
    u32 local_Fbr1_full ;
    u32 Fbr1NumEntries ;
    u32 Fbr1BufferSize ;
    void *pPSRingVa ;
    dma_addr_t pPSRingPa ;
    u32 local_psr_full ;
    u32 PsrNumEntries ;
    struct rx_status_block *rx_status_block ;
    dma_addr_t rx_status_bus ;
    struct list_head RecvBufferPool ;
    struct list_head RecvList ;
    u32 nReadyRecv ;
    u32 NumRfd ;
    bool UnfinishedReceives ;
    struct list_head RecvPacketPool ;
    struct kmem_cache *RecvLookaside ;
 };
 #line 93 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x_adapter.h"
 struct _ce_stats_t {
    uint64_t ipackets ;
    uint64_t opackets ;
    u32 unircv ;
    atomic_t unixmt ;
    u32 multircv ;
    atomic_t multixmt ;
    u32 brdcstrcv ;
    atomic_t brdcstxmt ;
    u32 norcvbuf ;
    u32 noxmtbuf ;
    u8 xcvr_addr ;
    u32 xcvr_id ;
    u32 tx_uflo ;
    u32 collisions ;
    u32 excessive_collisions ;
    u32 first_collision ;
    u32 late_collisions ;
    u32 max_pkt_error ;
    u32 tx_deferred ;
    u32 rx_ov_flow ;
    u32 length_err ;
    u32 alignment_err ;
    u32 crc_err ;
    u32 code_violations ;
    u32 other_errors ;
    u32 SynchrounousIterations ;
    u32 InterruptStatus ;
 };
 #line 146 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x_adapter.h"
 typedef struct _ce_stats_t CE_STATS_t;
 #line 147
 enum ldv_25441 {
     NETIF_STATUS_INVALID = 0,
     NETIF_STATUS_MEDIA_CONNECT = 1,
     NETIF_STATUS_MEDIA_DISCONNECT = 2,
     NETIF_STATUS_MAX = 3
 } ;
 #line 154 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x_adapter.h"
 struct et131x_adapter {
    struct net_device *netdev ;
    struct pci_dev *pdev ;
    struct work_struct task ;
    u32 Flags ;
    u32 HwErrCount ;
    u8 rom_addr[6U] ;
    u8 addr[6U] ;
    bool has_eeprom ;
    u8 eeprom_data[2U] ;
    spinlock_t Lock ;
    spinlock_t TCBSendQLock ;
    spinlock_t TCBReadyQLock ;
    spinlock_t send_hw_lock ;
    spinlock_t rcv_lock ;
    spinlock_t RcvPendLock ;
    spinlock_t FbrLock ;
    spinlock_t PHYLock ;
    u32 PacketFilter ;
    u32 linkspeed ;
    u32 duplex_mode ;
    u32 MCAddressCount ;
    u8 MCList[128U][6U] ;
    ADDRESS_MAP_t *regs ;
    u8 SpeedDuplex ;
    u8 wanted_flow ;
    u8 RegistryPhyComa ;
    u32 RegistryRxMemEnd ;
    u32 RegistryJumboPacket ;
    u8 AiForceDpx ;
    u16 AiForceSpeed ;
    u8 flowcontrol ;
    enum ldv_25441 MediaState ;
    struct timer_list ErrorTimer ;
    u8 boot_coma ;
    u16 pdown_speed ;
    u8 pdown_duplex ;
    u32 CachedMaskValue ;
    MI_BMSR_t Bmsr ;
    struct tx_ring tx_ring ;
    struct rx_ring rx_ring ;
    u8 ReplicaPhyLoopbk ;
    u8 ReplicaPhyLoopbkPF ;
    CE_STATS_t Stats ;
    struct net_device_stats net_stats ;
    struct net_device_stats net_stats_prev ;
 };
 #line 290 "include/linux/timer.h"
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 125 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/desc_defs.h"
 struct paravirt_callee_save {
    void *func ;
 };
 #line 190 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/paravirt_types.h"
 struct pv_irq_ops {
    struct paravirt_callee_save save_fl ;
    struct paravirt_callee_save restore_fl ;
    struct paravirt_callee_save irq_disable ;
    struct paravirt_callee_save irq_enable ;
    void (*safe_halt)(void) ;
    void (*halt)(void) ;
    void (*adjust_exception_frame)(void) ;
 };
 #line 290 "include/linux/timer.h"
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 149 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_tx.h"
 struct fbr_desc {
    u32 addr_lo ;
    u32 addr_hi ;
    u32 word2 ;
 };
 #line 99 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_rx.h"
 struct pkt_stat_desc {
    u32 word0 ;
    u32 word1 ;
 };
 #line 242 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_rx.h"
 struct rfd {
    struct list_head list_node ;
    struct sk_buff *skb ;
    u32 len ;
    u16 bufferindex ;
    u8 ringindex ;
 };
 #line 290 "include/linux/timer.h"
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 134 "include/linux/skbuff.h"
 struct skb_frag_struct;
 #line 134
 struct skb_frag_struct;
 #line 134 "include/linux/skbuff.h"
 typedef struct skb_frag_struct skb_frag_t;
 #line 135 "include/linux/skbuff.h"
 struct skb_frag_struct {
    struct page *page ;
    __u32 page_offset ;
    __u32 size ;
 };
 #line 142 "include/linux/skbuff.h"
 struct skb_shared_hwtstamps {
    ktime_t hwtstamp ;
    ktime_t syststamp ;
 };
 #line 183 "include/linux/skbuff.h"
 struct skb_shared_info {
    unsigned short nr_frags ;
    unsigned short gso_size ;
    unsigned short gso_segs ;
    unsigned short gso_type ;
    __be32 ip6_frag_id ;
    __u8 tx_flags ;
    struct sk_buff *frag_list ;
    struct skb_shared_hwtstamps hwtstamps ;
    atomic_t dataref ;
    void *destructor_arg ;
    skb_frag_t frags[18U] ;
 };
 #line 290 "include/linux/timer.h"
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 290
 enum hrtimer_restart;
 #line 1590 "include/linux/pci.h"
 struct mii_ioctl_data {
    __u16 phy_id ;
    __u16 reg_num ;
    __u16 val_in ;
    __u16 val_out ;
 };
 #line 213 "include/linux/netdevice.h"
 struct netdev_hw_addr {
    struct list_head list ;
    unsigned char addr[32U] ;
    unsigned char type ;
    bool synced ;
    bool global_use ;
    int refcount ;
    struct rcu_head rcu_head ;
 };
 #line 1 "<compiler builtins>"
 
 #line 1
 long __builtin_expect(long  , long  ) ;
 #line 3 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 int ldv_try_module_get(struct module *module ) ;
 #line 4
 void ldv_module_get(struct module *module ) ;
 #line 5
 void ldv_module_put(struct module *module ) ;
 #line 6
 unsigned int ldv_module_refcount(void) ;
 #line 7
 void ldv_module_put_and_exit(void) ;
 #line 797 "include/linux/device.h"
 extern int dev_err(struct device  const  * , char const   *  , ...) ;
 #line 723 "include/linux/pci.h"
 extern int pci_bus_read_config_byte(struct pci_bus * , unsigned int  , int  , u8 * ) ;
 #line 727
 extern int pci_bus_read_config_dword(struct pci_bus * , unsigned int  , int  , u32 * ) ;
 #line 729
 extern int pci_bus_write_config_byte(struct pci_bus * , unsigned int  , int  , u8  ) ;
 #line 733
 extern int pci_bus_write_config_dword(struct pci_bus * , unsigned int  , int  , u32  ) ;
 #line 737 "include/linux/pci.h"
 __inline static int pci_read_config_byte(struct pci_dev *dev , int where , u8 *val ) 
 { int tmp ;
   struct pci_bus *__cil_tmp5 ;
   unsigned int __cil_tmp6 ;
 
   {
   {
 #line 739
   __cil_tmp5 = dev->bus;
 #line 739
   __cil_tmp6 = dev->devfn;
 #line 739
   tmp = pci_bus_read_config_byte(__cil_tmp5, __cil_tmp6, where, val);
   }
 #line 739
   return (tmp);
 }
 }
 #line 745 "include/linux/pci.h"
 __inline static int pci_read_config_dword(struct pci_dev *dev , int where , u32 *val ) 
 { int tmp ;
   struct pci_bus *__cil_tmp5 ;
   unsigned int __cil_tmp6 ;
 
   {
   {
 #line 748
   __cil_tmp5 = dev->bus;
 #line 748
   __cil_tmp6 = dev->devfn;
 #line 748
   tmp = pci_bus_read_config_dword(__cil_tmp5, __cil_tmp6, where, val);
   }
 #line 748
   return (tmp);
 }
 }
 #line 750 "include/linux/pci.h"
 __inline static int pci_write_config_byte(struct pci_dev *dev , int where , u8 val ) 
 { int tmp ;
   struct pci_bus *__cil_tmp5 ;
   unsigned int __cil_tmp6 ;
   int __cil_tmp7 ;
   u8 __cil_tmp8 ;
 
   {
   {
 #line 752
   __cil_tmp5 = dev->bus;
 #line 752
   __cil_tmp6 = dev->devfn;
 #line 752
   __cil_tmp7 = (int )val;
 #line 752
   __cil_tmp8 = (u8 )__cil_tmp7;
 #line 752
   tmp = pci_bus_write_config_byte(__cil_tmp5, __cil_tmp6, where, __cil_tmp8);
   }
 #line 752
   return (tmp);
 }
 }
 #line 758 "include/linux/pci.h"
 __inline static int pci_write_config_dword(struct pci_dev *dev , int where , u32 val ) 
 { int tmp ;
   struct pci_bus *__cil_tmp5 ;
   unsigned int __cil_tmp6 ;
 
   {
   {
 #line 761
   __cil_tmp5 = dev->bus;
 #line 761
   __cil_tmp6 = dev->devfn;
 #line 761
   tmp = pci_bus_write_config_dword(__cil_tmp5, __cil_tmp6, where, val);
   }
 #line 761
   return (tmp);
 }
 }
 #line 16 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/delay.h"
 extern void __const_udelay(unsigned long  ) ;
 #line 215 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 __inline void add_10bit(u32 *v , int n ) 
 { u32 __cil_tmp3 ;
   unsigned int __cil_tmp4 ;
   u32 __cil_tmp5 ;
   u32 __cil_tmp6 ;
   u32 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
 
   {
 #line 217
   __cil_tmp3 = *v;
 #line 217
   __cil_tmp4 = __cil_tmp3 & 1024U;
 #line 217
   __cil_tmp5 = (u32 )n;
 #line 217
   __cil_tmp6 = *v;
 #line 217
   __cil_tmp7 = __cil_tmp6 + __cil_tmp5;
 #line 217
   __cil_tmp8 = __cil_tmp7 & 1023U;
 #line 217
   *v = __cil_tmp8 | __cil_tmp4;
 #line 218
   return;
 }
 }
 #line 220 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et1310_address_map.h"
 __inline void add_12bit(u32 *v , int n ) 
 { u32 __cil_tmp3 ;
   unsigned int __cil_tmp4 ;
   u32 __cil_tmp5 ;
   u32 __cil_tmp6 ;
   u32 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
 
   {
 #line 222
   __cil_tmp3 = *v;
 #line 222
   __cil_tmp4 = __cil_tmp3 & 4096U;
 #line 222
   __cil_tmp5 = (u32 )n;
 #line 222
   __cil_tmp6 = *v;
 #line 222
   __cil_tmp7 = __cil_tmp6 + __cil_tmp5;
 #line 222
   __cil_tmp8 = __cil_tmp7 & 4095U;
 #line 222
   *v = __cil_tmp8 | __cil_tmp4;
 #line 223
   return;
 }
 }
 #line 52 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
 int et131x_init_eeprom(struct et131x_adapter *etdev ) ;
 #line 130 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 static int eeprom_wait_ready(struct pci_dev *pdev , u32 *status ) 
 { u32 reg ;
   int i ;
   int tmp ;
   unsigned int __cil_tmp6 ;
   u32 *__cil_tmp7 ;
   unsigned long __cil_tmp8 ;
   unsigned long __cil_tmp9 ;
   int __cil_tmp10 ;
 
   {
 #line 142
   i = 0;
 #line 142
   goto ldv_35664;
   ldv_35663: 
   {
 #line 144
   tmp = pci_read_config_dword(pdev, 176, & reg);
   }
 #line 144
   if (tmp != 0) {
 #line 145
     return (-5);
   } else {
 
   }
   {
 #line 148
   __cil_tmp6 = reg & 12288U;
 #line 148
   if (__cil_tmp6 == 12288U) {
     {
 #line 149
     __cil_tmp7 = (u32 *)0;
 #line 149
     __cil_tmp8 = (unsigned long )__cil_tmp7;
 #line 149
     __cil_tmp9 = (unsigned long )status;
 #line 149
     if (__cil_tmp9 != __cil_tmp8) {
 #line 150
       *status = reg;
     } else {
 
     }
     }
     {
 #line 151
     __cil_tmp10 = (int )reg;
 #line 151
     return (__cil_tmp10 & 255);
     }
   } else {
 
   }
   }
 #line 142
   i = i + 1;
   ldv_35664: ;
 #line 142
   if (i <= 999) {
 #line 143
     goto ldv_35663;
   } else {
 #line 145
     goto ldv_35665;
   }
   ldv_35665: ;
 #line 154
   return (-110);
 }
 }
 #line 166 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 static int eeprom_write(struct et131x_adapter *etdev , u32 addr , u8 data ) 
 { struct pci_dev *pdev ;
   int index ;
   int retries ;
   int err ;
   int i2c_wack ;
   int writeok ;
   u32 status ;
   u32 val ;
   int tmp ;
   int tmp___0 ;
   int tmp___1 ;
   int tmp___2 ;
   int tmp___3 ;
   u32 *__cil_tmp17 ;
   u8 __cil_tmp18 ;
   int __cil_tmp19 ;
   u8 __cil_tmp20 ;
   unsigned int __cil_tmp21 ;
   struct pci_dev *__cil_tmp22 ;
   u8 __cil_tmp23 ;
   unsigned int __cil_tmp24 ;
   unsigned int __cil_tmp25 ;
   u8 __cil_tmp26 ;
   unsigned int __cil_tmp27 ;
   unsigned int __cil_tmp28 ;
   unsigned int __cil_tmp29 ;
 
   {
   {
 #line 168
   pdev = etdev->pdev;
 #line 169
   index = 0;
 #line 171
   err = 0;
 #line 172
   i2c_wack = 0;
 #line 173
   writeok = 0;
 #line 175
   val = 0U;
 #line 186
   __cil_tmp17 = (u32 *)0;
 #line 186
   err = eeprom_wait_ready(pdev, __cil_tmp17);
   }
 #line 187
   if (err != 0) {
 #line 188
     return (err);
   } else {
 
   }
   {
 #line 196
   __cil_tmp18 = (u8 )192;
 #line 196
   tmp = pci_write_config_byte(pdev, 177, __cil_tmp18);
   }
 #line 196
   if (tmp != 0) {
 #line 198
     return (-5);
   } else {
 
   }
 #line 200
   i2c_wack = 1;
 #line 204
   retries = 0;
 #line 204
   goto ldv_35682;
   ldv_35681: 
   {
 #line 206
   tmp___0 = pci_write_config_dword(pdev, 172, addr);
   }
 #line 206
   if (tmp___0 != 0) {
 #line 207
     goto ldv_35679;
   } else {
 
   }
   {
 #line 212
   __cil_tmp19 = (int )data;
 #line 212
   __cil_tmp20 = (u8 )__cil_tmp19;
 #line 212
   tmp___1 = pci_write_config_byte(pdev, 176, __cil_tmp20);
   }
 #line 212
   if (tmp___1 != 0) {
 #line 213
     goto ldv_35679;
   } else {
 
   }
   {
 #line 222
   err = eeprom_wait_ready(pdev, & status);
   }
 #line 223
   if (err < 0) {
 #line 224
     return (0);
   } else {
 
   }
   {
 #line 231
   __cil_tmp21 = status & 8U;
 #line 231
   if (__cil_tmp21 != 0U) {
     {
 #line 231
     __cil_tmp22 = etdev->pdev;
 #line 231
     __cil_tmp23 = __cil_tmp22->revision;
 #line 231
     __cil_tmp24 = (unsigned int )__cil_tmp23;
 #line 231
     if (__cil_tmp24 == 0U) {
 #line 233
       goto ldv_35679;
     } else {
 
     }
     }
   } else {
 
   }
   }
   {
 #line 243
   __cil_tmp25 = status & 4U;
 #line 243
   if (__cil_tmp25 != 0U) {
     {
 #line 250
     __const_udelay(42950UL);
     }
 #line 251
     goto ldv_35680;
   } else {
 
   }
   }
 #line 254
   writeok = 1;
 #line 255
   goto ldv_35679;
   ldv_35680: 
 #line 204
   retries = retries + 1;
   ldv_35682: ;
 #line 204
   if (retries <= 1) {
 #line 205
     goto ldv_35681;
   } else {
 #line 207
     goto ldv_35679;
   }
   ldv_35679: 
   {
 #line 261
   __const_udelay(42950UL);
   }
 #line 263
   goto ldv_35689;
   ldv_35688: 
   {
 #line 264
   __cil_tmp26 = (u8 )128;
 #line 264
   tmp___2 = pci_write_config_byte(pdev, 177, __cil_tmp26);
   }
 #line 264
   if (tmp___2 != 0) {
 #line 266
     writeok = 0;
   } else {
 
   }
   ldv_35685: 
   {
 #line 272
   pci_write_config_dword(pdev, 172, addr);
   }
   ldv_35683: 
   {
 #line 276
   pci_read_config_dword(pdev, 176, & val);
   }
   {
 #line 278
   __cil_tmp27 = val & 65536U;
 #line 278
   if (__cil_tmp27 == 0U) {
 #line 279
     goto ldv_35683;
   } else {
 #line 281
     goto ldv_35684;
   }
   }
   ldv_35684: ;
   {
 #line 279
   __cil_tmp28 = val & 262144U;
 #line 279
   if (__cil_tmp28 != 0U) {
 #line 280
     goto ldv_35685;
   } else {
 #line 282
     goto ldv_35686;
   }
   }
   ldv_35686: ;
   {
 #line 281
   __cil_tmp29 = val & 65280U;
 #line 281
   if (__cil_tmp29 != 49152U) {
 #line 282
     goto ldv_35687;
   } else
 #line 281
   if (index == 10000) {
 #line 282
     goto ldv_35687;
   } else {
 
   }
   }
 #line 283
   index = index + 1;
   ldv_35689: ;
 #line 263
   if (i2c_wack != 0) {
 #line 264
     goto ldv_35688;
   } else {
 #line 266
     goto ldv_35687;
   }
   ldv_35687: ;
 #line 285
   if (writeok != 0) {
 #line 285
     tmp___3 = 0;
   } else {
 #line 285
     tmp___3 = -5;
   }
 #line 285
   return (tmp___3);
 }
 }
 #line 298 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 static int eeprom_read(struct et131x_adapter *etdev , u32 addr , u8 *pdata ) 
 { struct pci_dev *pdev ;
   int err ;
   u32 status ;
   int tmp ;
   int tmp___0 ;
   int tmp___1 ;
   u32 *__cil_tmp10 ;
   u8 __cil_tmp11 ;
   unsigned int __cil_tmp12 ;
 
   {
   {
 #line 300
   pdev = etdev->pdev;
 #line 309
   __cil_tmp10 = (u32 *)0;
 #line 309
   err = eeprom_wait_ready(pdev, __cil_tmp10);
   }
 #line 310
   if (err != 0) {
 #line 311
     return (err);
   } else {
 
   }
   {
 #line 318
   __cil_tmp11 = (u8 )128;
 #line 318
   tmp = pci_write_config_byte(pdev, 177, __cil_tmp11);
   }
 #line 318
   if (tmp != 0) {
 #line 320
     return (-5);
   } else {
 
   }
   {
 #line 325
   tmp___0 = pci_write_config_dword(pdev, 172, addr);
   }
 #line 325
   if (tmp___0 != 0) {
 #line 326
     return (-5);
   } else {
 
   }
   {
 #line 332
   err = eeprom_wait_ready(pdev, & status);
   }
 #line 333
   if (err < 0) {
 #line 334
     return (err);
   } else {
 
   }
 #line 339
   *pdata = (u8 )err;
   {
 #line 344
   __cil_tmp12 = status & 4U;
 #line 344
   if (__cil_tmp12 != 0U) {
 #line 344
     tmp___1 = -5;
   } else {
 #line 344
     tmp___1 = 0;
   }
   }
 #line 344
   return (tmp___1);
 }
 }
 #line 347 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 int et131x_init_eeprom(struct et131x_adapter *etdev ) 
 { struct pci_dev *pdev ;
   u8 eestatus ;
   int tmp ;
   int write_failed ;
   int i ;
   u8 eedata[4U] ;
   int tmp___0 ;
   struct device *__cil_tmp9 ;
   struct device  const  *__cil_tmp10 ;
   int __cil_tmp11 ;
   int __cil_tmp12 ;
   u8 __cil_tmp13 ;
   unsigned int __cil_tmp14 ;
   u32 __cil_tmp15 ;
   int __cil_tmp16 ;
   u8 __cil_tmp17 ;
   u8 __cil_tmp18 ;
   unsigned int __cil_tmp19 ;
   struct device *__cil_tmp20 ;
   struct device  const  *__cil_tmp21 ;
   int __cil_tmp22 ;
   struct device *__cil_tmp23 ;
   struct device  const  *__cil_tmp24 ;
   int __cil_tmp25 ;
   u8 (*__cil_tmp26)[2U] ;
   u8 *__cil_tmp27 ;
   u8 (*__cil_tmp28)[2U] ;
   u8 *__cil_tmp29 ;
   u8 *__cil_tmp30 ;
   u8 __cil_tmp31 ;
   unsigned int __cil_tmp32 ;
 
   {
   {
 #line 349
   pdev = etdev->pdev;
 #line 355
   pci_read_config_byte(pdev, 178, & eestatus);
 #line 364
   tmp = pci_read_config_byte(pdev, 178, & eestatus);
   }
 #line 364
   if (tmp != 0) {
     {
 #line 365
     __cil_tmp9 = & pdev->dev;
 #line 365
     __cil_tmp10 = (struct device  const  *)__cil_tmp9;
 #line 365
     dev_err(__cil_tmp10, "Could not read PCI config space for EEPROM Status\n");
     }
 #line 367
     return (-5);
   } else {
 
   }
   {
 #line 373
   __cil_tmp11 = (int )eestatus;
 #line 373
   __cil_tmp12 = __cil_tmp11 & 76;
 #line 373
   if (__cil_tmp12 != 0) {
 #line 374
     write_failed = 0;
     {
 #line 375
     __cil_tmp13 = pdev->revision;
 #line 375
     __cil_tmp14 = (unsigned int )__cil_tmp13;
 #line 375
     if (__cil_tmp14 == 1U) {
 #line 377
       eedata[0] = (u8 )254U;
 #line 377
       eedata[1] = (u8 )19U;
 #line 377
       eedata[2] = (u8 )16U;
 #line 377
       eedata[3] = (u8 )255U;
 #line 383
       i = 0;
 #line 383
       goto ldv_35707;
       ldv_35706: 
       {
 #line 384
       __cil_tmp15 = (u32 )i;
 #line 384
       __cil_tmp16 = (int )eedata[i];
 #line 384
       __cil_tmp17 = (u8 )__cil_tmp16;
 #line 384
       tmp___0 = eeprom_write(etdev, __cil_tmp15, __cil_tmp17);
       }
 #line 384
       if (tmp___0 < 0) {
 #line 385
         write_failed = 1;
       } else {
 
       }
 #line 383
       i = i + 1;
       ldv_35707: ;
 #line 383
       if (i <= 2) {
 #line 384
         goto ldv_35706;
       } else {
 #line 386
         goto ldv_35708;
       }
       ldv_35708: ;
     } else {
 
     }
     }
     {
 #line 387
     __cil_tmp18 = pdev->revision;
 #line 387
     __cil_tmp19 = (unsigned int )__cil_tmp18;
 #line 387
     if (__cil_tmp19 != 1U) {
       {
 #line 388
       __cil_tmp20 = & pdev->dev;
 #line 388
       __cil_tmp21 = (struct device  const  *)__cil_tmp20;
 #line 388
       __cil_tmp22 = (int )eestatus;
 #line 388
       dev_err(__cil_tmp21, "Fatal EEPROM Status Error - 0x%04x\n", __cil_tmp22);
 #line 397
       etdev->has_eeprom = (bool )0;
       }
 #line 398
       return (-5);
     } else
 #line 387
     if (write_failed != 0) {
       {
 #line 388
       __cil_tmp23 = & pdev->dev;
 #line 388
       __cil_tmp24 = (struct device  const  *)__cil_tmp23;
 #line 388
       __cil_tmp25 = (int )eestatus;
 #line 388
       dev_err(__cil_tmp24, "Fatal EEPROM Status Error - 0x%04x\n", __cil_tmp25);
 #line 397
       etdev->has_eeprom = (bool )0;
       }
 #line 398
       return (-5);
     } else {
 
     }
     }
   } else {
 
   }
   }
   {
 #line 401
   etdev->has_eeprom = (bool )1;
 #line 406
   __cil_tmp26 = & etdev->eeprom_data;
 #line 406
   __cil_tmp27 = (u8 *)__cil_tmp26;
 #line 406
   eeprom_read(etdev, 112U, __cil_tmp27);
 #line 407
   __cil_tmp28 = & etdev->eeprom_data;
 #line 407
   __cil_tmp29 = (u8 *)__cil_tmp28;
 #line 407
   __cil_tmp30 = __cil_tmp29 + 1UL;
 #line 407
   eeprom_read(etdev, 113U, __cil_tmp30);
   }
   {
 #line 409
   __cil_tmp31 = etdev->eeprom_data[0];
 #line 409
   __cil_tmp32 = (unsigned int )__cil_tmp31;
 #line 409
   if (__cil_tmp32 != 205U) {
 #line 411
     etdev->eeprom_data[1] = (u8 )0U;
   } else {
 
   }
   }
 #line 413
   return (0);
 }
 }
 #line 5 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/kernel-rules/files/engine-blast-assert.h"
 void ldv_blast_assert(void) 
 { 
 
   {
   ERROR: ;
 #line 6
   goto ERROR;
 }
 }
 #line 6 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/kernel-rules/files/engine-blast.h"
 extern int ldv_undefined_int(void) ;
 #line 423 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 void ldv_check_final_state(void) ;
 #line 426 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 int ldv_module_refcounter  =    1;
 #line 429 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 void ldv_module_get(struct module *module ) 
 { struct module *__cil_tmp2 ;
   unsigned long __cil_tmp3 ;
   unsigned long __cil_tmp4 ;
 
   {
   {
 #line 432
   __cil_tmp2 = (struct module *)0;
 #line 432
   __cil_tmp3 = (unsigned long )__cil_tmp2;
 #line 432
   __cil_tmp4 = (unsigned long )module;
 #line 432
   if (__cil_tmp4 != __cil_tmp3) {
 #line 434
     ldv_module_refcounter = ldv_module_refcounter + 1;
   } else {
 
   }
   }
 #line 435
   return;
 }
 }
 #line 439 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 int ldv_try_module_get(struct module *module ) 
 { int module_get_succeeded ;
   struct module *__cil_tmp3 ;
   unsigned long __cil_tmp4 ;
   unsigned long __cil_tmp5 ;
 
   {
   {
 #line 444
   __cil_tmp3 = (struct module *)0;
 #line 444
   __cil_tmp4 = (unsigned long )__cil_tmp3;
 #line 444
   __cil_tmp5 = (unsigned long )module;
 #line 444
   if (__cil_tmp5 != __cil_tmp4) {
     {
 #line 447
     module_get_succeeded = ldv_undefined_int();
     }
 #line 449
     if (module_get_succeeded == 1) {
 #line 451
       ldv_module_refcounter = ldv_module_refcounter + 1;
 #line 453
       return (1);
     } else {
 #line 458
       return (0);
     }
   } else {
 
   }
   }
 #line 460
   return (0);
 }
 }
 #line 464 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 void ldv_module_put(struct module *module ) 
 { struct module *__cil_tmp2 ;
   unsigned long __cil_tmp3 ;
   unsigned long __cil_tmp4 ;
 
   {
   {
 #line 467
   __cil_tmp2 = (struct module *)0;
 #line 467
   __cil_tmp3 = (unsigned long )__cil_tmp2;
 #line 467
   __cil_tmp4 = (unsigned long )module;
 #line 467
   if (__cil_tmp4 != __cil_tmp3) {
 #line 469
     if (ldv_module_refcounter <= 1) {
       {
 #line 469
       ldv_blast_assert();
       }
     } else {
 
     }
 #line 471
     ldv_module_refcounter = ldv_module_refcounter - 1;
   } else {
 
   }
   }
 #line 473
   return;
 }
 }
 #line 476 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 void ldv_module_put_and_exit(void) 
 { struct module *__cil_tmp1 ;
 
   {
   {
 #line 478
   __cil_tmp1 = (struct module *)1;
 #line 478
   ldv_module_put(__cil_tmp1);
   }
   LDV_STOP: ;
 #line 480
   goto LDV_STOP;
 }
 }
 #line 484 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 unsigned int ldv_module_refcount(void) 
 { int __cil_tmp1 ;
 
   {
   {
 #line 487
   __cil_tmp1 = ldv_module_refcounter + -1;
 #line 487
   return ((unsigned int )__cil_tmp1);
   }
 }
 }
 #line 491 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_eeprom.c.p"
 void ldv_check_final_state(void) 
 { 
 
   {
 #line 494
   if (ldv_module_refcounter != 1) {
     {
 #line 494
     ldv_blast_assert();
     }
   } else {
 
   }
 #line 497
   return;
 }
 }
 #line 57 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/io.h"
 __inline static unsigned int readl(void const volatile   *addr ) 
 { unsigned int ret ;
   unsigned int volatile   *__cil_tmp3 ;
 
   {
 #line 57
   __cil_tmp3 = (unsigned int volatile   *)addr;
 #line 57
   __asm__  volatile   ("movl %1,%0": "=r" (ret): "m" (*__cil_tmp3): "memory");
 #line 57
   return (ret);
 }
 }
 #line 65 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/io.h"
 __inline static void writel(unsigned int val , void volatile   *addr ) 
 { unsigned int volatile   *__cil_tmp3 ;
 
   {
 #line 65
   __cil_tmp3 = (unsigned int volatile   *)addr;
 #line 65
   __asm__  volatile   ("movl %0,%1": : "r" (val), "m" (*__cil_tmp3): "memory");
 #line 66
   return;
 }
 }
 #line 799 "include/linux/device.h"
 extern int dev_warn(struct device  const  * , char const   *  , ...) ;
 #line 14 "include/linux/bitrev.h"
 extern u32 bitrev32(u32  ) ;
 #line 11 "include/linux/crc32.h"
 extern u32 crc32_le(u32  , unsigned char const   * , size_t  ) ;
 #line 74 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
 void ConfigMACRegs1(struct et131x_adapter *etdev ) ;
 #line 75
 void ConfigMACRegs2(struct et131x_adapter *etdev ) ;
 #line 76
 void ConfigRxMacRegs(struct et131x_adapter *etdev ) ;
 #line 77
 void ConfigTxMacRegs(struct et131x_adapter *etdev ) ;
 #line 78
 void ConfigMacStatRegs(struct et131x_adapter *etdev ) ;
 #line 79
 void ConfigFlowControl(struct et131x_adapter *etdev ) ;
 #line 80
 void UpdateMacStatHostCounters(struct et131x_adapter *etdev ) ;
 #line 81
 void HandleMacStatInterrupt(struct et131x_adapter *etdev ) ;
 #line 82
 void SetupDeviceForMulticast(struct et131x_adapter *etdev ) ;
 #line 83
 void SetupDeviceForUnicast(struct et131x_adapter *etdev ) ;
 #line 98
 void ET1310_PhyAccessMiBit(struct et131x_adapter *etdev , u16 action , u16 regnum ,
                            u16 bitnum , u8 *value ) ;
 #line 137
 void et131x_rx_dma_enable(struct et131x_adapter *etdev ) ;
 #line 149
 void et131x_tx_dma_enable(struct et131x_adapter *etdev ) ;
 #line 112 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigMACRegs1(struct et131x_adapter *etdev ) 
 { struct _MAC_t *pMac ;
   MAC_STATION_ADDR1_t station1 ;
   MAC_STATION_ADDR2_t station2 ;
   u32 ipg ;
   ADDRESS_MAP_t *__cil_tmp6 ;
   u32 *__cil_tmp7 ;
   void volatile   *__cil_tmp8 ;
   u32 *__cil_tmp9 ;
   void volatile   *__cil_tmp10 ;
   u32 *__cil_tmp11 ;
   void volatile   *__cil_tmp12 ;
   u32 *__cil_tmp13 ;
   void volatile   *__cil_tmp14 ;
   u32 *__cil_tmp15 ;
   void volatile   *__cil_tmp16 ;
   u32 *__cil_tmp17 ;
   void volatile   *__cil_tmp18 ;
   u32 *__cil_tmp19 ;
   void volatile   *__cil_tmp20 ;
   u32 __cil_tmp21 ;
   u32 __cil_tmp22 ;
   u32 *__cil_tmp23 ;
   void volatile   *__cil_tmp24 ;
   u32 *__cil_tmp25 ;
   void volatile   *__cil_tmp26 ;
 
   {
   {
 #line 114
   __cil_tmp6 = etdev->regs;
 #line 114
   pMac = & __cil_tmp6->mac;
 #line 122
   __cil_tmp7 = & pMac->cfg1;
 #line 122
   __cil_tmp8 = (void volatile   *)__cil_tmp7;
 #line 122
   writel(3222208512U, __cil_tmp8);
 #line 125
   ipg = 939546720U;
 #line 126
   ipg = ipg | 20480U;
 #line 127
   __cil_tmp9 = & pMac->ipg;
 #line 127
   __cil_tmp10 = (void volatile   *)__cil_tmp9;
 #line 127
   writel(ipg, __cil_tmp10);
 #line 131
   __cil_tmp11 = & pMac->hfdp;
 #line 131
   __cil_tmp12 = (void volatile   *)__cil_tmp11;
 #line 131
   writel(10612791U, __cil_tmp12);
 #line 134
   __cil_tmp13 = & pMac->if_ctrl;
 #line 134
   __cil_tmp14 = (void volatile   *)__cil_tmp13;
 #line 134
   writel(0U, __cil_tmp14);
 #line 137
   __cil_tmp15 = & pMac->mii_mgmt_cfg;
 #line 137
   __cil_tmp16 = (void volatile   *)__cil_tmp15;
 #line 137
   writel(7U, __cil_tmp16);
 #line 146
   station2.bits.Octet1 = etdev->addr[0];
 #line 147
   station2.bits.Octet2 = etdev->addr[1];
 #line 148
   station1.bits.Octet3 = etdev->addr[2];
 #line 149
   station1.bits.Octet4 = etdev->addr[3];
 #line 150
   station1.bits.Octet5 = etdev->addr[4];
 #line 151
   station1.bits.Octet6 = etdev->addr[5];
 #line 152
   __cil_tmp17 = & pMac->station_addr_1.value;
 #line 152
   __cil_tmp18 = (void volatile   *)__cil_tmp17;
 #line 152
   writel(station1.value, __cil_tmp18);
 #line 153
   __cil_tmp19 = & pMac->station_addr_2.value;
 #line 153
   __cil_tmp20 = (void volatile   *)__cil_tmp19;
 #line 153
   writel(station2.value, __cil_tmp20);
 #line 162
   __cil_tmp21 = etdev->RegistryJumboPacket;
 #line 162
   __cil_tmp22 = __cil_tmp21 + 4U;
 #line 162
   __cil_tmp23 = & pMac->max_fm_len;
 #line 162
   __cil_tmp24 = (void volatile   *)__cil_tmp23;
 #line 162
   writel(__cil_tmp22, __cil_tmp24);
 #line 165
   __cil_tmp25 = & pMac->cfg1;
 #line 165
   __cil_tmp26 = (void volatile   *)__cil_tmp25;
 #line 165
   writel(0U, __cil_tmp26);
   }
 #line 166
   return;
 }
 }
 #line 172 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigMACRegs2(struct et131x_adapter *etdev ) 
 { int32_t delay ;
   struct _MAC_t *pMac ;
   u32 cfg1 ;
   u32 cfg2 ;
   u32 ifctrl ;
   u32 ctl ;
   ADDRESS_MAP_t *__cil_tmp8 ;
   ADDRESS_MAP_t *__cil_tmp9 ;
   u32 *__cil_tmp10 ;
   void const volatile   *__cil_tmp11 ;
   u32 *__cil_tmp12 ;
   void const volatile   *__cil_tmp13 ;
   u32 *__cil_tmp14 ;
   void const volatile   *__cil_tmp15 ;
   u32 *__cil_tmp16 ;
   void const volatile   *__cil_tmp17 ;
   u32 __cil_tmp18 ;
   u8 __cil_tmp19 ;
   unsigned int __cil_tmp20 ;
   u8 __cil_tmp21 ;
   unsigned int __cil_tmp22 ;
   u32 *__cil_tmp23 ;
   void volatile   *__cil_tmp24 ;
   u32 __cil_tmp25 ;
   u32 __cil_tmp26 ;
   u32 *__cil_tmp27 ;
   void volatile   *__cil_tmp28 ;
   u32 *__cil_tmp29 ;
   void volatile   *__cil_tmp30 ;
   u32 *__cil_tmp31 ;
   void const volatile   *__cil_tmp32 ;
   unsigned int __cil_tmp33 ;
   struct pci_dev *__cil_tmp34 ;
   struct device *__cil_tmp35 ;
   struct device  const  *__cil_tmp36 ;
   ADDRESS_MAP_t *__cil_tmp37 ;
   u32 *__cil_tmp38 ;
   void volatile   *__cil_tmp39 ;
   u32 __cil_tmp40 ;
   unsigned int __cil_tmp41 ;
 
   {
   {
 #line 174
   delay = 0;
 #line 175
   __cil_tmp8 = etdev->regs;
 #line 175
   pMac = & __cil_tmp8->mac;
 #line 181
   __cil_tmp9 = etdev->regs;
 #line 181
   __cil_tmp10 = & __cil_tmp9->txmac.ctl;
 #line 181
   __cil_tmp11 = (void const volatile   *)__cil_tmp10;
 #line 181
   ctl = readl(__cil_tmp11);
 #line 182
   __cil_tmp12 = & pMac->cfg1;
 #line 182
   __cil_tmp13 = (void const volatile   *)__cil_tmp12;
 #line 182
   cfg1 = readl(__cil_tmp13);
 #line 183
   __cil_tmp14 = & pMac->cfg2;
 #line 183
   __cil_tmp15 = (void const volatile   *)__cil_tmp14;
 #line 183
   cfg2 = readl(__cil_tmp15);
 #line 184
   __cil_tmp16 = & pMac->if_ctrl;
 #line 184
   __cil_tmp17 = (void const volatile   *)__cil_tmp16;
 #line 184
   ifctrl = readl(__cil_tmp17);
 #line 187
   cfg2 = cfg2 & 4294966527U;
   }
   {
 #line 188
   __cil_tmp18 = etdev->linkspeed;
 #line 188
   if (__cil_tmp18 == 2U) {
 #line 189
     cfg2 = cfg2 | 512U;
 #line 191
     ifctrl = ifctrl & 4278190079U;
   } else {
 #line 193
     cfg2 = cfg2 | 256U;
 #line 194
     ifctrl = ifctrl | 16777216U;
   }
   }
 #line 198
   cfg1 = cfg1 | 21U;
 #line 200
   cfg1 = cfg1 & 4294967007U;
   {
 #line 201
   __cil_tmp19 = etdev->flowcontrol;
 #line 201
   __cil_tmp20 = (unsigned int )__cil_tmp19;
 #line 201
   if (__cil_tmp20 == 2U) {
 #line 202
     cfg1 = cfg1 | 32U;
   } else {
     {
 #line 201
     __cil_tmp21 = etdev->flowcontrol;
 #line 201
     __cil_tmp22 = (unsigned int )__cil_tmp21;
 #line 201
     if (__cil_tmp22 == 0U) {
 #line 202
       cfg1 = cfg1 | 32U;
     } else {
 
     }
     }
   }
   }
   {
 #line 203
   __cil_tmp23 = & pMac->cfg1;
 #line 203
   __cil_tmp24 = (void volatile   *)__cil_tmp23;
 #line 203
   writel(cfg1, __cil_tmp24);
 #line 208
   cfg2 = cfg2 | 28694U;
 #line 209
   cfg2 = cfg2 & 4294967262U;
   }
   {
 #line 212
   __cil_tmp25 = etdev->duplex_mode;
 #line 212
   if (__cil_tmp25 != 0U) {
 #line 213
     cfg2 = cfg2 | 1U;
   } else {
 
   }
   }
 #line 215
   ifctrl = ifctrl & 4227858431U;
   {
 #line 216
   __cil_tmp26 = etdev->duplex_mode;
 #line 216
   if (__cil_tmp26 == 0U) {
 #line 217
     ifctrl = ifctrl | 67108864U;
   } else {
 
   }
   }
   {
 #line 219
   __cil_tmp27 = & pMac->if_ctrl;
 #line 219
   __cil_tmp28 = (void volatile   *)__cil_tmp27;
 #line 219
   writel(ifctrl, __cil_tmp28);
 #line 220
   __cil_tmp29 = & pMac->cfg2;
 #line 220
   __cil_tmp30 = (void volatile   *)__cil_tmp29;
 #line 220
   writel(cfg2, __cil_tmp30);
   }
   ldv_35689: 
   {
 #line 223
   __const_udelay(42950UL);
 #line 224
   delay = delay + 1;
 #line 225
   __cil_tmp31 = & pMac->cfg1;
 #line 225
   __cil_tmp32 = (void const volatile   *)__cil_tmp31;
 #line 225
   cfg1 = readl(__cil_tmp32);
   }
   {
 #line 226
   __cil_tmp33 = cfg1 & 10U;
 #line 226
   if (__cil_tmp33 != 10U) {
 #line 226
     if (delay <= 99) {
 #line 227
       goto ldv_35689;
     } else {
 #line 229
       goto ldv_35690;
     }
   } else {
 #line 229
     goto ldv_35690;
   }
   }
   ldv_35690: ;
 #line 228
   if (delay == 100) {
     {
 #line 229
     __cil_tmp34 = etdev->pdev;
 #line 229
     __cil_tmp35 = & __cil_tmp34->dev;
 #line 229
     __cil_tmp36 = (struct device  const  *)__cil_tmp35;
 #line 229
     dev_warn(__cil_tmp36, "Syncd bits did not respond correctly cfg1 word 0x%08x\n",
              cfg1);
     }
   } else {
 
   }
   {
 #line 235
   ctl = ctl | 9U;
 #line 236
   __cil_tmp37 = etdev->regs;
 #line 236
   __cil_tmp38 = & __cil_tmp37->txmac.ctl;
 #line 236
   __cil_tmp39 = (void volatile   *)__cil_tmp38;
 #line 236
   writel(ctl, __cil_tmp39);
   }
   {
 #line 239
   __cil_tmp40 = etdev->Flags;
 #line 239
   __cil_tmp41 = __cil_tmp40 & 2097152U;
 #line 239
   if (__cil_tmp41 != 0U) {
     {
 #line 240
     et131x_rx_dma_enable(etdev);
 #line 241
     et131x_tx_dma_enable(etdev);
     }
   } else {
 
   }
   }
 #line 243
   return;
 }
 }
 #line 245 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigRxMacRegs(struct et131x_adapter *etdev ) 
 { struct _RXMAC_t *pRxMac ;
   RXMAC_WOL_SA_LO_t sa_lo ;
   RXMAC_WOL_SA_HI_t sa_hi ;
   u32 pf_ctrl ;
   ADDRESS_MAP_t *__cil_tmp6 ;
   u32 *__cil_tmp7 ;
   void volatile   *__cil_tmp8 ;
   u32 *__cil_tmp9 ;
   void volatile   *__cil_tmp10 ;
   u32 *__cil_tmp11 ;
   void volatile   *__cil_tmp12 ;
   u32 *__cil_tmp13 ;
   void volatile   *__cil_tmp14 ;
   u32 *__cil_tmp15 ;
   void volatile   *__cil_tmp16 ;
   u32 *__cil_tmp17 ;
   void volatile   *__cil_tmp18 ;
   u32 *__cil_tmp19 ;
   void volatile   *__cil_tmp20 ;
   u32 *__cil_tmp21 ;
   void volatile   *__cil_tmp22 ;
   u32 *__cil_tmp23 ;
   void volatile   *__cil_tmp24 ;
   u32 *__cil_tmp25 ;
   void volatile   *__cil_tmp26 ;
   u32 *__cil_tmp27 ;
   void volatile   *__cil_tmp28 ;
   u32 *__cil_tmp29 ;
   void volatile   *__cil_tmp30 ;
   u32 *__cil_tmp31 ;
   void volatile   *__cil_tmp32 ;
   u32 *__cil_tmp33 ;
   void volatile   *__cil_tmp34 ;
   u32 *__cil_tmp35 ;
   void volatile   *__cil_tmp36 ;
   u32 *__cil_tmp37 ;
   void volatile   *__cil_tmp38 ;
   u32 *__cil_tmp39 ;
   void volatile   *__cil_tmp40 ;
   u32 *__cil_tmp41 ;
   void volatile   *__cil_tmp42 ;
   u32 *__cil_tmp43 ;
   void volatile   *__cil_tmp44 ;
   u32 *__cil_tmp45 ;
   void volatile   *__cil_tmp46 ;
   u32 *__cil_tmp47 ;
   void volatile   *__cil_tmp48 ;
   u32 *__cil_tmp49 ;
   void volatile   *__cil_tmp50 ;
   u32 *__cil_tmp51 ;
   void volatile   *__cil_tmp52 ;
   u32 *__cil_tmp53 ;
   void volatile   *__cil_tmp54 ;
   u32 *__cil_tmp55 ;
   void volatile   *__cil_tmp56 ;
   u32 *__cil_tmp57 ;
   void volatile   *__cil_tmp58 ;
   u32 *__cil_tmp59 ;
   void volatile   *__cil_tmp60 ;
   u32 __cil_tmp61 ;
   int __cil_tmp62 ;
   u32 *__cil_tmp63 ;
   void volatile   *__cil_tmp64 ;
   u32 *__cil_tmp65 ;
   void volatile   *__cil_tmp66 ;
   u32 *__cil_tmp67 ;
   void volatile   *__cil_tmp68 ;
   u32 __cil_tmp69 ;
   unsigned int __cil_tmp70 ;
   u32 __cil_tmp71 ;
   u32 *__cil_tmp72 ;
   void volatile   *__cil_tmp73 ;
   u32 *__cil_tmp74 ;
   void volatile   *__cil_tmp75 ;
   u32 *__cil_tmp76 ;
   void volatile   *__cil_tmp77 ;
   u32 *__cil_tmp78 ;
   void volatile   *__cil_tmp79 ;
   u32 *__cil_tmp80 ;
   void volatile   *__cil_tmp81 ;
   u32 __cil_tmp82 ;
   u32 *__cil_tmp83 ;
   void volatile   *__cil_tmp84 ;
   u32 *__cil_tmp85 ;
   void volatile   *__cil_tmp86 ;
   u32 *__cil_tmp87 ;
   void volatile   *__cil_tmp88 ;
   u32 *__cil_tmp89 ;
   void volatile   *__cil_tmp90 ;
 
   {
   {
 #line 247
   __cil_tmp6 = etdev->regs;
 #line 247
   pRxMac = & __cil_tmp6->rxmac;
 #line 250
   pf_ctrl = 0U;
 #line 253
   __cil_tmp7 = & pRxMac->ctrl;
 #line 253
   __cil_tmp8 = (void volatile   *)__cil_tmp7;
 #line 253
   writel(8U, __cil_tmp8);
 #line 256
   __cil_tmp9 = & pRxMac->crc0;
 #line 256
   __cil_tmp10 = (void volatile   *)__cil_tmp9;
 #line 256
   writel(0U, __cil_tmp10);
 #line 257
   __cil_tmp11 = & pRxMac->crc12;
 #line 257
   __cil_tmp12 = (void volatile   *)__cil_tmp11;
 #line 257
   writel(0U, __cil_tmp12);
 #line 258
   __cil_tmp13 = & pRxMac->crc34;
 #line 258
   __cil_tmp14 = (void volatile   *)__cil_tmp13;
 #line 258
   writel(0U, __cil_tmp14);
 #line 264
   __cil_tmp15 = & pRxMac->mask0_word0;
 #line 264
   __cil_tmp16 = (void volatile   *)__cil_tmp15;
 #line 264
   writel(0U, __cil_tmp16);
 #line 265
   __cil_tmp17 = & pRxMac->mask0_word1;
 #line 265
   __cil_tmp18 = (void volatile   *)__cil_tmp17;
 #line 265
   writel(0U, __cil_tmp18);
 #line 266
   __cil_tmp19 = & pRxMac->mask0_word2;
 #line 266
   __cil_tmp20 = (void volatile   *)__cil_tmp19;
 #line 266
   writel(0U, __cil_tmp20);
 #line 267
   __cil_tmp21 = & pRxMac->mask0_word3;
 #line 267
   __cil_tmp22 = (void volatile   *)__cil_tmp21;
 #line 267
   writel(0U, __cil_tmp22);
 #line 269
   __cil_tmp23 = & pRxMac->mask1_word0;
 #line 269
   __cil_tmp24 = (void volatile   *)__cil_tmp23;
 #line 269
   writel(0U, __cil_tmp24);
 #line 270
   __cil_tmp25 = & pRxMac->mask1_word1;
 #line 270
   __cil_tmp26 = (void volatile   *)__cil_tmp25;
 #line 270
   writel(0U, __cil_tmp26);
 #line 271
   __cil_tmp27 = & pRxMac->mask1_word2;
 #line 271
   __cil_tmp28 = (void volatile   *)__cil_tmp27;
 #line 271
   writel(0U, __cil_tmp28);
 #line 272
   __cil_tmp29 = & pRxMac->mask1_word3;
 #line 272
   __cil_tmp30 = (void volatile   *)__cil_tmp29;
 #line 272
   writel(0U, __cil_tmp30);
 #line 274
   __cil_tmp31 = & pRxMac->mask2_word0;
 #line 274
   __cil_tmp32 = (void volatile   *)__cil_tmp31;
 #line 274
   writel(0U, __cil_tmp32);
 #line 275
   __cil_tmp33 = & pRxMac->mask2_word1;
 #line 275
   __cil_tmp34 = (void volatile   *)__cil_tmp33;
 #line 275
   writel(0U, __cil_tmp34);
 #line 276
   __cil_tmp35 = & pRxMac->mask2_word2;
 #line 276
   __cil_tmp36 = (void volatile   *)__cil_tmp35;
 #line 276
   writel(0U, __cil_tmp36);
 #line 277
   __cil_tmp37 = & pRxMac->mask2_word3;
 #line 277
   __cil_tmp38 = (void volatile   *)__cil_tmp37;
 #line 277
   writel(0U, __cil_tmp38);
 #line 279
   __cil_tmp39 = & pRxMac->mask3_word0;
 #line 279
   __cil_tmp40 = (void volatile   *)__cil_tmp39;
 #line 279
   writel(0U, __cil_tmp40);
 #line 280
   __cil_tmp41 = & pRxMac->mask3_word1;
 #line 280
   __cil_tmp42 = (void volatile   *)__cil_tmp41;
 #line 280
   writel(0U, __cil_tmp42);
 #line 281
   __cil_tmp43 = & pRxMac->mask3_word2;
 #line 281
   __cil_tmp44 = (void volatile   *)__cil_tmp43;
 #line 281
   writel(0U, __cil_tmp44);
 #line 282
   __cil_tmp45 = & pRxMac->mask3_word3;
 #line 282
   __cil_tmp46 = (void volatile   *)__cil_tmp45;
 #line 282
   writel(0U, __cil_tmp46);
 #line 284
   __cil_tmp47 = & pRxMac->mask4_word0;
 #line 284
   __cil_tmp48 = (void volatile   *)__cil_tmp47;
 #line 284
   writel(0U, __cil_tmp48);
 #line 285
   __cil_tmp49 = & pRxMac->mask4_word1;
 #line 285
   __cil_tmp50 = (void volatile   *)__cil_tmp49;
 #line 285
   writel(0U, __cil_tmp50);
 #line 286
   __cil_tmp51 = & pRxMac->mask4_word2;
 #line 286
   __cil_tmp52 = (void volatile   *)__cil_tmp51;
 #line 286
   writel(0U, __cil_tmp52);
 #line 287
   __cil_tmp53 = & pRxMac->mask4_word3;
 #line 287
   __cil_tmp54 = (void volatile   *)__cil_tmp53;
 #line 287
   writel(0U, __cil_tmp54);
 #line 290
   sa_lo.bits.sa3 = etdev->addr[2];
 #line 291
   sa_lo.bits.sa4 = etdev->addr[3];
 #line 292
   sa_lo.bits.sa5 = etdev->addr[4];
 #line 293
   sa_lo.bits.sa6 = etdev->addr[5];
 #line 294
   __cil_tmp55 = & pRxMac->sa_lo.value;
 #line 294
   __cil_tmp56 = (void volatile   *)__cil_tmp55;
 #line 294
   writel(sa_lo.value, __cil_tmp56);
 #line 296
   sa_hi.bits.sa1 = etdev->addr[0];
 #line 297
   sa_hi.bits.sa2 = etdev->addr[1];
 #line 298
   __cil_tmp57 = & pRxMac->sa_hi.value;
 #line 298
   __cil_tmp58 = (void volatile   *)__cil_tmp57;
 #line 298
   writel(sa_hi.value, __cil_tmp58);
 #line 301
   __cil_tmp59 = & pRxMac->pf_ctrl;
 #line 301
   __cil_tmp60 = (void volatile   *)__cil_tmp59;
 #line 301
   writel(0U, __cil_tmp60);
   }
   {
 #line 304
   __cil_tmp61 = etdev->PacketFilter;
 #line 304
   __cil_tmp62 = (int )__cil_tmp61;
 #line 304
   if (__cil_tmp62 & 1) {
     {
 #line 305
     SetupDeviceForUnicast(etdev);
 #line 306
     pf_ctrl = pf_ctrl | 4U;
     }
   } else {
     {
 #line 308
     __cil_tmp63 = & pRxMac->uni_pf_addr1.value;
 #line 308
     __cil_tmp64 = (void volatile   *)__cil_tmp63;
 #line 308
     writel(0U, __cil_tmp64);
 #line 309
     __cil_tmp65 = & pRxMac->uni_pf_addr2.value;
 #line 309
     __cil_tmp66 = (void volatile   *)__cil_tmp65;
 #line 309
     writel(0U, __cil_tmp66);
 #line 310
     __cil_tmp67 = & pRxMac->uni_pf_addr3.value;
 #line 310
     __cil_tmp68 = (void volatile   *)__cil_tmp67;
 #line 310
     writel(0U, __cil_tmp68);
     }
   }
   }
   {
 #line 314
   __cil_tmp69 = etdev->PacketFilter;
 #line 314
   __cil_tmp70 = __cil_tmp69 & 16U;
 #line 314
   if (__cil_tmp70 == 0U) {
     {
 #line 315
     pf_ctrl = pf_ctrl | 2U;
 #line 316
     SetupDeviceForMulticast(etdev);
     }
   } else {
 
   }
   }
 #line 320
   pf_ctrl = pf_ctrl | 4194304U;
 #line 321
   pf_ctrl = pf_ctrl | 8U;
   {
 #line 323
   __cil_tmp71 = etdev->RegistryJumboPacket;
 #line 323
   if (__cil_tmp71 > 8192U) {
     {
 #line 334
     __cil_tmp72 = & pRxMac->mcif_ctrl_max_seg;
 #line 334
     __cil_tmp73 = (void volatile   *)__cil_tmp72;
 #line 334
     writel(65U, __cil_tmp73);
     }
   } else {
     {
 #line 336
     __cil_tmp74 = & pRxMac->mcif_ctrl_max_seg;
 #line 336
     __cil_tmp75 = (void volatile   *)__cil_tmp74;
 #line 336
     writel(0U, __cil_tmp75);
     }
   }
   }
   {
 #line 339
   __cil_tmp76 = & pRxMac->mcif_water_mark;
 #line 339
   __cil_tmp77 = (void volatile   *)__cil_tmp76;
 #line 339
   writel(0U, __cil_tmp77);
 #line 342
   __cil_tmp78 = & pRxMac->mif_ctrl;
 #line 342
   __cil_tmp79 = (void volatile   *)__cil_tmp78;
 #line 342
   writel(0U, __cil_tmp79);
 #line 345
   __cil_tmp80 = & pRxMac->space_avail;
 #line 345
   __cil_tmp81 = (void volatile   *)__cil_tmp80;
 #line 345
   writel(0U, __cil_tmp81);
   }
   {
 #line 360
   __cil_tmp82 = etdev->linkspeed;
 #line 360
   if (__cil_tmp82 == 1U) {
     {
 #line 361
     __cil_tmp83 = & pRxMac->mif_ctrl;
 #line 361
     __cil_tmp84 = (void volatile   *)__cil_tmp83;
 #line 361
     writel(196664U, __cil_tmp84);
     }
   } else {
     {
 #line 363
     __cil_tmp85 = & pRxMac->mif_ctrl;
 #line 363
     __cil_tmp86 = (void volatile   *)__cil_tmp85;
 #line 363
     writel(196656U, __cil_tmp86);
     }
   }
   }
   {
 #line 371
   __cil_tmp87 = & pRxMac->pf_ctrl;
 #line 371
   __cil_tmp88 = (void volatile   *)__cil_tmp87;
 #line 371
   writel(pf_ctrl, __cil_tmp88);
 #line 372
   __cil_tmp89 = & pRxMac->ctrl;
 #line 372
   __cil_tmp90 = (void volatile   *)__cil_tmp89;
 #line 372
   writel(9U, __cil_tmp90);
   }
 #line 373
   return;
 }
 }
 #line 375 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigTxMacRegs(struct et131x_adapter *etdev ) 
 { struct txmac_regs *txmac ;
   ADDRESS_MAP_t *__cil_tmp3 ;
   u8 __cil_tmp4 ;
   unsigned int __cil_tmp5 ;
   u32 *__cil_tmp6 ;
   void volatile   *__cil_tmp7 ;
   u32 *__cil_tmp8 ;
   void volatile   *__cil_tmp9 ;
 
   {
 #line 377
   __cil_tmp3 = etdev->regs;
 #line 377
   txmac = & __cil_tmp3->txmac;
   {
 #line 383
   __cil_tmp4 = etdev->flowcontrol;
 #line 383
   __cil_tmp5 = (unsigned int )__cil_tmp4;
 #line 383
   if (__cil_tmp5 == 3U) {
     {
 #line 384
     __cil_tmp6 = & txmac->cf_param;
 #line 384
     __cil_tmp7 = (void volatile   *)__cil_tmp6;
 #line 384
     writel(0U, __cil_tmp7);
     }
   } else {
     {
 #line 386
     __cil_tmp8 = & txmac->cf_param;
 #line 386
     __cil_tmp9 = (void volatile   *)__cil_tmp8;
 #line 386
     writel(64U, __cil_tmp9);
     }
   }
   }
 #line 387
   return;
 }
 }
 #line 389 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigMacStatRegs(struct et131x_adapter *etdev ) 
 { struct macstat_regs *macstat ;
   ADDRESS_MAP_t *__cil_tmp3 ;
   u32 *__cil_tmp4 ;
   void volatile   *__cil_tmp5 ;
   u32 *__cil_tmp6 ;
   void volatile   *__cil_tmp7 ;
   u32 *__cil_tmp8 ;
   void volatile   *__cil_tmp9 ;
   u32 *__cil_tmp10 ;
   void volatile   *__cil_tmp11 ;
   u32 *__cil_tmp12 ;
   void volatile   *__cil_tmp13 ;
   u32 *__cil_tmp14 ;
   void volatile   *__cil_tmp15 ;
   u32 *__cil_tmp16 ;
   void volatile   *__cil_tmp17 ;
   u32 *__cil_tmp18 ;
   void volatile   *__cil_tmp19 ;
   u32 *__cil_tmp20 ;
   void volatile   *__cil_tmp21 ;
   u32 *__cil_tmp22 ;
   void volatile   *__cil_tmp23 ;
   u32 *__cil_tmp24 ;
   void volatile   *__cil_tmp25 ;
   u32 *__cil_tmp26 ;
   void volatile   *__cil_tmp27 ;
   u32 *__cil_tmp28 ;
   void volatile   *__cil_tmp29 ;
   u32 *__cil_tmp30 ;
   void volatile   *__cil_tmp31 ;
   u32 *__cil_tmp32 ;
   void volatile   *__cil_tmp33 ;
   u32 *__cil_tmp34 ;
   void volatile   *__cil_tmp35 ;
 
   {
   {
 #line 391
   __cil_tmp3 = etdev->regs;
 #line 391
   macstat = & __cil_tmp3->macstat;
 #line 397
   __cil_tmp4 = & macstat->RFcs;
 #line 397
   __cil_tmp5 = (void volatile   *)__cil_tmp4;
 #line 397
   writel(0U, __cil_tmp5);
 #line 398
   __cil_tmp6 = & macstat->RAln;
 #line 398
   __cil_tmp7 = (void volatile   *)__cil_tmp6;
 #line 398
   writel(0U, __cil_tmp7);
 #line 399
   __cil_tmp8 = & macstat->RFlr;
 #line 399
   __cil_tmp9 = (void volatile   *)__cil_tmp8;
 #line 399
   writel(0U, __cil_tmp9);
 #line 400
   __cil_tmp10 = & macstat->RDrp;
 #line 400
   __cil_tmp11 = (void volatile   *)__cil_tmp10;
 #line 400
   writel(0U, __cil_tmp11);
 #line 401
   __cil_tmp12 = & macstat->RCde;
 #line 401
   __cil_tmp13 = (void volatile   *)__cil_tmp12;
 #line 401
   writel(0U, __cil_tmp13);
 #line 402
   __cil_tmp14 = & macstat->ROvr;
 #line 402
   __cil_tmp15 = (void volatile   *)__cil_tmp14;
 #line 402
   writel(0U, __cil_tmp15);
 #line 403
   __cil_tmp16 = & macstat->RFrg;
 #line 403
   __cil_tmp17 = (void volatile   *)__cil_tmp16;
 #line 403
   writel(0U, __cil_tmp17);
 #line 405
   __cil_tmp18 = & macstat->TScl;
 #line 405
   __cil_tmp19 = (void volatile   *)__cil_tmp18;
 #line 405
   writel(0U, __cil_tmp19);
 #line 406
   __cil_tmp20 = & macstat->TDfr;
 #line 406
   __cil_tmp21 = (void volatile   *)__cil_tmp20;
 #line 406
   writel(0U, __cil_tmp21);
 #line 407
   __cil_tmp22 = & macstat->TMcl;
 #line 407
   __cil_tmp23 = (void volatile   *)__cil_tmp22;
 #line 407
   writel(0U, __cil_tmp23);
 #line 408
   __cil_tmp24 = & macstat->TLcl;
 #line 408
   __cil_tmp25 = (void volatile   *)__cil_tmp24;
 #line 408
   writel(0U, __cil_tmp25);
 #line 409
   __cil_tmp26 = & macstat->TNcl;
 #line 409
   __cil_tmp27 = (void volatile   *)__cil_tmp26;
 #line 409
   writel(0U, __cil_tmp27);
 #line 410
   __cil_tmp28 = & macstat->TOvr;
 #line 410
   __cil_tmp29 = (void volatile   *)__cil_tmp28;
 #line 410
   writel(0U, __cil_tmp29);
 #line 411
   __cil_tmp30 = & macstat->TUnd;
 #line 411
   __cil_tmp31 = (void volatile   *)__cil_tmp30;
 #line 411
   writel(0U, __cil_tmp31);
 #line 417
   __cil_tmp32 = & macstat->Carry1M;
 #line 417
   __cil_tmp33 = (void volatile   *)__cil_tmp32;
 #line 417
   writel(4294950450U, __cil_tmp33);
 #line 418
   __cil_tmp34 = & macstat->Carry2M;
 #line 418
   __cil_tmp35 = (void volatile   *)__cil_tmp34;
 #line 418
   writel(4294868619U, __cil_tmp35);
   }
 #line 419
   return;
 }
 }
 #line 421 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void ConfigFlowControl(struct et131x_adapter *etdev ) 
 { char remote_pause ;
   char remote_async_pause ;
   u32 __cil_tmp4 ;
   u16 __cil_tmp5 ;
   u16 __cil_tmp6 ;
   u16 __cil_tmp7 ;
   u8 *__cil_tmp8 ;
   u16 __cil_tmp9 ;
   u16 __cil_tmp10 ;
   u16 __cil_tmp11 ;
   u8 *__cil_tmp12 ;
   signed char __cil_tmp13 ;
   int __cil_tmp14 ;
   signed char __cil_tmp15 ;
   int __cil_tmp16 ;
   signed char __cil_tmp17 ;
   int __cil_tmp18 ;
   signed char __cil_tmp19 ;
   int __cil_tmp20 ;
   u8 __cil_tmp21 ;
   unsigned int __cil_tmp22 ;
   signed char __cil_tmp23 ;
   int __cil_tmp24 ;
   signed char __cil_tmp25 ;
   int __cil_tmp26 ;
   u8 __cil_tmp27 ;
   unsigned int __cil_tmp28 ;
 
   {
   {
 #line 423
   __cil_tmp4 = etdev->duplex_mode;
 #line 423
   if (__cil_tmp4 == 0U) {
 #line 424
     etdev->flowcontrol = (u8 )3U;
   } else {
     {
 #line 428
     __cil_tmp5 = (u16 )2;
 #line 428
     __cil_tmp6 = (u16 )5;
 #line 428
     __cil_tmp7 = (u16 )10;
 #line 428
     __cil_tmp8 = (u8 *)(& remote_pause);
 #line 428
     ET1310_PhyAccessMiBit(etdev, __cil_tmp5, __cil_tmp6, __cil_tmp7, __cil_tmp8);
 #line 430
     __cil_tmp9 = (u16 )2;
 #line 430
     __cil_tmp10 = (u16 )5;
 #line 430
     __cil_tmp11 = (u16 )11;
 #line 430
     __cil_tmp12 = (u8 *)(& remote_async_pause);
 #line 430
     ET1310_PhyAccessMiBit(etdev, __cil_tmp9, __cil_tmp10, __cil_tmp11, __cil_tmp12);
     }
     {
 #line 434
     __cil_tmp13 = (signed char )remote_pause;
 #line 434
     __cil_tmp14 = (int )__cil_tmp13;
 #line 434
     if (__cil_tmp14 == 1) {
       {
 #line 434
       __cil_tmp15 = (signed char )remote_async_pause;
 #line 434
       __cil_tmp16 = (int )__cil_tmp15;
 #line 434
       if (__cil_tmp16 == 1) {
 #line 436
         etdev->flowcontrol = etdev->wanted_flow;
       } else {
 #line 434
         goto _L___1;
       }
       }
     } else {
       _L___1: 
       {
 #line 437
       __cil_tmp17 = (signed char )remote_pause;
 #line 437
       __cil_tmp18 = (int )__cil_tmp17;
 #line 437
       if (__cil_tmp18 == 1) {
         {
 #line 437
         __cil_tmp19 = (signed char )remote_async_pause;
 #line 437
         __cil_tmp20 = (int )__cil_tmp19;
 #line 437
         if (__cil_tmp20 == 0) {
           {
 #line 439
           __cil_tmp21 = etdev->wanted_flow;
 #line 439
           __cil_tmp22 = (unsigned int )__cil_tmp21;
 #line 439
           if (__cil_tmp22 == 0U) {
 #line 440
             etdev->flowcontrol = (u8 )0U;
           } else {
 #line 442
             etdev->flowcontrol = (u8 )3U;
           }
           }
         } else {
 #line 437
           goto _L___0;
         }
         }
       } else {
         _L___0: 
         {
 #line 443
         __cil_tmp23 = (signed char )remote_pause;
 #line 443
         __cil_tmp24 = (int )__cil_tmp23;
 #line 443
         if (__cil_tmp24 == 0) {
           {
 #line 443
           __cil_tmp25 = (signed char )remote_async_pause;
 #line 443
           __cil_tmp26 = (int )__cil_tmp25;
 #line 443
           if (__cil_tmp26 == 0) {
 #line 445
             etdev->flowcontrol = (u8 )3U;
           } else {
 #line 443
             goto _L;
           }
           }
         } else {
           _L: 
           {
 #line 448
           __cil_tmp27 = etdev->wanted_flow;
 #line 448
           __cil_tmp28 = (unsigned int )__cil_tmp27;
 #line 448
           if (__cil_tmp28 == 0U) {
 #line 449
             etdev->flowcontrol = (u8 )2U;
           } else {
 #line 451
             etdev->flowcontrol = (u8 )3U;
           }
           }
         }
         }
       }
       }
     }
     }
   }
   }
 #line 453
   return;
 }
 }
 #line 460 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void UpdateMacStatHostCounters(struct et131x_adapter *etdev ) 
 { struct _ce_stats_t *stats ;
   struct macstat_regs *macstat ;
   unsigned int tmp ;
   unsigned int tmp___0 ;
   unsigned int tmp___1 ;
   unsigned int tmp___2 ;
   unsigned int tmp___3 ;
   unsigned int tmp___4 ;
   unsigned int tmp___5 ;
   unsigned int tmp___6 ;
   unsigned int tmp___7 ;
   unsigned int tmp___8 ;
   unsigned int tmp___9 ;
   unsigned int tmp___10 ;
   unsigned int tmp___11 ;
   unsigned int tmp___12 ;
   ADDRESS_MAP_t *__cil_tmp18 ;
   u32 *__cil_tmp19 ;
   void const volatile   *__cil_tmp20 ;
   u32 __cil_tmp21 ;
   u32 *__cil_tmp22 ;
   void const volatile   *__cil_tmp23 ;
   u32 __cil_tmp24 ;
   u32 *__cil_tmp25 ;
   void const volatile   *__cil_tmp26 ;
   u32 __cil_tmp27 ;
   u32 *__cil_tmp28 ;
   void const volatile   *__cil_tmp29 ;
   u32 __cil_tmp30 ;
   u32 *__cil_tmp31 ;
   void const volatile   *__cil_tmp32 ;
   u32 __cil_tmp33 ;
   u32 *__cil_tmp34 ;
   void const volatile   *__cil_tmp35 ;
   u32 __cil_tmp36 ;
   u32 *__cil_tmp37 ;
   void const volatile   *__cil_tmp38 ;
   u32 __cil_tmp39 ;
   u32 *__cil_tmp40 ;
   void const volatile   *__cil_tmp41 ;
   u32 __cil_tmp42 ;
   u32 *__cil_tmp43 ;
   void const volatile   *__cil_tmp44 ;
   u32 __cil_tmp45 ;
   u32 *__cil_tmp46 ;
   void const volatile   *__cil_tmp47 ;
   u32 __cil_tmp48 ;
   u32 *__cil_tmp49 ;
   void const volatile   *__cil_tmp50 ;
   u32 __cil_tmp51 ;
   u32 *__cil_tmp52 ;
   void const volatile   *__cil_tmp53 ;
   u32 __cil_tmp54 ;
   u32 *__cil_tmp55 ;
   void const volatile   *__cil_tmp56 ;
   u32 __cil_tmp57 ;
   u32 *__cil_tmp58 ;
   void const volatile   *__cil_tmp59 ;
   u32 __cil_tmp60 ;
 
   {
   {
 #line 462
   stats = & etdev->Stats;
 #line 463
   __cil_tmp18 = etdev->regs;
 #line 463
   macstat = & __cil_tmp18->macstat;
 #line 466
   __cil_tmp19 = & macstat->TNcl;
 #line 466
   __cil_tmp20 = (void const volatile   *)__cil_tmp19;
 #line 466
   tmp = readl(__cil_tmp20);
 #line 466
   __cil_tmp21 = stats->collisions;
 #line 466
   stats->collisions = __cil_tmp21 + tmp;
 #line 467
   __cil_tmp22 = & macstat->TScl;
 #line 467
   __cil_tmp23 = (void const volatile   *)__cil_tmp22;
 #line 467
   tmp___0 = readl(__cil_tmp23);
 #line 467
   __cil_tmp24 = stats->first_collision;
 #line 467
   stats->first_collision = __cil_tmp24 + tmp___0;
 #line 468
   __cil_tmp25 = & macstat->TDfr;
 #line 468
   __cil_tmp26 = (void const volatile   *)__cil_tmp25;
 #line 468
   tmp___1 = readl(__cil_tmp26);
 #line 468
   __cil_tmp27 = stats->tx_deferred;
 #line 468
   stats->tx_deferred = __cil_tmp27 + tmp___1;
 #line 469
   __cil_tmp28 = & macstat->TMcl;
 #line 469
   __cil_tmp29 = (void const volatile   *)__cil_tmp28;
 #line 469
   tmp___2 = readl(__cil_tmp29);
 #line 469
   __cil_tmp30 = stats->excessive_collisions;
 #line 469
   stats->excessive_collisions = __cil_tmp30 + tmp___2;
 #line 470
   __cil_tmp31 = & macstat->TLcl;
 #line 470
   __cil_tmp32 = (void const volatile   *)__cil_tmp31;
 #line 470
   tmp___3 = readl(__cil_tmp32);
 #line 470
   __cil_tmp33 = stats->late_collisions;
 #line 470
   stats->late_collisions = __cil_tmp33 + tmp___3;
 #line 471
   __cil_tmp34 = & macstat->TUnd;
 #line 471
   __cil_tmp35 = (void const volatile   *)__cil_tmp34;
 #line 471
   tmp___4 = readl(__cil_tmp35);
 #line 471
   __cil_tmp36 = stats->tx_uflo;
 #line 471
   stats->tx_uflo = __cil_tmp36 + tmp___4;
 #line 472
   __cil_tmp37 = & macstat->TOvr;
 #line 472
   __cil_tmp38 = (void const volatile   *)__cil_tmp37;
 #line 472
   tmp___5 = readl(__cil_tmp38);
 #line 472
   __cil_tmp39 = stats->max_pkt_error;
 #line 472
   stats->max_pkt_error = __cil_tmp39 + tmp___5;
 #line 474
   __cil_tmp40 = & macstat->RAln;
 #line 474
   __cil_tmp41 = (void const volatile   *)__cil_tmp40;
 #line 474
   tmp___6 = readl(__cil_tmp41);
 #line 474
   __cil_tmp42 = stats->alignment_err;
 #line 474
   stats->alignment_err = __cil_tmp42 + tmp___6;
 #line 475
   __cil_tmp43 = & macstat->RCde;
 #line 475
   __cil_tmp44 = (void const volatile   *)__cil_tmp43;
 #line 475
   tmp___7 = readl(__cil_tmp44);
 #line 475
   __cil_tmp45 = stats->crc_err;
 #line 475
   stats->crc_err = __cil_tmp45 + tmp___7;
 #line 476
   __cil_tmp46 = & macstat->RDrp;
 #line 476
   __cil_tmp47 = (void const volatile   *)__cil_tmp46;
 #line 476
   tmp___8 = readl(__cil_tmp47);
 #line 476
   __cil_tmp48 = stats->norcvbuf;
 #line 476
   stats->norcvbuf = __cil_tmp48 + tmp___8;
 #line 477
   __cil_tmp49 = & macstat->ROvr;
 #line 477
   __cil_tmp50 = (void const volatile   *)__cil_tmp49;
 #line 477
   tmp___9 = readl(__cil_tmp50);
 #line 477
   __cil_tmp51 = stats->rx_ov_flow;
 #line 477
   stats->rx_ov_flow = __cil_tmp51 + tmp___9;
 #line 478
   __cil_tmp52 = & macstat->RFcs;
 #line 478
   __cil_tmp53 = (void const volatile   *)__cil_tmp52;
 #line 478
   tmp___10 = readl(__cil_tmp53);
 #line 478
   __cil_tmp54 = stats->code_violations;
 #line 478
   stats->code_violations = __cil_tmp54 + tmp___10;
 #line 479
   __cil_tmp55 = & macstat->RFlr;
 #line 479
   __cil_tmp56 = (void const volatile   *)__cil_tmp55;
 #line 479
   tmp___11 = readl(__cil_tmp56);
 #line 479
   __cil_tmp57 = stats->length_err;
 #line 479
   stats->length_err = __cil_tmp57 + tmp___11;
 #line 481
   __cil_tmp58 = & macstat->RFrg;
 #line 481
   __cil_tmp59 = (void const volatile   *)__cil_tmp58;
 #line 481
   tmp___12 = readl(__cil_tmp59);
 #line 481
   __cil_tmp60 = stats->other_errors;
 #line 481
   stats->other_errors = __cil_tmp60 + tmp___12;
   }
 #line 482
   return;
 }
 }
 #line 492 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void HandleMacStatInterrupt(struct et131x_adapter *etdev ) 
 { u32 Carry1 ;
   u32 Carry2 ;
   ADDRESS_MAP_t *__cil_tmp4 ;
   u32 *__cil_tmp5 ;
   void const volatile   *__cil_tmp6 ;
   ADDRESS_MAP_t *__cil_tmp7 ;
   u32 *__cil_tmp8 ;
   void const volatile   *__cil_tmp9 ;
   ADDRESS_MAP_t *__cil_tmp10 ;
   u32 *__cil_tmp11 ;
   void volatile   *__cil_tmp12 ;
   ADDRESS_MAP_t *__cil_tmp13 ;
   u32 *__cil_tmp14 ;
   void volatile   *__cil_tmp15 ;
   unsigned int __cil_tmp16 ;
   u32 __cil_tmp17 ;
   unsigned int __cil_tmp18 ;
   u32 __cil_tmp19 ;
   unsigned int __cil_tmp20 ;
   u32 __cil_tmp21 ;
   unsigned int __cil_tmp22 ;
   u32 __cil_tmp23 ;
   unsigned int __cil_tmp24 ;
   u32 __cil_tmp25 ;
   unsigned int __cil_tmp26 ;
   u32 __cil_tmp27 ;
   int __cil_tmp28 ;
   u32 __cil_tmp29 ;
   unsigned int __cil_tmp30 ;
   u32 __cil_tmp31 ;
   unsigned int __cil_tmp32 ;
   u32 __cil_tmp33 ;
   unsigned int __cil_tmp34 ;
   u32 __cil_tmp35 ;
   unsigned int __cil_tmp36 ;
   u32 __cil_tmp37 ;
   unsigned int __cil_tmp38 ;
   u32 __cil_tmp39 ;
   unsigned int __cil_tmp40 ;
   u32 __cil_tmp41 ;
   unsigned int __cil_tmp42 ;
   u32 __cil_tmp43 ;
 
   {
   {
 #line 500
   __cil_tmp4 = etdev->regs;
 #line 500
   __cil_tmp5 = & __cil_tmp4->macstat.Carry1;
 #line 500
   __cil_tmp6 = (void const volatile   *)__cil_tmp5;
 #line 500
   Carry1 = readl(__cil_tmp6);
 #line 501
   __cil_tmp7 = etdev->regs;
 #line 501
   __cil_tmp8 = & __cil_tmp7->macstat.Carry2;
 #line 501
   __cil_tmp9 = (void const volatile   *)__cil_tmp8;
 #line 501
   Carry2 = readl(__cil_tmp9);
 #line 503
   __cil_tmp10 = etdev->regs;
 #line 503
   __cil_tmp11 = & __cil_tmp10->macstat.Carry1;
 #line 503
   __cil_tmp12 = (void volatile   *)__cil_tmp11;
 #line 503
   writel(Carry1, __cil_tmp12);
 #line 504
   __cil_tmp13 = etdev->regs;
 #line 504
   __cil_tmp14 = & __cil_tmp13->macstat.Carry2;
 #line 504
   __cil_tmp15 = (void volatile   *)__cil_tmp14;
 #line 504
   writel(Carry2, __cil_tmp15);
   }
   {
 #line 512
   __cil_tmp16 = Carry1 & 16384U;
 #line 512
   if (__cil_tmp16 != 0U) {
 #line 513
     __cil_tmp17 = etdev->Stats.code_violations;
 #line 513
     etdev->Stats.code_violations = __cil_tmp17 + 65536U;
   } else {
 
   }
   }
   {
 #line 514
   __cil_tmp18 = Carry1 & 256U;
 #line 514
   if (__cil_tmp18 != 0U) {
 #line 515
     __cil_tmp19 = etdev->Stats.alignment_err;
 #line 515
     etdev->Stats.alignment_err = __cil_tmp19 + 4096U;
   } else {
 
   }
   }
   {
 #line 516
   __cil_tmp20 = Carry1 & 128U;
 #line 516
   if (__cil_tmp20 != 0U) {
 #line 517
     __cil_tmp21 = etdev->Stats.length_err;
 #line 517
     etdev->Stats.length_err = __cil_tmp21 + 65536U;
   } else {
 
   }
   }
   {
 #line 518
   __cil_tmp22 = Carry1 & 4U;
 #line 518
   if (__cil_tmp22 != 0U) {
 #line 519
     __cil_tmp23 = etdev->Stats.other_errors;
 #line 519
     etdev->Stats.other_errors = __cil_tmp23 + 65536U;
   } else {
 
   }
   }
   {
 #line 520
   __cil_tmp24 = Carry1 & 64U;
 #line 520
   if (__cil_tmp24 != 0U) {
 #line 521
     __cil_tmp25 = etdev->Stats.crc_err;
 #line 521
     etdev->Stats.crc_err = __cil_tmp25 + 65536U;
   } else {
 
   }
   }
   {
 #line 522
   __cil_tmp26 = Carry1 & 8U;
 #line 522
   if (__cil_tmp26 != 0U) {
 #line 523
     __cil_tmp27 = etdev->Stats.rx_ov_flow;
 #line 523
     etdev->Stats.rx_ov_flow = __cil_tmp27 + 65536U;
   } else {
 
   }
   }
   {
 #line 524
   __cil_tmp28 = (int )Carry1;
 #line 524
   if (__cil_tmp28 & 1) {
 #line 525
     __cil_tmp29 = etdev->Stats.norcvbuf;
 #line 525
     etdev->Stats.norcvbuf = __cil_tmp29 + 65536U;
   } else {
 
   }
   }
   {
 #line 526
   __cil_tmp30 = Carry2 & 65536U;
 #line 526
   if (__cil_tmp30 != 0U) {
 #line 527
     __cil_tmp31 = etdev->Stats.max_pkt_error;
 #line 527
     etdev->Stats.max_pkt_error = __cil_tmp31 + 4096U;
   } else {
 
   }
   }
   {
 #line 528
   __cil_tmp32 = Carry2 & 32768U;
 #line 528
   if (__cil_tmp32 != 0U) {
 #line 529
     __cil_tmp33 = etdev->Stats.tx_uflo;
 #line 529
     etdev->Stats.tx_uflo = __cil_tmp33 + 4096U;
   } else {
 
   }
   }
   {
 #line 530
   __cil_tmp34 = Carry2 & 64U;
 #line 530
   if (__cil_tmp34 != 0U) {
 #line 531
     __cil_tmp35 = etdev->Stats.first_collision;
 #line 531
     etdev->Stats.first_collision = __cil_tmp35 + 4096U;
   } else {
 
   }
   }
   {
 #line 532
   __cil_tmp36 = Carry2 & 256U;
 #line 532
   if (__cil_tmp36 != 0U) {
 #line 533
     __cil_tmp37 = etdev->Stats.tx_deferred;
 #line 533
     etdev->Stats.tx_deferred = __cil_tmp37 + 4096U;
   } else {
 
   }
   }
   {
 #line 534
   __cil_tmp38 = Carry2 & 32U;
 #line 534
   if (__cil_tmp38 != 0U) {
 #line 535
     __cil_tmp39 = etdev->Stats.excessive_collisions;
 #line 535
     etdev->Stats.excessive_collisions = __cil_tmp39 + 4096U;
   } else {
 
   }
   }
   {
 #line 536
   __cil_tmp40 = Carry2 & 16U;
 #line 536
   if (__cil_tmp40 != 0U) {
 #line 537
     __cil_tmp41 = etdev->Stats.late_collisions;
 #line 537
     etdev->Stats.late_collisions = __cil_tmp41 + 4096U;
   } else {
 
   }
   }
   {
 #line 538
   __cil_tmp42 = Carry2 & 4U;
 #line 538
   if (__cil_tmp42 != 0U) {
 #line 539
     __cil_tmp43 = etdev->Stats.collisions;
 #line 539
     etdev->Stats.collisions = __cil_tmp43 + 4096U;
   } else {
 
   }
   }
 #line 540
   return;
 }
 }
 #line 542 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void SetupDeviceForMulticast(struct et131x_adapter *etdev ) 
 { struct _RXMAC_t *rxmac ;
   uint32_t nIndex ;
   uint32_t result ;
   uint32_t hash1 ;
   uint32_t hash2 ;
   uint32_t hash3 ;
   uint32_t hash4 ;
   u32 pm_csr ;
   u32 tmp ;
   ADDRESS_MAP_t *__cil_tmp11 ;
   u32 __cil_tmp12 ;
   unsigned int __cil_tmp13 ;
   unsigned long __cil_tmp14 ;
   u8 (*__cil_tmp15)[128U][6U] ;
   unsigned char const   *__cil_tmp16 ;
   unsigned char const   *__cil_tmp17 ;
   unsigned int __cil_tmp18 ;
   int __cil_tmp19 ;
   int __cil_tmp20 ;
   uint32_t __cil_tmp21 ;
   int __cil_tmp22 ;
   int __cil_tmp23 ;
   uint32_t __cil_tmp24 ;
   int __cil_tmp25 ;
   int __cil_tmp26 ;
   uint32_t __cil_tmp27 ;
   int __cil_tmp28 ;
   int __cil_tmp29 ;
   uint32_t __cil_tmp30 ;
   int __cil_tmp31 ;
   int __cil_tmp32 ;
   uint32_t __cil_tmp33 ;
   u32 __cil_tmp34 ;
   ADDRESS_MAP_t *__cil_tmp35 ;
   u32 *__cil_tmp36 ;
   void const volatile   *__cil_tmp37 ;
   unsigned int __cil_tmp38 ;
   u32 *__cil_tmp39 ;
   void volatile   *__cil_tmp40 ;
   u32 *__cil_tmp41 ;
   void volatile   *__cil_tmp42 ;
   u32 *__cil_tmp43 ;
   void volatile   *__cil_tmp44 ;
   u32 *__cil_tmp45 ;
   void volatile   *__cil_tmp46 ;
 
   {
 #line 544
   __cil_tmp11 = etdev->regs;
 #line 544
   rxmac = & __cil_tmp11->rxmac;
 #line 547
   hash1 = 0U;
 #line 548
   hash2 = 0U;
 #line 549
   hash3 = 0U;
 #line 550
   hash4 = 0U;
   {
 #line 558
   __cil_tmp12 = etdev->PacketFilter;
 #line 558
   __cil_tmp13 = __cil_tmp12 & 2U;
 #line 558
   if (__cil_tmp13 != 0U) {
 #line 560
     nIndex = 0U;
 #line 560
     goto ldv_35733;
     ldv_35732: 
     {
 #line 561
     __cil_tmp14 = (unsigned long )nIndex;
 #line 561
     __cil_tmp15 = & etdev->MCList;
 #line 561
     __cil_tmp16 = (unsigned char const   *)__cil_tmp15;
 #line 561
     __cil_tmp17 = __cil_tmp16 + __cil_tmp14;
 #line 561
     tmp = crc32_le(4294967295U, __cil_tmp17, 6UL);
 #line 561
     result = bitrev32(tmp);
 #line 563
     __cil_tmp18 = result & 1065353216U;
 #line 563
     result = __cil_tmp18 >> 23;
     }
 #line 565
     if (result <= 31U) {
 #line 566
       __cil_tmp19 = (int )result;
 #line 566
       __cil_tmp20 = 1 << __cil_tmp19;
 #line 566
       __cil_tmp21 = (uint32_t )__cil_tmp20;
 #line 566
       hash1 = __cil_tmp21 | hash1;
     } else
 #line 567
     if (result > 31U) {
 #line 567
       if (result <= 63U) {
 #line 568
         result = result - 32U;
 #line 569
         __cil_tmp22 = (int )result;
 #line 569
         __cil_tmp23 = 1 << __cil_tmp22;
 #line 569
         __cil_tmp24 = (uint32_t )__cil_tmp23;
 #line 569
         hash2 = __cil_tmp24 | hash2;
       } else {
 #line 567
         goto _L;
       }
     } else
     _L: 
 #line 570
     if (result > 63U) {
 #line 570
       if (result <= 95U) {
 #line 571
         result = result - 64U;
 #line 572
         __cil_tmp25 = (int )result;
 #line 572
         __cil_tmp26 = 1 << __cil_tmp25;
 #line 572
         __cil_tmp27 = (uint32_t )__cil_tmp26;
 #line 572
         hash3 = __cil_tmp27 | hash3;
       } else {
 #line 574
         result = result - 96U;
 #line 575
         __cil_tmp28 = (int )result;
 #line 575
         __cil_tmp29 = 1 << __cil_tmp28;
 #line 575
         __cil_tmp30 = (uint32_t )__cil_tmp29;
 #line 575
         hash4 = __cil_tmp30 | hash4;
       }
     } else {
 #line 574
       result = result - 96U;
 #line 575
       __cil_tmp31 = (int )result;
 #line 575
       __cil_tmp32 = 1 << __cil_tmp31;
 #line 575
       __cil_tmp33 = (uint32_t )__cil_tmp32;
 #line 575
       hash4 = __cil_tmp33 | hash4;
     }
 #line 560
     nIndex = nIndex + 1U;
     ldv_35733: ;
     {
 #line 560
     __cil_tmp34 = etdev->MCAddressCount;
 #line 560
     if (__cil_tmp34 > nIndex) {
 #line 561
       goto ldv_35732;
     } else {
 #line 563
       goto ldv_35734;
     }
     }
     ldv_35734: ;
   } else {
 
   }
   }
   {
 #line 581
   __cil_tmp35 = etdev->regs;
 #line 581
   __cil_tmp36 = & __cil_tmp35->global.pm_csr;
 #line 581
   __cil_tmp37 = (void const volatile   *)__cil_tmp36;
 #line 581
   pm_csr = readl(__cil_tmp37);
   }
   {
 #line 582
   __cil_tmp38 = pm_csr & 64U;
 #line 582
   if (__cil_tmp38 == 0U) {
     {
 #line 583
     __cil_tmp39 = & rxmac->multi_hash1;
 #line 583
     __cil_tmp40 = (void volatile   *)__cil_tmp39;
 #line 583
     writel(hash1, __cil_tmp40);
 #line 584
     __cil_tmp41 = & rxmac->multi_hash2;
 #line 584
     __cil_tmp42 = (void volatile   *)__cil_tmp41;
 #line 584
     writel(hash2, __cil_tmp42);
 #line 585
     __cil_tmp43 = & rxmac->multi_hash3;
 #line 585
     __cil_tmp44 = (void volatile   *)__cil_tmp43;
 #line 585
     writel(hash3, __cil_tmp44);
 #line 586
     __cil_tmp45 = & rxmac->multi_hash4;
 #line 586
     __cil_tmp46 = (void volatile   *)__cil_tmp45;
 #line 586
     writel(hash4, __cil_tmp46);
     }
   } else {
 
   }
   }
 #line 588
   return;
 }
 }
 #line 590 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_mac.c.p"
 void SetupDeviceForUnicast(struct et131x_adapter *etdev ) 
 { struct _RXMAC_t *rxmac ;
   RXMAC_UNI_PF_ADDR1_t uni_pf1 ;
   RXMAC_UNI_PF_ADDR2_t uni_pf2 ;
   RXMAC_UNI_PF_ADDR3_t uni_pf3 ;
   u32 pm_csr ;
   ADDRESS_MAP_t *__cil_tmp7 ;
   ADDRESS_MAP_t *__cil_tmp8 ;
   u32 *__cil_tmp9 ;
   void const volatile   *__cil_tmp10 ;
   unsigned int __cil_tmp11 ;
   u32 *__cil_tmp12 ;
   void volatile   *__cil_tmp13 ;
   u32 *__cil_tmp14 ;
   void volatile   *__cil_tmp15 ;
   u32 *__cil_tmp16 ;
   void volatile   *__cil_tmp17 ;
 
   {
   {
 #line 592
   __cil_tmp7 = etdev->regs;
 #line 592
   rxmac = & __cil_tmp7->rxmac;
 #line 607
   uni_pf3.bits.addr1_1 = etdev->addr[0];
 #line 608
   uni_pf3.bits.addr1_2 = etdev->addr[1];
 #line 609
   uni_pf3.bits.addr2_1 = etdev->addr[0];
 #line 610
   uni_pf3.bits.addr2_2 = etdev->addr[1];
 #line 612
   uni_pf2.bits.addr2_3 = etdev->addr[2];
 #line 613
   uni_pf2.bits.addr2_4 = etdev->addr[3];
 #line 614
   uni_pf2.bits.addr2_5 = etdev->addr[4];
 #line 615
   uni_pf2.bits.addr2_6 = etdev->addr[5];
 #line 617
   uni_pf1.bits.addr1_3 = etdev->addr[2];
 #line 618
   uni_pf1.bits.addr1_4 = etdev->addr[3];
 #line 619
   uni_pf1.bits.addr1_5 = etdev->addr[4];
 #line 620
   uni_pf1.bits.addr1_6 = etdev->addr[5];
 #line 622
   __cil_tmp8 = etdev->regs;
 #line 622
   __cil_tmp9 = & __cil_tmp8->global.pm_csr;
 #line 622
   __cil_tmp10 = (void const volatile   *)__cil_tmp9;
 #line 622
   pm_csr = readl(__cil_tmp10);
   }
   {
 #line 623
   __cil_tmp11 = pm_csr & 64U;
 #line 623
   if (__cil_tmp11 == 0U) {
     {
 #line 624
     __cil_tmp12 = & rxmac->uni_pf_addr1.value;
 #line 624
     __cil_tmp13 = (void volatile   *)__cil_tmp12;
 #line 624
     writel(uni_pf1.value, __cil_tmp13);
 #line 625
     __cil_tmp14 = & rxmac->uni_pf_addr2.value;
 #line 625
     __cil_tmp15 = (void volatile   *)__cil_tmp14;
 #line 625
     writel(uni_pf2.value, __cil_tmp15);
 #line 626
     __cil_tmp16 = & rxmac->uni_pf_addr3.value;
 #line 626
     __cil_tmp17 = (void volatile   *)__cil_tmp16;
 #line 626
     writel(uni_pf3.value, __cil_tmp17);
     }
   } else {
 
   }
   }
 #line 628
   return;
 }
 }
 #line 32 "include/linux/spinlock_api_smp.h"
 extern unsigned long _raw_spin_lock_irqsave(raw_spinlock_t * ) ;
 #line 43
 extern void _raw_spin_unlock_irqrestore(raw_spinlock_t * , unsigned long  ) ;
 #line 272 "include/linux/spinlock.h"
 __inline static raw_spinlock_t *spinlock_check(spinlock_t *lock ) 
 { 
 
   {
 #line 274
   return (& lock->ldv_6060.rlock);
 }
 }
 #line 338 "include/linux/spinlock.h"
 __inline static void spin_unlock_irqrestore(spinlock_t *lock , unsigned long flags ) 
 { struct raw_spinlock *__cil_tmp3 ;
 
   {
   {
 #line 340
   __cil_tmp3 = & lock->ldv_6060.rlock;
 #line 340
   _raw_spin_unlock_irqrestore(__cil_tmp3, flags);
   }
 #line 341
   return;
 }
 }
 #line 2167 "include/linux/netdevice.h"
 extern void netif_carrier_on(struct net_device * ) ;
 #line 2169
 extern void netif_carrier_off(struct net_device * ) ;
 #line 63 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
 int et131x_adapter_setup(struct et131x_adapter *etdev ) ;
 #line 67
 void et131x_soft_reset(struct et131x_adapter *adapter ) ;
 #line 89
 void EnablePhyComa(struct et131x_adapter *etdev ) ;
 #line 93
 void ET1310_PhyInit(struct et131x_adapter *etdev ) ;
 #line 94
 void ET1310_PhyReset(struct et131x_adapter *etdev ) ;
 #line 95
 void ET1310_PhyPowerDown(struct et131x_adapter *etdev , bool down___0 ) ;
 #line 96
 void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *etdev , u16 duplex ) ;
 #line 102
 int et131x_xcvr_find(struct et131x_adapter *etdev ) ;
 #line 103
 void et131x_setphy_normal(struct et131x_adapter *etdev ) ;
 #line 108
 int PhyMiRead(struct et131x_adapter *etdev , u8 xcvrAddr , u8 xcvrReg , u16 *value ) ;
 #line 113
 int32_t MiWrite(struct et131x_adapter *etdev , u8 xcvrReg , u16 value ) ;
 #line 115
 void et131x_Mii_check(struct et131x_adapter *etdev , MI_BMSR_t bmsr , MI_BMSR_t bmsr_ints ) ;
 #line 135
 void SetRxDmaTimer(struct et131x_adapter *etdev ) ;
 #line 139
 void et131x_reset_recv(struct et131x_adapter *etdev ) ;
 #line 147
 void et131x_init_send(struct et131x_adapter *adapter ) ;
 #line 151
 void et131x_free_busy_send_packets(struct et131x_adapter *etdev ) ;
 #line 104 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void et131x_xcvr_init(struct et131x_adapter *etdev ) ;
 #line 115 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 int PhyMiRead(struct et131x_adapter *etdev , u8 xcvrAddr , u8 xcvrReg , u16 *value ) 
 { struct _MAC_t *mac ;
   int status ;
   u32 delay ;
   u32 miiAddr ;
   u32 miiCmd ;
   u32 miiIndicator ;
   unsigned int tmp ;
   ADDRESS_MAP_t *__cil_tmp12 ;
   u32 *__cil_tmp13 ;
   void const volatile   *__cil_tmp14 ;
   u32 *__cil_tmp15 ;
   void const volatile   *__cil_tmp16 ;
   u32 *__cil_tmp17 ;
   void volatile   *__cil_tmp18 ;
   int __cil_tmp19 ;
   int __cil_tmp20 ;
   int __cil_tmp21 ;
   int __cil_tmp22 ;
   unsigned int __cil_tmp23 ;
   u32 *__cil_tmp24 ;
   void volatile   *__cil_tmp25 ;
   u32 *__cil_tmp26 ;
   void volatile   *__cil_tmp27 ;
   u32 *__cil_tmp28 ;
   void const volatile   *__cil_tmp29 ;
   unsigned int __cil_tmp30 ;
   struct pci_dev *__cil_tmp31 ;
   struct device *__cil_tmp32 ;
   struct device  const  *__cil_tmp33 ;
   int __cil_tmp34 ;
   struct pci_dev *__cil_tmp35 ;
   struct device *__cil_tmp36 ;
   struct device  const  *__cil_tmp37 ;
   u32 *__cil_tmp38 ;
   void const volatile   *__cil_tmp39 ;
   u32 *__cil_tmp40 ;
   void volatile   *__cil_tmp41 ;
   u32 *__cil_tmp42 ;
   void volatile   *__cil_tmp43 ;
   u32 *__cil_tmp44 ;
   void volatile   *__cil_tmp45 ;
 
   {
   {
 #line 118
   __cil_tmp12 = etdev->regs;
 #line 118
   mac = & __cil_tmp12->mac;
 #line 119
   status = 0;
 #line 128
   __cil_tmp13 = & mac->mii_mgmt_addr;
 #line 128
   __cil_tmp14 = (void const volatile   *)__cil_tmp13;
 #line 128
   miiAddr = readl(__cil_tmp14);
 #line 129
   __cil_tmp15 = & mac->mii_mgmt_cmd;
 #line 129
   __cil_tmp16 = (void const volatile   *)__cil_tmp15;
 #line 129
   miiCmd = readl(__cil_tmp16);
 #line 132
   __cil_tmp17 = & mac->mii_mgmt_cmd;
 #line 132
   __cil_tmp18 = (void volatile   *)__cil_tmp17;
 #line 132
   writel(0U, __cil_tmp18);
 #line 135
   __cil_tmp19 = (int )xcvrReg;
 #line 135
   __cil_tmp20 = (int )xcvrAddr;
 #line 135
   __cil_tmp21 = __cil_tmp20 << 8;
 #line 135
   __cil_tmp22 = __cil_tmp21 | __cil_tmp19;
 #line 135
   __cil_tmp23 = (unsigned int )__cil_tmp22;
 #line 135
   __cil_tmp24 = & mac->mii_mgmt_addr;
 #line 135
   __cil_tmp25 = (void volatile   *)__cil_tmp24;
 #line 135
   writel(__cil_tmp23, __cil_tmp25);
 #line 138
   delay = 0U;
 #line 140
   __cil_tmp26 = & mac->mii_mgmt_cmd;
 #line 140
   __cil_tmp27 = (void volatile   *)__cil_tmp26;
 #line 140
   writel(1U, __cil_tmp27);
   }
   ldv_35671: 
   {
 #line 143
   __const_udelay(214750UL);
 #line 144
   delay = delay + 1U;
 #line 145
   __cil_tmp28 = & mac->mii_mgmt_indicator;
 #line 145
   __cil_tmp29 = (void const volatile   *)__cil_tmp28;
 #line 145
   miiIndicator = readl(__cil_tmp29);
   }
   {
 #line 146
   __cil_tmp30 = miiIndicator & 5U;
 #line 146
   if (__cil_tmp30 != 0U) {
 #line 146
     if (delay <= 49U) {
 #line 147
       goto ldv_35671;
     } else {
 #line 149
       goto ldv_35672;
     }
   } else {
 #line 149
     goto ldv_35672;
   }
   }
   ldv_35672: ;
 #line 149
   if (delay == 50U) {
     {
 #line 150
     __cil_tmp31 = etdev->pdev;
 #line 150
     __cil_tmp32 = & __cil_tmp31->dev;
 #line 150
     __cil_tmp33 = (struct device  const  *)__cil_tmp32;
 #line 150
     __cil_tmp34 = (int )xcvrReg;
 #line 150
     dev_warn(__cil_tmp33, "xcvrReg 0x%08x could not be read\n", __cil_tmp34);
 #line 152
     __cil_tmp35 = etdev->pdev;
 #line 152
     __cil_tmp36 = & __cil_tmp35->dev;
 #line 152
     __cil_tmp37 = (struct device  const  *)__cil_tmp36;
 #line 152
     dev_warn(__cil_tmp37, "status is  0x%08x\n", miiIndicator);
 #line 155
     status = -5;
     }
   } else {
 
   }
   {
 #line 160
   __cil_tmp38 = & mac->mii_mgmt_stat;
 #line 160
   __cil_tmp39 = (void const volatile   *)__cil_tmp38;
 #line 160
   tmp = readl(__cil_tmp39);
 #line 160
   *value = (u16 )tmp;
 #line 163
   __cil_tmp40 = & mac->mii_mgmt_cmd;
 #line 163
   __cil_tmp41 = (void volatile   *)__cil_tmp40;
 #line 163
   writel(0U, __cil_tmp41);
 #line 168
   __cil_tmp42 = & mac->mii_mgmt_addr;
 #line 168
   __cil_tmp43 = (void volatile   *)__cil_tmp42;
 #line 168
   writel(miiAddr, __cil_tmp43);
 #line 169
   __cil_tmp44 = & mac->mii_mgmt_cmd;
 #line 169
   __cil_tmp45 = (void volatile   *)__cil_tmp44;
 #line 169
   writel(miiCmd, __cil_tmp45);
   }
 #line 171
   return (status);
 }
 }
 #line 184 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 int32_t MiWrite(struct et131x_adapter *etdev , u8 xcvrReg , u16 value ) 
 { struct _MAC_t *mac ;
   int status ;
   u8 xcvrAddr ;
   u32 delay ;
   u32 miiAddr ;
   u32 miiCmd ;
   u32 miiIndicator ;
   u16 TempValue ;
   unsigned int tmp ;
   ADDRESS_MAP_t *__cil_tmp13 ;
   u32 *__cil_tmp14 ;
   void const volatile   *__cil_tmp15 ;
   u32 *__cil_tmp16 ;
   void const volatile   *__cil_tmp17 ;
   u32 *__cil_tmp18 ;
   void volatile   *__cil_tmp19 ;
   int __cil_tmp20 ;
   int __cil_tmp21 ;
   int __cil_tmp22 ;
   int __cil_tmp23 ;
   unsigned int __cil_tmp24 ;
   u32 *__cil_tmp25 ;
   void volatile   *__cil_tmp26 ;
   unsigned int __cil_tmp27 ;
   u32 *__cil_tmp28 ;
   void volatile   *__cil_tmp29 ;
   u32 *__cil_tmp30 ;
   void const volatile   *__cil_tmp31 ;
   int __cil_tmp32 ;
   struct pci_dev *__cil_tmp33 ;
   struct device *__cil_tmp34 ;
   struct device  const  *__cil_tmp35 ;
   int __cil_tmp36 ;
   struct pci_dev *__cil_tmp37 ;
   struct device *__cil_tmp38 ;
   struct device  const  *__cil_tmp39 ;
   u32 *__cil_tmp40 ;
   void const volatile   *__cil_tmp41 ;
   struct pci_dev *__cil_tmp42 ;
   struct device *__cil_tmp43 ;
   struct device  const  *__cil_tmp44 ;
   u8 __cil_tmp45 ;
   int __cil_tmp46 ;
   u8 __cil_tmp47 ;
   int __cil_tmp48 ;
   u8 __cil_tmp49 ;
   u32 *__cil_tmp50 ;
   void volatile   *__cil_tmp51 ;
   u32 *__cil_tmp52 ;
   void volatile   *__cil_tmp53 ;
   u32 *__cil_tmp54 ;
   void volatile   *__cil_tmp55 ;
 
   {
   {
 #line 186
   __cil_tmp13 = etdev->regs;
 #line 186
   mac = & __cil_tmp13->mac;
 #line 187
   status = 0;
 #line 188
   xcvrAddr = etdev->Stats.xcvr_addr;
 #line 197
   __cil_tmp14 = & mac->mii_mgmt_addr;
 #line 197
   __cil_tmp15 = (void const volatile   *)__cil_tmp14;
 #line 197
   miiAddr = readl(__cil_tmp15);
 #line 198
   __cil_tmp16 = & mac->mii_mgmt_cmd;
 #line 198
   __cil_tmp17 = (void const volatile   *)__cil_tmp16;
 #line 198
   miiCmd = readl(__cil_tmp17);
 #line 201
   __cil_tmp18 = & mac->mii_mgmt_cmd;
 #line 201
   __cil_tmp19 = (void volatile   *)__cil_tmp18;
 #line 201
   writel(0U, __cil_tmp19);
 #line 204
   __cil_tmp20 = (int )xcvrReg;
 #line 204
   __cil_tmp21 = (int )xcvrAddr;
 #line 204
   __cil_tmp22 = __cil_tmp21 << 8;
 #line 204
   __cil_tmp23 = __cil_tmp22 | __cil_tmp20;
 #line 204
   __cil_tmp24 = (unsigned int )__cil_tmp23;
 #line 204
   __cil_tmp25 = & mac->mii_mgmt_addr;
 #line 204
   __cil_tmp26 = (void volatile   *)__cil_tmp25;
 #line 204
   writel(__cil_tmp24, __cil_tmp26);
 #line 207
   __cil_tmp27 = (unsigned int )value;
 #line 207
   __cil_tmp28 = & mac->mii_mgmt_ctrl;
 #line 207
   __cil_tmp29 = (void volatile   *)__cil_tmp28;
 #line 207
   writel(__cil_tmp27, __cil_tmp29);
 #line 208
   delay = 0U;
   }
   ldv_35685: 
   {
 #line 211
   __const_udelay(214750UL);
 #line 212
   delay = delay + 1U;
 #line 213
   __cil_tmp30 = & mac->mii_mgmt_indicator;
 #line 213
   __cil_tmp31 = (void const volatile   *)__cil_tmp30;
 #line 213
   miiIndicator = readl(__cil_tmp31);
   }
   {
 #line 214
   __cil_tmp32 = (int )miiIndicator;
 #line 214
   if (__cil_tmp32 & 1) {
 #line 214
     if (delay <= 99U) {
 #line 215
       goto ldv_35685;
     } else {
 #line 217
       goto ldv_35686;
     }
   } else {
 #line 217
     goto ldv_35686;
   }
   }
   ldv_35686: ;
 #line 217
   if (delay == 100U) {
     {
 #line 220
     __cil_tmp33 = etdev->pdev;
 #line 220
     __cil_tmp34 = & __cil_tmp33->dev;
 #line 220
     __cil_tmp35 = (struct device  const  *)__cil_tmp34;
 #line 220
     __cil_tmp36 = (int )xcvrReg;
 #line 220
     dev_warn(__cil_tmp35, "xcvrReg 0x%08x could not be written", __cil_tmp36);
 #line 222
     __cil_tmp37 = etdev->pdev;
 #line 222
     __cil_tmp38 = & __cil_tmp37->dev;
 #line 222
     __cil_tmp39 = (struct device  const  *)__cil_tmp38;
 #line 222
     dev_warn(__cil_tmp39, "status is  0x%08x\n", miiIndicator);
 #line 224
     __cil_tmp40 = & mac->mii_mgmt_cmd;
 #line 224
     __cil_tmp41 = (void const volatile   *)__cil_tmp40;
 #line 224
     tmp = readl(__cil_tmp41);
 #line 224
     __cil_tmp42 = etdev->pdev;
 #line 224
     __cil_tmp43 = & __cil_tmp42->dev;
 #line 224
     __cil_tmp44 = (struct device  const  *)__cil_tmp43;
 #line 224
     dev_warn(__cil_tmp44, "command is  0x%08x\n", tmp);
 #line 227
     __cil_tmp45 = etdev->Stats.xcvr_addr;
 #line 227
     __cil_tmp46 = (int )__cil_tmp45;
 #line 227
     __cil_tmp47 = (u8 )__cil_tmp46;
 #line 227
     __cil_tmp48 = (int )xcvrReg;
 #line 227
     __cil_tmp49 = (u8 )__cil_tmp48;
 #line 227
     PhyMiRead(etdev, __cil_tmp47, __cil_tmp49, & TempValue);
 #line 229
     status = -5;
     }
   } else {
 
   }
   {
 #line 232
   __cil_tmp50 = & mac->mii_mgmt_cmd;
 #line 232
   __cil_tmp51 = (void volatile   *)__cil_tmp50;
 #line 232
   writel(0U, __cil_tmp51);
 #line 237
   __cil_tmp52 = & mac->mii_mgmt_addr;
 #line 237
   __cil_tmp53 = (void volatile   *)__cil_tmp52;
 #line 237
   writel(miiAddr, __cil_tmp53);
 #line 238
   __cil_tmp54 = & mac->mii_mgmt_cmd;
 #line 238
   __cil_tmp55 = (void volatile   *)__cil_tmp54;
 #line 238
   writel(miiCmd, __cil_tmp55);
   }
 #line 240
   return (status);
 }
 }
 #line 249 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 int et131x_xcvr_find(struct et131x_adapter *etdev ) 
 { u8 xcvr_addr ;
   u16 idr1 ;
   u16 idr2 ;
   u32 xcvr_id ;
   int __cil_tmp6 ;
   u8 __cil_tmp7 ;
   u8 __cil_tmp8 ;
   int __cil_tmp9 ;
   u8 __cil_tmp10 ;
   u8 __cil_tmp11 ;
   int __cil_tmp12 ;
   int __cil_tmp13 ;
   int __cil_tmp14 ;
   int __cil_tmp15 ;
   unsigned int __cil_tmp16 ;
   unsigned int __cil_tmp17 ;
   int __cil_tmp18 ;
   int __cil_tmp19 ;
   unsigned int __cil_tmp20 ;
 
   {
 #line 257
   xcvr_addr = (u8 )0U;
 #line 257
   goto ldv_35696;
   ldv_35695: 
   {
 #line 259
   __cil_tmp6 = (int )xcvr_addr;
 #line 259
   __cil_tmp7 = (u8 )__cil_tmp6;
 #line 259
   __cil_tmp8 = (u8 )2;
 #line 259
   PhyMiRead(etdev, __cil_tmp7, __cil_tmp8, & idr1);
 #line 262
   __cil_tmp9 = (int )xcvr_addr;
 #line 262
   __cil_tmp10 = (u8 )__cil_tmp9;
 #line 262
   __cil_tmp11 = (u8 )3;
 #line 262
   PhyMiRead(etdev, __cil_tmp10, __cil_tmp11, & idr2);
 #line 266
   __cil_tmp12 = (int )idr2;
 #line 266
   __cil_tmp13 = (int )idr1;
 #line 266
   __cil_tmp14 = __cil_tmp13 << 16;
 #line 266
   __cil_tmp15 = __cil_tmp14 | __cil_tmp12;
 #line 266
   xcvr_id = (unsigned int )__cil_tmp15;
   }
   {
 #line 268
   __cil_tmp16 = (unsigned int )idr1;
 #line 268
   if (__cil_tmp16 != 0U) {
     {
 #line 268
     __cil_tmp17 = (unsigned int )idr1;
 #line 268
     if (__cil_tmp17 != 65535U) {
 #line 269
       etdev->Stats.xcvr_id = xcvr_id;
 #line 270
       etdev->Stats.xcvr_addr = xcvr_addr;
 #line 271
       return (0);
     } else {
 
     }
     }
   } else {
 
   }
   }
 #line 257
   __cil_tmp18 = (int )xcvr_addr;
 #line 257
   __cil_tmp19 = __cil_tmp18 + 1;
 #line 257
   xcvr_addr = (u8 )__cil_tmp19;
   ldv_35696: ;
   {
 #line 257
   __cil_tmp20 = (unsigned int )xcvr_addr;
 #line 257
   if (__cil_tmp20 <= 31U) {
 #line 258
     goto ldv_35695;
   } else {
 #line 260
     goto ldv_35697;
   }
   }
   ldv_35697: ;
 #line 274
   return (-19);
 }
 }
 #line 277 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 void ET1310_PhyReset(struct et131x_adapter *etdev ) 
 { u8 __cil_tmp2 ;
   u16 __cil_tmp3 ;
 
   {
   {
 #line 279
   __cil_tmp2 = (u8 )0;
 #line 279
   __cil_tmp3 = (u16 )32768;
 #line 279
   MiWrite(etdev, __cil_tmp2, __cil_tmp3);
   }
 #line 280
   return;
 }
 }
 #line 293 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 void ET1310_PhyPowerDown(struct et131x_adapter *etdev , bool down___0 ) 
 { u16 data ;
   u8 __cil_tmp4 ;
   int __cil_tmp5 ;
   u8 __cil_tmp6 ;
   u8 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
   unsigned int __cil_tmp9 ;
   unsigned int __cil_tmp10 ;
   unsigned int __cil_tmp11 ;
   u8 __cil_tmp12 ;
   int __cil_tmp13 ;
   u16 __cil_tmp14 ;
 
   {
   {
 #line 297
   __cil_tmp4 = etdev->Stats.xcvr_addr;
 #line 297
   __cil_tmp5 = (int )__cil_tmp4;
 #line 297
   __cil_tmp6 = (u8 )__cil_tmp5;
 #line 297
   __cil_tmp7 = (u8 )0;
 #line 297
   PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
 #line 298
   __cil_tmp8 = (unsigned int )data;
 #line 298
   __cil_tmp9 = __cil_tmp8 & 63487U;
 #line 298
   data = (u16 )__cil_tmp9;
   }
 #line 299
   if ((int )down___0) {
 #line 300
     __cil_tmp10 = (unsigned int )data;
 #line 300
     __cil_tmp11 = __cil_tmp10 | 2048U;
 #line 300
     data = (u16 )__cil_tmp11;
   } else {
 
   }
   {
 #line 301
   __cil_tmp12 = (u8 )0;
 #line 301
   __cil_tmp13 = (int )data;
 #line 301
   __cil_tmp14 = (u16 )__cil_tmp13;
 #line 301
   MiWrite(etdev, __cil_tmp12, __cil_tmp14);
   }
 #line 302
   return;
 }
 }
 #line 313 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void ET1310_PhyAutoNeg(struct et131x_adapter *etdev , bool enable ) 
 { u16 data ;
   u8 __cil_tmp4 ;
   int __cil_tmp5 ;
   u8 __cil_tmp6 ;
   u8 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
   unsigned int __cil_tmp9 ;
   unsigned int __cil_tmp10 ;
   unsigned int __cil_tmp11 ;
   u8 __cil_tmp12 ;
   int __cil_tmp13 ;
   u16 __cil_tmp14 ;
 
   {
   {
 #line 317
   __cil_tmp4 = etdev->Stats.xcvr_addr;
 #line 317
   __cil_tmp5 = (int )__cil_tmp4;
 #line 317
   __cil_tmp6 = (u8 )__cil_tmp5;
 #line 317
   __cil_tmp7 = (u8 )0;
 #line 317
   PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
 #line 318
   __cil_tmp8 = (unsigned int )data;
 #line 318
   __cil_tmp9 = __cil_tmp8 & 61439U;
 #line 318
   data = (u16 )__cil_tmp9;
   }
 #line 319
   if ((int )enable) {
 #line 320
     __cil_tmp10 = (unsigned int )data;
 #line 320
     __cil_tmp11 = __cil_tmp10 | 4096U;
 #line 320
     data = (u16 )__cil_tmp11;
   } else {
 
   }
   {
 #line 321
   __cil_tmp12 = (u8 )0;
 #line 321
   __cil_tmp13 = (int )data;
 #line 321
   __cil_tmp14 = (u16 )__cil_tmp13;
 #line 321
   MiWrite(etdev, __cil_tmp12, __cil_tmp14);
   }
 #line 322
   return;
 }
 }
 #line 332 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void ET1310_PhyDuplexMode(struct et131x_adapter *etdev , u16 duplex ) 
 { u16 data ;
   u8 __cil_tmp4 ;
   int __cil_tmp5 ;
   u8 __cil_tmp6 ;
   u8 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
   unsigned int __cil_tmp9 ;
   unsigned int __cil_tmp10 ;
   unsigned int __cil_tmp11 ;
   unsigned int __cil_tmp12 ;
   u8 __cil_tmp13 ;
   int __cil_tmp14 ;
   u16 __cil_tmp15 ;
 
   {
   {
 #line 336
   __cil_tmp4 = etdev->Stats.xcvr_addr;
 #line 336
   __cil_tmp5 = (int )__cil_tmp4;
 #line 336
   __cil_tmp6 = (u8 )__cil_tmp5;
 #line 336
   __cil_tmp7 = (u8 )0;
 #line 336
   PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
 #line 337
   __cil_tmp8 = (unsigned int )data;
 #line 337
   __cil_tmp9 = __cil_tmp8 & 65279U;
 #line 337
   data = (u16 )__cil_tmp9;
   }
   {
 #line 338
   __cil_tmp10 = (unsigned int )duplex;
 #line 338
   if (__cil_tmp10 == 1U) {
 #line 339
     __cil_tmp11 = (unsigned int )data;
 #line 339
     __cil_tmp12 = __cil_tmp11 | 256U;
 #line 339
     data = (u16 )__cil_tmp12;
   } else {
 
   }
   }
   {
 #line 340
   __cil_tmp13 = (u8 )0;
 #line 340
   __cil_tmp14 = (int )data;
 #line 340
   __cil_tmp15 = (u16 )__cil_tmp14;
 #line 340
   MiWrite(etdev, __cil_tmp13, __cil_tmp15);
   }
 #line 341
   return;
 }
 }
 #line 351 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void ET1310_PhySpeedSelect(struct et131x_adapter *etdev , u16 speed ) 
 { u16 data ;
   u16 bits[3U] ;
   u8 __cil_tmp5 ;
   int __cil_tmp6 ;
   u8 __cil_tmp7 ;
   u8 __cil_tmp8 ;
   unsigned int __cil_tmp9 ;
   unsigned int __cil_tmp10 ;
   u8 __cil_tmp11 ;
   int __cil_tmp12 ;
   int __cil_tmp13 ;
   int __cil_tmp14 ;
   u16 __cil_tmp15 ;
 
   {
   {
 #line 354
   bits[0] = (u16 )0U;
 #line 354
   bits[1] = (u16 )8192U;
 #line 354
   bits[2] = (u16 )64U;
 #line 357
   __cil_tmp5 = etdev->Stats.xcvr_addr;
 #line 357
   __cil_tmp6 = (int )__cil_tmp5;
 #line 357
   __cil_tmp7 = (u8 )__cil_tmp6;
 #line 357
   __cil_tmp8 = (u8 )0;
 #line 357
   PhyMiRead(etdev, __cil_tmp7, __cil_tmp8, & data);
 #line 359
   __cil_tmp9 = (unsigned int )data;
 #line 359
   __cil_tmp10 = __cil_tmp9 & 57279U;
 #line 359
   data = (u16 )__cil_tmp10;
 #line 361
   __cil_tmp11 = (u8 )0;
 #line 361
   __cil_tmp12 = (int )data;
 #line 361
   __cil_tmp13 = (int )bits[(int )speed];
 #line 361
   __cil_tmp14 = __cil_tmp13 | __cil_tmp12;
 #line 361
   __cil_tmp15 = (u16 )__cil_tmp14;
 #line 361
   MiWrite(etdev, __cil_tmp11, __cil_tmp15);
   }
 #line 362
   return;
 }
 }
 #line 381 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void ET1310_PhyLinkStatus(struct et131x_adapter *etdev , u8 *link_status ,
                                  u32 *autoneg , u32 *linkspeed , u32 *duplex_mode ,
                                  u32 *mdi_mdix , u32 *masterslave , u32 *polarity ) 
 { u16 mistatus ;
   u16 is1000BaseT ;
   u16 vmi_phystatus ;
   u16 control ;
   u8 __cil_tmp13 ;
   int __cil_tmp14 ;
   u8 __cil_tmp15 ;
   u8 __cil_tmp16 ;
   u8 __cil_tmp17 ;
   int __cil_tmp18 ;
   u8 __cil_tmp19 ;
   u8 __cil_tmp20 ;
   u8 __cil_tmp21 ;
   int __cil_tmp22 ;
   u8 __cil_tmp23 ;
   u8 __cil_tmp24 ;
   u8 __cil_tmp25 ;
   int __cil_tmp26 ;
   u8 __cil_tmp27 ;
   u8 __cil_tmp28 ;
   int __cil_tmp29 ;
   int __cil_tmp30 ;
   int __cil_tmp31 ;
   int __cil_tmp32 ;
   int __cil_tmp33 ;
   int __cil_tmp34 ;
   int __cil_tmp35 ;
   int __cil_tmp36 ;
   int __cil_tmp37 ;
   int __cil_tmp38 ;
   int __cil_tmp39 ;
   int __cil_tmp40 ;
   int __cil_tmp41 ;
   int __cil_tmp42 ;
   int __cil_tmp43 ;
   int __cil_tmp44 ;
   int __cil_tmp45 ;
   int __cil_tmp46 ;
   int __cil_tmp47 ;
   int __cil_tmp48 ;
 
   {
   {
 #line 389
   mistatus = (u16 )0U;
 #line 390
   is1000BaseT = (u16 )0U;
 #line 391
   vmi_phystatus = (u16 )0U;
 #line 392
   control = (u16 )0U;
 #line 394
   __cil_tmp13 = etdev->Stats.xcvr_addr;
 #line 394
   __cil_tmp14 = (int )__cil_tmp13;
 #line 394
   __cil_tmp15 = (u8 )__cil_tmp14;
 #line 394
   __cil_tmp16 = (u8 )1;
 #line 394
   PhyMiRead(etdev, __cil_tmp15, __cil_tmp16, & mistatus);
 #line 395
   __cil_tmp17 = etdev->Stats.xcvr_addr;
 #line 395
   __cil_tmp18 = (int )__cil_tmp17;
 #line 395
   __cil_tmp19 = (u8 )__cil_tmp18;
 #line 395
   __cil_tmp20 = (u8 )10;
 #line 395
   PhyMiRead(etdev, __cil_tmp19, __cil_tmp20, & is1000BaseT);
 #line 396
   __cil_tmp21 = etdev->Stats.xcvr_addr;
 #line 396
   __cil_tmp22 = (int )__cil_tmp21;
 #line 396
   __cil_tmp23 = (u8 )__cil_tmp22;
 #line 396
   __cil_tmp24 = (u8 )26;
 #line 396
   PhyMiRead(etdev, __cil_tmp23, __cil_tmp24, & vmi_phystatus);
 #line 397
   __cil_tmp25 = etdev->Stats.xcvr_addr;
 #line 397
   __cil_tmp26 = (int )__cil_tmp25;
 #line 397
   __cil_tmp27 = (u8 )__cil_tmp26;
 #line 397
   __cil_tmp28 = (u8 )0;
 #line 397
   PhyMiRead(etdev, __cil_tmp27, __cil_tmp28, & control);
 #line 399
   __cil_tmp29 = (int )vmi_phystatus;
 #line 399
   __cil_tmp30 = __cil_tmp29 & 64;
 #line 399
   __cil_tmp31 = __cil_tmp30 != 0;
 #line 399
   *link_status = (u8 )__cil_tmp31;
   }
   {
 #line 400
   __cil_tmp32 = (int )control;
 #line 400
   __cil_tmp33 = __cil_tmp32 & 4096;
 #line 400
   if (__cil_tmp33 != 0) {
 #line 400
     __cil_tmp34 = (int )vmi_phystatus;
 #line 400
     __cil_tmp35 = __cil_tmp34 & 32;
 #line 400
     __cil_tmp36 = __cil_tmp35 != 0;
 #line 400
     *autoneg = (u32 )__cil_tmp36;
   } else {
 #line 400
     *autoneg = 2U;
   }
   }
 #line 404
   __cil_tmp37 = (int )vmi_phystatus;
 #line 404
   __cil_tmp38 = __cil_tmp37 & 768;
 #line 404
   __cil_tmp39 = __cil_tmp38 >> 8;
 #line 404
   *linkspeed = (u32 )__cil_tmp39;
 #line 405
   __cil_tmp40 = (int )vmi_phystatus;
 #line 405
   __cil_tmp41 = __cil_tmp40 & 128;
 #line 405
   __cil_tmp42 = __cil_tmp41 >> 7;
 #line 405
   *duplex_mode = (u32 )__cil_tmp42;
 #line 407
   *mdi_mdix = 0U;
 #line 409
   __cil_tmp43 = (int )is1000BaseT;
 #line 409
   __cil_tmp44 = __cil_tmp43 & 16384;
 #line 409
   __cil_tmp45 = __cil_tmp44 != 0;
 #line 409
   *masterslave = (u32 )__cil_tmp45;
 #line 411
   __cil_tmp46 = (int )vmi_phystatus;
 #line 411
   __cil_tmp47 = __cil_tmp46 & 1024;
 #line 411
   __cil_tmp48 = __cil_tmp47 != 0;
 #line 411
   *polarity = (u32 )__cil_tmp48;
 #line 413
   return;
 }
 }
 #line 415 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 static void ET1310_PhyAndOrReg(struct et131x_adapter *etdev , u16 regnum , u16 andMask ,
                                u16 orMask ) 
 { u16 reg ;
   u8 __cil_tmp6 ;
   int __cil_tmp7 ;
   u8 __cil_tmp8 ;
   u8 __cil_tmp9 ;
   int __cil_tmp10 ;
   u8 __cil_tmp11 ;
   int __cil_tmp12 ;
   int __cil_tmp13 ;
   int __cil_tmp14 ;
   int __cil_tmp15 ;
   int __cil_tmp16 ;
   int __cil_tmp17 ;
   u8 __cil_tmp18 ;
   int __cil_tmp19 ;
   u8 __cil_tmp20 ;
   int __cil_tmp21 ;
   u16 __cil_tmp22 ;
 
   {
   {
 #line 420
   __cil_tmp6 = etdev->Stats.xcvr_addr;
 #line 420
   __cil_tmp7 = (int )__cil_tmp6;
 #line 420
   __cil_tmp8 = (u8 )__cil_tmp7;
 #line 420
   __cil_tmp9 = (u8 )regnum;
 #line 420
   __cil_tmp10 = (int )__cil_tmp9;
 #line 420
   __cil_tmp11 = (u8 )__cil_tmp10;
 #line 420
   PhyMiRead(etdev, __cil_tmp8, __cil_tmp11, & reg);
 #line 421
   __cil_tmp12 = (int )andMask;
 #line 421
   __cil_tmp13 = (int )reg;
 #line 421
   __cil_tmp14 = __cil_tmp13 & __cil_tmp12;
 #line 421
   reg = (u16 )__cil_tmp14;
 #line 422
   __cil_tmp15 = (int )orMask;
 #line 422
   __cil_tmp16 = (int )reg;
 #line 422
   __cil_tmp17 = __cil_tmp16 | __cil_tmp15;
 #line 422
   reg = (u16 )__cil_tmp17;
 #line 423
   __cil_tmp18 = (u8 )regnum;
 #line 423
   __cil_tmp19 = (int )__cil_tmp18;
 #line 423
   __cil_tmp20 = (u8 )__cil_tmp19;
 #line 423
   __cil_tmp21 = (int )reg;
 #line 423
   __cil_tmp22 = (u16 )__cil_tmp21;
 #line 423
   MiWrite(etdev, __cil_tmp20, __cil_tmp22);
   }
 #line 424
   return;
 }
 }
 #line 427 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 void ET1310_PhyAccessMiBit(struct et131x_adapter *etdev , u16 action , u16 regnum ,
                            u16 bitnum , u8 *value ) 
 { u16 reg ;
   u16 mask ;
   int __cil_tmp8 ;
   int __cil_tmp9 ;
   u8 __cil_tmp10 ;
   int __cil_tmp11 ;
   u8 __cil_tmp12 ;
   u8 __cil_tmp13 ;
   int __cil_tmp14 ;
   u8 __cil_tmp15 ;
   int __cil_tmp16 ;
   int __cil_tmp17 ;
   int __cil_tmp18 ;
   int __cil_tmp19 ;
   int __cil_tmp20 ;
   int __cil_tmp21 ;
   int __cil_tmp22 ;
   int __cil_tmp23 ;
   u8 __cil_tmp24 ;
   int __cil_tmp25 ;
   u8 __cil_tmp26 ;
   int __cil_tmp27 ;
   int __cil_tmp28 ;
   int __cil_tmp29 ;
   u16 __cil_tmp30 ;
   u8 __cil_tmp31 ;
   int __cil_tmp32 ;
   u8 __cil_tmp33 ;
   short __cil_tmp34 ;
   int __cil_tmp35 ;
   short __cil_tmp36 ;
   int __cil_tmp37 ;
   int __cil_tmp38 ;
   int __cil_tmp39 ;
   u16 __cil_tmp40 ;
   int __cil_tmp41 ;
   u16 __cil_tmp42 ;
 
   {
   {
 #line 431
   __cil_tmp8 = (int )bitnum;
 #line 431
   __cil_tmp9 = 1 << __cil_tmp8;
 #line 431
   mask = (u16 )__cil_tmp9;
 #line 434
   __cil_tmp10 = etdev->Stats.xcvr_addr;
 #line 434
   __cil_tmp11 = (int )__cil_tmp10;
 #line 434
   __cil_tmp12 = (u8 )__cil_tmp11;
 #line 434
   __cil_tmp13 = (u8 )regnum;
 #line 434
   __cil_tmp14 = (int )__cil_tmp13;
 #line 434
   __cil_tmp15 = (u8 )__cil_tmp14;
 #line 434
   PhyMiRead(etdev, __cil_tmp12, __cil_tmp15, & reg);
   }
   {
 #line 437
   __cil_tmp16 = (int )action;
 #line 437
   if (__cil_tmp16 == 2) {
 #line 437
     goto case_2;
   } else {
     {
 #line 441
     __cil_tmp17 = (int )action;
 #line 441
     if (__cil_tmp17 == 1) {
 #line 441
       goto case_1;
     } else {
       {
 #line 445
       __cil_tmp18 = (int )action;
 #line 445
       if (__cil_tmp18 == 0) {
 #line 445
         goto case_0;
       } else {
 #line 449
         goto switch_default;
 #line 436
         if (0) {
           case_2: 
 #line 438
           __cil_tmp19 = (int )bitnum;
 #line 438
           __cil_tmp20 = (int )mask;
 #line 438
           __cil_tmp21 = (int )reg;
 #line 438
           __cil_tmp22 = __cil_tmp21 & __cil_tmp20;
 #line 438
           __cil_tmp23 = __cil_tmp22 >> __cil_tmp19;
 #line 438
           *value = (u8 )__cil_tmp23;
 #line 439
           goto ldv_35753;
           case_1: 
           {
 #line 442
           __cil_tmp24 = (u8 )regnum;
 #line 442
           __cil_tmp25 = (int )__cil_tmp24;
 #line 442
           __cil_tmp26 = (u8 )__cil_tmp25;
 #line 442
           __cil_tmp27 = (int )mask;
 #line 442
           __cil_tmp28 = (int )reg;
 #line 442
           __cil_tmp29 = __cil_tmp28 | __cil_tmp27;
 #line 442
           __cil_tmp30 = (u16 )__cil_tmp29;
 #line 442
           MiWrite(etdev, __cil_tmp26, __cil_tmp30);
           }
 #line 443
           goto ldv_35753;
           case_0: 
           {
 #line 446
           __cil_tmp31 = (u8 )regnum;
 #line 446
           __cil_tmp32 = (int )__cil_tmp31;
 #line 446
           __cil_tmp33 = (u8 )__cil_tmp32;
 #line 446
           __cil_tmp34 = (short )reg;
 #line 446
           __cil_tmp35 = (int )__cil_tmp34;
 #line 446
           __cil_tmp36 = (short )mask;
 #line 446
           __cil_tmp37 = (int )__cil_tmp36;
 #line 446
           __cil_tmp38 = ~ __cil_tmp37;
 #line 446
           __cil_tmp39 = __cil_tmp38 & __cil_tmp35;
 #line 446
           __cil_tmp40 = (u16 )__cil_tmp39;
 #line 446
           __cil_tmp41 = (int )__cil_tmp40;
 #line 446
           __cil_tmp42 = (u16 )__cil_tmp41;
 #line 446
           MiWrite(etdev, __cil_tmp33, __cil_tmp42);
           }
 #line 447
           goto ldv_35753;
           switch_default: ;
 #line 450
           goto ldv_35753;
         } else {
 
         }
       }
       }
     }
     }
   }
   }
   ldv_35753: ;
 #line 453
   return;
 }
 }
 #line 454 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
 void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *etdev , u16 duplex ) 
 { u16 data ;
   u8 __cil_tmp4 ;
   int __cil_tmp5 ;
   u8 __cil_tmp6 ;
   u8 __cil_tmp7 ;
   unsigned int __cil_tmp8 ;
   unsigned int __cil_tmp9 ;
   int __cil_tmp10 ;
   int __cil_tmp11 ;
   int __cil_tmp12 ;
   int __cil_tmp13 ;
   unsigned int __cil_tmp14 ;
   unsigned int __cil_tmp15 ;
   unsigned int __cil_tmp16 ;
   unsigned int __cil_tmp17 ;
   unsigned int __cil_tmp18 ;
   unsigned int __cil_tmp19 ;
   u8 __cil_tmp20 ;
   int __cil_tmp21 ;
   u16 __cil_tmp22 ;
 
   {
   {
 #line 460
   __cil_tmp4 = etdev->Stats.xcvr_addr;
 #line 460
   __cil_tmp5 = (int )__cil_tmp4;
 #line 460
   __cil_tmp6 = (u8 )__cil_tmp5;
 #line 460
   __cil_tmp7 = (u8 )9;
 #line 460
   PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
 #line 463
   __cil_tmp8 = (unsigned int )data;
 #line 463
   __cil_tmp9 = __cil_tmp8 & 64767U;
 #line 463
  data = (u16 )__cil_tmp9;
  }
  {
#line 466
  __cil_tmp10 = (int )duplex;
#line 466
  if (__cil_tmp10 == 0) {
#line 466
    goto case_0;
  } else {
    {
#line 470
    __cil_tmp11 = (int )duplex;
#line 470
    if (__cil_tmp11 == 1) {
#line 470
      goto case_1;
    } else {
      {
#line 475
      __cil_tmp12 = (int )duplex;
#line 475
      if (__cil_tmp12 == 2) {
#line 475
        goto case_2;
      } else {
        {
#line 480
        __cil_tmp13 = (int )duplex;
#line 480
        if (__cil_tmp13 == 3) {
#line 480
          goto case_3;
        } else {
#line 481
          goto switch_default;
#line 465
          if (0) {
            case_0: ;
#line 468
            goto ldv_35763;
            case_1: 
#line 472
            __cil_tmp14 = (unsigned int )data;
#line 472
            __cil_tmp15 = __cil_tmp14 | 512U;
#line 472
            data = (u16 )__cil_tmp15;
#line 473
            goto ldv_35763;
            case_2: 
#line 477
            __cil_tmp16 = (unsigned int )data;
#line 477
            __cil_tmp17 = __cil_tmp16 | 256U;
#line 477
            data = (u16 )__cil_tmp17;
#line 478
            goto ldv_35763;
            case_3: ;
            switch_default: 
#line 482
            __cil_tmp18 = (unsigned int )data;
#line 482
            __cil_tmp19 = __cil_tmp18 | 768U;
#line 482
            data = (u16 )__cil_tmp19;
#line 483
            goto ldv_35763;
          } else {

          }
        }
        }
      }
      }
    }
    }
  }
  }
  ldv_35763: 
  {
#line 487
  __cil_tmp20 = (u8 )9;
#line 487
  __cil_tmp21 = (int )data;
#line 487
  __cil_tmp22 = (u16 )__cil_tmp21;
#line 487
  MiWrite(etdev, __cil_tmp20, __cil_tmp22);
  }
#line 488
  return;
}
}
#line 490 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
static void ET1310_PhyAdvertise100BaseT(struct et131x_adapter *etdev , u16 duplex ) 
{ u16 data ;
  u8 __cil_tmp4 ;
  int __cil_tmp5 ;
  u8 __cil_tmp6 ;
  u8 __cil_tmp7 ;
  unsigned int __cil_tmp8 ;
  unsigned int __cil_tmp9 ;
  int __cil_tmp10 ;
  int __cil_tmp11 ;
  int __cil_tmp12 ;
  int __cil_tmp13 ;
  unsigned int __cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  unsigned int __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  unsigned int __cil_tmp18 ;
  unsigned int __cil_tmp19 ;
  u8 __cil_tmp20 ;
  int __cil_tmp21 ;
  u16 __cil_tmp22 ;

  {
  {
#line 496
  __cil_tmp4 = etdev->Stats.xcvr_addr;
#line 496
  __cil_tmp5 = (int )__cil_tmp4;
#line 496
  __cil_tmp6 = (u8 )__cil_tmp5;
#line 496
  __cil_tmp7 = (u8 )4;
#line 496
  PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
#line 499
  __cil_tmp8 = (unsigned int )data;
#line 499
  __cil_tmp9 = __cil_tmp8 & 65151U;
#line 499
  data = (u16 )__cil_tmp9;
  }
  {
#line 502
  __cil_tmp10 = (int )duplex;
#line 502
  if (__cil_tmp10 == 0) {
#line 502
    goto case_0;
  } else {
    {
#line 506
    __cil_tmp11 = (int )duplex;
#line 506
    if (__cil_tmp11 == 1) {
#line 506
      goto case_1;
    } else {
      {
#line 511
      __cil_tmp12 = (int )duplex;
#line 511
      if (__cil_tmp12 == 2) {
#line 511
        goto case_2;
      } else {
        {
#line 516
        __cil_tmp13 = (int )duplex;
#line 516
        if (__cil_tmp13 == 3) {
#line 516
          goto case_3;
        } else {
#line 517
          goto switch_default;
#line 501
          if (0) {
            case_0: ;
#line 504
            goto ldv_35774;
            case_1: 
#line 508
            __cil_tmp14 = (unsigned int )data;
#line 508
            __cil_tmp15 = __cil_tmp14 | 256U;
#line 508
            data = (u16 )__cil_tmp15;
#line 509
            goto ldv_35774;
            case_2: 
#line 513
            __cil_tmp16 = (unsigned int )data;
#line 513
            __cil_tmp17 = __cil_tmp16 | 128U;
#line 513
            data = (u16 )__cil_tmp17;
#line 514
            goto ldv_35774;
            case_3: ;
            switch_default: 
#line 519
            __cil_tmp18 = (unsigned int )data;
#line 519
            __cil_tmp19 = __cil_tmp18 | 384U;
#line 519
            data = (u16 )__cil_tmp19;
#line 520
            goto ldv_35774;
          } else {

          }
        }
        }
      }
      }
    }
    }
  }
  }
  ldv_35774: 
  {
#line 524
  __cil_tmp20 = (u8 )4;
#line 524
  __cil_tmp21 = (int )data;
#line 524
  __cil_tmp22 = (u16 )__cil_tmp21;
#line 524
  MiWrite(etdev, __cil_tmp20, __cil_tmp22);
  }
#line 525
  return;
}
}
#line 527 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
static void ET1310_PhyAdvertise10BaseT(struct et131x_adapter *etdev , u16 duplex ) 
{ u16 data ;
  u8 __cil_tmp4 ;
  int __cil_tmp5 ;
  u8 __cil_tmp6 ;
  u8 __cil_tmp7 ;
  unsigned int __cil_tmp8 ;
  unsigned int __cil_tmp9 ;
  int __cil_tmp10 ;
  int __cil_tmp11 ;
  int __cil_tmp12 ;
  int __cil_tmp13 ;
  unsigned int __cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  unsigned int __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  unsigned int __cil_tmp18 ;
  unsigned int __cil_tmp19 ;
  u8 __cil_tmp20 ;
  int __cil_tmp21 ;
  u16 __cil_tmp22 ;

  {
  {
#line 533
  __cil_tmp4 = etdev->Stats.xcvr_addr;
#line 533
  __cil_tmp5 = (int )__cil_tmp4;
#line 533
  __cil_tmp6 = (u8 )__cil_tmp5;
#line 533
  __cil_tmp7 = (u8 )4;
#line 533
  PhyMiRead(etdev, __cil_tmp6, __cil_tmp7, & data);
#line 536
  __cil_tmp8 = (unsigned int )data;
#line 536
  __cil_tmp9 = __cil_tmp8 & 65439U;
#line 536
  data = (u16 )__cil_tmp9;
  }
  {
#line 539
  __cil_tmp10 = (int )duplex;
#line 539
  if (__cil_tmp10 == 0) {
#line 539
    goto case_0;
  } else {
    {
#line 543
    __cil_tmp11 = (int )duplex;
#line 543
    if (__cil_tmp11 == 1) {
#line 543
      goto case_1;
    } else {
      {
#line 548
      __cil_tmp12 = (int )duplex;
#line 548
      if (__cil_tmp12 == 2) {
#line 548
        goto case_2;
      } else {
        {
#line 553
        __cil_tmp13 = (int )duplex;
#line 553
        if (__cil_tmp13 == 3) {
#line 553
          goto case_3;
        } else {
#line 554
          goto switch_default;
#line 538
          if (0) {
            case_0: ;
#line 541
            goto ldv_35785;
            case_1: 
#line 545
            __cil_tmp14 = (unsigned int )data;
#line 545
            __cil_tmp15 = __cil_tmp14 | 64U;
#line 545
            data = (u16 )__cil_tmp15;
#line 546
            goto ldv_35785;
            case_2: 
#line 550
            __cil_tmp16 = (unsigned int )data;
#line 550
            __cil_tmp17 = __cil_tmp16 | 32U;
#line 550
            data = (u16 )__cil_tmp17;
#line 551
            goto ldv_35785;
            case_3: ;
            switch_default: 
#line 556
            __cil_tmp18 = (unsigned int )data;
#line 556
            __cil_tmp19 = __cil_tmp18 | 96U;
#line 556
            data = (u16 )__cil_tmp19;
#line 557
            goto ldv_35785;
          } else {

          }
        }
        }
      }
      }
    }
    }
  }
  }
  ldv_35785: 
  {
#line 561
  __cil_tmp20 = (u8 )4;
#line 561
  __cil_tmp21 = (int )data;
#line 561
  __cil_tmp22 = (u16 )__cil_tmp21;
#line 561
  MiWrite(etdev, __cil_tmp20, __cil_tmp22);
  }
#line 562
  return;
}
}
#line 572 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
void et131x_setphy_normal(struct et131x_adapter *etdev ) 
{ bool __cil_tmp2 ;

  {
  {
#line 575
  __cil_tmp2 = (bool )0;
#line 575
  ET1310_PhyPowerDown(etdev, __cil_tmp2);
#line 576
  et131x_xcvr_init(etdev);
  }
#line 577
  return;
}
}
#line 585 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
static void et131x_xcvr_init(struct et131x_adapter *etdev ) 
{ u16 imr ;
  u16 isr ;
  u16 lcr2 ;
  u8 __cil_tmp5 ;
  int __cil_tmp6 ;
  u8 __cil_tmp7 ;
  u8 __cil_tmp8 ;
  u8 __cil_tmp9 ;
  int __cil_tmp10 ;
  u8 __cil_tmp11 ;
  u8 __cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  unsigned int __cil_tmp14 ;
  u8 __cil_tmp15 ;
  int __cil_tmp16 ;
  u16 __cil_tmp17 ;
  u8 __cil_tmp18 ;
  int __cil_tmp19 ;
  int __cil_tmp20 ;
  u8 __cil_tmp21 ;
  int __cil_tmp22 ;
  u8 __cil_tmp23 ;
  u8 __cil_tmp24 ;
  unsigned int __cil_tmp25 ;
  unsigned int __cil_tmp26 ;
  unsigned int __cil_tmp27 ;
  unsigned int __cil_tmp28 ;
  u8 __cil_tmp29 ;
  int __cil_tmp30 ;
  int __cil_tmp31 ;
  unsigned int __cil_tmp32 ;
  unsigned int __cil_tmp33 ;
  unsigned int __cil_tmp34 ;
  unsigned int __cil_tmp35 ;
  u8 __cil_tmp36 ;
  int __cil_tmp37 ;
  u16 __cil_tmp38 ;
  u16 __cil_tmp39 ;
  unsigned int __cil_tmp40 ;
  u8 __cil_tmp41 ;
  unsigned int __cil_tmp42 ;
  u8 __cil_tmp43 ;
  unsigned int __cil_tmp44 ;
  u16 __cil_tmp45 ;
  u16 __cil_tmp46 ;
  u16 __cil_tmp47 ;
  u8 *__cil_tmp48 ;
  u8 __cil_tmp49 ;
  unsigned int __cil_tmp50 ;
  u16 __cil_tmp51 ;
  u16 __cil_tmp52 ;
  u16 __cil_tmp53 ;
  u8 *__cil_tmp54 ;
  u16 __cil_tmp55 ;
  u16 __cil_tmp56 ;
  u16 __cil_tmp57 ;
  u8 *__cil_tmp58 ;
  u8 __cil_tmp59 ;
  unsigned int __cil_tmp60 ;
  u16 __cil_tmp61 ;
  u16 __cil_tmp62 ;
  u16 __cil_tmp63 ;
  u8 *__cil_tmp64 ;
  u16 __cil_tmp65 ;
  u16 __cil_tmp66 ;
  u16 __cil_tmp67 ;
  u8 *__cil_tmp68 ;
  bool __cil_tmp69 ;
  u16 __cil_tmp70 ;
  u16 __cil_tmp71 ;
  u16 __cil_tmp72 ;
  u8 *__cil_tmp73 ;
  bool __cil_tmp74 ;
  u8 __cil_tmp75 ;
  unsigned int __cil_tmp76 ;
  u8 __cil_tmp77 ;
  unsigned int __cil_tmp78 ;
  u16 __cil_tmp79 ;
  u16 __cil_tmp80 ;
  u16 __cil_tmp81 ;
  u8 *__cil_tmp82 ;
  u8 __cil_tmp83 ;
  unsigned int __cil_tmp84 ;
  u16 __cil_tmp85 ;
  u16 __cil_tmp86 ;
  u16 __cil_tmp87 ;
  u8 *__cil_tmp88 ;
  u16 __cil_tmp89 ;
  u16 __cil_tmp90 ;
  u16 __cil_tmp91 ;
  u8 *__cil_tmp92 ;
  u8 __cil_tmp93 ;
  unsigned int __cil_tmp94 ;
  u16 __cil_tmp95 ;
  u16 __cil_tmp96 ;
  u16 __cil_tmp97 ;
  u8 *__cil_tmp98 ;
  u16 __cil_tmp99 ;
  u16 __cil_tmp100 ;
  u16 __cil_tmp101 ;
  u8 *__cil_tmp102 ;
  u16 __cil_tmp103 ;
  u16 __cil_tmp104 ;
  u16 __cil_tmp105 ;
  u8 *__cil_tmp106 ;
  u16 __cil_tmp107 ;
  u16 __cil_tmp108 ;
  u16 __cil_tmp109 ;
  u8 *__cil_tmp110 ;
  bool __cil_tmp111 ;
  u16 __cil_tmp112 ;
  int __cil_tmp113 ;
  u16 __cil_tmp114 ;
  int __cil_tmp115 ;
  u16 __cil_tmp116 ;
  int __cil_tmp117 ;
  u16 __cil_tmp118 ;
  u16 __cil_tmp119 ;
  u8 __cil_tmp120 ;
  unsigned int __cil_tmp121 ;
  u16 __cil_tmp122 ;
  u8 __cil_tmp123 ;
  unsigned int __cil_tmp124 ;
  u16 __cil_tmp125 ;
  bool __cil_tmp126 ;
  u16 __cil_tmp127 ;
  u16 __cil_tmp128 ;
  u16 __cil_tmp129 ;
  u16 __cil_tmp130 ;
  u16 __cil_tmp131 ;
  u8 __cil_tmp132 ;
  unsigned int __cil_tmp133 ;
  u16 __cil_tmp134 ;
  u16 __cil_tmp135 ;
  u8 __cil_tmp136 ;
  unsigned int __cil_tmp137 ;
  u16 __cil_tmp138 ;
  bool __cil_tmp139 ;
  u16 __cil_tmp140 ;
  u16 __cil_tmp141 ;
  u16 __cil_tmp142 ;
  u16 __cil_tmp143 ;
  u16 __cil_tmp144 ;
  u16 __cil_tmp145 ;
  bool __cil_tmp146 ;

  {
  {
#line 592
  etdev->Bmsr.value = (u16 )0U;
#line 594
  __cil_tmp5 = etdev->Stats.xcvr_addr;
#line 594
  __cil_tmp6 = (int )__cil_tmp5;
#line 594
  __cil_tmp7 = (u8 )__cil_tmp6;
#line 594
  __cil_tmp8 = (u8 )25;
#line 594
  PhyMiRead(etdev, __cil_tmp7, __cil_tmp8, & isr);
#line 595
  __cil_tmp9 = etdev->Stats.xcvr_addr;
#line 595
  __cil_tmp10 = (int )__cil_tmp9;
#line 595
  __cil_tmp11 = (u8 )__cil_tmp10;
#line 595
  __cil_tmp12 = (u8 )24;
#line 595
  PhyMiRead(etdev, __cil_tmp11, __cil_tmp12, & imr);
#line 600
  __cil_tmp13 = (unsigned int )imr;
#line 600
  __cil_tmp14 = __cil_tmp13 | 261U;
#line 600
  imr = (u16 )__cil_tmp14;
#line 602
  __cil_tmp15 = (u8 )24;
#line 602
  __cil_tmp16 = (int )imr;
#line 602
  __cil_tmp17 = (u16 )__cil_tmp16;
#line 602
  MiWrite(etdev, __cil_tmp15, __cil_tmp17);
  }
  {
#line 612
  __cil_tmp18 = etdev->eeprom_data[1];
#line 612
  __cil_tmp19 = (int )__cil_tmp18;
#line 612
  __cil_tmp20 = __cil_tmp19 & 4;
#line 612
  if (__cil_tmp20 == 0) {
    {
#line 613
    __cil_tmp21 = etdev->Stats.xcvr_addr;
#line 613
    __cil_tmp22 = (int )__cil_tmp21;
#line 613
    __cil_tmp23 = (u8 )__cil_tmp22;
#line 613
    __cil_tmp24 = (u8 )28;
#line 613
    PhyMiRead(etdev, __cil_tmp23, __cil_tmp24, & lcr2);
#line 616
    __cil_tmp25 = (unsigned int )lcr2;
#line 616
    __cil_tmp26 = __cil_tmp25 & 255U;
#line 616
    lcr2 = (u16 )__cil_tmp26;
#line 617
    __cil_tmp27 = (unsigned int )lcr2;
#line 617
    __cil_tmp28 = __cil_tmp27 | 40960U;
#line 617
    lcr2 = (u16 )__cil_tmp28;
    }
    {
#line 619
    __cil_tmp29 = etdev->eeprom_data[1];
#line 619
    __cil_tmp30 = (int )__cil_tmp29;
#line 619
    __cil_tmp31 = __cil_tmp30 & 8;
#line 619
    if (__cil_tmp31 == 0) {
#line 620
      __cil_tmp32 = (unsigned int )lcr2;
#line 620
      __cil_tmp33 = __cil_tmp32 | 768U;
#line 620
      lcr2 = (u16 )__cil_tmp33;
    } else {
#line 622
      __cil_tmp34 = (unsigned int )lcr2;
#line 622
      __cil_tmp35 = __cil_tmp34 | 1024U;
#line 622
      lcr2 = (u16 )__cil_tmp35;
    }
    }
    {
#line 624
    __cil_tmp36 = (u8 )28;
#line 624
    __cil_tmp37 = (int )lcr2;
#line 624
    __cil_tmp38 = (u16 )__cil_tmp37;
#line 624
    MiWrite(etdev, __cil_tmp36, __cil_tmp38);
    }
  } else {

  }
  }
  {
#line 629
  __cil_tmp39 = etdev->AiForceSpeed;
#line 629
  __cil_tmp40 = (unsigned int )__cil_tmp39;
#line 629
  if (__cil_tmp40 == 0U) {
    {
#line 629
    __cil_tmp41 = etdev->AiForceDpx;
#line 629
    __cil_tmp42 = (unsigned int )__cil_tmp41;
#line 629
    if (__cil_tmp42 == 0U) {
      {
#line 630
      __cil_tmp43 = etdev->wanted_flow;
#line 630
      __cil_tmp44 = (unsigned int )__cil_tmp43;
#line 630
      if (__cil_tmp44 == 1U) {
        {
#line 632
        __cil_tmp45 = (u16 )1;
#line 632
        __cil_tmp46 = (u16 )4;
#line 632
        __cil_tmp47 = (u16 )11;
#line 632
        __cil_tmp48 = (u8 *)0;
#line 632
        ET1310_PhyAccessMiBit(etdev, __cil_tmp45, __cil_tmp46, __cil_tmp47, __cil_tmp48);
        }
      } else {
        {
#line 630
        __cil_tmp49 = etdev->wanted_flow;
#line 630
        __cil_tmp50 = (unsigned int )__cil_tmp49;
#line 630
        if (__cil_tmp50 == 0U) {
          {
#line 632
          __cil_tmp51 = (u16 )1;
#line 632
          __cil_tmp52 = (u16 )4;
#line 632
          __cil_tmp53 = (u16 )11;
#line 632
          __cil_tmp54 = (u8 *)0;
#line 632
          ET1310_PhyAccessMiBit(etdev, __cil_tmp51, __cil_tmp52, __cil_tmp53, __cil_tmp54);
          }
        } else {
          {
#line 635
          __cil_tmp55 = (u16 )0;
#line 635
          __cil_tmp56 = (u16 )4;
#line 635
          __cil_tmp57 = (u16 )11;
#line 635
          __cil_tmp58 = (u8 *)0;
#line 635
          ET1310_PhyAccessMiBit(etdev, __cil_tmp55, __cil_tmp56, __cil_tmp57, __cil_tmp58);
          }
        }
        }
      }
      }
      {
#line 638
      __cil_tmp59 = etdev->wanted_flow;
#line 638
      __cil_tmp60 = (unsigned int )__cil_tmp59;
#line 638
      if (__cil_tmp60 == 0U) {
        {
#line 639
        __cil_tmp61 = (u16 )1;
#line 639
        __cil_tmp62 = (u16 )4;
#line 639
        __cil_tmp63 = (u16 )10;
#line 639
        __cil_tmp64 = (u8 *)0;
#line 639
        ET1310_PhyAccessMiBit(etdev, __cil_tmp61, __cil_tmp62, __cil_tmp63, __cil_tmp64);
        }
      } else {
        {
#line 642
        __cil_tmp65 = (u16 )0;
#line 642
        __cil_tmp66 = (u16 )4;
#line 642
        __cil_tmp67 = (u16 )10;
#line 642
        __cil_tmp68 = (u8 *)0;
#line 642
        ET1310_PhyAccessMiBit(etdev, __cil_tmp65, __cil_tmp66, __cil_tmp67, __cil_tmp68);
        }
      }
      }
      {
#line 646
      __cil_tmp69 = (bool )1;
#line 646
      ET1310_PhyAutoNeg(etdev, __cil_tmp69);
#line 649
      __cil_tmp70 = (u16 )1;
#line 649
      __cil_tmp71 = (u16 )0;
#line 649
      __cil_tmp72 = (u16 )9;
#line 649
      __cil_tmp73 = (u8 *)0;
#line 649
      ET1310_PhyAccessMiBit(etdev, __cil_tmp70, __cil_tmp71, __cil_tmp72, __cil_tmp73);
      }
#line 650
      return;
    } else {

    }
    }
  } else {

  }
  }
  {
#line 653
  __cil_tmp74 = (bool )0;
#line 653
  ET1310_PhyAutoNeg(etdev, __cil_tmp74);
  }
  {
#line 656
  __cil_tmp75 = etdev->AiForceDpx;
#line 656
  __cil_tmp76 = (unsigned int )__cil_tmp75;
#line 656
  if (__cil_tmp76 != 1U) {
    {
#line 657
    __cil_tmp77 = etdev->wanted_flow;
#line 657
    __cil_tmp78 = (unsigned int )__cil_tmp77;
#line 657
    if (__cil_tmp78 == 1U) {
      {
#line 659
      __cil_tmp79 = (u16 )1;
#line 659
      __cil_tmp80 = (u16 )4;
#line 659
      __cil_tmp81 = (u16 )11;
#line 659
      __cil_tmp82 = (u8 *)0;
#line 659
      ET1310_PhyAccessMiBit(etdev, __cil_tmp79, __cil_tmp80, __cil_tmp81, __cil_tmp82);
      }
    } else {
      {
#line 657
      __cil_tmp83 = etdev->wanted_flow;
#line 657
      __cil_tmp84 = (unsigned int )__cil_tmp83;
#line 657
      if (__cil_tmp84 == 0U) {
        {
#line 659
        __cil_tmp85 = (u16 )1;
#line 659
        __cil_tmp86 = (u16 )4;
#line 659
        __cil_tmp87 = (u16 )11;
#line 659
        __cil_tmp88 = (u8 *)0;
#line 659
        ET1310_PhyAccessMiBit(etdev, __cil_tmp85, __cil_tmp86, __cil_tmp87, __cil_tmp88);
        }
      } else {
        {
#line 662
        __cil_tmp89 = (u16 )0;
#line 662
        __cil_tmp90 = (u16 )4;
#line 662
        __cil_tmp91 = (u16 )11;
#line 662
        __cil_tmp92 = (u8 *)0;
#line 662
        ET1310_PhyAccessMiBit(etdev, __cil_tmp89, __cil_tmp90, __cil_tmp91, __cil_tmp92);
        }
      }
      }
    }
    }
    {
#line 665
    __cil_tmp93 = etdev->wanted_flow;
#line 665
    __cil_tmp94 = (unsigned int )__cil_tmp93;
#line 665
    if (__cil_tmp94 == 0U) {
      {
#line 666
      __cil_tmp95 = (u16 )1;
#line 666
      __cil_tmp96 = (u16 )4;
#line 666
      __cil_tmp97 = (u16 )10;
#line 666
      __cil_tmp98 = (u8 *)0;
#line 666
      ET1310_PhyAccessMiBit(etdev, __cil_tmp95, __cil_tmp96, __cil_tmp97, __cil_tmp98);
      }
    } else {
      {
#line 669
      __cil_tmp99 = (u16 )0;
#line 669
      __cil_tmp100 = (u16 )4;
#line 669
      __cil_tmp101 = (u16 )10;
#line 669
      __cil_tmp102 = (u8 *)0;
#line 669
      ET1310_PhyAccessMiBit(etdev, __cil_tmp99, __cil_tmp100, __cil_tmp101, __cil_tmp102);
      }
    }
    }
  } else {
    {
#line 672
    __cil_tmp103 = (u16 )0;
#line 672
    __cil_tmp104 = (u16 )4;
#line 672
    __cil_tmp105 = (u16 )10;
#line 672
    __cil_tmp106 = (u8 *)0;
#line 672
    ET1310_PhyAccessMiBit(etdev, __cil_tmp103, __cil_tmp104, __cil_tmp105, __cil_tmp106);
#line 673
    __cil_tmp107 = (u16 )0;
#line 673
    __cil_tmp108 = (u16 )4;
#line 673
    __cil_tmp109 = (u16 )11;
#line 673
    __cil_tmp110 = (u8 *)0;
#line 673
    ET1310_PhyAccessMiBit(etdev, __cil_tmp107, __cil_tmp108, __cil_tmp109, __cil_tmp110);
    }
  }
  }
  {
#line 675
  __cil_tmp111 = (bool )1;
#line 675
  ET1310_PhyPowerDown(etdev, __cil_tmp111);
  }
  {
#line 677
  __cil_tmp112 = etdev->AiForceSpeed;
#line 677
  __cil_tmp113 = (int )__cil_tmp112;
#line 677
  if (__cil_tmp113 == 10) {
#line 677
    goto case_10;
  } else {
    {
#line 701
    __cil_tmp114 = etdev->AiForceSpeed;
#line 701
    __cil_tmp115 = (int )__cil_tmp114;
#line 701
    if (__cil_tmp115 == 100) {
#line 701
      goto case_100;
    } else {
      {
#line 727
      __cil_tmp116 = etdev->AiForceSpeed;
#line 727
      __cil_tmp117 = (int )__cil_tmp116;
#line 727
      if (__cil_tmp117 == 1000) {
#line 727
        goto case_1000;
      } else
#line 676
      if (0) {
        case_10: 
        {
#line 679
        __cil_tmp118 = (u16 )0;
#line 679
        ET1310_PhyAdvertise1000BaseT(etdev, __cil_tmp118);
#line 680
        __cil_tmp119 = (u16 )0;
#line 680
        ET1310_PhyAdvertise100BaseT(etdev, __cil_tmp119);
        }
        {
#line 681
        __cil_tmp120 = etdev->AiForceDpx;
#line 681
        __cil_tmp121 = (unsigned int )__cil_tmp120;
#line 681
        if (__cil_tmp121 == 1U) {
          {
#line 683
          __cil_tmp122 = (u16 )2;
#line 683
          ET1310_PhyAdvertise10BaseT(etdev, __cil_tmp122);
          }
        } else {
          {
#line 685
          __cil_tmp123 = etdev->AiForceDpx;
#line 685
          __cil_tmp124 = (unsigned int )__cil_tmp123;
#line 685
          if (__cil_tmp124 == 2U) {
            {
#line 687
            __cil_tmp125 = (u16 )1;
#line 687
            ET1310_PhyAdvertise10BaseT(etdev, __cil_tmp125);
            }
          } else {
            {
#line 691
            __cil_tmp126 = (bool )0;
#line 691
            ET1310_PhyAutoNeg(etdev, __cil_tmp126);
#line 693
            __cil_tmp127 = (u16 )0;
#line 693
            ET1310_PhyAdvertise10BaseT(etdev, __cil_tmp127);
#line 696
            __cil_tmp128 = (u16 )0;
#line 696
            ET1310_PhySpeedSelect(etdev, __cil_tmp128);
#line 698
            __cil_tmp129 = (u16 )1;
#line 698
            ET1310_PhyDuplexMode(etdev, __cil_tmp129);
            }
          }
          }
        }
        }
#line 700
        goto ldv_35800;
        case_100: 
        {
#line 703
        __cil_tmp130 = (u16 )0;
#line 703
        ET1310_PhyAdvertise1000BaseT(etdev, __cil_tmp130);
#line 704
        __cil_tmp131 = (u16 )0;
#line 704
        ET1310_PhyAdvertise10BaseT(etdev, __cil_tmp131);
        }
        {
#line 705
        __cil_tmp132 = etdev->AiForceDpx;
#line 705
        __cil_tmp133 = (unsigned int )__cil_tmp132;
#line 705
        if (__cil_tmp133 == 1U) {
          {
#line 707
          __cil_tmp134 = (u16 )2;
#line 707
          ET1310_PhyAdvertise100BaseT(etdev, __cil_tmp134);
#line 710
          __cil_tmp135 = (u16 )1;
#line 710
          ET1310_PhySpeedSelect(etdev, __cil_tmp135);
          }
        } else {
          {
#line 711
          __cil_tmp136 = etdev->AiForceDpx;
#line 711
          __cil_tmp137 = (unsigned int )__cil_tmp136;
#line 711
          if (__cil_tmp137 == 2U) {
            {
#line 713
            __cil_tmp138 = (u16 )1;
#line 713
            ET1310_PhyAdvertise100BaseT(etdev, __cil_tmp138);
            }
          } else {
            {
#line 717
            __cil_tmp139 = (bool )0;
#line 717
            ET1310_PhyAutoNeg(etdev, __cil_tmp139);
#line 719
            __cil_tmp140 = (u16 )0;
#line 719
            ET1310_PhyAdvertise100BaseT(etdev, __cil_tmp140);
#line 722
            __cil_tmp141 = (u16 )1;
#line 722
            ET1310_PhySpeedSelect(etdev, __cil_tmp141);
#line 724
            __cil_tmp142 = (u16 )1;
#line 724
            ET1310_PhyDuplexMode(etdev, __cil_tmp142);
            }
          }
          }
        }
        }
#line 726
        goto ldv_35800;
        case_1000: 
        {
#line 729
        __cil_tmp143 = (u16 )0;
#line 729
        ET1310_PhyAdvertise100BaseT(etdev, __cil_tmp143);
#line 730
        __cil_tmp144 = (u16 )0;
#line 730
        ET1310_PhyAdvertise10BaseT(etdev, __cil_tmp144);
#line 732
        __cil_tmp145 = (u16 )1;
#line 732
        ET1310_PhyAdvertise1000BaseT(etdev, __cil_tmp145);
        }
#line 733
        goto ldv_35800;
      } else {

      }
      }
    }
    }
  }
  }
  ldv_35800: 
  {
#line 735
  __cil_tmp146 = (bool )0;
#line 735
  ET1310_PhyPowerDown(etdev, __cil_tmp146);
  }
#line 736
  return;
}
}
#line 738 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
void et131x_Mii_check(struct et131x_adapter *etdev , MI_BMSR_t bmsr , MI_BMSR_t bmsr_ints ) 
{ u8 link_status ;
  u32 autoneg_status ;
  u32 speed ;
  u32 duplex ;
  u32 mdi_mdix ;
  u32 masterslave ;
  u32 polarity ;
  unsigned long flags ;
  raw_spinlock_t *tmp ;
  u16 Register18 ;
  raw_spinlock_t *tmp___0 ;
  u16 Register18___0 ;
  unsigned char *__cil_tmp16 ;
  unsigned char *__cil_tmp17 ;
  unsigned char __cil_tmp18 ;
  unsigned int __cil_tmp19 ;
  unsigned char *__cil_tmp20 ;
  unsigned char *__cil_tmp21 ;
  unsigned char __cil_tmp22 ;
  unsigned int __cil_tmp23 ;
  spinlock_t *__cil_tmp24 ;
  u32 __cil_tmp25 ;
  spinlock_t *__cil_tmp26 ;
  struct net_device *__cil_tmp27 ;
  struct pci_dev *__cil_tmp28 ;
  struct device *__cil_tmp29 ;
  struct device  const  *__cil_tmp30 ;
  u32 __cil_tmp31 ;
  u8 __cil_tmp32 ;
  int __cil_tmp33 ;
  u8 __cil_tmp34 ;
  u8 __cil_tmp35 ;
  u8 __cil_tmp36 ;
  unsigned int __cil_tmp37 ;
  unsigned int __cil_tmp38 ;
  int __cil_tmp39 ;
  u16 __cil_tmp40 ;
  u8 __cil_tmp41 ;
  unsigned int __cil_tmp42 ;
  unsigned int __cil_tmp43 ;
  int __cil_tmp44 ;
  u16 __cil_tmp45 ;
  u8 __cil_tmp46 ;
  unsigned int __cil_tmp47 ;
  unsigned int __cil_tmp48 ;
  int __cil_tmp49 ;
  u16 __cil_tmp50 ;
  u8 __cil_tmp51 ;
  int __cil_tmp52 ;
  u16 __cil_tmp53 ;
  u32 __cil_tmp54 ;
  unsigned int __cil_tmp55 ;
  spinlock_t *__cil_tmp56 ;
  spinlock_t *__cil_tmp57 ;
  struct net_device *__cil_tmp58 ;
  enum ldv_25441 __cil_tmp59 ;
  unsigned int __cil_tmp60 ;
  spinlock_t *__cil_tmp61 ;
  spinlock_t *__cil_tmp62 ;
  struct net_device *__cil_tmp63 ;
  u8 __cil_tmp64 ;
  unsigned int __cil_tmp65 ;
  unsigned char *__cil_tmp66 ;
  unsigned char *__cil_tmp67 ;
  unsigned char __cil_tmp68 ;
  unsigned int __cil_tmp69 ;
  u8 __cil_tmp70 ;
  unsigned int __cil_tmp71 ;
  unsigned char *__cil_tmp72 ;
  unsigned char *__cil_tmp73 ;
  unsigned char __cil_tmp74 ;
  unsigned int __cil_tmp75 ;
  unsigned char *__cil_tmp76 ;
  unsigned char *__cil_tmp77 ;
  unsigned char __cil_tmp78 ;
  unsigned int __cil_tmp79 ;
  u8 __cil_tmp80 ;
  unsigned int __cil_tmp81 ;
  u32 __cil_tmp82 ;
  u8 __cil_tmp83 ;
  int __cil_tmp84 ;
  u8 __cil_tmp85 ;
  u8 __cil_tmp86 ;
  u8 __cil_tmp87 ;
  unsigned int __cil_tmp88 ;
  unsigned int __cil_tmp89 ;
  int __cil_tmp90 ;
  u16 __cil_tmp91 ;
  u8 __cil_tmp92 ;
  unsigned int __cil_tmp93 ;
  unsigned int __cil_tmp94 ;
  int __cil_tmp95 ;
  u16 __cil_tmp96 ;
  u8 __cil_tmp97 ;
  unsigned int __cil_tmp98 ;
  unsigned int __cil_tmp99 ;
  int __cil_tmp100 ;
  u16 __cil_tmp101 ;
  u8 __cil_tmp102 ;
  int __cil_tmp103 ;
  u16 __cil_tmp104 ;
  u32 __cil_tmp105 ;
  u32 __cil_tmp106 ;
  u16 __cil_tmp107 ;
  u16 __cil_tmp108 ;
  u16 __cil_tmp109 ;

  {
  {
#line 750
  __cil_tmp16 = (unsigned char *)(& bmsr_ints);
#line 750
  __cil_tmp17 = __cil_tmp16 + 0UL;
#line 750
  __cil_tmp18 = *__cil_tmp17;
#line 750
  __cil_tmp19 = (unsigned int )__cil_tmp18;
#line 750
  if (__cil_tmp19 != 0U) {
    {
#line 751
    __cil_tmp20 = (unsigned char *)(& bmsr);
#line 751
    __cil_tmp21 = __cil_tmp20 + 0UL;
#line 751
    __cil_tmp22 = *__cil_tmp21;
#line 751
    __cil_tmp23 = (unsigned int )__cil_tmp22;
#line 751
    if (__cil_tmp23 != 0U) {
      {
#line 752
      etdev->boot_coma = (u8 )20U;
#line 757
      __cil_tmp24 = & etdev->Lock;
#line 757
      tmp = spinlock_check(__cil_tmp24);
#line 757
      flags = _raw_spin_lock_irqsave(tmp);
#line 759
      etdev->MediaState = (enum ldv_25441 )1;
#line 760
      __cil_tmp25 = etdev->Flags;
#line 760
      etdev->Flags = __cil_tmp25 & 3758096383U;
#line 762
      __cil_tmp26 = & etdev->Lock;
#line 762
      spin_unlock_irqrestore(__cil_tmp26, flags);
#line 764
      __cil_tmp27 = etdev->netdev;
#line 764
      netif_carrier_on(__cil_tmp27);
      }
    } else {
      {
#line 766
      __cil_tmp28 = etdev->pdev;
#line 766
      __cil_tmp29 = & __cil_tmp28->dev;
#line 766
      __cil_tmp30 = (struct device  const  *)__cil_tmp29;
#line 766
      dev_warn(__cil_tmp30, "Link down - cable problem ?\n");
      }
      {
#line 769
      __cil_tmp31 = etdev->linkspeed;
#line 769
      if (__cil_tmp31 == 0U) {
        {
#line 777
        __cil_tmp32 = etdev->Stats.xcvr_addr;
#line 777
        __cil_tmp33 = (int )__cil_tmp32;
#line 777
        __cil_tmp34 = (u8 )__cil_tmp33;
#line 777
        __cil_tmp35 = (u8 )18;
#line 777
        PhyMiRead(etdev, __cil_tmp34, __cil_tmp35, & Register18);
#line 778
        __cil_tmp36 = (u8 )18;
#line 778
        __cil_tmp37 = (unsigned int )Register18;
#line 778
        __cil_tmp38 = __cil_tmp37 | 4U;
#line 778
        __cil_tmp39 = (int )__cil_tmp38;
#line 778
        __cil_tmp40 = (u16 )__cil_tmp39;
#line 778
        MiWrite(etdev, __cil_tmp36, __cil_tmp40);
#line 779
        __cil_tmp41 = (u8 )16;
#line 779
        __cil_tmp42 = (unsigned int )Register18;
#line 779
        __cil_tmp43 = __cil_tmp42 | 33794U;
#line 779
        __cil_tmp44 = (int )__cil_tmp43;
#line 779
        __cil_tmp45 = (u16 )__cil_tmp44;
#line 779
        MiWrite(etdev, __cil_tmp41, __cil_tmp45);
#line 780
        __cil_tmp46 = (u8 )17;
#line 780
        __cil_tmp47 = (unsigned int )Register18;
#line 780
        __cil_tmp48 = __cil_tmp47 | 511U;
#line 780
        __cil_tmp49 = (int )__cil_tmp48;
#line 780
        __cil_tmp50 = (u16 )__cil_tmp49;
#line 780
        MiWrite(etdev, __cil_tmp46, __cil_tmp50);
#line 781
        __cil_tmp51 = (u8 )18;
#line 781
        __cil_tmp52 = (int )Register18;
#line 781
        __cil_tmp53 = (u16 )__cil_tmp52;
#line 781
        MiWrite(etdev, __cil_tmp51, __cil_tmp53);
        }
      } else {

      }
      }
      {
#line 790
      __cil_tmp54 = etdev->Flags;
#line 790
      __cil_tmp55 = __cil_tmp54 & 536870912U;
#line 790
      if (__cil_tmp55 == 0U) {
        {
#line 792
        __cil_tmp56 = & etdev->Lock;
#line 792
        tmp___0 = spinlock_check(__cil_tmp56);
#line 792
        flags = _raw_spin_lock_irqsave(tmp___0);
#line 793
        etdev->MediaState = (enum ldv_25441 )2;
#line 795
        __cil_tmp57 = & etdev->Lock;
#line 795
        spin_unlock_irqrestore(__cil_tmp57, flags);
#line 798
        __cil_tmp58 = etdev->netdev;
#line 798
        netif_carrier_off(__cil_tmp58);
        }
      } else {
        {
#line 790
        __cil_tmp59 = etdev->MediaState;
#line 790
        __cil_tmp60 = (unsigned int )__cil_tmp59;
#line 790
        if (__cil_tmp60 == 2U) {
          {
#line 792
          __cil_tmp61 = & etdev->Lock;
#line 792
          tmp___0 = spinlock_check(__cil_tmp61);
#line 792
          flags = _raw_spin_lock_irqsave(tmp___0);
#line 793
          etdev->MediaState = (enum ldv_25441 )2;
#line 795
          __cil_tmp62 = & etdev->Lock;
#line 795
          spin_unlock_irqrestore(__cil_tmp62, flags);
#line 798
          __cil_tmp63 = etdev->netdev;
#line 798
          netif_carrier_off(__cil_tmp63);
          }
        } else {

        }
        }
      }
      }
      {
#line 801
      etdev->linkspeed = 0U;
#line 802
      etdev->duplex_mode = 0U;
#line 805
      et131x_free_busy_send_packets(etdev);
#line 808
      et131x_init_send(etdev);
#line 811
      et131x_reset_recv(etdev);
#line 819
      et131x_soft_reset(etdev);
#line 822
      et131x_adapter_setup(etdev);
      }
      {
#line 827
      __cil_tmp64 = etdev->RegistryPhyComa;
#line 827
      __cil_tmp65 = (unsigned int )__cil_tmp64;
#line 827
      if (__cil_tmp65 == 1U) {
        {
#line 828
        EnablePhyComa(etdev);
        }
      } else {

      }
      }
    }
    }
  } else {

  }
  }
  {
#line 832
  __cil_tmp66 = (unsigned char *)(& bmsr_ints);
#line 832
  __cil_tmp67 = __cil_tmp66 + 0UL;
#line 832
  __cil_tmp68 = *__cil_tmp67;
#line 832
  __cil_tmp69 = (unsigned int )__cil_tmp68;
#line 832
  if (__cil_tmp69 != 0U) {
#line 832
    goto _L___0;
  } else {
    {
#line 832
    __cil_tmp70 = etdev->AiForceDpx;
#line 832
    __cil_tmp71 = (unsigned int )__cil_tmp70;
#line 832
    if (__cil_tmp71 == 3U) {
      {
#line 832
      __cil_tmp72 = (unsigned char *)(& bmsr_ints);
#line 832
      __cil_tmp73 = __cil_tmp72 + 0UL;
#line 832
      __cil_tmp74 = *__cil_tmp73;
#line 832
      __cil_tmp75 = (unsigned int )__cil_tmp74;
#line 832
      if (__cil_tmp75 != 0U) {
        _L___0: 
        {
#line 834
        __cil_tmp76 = (unsigned char *)(& bmsr);
#line 834
        __cil_tmp77 = __cil_tmp76 + 0UL;
#line 834
        __cil_tmp78 = *__cil_tmp77;
#line 834
        __cil_tmp79 = (unsigned int )__cil_tmp78;
#line 834
        if (__cil_tmp79 != 0U) {
#line 834
          goto _L;
        } else {
          {
#line 834
          __cil_tmp80 = etdev->AiForceDpx;
#line 834
          __cil_tmp81 = (unsigned int )__cil_tmp80;
#line 834
          if (__cil_tmp81 == 3U) {
            _L: 
            {
#line 835
            ET1310_PhyLinkStatus(etdev, & link_status, & autoneg_status, & speed,
                                 & duplex, & mdi_mdix, & masterslave, & polarity);
#line 840
            etdev->linkspeed = speed;
#line 841
            etdev->duplex_mode = duplex;
#line 843
            etdev->boot_coma = (u8 )20U;
            }
            {
#line 845
            __cil_tmp82 = etdev->linkspeed;
#line 845
            if (__cil_tmp82 == 0U) {
              {
#line 854
              __cil_tmp83 = etdev->Stats.xcvr_addr;
#line 854
              __cil_tmp84 = (int )__cil_tmp83;
#line 854
              __cil_tmp85 = (u8 )__cil_tmp84;
#line 854
              __cil_tmp86 = (u8 )18;
#line 854
              PhyMiRead(etdev, __cil_tmp85, __cil_tmp86, & Register18___0);
#line 855
              __cil_tmp87 = (u8 )18;
#line 855
              __cil_tmp88 = (unsigned int )Register18___0;
#line 855
              __cil_tmp89 = __cil_tmp88 | 4U;
#line 855
              __cil_tmp90 = (int )__cil_tmp89;
#line 855
              __cil_tmp91 = (u16 )__cil_tmp90;
#line 855
              MiWrite(etdev, __cil_tmp87, __cil_tmp91);
#line 856
              __cil_tmp92 = (u8 )16;
#line 856
              __cil_tmp93 = (unsigned int )Register18___0;
#line 856
              __cil_tmp94 = __cil_tmp93 | 33794U;
#line 856
              __cil_tmp95 = (int )__cil_tmp94;
#line 856
              __cil_tmp96 = (u16 )__cil_tmp95;
#line 856
              MiWrite(etdev, __cil_tmp92, __cil_tmp96);
#line 857
              __cil_tmp97 = (u8 )17;
#line 857
              __cil_tmp98 = (unsigned int )Register18___0;
#line 857
              __cil_tmp99 = __cil_tmp98 | 511U;
#line 857
              __cil_tmp100 = (int )__cil_tmp99;
#line 857
              __cil_tmp101 = (u16 )__cil_tmp100;
#line 857
              MiWrite(etdev, __cil_tmp97, __cil_tmp101);
#line 858
              __cil_tmp102 = (u8 )18;
#line 858
              __cil_tmp103 = (int )Register18___0;
#line 858
              __cil_tmp104 = (u16 )__cil_tmp103;
#line 858
              MiWrite(etdev, __cil_tmp102, __cil_tmp104);
              }
            } else {

            }
            }
            {
#line 861
            ConfigFlowControl(etdev);
            }
            {
#line 863
            __cil_tmp105 = etdev->linkspeed;
#line 863
            if (__cil_tmp105 == 2U) {
              {
#line 863
              __cil_tmp106 = etdev->RegistryJumboPacket;
#line 863
              if (__cil_tmp106 > 2048U) {
                {
#line 865
                __cil_tmp107 = (u16 )22;
#line 865
                __cil_tmp108 = (u16 )53247;
#line 865
                __cil_tmp109 = (u16 )8192;
#line 865
                ET1310_PhyAndOrReg(etdev, __cil_tmp107, __cil_tmp108, __cil_tmp109);
                }
              } else {

              }
              }
            } else {

            }
            }
            {
#line 868
            SetRxDmaTimer(etdev);
#line 869
            ConfigMACRegs2(etdev);
            }
          } else {

          }
          }
        }
        }
      } else {

      }
      }
    } else {

    }
    }
  }
  }
#line 871
  return;
}
}
#line 880 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
static u16 const   ConfigPhy[25U][2U]  = 
#line 880
  { {        (u16 const   )34827U,        (u16 const   )2342U}, 
   {        (u16 const   )34828U,        (u16 const   )2342U}, 
   {        (u16 const   )34829U,        (u16 const   )2342U}, 
   {        (u16 const   )34830U,        (u16 const   )46291U}, 
   {        (u16 const   )34831U,        (u16 const   )46291U}, 
   {        (u16 const   )34832U,        (u16 const   )46291U}, 
   {        (u16 const   )34821U,        (u16 const   )45118U}, 
   {        (u16 const   )34822U,        (u16 const   )45118U}, 
   {        (u16 const   )34823U,        (u16 const   )65280U}, 
   {        (u16 const   )34824U,        (u16 const   )57488U}, 
   {        (u16 const   )34825U,        (u16 const   )57616U}, 
   {        (u16 const   )34826U,        (u16 const   )0U}, 
   {        (u16 const   )12301U,        (u16 const   )1U}, 
   {        (u16 const   )10252U,        (u16 const   )384U}, 
   {        (u16 const   )7201U,        (u16 const   )2U}, 
   {        (u16 const   )14369U,        (u16 const   )6U}, 
   {        (u16 const   )14365U,        (u16 const   )1U}, 
   {        (u16 const   )14366U,        (u16 const   )1U}, 
   {        (u16 const   )14367U,        (u16 const   )1U}, 
   {        (u16 const   )14368U,        (u16 const   )1U}, 
   {        (u16 const   )33794U,        (u16 const   )496U}, 
   {        (u16 const   )32782U,        (u16 const   )20U}, 
   {        (u16 const   )32783U,        (u16 const   )24U}, 
   {        (u16 const   )32784U,        (u16 const   )46U}, 
   {        (u16 const   )0U,        (u16 const   )0U}};
#line 921 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_phy.c.p"
void ET1310_PhyInit(struct et131x_adapter *etdev ) 
{ u16 data ;
  u16 index ;
  struct et131x_adapter *__cil_tmp4 ;
  unsigned long __cil_tmp5 ;
  unsigned long __cil_tmp6 ;
  u8 __cil_tmp7 ;
  int __cil_tmp8 ;
  u8 __cil_tmp9 ;
  u8 __cil_tmp10 ;
  u8 __cil_tmp11 ;
  int __cil_tmp12 ;
  u8 __cil_tmp13 ;
  u8 __cil_tmp14 ;
  u8 __cil_tmp15 ;
  int __cil_tmp16 ;
  u8 __cil_tmp17 ;
  u8 __cil_tmp18 ;
  u8 __cil_tmp19 ;
  u16 __cil_tmp20 ;
  u8 __cil_tmp21 ;
  u16 __cil_tmp22 ;
  u8 __cil_tmp23 ;
  int __cil_tmp24 ;
  u8 __cil_tmp25 ;
  u8 __cil_tmp26 ;
  u8 __cil_tmp27 ;
  u16 __cil_tmp28 ;
  u8 __cil_tmp29 ;
  int __cil_tmp30 ;
  u8 __cil_tmp31 ;
  u8 __cil_tmp32 ;
  u8 __cil_tmp33 ;
  int __cil_tmp34 ;
  u8 __cil_tmp35 ;
  u8 __cil_tmp36 ;
  u8 __cil_tmp37 ;
  int __cil_tmp38 ;
  u8 __cil_tmp39 ;
  u8 __cil_tmp40 ;
  u8 __cil_tmp41 ;
  u16 __cil_tmp42 ;
  u8 __cil_tmp43 ;
  u16 __cil_tmp44 ;
  u8 __cil_tmp45 ;
  int __cil_tmp46 ;
  u8 __cil_tmp47 ;
  u8 __cil_tmp48 ;
  u8 __cil_tmp49 ;
  u16 __cil_tmp50 ;
  u8 __cil_tmp51 ;
  int __cil_tmp52 ;
  u8 __cil_tmp53 ;
  u8 __cil_tmp54 ;
  u8 __cil_tmp55 ;
  int __cil_tmp56 ;
  u8 __cil_tmp57 ;
  u8 __cil_tmp58 ;
  u8 __cil_tmp59 ;
  u16 __cil_tmp60 ;
  u8 __cil_tmp61 ;
  u16 __cil_tmp62 ;
  u8 __cil_tmp63 ;
  int __cil_tmp64 ;
  u16 __cil_tmp65 ;
  u8 __cil_tmp66 ;
  int __cil_tmp67 ;
  u16 __cil_tmp68 ;
  u8 __cil_tmp69 ;
  int __cil_tmp70 ;
  u16 __cil_tmp71 ;
  u8 __cil_tmp72 ;
  int __cil_tmp73 ;
  u8 __cil_tmp74 ;
  u8 __cil_tmp75 ;
  int __cil_tmp76 ;
  int __cil_tmp77 ;
  unsigned short __cil_tmp78 ;
  unsigned int __cil_tmp79 ;
  u8 __cil_tmp80 ;
  int __cil_tmp81 ;
  u8 __cil_tmp82 ;
  u8 __cil_tmp83 ;
  u8 __cil_tmp84 ;
  int __cil_tmp85 ;
  u8 __cil_tmp86 ;
  u8 __cil_tmp87 ;
  u8 __cil_tmp88 ;
  u16 __cil_tmp89 ;
  u8 __cil_tmp90 ;
  u16 __cil_tmp91 ;

  {
  {
#line 925
  __cil_tmp4 = (struct et131x_adapter *)0;
#line 925
  __cil_tmp5 = (unsigned long )__cil_tmp4;
#line 925
  __cil_tmp6 = (unsigned long )etdev;
#line 925
  if (__cil_tmp6 == __cil_tmp5) {
#line 926
    return;
  } else {

  }
  }
  {
#line 929
  __cil_tmp7 = etdev->Stats.xcvr_addr;
#line 929
  __cil_tmp8 = (int )__cil_tmp7;
#line 929
  __cil_tmp9 = (u8 )__cil_tmp8;
#line 929
  __cil_tmp10 = (u8 )2;
#line 929
  PhyMiRead(etdev, __cil_tmp9, __cil_tmp10, & data);
#line 930
  __cil_tmp11 = etdev->Stats.xcvr_addr;
#line 930
  __cil_tmp12 = (int )__cil_tmp11;
#line 930
  __cil_tmp13 = (u8 )__cil_tmp12;
#line 930
  __cil_tmp14 = (u8 )3;
#line 930
  PhyMiRead(etdev, __cil_tmp13, __cil_tmp14, & data);
#line 933
  __cil_tmp15 = etdev->Stats.xcvr_addr;
#line 933
  __cil_tmp16 = (int )__cil_tmp15;
#line 933
  __cil_tmp17 = (u8 )__cil_tmp16;
#line 933
  __cil_tmp18 = (u8 )18;
#line 933
  PhyMiRead(etdev, __cil_tmp17, __cil_tmp18, & data);
#line 934
  __cil_tmp19 = (u8 )18;
#line 934
  __cil_tmp20 = (u16 )6;
#line 934
  MiWrite(etdev, __cil_tmp19, __cil_tmp20);
#line 938
  __cil_tmp21 = (u8 )16;
#line 938
  __cil_tmp22 = (u16 )1026;
#line 938
  MiWrite(etdev, __cil_tmp21, __cil_tmp22);
#line 939
  __cil_tmp23 = etdev->Stats.xcvr_addr;
#line 939
  __cil_tmp24 = (int )__cil_tmp23;
#line 939
  __cil_tmp25 = (u8 )__cil_tmp24;
#line 939
  __cil_tmp26 = (u8 )17;
#line 939
  PhyMiRead(etdev, __cil_tmp25, __cil_tmp26, & data);
#line 942
  __cil_tmp27 = (u8 )18;
#line 942
  __cil_tmp28 = (u16 )2;
#line 942
  MiWrite(etdev, __cil_tmp27, __cil_tmp28);
#line 945
  __cil_tmp29 = etdev->Stats.xcvr_addr;
#line 945
  __cil_tmp30 = (int )__cil_tmp29;
#line 945
  __cil_tmp31 = (u8 )__cil_tmp30;
#line 945
  __cil_tmp32 = (u8 )2;
#line 945
  PhyMiRead(etdev, __cil_tmp31, __cil_tmp32, & data);
#line 946
  __cil_tmp33 = etdev->Stats.xcvr_addr;
#line 946
  __cil_tmp34 = (int )__cil_tmp33;
#line 946
  __cil_tmp35 = (u8 )__cil_tmp34;
#line 946
  __cil_tmp36 = (u8 )3;
#line 946
  PhyMiRead(etdev, __cil_tmp35, __cil_tmp36, & data);
#line 949
  __cil_tmp37 = etdev->Stats.xcvr_addr;
#line 949
  __cil_tmp38 = (int )__cil_tmp37;
#line 949
  __cil_tmp39 = (u8 )__cil_tmp38;
#line 949
  __cil_tmp40 = (u8 )18;
#line 949
  PhyMiRead(etdev, __cil_tmp39, __cil_tmp40, & data);
#line 950
  __cil_tmp41 = (u8 )18;
#line 950
  __cil_tmp42 = (u16 )6;
#line 950
  MiWrite(etdev, __cil_tmp41, __cil_tmp42);
#line 954
  __cil_tmp43 = (u8 )16;
#line 954
  __cil_tmp44 = (u16 )1026;
#line 954
  MiWrite(etdev, __cil_tmp43, __cil_tmp44);
#line 955
  __cil_tmp45 = etdev->Stats.xcvr_addr;
#line 955
  __cil_tmp46 = (int )__cil_tmp45;
#line 955
  __cil_tmp47 = (u8 )__cil_tmp46;
#line 955
  __cil_tmp48 = (u8 )17;
#line 955
  PhyMiRead(etdev, __cil_tmp47, __cil_tmp48, & data);
#line 957
  __cil_tmp49 = (u8 )18;
#line 957
  __cil_tmp50 = (u16 )2;
#line 957
  MiWrite(etdev, __cil_tmp49, __cil_tmp50);
#line 960
  __cil_tmp51 = etdev->Stats.xcvr_addr;
#line 960
  __cil_tmp52 = (int )__cil_tmp51;
#line 960
  __cil_tmp53 = (u8 )__cil_tmp52;
#line 960
  __cil_tmp54 = (u8 )0;
#line 960
  PhyMiRead(etdev, __cil_tmp53, __cil_tmp54, & data);
#line 961
  __cil_tmp55 = etdev->Stats.xcvr_addr;
#line 961
  __cil_tmp56 = (int )__cil_tmp55;
#line 961
  __cil_tmp57 = (u8 )__cil_tmp56;
#line 961
  __cil_tmp58 = (u8 )18;
#line 961
  PhyMiRead(etdev, __cil_tmp57, __cil_tmp58, & data);
#line 962
  __cil_tmp59 = (u8 )0;
#line 962
  __cil_tmp60 = (u16 )6208;
#line 962
  MiWrite(etdev, __cil_tmp59, __cil_tmp60);
#line 964
  __cil_tmp61 = (u8 )18;
#line 964
  __cil_tmp62 = (u16 )7;
#line 964
  MiWrite(etdev, __cil_tmp61, __cil_tmp62);
#line 967
  index = (u16 )0U;
  }
#line 968
  goto ldv_35831;
  ldv_35830: 
  {
#line 970
  __cil_tmp63 = (u8 )16;
#line 970
  __cil_tmp64 = (int )ConfigPhy[(int )index][0];
#line 970
  __cil_tmp65 = (u16 )__cil_tmp64;
#line 970
  MiWrite(etdev, __cil_tmp63, __cil_tmp65);
#line 971
  __cil_tmp66 = (u8 )17;
#line 971
  __cil_tmp67 = (int )ConfigPhy[(int )index][1];
#line 971
  __cil_tmp68 = (u16 )__cil_tmp67;
#line 971
  MiWrite(etdev, __cil_tmp66, __cil_tmp68);
#line 974
  __cil_tmp69 = (u8 )16;
#line 974
  __cil_tmp70 = (int )ConfigPhy[(int )index][0];
#line 974
  __cil_tmp71 = (u16 )__cil_tmp70;
#line 974
  MiWrite(etdev, __cil_tmp69, __cil_tmp71);
#line 975
  __cil_tmp72 = etdev->Stats.xcvr_addr;
#line 975
  __cil_tmp73 = (int )__cil_tmp72;
#line 975
  __cil_tmp74 = (u8 )__cil_tmp73;
#line 975
  __cil_tmp75 = (u8 )17;
#line 975
  PhyMiRead(etdev, __cil_tmp74, __cil_tmp75, & data);
#line 978
  __cil_tmp76 = (int )index;
#line 978
  __cil_tmp77 = __cil_tmp76 + 1;
#line 978
  index = (u16 )__cil_tmp77;
  }
  ldv_35831: ;
  {
#line 968
  __cil_tmp78 = (unsigned short )ConfigPhy[(int )index][0];
#line 968
  __cil_tmp79 = (unsigned int )__cil_tmp78;
#line 968
  if (__cil_tmp79 != 0U) {
#line 969
    goto ldv_35830;
  } else {
#line 971
    goto ldv_35832;
  }
  }
  ldv_35832: 
  {
#line 982
  __cil_tmp80 = etdev->Stats.xcvr_addr;
#line 982
  __cil_tmp81 = (int )__cil_tmp80;
#line 982
  __cil_tmp82 = (u8 )__cil_tmp81;
#line 982
  __cil_tmp83 = (u8 )0;
#line 982
  PhyMiRead(etdev, __cil_tmp82, __cil_tmp83, & data);
#line 983
  __cil_tmp84 = etdev->Stats.xcvr_addr;
#line 983
  __cil_tmp85 = (int )__cil_tmp84;
#line 983
  __cil_tmp86 = (u8 )__cil_tmp85;
#line 983
  __cil_tmp87 = (u8 )18;
#line 983
  PhyMiRead(etdev, __cil_tmp86, __cil_tmp87, & data);
#line 984
  __cil_tmp88 = (u8 )0;
#line 984
  __cil_tmp89 = (u16 )4160;
#line 984
  MiWrite(etdev, __cil_tmp88, __cil_tmp89);
#line 985
  __cil_tmp90 = (u8 )18;
#line 985
  __cil_tmp91 = (u16 )2;
#line 985
  MiWrite(etdev, __cil_tmp90, __cil_tmp91);
  }
#line 986
  return;
}
}
#line 90 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
void DisablePhyComa(struct et131x_adapter *etdev ) ;
#line 116 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_pm.c.p"
void EnablePhyComa(struct et131x_adapter *etdev ) 
{ unsigned long flags ;
  u32 pmcsr ;
  raw_spinlock_t *tmp ;
  ADDRESS_MAP_t *__cil_tmp5 ;
  u32 *__cil_tmp6 ;
  void const volatile   *__cil_tmp7 ;
  spinlock_t *__cil_tmp8 ;
  u32 __cil_tmp9 ;
  spinlock_t *__cil_tmp10 ;
  ADDRESS_MAP_t *__cil_tmp11 ;
  u32 *__cil_tmp12 ;
  void volatile   *__cil_tmp13 ;
  ADDRESS_MAP_t *__cil_tmp14 ;
  u32 *__cil_tmp15 ;
  void volatile   *__cil_tmp16 ;

  {
  {
#line 121
  __cil_tmp5 = etdev->regs;
#line 121
  __cil_tmp6 = & __cil_tmp5->global.pm_csr;
#line 121
  __cil_tmp7 = (void const volatile   *)__cil_tmp6;
#line 121
  pmcsr = readl(__cil_tmp7);
#line 126
  etdev->pdown_speed = etdev->AiForceSpeed;
#line 127
  etdev->pdown_duplex = etdev->AiForceDpx;
#line 130
  __cil_tmp8 = & etdev->send_hw_lock;
#line 130
  tmp = spinlock_check(__cil_tmp8);
#line 130
  flags = _raw_spin_lock_irqsave(tmp);
#line 131
  __cil_tmp9 = etdev->Flags;
#line 131
  etdev->Flags = __cil_tmp9 | 2097152U;
#line 132
  __cil_tmp10 = & etdev->send_hw_lock;
#line 132
  spin_unlock_irqrestore(__cil_tmp10, flags);
#line 137
  pmcsr = pmcsr & 4294967239U;
#line 138
  __cil_tmp11 = etdev->regs;
#line 138
  __cil_tmp12 = & __cil_tmp11->global.pm_csr;
#line 138
  __cil_tmp13 = (void volatile   *)__cil_tmp12;
#line 138
  writel(pmcsr, __cil_tmp13);
#line 141
  pmcsr = pmcsr | 64U;
#line 142
  __cil_tmp14 = etdev->regs;
#line 142
  __cil_tmp15 = & __cil_tmp14->global.pm_csr;
#line 142
  __cil_tmp16 = (void volatile   *)__cil_tmp15;
#line 142
  writel(pmcsr, __cil_tmp16);
  }
#line 143
  return;
}
}
#line 149 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_pm.c.p"
void DisablePhyComa(struct et131x_adapter *etdev ) 
{ u32 pmcsr ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  u32 *__cil_tmp4 ;
  void const volatile   *__cil_tmp5 ;
  ADDRESS_MAP_t *__cil_tmp6 ;
  u32 *__cil_tmp7 ;
  void volatile   *__cil_tmp8 ;
  u32 __cil_tmp9 ;

  {
  {
#line 153
  __cil_tmp3 = etdev->regs;
#line 153
  __cil_tmp4 = & __cil_tmp3->global.pm_csr;
#line 153
  __cil_tmp5 = (void const volatile   *)__cil_tmp4;
#line 153
  pmcsr = readl(__cil_tmp5);
#line 156
  pmcsr = pmcsr | 56U;
#line 157
  pmcsr = pmcsr & 4294967231U;
#line 158
  __cil_tmp6 = etdev->regs;
#line 158
  __cil_tmp7 = & __cil_tmp6->global.pm_csr;
#line 158
  __cil_tmp8 = (void volatile   *)__cil_tmp7;
#line 158
  writel(pmcsr, __cil_tmp8);
#line 163
  etdev->AiForceSpeed = etdev->pdown_speed;
#line 164
  etdev->AiForceDpx = etdev->pdown_duplex;
#line 167
  et131x_init_send(etdev);
#line 170
  et131x_reset_recv(etdev);
#line 176
  et131x_soft_reset(etdev);
#line 179
  et131x_adapter_setup(etdev);
#line 182
  __cil_tmp9 = etdev->Flags;
#line 182
  etdev->Flags = __cil_tmp9 & 4292870143U;
#line 185
  et131x_rx_dma_enable(etdev);
  }
#line 186
  return;
}
}
#line 24 "include/linux/list.h"
__inline static void INIT_LIST_HEAD(struct list_head *list ) 
{ 

  {
#line 26
  list->next = list;
#line 27
  list->prev = list;
#line 28
  return;
}
}
#line 47
extern void __list_add(struct list_head * , struct list_head * , struct list_head * ) ;
#line 74 "include/linux/list.h"
__inline static void list_add_tail(struct list_head *new , struct list_head *head ) 
{ struct list_head *__cil_tmp3 ;

  {
  {
#line 76
  __cil_tmp3 = head->prev;
#line 76
  __list_add(new, __cil_tmp3, head);
  }
#line 77
  return;
}
}
#line 112
extern void list_del(struct list_head * ) ;
#line 186 "include/linux/list.h"
__inline static int list_empty(struct list_head  const  *head ) 
{ unsigned long __cil_tmp2 ;
  struct list_head *__cil_tmp3 ;
  struct list_head  const  *__cil_tmp4 ;
  unsigned long __cil_tmp5 ;

  {
  {
#line 188
  __cil_tmp2 = (unsigned long )head;
#line 188
  __cil_tmp3 = head->next;
#line 188
  __cil_tmp4 = (struct list_head  const  *)__cil_tmp3;
#line 188
  __cil_tmp5 = (unsigned long )__cil_tmp4;
#line 188
  return (__cil_tmp5 == __cil_tmp2);
  }
}
}
#line 101 "include/linux/printk.h"
extern int printk(char const   *  , ...) ;
#line 69 "include/asm-generic/bug.h"
extern void warn_slowpath_null(char const   * , int  ) ;
#line 349 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/paravirt_types.h"
extern struct pv_irq_ops pv_irq_ops ;
#line 55 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/string_64.h"
extern void *memset(void * , int  , size_t  ) ;
#line 60
extern int memcmp(void const   * , void const   * , size_t  ) ;
#line 851 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/paravirt.h"
__inline static unsigned long arch_local_save_flags(void) 
{ unsigned long __ret ;
  unsigned long __edi ;
  unsigned long __esi ;
  unsigned long __edx ;
  unsigned long __ecx ;
  unsigned long __eax ;
  long tmp ;
  void *__cil_tmp8 ;
  unsigned long __cil_tmp9 ;
  unsigned long __cil_tmp10 ;
  int __cil_tmp11 ;
  long __cil_tmp12 ;

  {
  {
#line 853
  __edi = __edi;
#line 853
  __esi = __esi;
#line 853
  __edx = __edx;
#line 853
  __ecx = __ecx;
#line 853
  __eax = __eax;
#line 853
  __cil_tmp8 = (void *)0;
#line 853
  __cil_tmp9 = (unsigned long )__cil_tmp8;
#line 853
  __cil_tmp10 = (unsigned long )pv_irq_ops.save_fl.func;
#line 853
  __cil_tmp11 = __cil_tmp10 == __cil_tmp9;
#line 853
  __cil_tmp12 = (long )__cil_tmp11;
#line 853
  tmp = __builtin_expect(__cil_tmp12, 0L);
  }
#line 853
  if (tmp != 0L) {
#line 853
    __asm__  volatile   ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/paravirt.h"),
                         "i" (853), "i" (12UL));
    ldv_4705: ;
#line 853
    goto ldv_4705;
  } else {

  }
#line 853
  __asm__  volatile   ("771:\n\tcall *%c2;\n772:\n.pushsection .parainstructions,\"a\"\n .balign 8 \n .quad  771b\n  .byte %c1\n  .byte 772b-771b\n  .short %c3\n.popsection\n": "=a" (__eax): [paravirt_typenum] "i" (46UL),
                       [paravirt_opptr] "i" (& pv_irq_ops.save_fl.func), [paravirt_clobber] "i" (1): "memory",
                       "cc");
#line 853
  __ret = __eax;
#line 853
  return (__ret);
}
}
#line 154 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/irqflags.h"
__inline static int arch_irqs_disabled_flags(unsigned long flags ) 
{ unsigned long __cil_tmp2 ;

  {
  {
#line 156
  __cil_tmp2 = flags & 512UL;
#line 156
  return (__cil_tmp2 == 0UL);
  }
}
}
#line 830 "include/linux/rcupdate.h"
extern void kfree(void const   * ) ;
#line 101 "include/linux/slab.h"
extern struct kmem_cache *kmem_cache_create(char const   * , size_t  , size_t  , unsigned long  ,
                                            void (*)(void * ) ) ;
#line 104
extern void kmem_cache_destroy(struct kmem_cache * ) ;
#line 106
extern void kmem_cache_free(struct kmem_cache * , void * ) ;
#line 220 "include/linux/slub_def.h"
extern void *kmem_cache_alloc(struct kmem_cache * , gfp_t  ) ;
#line 221
extern void *__kmalloc(size_t  , gfp_t  ) ;
#line 255 "include/linux/slub_def.h"
__inline static void *kmalloc(size_t size , gfp_t flags ) 
{ void *tmp___2 ;

  {
  {
#line 270
  tmp___2 = __kmalloc(size, flags);
  }
#line 270
  return (tmp___2);
}
}
#line 87 "include/linux/dma-mapping.h"
__inline static int is_device_dma_capable(struct device *dev ) 
{ int tmp ;
  u64 *__cil_tmp3 ;
  unsigned long __cil_tmp4 ;
  u64 *__cil_tmp5 ;
  unsigned long __cil_tmp6 ;
  u64 *__cil_tmp7 ;
  u64 __cil_tmp8 ;

  {
  {
#line 89
  __cil_tmp3 = (u64 *)0;
#line 89
  __cil_tmp4 = (unsigned long )__cil_tmp3;
#line 89
  __cil_tmp5 = dev->dma_mask;
#line 89
  __cil_tmp6 = (unsigned long )__cil_tmp5;
#line 89
  if (__cil_tmp6 != __cil_tmp4) {
    {
#line 89
    __cil_tmp7 = dev->dma_mask;
#line 89
    __cil_tmp8 = *__cil_tmp7;
#line 89
    if (__cil_tmp8 != 0ULL) {
#line 89
      tmp = 1;
    } else {
#line 89
      tmp = 0;
    }
    }
  } else {
#line 89
    tmp = 0;
  }
  }
#line 89
  return (tmp);
}
}
#line 51 "include/linux/dma-debug.h"
extern void debug_dma_alloc_coherent(struct device * , size_t  , dma_addr_t  , void * ) ;
#line 54
extern void debug_dma_free_coherent(struct device * , size_t  , void * , dma_addr_t  ) ;
#line 26 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
extern struct device x86_dma_fallback_dev ;
#line 29
extern struct dma_map_ops *dma_ops ;
#line 31 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
__inline static struct dma_map_ops *get_dma_ops(struct device *dev ) 
{ long tmp ;
  struct device *__cil_tmp3 ;
  unsigned long __cil_tmp4 ;
  unsigned long __cil_tmp5 ;
  int __cil_tmp6 ;
  long __cil_tmp7 ;
  struct dma_map_ops *__cil_tmp8 ;
  unsigned long __cil_tmp9 ;
  struct dma_map_ops *__cil_tmp10 ;
  unsigned long __cil_tmp11 ;

  {
  {
#line 36
  __cil_tmp3 = (struct device *)0;
#line 36
  __cil_tmp4 = (unsigned long )__cil_tmp3;
#line 36
  __cil_tmp5 = (unsigned long )dev;
#line 36
  __cil_tmp6 = __cil_tmp5 == __cil_tmp4;
#line 36
  __cil_tmp7 = (long )__cil_tmp6;
#line 36
  tmp = __builtin_expect(__cil_tmp7, 0L);
  }
#line 36
  if (tmp != 0L) {
#line 37
    return (dma_ops);
  } else {
    {
#line 36
    __cil_tmp8 = (struct dma_map_ops *)0;
#line 36
    __cil_tmp9 = (unsigned long )__cil_tmp8;
#line 36
    __cil_tmp10 = dev->archdata.dma_ops;
#line 36
    __cil_tmp11 = (unsigned long )__cil_tmp10;
#line 36
    if (__cil_tmp11 == __cil_tmp9) {
#line 37
      return (dma_ops);
    } else {
#line 39
      return (dev->archdata.dma_ops);
    }
    }
  }
}
}
#line 89 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
__inline static unsigned long dma_alloc_coherent_mask(struct device *dev , gfp_t gfp ) 
{ unsigned long dma_mask ;
  u64 __cil_tmp4 ;
  int __cil_tmp5 ;

  {
#line 92
  dma_mask = 0UL;
#line 94
  __cil_tmp4 = dev->coherent_dma_mask;
#line 94
  dma_mask = (unsigned long )__cil_tmp4;
#line 95
  if (dma_mask == 0UL) {
    {
#line 96
    __cil_tmp5 = (int )gfp;
#line 96
    if (__cil_tmp5 & 1) {
#line 96
      dma_mask = 16777215UL;
    } else {
#line 96
      dma_mask = 4294967295UL;
    }
    }
  } else {

  }
#line 98
  return (dma_mask);
}
}
#line 101 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
__inline static gfp_t dma_alloc_coherent_gfp_flags(struct device *dev , gfp_t gfp ) 
{ unsigned long dma_mask ;
  unsigned long tmp ;
  unsigned long long __cil_tmp5 ;
  unsigned long long __cil_tmp6 ;
  unsigned int __cil_tmp7 ;

  {
  {
#line 103
  tmp = dma_alloc_coherent_mask(dev, gfp);
#line 103
  dma_mask = tmp;
  }
  {
#line 105
  __cil_tmp5 = (unsigned long long )dma_mask;
#line 105
  if (__cil_tmp5 <= 16777215ULL) {
#line 106
    gfp = gfp | 1U;
  } else {

  }
  }
  {
#line 108
  __cil_tmp6 = (unsigned long long )dma_mask;
#line 108
  if (__cil_tmp6 <= 4294967295ULL) {
    {
#line 108
    __cil_tmp7 = gfp & 1U;
#line 108
    if (__cil_tmp7 == 0U) {
#line 109
      gfp = gfp | 4U;
    } else {

    }
    }
  } else {

  }
  }
#line 111
  return (gfp);
}
}
#line 115 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
__inline static void *dma_alloc_coherent(struct device *dev , size_t size , dma_addr_t *dma_handle ,
                                         gfp_t gfp ) 
{ struct dma_map_ops *ops ;
  struct dma_map_ops *tmp ;
  void *memory ;
  int tmp___0 ;
  gfp_t tmp___1 ;
  struct device *__cil_tmp10 ;
  unsigned long __cil_tmp11 ;
  unsigned long __cil_tmp12 ;
  void *(*__cil_tmp13)(struct device * , size_t  , dma_addr_t * , gfp_t  ) ;
  unsigned long __cil_tmp14 ;
  void *(*__cil_tmp15)(struct device * , size_t  , dma_addr_t * , gfp_t  ) ;
  unsigned long __cil_tmp16 ;
  void *(*__cil_tmp17)(struct device * , size_t  , dma_addr_t * , gfp_t  ) ;
  dma_addr_t __cil_tmp18 ;

  {
  {
#line 118
  tmp = get_dma_ops(dev);
#line 118
  ops = tmp;
#line 121
  gfp = gfp & 4294967288U;
  }
  {
#line 126
  __cil_tmp10 = (struct device *)0;
#line 126
  __cil_tmp11 = (unsigned long )__cil_tmp10;
#line 126
  __cil_tmp12 = (unsigned long )dev;
#line 126
  if (__cil_tmp12 == __cil_tmp11) {
#line 127
    dev = & x86_dma_fallback_dev;
  } else {

  }
  }
  {
#line 129
  tmp___0 = is_device_dma_capable(dev);
  }
#line 129
  if (tmp___0 == 0) {
#line 130
    return ((void *)0);
  } else {

  }
  {
#line 132
  __cil_tmp13 = (void *(*)(struct device * , size_t  , dma_addr_t * , gfp_t  ))0;
#line 132
  __cil_tmp14 = (unsigned long )__cil_tmp13;
#line 132
  __cil_tmp15 = ops->alloc_coherent;
#line 132
  __cil_tmp16 = (unsigned long )__cil_tmp15;
#line 132
  if (__cil_tmp16 == __cil_tmp14) {
#line 133
    return ((void *)0);
  } else {

  }
  }
  {
#line 135
  tmp___1 = dma_alloc_coherent_gfp_flags(dev, gfp);
#line 135
  __cil_tmp17 = ops->alloc_coherent;
#line 135
  memory = (*__cil_tmp17)(dev, size, dma_handle, tmp___1);
#line 137
  __cil_tmp18 = *dma_handle;
#line 137
  debug_dma_alloc_coherent(dev, size, __cil_tmp18, memory);
  }
#line 139
  return (memory);
}
}
#line 142 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
__inline static void dma_free_coherent(struct device *dev , size_t size , void *vaddr ,
                                       dma_addr_t bus ) 
{ struct dma_map_ops *ops ;
  struct dma_map_ops *tmp ;
  int __ret_warn_on ;
  unsigned long _flags ;
  int tmp___0 ;
  long tmp___1 ;
  int __cil_tmp11 ;
  long __cil_tmp12 ;
  int __cil_tmp13 ;
  int __cil_tmp14 ;
  int __cil_tmp15 ;
  long __cil_tmp16 ;
  void (*__cil_tmp17)(struct device * , size_t  , void * , dma_addr_t  ) ;
  unsigned long __cil_tmp18 ;
  void (*__cil_tmp19)(struct device * , size_t  , void * , dma_addr_t  ) ;
  unsigned long __cil_tmp20 ;
  void (*__cil_tmp21)(struct device * , size_t  , void * , dma_addr_t  ) ;

  {
  {
#line 145
  tmp = get_dma_ops(dev);
#line 145
  ops = tmp;
#line 147
  _flags = arch_local_save_flags();
#line 147
  tmp___0 = arch_irqs_disabled_flags(_flags);
#line 147
  __ret_warn_on = tmp___0 != 0;
#line 147
  __cil_tmp11 = __ret_warn_on != 0;
#line 147
  __cil_tmp12 = (long )__cil_tmp11;
#line 147
  tmp___1 = __builtin_expect(__cil_tmp12, 0L);
  }
#line 147
  if (tmp___1 != 0L) {
    {
#line 147
    __cil_tmp13 = (int const   )147;
#line 147
    __cil_tmp14 = (int )__cil_tmp13;
#line 147
    warn_slowpath_null("/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h",
                       __cil_tmp14);
    }
  } else {

  }
  {
#line 147
  __cil_tmp15 = __ret_warn_on != 0;
#line 147
  __cil_tmp16 = (long )__cil_tmp15;
#line 147
  __builtin_expect(__cil_tmp16, 0L);
#line 152
  debug_dma_free_coherent(dev, size, vaddr, bus);
  }
  {
#line 153
  __cil_tmp17 = (void (*)(struct device * , size_t  , void * , dma_addr_t  ))0;
#line 153
  __cil_tmp18 = (unsigned long )__cil_tmp17;
#line 153
  __cil_tmp19 = ops->free_coherent;
#line 153
  __cil_tmp20 = (unsigned long )__cil_tmp19;
#line 153
  if (__cil_tmp20 != __cil_tmp18) {
    {
#line 154
    __cil_tmp21 = ops->free_coherent;
#line 154
    (*__cil_tmp21)(dev, size, vaddr, bus);
    }
  } else {

  }
  }
#line 155
  return;
}
}
#line 16 "include/asm-generic/pci-dma-compat.h"
__inline static void *pci_alloc_consistent(struct pci_dev *hwdev , size_t size , dma_addr_t *dma_handle ) 
{ struct device *tmp ;
  void *tmp___0 ;
  struct pci_dev *__cil_tmp6 ;
  unsigned long __cil_tmp7 ;
  unsigned long __cil_tmp8 ;

  {
  {
#line 19
  __cil_tmp6 = (struct pci_dev *)0;
#line 19
  __cil_tmp7 = (unsigned long )__cil_tmp6;
#line 19
  __cil_tmp8 = (unsigned long )hwdev;
#line 19
  if (__cil_tmp8 != __cil_tmp7) {
#line 19
    tmp = & hwdev->dev;
  } else {
#line 19
    tmp = (struct device *)0;
  }
  }
  {
#line 19
  tmp___0 = dma_alloc_coherent(tmp, size, dma_handle, 32U);
  }
#line 19
  return (tmp___0);
}
}
#line 23 "include/asm-generic/pci-dma-compat.h"
__inline static void pci_free_consistent(struct pci_dev *hwdev , size_t size , void *vaddr ,
                                         dma_addr_t dma_handle ) 
{ struct device *tmp ;
  struct pci_dev *__cil_tmp6 ;
  unsigned long __cil_tmp7 ;
  unsigned long __cil_tmp8 ;

  {
  {
#line 26
  __cil_tmp6 = (struct pci_dev *)0;
#line 26
  __cil_tmp7 = (unsigned long )__cil_tmp6;
#line 26
  __cil_tmp8 = (unsigned long )hwdev;
#line 26
  if (__cil_tmp8 != __cil_tmp7) {
#line 26
    tmp = & hwdev->dev;
  } else {
#line 26
    tmp = (struct device *)0;
  }
  }
  {
#line 26
  dma_free_coherent(tmp, size, vaddr, dma_handle);
  }
#line 27
  return;
}
}
#line 1167 "include/linux/skbuff.h"
extern unsigned char *skb_put(struct sk_buff * , unsigned int  ) ;
#line 1541
extern struct sk_buff *dev_alloc_skb(unsigned int  ) ;
#line 2064 "include/linux/netdevice.h"
extern int netif_rx(struct sk_buff * ) ;
#line 33 "include/linux/etherdevice.h"
extern __be16 eth_type_trans(struct sk_buff * , struct net_device * ) ;
#line 59 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
void et131x_align_allocated_memory(struct et131x_adapter *adapter , unsigned long long *phys_addr ,
                                   unsigned long long *offset , unsigned long long mask ) ;
#line 126
int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter ) ;
#line 127
void et131x_rx_dma_memory_free(struct et131x_adapter *adapter ) ;
#line 132
int et131x_init_recv(struct et131x_adapter *adapter ) ;
#line 134
void ConfigRxDmaRegs(struct et131x_adapter *etdev ) ;
#line 136
void et131x_rx_dma_disable(struct et131x_adapter *etdev ) ;
#line 141
void et131x_handle_recv_interrupt(struct et131x_adapter *etdev ) ;
#line 98 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void nic_return_rfd(struct et131x_adapter *etdev , struct rfd *rfd ) ;
#line 109 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter ) 
{ u32 i ;
  u32 j ;
  u32 bufsize ;
  u32 pktStatRingSize ;
  u32 FBRChunkSize ;
  struct rx_ring *rx_ring ;
  void *tmp ;
  void *tmp___0 ;
  u64 Fbr1Offset ;
  u64 Fbr1TempPa ;
  u32 Fbr1Align ;
  u32 index ;
  u64 Fbr0Offset ;
  u64 Fbr0TempPa ;
  u32 index___0 ;
  void *tmp___1 ;
  u32 __cil_tmp18 ;
  u32 __cil_tmp19 ;
  u32 __cil_tmp20 ;
  u32 __cil_tmp21 ;
  u32 __cil_tmp22 ;
  u32 __cil_tmp23 ;
  struct pci_dev *__cil_tmp24 ;
  size_t __cil_tmp25 ;
  dma_addr_t *__cil_tmp26 ;
  void *__cil_tmp27 ;
  unsigned long __cil_tmp28 ;
  void *__cil_tmp29 ;
  unsigned long __cil_tmp30 ;
  struct pci_dev *__cil_tmp31 ;
  struct device *__cil_tmp32 ;
  struct device  const  *__cil_tmp33 ;
  uint64_t *__cil_tmp34 ;
  uint64_t *__cil_tmp35 ;
  uint64_t __cil_tmp36 ;
  unsigned long __cil_tmp37 ;
  void *__cil_tmp38 ;
  u32 __cil_tmp39 ;
  u32 __cil_tmp40 ;
  struct pci_dev *__cil_tmp41 ;
  size_t __cil_tmp42 ;
  dma_addr_t *__cil_tmp43 ;
  void *__cil_tmp44 ;
  unsigned long __cil_tmp45 ;
  void *__cil_tmp46 ;
  unsigned long __cil_tmp47 ;
  struct pci_dev *__cil_tmp48 ;
  struct device *__cil_tmp49 ;
  struct device  const  *__cil_tmp50 ;
  uint64_t *__cil_tmp51 ;
  uint64_t *__cil_tmp52 ;
  uint64_t __cil_tmp53 ;
  unsigned long __cil_tmp54 ;
  void *__cil_tmp55 ;
  u32 __cil_tmp56 ;
  u32 __cil_tmp57 ;
  u32 __cil_tmp58 ;
  u32 __cil_tmp59 ;
  struct pci_dev *__cil_tmp60 ;
  size_t __cil_tmp61 ;
  unsigned long __cil_tmp62 ;
  dma_addr_t (*__cil_tmp63)[32U] ;
  dma_addr_t *__cil_tmp64 ;
  dma_addr_t *__cil_tmp65 ;
  void *__cil_tmp66 ;
  unsigned long __cil_tmp67 ;
  void *__cil_tmp68 ;
  unsigned long __cil_tmp69 ;
  struct pci_dev *__cil_tmp70 ;
  struct device *__cil_tmp71 ;
  struct device  const  *__cil_tmp72 ;
  u32 __cil_tmp73 ;
  u64 __cil_tmp74 ;
  u32 __cil_tmp75 ;
  struct fbr_lookup *__cil_tmp76 ;
  unsigned long __cil_tmp77 ;
  u32 __cil_tmp78 ;
  u32 __cil_tmp79 ;
  unsigned long __cil_tmp80 ;
  unsigned long __cil_tmp81 ;
  void *__cil_tmp82 ;
  struct fbr_lookup *__cil_tmp83 ;
  u64 __cil_tmp84 ;
  struct fbr_lookup *__cil_tmp85 ;
  u32 __cil_tmp86 ;
  u64 __cil_tmp87 ;
  struct fbr_lookup *__cil_tmp88 ;
  struct fbr_lookup *__cil_tmp89 ;
  struct fbr_lookup *__cil_tmp90 ;
  struct fbr_lookup *__cil_tmp91 ;
  void *__cil_tmp92 ;
  u32 __cil_tmp93 ;
  u32 __cil_tmp94 ;
  u32 __cil_tmp95 ;
  u32 __cil_tmp96 ;
  struct pci_dev *__cil_tmp97 ;
  size_t __cil_tmp98 ;
  unsigned long __cil_tmp99 ;
  dma_addr_t (*__cil_tmp100)[32U] ;
  dma_addr_t *__cil_tmp101 ;
  dma_addr_t *__cil_tmp102 ;
  void *__cil_tmp103 ;
  unsigned long __cil_tmp104 ;
  void *__cil_tmp105 ;
  unsigned long __cil_tmp106 ;
  struct pci_dev *__cil_tmp107 ;
  struct device *__cil_tmp108 ;
  struct device  const  *__cil_tmp109 ;
  u32 __cil_tmp110 ;
  u32 __cil_tmp111 ;
  u64 __cil_tmp112 ;
  u32 __cil_tmp113 ;
  struct fbr_lookup *__cil_tmp114 ;
  unsigned long __cil_tmp115 ;
  u32 __cil_tmp116 ;
  u32 __cil_tmp117 ;
  unsigned long __cil_tmp118 ;
  unsigned long __cil_tmp119 ;
  void *__cil_tmp120 ;
  struct fbr_lookup *__cil_tmp121 ;
  u64 __cil_tmp122 ;
  struct fbr_lookup *__cil_tmp123 ;
  u32 __cil_tmp124 ;
  u64 __cil_tmp125 ;
  struct fbr_lookup *__cil_tmp126 ;
  struct fbr_lookup *__cil_tmp127 ;
  struct fbr_lookup *__cil_tmp128 ;
  struct fbr_lookup *__cil_tmp129 ;
  void *__cil_tmp130 ;
  u32 __cil_tmp131 ;
  u32 __cil_tmp132 ;
  u32 __cil_tmp133 ;
  struct pci_dev *__cil_tmp134 ;
  size_t __cil_tmp135 ;
  dma_addr_t *__cil_tmp136 ;
  void *__cil_tmp137 ;
  unsigned long __cil_tmp138 ;
  void *__cil_tmp139 ;
  unsigned long __cil_tmp140 ;
  struct pci_dev *__cil_tmp141 ;
  struct device *__cil_tmp142 ;
  struct device  const  *__cil_tmp143 ;
  dma_addr_t __cil_tmp144 ;
  unsigned long __cil_tmp145 ;
  struct pci_dev *__cil_tmp146 ;
  dma_addr_t *__cil_tmp147 ;
  struct rx_status_block *__cil_tmp148 ;
  unsigned long __cil_tmp149 ;
  struct rx_status_block *__cil_tmp150 ;
  unsigned long __cil_tmp151 ;
  struct pci_dev *__cil_tmp152 ;
  struct device *__cil_tmp153 ;
  struct device  const  *__cil_tmp154 ;
  dma_addr_t __cil_tmp155 ;
  unsigned long __cil_tmp156 ;
  struct net_device *__cil_tmp157 ;
  char (*__cil_tmp158)[16U] ;
  char const   *__cil_tmp159 ;
  void (*__cil_tmp160)(void * ) ;
  u32 __cil_tmp161 ;
  struct list_head *__cil_tmp162 ;

  {
  {
#line 117
  rx_ring = & adapter->rx_ring;
#line 121
  tmp = kmalloc(32768UL, 208U);
#line 121
  rx_ring->fbr[0] = (struct fbr_lookup *)tmp;
#line 123
  tmp___0 = kmalloc(32768UL, 208U);
#line 123
  rx_ring->fbr[1] = (struct fbr_lookup *)tmp___0;
  }
  {
#line 143
  __cil_tmp18 = adapter->RegistryJumboPacket;
#line 143
  if (__cil_tmp18 <= 2047U) {
#line 145
    rx_ring->Fbr0BufferSize = 256U;
#line 146
    rx_ring->Fbr0NumEntries = 512U;
#line 148
    rx_ring->Fbr1BufferSize = 2048U;
#line 149
    rx_ring->Fbr1NumEntries = 512U;
  } else {
    {
#line 150
    __cil_tmp19 = adapter->RegistryJumboPacket;
#line 150
    if (__cil_tmp19 <= 4095U) {
#line 152
      rx_ring->Fbr0BufferSize = 512U;
#line 153
      rx_ring->Fbr0NumEntries = 1024U;
#line 155
      rx_ring->Fbr1BufferSize = 4096U;
#line 156
      rx_ring->Fbr1NumEntries = 512U;
    } else {
#line 159
      rx_ring->Fbr0BufferSize = 1024U;
#line 160
      rx_ring->Fbr0NumEntries = 768U;
#line 162
      rx_ring->Fbr1BufferSize = 16384U;
#line 163
      rx_ring->Fbr1NumEntries = 128U;
    }
    }
  }
  }
  {
#line 167
  __cil_tmp20 = adapter->rx_ring.Fbr1NumEntries;
#line 167
  __cil_tmp21 = adapter->rx_ring.Fbr0NumEntries;
#line 167
  adapter->rx_ring.PsrNumEntries = __cil_tmp21 + __cil_tmp20;
#line 174
  __cil_tmp22 = rx_ring->Fbr1NumEntries;
#line 174
  __cil_tmp23 = __cil_tmp22 * 12U;
#line 174
  bufsize = __cil_tmp23 + 4095U;
#line 175
  __cil_tmp24 = adapter->pdev;
#line 175
  __cil_tmp25 = (size_t )bufsize;
#line 175
  __cil_tmp26 = & rx_ring->pFbr1RingPa;
#line 175
  rx_ring->pFbr1RingVa = pci_alloc_consistent(__cil_tmp24, __cil_tmp25, __cil_tmp26);
  }
  {
#line 178
  __cil_tmp27 = (void *)0;
#line 178
  __cil_tmp28 = (unsigned long )__cil_tmp27;
#line 178
  __cil_tmp29 = rx_ring->pFbr1RingVa;
#line 178
  __cil_tmp30 = (unsigned long )__cil_tmp29;
#line 178
  if (__cil_tmp30 == __cil_tmp28) {
    {
#line 179
    __cil_tmp31 = adapter->pdev;
#line 179
    __cil_tmp32 = & __cil_tmp31->dev;
#line 179
    __cil_tmp33 = (struct device  const  *)__cil_tmp32;
#line 179
    dev_err(__cil_tmp33, "Cannot alloc memory for Free Buffer Ring 1\n");
    }
#line 181
    return (-12);
  } else {

  }
  }
  {
#line 191
  rx_ring->Fbr1Realpa = rx_ring->pFbr1RingPa;
#line 194
  __cil_tmp34 = & rx_ring->Fbr1Realpa;
#line 194
  __cil_tmp35 = & rx_ring->Fbr1offset;
#line 194
  et131x_align_allocated_memory(adapter, __cil_tmp34, __cil_tmp35, 4095ULL);
#line 198
  __cil_tmp36 = rx_ring->Fbr1offset;
#line 198
  __cil_tmp37 = (unsigned long )__cil_tmp36;
#line 198
  __cil_tmp38 = rx_ring->pFbr1RingVa;
#line 198
  rx_ring->pFbr1RingVa = __cil_tmp38 + __cil_tmp37;
#line 203
  __cil_tmp39 = rx_ring->Fbr0NumEntries;
#line 203
  __cil_tmp40 = __cil_tmp39 * 12U;
#line 203
  bufsize = __cil_tmp40 + 4095U;
#line 204
  __cil_tmp41 = adapter->pdev;
#line 204
  __cil_tmp42 = (size_t )bufsize;
#line 204
  __cil_tmp43 = & rx_ring->pFbr0RingPa;
#line 204
  rx_ring->pFbr0RingVa = pci_alloc_consistent(__cil_tmp41, __cil_tmp42, __cil_tmp43);
  }
  {
#line 207
  __cil_tmp44 = (void *)0;
#line 207
  __cil_tmp45 = (unsigned long )__cil_tmp44;
#line 207
  __cil_tmp46 = rx_ring->pFbr0RingVa;
#line 207
  __cil_tmp47 = (unsigned long )__cil_tmp46;
#line 207
  if (__cil_tmp47 == __cil_tmp45) {
    {
#line 208
    __cil_tmp48 = adapter->pdev;
#line 208
    __cil_tmp49 = & __cil_tmp48->dev;
#line 208
    __cil_tmp50 = (struct device  const  *)__cil_tmp49;
#line 208
    dev_err(__cil_tmp50, "Cannot alloc memory for Free Buffer Ring 0\n");
    }
#line 210
    return (-12);
  } else {

  }
  }
  {
#line 220
  rx_ring->Fbr0Realpa = rx_ring->pFbr0RingPa;
#line 223
  __cil_tmp51 = & rx_ring->Fbr0Realpa;
#line 223
  __cil_tmp52 = & rx_ring->Fbr0offset;
#line 223
  et131x_align_allocated_memory(adapter, __cil_tmp51, __cil_tmp52, 4095ULL);
#line 227
  __cil_tmp53 = rx_ring->Fbr0offset;
#line 227
  __cil_tmp54 = (unsigned long )__cil_tmp53;
#line 227
  __cil_tmp55 = rx_ring->pFbr0RingVa;
#line 227
  rx_ring->pFbr0RingVa = __cil_tmp55 + __cil_tmp54;
#line 231
  i = 0U;
  }
#line 231
  goto ldv_35677;
  ldv_35676: ;
  {
#line 244
  __cil_tmp56 = rx_ring->Fbr1BufferSize;
#line 244
  if (__cil_tmp56 > 4096U) {
#line 245
    Fbr1Align = 4096U;
  } else {
#line 247
    Fbr1Align = rx_ring->Fbr1BufferSize;
  }
  }
  {
#line 249
  __cil_tmp57 = rx_ring->Fbr1BufferSize;
#line 249
  __cil_tmp58 = __cil_tmp57 * 32U;
#line 249
  __cil_tmp59 = __cil_tmp58 + Fbr1Align;
#line 249
  FBRChunkSize = __cil_tmp59 - 1U;
#line 251
  __cil_tmp60 = adapter->pdev;
#line 251
  __cil_tmp61 = (size_t )FBRChunkSize;
#line 251
  __cil_tmp62 = (unsigned long )i;
#line 251
  __cil_tmp63 = & rx_ring->Fbr1MemPa;
#line 251
  __cil_tmp64 = (dma_addr_t *)__cil_tmp63;
#line 251
  __cil_tmp65 = __cil_tmp64 + __cil_tmp62;
#line 251
  rx_ring->Fbr1MemVa[i] = pci_alloc_consistent(__cil_tmp60, __cil_tmp61, __cil_tmp65);
  }
  {
#line 255
  __cil_tmp66 = (void *)0;
#line 255
  __cil_tmp67 = (unsigned long )__cil_tmp66;
#line 255
  __cil_tmp68 = rx_ring->Fbr1MemVa[i];
#line 255
  __cil_tmp69 = (unsigned long )__cil_tmp68;
#line 255
  if (__cil_tmp69 == __cil_tmp67) {
    {
#line 256
    __cil_tmp70 = adapter->pdev;
#line 256
    __cil_tmp71 = & __cil_tmp70->dev;
#line 256
    __cil_tmp72 = (struct device  const  *)__cil_tmp71;
#line 256
    dev_err(__cil_tmp72, "Could not alloc memory\n");
    }
#line 258
    return (-12);
  } else {

  }
  }
  {
#line 262
  Fbr1TempPa = rx_ring->Fbr1MemPa[i];
#line 264
  __cil_tmp73 = Fbr1Align - 1U;
#line 264
  __cil_tmp74 = (u64 )__cil_tmp73;
#line 264
  et131x_align_allocated_memory(adapter, & Fbr1TempPa, & Fbr1Offset, __cil_tmp74);
#line 268
  j = 0U;
  }
#line 268
  goto ldv_35674;
  ldv_35673: 
#line 269
  __cil_tmp75 = i * 32U;
#line 269
  index = __cil_tmp75 + j;
#line 274
  __cil_tmp76 = rx_ring->fbr[1];
#line 274
  __cil_tmp77 = (unsigned long )Fbr1Offset;
#line 274
  __cil_tmp78 = rx_ring->Fbr1BufferSize;
#line 274
  __cil_tmp79 = __cil_tmp78 * j;
#line 274
  __cil_tmp80 = (unsigned long )__cil_tmp79;
#line 274
  __cil_tmp81 = __cil_tmp80 + __cil_tmp77;
#line 274
  __cil_tmp82 = rx_ring->Fbr1MemVa[i];
#line 274
  __cil_tmp76->virt[index] = __cil_tmp82 + __cil_tmp81;
#line 281
  __cil_tmp83 = rx_ring->fbr[1];
#line 281
  __cil_tmp84 = Fbr1TempPa >> 32;
#line 281
  __cil_tmp83->bus_high[index] = (unsigned int )__cil_tmp84;
#line 283
  __cil_tmp85 = rx_ring->fbr[1];
#line 283
  __cil_tmp85->bus_low[index] = (unsigned int )Fbr1TempPa;
#line 285
  __cil_tmp86 = rx_ring->Fbr1BufferSize;
#line 285
  __cil_tmp87 = (u64 )__cil_tmp86;
#line 285
  Fbr1TempPa = __cil_tmp87 + Fbr1TempPa;
#line 287
  __cil_tmp88 = rx_ring->fbr[1];
#line 287
  __cil_tmp89 = rx_ring->fbr[1];
#line 287
  __cil_tmp88->buffer1[index] = __cil_tmp89->virt[index];
#line 289
  __cil_tmp90 = rx_ring->fbr[1];
#line 289
  __cil_tmp91 = rx_ring->fbr[1];
#line 289
  __cil_tmp92 = __cil_tmp91->virt[index];
#line 289
  __cil_tmp90->buffer2[index] = __cil_tmp92 + 1152921504606846972UL;
#line 268
  j = j + 1U;
  ldv_35674: ;
#line 268
  if (j <= 31U) {
#line 269
    goto ldv_35673;
  } else {
#line 271
    goto ldv_35675;
  }
  ldv_35675: 
#line 232
  i = i + 1U;
  ldv_35677: ;
  {
#line 231
  __cil_tmp93 = rx_ring->Fbr1NumEntries;
#line 231
  __cil_tmp94 = __cil_tmp93 / 32U;
#line 231
  if (__cil_tmp94 > i) {
#line 232
    goto ldv_35676;
  } else {
#line 234
    goto ldv_35678;
  }
  }
  ldv_35678: 
#line 296
  i = 0U;
#line 296
  goto ldv_35686;
  ldv_35685: 
  {
#line 301
  __cil_tmp95 = rx_ring->Fbr0BufferSize;
#line 301
  __cil_tmp96 = __cil_tmp95 * 33U;
#line 301
  FBRChunkSize = __cil_tmp96 - 1U;
#line 302
  __cil_tmp97 = adapter->pdev;
#line 302
  __cil_tmp98 = (size_t )FBRChunkSize;
#line 302
  __cil_tmp99 = (unsigned long )i;
#line 302
  __cil_tmp100 = & rx_ring->Fbr0MemPa;
#line 302
  __cil_tmp101 = (dma_addr_t *)__cil_tmp100;
#line 302
  __cil_tmp102 = __cil_tmp101 + __cil_tmp99;
#line 302
  rx_ring->Fbr0MemVa[i] = pci_alloc_consistent(__cil_tmp97, __cil_tmp98, __cil_tmp102);
  }
  {
#line 306
  __cil_tmp103 = (void *)0;
#line 306
  __cil_tmp104 = (unsigned long )__cil_tmp103;
#line 306
  __cil_tmp105 = rx_ring->Fbr0MemVa[i];
#line 306
  __cil_tmp106 = (unsigned long )__cil_tmp105;
#line 306
  if (__cil_tmp106 == __cil_tmp104) {
    {
#line 307
    __cil_tmp107 = adapter->pdev;
#line 307
    __cil_tmp108 = & __cil_tmp107->dev;
#line 307
    __cil_tmp109 = (struct device  const  *)__cil_tmp108;
#line 307
    dev_err(__cil_tmp109, "Could not alloc memory\n");
    }
#line 309
    return (-12);
  } else {

  }
  }
  {
#line 313
  Fbr0TempPa = rx_ring->Fbr0MemPa[i];
#line 315
  __cil_tmp110 = rx_ring->Fbr0BufferSize;
#line 315
  __cil_tmp111 = __cil_tmp110 - 1U;
#line 315
  __cil_tmp112 = (u64 )__cil_tmp111;
#line 315
  et131x_align_allocated_memory(adapter, & Fbr0TempPa, & Fbr0Offset, __cil_tmp112);
#line 320
  j = 0U;
  }
#line 320
  goto ldv_35683;
  ldv_35682: 
#line 321
  __cil_tmp113 = i * 32U;
#line 321
  index___0 = __cil_tmp113 + j;
#line 323
  __cil_tmp114 = rx_ring->fbr[0];
#line 323
  __cil_tmp115 = (unsigned long )Fbr0Offset;
#line 323
  __cil_tmp116 = rx_ring->Fbr0BufferSize;
#line 323
  __cil_tmp117 = __cil_tmp116 * j;
#line 323
  __cil_tmp118 = (unsigned long )__cil_tmp117;
#line 323
  __cil_tmp119 = __cil_tmp118 + __cil_tmp115;
#line 323
  __cil_tmp120 = rx_ring->Fbr0MemVa[i];
#line 323
  __cil_tmp114->virt[index___0] = __cil_tmp120 + __cil_tmp119;
#line 327
  __cil_tmp121 = rx_ring->fbr[0];
#line 327
  __cil_tmp122 = Fbr0TempPa >> 32;
#line 327
  __cil_tmp121->bus_high[index___0] = (unsigned int )__cil_tmp122;
#line 329
  __cil_tmp123 = rx_ring->fbr[0];
#line 329
  __cil_tmp123->bus_low[index___0] = (unsigned int )Fbr0TempPa;
#line 331
  __cil_tmp124 = rx_ring->Fbr0BufferSize;
#line 331
  __cil_tmp125 = (u64 )__cil_tmp124;
#line 331
  Fbr0TempPa = __cil_tmp125 + Fbr0TempPa;
#line 333
  __cil_tmp126 = rx_ring->fbr[0];
#line 333
  __cil_tmp127 = rx_ring->fbr[0];
#line 333
  __cil_tmp126->buffer1[index___0] = __cil_tmp127->virt[index___0];
#line 335
  __cil_tmp128 = rx_ring->fbr[0];
#line 335
  __cil_tmp129 = rx_ring->fbr[0];
#line 335
  __cil_tmp130 = __cil_tmp129->virt[index___0];
#line 335
  __cil_tmp128->buffer2[index___0] = __cil_tmp130 + 1152921504606846972UL;
#line 320
  j = j + 1U;
  ldv_35683: ;
#line 320
  if (j <= 31U) {
#line 321
    goto ldv_35682;
  } else {
#line 323
    goto ldv_35684;
  }
  ldv_35684: 
#line 297
  i = i + 1U;
  ldv_35686: ;
  {
#line 296
  __cil_tmp131 = rx_ring->Fbr0NumEntries;
#line 296
  __cil_tmp132 = __cil_tmp131 / 32U;
#line 296
  if (__cil_tmp132 > i) {
#line 297
    goto ldv_35685;
  } else {
#line 299
    goto ldv_35687;
  }
  }
  ldv_35687: 
  {
#line 342
  __cil_tmp133 = adapter->rx_ring.PsrNumEntries;
#line 342
  pktStatRingSize = __cil_tmp133 * 8U;
#line 345
  __cil_tmp134 = adapter->pdev;
#line 345
  __cil_tmp135 = (size_t )pktStatRingSize;
#line 345
  __cil_tmp136 = & rx_ring->pPSRingPa;
#line 345
  rx_ring->pPSRingVa = pci_alloc_consistent(__cil_tmp134, __cil_tmp135, __cil_tmp136);
  }
  {
#line 349
  __cil_tmp137 = (void *)0;
#line 349
  __cil_tmp138 = (unsigned long )__cil_tmp137;
#line 349
  __cil_tmp139 = rx_ring->pPSRingVa;
#line 349
  __cil_tmp140 = (unsigned long )__cil_tmp139;
#line 349
  if (__cil_tmp140 == __cil_tmp138) {
    {
#line 350
    __cil_tmp141 = adapter->pdev;
#line 350
    __cil_tmp142 = & __cil_tmp141->dev;
#line 350
    __cil_tmp143 = (struct device  const  *)__cil_tmp142;
#line 350
    dev_err(__cil_tmp143, "Cannot alloc memory for Packet Status Ring\n");
    }
#line 352
    return (-12);
  } else {

  }
  }
  {
#line 354
  __cil_tmp144 = rx_ring->pPSRingPa;
#line 354
  __cil_tmp145 = (unsigned long )__cil_tmp144;
#line 354
  printk("<6>PSR %lx\n", __cil_tmp145);
#line 364
  __cil_tmp146 = adapter->pdev;
#line 364
  __cil_tmp147 = & rx_ring->rx_status_bus;
#line 364
  tmp___1 = pci_alloc_consistent(__cil_tmp146, 8UL, __cil_tmp147);
#line 364
  rx_ring->rx_status_block = (struct rx_status_block *)tmp___1;
  }
  {
#line 367
  __cil_tmp148 = (struct rx_status_block *)0;
#line 367
  __cil_tmp149 = (unsigned long )__cil_tmp148;
#line 367
  __cil_tmp150 = rx_ring->rx_status_block;
#line 367
  __cil_tmp151 = (unsigned long )__cil_tmp150;
#line 367
  if (__cil_tmp151 == __cil_tmp149) {
    {
#line 368
    __cil_tmp152 = adapter->pdev;
#line 368
    __cil_tmp153 = & __cil_tmp152->dev;
#line 368
    __cil_tmp154 = (struct device  const  *)__cil_tmp153;
#line 368
    dev_err(__cil_tmp154, "Cannot alloc memory for Status Block\n");
    }
#line 370
    return (-12);
  } else {

  }
  }
  {
#line 372
  rx_ring->NumRfd = 1024U;
#line 373
  __cil_tmp155 = rx_ring->rx_status_bus;
#line 373
  __cil_tmp156 = (unsigned long )__cil_tmp155;
#line 373
  printk("<6>PRS %lx\n", __cil_tmp156);
#line 381
  __cil_tmp157 = adapter->netdev;
#line 381
  __cil_tmp158 = & __cil_tmp157->name;
#line 381
  __cil_tmp159 = (char const   *)__cil_tmp158;
#line 381
  __cil_tmp160 = (void (*)(void * ))0;
#line 381
  rx_ring->RecvLookaside = kmem_cache_create(__cil_tmp159, 32UL, 0UL, 24576UL, __cil_tmp160);
#line 388
  __cil_tmp161 = adapter->Flags;
#line 388
  adapter->Flags = __cil_tmp161 | 4U;
#line 393
  __cil_tmp162 = & rx_ring->RecvList;
#line 393
  INIT_LIST_HEAD(__cil_tmp162);
  }
#line 394
  return (0);
}
}
#line 401 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void et131x_rx_dma_memory_free(struct et131x_adapter *adapter ) 
{ u32 index ;
  u32 bufsize ;
  u32 pktStatRingSize ;
  struct rfd *rfd ;
  struct rx_ring *rx_ring ;
  int __ret_warn_on ;
  long tmp ;
  struct list_head  const  *__mptr ;
  int tmp___0 ;
  u32 Fbr1Align ;
  u32 __cil_tmp12 ;
  u32 __cil_tmp13 ;
  int __cil_tmp14 ;
  long __cil_tmp15 ;
  int __cil_tmp16 ;
  int __cil_tmp17 ;
  int __cil_tmp18 ;
  long __cil_tmp19 ;
  struct list_head *__cil_tmp20 ;
  struct list_head *__cil_tmp21 ;
  struct kmem_cache *__cil_tmp22 ;
  void *__cil_tmp23 ;
  struct list_head *__cil_tmp24 ;
  struct list_head  const  *__cil_tmp25 ;
  void *__cil_tmp26 ;
  unsigned long __cil_tmp27 ;
  void *__cil_tmp28 ;
  unsigned long __cil_tmp29 ;
  void *__cil_tmp30 ;
  unsigned long __cil_tmp31 ;
  void *__cil_tmp32 ;
  unsigned long __cil_tmp33 ;
  u32 __cil_tmp34 ;
  u32 __cil_tmp35 ;
  u32 __cil_tmp36 ;
  u32 __cil_tmp37 ;
  struct pci_dev *__cil_tmp38 ;
  size_t __cil_tmp39 ;
  void *__cil_tmp40 ;
  dma_addr_t __cil_tmp41 ;
  u32 __cil_tmp42 ;
  u32 __cil_tmp43 ;
  uint64_t __cil_tmp44 ;
  uint64_t __cil_tmp45 ;
  void *__cil_tmp46 ;
  u32 __cil_tmp47 ;
  u32 __cil_tmp48 ;
  struct pci_dev *__cil_tmp49 ;
  size_t __cil_tmp50 ;
  void *__cil_tmp51 ;
  dma_addr_t __cil_tmp52 ;
  void *__cil_tmp53 ;
  unsigned long __cil_tmp54 ;
  void *__cil_tmp55 ;
  unsigned long __cil_tmp56 ;
  void *__cil_tmp57 ;
  unsigned long __cil_tmp58 ;
  void *__cil_tmp59 ;
  unsigned long __cil_tmp60 ;
  u32 __cil_tmp61 ;
  u32 __cil_tmp62 ;
  struct pci_dev *__cil_tmp63 ;
  size_t __cil_tmp64 ;
  void *__cil_tmp65 ;
  dma_addr_t __cil_tmp66 ;
  u32 __cil_tmp67 ;
  u32 __cil_tmp68 ;
  uint64_t __cil_tmp69 ;
  uint64_t __cil_tmp70 ;
  void *__cil_tmp71 ;
  u32 __cil_tmp72 ;
  u32 __cil_tmp73 ;
  struct pci_dev *__cil_tmp74 ;
  size_t __cil_tmp75 ;
  void *__cil_tmp76 ;
  dma_addr_t __cil_tmp77 ;
  void *__cil_tmp78 ;
  unsigned long __cil_tmp79 ;
  void *__cil_tmp80 ;
  unsigned long __cil_tmp81 ;
  u32 __cil_tmp82 ;
  struct pci_dev *__cil_tmp83 ;
  size_t __cil_tmp84 ;
  void *__cil_tmp85 ;
  dma_addr_t __cil_tmp86 ;
  struct rx_status_block *__cil_tmp87 ;
  unsigned long __cil_tmp88 ;
  struct rx_status_block *__cil_tmp89 ;
  unsigned long __cil_tmp90 ;
  struct pci_dev *__cil_tmp91 ;
  struct rx_status_block *__cil_tmp92 ;
  void *__cil_tmp93 ;
  dma_addr_t __cil_tmp94 ;
  u32 __cil_tmp95 ;
  unsigned int __cil_tmp96 ;
  struct kmem_cache *__cil_tmp97 ;
  u32 __cil_tmp98 ;
  struct fbr_lookup *__cil_tmp99 ;
  void const   *__cil_tmp100 ;
  struct fbr_lookup *__cil_tmp101 ;
  void const   *__cil_tmp102 ;

  {
  {
#line 410
  rx_ring = & adapter->rx_ring;
#line 413
  __cil_tmp12 = rx_ring->NumRfd;
#line 413
  __cil_tmp13 = rx_ring->nReadyRecv;
#line 413
  __ret_warn_on = __cil_tmp13 != __cil_tmp12;
#line 413
  __cil_tmp14 = __ret_warn_on != 0;
#line 413
  __cil_tmp15 = (long )__cil_tmp14;
#line 413
  tmp = __builtin_expect(__cil_tmp15, 0L);
  }
#line 413
  if (tmp != 0L) {
    {
#line 413
    __cil_tmp16 = (int const   )413;
#line 413
    __cil_tmp17 = (int )__cil_tmp16;
#line 413
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p",
                       __cil_tmp17);
    }
  } else {

  }
  {
#line 413
  __cil_tmp18 = __ret_warn_on != 0;
#line 413
  __cil_tmp19 = (long )__cil_tmp18;
#line 413
  __builtin_expect(__cil_tmp19, 0L);
  }
#line 415
  goto ldv_35701;
  ldv_35700: 
  {
#line 416
  __cil_tmp20 = rx_ring->RecvList.next;
#line 416
  __mptr = (struct list_head  const  *)__cil_tmp20;
#line 416
  rfd = (struct rfd *)__mptr;
#line 419
  __cil_tmp21 = & rfd->list_node;
#line 419
  list_del(__cil_tmp21);
#line 420
  rfd->skb = (struct sk_buff *)0;
#line 421
  __cil_tmp22 = adapter->rx_ring.RecvLookaside;
#line 421
  __cil_tmp23 = (void *)rfd;
#line 421
  kmem_cache_free(__cil_tmp22, __cil_tmp23);
  }
  ldv_35701: 
  {
#line 415
  __cil_tmp24 = & rx_ring->RecvList;
#line 415
  __cil_tmp25 = (struct list_head  const  *)__cil_tmp24;
#line 415
  tmp___0 = list_empty(__cil_tmp25);
  }
#line 415
  if (tmp___0 == 0) {
#line 416
    goto ldv_35700;
  } else {
#line 418
    goto ldv_35702;
  }
  ldv_35702: ;
  {
#line 425
  __cil_tmp26 = (void *)0;
#line 425
  __cil_tmp27 = (unsigned long )__cil_tmp26;
#line 425
  __cil_tmp28 = rx_ring->pFbr1RingVa;
#line 425
  __cil_tmp29 = (unsigned long )__cil_tmp28;
#line 425
  if (__cil_tmp29 != __cil_tmp27) {
#line 427
    index = 0U;
#line 427
    goto ldv_35705;
    ldv_35704: ;
    {
#line 429
    __cil_tmp30 = (void *)0;
#line 429
    __cil_tmp31 = (unsigned long )__cil_tmp30;
#line 429
    __cil_tmp32 = rx_ring->Fbr1MemVa[index];
#line 429
    __cil_tmp33 = (unsigned long )__cil_tmp32;
#line 429
    if (__cil_tmp33 != __cil_tmp31) {
      {
#line 432
      __cil_tmp34 = rx_ring->Fbr1BufferSize;
#line 432
      if (__cil_tmp34 > 4096U) {
#line 433
        Fbr1Align = 4096U;
      } else {
#line 435
        Fbr1Align = rx_ring->Fbr1BufferSize;
      }
      }
      {
#line 437
      __cil_tmp35 = rx_ring->Fbr1BufferSize;
#line 437
      __cil_tmp36 = __cil_tmp35 * 32U;
#line 437
      __cil_tmp37 = __cil_tmp36 + Fbr1Align;
#line 437
      bufsize = __cil_tmp37 - 1U;
#line 441
      __cil_tmp38 = adapter->pdev;
#line 441
      __cil_tmp39 = (size_t )bufsize;
#line 441
      __cil_tmp40 = rx_ring->Fbr1MemVa[index];
#line 441
      __cil_tmp41 = rx_ring->Fbr1MemPa[index];
#line 441
      pci_free_consistent(__cil_tmp38, __cil_tmp39, __cil_tmp40, __cil_tmp41);
#line 446
      rx_ring->Fbr1MemVa[index] = (void *)0;
      }
    } else {

    }
    }
#line 428
    index = index + 1U;
    ldv_35705: ;
    {
#line 427
    __cil_tmp42 = rx_ring->Fbr1NumEntries;
#line 427
    __cil_tmp43 = __cil_tmp42 / 32U;
#line 427
    if (__cil_tmp43 > index) {
#line 428
      goto ldv_35704;
    } else {
#line 430
      goto ldv_35706;
    }
    }
    ldv_35706: 
    {
#line 451
    __cil_tmp44 = rx_ring->Fbr1offset;
#line 451
    __cil_tmp45 = - __cil_tmp44;
#line 451
    __cil_tmp46 = rx_ring->pFbr1RingVa;
#line 451
    rx_ring->pFbr1RingVa = __cil_tmp46 + __cil_tmp45;
#line 454
    __cil_tmp47 = rx_ring->Fbr1NumEntries;
#line 454
    __cil_tmp48 = __cil_tmp47 * 12U;
#line 454
    bufsize = __cil_tmp48 + 4095U;
#line 457
    __cil_tmp49 = adapter->pdev;
#line 457
    __cil_tmp50 = (size_t )bufsize;
#line 457
    __cil_tmp51 = rx_ring->pFbr1RingVa;
#line 457
    __cil_tmp52 = rx_ring->pFbr1RingPa;
#line 457
    pci_free_consistent(__cil_tmp49, __cil_tmp50, __cil_tmp51, __cil_tmp52);
#line 460
    rx_ring->pFbr1RingVa = (void *)0;
    }
  } else {

  }
  }
  {
#line 465
  __cil_tmp53 = (void *)0;
#line 465
  __cil_tmp54 = (unsigned long )__cil_tmp53;
#line 465
  __cil_tmp55 = rx_ring->pFbr0RingVa;
#line 465
  __cil_tmp56 = (unsigned long )__cil_tmp55;
#line 465
  if (__cil_tmp56 != __cil_tmp54) {
#line 467
    index = 0U;
#line 467
    goto ldv_35708;
    ldv_35707: ;
    {
#line 469
    __cil_tmp57 = (void *)0;
#line 469
    __cil_tmp58 = (unsigned long )__cil_tmp57;
#line 469
    __cil_tmp59 = rx_ring->Fbr0MemVa[index];
#line 469
    __cil_tmp60 = (unsigned long )__cil_tmp59;
#line 469
    if (__cil_tmp60 != __cil_tmp58) {
      {
#line 470
      __cil_tmp61 = rx_ring->Fbr0BufferSize;
#line 470
      __cil_tmp62 = __cil_tmp61 * 33U;
#line 470
      bufsize = __cil_tmp62 - 1U;
#line 474
      __cil_tmp63 = adapter->pdev;
#line 474
      __cil_tmp64 = (size_t )bufsize;
#line 474
      __cil_tmp65 = rx_ring->Fbr0MemVa[index];
#line 474
      __cil_tmp66 = rx_ring->Fbr0MemPa[index];
#line 474
      pci_free_consistent(__cil_tmp63, __cil_tmp64, __cil_tmp65, __cil_tmp66);
#line 479
      rx_ring->Fbr0MemVa[index] = (void *)0;
      }
    } else {

    }
    }
#line 468
    index = index + 1U;
    ldv_35708: ;
    {
#line 467
    __cil_tmp67 = rx_ring->Fbr0NumEntries;
#line 467
    __cil_tmp68 = __cil_tmp67 / 32U;
#line 467
    if (__cil_tmp68 > index) {
#line 468
      goto ldv_35707;
    } else {
#line 470
      goto ldv_35709;
    }
    }
    ldv_35709: 
    {
#line 484
    __cil_tmp69 = rx_ring->Fbr0offset;
#line 484
    __cil_tmp70 = - __cil_tmp69;
#line 484
    __cil_tmp71 = rx_ring->pFbr0RingVa;
#line 484
    rx_ring->pFbr0RingVa = __cil_tmp71 + __cil_tmp70;
#line 487
    __cil_tmp72 = rx_ring->Fbr0NumEntries;
#line 487
    __cil_tmp73 = __cil_tmp72 * 12U;
#line 487
    bufsize = __cil_tmp73 + 4095U;
#line 490
    __cil_tmp74 = adapter->pdev;
#line 490
    __cil_tmp75 = (size_t )bufsize;
#line 490
    __cil_tmp76 = rx_ring->pFbr0RingVa;
#line 490
    __cil_tmp77 = rx_ring->pFbr0RingPa;
#line 490
    pci_free_consistent(__cil_tmp74, __cil_tmp75, __cil_tmp76, __cil_tmp77);
#line 494
    rx_ring->pFbr0RingVa = (void *)0;
    }
  } else {

  }
  }
  {
#line 499
  __cil_tmp78 = (void *)0;
#line 499
  __cil_tmp79 = (unsigned long )__cil_tmp78;
#line 499
  __cil_tmp80 = rx_ring->pPSRingVa;
#line 499
  __cil_tmp81 = (unsigned long )__cil_tmp80;
#line 499
  if (__cil_tmp81 != __cil_tmp79) {
    {
#line 500
    __cil_tmp82 = adapter->rx_ring.PsrNumEntries;
#line 500
    pktStatRingSize = __cil_tmp82 * 8U;
#line 503
    __cil_tmp83 = adapter->pdev;
#line 503
    __cil_tmp84 = (size_t )pktStatRingSize;
#line 503
    __cil_tmp85 = rx_ring->pPSRingVa;
#line 503
    __cil_tmp86 = rx_ring->pPSRingPa;
#line 503
    pci_free_consistent(__cil_tmp83, __cil_tmp84, __cil_tmp85, __cil_tmp86);
#line 506
    rx_ring->pPSRingVa = (void *)0;
    }
  } else {

  }
  }
  {
#line 510
  __cil_tmp87 = (struct rx_status_block *)0;
#line 510
  __cil_tmp88 = (unsigned long )__cil_tmp87;
#line 510
  __cil_tmp89 = rx_ring->rx_status_block;
#line 510
  __cil_tmp90 = (unsigned long )__cil_tmp89;
#line 510
  if (__cil_tmp90 != __cil_tmp88) {
    {
#line 511
    __cil_tmp91 = adapter->pdev;
#line 511
    __cil_tmp92 = rx_ring->rx_status_block;
#line 511
    __cil_tmp93 = (void *)__cil_tmp92;
#line 511
    __cil_tmp94 = rx_ring->rx_status_bus;
#line 511
    pci_free_consistent(__cil_tmp91, 8UL, __cil_tmp93, __cil_tmp94);
#line 514
    rx_ring->rx_status_block = (struct rx_status_block *)0;
    }
  } else {

  }
  }
  {
#line 522
  __cil_tmp95 = adapter->Flags;
#line 522
  __cil_tmp96 = __cil_tmp95 & 4U;
#line 522
  if (__cil_tmp96 != 0U) {
    {
#line 523
    __cil_tmp97 = rx_ring->RecvLookaside;
#line 523
    kmem_cache_destroy(__cil_tmp97);
#line 524
    __cil_tmp98 = adapter->Flags;
#line 524
    adapter->Flags = __cil_tmp98 & 4294967291U;
    }
  } else {

  }
  }
  {
#line 529
  __cil_tmp99 = rx_ring->fbr[0];
#line 529
  __cil_tmp100 = (void const   *)__cil_tmp99;
#line 529
  kfree(__cil_tmp100);
#line 532
  __cil_tmp101 = rx_ring->fbr[1];
#line 532
  __cil_tmp102 = (void const   *)__cil_tmp101;
#line 532
  kfree(__cil_tmp102);
#line 535
  rx_ring->nReadyRecv = 0U;
  }
#line 536
  return;
}
}
#line 544 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
int et131x_init_recv(struct et131x_adapter *adapter ) 
{ int status ;
  struct rfd *rfd ;
  u32 rfdct ;
  u32 numrfd ;
  struct rx_ring *rx_ring ;
  void *tmp ;
  struct kmem_cache *__cil_tmp8 ;
  struct rfd *__cil_tmp9 ;
  unsigned long __cil_tmp10 ;
  unsigned long __cil_tmp11 ;
  struct pci_dev *__cil_tmp12 ;
  struct device *__cil_tmp13 ;
  struct device  const  *__cil_tmp14 ;
  struct list_head *__cil_tmp15 ;
  struct list_head *__cil_tmp16 ;
  u32 __cil_tmp17 ;
  u32 __cil_tmp18 ;
  struct kmem_cache *__cil_tmp19 ;
  void *__cil_tmp20 ;
  struct pci_dev *__cil_tmp21 ;
  struct device *__cil_tmp22 ;
  struct device  const  *__cil_tmp23 ;

  {
#line 546
  status = -12;
#line 547
  rfd = (struct rfd *)0;
#line 549
  numrfd = 0U;
#line 553
  rx_ring = & adapter->rx_ring;
#line 556
  rfdct = 0U;
#line 556
  goto ldv_35720;
  ldv_35719: 
  {
#line 557
  __cil_tmp8 = rx_ring->RecvLookaside;
#line 557
  tmp = kmem_cache_alloc(__cil_tmp8, 33U);
#line 557
  rfd = (struct rfd *)tmp;
  }
  {
#line 560
  __cil_tmp9 = (struct rfd *)0;
#line 560
  __cil_tmp10 = (unsigned long )__cil_tmp9;
#line 560
  __cil_tmp11 = (unsigned long )rfd;
#line 560
  if (__cil_tmp11 == __cil_tmp10) {
    {
#line 561
    __cil_tmp12 = adapter->pdev;
#line 561
    __cil_tmp13 = & __cil_tmp12->dev;
#line 561
    __cil_tmp14 = (struct device  const  *)__cil_tmp13;
#line 561
    dev_err(__cil_tmp14, "Couldn\'t alloc RFD out of kmem_cache\n");
#line 563
    status = -12;
    }
#line 564
    goto ldv_35718;
  } else {

  }
  }
  {
#line 567
  rfd->skb = (struct sk_buff *)0;
#line 570
  __cil_tmp15 = & rfd->list_node;
#line 570
  __cil_tmp16 = & rx_ring->RecvList;
#line 570
  list_add_tail(__cil_tmp15, __cil_tmp16);
#line 573
  __cil_tmp17 = rx_ring->nReadyRecv;
#line 573
  rx_ring->nReadyRecv = __cil_tmp17 + 1U;
#line 574
  numrfd = numrfd + 1U;
  }
  ldv_35718: 
#line 556
  rfdct = rfdct + 1U;
  ldv_35720: ;
  {
#line 556
  __cil_tmp18 = rx_ring->NumRfd;
#line 556
  if (__cil_tmp18 > rfdct) {
#line 557
    goto ldv_35719;
  } else {
#line 559
    goto ldv_35721;
  }
  }
  ldv_35721: ;
#line 577
  if (numrfd > 64U) {
#line 578
    status = 0;
  } else {

  }
#line 580
  rx_ring->NumRfd = numrfd;
#line 582
  if (status != 0) {
    {
#line 583
    __cil_tmp19 = rx_ring->RecvLookaside;
#line 583
    __cil_tmp20 = (void *)rfd;
#line 583
    kmem_cache_free(__cil_tmp19, __cil_tmp20);
#line 584
    __cil_tmp21 = adapter->pdev;
#line 584
    __cil_tmp22 = & __cil_tmp21->dev;
#line 584
    __cil_tmp23 = (struct device  const  *)__cil_tmp22;
#line 584
    dev_err(__cil_tmp23, "Allocation problems in et131x_init_recv\n");
    }
  } else {

  }
#line 587
  return (status);
}
}
#line 594 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void ConfigRxDmaRegs(struct et131x_adapter *etdev ) 
{ struct rxdma_regs *rx_dma ;
  struct rx_ring *rx_local ;
  struct fbr_desc *fbr_entry ;
  u32 entry ;
  u32 psr_num_des ;
  unsigned long flags ;
  unsigned int tmp ;
  raw_spinlock_t *tmp___0 ;
  ADDRESS_MAP_t *__cil_tmp10 ;
  dma_addr_t __cil_tmp11 ;
  dma_addr_t __cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  u32 *__cil_tmp14 ;
  void volatile   *__cil_tmp15 ;
  dma_addr_t __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  u32 *__cil_tmp18 ;
  void volatile   *__cil_tmp19 ;
  struct rx_status_block *__cil_tmp20 ;
  void *__cil_tmp21 ;
  dma_addr_t __cil_tmp22 ;
  dma_addr_t __cil_tmp23 ;
  unsigned int __cil_tmp24 ;
  u32 *__cil_tmp25 ;
  void volatile   *__cil_tmp26 ;
  dma_addr_t __cil_tmp27 ;
  unsigned int __cil_tmp28 ;
  u32 *__cil_tmp29 ;
  void volatile   *__cil_tmp30 ;
  u32 __cil_tmp31 ;
  u32 __cil_tmp32 ;
  u32 *__cil_tmp33 ;
  void volatile   *__cil_tmp34 ;
  u32 *__cil_tmp35 ;
  void volatile   *__cil_tmp36 ;
  u32 *__cil_tmp37 ;
  void const volatile   *__cil_tmp38 ;
  u32 __cil_tmp39 ;
  u32 __cil_tmp40 ;
  u32 *__cil_tmp41 ;
  void volatile   *__cil_tmp42 ;
  spinlock_t *__cil_tmp43 ;
  void *__cil_tmp44 ;
  struct fbr_lookup *__cil_tmp45 ;
  struct fbr_lookup *__cil_tmp46 ;
  u32 __cil_tmp47 ;
  uint64_t __cil_tmp48 ;
  uint64_t __cil_tmp49 ;
  unsigned int __cil_tmp50 ;
  u32 *__cil_tmp51 ;
  void volatile   *__cil_tmp52 ;
  uint64_t __cil_tmp53 ;
  unsigned int __cil_tmp54 ;
  u32 *__cil_tmp55 ;
  void volatile   *__cil_tmp56 ;
  u32 __cil_tmp57 ;
  u32 __cil_tmp58 ;
  u32 *__cil_tmp59 ;
  void volatile   *__cil_tmp60 ;
  u32 *__cil_tmp61 ;
  void volatile   *__cil_tmp62 ;
  u32 __cil_tmp63 ;
  u32 __cil_tmp64 ;
  u32 __cil_tmp65 ;
  u32 __cil_tmp66 ;
  u32 *__cil_tmp67 ;
  void volatile   *__cil_tmp68 ;
  void *__cil_tmp69 ;
  struct fbr_lookup *__cil_tmp70 ;
  struct fbr_lookup *__cil_tmp71 ;
  u32 __cil_tmp72 ;
  uint64_t __cil_tmp73 ;
  uint64_t __cil_tmp74 ;
  unsigned int __cil_tmp75 ;
  u32 *__cil_tmp76 ;
  void volatile   *__cil_tmp77 ;
  uint64_t __cil_tmp78 ;
  unsigned int __cil_tmp79 ;
  u32 *__cil_tmp80 ;
  void volatile   *__cil_tmp81 ;
  u32 __cil_tmp82 ;
  u32 __cil_tmp83 ;
  u32 *__cil_tmp84 ;
  void volatile   *__cil_tmp85 ;
  u32 *__cil_tmp86 ;
  void volatile   *__cil_tmp87 ;
  u32 __cil_tmp88 ;
  u32 __cil_tmp89 ;
  u32 __cil_tmp90 ;
  u32 __cil_tmp91 ;
  u32 *__cil_tmp92 ;
  void volatile   *__cil_tmp93 ;
  u32 *__cil_tmp94 ;
  void volatile   *__cil_tmp95 ;
  u32 *__cil_tmp96 ;
  void volatile   *__cil_tmp97 ;
  spinlock_t *__cil_tmp98 ;

  {
  {
#line 596
  __cil_tmp10 = etdev->regs;
#line 596
  rx_dma = & __cil_tmp10->rxdma;
#line 597
  rx_local = & etdev->rx_ring;
#line 604
  et131x_rx_dma_disable(etdev);
#line 613
  __cil_tmp11 = rx_local->rx_status_bus;
#line 613
  __cil_tmp12 = __cil_tmp11 >> 32;
#line 613
  __cil_tmp13 = (unsigned int )__cil_tmp12;
#line 613
  __cil_tmp14 = & rx_dma->dma_wb_base_hi;
#line 613
  __cil_tmp15 = (void volatile   *)__cil_tmp14;
#line 613
  writel(__cil_tmp13, __cil_tmp15);
#line 615
  __cil_tmp16 = rx_local->rx_status_bus;
#line 615
  __cil_tmp17 = (unsigned int )__cil_tmp16;
#line 615
  __cil_tmp18 = & rx_dma->dma_wb_base_lo;
#line 615
  __cil_tmp19 = (void volatile   *)__cil_tmp18;
#line 615
  writel(__cil_tmp17, __cil_tmp19);
#line 617
  __cil_tmp20 = rx_local->rx_status_block;
#line 617
  __cil_tmp21 = (void *)__cil_tmp20;
#line 617
  memset(__cil_tmp21, 0, 8UL);
#line 622
  __cil_tmp22 = rx_local->pPSRingPa;
#line 622
  __cil_tmp23 = __cil_tmp22 >> 32;
#line 622
  __cil_tmp24 = (unsigned int )__cil_tmp23;
#line 622
  __cil_tmp25 = & rx_dma->psr_base_hi;
#line 622
  __cil_tmp26 = (void volatile   *)__cil_tmp25;
#line 622
  writel(__cil_tmp24, __cil_tmp26);
#line 624
  __cil_tmp27 = rx_local->pPSRingPa;
#line 624
  __cil_tmp28 = (unsigned int )__cil_tmp27;
#line 624
  __cil_tmp29 = & rx_dma->psr_base_lo;
#line 624
  __cil_tmp30 = (void volatile   *)__cil_tmp29;
#line 624
  writel(__cil_tmp28, __cil_tmp30);
#line 625
  __cil_tmp31 = rx_local->PsrNumEntries;
#line 625
  __cil_tmp32 = __cil_tmp31 - 1U;
#line 625
  __cil_tmp33 = & rx_dma->psr_num_des;
#line 625
  __cil_tmp34 = (void volatile   *)__cil_tmp33;
#line 625
  writel(__cil_tmp32, __cil_tmp34);
#line 626
  __cil_tmp35 = & rx_dma->psr_full_offset;
#line 626
  __cil_tmp36 = (void volatile   *)__cil_tmp35;
#line 626
  writel(0U, __cil_tmp36);
#line 628
  __cil_tmp37 = & rx_dma->psr_num_des;
#line 628
  __cil_tmp38 = (void const volatile   *)__cil_tmp37;
#line 628
  tmp = readl(__cil_tmp38);
#line 628
  psr_num_des = tmp & 4095U;
#line 629
  __cil_tmp39 = psr_num_des * 15U;
#line 629
  __cil_tmp40 = __cil_tmp39 / 100U;
#line 629
  __cil_tmp41 = & rx_dma->psr_min_des;
#line 629
  __cil_tmp42 = (void volatile   *)__cil_tmp41;
#line 629
  writel(__cil_tmp40, __cil_tmp42);
#line 632
  __cil_tmp43 = & etdev->rcv_lock;
#line 632
  tmp___0 = spinlock_check(__cil_tmp43);
#line 632
  flags = _raw_spin_lock_irqsave(tmp___0);
#line 635
  rx_local->local_psr_full = 0U;
#line 638
  __cil_tmp44 = rx_local->pFbr1RingVa;
#line 638
  fbr_entry = (struct fbr_desc *)__cil_tmp44;
#line 639
  entry = 0U;
  }
#line 639
  goto ldv_35735;
  ldv_35734: 
#line 640
  __cil_tmp45 = rx_local->fbr[1];
#line 640
  fbr_entry->addr_hi = __cil_tmp45->bus_high[entry];
#line 641
  __cil_tmp46 = rx_local->fbr[1];
#line 641
  fbr_entry->addr_lo = __cil_tmp46->bus_low[entry];
#line 642
  fbr_entry->word2 = entry;
#line 643
  fbr_entry = fbr_entry + 1;
#line 639
  entry = entry + 1U;
  ldv_35735: ;
  {
#line 639
  __cil_tmp47 = rx_local->Fbr1NumEntries;
#line 639
  if (__cil_tmp47 > entry) {
#line 640
    goto ldv_35734;
  } else {
#line 642
    goto ldv_35736;
  }
  }
  ldv_35736: 
  {
#line 649
  __cil_tmp48 = rx_local->Fbr1Realpa;
#line 649
  __cil_tmp49 = __cil_tmp48 >> 32;
#line 649
  __cil_tmp50 = (unsigned int )__cil_tmp49;
#line 649
  __cil_tmp51 = & rx_dma->fbr1_base_hi;
#line 649
  __cil_tmp52 = (void volatile   *)__cil_tmp51;
#line 649
  writel(__cil_tmp50, __cil_tmp52);
#line 650
  __cil_tmp53 = rx_local->Fbr1Realpa;
#line 650
  __cil_tmp54 = (unsigned int )__cil_tmp53;
#line 650
  __cil_tmp55 = & rx_dma->fbr1_base_lo;
#line 650
  __cil_tmp56 = (void volatile   *)__cil_tmp55;
#line 650
  writel(__cil_tmp54, __cil_tmp56);
#line 651
  __cil_tmp57 = rx_local->Fbr1NumEntries;
#line 651
  __cil_tmp58 = __cil_tmp57 - 1U;
#line 651
  __cil_tmp59 = & rx_dma->fbr1_num_des;
#line 651
  __cil_tmp60 = (void volatile   *)__cil_tmp59;
#line 651
  writel(__cil_tmp58, __cil_tmp60);
#line 652
  __cil_tmp61 = & rx_dma->fbr1_full_offset;
#line 652
  __cil_tmp62 = (void volatile   *)__cil_tmp61;
#line 652
  writel(1024U, __cil_tmp62);
#line 657
  rx_local->local_Fbr1_full = 1024U;
#line 658
  __cil_tmp63 = rx_local->Fbr1NumEntries;
#line 658
  __cil_tmp64 = __cil_tmp63 * 15U;
#line 658
  __cil_tmp65 = __cil_tmp64 / 100U;
#line 658
  __cil_tmp66 = __cil_tmp65 - 1U;
#line 658
  __cil_tmp67 = & rx_dma->fbr1_min_des;
#line 658
  __cil_tmp68 = (void volatile   *)__cil_tmp67;
#line 658
  writel(__cil_tmp66, __cil_tmp68);
#line 663
  __cil_tmp69 = rx_local->pFbr0RingVa;
#line 663
  fbr_entry = (struct fbr_desc *)__cil_tmp69;
#line 664
  entry = 0U;
  }
#line 664
  goto ldv_35738;
  ldv_35737: 
#line 665
  __cil_tmp70 = rx_local->fbr[0];
#line 665
  fbr_entry->addr_hi = __cil_tmp70->bus_high[entry];
#line 666
  __cil_tmp71 = rx_local->fbr[0];
#line 666
  fbr_entry->addr_lo = __cil_tmp71->bus_low[entry];
#line 667
  fbr_entry->word2 = entry;
#line 668
  fbr_entry = fbr_entry + 1;
#line 664
  entry = entry + 1U;
  ldv_35738: ;
  {
#line 664
  __cil_tmp72 = rx_local->Fbr0NumEntries;
#line 664
  if (__cil_tmp72 > entry) {
#line 665
    goto ldv_35737;
  } else {
#line 667
    goto ldv_35739;
  }
  }
  ldv_35739: 
  {
#line 671
  __cil_tmp73 = rx_local->Fbr0Realpa;
#line 671
  __cil_tmp74 = __cil_tmp73 >> 32;
#line 671
  __cil_tmp75 = (unsigned int )__cil_tmp74;
#line 671
  __cil_tmp76 = & rx_dma->fbr0_base_hi;
#line 671
  __cil_tmp77 = (void volatile   *)__cil_tmp76;
#line 671
  writel(__cil_tmp75, __cil_tmp77);
#line 672
  __cil_tmp78 = rx_local->Fbr0Realpa;
#line 672
  __cil_tmp79 = (unsigned int )__cil_tmp78;
#line 672
  __cil_tmp80 = & rx_dma->fbr0_base_lo;
#line 672
  __cil_tmp81 = (void volatile   *)__cil_tmp80;
#line 672
  writel(__cil_tmp79, __cil_tmp81);
#line 673
  __cil_tmp82 = rx_local->Fbr0NumEntries;
#line 673
  __cil_tmp83 = __cil_tmp82 - 1U;
#line 673
  __cil_tmp84 = & rx_dma->fbr0_num_des;
#line 673
  __cil_tmp85 = (void volatile   *)__cil_tmp84;
#line 673
  writel(__cil_tmp83, __cil_tmp85);
#line 674
  __cil_tmp86 = & rx_dma->fbr0_full_offset;
#line 674
  __cil_tmp87 = (void volatile   *)__cil_tmp86;
#line 674
  writel(1024U, __cil_tmp87);
#line 679
  rx_local->local_Fbr0_full = 1024U;
#line 680
  __cil_tmp88 = rx_local->Fbr0NumEntries;
#line 680
  __cil_tmp89 = __cil_tmp88 * 15U;
#line 680
  __cil_tmp90 = __cil_tmp89 / 100U;
#line 680
  __cil_tmp91 = __cil_tmp90 - 1U;
#line 680
  __cil_tmp92 = & rx_dma->fbr0_min_des;
#line 680
  __cil_tmp93 = (void volatile   *)__cil_tmp92;
#line 680
  writel(__cil_tmp91, __cil_tmp93);
#line 689
  __cil_tmp94 = & rx_dma->num_pkt_done;
#line 689
  __cil_tmp95 = (void volatile   *)__cil_tmp94;
#line 689
  writel(4U, __cil_tmp95);
#line 696
  __cil_tmp96 = & rx_dma->max_pkt_time;
#line 696
  __cil_tmp97 = (void volatile   *)__cil_tmp96;
#line 696
  writel(10U, __cil_tmp97);
#line 698
  __cil_tmp98 = & etdev->rcv_lock;
#line 698
  spin_unlock_irqrestore(__cil_tmp98, flags);
  }
#line 699
  return;
}
}
#line 705 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void SetRxDmaTimer(struct et131x_adapter *etdev ) 
{ u32 __cil_tmp2 ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  u32 *__cil_tmp4 ;
  void volatile   *__cil_tmp5 ;
  ADDRESS_MAP_t *__cil_tmp6 ;
  u32 *__cil_tmp7 ;
  void volatile   *__cil_tmp8 ;
  u32 __cil_tmp9 ;
  ADDRESS_MAP_t *__cil_tmp10 ;
  u32 *__cil_tmp11 ;
  void volatile   *__cil_tmp12 ;
  ADDRESS_MAP_t *__cil_tmp13 ;
  u32 *__cil_tmp14 ;
  void volatile   *__cil_tmp15 ;

  {
  {
#line 710
  __cil_tmp2 = etdev->linkspeed;
#line 710
  if (__cil_tmp2 == 1U) {
    {
#line 712
    __cil_tmp3 = etdev->regs;
#line 712
    __cil_tmp4 = & __cil_tmp3->rxdma.max_pkt_time;
#line 712
    __cil_tmp5 = (void volatile   *)__cil_tmp4;
#line 712
    writel(0U, __cil_tmp5);
#line 713
    __cil_tmp6 = etdev->regs;
#line 713
    __cil_tmp7 = & __cil_tmp6->rxdma.num_pkt_done;
#line 713
    __cil_tmp8 = (void volatile   *)__cil_tmp7;
#line 713
    writel(1U, __cil_tmp8);
    }
  } else {
    {
#line 710
    __cil_tmp9 = etdev->linkspeed;
#line 710
    if (__cil_tmp9 == 0U) {
      {
#line 712
      __cil_tmp10 = etdev->regs;
#line 712
      __cil_tmp11 = & __cil_tmp10->rxdma.max_pkt_time;
#line 712
      __cil_tmp12 = (void volatile   *)__cil_tmp11;
#line 712
      writel(0U, __cil_tmp12);
#line 713
      __cil_tmp13 = etdev->regs;
#line 713
      __cil_tmp14 = & __cil_tmp13->rxdma.num_pkt_done;
#line 713
      __cil_tmp15 = (void volatile   *)__cil_tmp14;
#line 713
      writel(1U, __cil_tmp15);
      }
    } else {

    }
    }
  }
  }
#line 715
  return;
}
}
#line 721 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void et131x_rx_dma_disable(struct et131x_adapter *etdev ) 
{ u32 csr ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  u32 *__cil_tmp4 ;
  void volatile   *__cil_tmp5 ;
  ADDRESS_MAP_t *__cil_tmp6 ;
  u32 *__cil_tmp7 ;
  void const volatile   *__cil_tmp8 ;
  unsigned int __cil_tmp9 ;
  ADDRESS_MAP_t *__cil_tmp10 ;
  u32 *__cil_tmp11 ;
  void const volatile   *__cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  struct pci_dev *__cil_tmp14 ;
  struct device *__cil_tmp15 ;
  struct device  const  *__cil_tmp16 ;

  {
  {
#line 725
  __cil_tmp3 = etdev->regs;
#line 725
  __cil_tmp4 = & __cil_tmp3->rxdma.csr;
#line 725
  __cil_tmp5 = (void volatile   *)__cil_tmp4;
#line 725
  writel(8193U, __cil_tmp5);
#line 726
  __cil_tmp6 = etdev->regs;
#line 726
  __cil_tmp7 = & __cil_tmp6->rxdma.csr;
#line 726
  __cil_tmp8 = (void const volatile   *)__cil_tmp7;
#line 726
  csr = readl(__cil_tmp8);
  }
  {
#line 727
  __cil_tmp9 = csr & 131072U;
#line 727
  if (__cil_tmp9 == 0U) {
    {
#line 728
    __const_udelay(21475UL);
#line 729
    __cil_tmp10 = etdev->regs;
#line 729
    __cil_tmp11 = & __cil_tmp10->rxdma.csr;
#line 729
    __cil_tmp12 = (void const volatile   *)__cil_tmp11;
#line 729
    csr = readl(__cil_tmp12);
    }
    {
#line 730
    __cil_tmp13 = csr & 131072U;
#line 730
    if (__cil_tmp13 == 0U) {
      {
#line 731
      __cil_tmp14 = etdev->pdev;
#line 731
      __cil_tmp15 = & __cil_tmp14->dev;
#line 731
      __cil_tmp16 = (struct device  const  *)__cil_tmp15;
#line 731
      dev_err(__cil_tmp16, "RX Dma failed to enter halt state. CSR 0x%08x\n", csr);
      }
    } else {

    }
    }
  } else {

  }
  }
#line 734
  return;
}
}
#line 741 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void et131x_rx_dma_enable(struct et131x_adapter *etdev ) 
{ u32 csr ;
  u32 __cil_tmp3 ;
  u32 __cil_tmp4 ;
  u32 __cil_tmp5 ;
  u32 __cil_tmp6 ;
  u32 __cil_tmp7 ;
  u32 __cil_tmp8 ;
  ADDRESS_MAP_t *__cil_tmp9 ;
  u32 *__cil_tmp10 ;
  void volatile   *__cil_tmp11 ;
  ADDRESS_MAP_t *__cil_tmp12 ;
  u32 *__cil_tmp13 ;
  void const volatile   *__cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  ADDRESS_MAP_t *__cil_tmp16 ;
  u32 *__cil_tmp17 ;
  void const volatile   *__cil_tmp18 ;
  unsigned int __cil_tmp19 ;
  struct pci_dev *__cil_tmp20 ;
  struct device *__cil_tmp21 ;
  struct device  const  *__cil_tmp22 ;

  {
#line 744
  csr = 8192U;
  {
#line 746
  __cil_tmp3 = etdev->rx_ring.Fbr1BufferSize;
#line 746
  if (__cil_tmp3 == 4096U) {
#line 747
    csr = csr | 2048U;
  } else {
    {
#line 748
    __cil_tmp4 = etdev->rx_ring.Fbr1BufferSize;
#line 748
    if (__cil_tmp4 == 8192U) {
#line 749
      csr = csr | 4096U;
    } else {
      {
#line 750
      __cil_tmp5 = etdev->rx_ring.Fbr1BufferSize;
#line 750
      if (__cil_tmp5 == 16384U) {
#line 751
        csr = csr | 6144U;
      } else {

      }
      }
    }
    }
  }
  }
#line 753
  csr = csr | 1024U;
  {
#line 754
  __cil_tmp6 = etdev->rx_ring.Fbr0BufferSize;
#line 754
  if (__cil_tmp6 == 256U) {
#line 755
    csr = csr | 256U;
  } else {
    {
#line 756
    __cil_tmp7 = etdev->rx_ring.Fbr0BufferSize;
#line 756
    if (__cil_tmp7 == 512U) {
#line 757
      csr = csr | 512U;
    } else {
      {
#line 758
      __cil_tmp8 = etdev->rx_ring.Fbr0BufferSize;
#line 758
      if (__cil_tmp8 == 1024U) {
#line 759
        csr = csr | 768U;
      } else {

      }
      }
    }
    }
  }
  }
  {
#line 761
  __cil_tmp9 = etdev->regs;
#line 761
  __cil_tmp10 = & __cil_tmp9->rxdma.csr;
#line 761
  __cil_tmp11 = (void volatile   *)__cil_tmp10;
#line 761
  writel(csr, __cil_tmp11);
#line 763
  __cil_tmp12 = etdev->regs;
#line 763
  __cil_tmp13 = & __cil_tmp12->rxdma.csr;
#line 763
  __cil_tmp14 = (void const volatile   *)__cil_tmp13;
#line 763
  csr = readl(__cil_tmp14);
  }
  {
#line 764
  __cil_tmp15 = csr & 131072U;
#line 764
  if (__cil_tmp15 != 0U) {
    {
#line 765
    __const_udelay(21475UL);
#line 766
    __cil_tmp16 = etdev->regs;
#line 766
    __cil_tmp17 = & __cil_tmp16->rxdma.csr;
#line 766
    __cil_tmp18 = (void const volatile   *)__cil_tmp17;
#line 766
    csr = readl(__cil_tmp18);
    }
    {
#line 767
    __cil_tmp19 = csr & 131072U;
#line 767
    if (__cil_tmp19 != 0U) {
      {
#line 768
      __cil_tmp20 = etdev->pdev;
#line 768
      __cil_tmp21 = & __cil_tmp20->dev;
#line 768
      __cil_tmp22 = (struct device  const  *)__cil_tmp21;
#line 768
      dev_err(__cil_tmp22, "RX Dma failed to exit halt state.  CSR 0x%08x\n", csr);
      }
    } else {

    }
    }
  } else {

  }
  }
#line 771
  return;
}
}
#line 786 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
struct rfd *nic_rx_pkts(struct et131x_adapter *etdev ) 
{ struct rx_ring *rx_local ;
  struct rx_status_block *status ;
  struct pkt_stat_desc *psr ;
  struct rfd *rfd ;
  u32 i ;
  u8 *buf ;
  unsigned long flags ;
  struct list_head *element ;
  u8 rindex ;
  u16 bindex ;
  u32 len ;
  u32 word0 ;
  u32 word1 ;
  raw_spinlock_t *tmp ;
  struct list_head  const  *__mptr ;
  int tmp___0 ;
  int tmp___1 ;
  struct sk_buff *skb ;
  size_t __len ;
  void *__ret ;
  unsigned char *tmp___3 ;
  u32 __cil_tmp23 ;
  u32 __cil_tmp24 ;
  unsigned int __cil_tmp25 ;
  unsigned int __cil_tmp26 ;
  u32 __cil_tmp27 ;
  unsigned long __cil_tmp28 ;
  unsigned long __cil_tmp29 ;
  void *__cil_tmp30 ;
  struct pkt_stat_desc *__cil_tmp31 ;
  u32 __cil_tmp32 ;
  u32 __cil_tmp33 ;
  u32 __cil_tmp34 ;
  u8 __cil_tmp35 ;
  unsigned int __cil_tmp36 ;
  unsigned int __cil_tmp37 ;
  u32 __cil_tmp38 ;
  u32 __cil_tmp39 ;
  u16 __cil_tmp40 ;
  unsigned int __cil_tmp41 ;
  unsigned int __cil_tmp42 ;
  u32 *__cil_tmp43 ;
  u32 __cil_tmp44 ;
  u32 __cil_tmp45 ;
  u32 __cil_tmp46 ;
  unsigned int __cil_tmp47 ;
  u32 __cil_tmp48 ;
  u32 __cil_tmp49 ;
  u32 __cil_tmp50 ;
  ADDRESS_MAP_t *__cil_tmp51 ;
  u32 *__cil_tmp52 ;
  void volatile   *__cil_tmp53 ;
  unsigned int __cil_tmp54 ;
  struct pci_dev *__cil_tmp55 ;
  struct device *__cil_tmp56 ;
  struct device  const  *__cil_tmp57 ;
  u32 __cil_tmp58 ;
  unsigned int __cil_tmp59 ;
  int __cil_tmp60 ;
  unsigned int __cil_tmp61 ;
  u32 __cil_tmp62 ;
  u32 __cil_tmp63 ;
  u32 __cil_tmp64 ;
  struct pci_dev *__cil_tmp65 ;
  struct device *__cil_tmp66 ;
  struct device  const  *__cil_tmp67 ;
  u32 __cil_tmp68 ;
  unsigned int __cil_tmp69 ;
  int __cil_tmp70 ;
  unsigned int __cil_tmp71 ;
  u32 __cil_tmp72 ;
  u32 __cil_tmp73 ;
  u32 __cil_tmp74 ;
  struct pci_dev *__cil_tmp75 ;
  struct device *__cil_tmp76 ;
  struct device  const  *__cil_tmp77 ;
  u32 __cil_tmp78 ;
  unsigned int __cil_tmp79 ;
  int __cil_tmp80 ;
  spinlock_t *__cil_tmp81 ;
  struct rfd *__cil_tmp82 ;
  unsigned long __cil_tmp83 ;
  unsigned long __cil_tmp84 ;
  spinlock_t *__cil_tmp85 ;
  struct list_head *__cil_tmp86 ;
  u32 __cil_tmp87 ;
  spinlock_t *__cil_tmp88 ;
  u32 __cil_tmp89 ;
  u8 __cil_tmp90 ;
  unsigned int __cil_tmp91 ;
  struct fbr_lookup *__cil_tmp92 ;
  void *__cil_tmp93 ;
  void const   *__cil_tmp94 ;
  void const   *__cil_tmp95 ;
  u8 (*__cil_tmp96)[6U] ;
  void const   *__cil_tmp97 ;
  void const   *__cil_tmp98 ;
  void const   *__cil_tmp99 ;
  void const   *__cil_tmp100 ;
  unsigned int __cil_tmp101 ;
  unsigned int __cil_tmp102 ;
  u32 __cil_tmp103 ;
  unsigned int __cil_tmp104 ;
  u32 __cil_tmp105 ;
  unsigned int __cil_tmp106 ;
  u32 __cil_tmp107 ;
  unsigned int __cil_tmp108 ;
  struct fbr_lookup *__cil_tmp109 ;
  void *__cil_tmp110 ;
  u8 __cil_tmp111 ;
  int __cil_tmp112 ;
  u8 __cil_tmp113 ;
  int __cil_tmp114 ;
  u8 __cil_tmp115 ;
  int __cil_tmp116 ;
  u8 *__cil_tmp117 ;
  u8 __cil_tmp118 ;
  int __cil_tmp119 ;
  u8 __cil_tmp120 ;
  int __cil_tmp121 ;
  u8 *__cil_tmp122 ;
  u8 __cil_tmp123 ;
  int __cil_tmp124 ;
  u8 __cil_tmp125 ;
  int __cil_tmp126 ;
  u8 *__cil_tmp127 ;
  u8 __cil_tmp128 ;
  int __cil_tmp129 ;
  u8 __cil_tmp130 ;
  int __cil_tmp131 ;
  u8 *__cil_tmp132 ;
  u8 __cil_tmp133 ;
  int __cil_tmp134 ;
  u8 __cil_tmp135 ;
  int __cil_tmp136 ;
  u8 *__cil_tmp137 ;
  u8 __cil_tmp138 ;
  int __cil_tmp139 ;
  u32 __cil_tmp140 ;
  u32 __cil_tmp141 ;
  u32 __cil_tmp142 ;
  unsigned int __cil_tmp143 ;
  u32 __cil_tmp144 ;
  u32 __cil_tmp145 ;
  u32 __cil_tmp146 ;
  u32 __cil_tmp147 ;
  struct sk_buff *__cil_tmp148 ;
  unsigned long __cil_tmp149 ;
  unsigned long __cil_tmp150 ;
  struct pci_dev *__cil_tmp151 ;
  struct device *__cil_tmp152 ;
  struct device  const  *__cil_tmp153 ;
  u32 __cil_tmp154 ;
  unsigned long __cil_tmp155 ;
  unsigned long __cil_tmp156 ;
  u32 __cil_tmp157 ;
  u32 __cil_tmp158 ;
  void *__cil_tmp159 ;
  struct fbr_lookup *__cil_tmp160 ;
  void *__cil_tmp161 ;
  void const   *__cil_tmp162 ;
  struct net_device *__cil_tmp163 ;

  {
#line 788
  rx_local = & etdev->rx_ring;
#line 806
  status = rx_local->rx_status_block;
#line 807
  __cil_tmp23 = status->Word1;
#line 807
  word1 = __cil_tmp23 >> 16;
  {
#line 810
  __cil_tmp24 = rx_local->local_psr_full;
#line 810
  __cil_tmp25 = __cil_tmp24 ^ word1;
#line 810
  __cil_tmp26 = __cil_tmp25 & 8191U;
#line 810
  if (__cil_tmp26 == 0U) {
#line 812
    return ((struct rfd *)0);
  } else {

  }
  }
  {
#line 815
  __cil_tmp27 = rx_local->local_psr_full;
#line 815
  __cil_tmp28 = (unsigned long )__cil_tmp27;
#line 815
  __cil_tmp29 = __cil_tmp28 & 4095UL;
#line 815
  __cil_tmp30 = rx_local->pPSRingVa;
#line 815
  __cil_tmp31 = (struct pkt_stat_desc *)__cil_tmp30;
#line 815
  psr = __cil_tmp31 + __cil_tmp29;
#line 822
  __cil_tmp32 = psr->word1;
#line 822
  len = __cil_tmp32 & 65535U;
#line 823
  __cil_tmp33 = psr->word1;
#line 823
  __cil_tmp34 = __cil_tmp33 >> 26;
#line 823
  __cil_tmp35 = (u8 )__cil_tmp34;
#line 823
  __cil_tmp36 = (unsigned int )__cil_tmp35;
#line 823
  __cil_tmp37 = __cil_tmp36 & 3U;
#line 823
  rindex = (u8 )__cil_tmp37;
#line 824
  __cil_tmp38 = psr->word1;
#line 824
  __cil_tmp39 = __cil_tmp38 >> 16;
#line 824
  __cil_tmp40 = (u16 )__cil_tmp39;
#line 824
  __cil_tmp41 = (unsigned int )__cil_tmp40;
#line 824
  __cil_tmp42 = __cil_tmp41 & 1023U;
#line 824
  bindex = (u16 )__cil_tmp42;
#line 825
  word0 = psr->word0;
#line 829
  __cil_tmp43 = & rx_local->local_psr_full;
#line 829
  add_12bit(__cil_tmp43, 1);
  }
  {
#line 830
  __cil_tmp44 = rx_local->PsrNumEntries;
#line 830
  __cil_tmp45 = __cil_tmp44 - 1U;
#line 830
  __cil_tmp46 = rx_local->local_psr_full;
#line 830
  __cil_tmp47 = __cil_tmp46 & 4095U;
#line 830
  if (__cil_tmp47 > __cil_tmp45) {
#line 832
    __cil_tmp48 = rx_local->local_psr_full;
#line 832
    rx_local->local_psr_full = __cil_tmp48 & 4294963200U;
#line 833
    __cil_tmp49 = rx_local->local_psr_full;
#line 833
    rx_local->local_psr_full = __cil_tmp49 ^ 4096U;
  } else {

  }
  }
  {
#line 836
  __cil_tmp50 = rx_local->local_psr_full;
#line 836
  __cil_tmp51 = etdev->regs;
#line 836
  __cil_tmp52 = & __cil_tmp51->rxdma.psr_full_offset;
#line 836
  __cil_tmp53 = (void volatile   *)__cil_tmp52;
#line 836
  writel(__cil_tmp50, __cil_tmp53);
  }
  {
#line 845
  __cil_tmp54 = (unsigned int )rindex;
#line 845
  if (__cil_tmp54 > 1U) {
    {
#line 855
    __cil_tmp55 = etdev->pdev;
#line 855
    __cil_tmp56 = & __cil_tmp55->dev;
#line 855
    __cil_tmp57 = (struct device  const  *)__cil_tmp56;
#line 855
    __cil_tmp58 = rx_local->local_psr_full;
#line 855
    __cil_tmp59 = __cil_tmp58 & 4095U;
#line 855
    __cil_tmp60 = (int )bindex;
#line 855
    dev_err(__cil_tmp57, "NICRxPkts PSR Entry %d indicates length of %d and/or bad bi(%d)\n",
            __cil_tmp59, len, __cil_tmp60);
    }
#line 860
    return ((struct rfd *)0);
  } else {
    {
#line 845
    __cil_tmp61 = (unsigned int )rindex;
#line 845
    if (__cil_tmp61 == 0U) {
      {
#line 845
      __cil_tmp62 = rx_local->Fbr0NumEntries;
#line 845
      __cil_tmp63 = __cil_tmp62 - 1U;
#line 845
      __cil_tmp64 = (u32 )bindex;
#line 845
      if (__cil_tmp64 > __cil_tmp63) {
        {
#line 855
        __cil_tmp65 = etdev->pdev;
#line 855
        __cil_tmp66 = & __cil_tmp65->dev;
#line 855
        __cil_tmp67 = (struct device  const  *)__cil_tmp66;
#line 855
        __cil_tmp68 = rx_local->local_psr_full;
#line 855
        __cil_tmp69 = __cil_tmp68 & 4095U;
#line 855
        __cil_tmp70 = (int )bindex;
#line 855
        dev_err(__cil_tmp67, "NICRxPkts PSR Entry %d indicates length of %d and/or bad bi(%d)\n",
                __cil_tmp69, len, __cil_tmp70);
        }
#line 860
        return ((struct rfd *)0);
      } else {
#line 845
        goto _L;
      }
      }
    } else {
      _L: 
      {
#line 845
      __cil_tmp71 = (unsigned int )rindex;
#line 845
      if (__cil_tmp71 == 1U) {
        {
#line 845
        __cil_tmp72 = rx_local->Fbr1NumEntries;
#line 845
        __cil_tmp73 = __cil_tmp72 - 1U;
#line 845
        __cil_tmp74 = (u32 )bindex;
#line 845
        if (__cil_tmp74 > __cil_tmp73) {
          {
#line 855
          __cil_tmp75 = etdev->pdev;
#line 855
          __cil_tmp76 = & __cil_tmp75->dev;
#line 855
          __cil_tmp77 = (struct device  const  *)__cil_tmp76;
#line 855
          __cil_tmp78 = rx_local->local_psr_full;
#line 855
          __cil_tmp79 = __cil_tmp78 & 4095U;
#line 855
          __cil_tmp80 = (int )bindex;
#line 855
          dev_err(__cil_tmp77, "NICRxPkts PSR Entry %d indicates length of %d and/or bad bi(%d)\n",
                  __cil_tmp79, len, __cil_tmp80);
          }
#line 860
          return ((struct rfd *)0);
        } else {

        }
        }
      } else {

      }
      }
    }
    }
  }
  }
  {
#line 864
  __cil_tmp81 = & etdev->rcv_lock;
#line 864
  tmp = spinlock_check(__cil_tmp81);
#line 864
  flags = _raw_spin_lock_irqsave(tmp);
#line 866
  rfd = (struct rfd *)0;
#line 867
  element = rx_local->RecvList.next;
#line 868
  __mptr = (struct list_head  const  *)element;
#line 868
  rfd = (struct rfd *)__mptr;
  }
  {
#line 870
  __cil_tmp82 = (struct rfd *)0;
#line 870
  __cil_tmp83 = (unsigned long )__cil_tmp82;
#line 870
  __cil_tmp84 = (unsigned long )rfd;
#line 870
  if (__cil_tmp84 == __cil_tmp83) {
    {
#line 871
    __cil_tmp85 = & etdev->rcv_lock;
#line 871
    spin_unlock_irqrestore(__cil_tmp85, flags);
    }
#line 872
    return ((struct rfd *)0);
  } else {

  }
  }
  {
#line 875
  __cil_tmp86 = & rfd->list_node;
#line 875
  list_del(__cil_tmp86);
#line 876
  __cil_tmp87 = rx_local->nReadyRecv;
#line 876
  rx_local->nReadyRecv = __cil_tmp87 - 1U;
#line 878
  __cil_tmp88 = & etdev->rcv_lock;
#line 878
  spin_unlock_irqrestore(__cil_tmp88, flags);
#line 880
  rfd->bufferindex = bindex;
#line 881
  rfd->ringindex = rindex;
  }
#line 888
  if (len <= 63U) {
#line 889
    __cil_tmp89 = etdev->Stats.other_errors;
#line 889
    etdev->Stats.other_errors = __cil_tmp89 + 1U;
#line 890
    len = 0U;
  } else {

  }
#line 893
  if (len != 0U) {
    {
#line 894
    __cil_tmp90 = etdev->ReplicaPhyLoopbk;
#line 894
    __cil_tmp91 = (unsigned int )__cil_tmp90;
#line 894
    if (__cil_tmp91 == 1U) {
      {
#line 895
      __cil_tmp92 = rx_local->fbr[(int )rindex];
#line 895
      __cil_tmp93 = __cil_tmp92->virt[(int )bindex];
#line 895
      buf = (u8 *)__cil_tmp93;
#line 897
      __cil_tmp94 = (void const   *)buf;
#line 897
      __cil_tmp95 = __cil_tmp94 + 6U;
#line 897
      __cil_tmp96 = & etdev->addr;
#line 897
      __cil_tmp97 = (void const   *)__cil_tmp96;
#line 897
      tmp___1 = memcmp(__cil_tmp95, __cil_tmp97, 6UL);
      }
#line 897
      if (tmp___1 == 0) {
        {
#line 898
        __cil_tmp98 = (void const   *)buf;
#line 898
        __cil_tmp99 = __cil_tmp98 + 42U;
#line 898
        __cil_tmp100 = (void const   *)"Replica packet";
#line 898
        tmp___0 = memcmp(__cil_tmp99, __cil_tmp100, 14UL);
        }
#line 898
        if (tmp___0 != 0) {
#line 900
          etdev->ReplicaPhyLoopbkPF = (u8 )1U;
        } else {

        }
      } else {

      }
    } else {

    }
    }
    {
#line 906
    __cil_tmp101 = word0 & 16777216U;
#line 906
    if (__cil_tmp101 != 0U) {
      {
#line 906
      __cil_tmp102 = word0 & 33554432U;
#line 906
      if (__cil_tmp102 == 0U) {
        {
#line 915
        __cil_tmp103 = etdev->PacketFilter;
#line 915
        __cil_tmp104 = __cil_tmp103 & 2U;
#line 915
        if (__cil_tmp104 != 0U) {
          {
#line 915
          __cil_tmp105 = etdev->PacketFilter;
#line 915
          __cil_tmp106 = __cil_tmp105 & 8U;
#line 915
          if (__cil_tmp106 == 0U) {
            {
#line 915
            __cil_tmp107 = etdev->PacketFilter;
#line 915
            __cil_tmp108 = __cil_tmp107 & 16U;
#line 915
            if (__cil_tmp108 == 0U) {
#line 918
              __cil_tmp109 = rx_local->fbr[(int )rindex];
#line 918
              __cil_tmp110 = __cil_tmp109->virt[(int )bindex];
#line 918
              buf = (u8 *)__cil_tmp110;
#line 925
              i = 0U;
#line 925
              goto ldv_35774;
              ldv_35773: ;
              {
#line 928
              __cil_tmp111 = etdev->MCList[i][0];
#line 928
              __cil_tmp112 = (int )__cil_tmp111;
#line 928
              __cil_tmp113 = *buf;
#line 928
              __cil_tmp114 = (int )__cil_tmp113;
#line 928
              if (__cil_tmp114 == __cil_tmp112) {
                {
#line 928
                __cil_tmp115 = etdev->MCList[i][1];
#line 928
                __cil_tmp116 = (int )__cil_tmp115;
#line 928
                __cil_tmp117 = buf + 1UL;
#line 928
                __cil_tmp118 = *__cil_tmp117;
#line 928
                __cil_tmp119 = (int )__cil_tmp118;
#line 928
                if (__cil_tmp119 == __cil_tmp116) {
                  {
#line 928
                  __cil_tmp120 = etdev->MCList[i][2];
#line 928
                  __cil_tmp121 = (int )__cil_tmp120;
#line 928
                  __cil_tmp122 = buf + 2UL;
#line 928
                  __cil_tmp123 = *__cil_tmp122;
#line 928
                  __cil_tmp124 = (int )__cil_tmp123;
#line 928
                  if (__cil_tmp124 == __cil_tmp121) {
                    {
#line 928
                    __cil_tmp125 = etdev->MCList[i][3];
#line 928
                    __cil_tmp126 = (int )__cil_tmp125;
#line 928
                    __cil_tmp127 = buf + 3UL;
#line 928
                    __cil_tmp128 = *__cil_tmp127;
#line 928
                    __cil_tmp129 = (int )__cil_tmp128;
#line 928
                    if (__cil_tmp129 == __cil_tmp126) {
                      {
#line 928
                      __cil_tmp130 = etdev->MCList[i][4];
#line 928
                      __cil_tmp131 = (int )__cil_tmp130;
#line 928
                      __cil_tmp132 = buf + 4UL;
#line 928
                      __cil_tmp133 = *__cil_tmp132;
#line 928
                      __cil_tmp134 = (int )__cil_tmp133;
#line 928
                      if (__cil_tmp134 == __cil_tmp131) {
                        {
#line 928
                        __cil_tmp135 = etdev->MCList[i][5];
#line 928
                        __cil_tmp136 = (int )__cil_tmp135;
#line 928
                        __cil_tmp137 = buf + 5UL;
#line 928
                        __cil_tmp138 = *__cil_tmp137;
#line 928
                        __cil_tmp139 = (int )__cil_tmp138;
#line 928
                        if (__cil_tmp139 == __cil_tmp136) {
#line 940
                          goto ldv_35772;
                        } else {

                        }
                        }
                      } else {

                      }
                      }
                    } else {

                    }
                    }
                  } else {

                  }
                  }
                } else {

                }
                }
              } else {

              }
              }
#line 927
              i = i + 1U;
              ldv_35774: ;
              {
#line 925
              __cil_tmp140 = etdev->MCAddressCount;
#line 925
              if (__cil_tmp140 > i) {
#line 927
                goto ldv_35773;
              } else {
#line 929
                goto ldv_35772;
              }
              }
              ldv_35772: ;
              {
#line 952
              __cil_tmp141 = etdev->MCAddressCount;
#line 952
              if (__cil_tmp141 == i) {
#line 953
                len = 0U;
              } else {

              }
              }
            } else {

            }
            }
          } else {

          }
          }
        } else {

        }
        }
#line 956
        if (len != 0U) {
#line 957
          __cil_tmp142 = etdev->Stats.multircv;
#line 957
          etdev->Stats.multircv = __cil_tmp142 + 1U;
        } else {

        }
      } else {
#line 906
        goto _L___0;
      }
      }
    } else {
      _L___0: 
      {
#line 958
      __cil_tmp143 = word0 & 33554432U;
#line 958
      if (__cil_tmp143 != 0U) {
#line 959
        __cil_tmp144 = etdev->Stats.brdcstrcv;
#line 959
        etdev->Stats.brdcstrcv = __cil_tmp144 + 1U;
      } else {
#line 966
        __cil_tmp145 = etdev->Stats.unircv;
#line 966
        etdev->Stats.unircv = __cil_tmp145 + 1U;
      }
      }
    }
    }
  } else {

  }
#line 969
  if (len != 0U) {
    {
#line 970
    skb = (struct sk_buff *)0;
#line 973
    rfd->len = len;
#line 975
    __cil_tmp146 = rfd->len;
#line 975
    __cil_tmp147 = __cil_tmp146 + 2U;
#line 975
    skb = dev_alloc_skb(__cil_tmp147);
    }
    {
#line 976
    __cil_tmp148 = (struct sk_buff *)0;
#line 976
    __cil_tmp149 = (unsigned long )__cil_tmp148;
#line 976
    __cil_tmp150 = (unsigned long )skb;
#line 976
    if (__cil_tmp150 == __cil_tmp149) {
      {
#line 977
      __cil_tmp151 = etdev->pdev;
#line 977
      __cil_tmp152 = & __cil_tmp151->dev;
#line 977
      __cil_tmp153 = (struct device  const  *)__cil_tmp152;
#line 977
      dev_err(__cil_tmp153, "Couldn\'t alloc an SKB for Rx\n");
      }
#line 979
      return ((struct rfd *)0);
    } else {

    }
    }
    {
#line 982
    __cil_tmp154 = rfd->len;
#line 982
    __cil_tmp155 = (unsigned long )__cil_tmp154;
#line 982
    __cil_tmp156 = etdev->net_stats.rx_bytes;
#line 982
    etdev->net_stats.rx_bytes = __cil_tmp156 + __cil_tmp155;
#line 984
    __cil_tmp157 = rfd->len;
#line 984
    __len = (size_t )__cil_tmp157;
#line 984
    __cil_tmp158 = rfd->len;
#line 984
    tmp___3 = skb_put(skb, __cil_tmp158);
#line 984
    __cil_tmp159 = (void *)tmp___3;
#line 984
    __cil_tmp160 = rx_local->fbr[(int )rindex];
#line 984
    __cil_tmp161 = __cil_tmp160->virt[(int )bindex];
#line 984
    __cil_tmp162 = (void const   *)__cil_tmp161;
#line 984
    __ret = __builtin_memcpy(__cil_tmp159, __cil_tmp162, __len);
#line 988
    skb->dev = etdev->netdev;
#line 989
    __cil_tmp163 = etdev->netdev;
#line 989
    skb->protocol = eth_type_trans(skb, __cil_tmp163);
#line 990
    skb->ip_summed = (unsigned char)0;
#line 992
    netif_rx(skb);
    }
  } else {
#line 994
    rfd->len = 0U;
  }
  {
#line 997
  nic_return_rfd(etdev, rfd);
  }
#line 998
  return (rfd);
}
}
#line 1007 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void et131x_reset_recv(struct et131x_adapter *etdev ) 
{ int __ret_warn_on ;
  int tmp ;
  long tmp___0 ;
  struct list_head *__cil_tmp5 ;
  struct list_head  const  *__cil_tmp6 ;
  int __cil_tmp7 ;
  long __cil_tmp8 ;
  int __cil_tmp9 ;
  int __cil_tmp10 ;
  int __cil_tmp11 ;
  long __cil_tmp12 ;

  {
  {
#line 1009
  __cil_tmp5 = & etdev->rx_ring.RecvList;
#line 1009
  __cil_tmp6 = (struct list_head  const  *)__cil_tmp5;
#line 1009
  tmp = list_empty(__cil_tmp6);
#line 1009
  __ret_warn_on = tmp != 0;
#line 1009
  __cil_tmp7 = __ret_warn_on != 0;
#line 1009
  __cil_tmp8 = (long )__cil_tmp7;
#line 1009
  tmp___0 = __builtin_expect(__cil_tmp8, 0L);
  }
#line 1009
  if (tmp___0 != 0L) {
    {
#line 1009
    __cil_tmp9 = (int const   )1009;
#line 1009
    __cil_tmp10 = (int )__cil_tmp9;
#line 1009
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p",
                       __cil_tmp10);
    }
  } else {

  }
  {
#line 1009
  __cil_tmp11 = __ret_warn_on != 0;
#line 1009
  __cil_tmp12 = (long )__cil_tmp11;
#line 1009
  __builtin_expect(__cil_tmp12, 0L);
  }
#line 1011
  return;
}
}
#line 1019 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void et131x_handle_recv_interrupt(struct et131x_adapter *etdev ) 
{ struct rfd *rfd ;
  u32 count ;
  bool done ;
  int __ret_warn_on ;
  long tmp ;
  int tmp___0 ;
  struct list_head *__cil_tmp8 ;
  struct list_head  const  *__cil_tmp9 ;
  u32 __cil_tmp10 ;
  int __cil_tmp11 ;
  long __cil_tmp12 ;
  int __cil_tmp13 ;
  int __cil_tmp14 ;
  int __cil_tmp15 ;
  long __cil_tmp16 ;
  struct rfd *__cil_tmp17 ;
  unsigned long __cil_tmp18 ;
  unsigned long __cil_tmp19 ;
  u32 __cil_tmp20 ;
  u32 __cil_tmp21 ;
  unsigned int __cil_tmp22 ;
  u32 __cil_tmp23 ;
  uint64_t __cil_tmp24 ;
  u32 __cil_tmp25 ;
  struct pci_dev *__cil_tmp26 ;
  struct device *__cil_tmp27 ;
  struct device  const  *__cil_tmp28 ;
  ADDRESS_MAP_t *__cil_tmp29 ;
  u32 *__cil_tmp30 ;
  void volatile   *__cil_tmp31 ;
  ADDRESS_MAP_t *__cil_tmp32 ;
  u32 *__cil_tmp33 ;
  void volatile   *__cil_tmp34 ;

  {
#line 1021
  rfd = (struct rfd *)0;
#line 1022
  count = 0U;
#line 1023
  done = (bool )1;
#line 1026
  goto ldv_35793;
  ldv_35794: 
  {
#line 1027
  __cil_tmp8 = & etdev->rx_ring.RecvList;
#line 1027
  __cil_tmp9 = (struct list_head  const  *)__cil_tmp8;
#line 1027
  tmp___0 = list_empty(__cil_tmp9);
  }
#line 1027
  if (tmp___0 != 0) {
    {
#line 1028
    __cil_tmp10 = etdev->rx_ring.nReadyRecv;
#line 1028
    __ret_warn_on = __cil_tmp10 != 0U;
#line 1028
    __cil_tmp11 = __ret_warn_on != 0;
#line 1028
    __cil_tmp12 = (long )__cil_tmp11;
#line 1028
    tmp = __builtin_expect(__cil_tmp12, 0L);
    }
#line 1028
    if (tmp != 0L) {
      {
#line 1028
      __cil_tmp13 = (int const   )1028;
#line 1028
      __cil_tmp14 = (int )__cil_tmp13;
#line 1028
      warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p",
                         __cil_tmp14);
      }
    } else {

    }
    {
#line 1028
    __cil_tmp15 = __ret_warn_on != 0;
#line 1028
    __cil_tmp16 = (long )__cil_tmp15;
#line 1028
    __builtin_expect(__cil_tmp16, 0L);
#line 1029
    done = (bool )0;
    }
#line 1030
    goto ldv_35792;
  } else {

  }
  {
#line 1033
  rfd = nic_rx_pkts(etdev);
  }
  {
#line 1035
  __cil_tmp17 = (struct rfd *)0;
#line 1035
  __cil_tmp18 = (unsigned long )__cil_tmp17;
#line 1035
  __cil_tmp19 = (unsigned long )rfd;
#line 1035
  if (__cil_tmp19 == __cil_tmp18) {
#line 1036
    goto ldv_35792;
  } else {

  }
  }
  {
#line 1043
  __cil_tmp20 = etdev->PacketFilter;
#line 1043
  if (__cil_tmp20 == 0U) {
#line 1046
    goto ldv_35793;
  } else {
    {
#line 1043
    __cil_tmp21 = etdev->Flags;
#line 1043
    __cil_tmp22 = __cil_tmp21 & 536870912U;
#line 1043
    if (__cil_tmp22 == 0U) {
#line 1046
      goto ldv_35793;
    } else {
      {
#line 1043
      __cil_tmp23 = rfd->len;
#line 1043
      if (__cil_tmp23 == 0U) {
#line 1046
        goto ldv_35793;
      } else {

      }
      }
    }
    }
  }
  }
#line 1050
  __cil_tmp24 = etdev->Stats.ipackets;
#line 1050
  etdev->Stats.ipackets = __cil_tmp24 + 1ULL;
  {
#line 1053
  __cil_tmp25 = etdev->rx_ring.nReadyRecv;
#line 1053
  if (__cil_tmp25 <= 39U) {
    {
#line 1054
    __cil_tmp26 = etdev->pdev;
#line 1054
    __cil_tmp27 = & __cil_tmp26->dev;
#line 1054
    __cil_tmp28 = (struct device  const  *)__cil_tmp27;
#line 1054
    dev_warn(__cil_tmp28, "RFD\'s are running out\n");
    }
  } else {

  }
  }
#line 1057
  count = count + 1U;
  ldv_35793: ;
#line 1026
  if (count <= 255U) {
#line 1027
    goto ldv_35794;
  } else {
#line 1029
    goto ldv_35792;
  }
  ldv_35792: ;
#line 1060
  if (count == 256U) {
    {
#line 1061
    etdev->rx_ring.UnfinishedReceives = (bool )1;
#line 1062
    __cil_tmp29 = etdev->regs;
#line 1062
    __cil_tmp30 = & __cil_tmp29->global.watchdog_timer;
#line 1062
    __cil_tmp31 = (void volatile   *)__cil_tmp30;
#line 1062
    writel(40000U, __cil_tmp31);
    }
  } else
#line 1060
  if (! done) {
    {
#line 1061
    etdev->rx_ring.UnfinishedReceives = (bool )1;
#line 1062
    __cil_tmp32 = etdev->regs;
#line 1062
    __cil_tmp33 = & __cil_tmp32->global.watchdog_timer;
#line 1062
    __cil_tmp34 = (void volatile   *)__cil_tmp33;
#line 1062
    writel(40000U, __cil_tmp34);
    }
  } else {
#line 1066
    etdev->rx_ring.UnfinishedReceives = (bool )0;
  }
#line 1067
  return;
}
}
#line 1069 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
__inline static u32 bump_fbr(u32 *fbr , u32 limit ) 
{ u32 v ;
  unsigned int __cil_tmp4 ;

  {
#line 1071
  v = *fbr;
#line 1072
  v = v + 1U;
  {
#line 1077
  __cil_tmp4 = v & 1023U;
#line 1077
  if (__cil_tmp4 > limit) {
#line 1078
    v = v & 4294966272U;
#line 1079
    v = v ^ 1024U;
  } else {

  }
  }
#line 1082
  v = v & 2047U;
#line 1083
  *fbr = v;
#line 1084
  return (v);
}
}
#line 1092 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p"
void nic_return_rfd(struct et131x_adapter *etdev , struct rfd *rfd ) 
{ struct rx_ring *rx_local ;
  struct rxdma_regs *rx_dma ;
  u16 bi ;
  u8 ri ;
  unsigned long flags ;
  raw_spinlock_t *tmp ;
  struct fbr_desc *next ;
  u32 tmp___0 ;
  struct fbr_desc *next___0 ;
  u32 tmp___1 ;
  raw_spinlock_t *tmp___2 ;
  int __ret_warn_on ;
  long tmp___3 ;
  ADDRESS_MAP_t *__cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  u32 __cil_tmp18 ;
  u32 __cil_tmp19 ;
  unsigned int __cil_tmp20 ;
  u32 __cil_tmp21 ;
  u32 __cil_tmp22 ;
  spinlock_t *__cil_tmp23 ;
  unsigned int __cil_tmp24 ;
  u32 __cil_tmp25 ;
  unsigned long __cil_tmp26 ;
  unsigned long __cil_tmp27 ;
  void *__cil_tmp28 ;
  struct fbr_desc *__cil_tmp29 ;
  struct fbr_lookup *__cil_tmp30 ;
  struct fbr_lookup *__cil_tmp31 ;
  u32 *__cil_tmp32 ;
  u32 __cil_tmp33 ;
  u32 __cil_tmp34 ;
  u32 *__cil_tmp35 ;
  void volatile   *__cil_tmp36 ;
  u32 __cil_tmp37 ;
  unsigned long __cil_tmp38 ;
  unsigned long __cil_tmp39 ;
  void *__cil_tmp40 ;
  struct fbr_desc *__cil_tmp41 ;
  struct fbr_lookup *__cil_tmp42 ;
  struct fbr_lookup *__cil_tmp43 ;
  u32 *__cil_tmp44 ;
  u32 __cil_tmp45 ;
  u32 __cil_tmp46 ;
  u32 *__cil_tmp47 ;
  void volatile   *__cil_tmp48 ;
  spinlock_t *__cil_tmp49 ;
  struct pci_dev *__cil_tmp50 ;
  struct device *__cil_tmp51 ;
  struct device  const  *__cil_tmp52 ;
  struct pci_dev *__cil_tmp53 ;
  struct device *__cil_tmp54 ;
  struct device  const  *__cil_tmp55 ;
  spinlock_t *__cil_tmp56 ;
  struct list_head *__cil_tmp57 ;
  struct list_head *__cil_tmp58 ;
  u32 __cil_tmp59 ;
  spinlock_t *__cil_tmp60 ;
  u32 __cil_tmp61 ;
  u32 __cil_tmp62 ;
  int __cil_tmp63 ;
  long __cil_tmp64 ;
  int __cil_tmp65 ;
  int __cil_tmp66 ;
  int __cil_tmp67 ;
  long __cil_tmp68 ;

  {
#line 1094
  rx_local = & etdev->rx_ring;
#line 1095
  __cil_tmp16 = etdev->regs;
#line 1095
  rx_dma = & __cil_tmp16->rxdma;
#line 1096
  bi = rfd->bufferindex;
#line 1097
  ri = rfd->ringindex;
  {
#line 1103
  __cil_tmp17 = (unsigned int )ri;
#line 1103
  if (__cil_tmp17 == 0U) {
    {
#line 1103
    __cil_tmp18 = rx_local->Fbr0NumEntries;
#line 1103
    __cil_tmp19 = (u32 )bi;
#line 1103
    if (__cil_tmp19 < __cil_tmp18) {
#line 1103
      goto _L;
    } else {
#line 1103
      goto _L___0;
    }
    }
  } else {
    _L___0: 
    {
#line 1103
    __cil_tmp20 = (unsigned int )ri;
#line 1103
    if (__cil_tmp20 == 1U) {
      {
#line 1103
      __cil_tmp21 = rx_local->Fbr1NumEntries;
#line 1103
      __cil_tmp22 = (u32 )bi;
#line 1103
      if (__cil_tmp22 < __cil_tmp21) {
        _L: 
        {
#line 1108
        __cil_tmp23 = & etdev->FbrLock;
#line 1108
        tmp = spinlock_check(__cil_tmp23);
#line 1108
        flags = _raw_spin_lock_irqsave(tmp);
        }
        {
#line 1110
        __cil_tmp24 = (unsigned int )ri;
#line 1110
        if (__cil_tmp24 == 1U) {
          {
#line 1111
          __cil_tmp25 = rx_local->local_Fbr1_full;
#line 1111
          __cil_tmp26 = (unsigned long )__cil_tmp25;
#line 1111
          __cil_tmp27 = __cil_tmp26 & 1023UL;
#line 1111
          __cil_tmp28 = rx_local->pFbr1RingVa;
#line 1111
          __cil_tmp29 = (struct fbr_desc *)__cil_tmp28;
#line 1111
          next = __cil_tmp29 + __cil_tmp27;
#line 1119
          __cil_tmp30 = rx_local->fbr[1];
#line 1119
          next->addr_hi = __cil_tmp30->bus_high[(int )bi];
#line 1120
          __cil_tmp31 = rx_local->fbr[1];
#line 1120
          next->addr_lo = __cil_tmp31->bus_low[(int )bi];
#line 1121
          next->word2 = (u32 )bi;
#line 1123
          __cil_tmp32 = & rx_local->local_Fbr1_full;
#line 1123
          __cil_tmp33 = rx_local->Fbr1NumEntries;
#line 1123
          __cil_tmp34 = __cil_tmp33 - 1U;
#line 1123
          tmp___0 = bump_fbr(__cil_tmp32, __cil_tmp34);
#line 1123
          __cil_tmp35 = & rx_dma->fbr1_full_offset;
#line 1123
          __cil_tmp36 = (void volatile   *)__cil_tmp35;
#line 1123
          writel(tmp___0, __cil_tmp36);
          }
        } else {
          {
#line 1129
          __cil_tmp37 = rx_local->local_Fbr0_full;
#line 1129
          __cil_tmp38 = (unsigned long )__cil_tmp37;
#line 1129
          __cil_tmp39 = __cil_tmp38 & 1023UL;
#line 1129
          __cil_tmp40 = rx_local->pFbr0RingVa;
#line 1129
          __cil_tmp41 = (struct fbr_desc *)__cil_tmp40;
#line 1129
          next___0 = __cil_tmp41 + __cil_tmp39;
#line 1137
          __cil_tmp42 = rx_local->fbr[0];
#line 1137
          next___0->addr_hi = __cil_tmp42->bus_high[(int )bi];
#line 1138
          __cil_tmp43 = rx_local->fbr[0];
#line 1138
          next___0->addr_lo = __cil_tmp43->bus_low[(int )bi];
#line 1139
          next___0->word2 = (u32 )bi;
#line 1141
          __cil_tmp44 = & rx_local->local_Fbr0_full;
#line 1141
          __cil_tmp45 = rx_local->Fbr0NumEntries;
#line 1141
          __cil_tmp46 = __cil_tmp45 - 1U;
#line 1141
          tmp___1 = bump_fbr(__cil_tmp44, __cil_tmp46);
#line 1141
          __cil_tmp47 = & rx_dma->fbr0_full_offset;
#line 1141
          __cil_tmp48 = (void volatile   *)__cil_tmp47;
#line 1141
          writel(tmp___1, __cil_tmp48);
          }
        }
        }
        {
#line 1146
        __cil_tmp49 = & etdev->FbrLock;
#line 1146
        spin_unlock_irqrestore(__cil_tmp49, flags);
        }
      } else {
        {
#line 1148
        __cil_tmp50 = etdev->pdev;
#line 1148
        __cil_tmp51 = & __cil_tmp50->dev;
#line 1148
        __cil_tmp52 = (struct device  const  *)__cil_tmp51;
#line 1148
        dev_err(__cil_tmp52, "NICReturnRFD illegal Buffer Index returned\n");
        }
      }
      }
    } else {
      {
#line 1148
      __cil_tmp53 = etdev->pdev;
#line 1148
      __cil_tmp54 = & __cil_tmp53->dev;
#line 1148
      __cil_tmp55 = (struct device  const  *)__cil_tmp54;
#line 1148
      dev_err(__cil_tmp55, "NICReturnRFD illegal Buffer Index returned\n");
      }
    }
    }
  }
  }
  {
#line 1155
  __cil_tmp56 = & etdev->rcv_lock;
#line 1155
  tmp___2 = spinlock_check(__cil_tmp56);
#line 1155
  flags = _raw_spin_lock_irqsave(tmp___2);
#line 1156
  __cil_tmp57 = & rfd->list_node;
#line 1156
  __cil_tmp58 = & rx_local->RecvList;
#line 1156
  list_add_tail(__cil_tmp57, __cil_tmp58);
#line 1157
  __cil_tmp59 = rx_local->nReadyRecv;
#line 1157
  rx_local->nReadyRecv = __cil_tmp59 + 1U;
#line 1158
  __cil_tmp60 = & etdev->rcv_lock;
#line 1158
  spin_unlock_irqrestore(__cil_tmp60, flags);
#line 1160
  __cil_tmp61 = rx_local->NumRfd;
#line 1160
  __cil_tmp62 = rx_local->nReadyRecv;
#line 1160
  __ret_warn_on = __cil_tmp62 > __cil_tmp61;
#line 1160
  __cil_tmp63 = __ret_warn_on != 0;
#line 1160
  __cil_tmp64 = (long )__cil_tmp63;
#line 1160
  tmp___3 = __builtin_expect(__cil_tmp64, 0L);
  }
#line 1160
  if (tmp___3 != 0L) {
    {
#line 1160
    __cil_tmp65 = (int const   )1160;
#line 1160
    __cil_tmp66 = (int )__cil_tmp65;
#line 1160
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_rx.c.p",
                       __cil_tmp66);
    }
  } else {

  }
  {
#line 1160
  __cil_tmp67 = __ret_warn_on != 0;
#line 1160
  __cil_tmp68 = (long )__cil_tmp67;
#line 1160
  __builtin_expect(__cil_tmp68, 0L);
  }
#line 1162
  return;
}
}
#line 98 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/bitops.h"
__inline static void clear_bit(int nr , unsigned long volatile   *addr ) 
{ long volatile   *__cil_tmp3 ;

  {
#line 105
  __cil_tmp3 = (long volatile   *)addr;
#line 105
  __asm__  volatile   (".section .smp_locks,\"a\"\n.balign 4\n.long 671f - .\n.previous\n671:\n\tlock; btr %1,%0": "+m" (*__cil_tmp3): "Ir" (nr));
#line 107
  return;
}
}
#line 246 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/bitops.h"
__inline static int test_and_clear_bit(int nr , unsigned long volatile   *addr ) 
{ int oldbit ;
  long volatile   *__cil_tmp4 ;

  {
#line 250
  __cil_tmp4 = (long volatile   *)addr;
#line 250
  __asm__  volatile   (".section .smp_locks,\"a\"\n.balign 4\n.long 671f - .\n.previous\n671:\n\tlock; btr %2,%1\n\tsbb %0,%0": "=r" (oldbit),
                       "+m" (*__cil_tmp4): "Ir" (nr): "memory");
#line 254
  return (oldbit);
}
}
#line 309 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/bitops.h"
__inline static int constant_test_bit(unsigned int nr , unsigned long const volatile   *addr ) 
{ int __cil_tmp3 ;
  int __cil_tmp4 ;
  unsigned int __cil_tmp5 ;
  unsigned long __cil_tmp6 ;
  unsigned long const volatile   *__cil_tmp7 ;
  unsigned long volatile   __cil_tmp8 ;
  unsigned long __cil_tmp9 ;
  unsigned long __cil_tmp10 ;
  int __cil_tmp11 ;

  {
  {
#line 311
  __cil_tmp3 = (int )nr;
#line 311
  __cil_tmp4 = __cil_tmp3 & 63;
#line 311
  __cil_tmp5 = nr / 64U;
#line 311
  __cil_tmp6 = (unsigned long )__cil_tmp5;
#line 311
  __cil_tmp7 = addr + __cil_tmp6;
#line 311
  __cil_tmp8 = *__cil_tmp7;
#line 311
  __cil_tmp9 = (unsigned long )__cil_tmp8;
#line 311
  __cil_tmp10 = __cil_tmp9 >> __cil_tmp4;
#line 311
  __cil_tmp11 = (int )__cil_tmp10;
#line 311
  return (__cil_tmp11 & 1);
  }
}
}
#line 61 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/page_64_types.h"
extern unsigned long __phys_addr(unsigned long  ) ;
#line 93 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/atomic.h"
__inline static void atomic_inc(atomic_t *v ) 
{ 

  {
#line 95
  __asm__  volatile   (".section .smp_locks,\"a\"\n.balign 4\n.long 671f - .\n.previous\n671:\n\tlock; incl %0": "+m" (v->counter));
#line 97
  return;
}
}
#line 22 "include/linux/spinlock_api_smp.h"
extern void _raw_spin_lock(raw_spinlock_t * ) ;
#line 39
extern void _raw_spin_unlock(raw_spinlock_t * ) ;
#line 283 "include/linux/spinlock.h"
__inline static void spin_lock(spinlock_t *lock ) 
{ struct raw_spinlock *__cil_tmp2 ;

  {
  {
#line 285
  __cil_tmp2 = & lock->ldv_6060.rlock;
#line 285
  _raw_spin_lock(__cil_tmp2);
  }
#line 286
  return;
}
}
#line 323 "include/linux/spinlock.h"
__inline static void spin_unlock(spinlock_t *lock ) 
{ struct raw_spinlock *__cil_tmp2 ;

  {
  {
#line 325
  __cil_tmp2 = & lock->ldv_6060.rlock;
#line 325
  _raw_spin_unlock(__cil_tmp2);
  }
#line 326
  return;
}
}
#line 720 "include/linux/mm.h"
__inline static void *lowmem_page_address(struct page *page ) 
{ long __cil_tmp2 ;
  long __cil_tmp3 ;
  long __cil_tmp4 ;
  unsigned long long __cil_tmp5 ;
  unsigned long long __cil_tmp6 ;
  unsigned long __cil_tmp7 ;
  unsigned long __cil_tmp8 ;

  {
  {
#line 722
  __cil_tmp2 = (long )page;
#line 722
  __cil_tmp3 = __cil_tmp2 + 24189255811072L;
#line 722
  __cil_tmp4 = __cil_tmp3 / 56L;
#line 722
  __cil_tmp5 = (unsigned long long )__cil_tmp4;
#line 722
  __cil_tmp6 = __cil_tmp5 << 12;
#line 722
  __cil_tmp7 = (unsigned long )__cil_tmp6;
#line 722
  __cil_tmp8 = __cil_tmp7 + 1152789563211513856UL;
#line 722
  return ((void *)__cil_tmp8);
  }
}
}
#line 223 "include/linux/slab.h"
__inline static void *kcalloc(size_t n , size_t size , gfp_t flags ) 
{ void *tmp ;
  unsigned long __cil_tmp5 ;
  size_t __cil_tmp6 ;
  unsigned int __cil_tmp7 ;

  {
#line 225
  if (size != 0UL) {
    {
#line 225
    __cil_tmp5 = 1152921504606846975UL / size;
#line 225
    if (__cil_tmp5 < n) {
#line 226
      return ((void *)0);
    } else {

    }
    }
  } else {

  }
  {
#line 227
  __cil_tmp6 = n * size;
#line 227
  __cil_tmp7 = flags | 32768U;
#line 227
  tmp = __kmalloc(__cil_tmp6, __cil_tmp7);
  }
#line 227
  return (tmp);
}
}
#line 80 "include/linux/dma-mapping.h"
__inline static int valid_dma_direction(int dma_direction ) 
{ int tmp ;

  {
#line 82
  if (dma_direction == 0) {
#line 82
    tmp = 1;
  } else
#line 82
  if (dma_direction == 1) {
#line 82
    tmp = 1;
  } else
#line 82
  if (dma_direction == 2) {
#line 82
    tmp = 1;
  } else {
#line 82
    tmp = 0;
  }
#line 82
  return (tmp);
}
}
#line 131 "include/linux/kmemcheck.h"
__inline static void kmemcheck_mark_initialized(void *address , unsigned int n ) 
{ 

  {
#line 133
  return;
}
}
#line 37 "include/linux/dma-debug.h"
extern void debug_dma_map_page(struct device * , struct page * , size_t  , size_t  ,
                               int  , dma_addr_t  , bool  ) ;
#line 42
extern void debug_dma_unmap_page(struct device * , dma_addr_t  , size_t  , int  ,
                                 bool  ) ;
#line 9 "include/asm-generic/dma-mapping-common.h"
__inline static dma_addr_t dma_map_single_attrs(struct device *dev , void *ptr , size_t size ,
                                                enum dma_data_direction dir , struct dma_attrs *attrs ) 
{ struct dma_map_ops *ops ;
  struct dma_map_ops *tmp ;
  dma_addr_t addr ;
  int tmp___0 ;
  long tmp___1 ;
  unsigned long tmp___2 ;
  unsigned long tmp___3 ;
  unsigned int __cil_tmp13 ;
  int __cil_tmp14 ;
  int __cil_tmp15 ;
  long __cil_tmp16 ;
  unsigned long __cil_tmp17 ;
  dma_addr_t (*__cil_tmp18)(struct device * , struct page * , unsigned long  , size_t  ,
                            enum dma_data_direction  , struct dma_attrs * ) ;
  unsigned long __cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  struct page *__cil_tmp21 ;
  unsigned long __cil_tmp22 ;
  unsigned long __cil_tmp23 ;
  unsigned long __cil_tmp24 ;
  unsigned long __cil_tmp25 ;
  unsigned long __cil_tmp26 ;
  struct page *__cil_tmp27 ;
  unsigned long __cil_tmp28 ;
  unsigned long __cil_tmp29 ;
  int __cil_tmp30 ;
  bool __cil_tmp31 ;

  {
  {
#line 14
  tmp = get_dma_ops(dev);
#line 14
  ops = tmp;
#line 17
  __cil_tmp13 = (unsigned int )size;
#line 17
  kmemcheck_mark_initialized(ptr, __cil_tmp13);
#line 18
  __cil_tmp14 = (int )dir;
#line 18
  tmp___0 = valid_dma_direction(__cil_tmp14);
#line 18
  __cil_tmp15 = tmp___0 == 0;
#line 18
  __cil_tmp16 = (long )__cil_tmp15;
#line 18
  tmp___1 = __builtin_expect(__cil_tmp16, 0L);
  }
#line 18
  if (tmp___1 != 0L) {
#line 18
    __asm__  volatile   ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"),
                         "i" (18), "i" (12UL));
    ldv_18949: ;
#line 18
    goto ldv_18949;
  } else {

  }
  {
#line 19
  __cil_tmp17 = (unsigned long )ptr;
#line 19
  tmp___2 = __phys_addr(__cil_tmp17);
#line 19
  __cil_tmp18 = ops->map_page;
#line 19
  __cil_tmp19 = tmp___2 >> 12;
#line 19
  __cil_tmp20 = 1152897315351035904UL + __cil_tmp19;
#line 19
  __cil_tmp21 = (struct page *)__cil_tmp20;
#line 19
  __cil_tmp22 = (unsigned long )ptr;
#line 19
  __cil_tmp23 = __cil_tmp22 & 4095UL;
#line 19
  addr = (*__cil_tmp18)(dev, __cil_tmp21, __cil_tmp23, size, dir, attrs);
#line 22
  __cil_tmp24 = (unsigned long )ptr;
#line 22
  tmp___3 = __phys_addr(__cil_tmp24);
#line 22
  __cil_tmp25 = tmp___3 >> 12;
#line 22
  __cil_tmp26 = 1152897315351035904UL + __cil_tmp25;
#line 22
  __cil_tmp27 = (struct page *)__cil_tmp26;
#line 22
  __cil_tmp28 = (unsigned long )ptr;
#line 22
  __cil_tmp29 = __cil_tmp28 & 4095UL;
#line 22
  __cil_tmp30 = (int )dir;
#line 22
  __cil_tmp31 = (bool )1;
#line 22
  debug_dma_map_page(dev, __cil_tmp27, __cil_tmp29, size, __cil_tmp30, addr, __cil_tmp31);
  }
#line 25
  return (addr);
}
}
#line 28 "include/asm-generic/dma-mapping-common.h"
__inline static void dma_unmap_single_attrs(struct device *dev , dma_addr_t addr ,
                                            size_t size , enum dma_data_direction dir ,
                                            struct dma_attrs *attrs ) 
{ struct dma_map_ops *ops ;
  struct dma_map_ops *tmp ;
  int tmp___0 ;
  long tmp___1 ;
  int __cil_tmp10 ;
  int __cil_tmp11 ;
  long __cil_tmp12 ;
  void (*__cil_tmp13)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ,
                      struct dma_attrs * ) ;
  unsigned long __cil_tmp14 ;
  void (*__cil_tmp15)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ,
                      struct dma_attrs * ) ;
  unsigned long __cil_tmp16 ;
  void (*__cil_tmp17)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ,
                      struct dma_attrs * ) ;
  int __cil_tmp18 ;
  bool __cil_tmp19 ;

  {
  {
#line 33
  tmp = get_dma_ops(dev);
#line 33
  ops = tmp;
#line 35
  __cil_tmp10 = (int )dir;
#line 35
  tmp___0 = valid_dma_direction(__cil_tmp10);
#line 35
  __cil_tmp11 = tmp___0 == 0;
#line 35
  __cil_tmp12 = (long )__cil_tmp11;
#line 35
  tmp___1 = __builtin_expect(__cil_tmp12, 0L);
  }
#line 35
  if (tmp___1 != 0L) {
#line 35
    __asm__  volatile   ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"),
                         "i" (35), "i" (12UL));
    ldv_18958: ;
#line 35
    goto ldv_18958;
  } else {

  }
  {
#line 36
  __cil_tmp13 = (void (*)(struct device * , dma_addr_t  , size_t  , enum dma_data_direction  ,
                          struct dma_attrs * ))0;
#line 36
  __cil_tmp14 = (unsigned long )__cil_tmp13;
#line 36
  __cil_tmp15 = ops->unmap_page;
#line 36
  __cil_tmp16 = (unsigned long )__cil_tmp15;
#line 36
  if (__cil_tmp16 != __cil_tmp14) {
    {
#line 37
    __cil_tmp17 = ops->unmap_page;
#line 37
    (*__cil_tmp17)(dev, addr, size, dir, attrs);
    }
  } else {

  }
  }
  {
#line 38
  __cil_tmp18 = (int )dir;
#line 38
  __cil_tmp19 = (bool )1;
#line 38
  debug_dma_unmap_page(dev, addr, size, __cil_tmp18, __cil_tmp19);
  }
#line 39
  return;
}
}
#line 70 "include/asm-generic/dma-mapping-common.h"
__inline static dma_addr_t dma_map_page(struct device *dev , struct page *page , size_t offset ,
                                        size_t size , enum dma_data_direction dir ) 
{ struct dma_map_ops *ops ;
  struct dma_map_ops *tmp ;
  dma_addr_t addr ;
  void *tmp___0 ;
  int tmp___1 ;
  long tmp___2 ;
  void *__cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  int __cil_tmp14 ;
  int __cil_tmp15 ;
  long __cil_tmp16 ;
  dma_addr_t (*__cil_tmp17)(struct device * , struct page * , unsigned long  , size_t  ,
                            enum dma_data_direction  , struct dma_attrs * ) ;
  struct dma_attrs *__cil_tmp18 ;
  int __cil_tmp19 ;
  bool __cil_tmp20 ;

  {
  {
#line 74
  tmp = get_dma_ops(dev);
#line 74
  ops = tmp;
#line 77
  tmp___0 = lowmem_page_address(page);
#line 77
  __cil_tmp12 = tmp___0 + offset;
#line 77
  __cil_tmp13 = (unsigned int )size;
#line 77
  kmemcheck_mark_initialized(__cil_tmp12, __cil_tmp13);
#line 78
  __cil_tmp14 = (int )dir;
#line 78
  tmp___1 = valid_dma_direction(__cil_tmp14);
#line 78
  __cil_tmp15 = tmp___1 == 0;
#line 78
  __cil_tmp16 = (long )__cil_tmp15;
#line 78
  tmp___2 = __builtin_expect(__cil_tmp16, 0L);
  }
#line 78
  if (tmp___2 != 0L) {
#line 78
    __asm__  volatile   ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"),
                         "i" (78), "i" (12UL));
    ldv_18992: ;
#line 78
    goto ldv_18992;
  } else {

  }
  {
#line 79
  __cil_tmp17 = ops->map_page;
#line 79
  __cil_tmp18 = (struct dma_attrs *)0;
#line 79
  addr = (*__cil_tmp17)(dev, page, offset, size, dir, __cil_tmp18);
#line 80
  __cil_tmp19 = (int )dir;
#line 80
  __cil_tmp20 = (bool )0;
#line 80
  debug_dma_map_page(dev, page, offset, size, __cil_tmp19, addr, __cil_tmp20);
  }
#line 82
  return (addr);
}
}
#line 30 "include/asm-generic/pci-dma-compat.h"
__inline static dma_addr_t pci_map_single(struct pci_dev *hwdev , void *ptr , size_t size ,
                                          int direction ) 
{ struct device *tmp ;
  dma_addr_t tmp___0 ;
  struct pci_dev *__cil_tmp7 ;
  unsigned long __cil_tmp8 ;
  unsigned long __cil_tmp9 ;
  enum dma_data_direction __cil_tmp10 ;
  struct dma_attrs *__cil_tmp11 ;

  {
  {
#line 32
  __cil_tmp7 = (struct pci_dev *)0;
#line 32
  __cil_tmp8 = (unsigned long )__cil_tmp7;
#line 32
  __cil_tmp9 = (unsigned long )hwdev;
#line 32
  if (__cil_tmp9 != __cil_tmp8) {
#line 32
    tmp = & hwdev->dev;
  } else {
#line 32
    tmp = (struct device *)0;
  }
  }
  {
#line 32
  __cil_tmp10 = (enum dma_data_direction )direction;
#line 32
  __cil_tmp11 = (struct dma_attrs *)0;
#line 32
  tmp___0 = dma_map_single_attrs(tmp, ptr, size, __cil_tmp10, __cil_tmp11);
  }
#line 32
  return (tmp___0);
}
}
#line 36 "include/asm-generic/pci-dma-compat.h"
__inline static void pci_unmap_single(struct pci_dev *hwdev , dma_addr_t dma_addr ,
                                      size_t size , int direction ) 
{ struct device *tmp ;
  struct pci_dev *__cil_tmp6 ;
  unsigned long __cil_tmp7 ;
  unsigned long __cil_tmp8 ;
  enum dma_data_direction __cil_tmp9 ;
  struct dma_attrs *__cil_tmp10 ;

  {
  {
#line 39
  __cil_tmp6 = (struct pci_dev *)0;
#line 39
  __cil_tmp7 = (unsigned long )__cil_tmp6;
#line 39
  __cil_tmp8 = (unsigned long )hwdev;
#line 39
  if (__cil_tmp8 != __cil_tmp7) {
#line 39
    tmp = & hwdev->dev;
  } else {
#line 39
    tmp = (struct device *)0;
  }
  }
  {
#line 39
  __cil_tmp9 = (enum dma_data_direction )direction;
#line 39
  __cil_tmp10 = (struct dma_attrs *)0;
#line 39
  dma_unmap_single_attrs(tmp, dma_addr, size, __cil_tmp9, __cil_tmp10);
  }
#line 40
  return;
}
}
#line 43 "include/asm-generic/pci-dma-compat.h"
__inline static dma_addr_t pci_map_page(struct pci_dev *hwdev , struct page *page ,
                                        unsigned long offset , size_t size , int direction ) 
{ struct device *tmp ;
  dma_addr_t tmp___0 ;
  struct pci_dev *__cil_tmp8 ;
  unsigned long __cil_tmp9 ;
  unsigned long __cil_tmp10 ;
  enum dma_data_direction __cil_tmp11 ;

  {
  {
#line 46
  __cil_tmp8 = (struct pci_dev *)0;
#line 46
  __cil_tmp9 = (unsigned long )__cil_tmp8;
#line 46
  __cil_tmp10 = (unsigned long )hwdev;
#line 46
  if (__cil_tmp10 != __cil_tmp9) {
#line 46
    tmp = & hwdev->dev;
  } else {
#line 46
    tmp = (struct device *)0;
  }
  }
  {
#line 46
  __cil_tmp11 = (enum dma_data_direction )direction;
#line 46
  tmp___0 = dma_map_page(tmp, page, offset, size, __cil_tmp11);
  }
#line 46
  return (tmp___0);
}
}
#line 568 "include/linux/skbuff.h"
__inline static unsigned char *skb_end_pointer(struct sk_buff  const  *skb ) 
{ sk_buff_data_t __cil_tmp2 ;
  unsigned long __cil_tmp3 ;
  unsigned char *__cil_tmp4 ;
  unsigned char *__cil_tmp5 ;

  {
  {
#line 570
  __cil_tmp2 = skb->end;
#line 570
  __cil_tmp3 = (unsigned long )__cil_tmp2;
#line 570
  __cil_tmp4 = skb->head;
#line 570
  __cil_tmp5 = (unsigned char *)__cil_tmp4;
#line 570
  return (__cil_tmp5 + __cil_tmp3);
  }
}
}
#line 1410 "include/linux/netdevice.h"
__inline static struct netdev_queue *netdev_get_tx_queue(struct net_device  const  *dev ,
                                                         unsigned int index ) 
{ unsigned long __cil_tmp3 ;
  struct netdev_queue *__cil_tmp4 ;
  struct netdev_queue *__cil_tmp5 ;

  {
  {
#line 1413
  __cil_tmp3 = (unsigned long )index;
#line 1413
  __cil_tmp4 = dev->_tx;
#line 1413
  __cil_tmp5 = (struct netdev_queue *)__cil_tmp4;
#line 1413
  return (__cil_tmp5 + __cil_tmp3);
  }
}
}
#line 1481 "include/linux/netdevice.h"
__inline static void *netdev_priv(struct net_device  const  *dev ) 
{ void *__cil_tmp2 ;

  {
  {
#line 1483
  __cil_tmp2 = (void *)dev;
#line 1483
  return (__cil_tmp2 + 2560U);
  }
}
}
#line 1656
extern int netpoll_trap(void) ;
#line 1788
extern void __netif_schedule(struct Qdisc * ) ;
#line 1804 "include/linux/netdevice.h"
__inline static void netif_tx_start_queue(struct netdev_queue *dev_queue ) 
{ unsigned long *__cil_tmp2 ;
  unsigned long volatile   *__cil_tmp3 ;

  {
  {
#line 1806
  __cil_tmp2 = & dev_queue->state;
#line 1806
  __cil_tmp3 = (unsigned long volatile   *)__cil_tmp2;
#line 1806
  clear_bit(0, __cil_tmp3);
  }
#line 1807
  return;
}
}
#line 1830 "include/linux/netdevice.h"
__inline static void netif_tx_wake_queue(struct netdev_queue *dev_queue ) 
{ int tmp ;
  int tmp___0 ;
  unsigned long *__cil_tmp4 ;
  unsigned long volatile   *__cil_tmp5 ;
  struct Qdisc *__cil_tmp6 ;

  {
  {
#line 1833
  tmp = netpoll_trap();
  }
#line 1833
  if (tmp != 0) {
    {
#line 1834
    netif_tx_start_queue(dev_queue);
    }
#line 1835
    return;
  } else {

  }
  {
#line 1838
  __cil_tmp4 = & dev_queue->state;
#line 1838
  __cil_tmp5 = (unsigned long volatile   *)__cil_tmp4;
#line 1838
  tmp___0 = test_and_clear_bit(0, __cil_tmp5);
  }
#line 1838
  if (tmp___0 != 0) {
    {
#line 1839
    __cil_tmp6 = dev_queue->qdisc;
#line 1839
    __netif_schedule(__cil_tmp6);
    }
  } else {

  }
#line 1840
  return;
}
}
#line 1849 "include/linux/netdevice.h"
__inline static void netif_wake_queue(struct net_device *dev ) 
{ struct netdev_queue *tmp ;
  struct net_device  const  *__cil_tmp3 ;

  {
  {
#line 1851
  __cil_tmp3 = (struct net_device  const  *)dev;
#line 1851
  tmp = netdev_get_tx_queue(__cil_tmp3, 0U);
#line 1851
  netif_tx_wake_queue(tmp);
  }
#line 1852
  return;
}
}
#line 2061
extern void dev_kfree_skb_any(struct sk_buff * ) ;
#line 2158 "include/linux/netdevice.h"
__inline static int netif_carrier_ok(struct net_device  const  *dev ) 
{ int tmp ;
  unsigned long const   *__cil_tmp3 ;
  unsigned long const volatile   *__cil_tmp4 ;

  {
  {
#line 2160
  __cil_tmp3 = & dev->state;
#line 2160
  __cil_tmp4 = (unsigned long const volatile   *)__cil_tmp3;
#line 2160
  tmp = constant_test_bit(2U, __cil_tmp4);
  }
#line 2160
  return (tmp == 0);
}
}
#line 144 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter ) ;
#line 145
void et131x_tx_dma_memory_free(struct et131x_adapter *adapter ) ;
#line 146
void ConfigTxDmaRegs(struct et131x_adapter *etdev ) ;
#line 148
void et131x_tx_dma_disable(struct et131x_adapter *etdev ) ;
#line 150
void et131x_handle_send_interrupt(struct et131x_adapter *etdev ) ;
#line 152
int et131x_send_packets(struct sk_buff *skb , struct net_device *netdev ) ;
#line 98 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
__inline static void et131x_free_send_packet(struct et131x_adapter *etdev , struct tcb *tcb ) ;
#line 100
static int et131x_send_packet(struct sk_buff *skb , struct et131x_adapter *etdev ) ;
#line 102
static int nic_send_packet(struct et131x_adapter *etdev , struct tcb *tcb ) ;
#line 116 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter ) 
{ int desc_size ;
  struct tx_ring *tx_ring ;
  void *tmp ;
  void *tmp___0 ;
  void *tmp___1 ;
  struct tcb *__cil_tmp7 ;
  unsigned long __cil_tmp8 ;
  struct tcb *__cil_tmp9 ;
  unsigned long __cil_tmp10 ;
  struct pci_dev *__cil_tmp11 ;
  struct device *__cil_tmp12 ;
  struct device  const  *__cil_tmp13 ;
  struct pci_dev *__cil_tmp14 ;
  size_t __cil_tmp15 ;
  dma_addr_t *__cil_tmp16 ;
  struct tx_desc *__cil_tmp17 ;
  unsigned long __cil_tmp18 ;
  struct tx_desc *__cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  struct pci_dev *__cil_tmp21 ;
  struct device *__cil_tmp22 ;
  struct device  const  *__cil_tmp23 ;
  struct pci_dev *__cil_tmp24 ;
  dma_addr_t *__cil_tmp25 ;
  dma_addr_t __cil_tmp26 ;
  struct pci_dev *__cil_tmp27 ;
  struct device *__cil_tmp28 ;
  struct device  const  *__cil_tmp29 ;

  {
  {
#line 118
  desc_size = 0;
#line 119
  tx_ring = & adapter->tx_ring;
#line 122
  tmp = kcalloc(64UL, 40UL, 33U);
#line 122
  adapter->tx_ring.tcb_ring = (struct tcb *)tmp;
  }
  {
#line 124
  __cil_tmp7 = (struct tcb *)0;
#line 124
  __cil_tmp8 = (unsigned long )__cil_tmp7;
#line 124
  __cil_tmp9 = adapter->tx_ring.tcb_ring;
#line 124
  __cil_tmp10 = (unsigned long )__cil_tmp9;
#line 124
  if (__cil_tmp10 == __cil_tmp8) {
    {
#line 125
    __cil_tmp11 = adapter->pdev;
#line 125
    __cil_tmp12 = & __cil_tmp11->dev;
#line 125
    __cil_tmp13 = (struct device  const  *)__cil_tmp12;
#line 125
    dev_err(__cil_tmp13, "Cannot alloc memory for TCBs\n");
    }
#line 126
    return (-12);
  } else {

  }
  }
  {
#line 132
  desc_size = 12287;
#line 133
  __cil_tmp14 = adapter->pdev;
#line 133
  __cil_tmp15 = (size_t )desc_size;
#line 133
  __cil_tmp16 = & tx_ring->tx_desc_ring_pa;
#line 133
  tmp___0 = pci_alloc_consistent(__cil_tmp14, __cil_tmp15, __cil_tmp16);
#line 133
  tx_ring->tx_desc_ring = (struct tx_desc *)tmp___0;
  }
  {
#line 136
  __cil_tmp17 = (struct tx_desc *)0;
#line 136
  __cil_tmp18 = (unsigned long )__cil_tmp17;
#line 136
  __cil_tmp19 = adapter->tx_ring.tx_desc_ring;
#line 136
  __cil_tmp20 = (unsigned long )__cil_tmp19;
#line 136
  if (__cil_tmp20 == __cil_tmp18) {
    {
#line 137
    __cil_tmp21 = adapter->pdev;
#line 137
    __cil_tmp22 = & __cil_tmp21->dev;
#line 137
    __cil_tmp23 = (struct device  const  *)__cil_tmp22;
#line 137
    dev_err(__cil_tmp23, "Cannot alloc memory for Tx Ring\n");
    }
#line 139
    return (-12);
  } else {

  }
  }
  {
#line 150
  __cil_tmp24 = adapter->pdev;
#line 150
  __cil_tmp25 = & tx_ring->tx_status_pa;
#line 150
  tmp___1 = pci_alloc_consistent(__cil_tmp24, 4UL, __cil_tmp25);
#line 150
  tx_ring->tx_status = (u32 *)tmp___1;
  }
  {
#line 153
  __cil_tmp26 = adapter->tx_ring.tx_status_pa;
#line 153
  if (__cil_tmp26 == 0ULL) {
    {
#line 154
    __cil_tmp27 = adapter->pdev;
#line 154
    __cil_tmp28 = & __cil_tmp27->dev;
#line 154
    __cil_tmp29 = (struct device  const  *)__cil_tmp28;
#line 154
    dev_err(__cil_tmp29, "Cannot alloc memory for Tx status block\n");
    }
#line 156
    return (-12);
  } else {

  }
  }
#line 158
  return (0);
}
}
#line 167 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_tx_dma_memory_free(struct et131x_adapter *adapter ) 
{ int desc_size ;
  struct tx_desc *__cil_tmp3 ;
  unsigned long __cil_tmp4 ;
  struct tx_desc *__cil_tmp5 ;
  unsigned long __cil_tmp6 ;
  struct pci_dev *__cil_tmp7 ;
  size_t __cil_tmp8 ;
  struct tx_desc *__cil_tmp9 ;
  void *__cil_tmp10 ;
  dma_addr_t __cil_tmp11 ;
  u32 *__cil_tmp12 ;
  unsigned long __cil_tmp13 ;
  u32 *__cil_tmp14 ;
  unsigned long __cil_tmp15 ;
  struct pci_dev *__cil_tmp16 ;
  u32 *__cil_tmp17 ;
  void *__cil_tmp18 ;
  dma_addr_t __cil_tmp19 ;
  struct tcb *__cil_tmp20 ;
  void const   *__cil_tmp21 ;

  {
#line 169
  desc_size = 0;
  {
#line 171
  __cil_tmp3 = (struct tx_desc *)0;
#line 171
  __cil_tmp4 = (unsigned long )__cil_tmp3;
#line 171
  __cil_tmp5 = adapter->tx_ring.tx_desc_ring;
#line 171
  __cil_tmp6 = (unsigned long )__cil_tmp5;
#line 171
  if (__cil_tmp6 != __cil_tmp4) {
    {
#line 173
    desc_size = 12287;
#line 175
    __cil_tmp7 = adapter->pdev;
#line 175
    __cil_tmp8 = (size_t )desc_size;
#line 175
    __cil_tmp9 = adapter->tx_ring.tx_desc_ring;
#line 175
    __cil_tmp10 = (void *)__cil_tmp9;
#line 175
    __cil_tmp11 = adapter->tx_ring.tx_desc_ring_pa;
#line 175
    pci_free_consistent(__cil_tmp7, __cil_tmp8, __cil_tmp10, __cil_tmp11);
#line 179
    adapter->tx_ring.tx_desc_ring = (struct tx_desc *)0;
    }
  } else {

  }
  }
  {
#line 183
  __cil_tmp12 = (u32 *)0;
#line 183
  __cil_tmp13 = (unsigned long )__cil_tmp12;
#line 183
  __cil_tmp14 = adapter->tx_ring.tx_status;
#line 183
  __cil_tmp15 = (unsigned long )__cil_tmp14;
#line 183
  if (__cil_tmp15 != __cil_tmp13) {
    {
#line 184
    __cil_tmp16 = adapter->pdev;
#line 184
    __cil_tmp17 = adapter->tx_ring.tx_status;
#line 184
    __cil_tmp18 = (void *)__cil_tmp17;
#line 184
    __cil_tmp19 = adapter->tx_ring.tx_status_pa;
#line 184
    pci_free_consistent(__cil_tmp16, 4UL, __cil_tmp18, __cil_tmp19);
#line 189
    adapter->tx_ring.tx_status = (u32 *)0;
    }
  } else {

  }
  }
  {
#line 192
  __cil_tmp20 = adapter->tx_ring.tcb_ring;
#line 192
  __cil_tmp21 = (void const   *)__cil_tmp20;
#line 192
  kfree(__cil_tmp21);
  }
#line 193
  return;
}
}
#line 202 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void ConfigTxDmaRegs(struct et131x_adapter *etdev ) 
{ struct txdma_regs *txdma ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  dma_addr_t __cil_tmp4 ;
  dma_addr_t __cil_tmp5 ;
  unsigned int __cil_tmp6 ;
  u32 *__cil_tmp7 ;
  void volatile   *__cil_tmp8 ;
  dma_addr_t __cil_tmp9 ;
  unsigned int __cil_tmp10 ;
  u32 *__cil_tmp11 ;
  void volatile   *__cil_tmp12 ;
  u32 *__cil_tmp13 ;
  void volatile   *__cil_tmp14 ;
  dma_addr_t __cil_tmp15 ;
  dma_addr_t __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  u32 *__cil_tmp18 ;
  void volatile   *__cil_tmp19 ;
  dma_addr_t __cil_tmp20 ;
  unsigned int __cil_tmp21 ;
  u32 *__cil_tmp22 ;
  void volatile   *__cil_tmp23 ;
  u32 *__cil_tmp24 ;
  u32 *__cil_tmp25 ;
  void volatile   *__cil_tmp26 ;

  {
  {
#line 204
  __cil_tmp3 = etdev->regs;
#line 204
  txdma = & __cil_tmp3->txdma;
#line 207
  __cil_tmp4 = etdev->tx_ring.tx_desc_ring_pa;
#line 207
  __cil_tmp5 = __cil_tmp4 >> 32;
#line 207
  __cil_tmp6 = (unsigned int )__cil_tmp5;
#line 207
  __cil_tmp7 = & txdma->pr_base_hi;
#line 207
  __cil_tmp8 = (void volatile   *)__cil_tmp7;
#line 207
  writel(__cil_tmp6, __cil_tmp8);
#line 209
  __cil_tmp9 = etdev->tx_ring.tx_desc_ring_pa;
#line 209
  __cil_tmp10 = (unsigned int )__cil_tmp9;
#line 209
  __cil_tmp11 = & txdma->pr_base_lo;
#line 209
  __cil_tmp12 = (void volatile   *)__cil_tmp11;
#line 209
  writel(__cil_tmp10, __cil_tmp12);
#line 213
  __cil_tmp13 = & txdma->pr_num_des;
#line 213
  __cil_tmp14 = (void volatile   *)__cil_tmp13;
#line 213
  writel(511U, __cil_tmp14);
#line 216
  __cil_tmp15 = etdev->tx_ring.tx_status_pa;
#line 216
  __cil_tmp16 = __cil_tmp15 >> 32;
#line 216
  __cil_tmp17 = (unsigned int )__cil_tmp16;
#line 216
  __cil_tmp18 = & txdma->dma_wb_base_hi;
#line 216
  __cil_tmp19 = (void volatile   *)__cil_tmp18;
#line 216
  writel(__cil_tmp17, __cil_tmp19);
#line 218
  __cil_tmp20 = etdev->tx_ring.tx_status_pa;
#line 218
  __cil_tmp21 = (unsigned int )__cil_tmp20;
#line 218
  __cil_tmp22 = & txdma->dma_wb_base_lo;
#line 218
  __cil_tmp23 = (void volatile   *)__cil_tmp22;
#line 218
  writel(__cil_tmp21, __cil_tmp23);
#line 220
  __cil_tmp24 = etdev->tx_ring.tx_status;
#line 220
  *__cil_tmp24 = 0U;
#line 222
  __cil_tmp25 = & txdma->service_request;
#line 222
  __cil_tmp26 = (void volatile   *)__cil_tmp25;
#line 222
  writel(0U, __cil_tmp26);
#line 223
  etdev->tx_ring.send_idx = 0U;
  }
#line 224
  return;
}
}
#line 230 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_tx_dma_disable(struct et131x_adapter *etdev ) 
{ ADDRESS_MAP_t *__cil_tmp2 ;
  u32 *__cil_tmp3 ;
  void volatile   *__cil_tmp4 ;

  {
  {
#line 233
  __cil_tmp2 = etdev->regs;
#line 233
  __cil_tmp3 = & __cil_tmp2->txdma.csr;
#line 233
  __cil_tmp4 = (void volatile   *)__cil_tmp3;
#line 233
  writel(257U, __cil_tmp4);
  }
#line 235
  return;
}
}
#line 243 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_tx_dma_enable(struct et131x_adapter *etdev ) 
{ ADDRESS_MAP_t *__cil_tmp2 ;
  u32 *__cil_tmp3 ;
  void volatile   *__cil_tmp4 ;

  {
  {
#line 248
  __cil_tmp2 = etdev->regs;
#line 248
  __cil_tmp3 = & __cil_tmp2->txdma.csr;
#line 248
  __cil_tmp4 = (void volatile   *)__cil_tmp3;
#line 248
  writel(256U, __cil_tmp4);
  }
#line 250
  return;
}
}
#line 256 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_init_send(struct et131x_adapter *adapter ) 
{ struct tcb *tcb ;
  u32 ct ;
  struct tx_ring *tx_ring ;
  u32 tmp ;
  void *__cil_tmp6 ;

  {
  {
#line 263
  tx_ring = & adapter->tx_ring;
#line 264
  tcb = adapter->tx_ring.tcb_ring;
#line 266
  tx_ring->tcb_qhead = tcb;
#line 268
  __cil_tmp6 = (void *)tcb;
#line 268
  memset(__cil_tmp6, 0, 2560UL);
#line 271
  ct = 0U;
  }
#line 271
  goto ldv_35692;
  ldv_35691: 
#line 275
  tcb->next = tcb + 1UL;
#line 271
  tcb = tcb + 1;
  ldv_35692: 
#line 271
  tmp = ct;
#line 271
  ct = ct + 1U;
#line 271
  if (tmp <= 63U) {
#line 272
    goto ldv_35691;
  } else {
#line 274
    goto ldv_35693;
  }
  ldv_35693: 
#line 278
  tcb = tcb - 1;
#line 279
  tx_ring->tcb_qtail = tcb;
#line 280
  tcb->next = (struct tcb *)0;
#line 282
  tx_ring->send_head = (struct tcb *)0;
#line 283
  tx_ring->send_tail = (struct tcb *)0;
#line 284
  return;
}
}
#line 293 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
int et131x_send_packets(struct sk_buff *skb , struct net_device *netdev ) 
{ int status ;
  struct et131x_adapter *etdev ;
  void *tmp ;
  int tmp___0 ;
  struct net_device  const  *__cil_tmp7 ;
  int __cil_tmp8 ;
  u32 __cil_tmp9 ;
  unsigned int __cil_tmp10 ;
  unsigned long __cil_tmp11 ;
  struct net_device  const  *__cil_tmp12 ;
  unsigned long __cil_tmp13 ;
  unsigned long __cil_tmp14 ;

  {
  {
#line 295
  status = 0;
#line 296
  etdev = (struct et131x_adapter *)0;
#line 298
  __cil_tmp7 = (struct net_device  const  *)netdev;
#line 298
  tmp = netdev_priv(__cil_tmp7);
#line 298
  etdev = (struct et131x_adapter *)tmp;
  }
  {
#line 307
  __cil_tmp8 = etdev->tx_ring.used;
#line 307
  if (__cil_tmp8 > 63) {
#line 312
    status = -12;
  } else {
    {
#line 317
    __cil_tmp9 = etdev->Flags;
#line 317
    __cil_tmp10 = __cil_tmp9 & 1072693248U;
#line 317
    if (__cil_tmp10 != 0U) {
      {
#line 319
      dev_kfree_skb_any(skb);
#line 320
      skb = (struct sk_buff *)0;
#line 322
      __cil_tmp11 = etdev->net_stats.tx_dropped;
#line 322
      etdev->net_stats.tx_dropped = __cil_tmp11 + 1UL;
      }
    } else {
      {
#line 317
      __cil_tmp12 = (struct net_device  const  *)netdev;
#line 317
      tmp___0 = netif_carrier_ok(__cil_tmp12);
      }
#line 317
      if (tmp___0 == 0) {
        {
#line 319
        dev_kfree_skb_any(skb);
#line 320
        skb = (struct sk_buff *)0;
#line 322
        __cil_tmp13 = etdev->net_stats.tx_dropped;
#line 322
        etdev->net_stats.tx_dropped = __cil_tmp13 + 1UL;
        }
      } else {
        {
#line 324
        status = et131x_send_packet(skb, etdev);
        }
#line 325
        if (status != 0) {
#line 325
          if (status != -12) {
            {
#line 329
            dev_kfree_skb_any(skb);
#line 330
            skb = (struct sk_buff *)0;
#line 331
            __cil_tmp14 = etdev->net_stats.tx_dropped;
#line 331
            etdev->net_stats.tx_dropped = __cil_tmp14 + 1UL;
            }
          } else {

          }
        } else {

        }
      }
    }
    }
  }
  }
#line 335
  return (status);
}
}
#line 347 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
static int et131x_send_packet(struct sk_buff *skb , struct et131x_adapter *etdev ) 
{ int status ;
  struct tcb *tcb ;
  u16 *shbufva ;
  unsigned long flags ;
  raw_spinlock_t *tmp ;
  raw_spinlock_t *tmp___0 ;
  int __ret_warn_on ;
  long tmp___1 ;
  unsigned int __cil_tmp11 ;
  spinlock_t *__cil_tmp12 ;
  struct tcb *__cil_tmp13 ;
  unsigned long __cil_tmp14 ;
  unsigned long __cil_tmp15 ;
  spinlock_t *__cil_tmp16 ;
  struct tcb *__cil_tmp17 ;
  unsigned long __cil_tmp18 ;
  struct tcb *__cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  spinlock_t *__cil_tmp21 ;
  unsigned char *__cil_tmp22 ;
  unsigned long __cil_tmp23 ;
  unsigned char *__cil_tmp24 ;
  unsigned long __cil_tmp25 ;
  unsigned int __cil_tmp26 ;
  unsigned int __cil_tmp27 ;
  unsigned int __cil_tmp28 ;
  unsigned char *__cil_tmp29 ;
  u16 __cil_tmp30 ;
  unsigned int __cil_tmp31 ;
  u16 *__cil_tmp32 ;
  u16 __cil_tmp33 ;
  unsigned int __cil_tmp34 ;
  u16 *__cil_tmp35 ;
  u16 __cil_tmp36 ;
  unsigned int __cil_tmp37 ;
  u32 __cil_tmp38 ;
  u16 __cil_tmp39 ;
  int __cil_tmp40 ;
  int __cil_tmp41 ;
  u32 __cil_tmp42 ;
  spinlock_t *__cil_tmp43 ;
  struct tcb *__cil_tmp44 ;
  unsigned long __cil_tmp45 ;
  struct tcb *__cil_tmp46 ;
  unsigned long __cil_tmp47 ;
  struct tcb *__cil_tmp48 ;
  spinlock_t *__cil_tmp49 ;
  int __cil_tmp50 ;
  int __cil_tmp51 ;
  long __cil_tmp52 ;
  int __cil_tmp53 ;
  int __cil_tmp54 ;
  int __cil_tmp55 ;
  long __cil_tmp56 ;

  {
#line 351
  tcb = (struct tcb *)0;
  {
#line 356
  __cil_tmp11 = skb->len;
#line 356
  if (__cil_tmp11 <= 13U) {
#line 357
    return (-5);
  } else {

  }
  }
  {
#line 360
  __cil_tmp12 = & etdev->TCBReadyQLock;
#line 360
  tmp = spinlock_check(__cil_tmp12);
#line 360
  flags = _raw_spin_lock_irqsave(tmp);
#line 362
  tcb = etdev->tx_ring.tcb_qhead;
  }
  {
#line 364
  __cil_tmp13 = (struct tcb *)0;
#line 364
  __cil_tmp14 = (unsigned long )__cil_tmp13;
#line 364
  __cil_tmp15 = (unsigned long )tcb;
#line 364
  if (__cil_tmp15 == __cil_tmp14) {
    {
#line 365
    __cil_tmp16 = & etdev->TCBReadyQLock;
#line 365
    spin_unlock_irqrestore(__cil_tmp16, flags);
    }
#line 366
    return (-12);
  } else {

  }
  }
#line 369
  etdev->tx_ring.tcb_qhead = tcb->next;
  {
#line 371
  __cil_tmp17 = (struct tcb *)0;
#line 371
  __cil_tmp18 = (unsigned long )__cil_tmp17;
#line 371
  __cil_tmp19 = etdev->tx_ring.tcb_qhead;
#line 371
  __cil_tmp20 = (unsigned long )__cil_tmp19;
#line 371
  if (__cil_tmp20 == __cil_tmp18) {
#line 372
    etdev->tx_ring.tcb_qtail = (struct tcb *)0;
  } else {

  }
  }
  {
#line 374
  __cil_tmp21 = & etdev->TCBReadyQLock;
#line 374
  spin_unlock_irqrestore(__cil_tmp21, flags);
#line 376
  tcb->skb = skb;
  }
  {
#line 378
  __cil_tmp22 = (unsigned char *)0;
#line 378
  __cil_tmp23 = (unsigned long )__cil_tmp22;
#line 378
  __cil_tmp24 = skb->data;
#line 378
  __cil_tmp25 = (unsigned long )__cil_tmp24;
#line 378
  if (__cil_tmp25 != __cil_tmp23) {
    {
#line 378
    __cil_tmp26 = skb->data_len;
#line 378
    __cil_tmp27 = skb->len;
#line 378
    __cil_tmp28 = __cil_tmp27 - __cil_tmp26;
#line 378
    if (__cil_tmp28 > 5U) {
#line 379
      __cil_tmp29 = skb->data;
#line 379
      shbufva = (u16 *)__cil_tmp29;
      {
#line 381
      __cil_tmp30 = *shbufva;
#line 381
      __cil_tmp31 = (unsigned int )__cil_tmp30;
#line 381
      if (__cil_tmp31 == 65535U) {
        {
#line 381
        __cil_tmp32 = shbufva + 1UL;
#line 381
        __cil_tmp33 = *__cil_tmp32;
#line 381
        __cil_tmp34 = (unsigned int )__cil_tmp33;
#line 381
        if (__cil_tmp34 == 65535U) {
          {
#line 381
          __cil_tmp35 = shbufva + 2UL;
#line 381
          __cil_tmp36 = *__cil_tmp35;
#line 381
          __cil_tmp37 = (unsigned int )__cil_tmp36;
#line 381
          if (__cil_tmp37 == 65535U) {
#line 383
            __cil_tmp38 = tcb->flags;
#line 383
            tcb->flags = __cil_tmp38 | 2U;
          } else {
#line 381
            goto _L___0;
          }
          }
        } else {
#line 381
          goto _L___0;
        }
        }
      } else {
        _L___0: 
        {
#line 384
        __cil_tmp39 = *shbufva;
#line 384
        __cil_tmp40 = (int )__cil_tmp39;
#line 384
        __cil_tmp41 = __cil_tmp40 & 3;
#line 384
        if (__cil_tmp41 == 1) {
#line 385
          __cil_tmp42 = tcb->flags;
#line 385
          tcb->flags = __cil_tmp42 | 1U;
        } else {

        }
        }
      }
      }
    } else {

    }
    }
  } else {

  }
  }
  {
#line 389
  tcb->next = (struct tcb *)0;
#line 392
  status = nic_send_packet(etdev, tcb);
  }
#line 394
  if (status != 0) {
    {
#line 395
    __cil_tmp43 = & etdev->TCBReadyQLock;
#line 395
    tmp___0 = spinlock_check(__cil_tmp43);
#line 395
    flags = _raw_spin_lock_irqsave(tmp___0);
    }
    {
#line 397
    __cil_tmp44 = (struct tcb *)0;
#line 397
    __cil_tmp45 = (unsigned long )__cil_tmp44;
#line 397
    __cil_tmp46 = etdev->tx_ring.tcb_qtail;
#line 397
    __cil_tmp47 = (unsigned long )__cil_tmp46;
#line 397
    if (__cil_tmp47 != __cil_tmp45) {
#line 398
      __cil_tmp48 = etdev->tx_ring.tcb_qtail;
#line 398
      __cil_tmp48->next = tcb;
    } else {
#line 401
      etdev->tx_ring.tcb_qhead = tcb;
    }
    }
    {
#line 403
    etdev->tx_ring.tcb_qtail = tcb;
#line 404
    __cil_tmp49 = & etdev->TCBReadyQLock;
#line 404
    spin_unlock_irqrestore(__cil_tmp49, flags);
    }
#line 405
    return (status);
  } else {

  }
  {
#line 407
  __cil_tmp50 = etdev->tx_ring.used;
#line 407
  __ret_warn_on = __cil_tmp50 > 64;
#line 407
  __cil_tmp51 = __ret_warn_on != 0;
#line 407
  __cil_tmp52 = (long )__cil_tmp51;
#line 407
  tmp___1 = __builtin_expect(__cil_tmp52, 0L);
  }
#line 407
  if (tmp___1 != 0L) {
    {
#line 407
    __cil_tmp53 = (int const   )407;
#line 407
    __cil_tmp54 = (int )__cil_tmp53;
#line 407
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p",
                       __cil_tmp54);
    }
  } else {

  }
  {
#line 407
  __cil_tmp55 = __ret_warn_on != 0;
#line 407
  __cil_tmp56 = (long )__cil_tmp55;
#line 407
  __builtin_expect(__cil_tmp56, 0L);
  }
#line 408
  return (0);
}
}
#line 418 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
static int nic_send_packet(struct et131x_adapter *etdev , struct tcb *tcb ) 
{ u32 i ;
  struct tx_desc desc[24U] ;
  u32 frag ;
  u32 thiscopy ;
  u32 remainder ;
  struct sk_buff *skb ;
  u32 nr_frags ;
  unsigned char *tmp ;
  struct skb_frag_struct *frags ;
  unsigned char *tmp___0 ;
  unsigned long flags ;
  u32 tmp___1 ;
  dma_addr_t tmp___2 ;
  u32 tmp___3 ;
  dma_addr_t tmp___4 ;
  u32 tmp___5 ;
  dma_addr_t tmp___6 ;
  u32 tmp___7 ;
  dma_addr_t tmp___8 ;
  raw_spinlock_t *tmp___9 ;
  size_t __len ;
  void *__ret ;
  size_t __len___0 ;
  void *__ret___0 ;
  int __ret_warn_on ;
  long tmp___10 ;
  struct sk_buff  const  *__cil_tmp29 ;
  struct skb_shared_info *__cil_tmp30 ;
  unsigned short __cil_tmp31 ;
  int __cil_tmp32 ;
  int __cil_tmp33 ;
  struct sk_buff  const  *__cil_tmp34 ;
  struct skb_shared_info *__cil_tmp35 ;
  skb_frag_t (*__cil_tmp36)[18U] ;
  void *__cil_tmp37 ;
  u32 __cil_tmp38 ;
  unsigned long __cil_tmp39 ;
  unsigned long __cil_tmp40 ;
  unsigned int __cil_tmp41 ;
  unsigned int __cil_tmp42 ;
  unsigned int __cil_tmp43 ;
  unsigned int __cil_tmp44 ;
  unsigned int __cil_tmp45 ;
  struct pci_dev *__cil_tmp46 ;
  unsigned char *__cil_tmp47 ;
  void *__cil_tmp48 ;
  unsigned int __cil_tmp49 ;
  unsigned int __cil_tmp50 ;
  unsigned int __cil_tmp51 ;
  size_t __cil_tmp52 ;
  unsigned int __cil_tmp53 ;
  unsigned int __cil_tmp54 ;
  unsigned int __cil_tmp55 ;
  struct pci_dev *__cil_tmp56 ;
  unsigned char *__cil_tmp57 ;
  void *__cil_tmp58 ;
  unsigned int __cil_tmp59 ;
  unsigned int __cil_tmp60 ;
  unsigned int __cil_tmp61 ;
  unsigned int __cil_tmp62 ;
  size_t __cil_tmp63 ;
  unsigned int __cil_tmp64 ;
  unsigned int __cil_tmp65 ;
  unsigned int __cil_tmp66 ;
  struct pci_dev *__cil_tmp67 ;
  unsigned int __cil_tmp68 ;
  unsigned int __cil_tmp69 ;
  unsigned int __cil_tmp70 ;
  unsigned int __cil_tmp71 ;
  unsigned long __cil_tmp72 ;
  unsigned char *__cil_tmp73 ;
  void *__cil_tmp74 ;
  void *__cil_tmp75 ;
  unsigned int __cil_tmp76 ;
  unsigned int __cil_tmp77 ;
  unsigned int __cil_tmp78 ;
  unsigned int __cil_tmp79 ;
  size_t __cil_tmp80 ;
  u32 __cil_tmp81 ;
  unsigned long __cil_tmp82 ;
  struct skb_frag_struct *__cil_tmp83 ;
  struct pci_dev *__cil_tmp84 ;
  u32 __cil_tmp85 ;
  unsigned long __cil_tmp86 ;
  struct skb_frag_struct *__cil_tmp87 ;
  struct page *__cil_tmp88 ;
  u32 __cil_tmp89 ;
  unsigned long __cil_tmp90 ;
  struct skb_frag_struct *__cil_tmp91 ;
  __u32 __cil_tmp92 ;
  unsigned long __cil_tmp93 ;
  u32 __cil_tmp94 ;
  unsigned long __cil_tmp95 ;
  struct skb_frag_struct *__cil_tmp96 ;
  __u32 __cil_tmp97 ;
  size_t __cil_tmp98 ;
  u32 __cil_tmp99 ;
  int __cil_tmp100 ;
  int __cil_tmp101 ;
  spinlock_t *__cil_tmp102 ;
  u32 __cil_tmp103 ;
  unsigned int __cil_tmp104 ;
  unsigned long __cil_tmp105 ;
  u32 __cil_tmp106 ;
  unsigned long __cil_tmp107 ;
  unsigned long __cil_tmp108 ;
  struct tx_desc *__cil_tmp109 ;
  struct tx_desc *__cil_tmp110 ;
  void *__cil_tmp111 ;
  void const   *__cil_tmp112 ;
  u32 *__cil_tmp113 ;
  int __cil_tmp114 ;
  u32 __cil_tmp115 ;
  unsigned int __cil_tmp116 ;
  u32 __cil_tmp117 ;
  u32 __cil_tmp118 ;
  u32 __cil_tmp119 ;
  unsigned int __cil_tmp120 ;
  u32 __cil_tmp121 ;
  u32 __cil_tmp122 ;
  unsigned long __cil_tmp123 ;
  struct tx_desc *__cil_tmp124 ;
  void *__cil_tmp125 ;
  unsigned long __cil_tmp126 ;
  void const   *__cil_tmp127 ;
  void const   *__cil_tmp128 ;
  u32 *__cil_tmp129 ;
  int __cil_tmp130 ;
  u32 __cil_tmp131 ;
  unsigned int __cil_tmp132 ;
  u32 __cil_tmp133 ;
  u32 __cil_tmp134 ;
  spinlock_t *__cil_tmp135 ;
  struct tcb *__cil_tmp136 ;
  unsigned long __cil_tmp137 ;
  struct tcb *__cil_tmp138 ;
  unsigned long __cil_tmp139 ;
  struct tcb *__cil_tmp140 ;
  struct tcb *__cil_tmp141 ;
  unsigned long __cil_tmp142 ;
  struct tcb *__cil_tmp143 ;
  unsigned long __cil_tmp144 ;
  int __cil_tmp145 ;
  long __cil_tmp146 ;
  int __cil_tmp147 ;
  int __cil_tmp148 ;
  int __cil_tmp149 ;
  long __cil_tmp150 ;
  int __cil_tmp151 ;
  spinlock_t *__cil_tmp152 ;
  u32 __cil_tmp153 ;
  ADDRESS_MAP_t *__cil_tmp154 ;
  u32 *__cil_tmp155 ;
  void volatile   *__cil_tmp156 ;
  u32 __cil_tmp157 ;
  ADDRESS_MAP_t *__cil_tmp158 ;
  u32 *__cil_tmp159 ;
  void volatile   *__cil_tmp160 ;
  spinlock_t *__cil_tmp161 ;

  {
  {
#line 422
  frag = 0U;
#line 424
  skb = tcb->skb;
#line 425
  __cil_tmp29 = (struct sk_buff  const  *)skb;
#line 425
  tmp = skb_end_pointer(__cil_tmp29);
#line 425
  __cil_tmp30 = (struct skb_shared_info *)tmp;
#line 425
  __cil_tmp31 = __cil_tmp30->nr_frags;
#line 425
  __cil_tmp32 = (int )__cil_tmp31;
#line 425
  __cil_tmp33 = __cil_tmp32 + 1;
#line 425
  nr_frags = (u32 )__cil_tmp33;
#line 426
  __cil_tmp34 = (struct sk_buff  const  *)skb;
#line 426
  tmp___0 = skb_end_pointer(__cil_tmp34);
#line 426
  __cil_tmp35 = (struct skb_shared_info *)tmp___0;
#line 426
  __cil_tmp36 = & __cil_tmp35->frags;
#line 426
  frags = (struct skb_frag_struct *)__cil_tmp36;
  }
#line 437
  if (nr_frags > 23U) {
#line 438
    return (-5);
  } else {

  }
  {
#line 440
  __cil_tmp37 = (void *)(& desc);
#line 440
  __cil_tmp38 = nr_frags + 1U;
#line 440
  __cil_tmp39 = (unsigned long )__cil_tmp38;
#line 440
  __cil_tmp40 = __cil_tmp39 * 16UL;
#line 440
  memset(__cil_tmp37, 0, __cil_tmp40);
#line 442
  i = 0U;
  }
#line 442
  goto ldv_35730;
  ldv_35729: ;
#line 446
  if (i == 0U) {
    {
#line 456
    __cil_tmp41 = skb->data_len;
#line 456
    __cil_tmp42 = skb->len;
#line 456
    __cil_tmp43 = __cil_tmp42 - __cil_tmp41;
#line 456
    if (__cil_tmp43 <= 1514U) {
      {
#line 457
      desc[frag].addr_hi = 0U;
#line 460
      __cil_tmp44 = skb->data_len;
#line 460
      __cil_tmp45 = skb->len;
#line 460
      desc[frag].len_vlan = __cil_tmp45 - __cil_tmp44;
#line 471
      tmp___1 = frag;
#line 471
      frag = frag + 1U;
#line 471
      __cil_tmp46 = etdev->pdev;
#line 471
      __cil_tmp47 = skb->data;
#line 471
      __cil_tmp48 = (void *)__cil_tmp47;
#line 471
      __cil_tmp49 = skb->data_len;
#line 471
      __cil_tmp50 = skb->len;
#line 471
      __cil_tmp51 = __cil_tmp50 - __cil_tmp49;
#line 471
      __cil_tmp52 = (size_t )__cil_tmp51;
#line 471
      tmp___2 = pci_map_single(__cil_tmp46, __cil_tmp48, __cil_tmp52, 1);
#line 471
      desc[tmp___1].addr_lo = (u32 )tmp___2;
      }
    } else {
      {
#line 478
      desc[frag].addr_hi = 0U;
#line 479
      __cil_tmp53 = skb->data_len;
#line 479
      __cil_tmp54 = skb->len;
#line 479
      __cil_tmp55 = __cil_tmp54 - __cil_tmp53;
#line 479
      desc[frag].len_vlan = __cil_tmp55 / 2U;
#line 490
      tmp___3 = frag;
#line 490
      frag = frag + 1U;
#line 490
      __cil_tmp56 = etdev->pdev;
#line 490
      __cil_tmp57 = skb->data;
#line 490
      __cil_tmp58 = (void *)__cil_tmp57;
#line 490
      __cil_tmp59 = skb->data_len;
#line 490
      __cil_tmp60 = skb->len;
#line 490
      __cil_tmp61 = __cil_tmp60 - __cil_tmp59;
#line 490
      __cil_tmp62 = __cil_tmp61 / 2U;
#line 490
      __cil_tmp63 = (size_t )__cil_tmp62;
#line 490
      tmp___4 = pci_map_single(__cil_tmp56, __cil_tmp58, __cil_tmp63, 1);
#line 490
      desc[tmp___3].addr_lo = (u32 )tmp___4;
#line 496
      desc[frag].addr_hi = 0U;
#line 498
      __cil_tmp64 = skb->data_len;
#line 498
      __cil_tmp65 = skb->len;
#line 498
      __cil_tmp66 = __cil_tmp65 - __cil_tmp64;
#line 498
      desc[frag].len_vlan = __cil_tmp66 / 2U;
#line 509
      tmp___5 = frag;
#line 509
      frag = frag + 1U;
#line 509
      __cil_tmp67 = etdev->pdev;
#line 509
      __cil_tmp68 = skb->data_len;
#line 509
      __cil_tmp69 = skb->len;
#line 509
      __cil_tmp70 = __cil_tmp69 - __cil_tmp68;
#line 509
      __cil_tmp71 = __cil_tmp70 / 2U;
#line 509
      __cil_tmp72 = (unsigned long )__cil_tmp71;
#line 509
      __cil_tmp73 = skb->data;
#line 509
      __cil_tmp74 = (void *)__cil_tmp73;
#line 509
      __cil_tmp75 = __cil_tmp74 + __cil_tmp72;
#line 509
      __cil_tmp76 = skb->data_len;
#line 509
      __cil_tmp77 = skb->len;
#line 509
      __cil_tmp78 = __cil_tmp77 - __cil_tmp76;
#line 509
      __cil_tmp79 = __cil_tmp78 / 2U;
#line 509
      __cil_tmp80 = (size_t )__cil_tmp79;
#line 509
      tmp___6 = pci_map_single(__cil_tmp67, __cil_tmp75, __cil_tmp80, 1);
#line 509
      desc[tmp___5].addr_lo = (u32 )tmp___6;
      }
    }
    }
  } else {
    {
#line 519
    desc[frag].addr_hi = 0U;
#line 520
    __cil_tmp81 = i - 1U;
#line 520
    __cil_tmp82 = (unsigned long )__cil_tmp81;
#line 520
    __cil_tmp83 = frags + __cil_tmp82;
#line 520
    desc[frag].len_vlan = __cil_tmp83->size;
#line 529
    tmp___7 = frag;
#line 529
    frag = frag + 1U;
#line 529
    __cil_tmp84 = etdev->pdev;
#line 529
    __cil_tmp85 = i - 1U;
#line 529
    __cil_tmp86 = (unsigned long )__cil_tmp85;
#line 529
    __cil_tmp87 = frags + __cil_tmp86;
#line 529
    __cil_tmp88 = __cil_tmp87->page;
#line 529
    __cil_tmp89 = i - 1U;
#line 529
    __cil_tmp90 = (unsigned long )__cil_tmp89;
#line 529
    __cil_tmp91 = frags + __cil_tmp90;
#line 529
    __cil_tmp92 = __cil_tmp91->page_offset;
#line 529
    __cil_tmp93 = (unsigned long )__cil_tmp92;
#line 529
    __cil_tmp94 = i - 1U;
#line 529
    __cil_tmp95 = (unsigned long )__cil_tmp94;
#line 529
    __cil_tmp96 = frags + __cil_tmp95;
#line 529
    __cil_tmp97 = __cil_tmp96->size;
#line 529
    __cil_tmp98 = (size_t )__cil_tmp97;
#line 529
    tmp___8 = pci_map_page(__cil_tmp84, __cil_tmp88, __cil_tmp93, __cil_tmp98, 1);
#line 529
    desc[tmp___7].addr_lo = (u32 )tmp___8;
    }
  }
#line 442
  i = i + 1U;
  ldv_35730: ;
#line 442
  if (i < nr_frags) {
#line 443
    goto ldv_35729;
  } else {
#line 445
    goto ldv_35731;
  }
  ldv_35731: ;
#line 538
  if (frag == 0U) {
#line 539
    return (-5);
  } else {

  }
  {
#line 541
  __cil_tmp99 = etdev->linkspeed;
#line 541
  if (__cil_tmp99 == 2U) {
#line 542
    __cil_tmp100 = etdev->tx_ring.since_irq;
#line 542
    etdev->tx_ring.since_irq = __cil_tmp100 + 1;
    {
#line 542
    __cil_tmp101 = etdev->tx_ring.since_irq;
#line 542
    if (__cil_tmp101 == 4) {
#line 544
      desc[frag - 1U].flags = 5U;
#line 545
      etdev->tx_ring.since_irq = 0;
    } else {
#line 547
      desc[frag - 1U].flags = 1U;
    }
    }
  } else {
#line 550
    desc[frag - 1U].flags = 5U;
  }
  }
  {
#line 552
  desc[0].flags = desc[0].flags | 2U;
#line 554
  tcb->index_start = etdev->tx_ring.send_idx;
#line 555
  tcb->stale = 0U;
#line 557
  __cil_tmp102 = & etdev->send_hw_lock;
#line 557
  tmp___9 = spinlock_check(__cil_tmp102);
#line 557
  flags = _raw_spin_lock_irqsave(tmp___9);
#line 559
  __cil_tmp103 = etdev->tx_ring.send_idx;
#line 559
  __cil_tmp104 = __cil_tmp103 & 1023U;
#line 559
  thiscopy = 512U - __cil_tmp104;
  }
#line 562
  if (thiscopy >= frag) {
#line 563
    remainder = 0U;
#line 564
    thiscopy = frag;
  } else {
#line 566
    remainder = frag - thiscopy;
  }
  {
#line 569
  __cil_tmp105 = (unsigned long )thiscopy;
#line 569
  __len = __cil_tmp105 * 16UL;
#line 569
  __cil_tmp106 = etdev->tx_ring.send_idx;
#line 569
  __cil_tmp107 = (unsigned long )__cil_tmp106;
#line 569
  __cil_tmp108 = __cil_tmp107 & 1023UL;
#line 569
  __cil_tmp109 = etdev->tx_ring.tx_desc_ring;
#line 569
  __cil_tmp110 = __cil_tmp109 + __cil_tmp108;
#line 569
  __cil_tmp111 = (void *)__cil_tmp110;
#line 569
  __cil_tmp112 = (void const   *)(& desc);
#line 569
  __ret = __builtin_memcpy(__cil_tmp111, __cil_tmp112, __len);
#line 573
  __cil_tmp113 = & etdev->tx_ring.send_idx;
#line 573
  __cil_tmp114 = (int )thiscopy;
#line 573
  add_10bit(__cil_tmp113, __cil_tmp114);
  }
  {
#line 575
  __cil_tmp115 = etdev->tx_ring.send_idx;
#line 575
  __cil_tmp116 = __cil_tmp115 & 1023U;
#line 575
  if (__cil_tmp116 == 0U) {
#line 577
    __cil_tmp117 = etdev->tx_ring.send_idx;
#line 577
    etdev->tx_ring.send_idx = __cil_tmp117 & 4294966272U;
#line 578
    __cil_tmp118 = etdev->tx_ring.send_idx;
#line 578
    etdev->tx_ring.send_idx = __cil_tmp118 ^ 1024U;
  } else {
    {
#line 575
    __cil_tmp119 = etdev->tx_ring.send_idx;
#line 575
    __cil_tmp120 = __cil_tmp119 & 1023U;
#line 575
    if (__cil_tmp120 == 512U) {
#line 577
      __cil_tmp121 = etdev->tx_ring.send_idx;
#line 577
      etdev->tx_ring.send_idx = __cil_tmp121 & 4294966272U;
#line 578
      __cil_tmp122 = etdev->tx_ring.send_idx;
#line 578
      etdev->tx_ring.send_idx = __cil_tmp122 ^ 1024U;
    } else {

    }
    }
  }
  }
#line 581
  if (remainder != 0U) {
    {
#line 582
    __cil_tmp123 = (unsigned long )remainder;
#line 582
    __len___0 = __cil_tmp123 * 16UL;
#line 582
    __cil_tmp124 = etdev->tx_ring.tx_desc_ring;
#line 582
    __cil_tmp125 = (void *)__cil_tmp124;
#line 582
    __cil_tmp126 = (unsigned long )thiscopy;
#line 582
    __cil_tmp127 = (void const   *)(& desc);
#line 582
    __cil_tmp128 = __cil_tmp127 + __cil_tmp126;
#line 582
    __ret___0 = __builtin_memcpy(__cil_tmp125, __cil_tmp128, __len___0);
#line 586
    __cil_tmp129 = & etdev->tx_ring.send_idx;
#line 586
    __cil_tmp130 = (int )remainder;
#line 586
    add_10bit(__cil_tmp129, __cil_tmp130);
    }
  } else {

  }
  {
#line 589
  __cil_tmp131 = etdev->tx_ring.send_idx;
#line 589
  __cil_tmp132 = __cil_tmp131 & 1023U;
#line 589
  if (__cil_tmp132 == 0U) {
    {
#line 590
    __cil_tmp133 = etdev->tx_ring.send_idx;
#line 590
    if (__cil_tmp133 != 0U) {
#line 591
      tcb->index = 511U;
    } else {
#line 593
      tcb->index = 1535U;
    }
    }
  } else {
#line 595
    __cil_tmp134 = etdev->tx_ring.send_idx;
#line 595
    tcb->index = __cil_tmp134 - 1U;
  }
  }
  {
#line 597
  __cil_tmp135 = & etdev->TCBSendQLock;
#line 597
  spin_lock(__cil_tmp135);
  }
  {
#line 599
  __cil_tmp136 = (struct tcb *)0;
#line 599
  __cil_tmp137 = (unsigned long )__cil_tmp136;
#line 599
  __cil_tmp138 = etdev->tx_ring.send_tail;
#line 599
  __cil_tmp139 = (unsigned long )__cil_tmp138;
#line 599
  if (__cil_tmp139 != __cil_tmp137) {
#line 600
    __cil_tmp140 = etdev->tx_ring.send_tail;
#line 600
    __cil_tmp140->next = tcb;
  } else {
#line 602
    etdev->tx_ring.send_head = tcb;
  }
  }
  {
#line 604
  etdev->tx_ring.send_tail = tcb;
#line 606
  __cil_tmp141 = (struct tcb *)0;
#line 606
  __cil_tmp142 = (unsigned long )__cil_tmp141;
#line 606
  __cil_tmp143 = tcb->next;
#line 606
  __cil_tmp144 = (unsigned long )__cil_tmp143;
#line 606
  __ret_warn_on = __cil_tmp144 != __cil_tmp142;
#line 606
  __cil_tmp145 = __ret_warn_on != 0;
#line 606
  __cil_tmp146 = (long )__cil_tmp145;
#line 606
  tmp___10 = __builtin_expect(__cil_tmp146, 0L);
  }
#line 606
  if (tmp___10 != 0L) {
    {
#line 606
    __cil_tmp147 = (int const   )606;
#line 606
    __cil_tmp148 = (int )__cil_tmp147;
#line 606
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p",
                       __cil_tmp148);
    }
  } else {

  }
  {
#line 606
  __cil_tmp149 = __ret_warn_on != 0;
#line 606
  __cil_tmp150 = (long )__cil_tmp149;
#line 606
  __builtin_expect(__cil_tmp150, 0L);
#line 608
  __cil_tmp151 = etdev->tx_ring.used;
#line 608
  etdev->tx_ring.used = __cil_tmp151 + 1;
#line 610
  __cil_tmp152 = & etdev->TCBSendQLock;
#line 610
  spin_unlock(__cil_tmp152);
#line 613
  __cil_tmp153 = etdev->tx_ring.send_idx;
#line 613
  __cil_tmp154 = etdev->regs;
#line 613
  __cil_tmp155 = & __cil_tmp154->txdma.service_request;
#line 613
  __cil_tmp156 = (void volatile   *)__cil_tmp155;
#line 613
  writel(__cil_tmp153, __cil_tmp156);
  }
  {
#line 619
  __cil_tmp157 = etdev->linkspeed;
#line 619
  if (__cil_tmp157 == 2U) {
    {
#line 620
    __cil_tmp158 = etdev->regs;
#line 620
    __cil_tmp159 = & __cil_tmp158->global.watchdog_timer;
#line 620
    __cil_tmp160 = (void volatile   *)__cil_tmp159;
#line 620
    writel(40000U, __cil_tmp160);
    }
  } else {

  }
  }
  {
#line 623
  __cil_tmp161 = & etdev->send_hw_lock;
#line 623
  spin_unlock_irqrestore(__cil_tmp161, flags);
  }
#line 625
  return (0);
}
}
#line 637 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
__inline static void et131x_free_send_packet(struct et131x_adapter *etdev , struct tcb *tcb ) 
{ unsigned long flags ;
  struct tx_desc *desc ;
  struct net_device_stats *stats ;
  raw_spinlock_t *tmp ;
  int __ret_warn_on ;
  long tmp___0 ;
  u32 __cil_tmp9 ;
  unsigned int __cil_tmp10 ;
  atomic_t *__cil_tmp11 ;
  u32 __cil_tmp12 ;
  int __cil_tmp13 ;
  atomic_t *__cil_tmp14 ;
  atomic_t *__cil_tmp15 ;
  struct sk_buff *__cil_tmp16 ;
  unsigned long __cil_tmp17 ;
  struct sk_buff *__cil_tmp18 ;
  unsigned long __cil_tmp19 ;
  struct sk_buff *__cil_tmp20 ;
  unsigned int __cil_tmp21 ;
  unsigned long __cil_tmp22 ;
  unsigned long __cil_tmp23 ;
  u32 __cil_tmp24 ;
  unsigned long __cil_tmp25 ;
  unsigned long __cil_tmp26 ;
  struct tx_desc *__cil_tmp27 ;
  struct pci_dev *__cil_tmp28 ;
  u32 __cil_tmp29 ;
  dma_addr_t __cil_tmp30 ;
  u32 __cil_tmp31 ;
  size_t __cil_tmp32 ;
  u32 *__cil_tmp33 ;
  u32 __cil_tmp34 ;
  unsigned int __cil_tmp35 ;
  u32 __cil_tmp36 ;
  u32 __cil_tmp37 ;
  unsigned long __cil_tmp38 ;
  u32 __cil_tmp39 ;
  unsigned long __cil_tmp40 ;
  unsigned long __cil_tmp41 ;
  struct tx_desc *__cil_tmp42 ;
  struct tx_desc *__cil_tmp43 ;
  unsigned long __cil_tmp44 ;
  struct sk_buff *__cil_tmp45 ;
  void *__cil_tmp46 ;
  spinlock_t *__cil_tmp47 ;
  uint64_t __cil_tmp48 ;
  struct tcb *__cil_tmp49 ;
  unsigned long __cil_tmp50 ;
  struct tcb *__cil_tmp51 ;
  unsigned long __cil_tmp52 ;
  struct tcb *__cil_tmp53 ;
  spinlock_t *__cil_tmp54 ;
  int __cil_tmp55 ;
  int __cil_tmp56 ;
  long __cil_tmp57 ;
  int __cil_tmp58 ;
  int __cil_tmp59 ;
  int __cil_tmp60 ;
  long __cil_tmp61 ;

  {
#line 641
  desc = (struct tx_desc *)0;
#line 642
  stats = & etdev->net_stats;
  {
#line 644
  __cil_tmp9 = tcb->flags;
#line 644
  __cil_tmp10 = __cil_tmp9 & 2U;
#line 644
  if (__cil_tmp10 != 0U) {
    {
#line 645
    __cil_tmp11 = & etdev->Stats.brdcstxmt;
#line 645
    atomic_inc(__cil_tmp11);
    }
  } else {
    {
#line 646
    __cil_tmp12 = tcb->flags;
#line 646
    __cil_tmp13 = (int )__cil_tmp12;
#line 646
    if (__cil_tmp13 & 1) {
      {
#line 647
      __cil_tmp14 = & etdev->Stats.multixmt;
#line 647
      atomic_inc(__cil_tmp14);
      }
    } else {
      {
#line 649
      __cil_tmp15 = & etdev->Stats.unixmt;
#line 649
      atomic_inc(__cil_tmp15);
      }
    }
    }
  }
  }
  {
#line 651
  __cil_tmp16 = (struct sk_buff *)0;
#line 651
  __cil_tmp17 = (unsigned long )__cil_tmp16;
#line 651
  __cil_tmp18 = tcb->skb;
#line 651
  __cil_tmp19 = (unsigned long )__cil_tmp18;
#line 651
  if (__cil_tmp19 != __cil_tmp17) {
#line 652
    __cil_tmp20 = tcb->skb;
#line 652
    __cil_tmp21 = __cil_tmp20->len;
#line 652
    __cil_tmp22 = (unsigned long )__cil_tmp21;
#line 652
    __cil_tmp23 = stats->tx_bytes;
#line 652
    stats->tx_bytes = __cil_tmp23 + __cil_tmp22;
    ldv_35750: 
    {
#line 659
    __cil_tmp24 = tcb->index_start;
#line 659
    __cil_tmp25 = (unsigned long )__cil_tmp24;
#line 659
    __cil_tmp26 = __cil_tmp25 & 1023UL;
#line 659
    __cil_tmp27 = etdev->tx_ring.tx_desc_ring;
#line 659
    desc = __cil_tmp27 + __cil_tmp26;
#line 662
    __cil_tmp28 = etdev->pdev;
#line 662
    __cil_tmp29 = desc->addr_lo;
#line 662
    __cil_tmp30 = (dma_addr_t )__cil_tmp29;
#line 662
    __cil_tmp31 = desc->len_vlan;
#line 662
    __cil_tmp32 = (size_t )__cil_tmp31;
#line 662
    pci_unmap_single(__cil_tmp28, __cil_tmp30, __cil_tmp32, 1);
#line 666
    __cil_tmp33 = & tcb->index_start;
#line 666
    add_10bit(__cil_tmp33, 1);
    }
    {
#line 667
    __cil_tmp34 = tcb->index_start;
#line 667
    __cil_tmp35 = __cil_tmp34 & 1023U;
#line 667
    if (__cil_tmp35 > 511U) {
#line 669
      __cil_tmp36 = tcb->index_start;
#line 669
      tcb->index_start = __cil_tmp36 & 4294966272U;
#line 670
      __cil_tmp37 = tcb->index_start;
#line 670
      tcb->index_start = __cil_tmp37 ^ 1024U;
    } else {

    }
    }
    {
#line 673
    __cil_tmp38 = (unsigned long )desc;
#line 673
    __cil_tmp39 = tcb->index;
#line 673
    __cil_tmp40 = (unsigned long )__cil_tmp39;
#line 673
    __cil_tmp41 = __cil_tmp40 & 1023UL;
#line 673
    __cil_tmp42 = etdev->tx_ring.tx_desc_ring;
#line 673
    __cil_tmp43 = __cil_tmp42 + __cil_tmp41;
#line 673
    __cil_tmp44 = (unsigned long )__cil_tmp43;
#line 673
    if (__cil_tmp44 != __cil_tmp38) {
#line 673
      goto ldv_35750;
    } else {
#line 675
      goto ldv_35751;
    }
    }
    ldv_35751: 
    {
#line 675
    __cil_tmp45 = tcb->skb;
#line 675
    dev_kfree_skb_any(__cil_tmp45);
    }
  } else {

  }
  }
  {
#line 678
  __cil_tmp46 = (void *)tcb;
#line 678
  memset(__cil_tmp46, 0, 40UL);
#line 681
  __cil_tmp47 = & etdev->TCBReadyQLock;
#line 681
  tmp = spinlock_check(__cil_tmp47);
#line 681
  flags = _raw_spin_lock_irqsave(tmp);
#line 683
  __cil_tmp48 = etdev->Stats.opackets;
#line 683
  etdev->Stats.opackets = __cil_tmp48 + 1ULL;
  }
  {
#line 685
  __cil_tmp49 = (struct tcb *)0;
#line 685
  __cil_tmp50 = (unsigned long )__cil_tmp49;
#line 685
  __cil_tmp51 = etdev->tx_ring.tcb_qtail;
#line 685
  __cil_tmp52 = (unsigned long )__cil_tmp51;
#line 685
  if (__cil_tmp52 != __cil_tmp50) {
#line 686
    __cil_tmp53 = etdev->tx_ring.tcb_qtail;
#line 686
    __cil_tmp53->next = tcb;
  } else {
#line 689
    etdev->tx_ring.tcb_qhead = tcb;
  }
  }
  {
#line 691
  etdev->tx_ring.tcb_qtail = tcb;
#line 693
  __cil_tmp54 = & etdev->TCBReadyQLock;
#line 693
  spin_unlock_irqrestore(__cil_tmp54, flags);
#line 694
  __cil_tmp55 = etdev->tx_ring.used;
#line 694
  __ret_warn_on = __cil_tmp55 < 0;
#line 694
  __cil_tmp56 = __ret_warn_on != 0;
#line 694
  __cil_tmp57 = (long )__cil_tmp56;
#line 694
  tmp___0 = __builtin_expect(__cil_tmp57, 0L);
  }
#line 694
  if (tmp___0 != 0L) {
    {
#line 694
    __cil_tmp58 = (int const   )694;
#line 694
    __cil_tmp59 = (int )__cil_tmp58;
#line 694
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p",
                       __cil_tmp59);
    }
  } else {

  }
  {
#line 694
  __cil_tmp60 = __ret_warn_on != 0;
#line 694
  __cil_tmp61 = (long )__cil_tmp60;
#line 694
  __builtin_expect(__cil_tmp61, 0L);
  }
#line 696
  return;
}
}
#line 703 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_free_busy_send_packets(struct et131x_adapter *etdev ) 
{ struct tcb *tcb ;
  unsigned long flags ;
  u32 freed ;
  raw_spinlock_t *tmp ;
  struct tcb *next ;
  raw_spinlock_t *tmp___0 ;
  int __ret_warn_on ;
  long tmp___1 ;
  spinlock_t *__cil_tmp10 ;
  struct tcb *__cil_tmp11 ;
  unsigned long __cil_tmp12 ;
  unsigned long __cil_tmp13 ;
  int __cil_tmp14 ;
  spinlock_t *__cil_tmp15 ;
  spinlock_t *__cil_tmp16 ;
  struct tcb *__cil_tmp17 ;
  unsigned long __cil_tmp18 ;
  unsigned long __cil_tmp19 ;
  int __cil_tmp20 ;
  long __cil_tmp21 ;
  int __cil_tmp22 ;
  int __cil_tmp23 ;
  int __cil_tmp24 ;
  long __cil_tmp25 ;
  spinlock_t *__cil_tmp26 ;

  {
  {
#line 707
  freed = 0U;
#line 710
  __cil_tmp10 = & etdev->TCBSendQLock;
#line 710
  tmp = spinlock_check(__cil_tmp10);
#line 710
  flags = _raw_spin_lock_irqsave(tmp);
#line 712
  tcb = etdev->tx_ring.send_head;
  }
#line 714
  goto ldv_35771;
  ldv_35770: 
#line 715
  next = tcb->next;
#line 717
  etdev->tx_ring.send_head = next;
  {
#line 719
  __cil_tmp11 = (struct tcb *)0;
#line 719
  __cil_tmp12 = (unsigned long )__cil_tmp11;
#line 719
  __cil_tmp13 = (unsigned long )next;
#line 719
  if (__cil_tmp13 == __cil_tmp12) {
#line 720
    etdev->tx_ring.send_tail = (struct tcb *)0;
  } else {

  }
  }
  {
#line 722
  __cil_tmp14 = etdev->tx_ring.used;
#line 722
  etdev->tx_ring.used = __cil_tmp14 - 1;
#line 724
  __cil_tmp15 = & etdev->TCBSendQLock;
#line 724
  spin_unlock_irqrestore(__cil_tmp15, flags);
#line 726
  freed = freed + 1U;
#line 727
  et131x_free_send_packet(etdev, tcb);
#line 729
  __cil_tmp16 = & etdev->TCBSendQLock;
#line 729
  tmp___0 = spinlock_check(__cil_tmp16);
#line 729
  flags = _raw_spin_lock_irqsave(tmp___0);
#line 731
  tcb = etdev->tx_ring.send_head;
  }
  ldv_35771: ;
  {
#line 714
  __cil_tmp17 = (struct tcb *)0;
#line 714
  __cil_tmp18 = (unsigned long )__cil_tmp17;
#line 714
  __cil_tmp19 = (unsigned long )tcb;
#line 714
  if (__cil_tmp19 != __cil_tmp18) {
#line 714
    if (freed <= 63U) {
#line 715
      goto ldv_35770;
    } else {
#line 717
      goto ldv_35772;
    }
  } else {
#line 717
    goto ldv_35772;
  }
  }
  ldv_35772: 
  {
#line 734
  __ret_warn_on = freed == 64U;
#line 734
  __cil_tmp20 = __ret_warn_on != 0;
#line 734
  __cil_tmp21 = (long )__cil_tmp20;
#line 734
  tmp___1 = __builtin_expect(__cil_tmp21, 0L);
  }
#line 734
  if (tmp___1 != 0L) {
    {
#line 734
    __cil_tmp22 = (int const   )734;
#line 734
    __cil_tmp23 = (int )__cil_tmp22;
#line 734
    warn_slowpath_null("/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p",
                       __cil_tmp23);
    }
  } else {

  }
  {
#line 734
  __cil_tmp24 = __ret_warn_on != 0;
#line 734
  __cil_tmp25 = (long )__cil_tmp24;
#line 734
  __builtin_expect(__cil_tmp25, 0L);
#line 736
  __cil_tmp26 = & etdev->TCBSendQLock;
#line 736
  spin_unlock_irqrestore(__cil_tmp26, flags);
#line 738
  etdev->tx_ring.used = 0;
  }
#line 739
  return;
}
}
#line 750 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et1310_tx.c.p"
void et131x_handle_send_interrupt(struct et131x_adapter *etdev ) 
{ unsigned long flags ;
  u32 serviced ;
  struct tcb *tcb ;
  u32 index ;
  raw_spinlock_t *tmp ;
  raw_spinlock_t *tmp___0 ;
  raw_spinlock_t *tmp___1 ;
  ADDRESS_MAP_t *__cil_tmp9 ;
  u32 *__cil_tmp10 ;
  void const volatile   *__cil_tmp11 ;
  spinlock_t *__cil_tmp12 ;
  int __cil_tmp13 ;
  struct tcb *__cil_tmp14 ;
  unsigned long __cil_tmp15 ;
  struct tcb *__cil_tmp16 ;
  unsigned long __cil_tmp17 ;
  spinlock_t *__cil_tmp18 ;
  spinlock_t *__cil_tmp19 ;
  struct tcb *__cil_tmp20 ;
  unsigned long __cil_tmp21 ;
  unsigned long __cil_tmp22 ;
  u32 __cil_tmp23 ;
  unsigned int __cil_tmp24 ;
  unsigned int __cil_tmp25 ;
  u32 __cil_tmp26 ;
  unsigned int __cil_tmp27 ;
  int __cil_tmp28 ;
  struct tcb *__cil_tmp29 ;
  unsigned long __cil_tmp30 ;
  struct tcb *__cil_tmp31 ;
  unsigned long __cil_tmp32 ;
  spinlock_t *__cil_tmp33 ;
  spinlock_t *__cil_tmp34 ;
  struct tcb *__cil_tmp35 ;
  unsigned long __cil_tmp36 ;
  unsigned long __cil_tmp37 ;
  u32 __cil_tmp38 ;
  unsigned int __cil_tmp39 ;
  unsigned int __cil_tmp40 ;
  u32 __cil_tmp41 ;
  unsigned int __cil_tmp42 ;
  int __cil_tmp43 ;
  struct net_device *__cil_tmp44 ;
  spinlock_t *__cil_tmp45 ;

  {
  {
#line 757
  __cil_tmp9 = etdev->regs;
#line 757
  __cil_tmp10 = & __cil_tmp9->txdma.NewServiceComplete;
#line 757
  __cil_tmp11 = (void const volatile   *)__cil_tmp10;
#line 757
  serviced = readl(__cil_tmp11);
#line 758
  index = serviced & 1023U;
#line 763
  __cil_tmp12 = & etdev->TCBSendQLock;
#line 763
  tmp = spinlock_check(__cil_tmp12);
#line 763
  flags = _raw_spin_lock_irqsave(tmp);
#line 765
  tcb = etdev->tx_ring.send_head;
  }
#line 767
  goto ldv_35789;
  ldv_35788: 
#line 770
  __cil_tmp13 = etdev->tx_ring.used;
#line 770
  etdev->tx_ring.used = __cil_tmp13 - 1;
#line 771
  etdev->tx_ring.send_head = tcb->next;
  {
#line 772
  __cil_tmp14 = (struct tcb *)0;
#line 772
  __cil_tmp15 = (unsigned long )__cil_tmp14;
#line 772
  __cil_tmp16 = tcb->next;
#line 772
  __cil_tmp17 = (unsigned long )__cil_tmp16;
#line 772
  if (__cil_tmp17 == __cil_tmp15) {
#line 773
    etdev->tx_ring.send_tail = (struct tcb *)0;
  } else {

  }
  }
  {
#line 775
  __cil_tmp18 = & etdev->TCBSendQLock;
#line 775
  spin_unlock_irqrestore(__cil_tmp18, flags);
#line 776
  et131x_free_send_packet(etdev, tcb);
#line 777
  __cil_tmp19 = & etdev->TCBSendQLock;
#line 777
  tmp___0 = spinlock_check(__cil_tmp19);
#line 777
  flags = _raw_spin_lock_irqsave(tmp___0);
#line 780
  tcb = etdev->tx_ring.send_head;
  }
  ldv_35789: ;
  {
#line 767
  __cil_tmp20 = (struct tcb *)0;
#line 767
  __cil_tmp21 = (unsigned long )__cil_tmp20;
#line 767
  __cil_tmp22 = (unsigned long )tcb;
#line 767
  if (__cil_tmp22 != __cil_tmp21) {
    {
#line 767
    __cil_tmp23 = tcb->index;
#line 767
    __cil_tmp24 = __cil_tmp23 ^ serviced;
#line 767
    __cil_tmp25 = __cil_tmp24 & 1024U;
#line 767
    if (__cil_tmp25 != 0U) {
      {
#line 767
      __cil_tmp26 = tcb->index;
#line 767
      __cil_tmp27 = __cil_tmp26 & 1023U;
#line 767
      if (__cil_tmp27 > index) {
#line 770
        goto ldv_35788;
      } else {
#line 772
        goto ldv_35790;
      }
      }
    } else {
#line 772
      goto ldv_35790;
    }
    }
  } else {
#line 772
    goto ldv_35790;
  }
  }
  ldv_35790: ;
#line 782
  goto ldv_35795;
  ldv_35794: 
#line 785
  __cil_tmp28 = etdev->tx_ring.used;
#line 785
  etdev->tx_ring.used = __cil_tmp28 - 1;
#line 786
  etdev->tx_ring.send_head = tcb->next;
  {
#line 787
  __cil_tmp29 = (struct tcb *)0;
#line 787
  __cil_tmp30 = (unsigned long )__cil_tmp29;
#line 787
  __cil_tmp31 = tcb->next;
#line 787
  __cil_tmp32 = (unsigned long )__cil_tmp31;
#line 787
  if (__cil_tmp32 == __cil_tmp30) {
#line 788
    etdev->tx_ring.send_tail = (struct tcb *)0;
  } else {

  }
  }
  {
#line 790
  __cil_tmp33 = & etdev->TCBSendQLock;
#line 790
  spin_unlock_irqrestore(__cil_tmp33, flags);
#line 791
  et131x_free_send_packet(etdev, tcb);
#line 792
  __cil_tmp34 = & etdev->TCBSendQLock;
#line 792
  tmp___1 = spinlock_check(__cil_tmp34);
#line 792
  flags = _raw_spin_lock_irqsave(tmp___1);
#line 795
  tcb = etdev->tx_ring.send_head;
  }
  ldv_35795: ;
  {
#line 782
  __cil_tmp35 = (struct tcb *)0;
#line 782
  __cil_tmp36 = (unsigned long )__cil_tmp35;
#line 782
  __cil_tmp37 = (unsigned long )tcb;
#line 782
  if (__cil_tmp37 != __cil_tmp36) {
    {
#line 782
    __cil_tmp38 = tcb->index;
#line 782
    __cil_tmp39 = __cil_tmp38 ^ serviced;
#line 782
    __cil_tmp40 = __cil_tmp39 & 1024U;
#line 782
    if (__cil_tmp40 == 0U) {
      {
#line 782
      __cil_tmp41 = tcb->index;
#line 782
      __cil_tmp42 = __cil_tmp41 & 1023U;
#line 782
      if (__cil_tmp42 < index) {
#line 785
        goto ldv_35794;
      } else {
#line 787
        goto ldv_35796;
      }
      }
    } else {
#line 787
      goto ldv_35796;
    }
    }
  } else {
#line 787
    goto ldv_35796;
  }
  }
  ldv_35796: ;
  {
#line 799
  __cil_tmp43 = etdev->tx_ring.used;
#line 799
  if (__cil_tmp43 <= 21) {
    {
#line 800
    __cil_tmp44 = etdev->netdev;
#line 800
    netif_wake_queue(__cil_tmp44);
    }
  } else {

  }
  }
  {
#line 802
  __cil_tmp45 = & etdev->TCBSendQLock;
#line 802
  spin_unlock_irqrestore(__cil_tmp45, flags);
  }
#line 803
  return;
}
}
#line 34 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/string_64.h"
extern void *__memcpy(void * , void const   * , size_t  ) ;
#line 261 "include/linux/lockdep.h"
extern void lockdep_init_map(struct lockdep_map * , char const   * , struct lock_class_key * ,
                             int  ) ;
#line 93 "include/linux/spinlock.h"
extern void __raw_spin_lock_init(raw_spinlock_t * , char const   * , struct lock_class_key * ) ;
#line 82 "include/linux/jiffies.h"
extern unsigned long volatile   jiffies ;
#line 91 "include/linux/timer.h"
extern void init_timer_key(struct timer_list * , char const   * , struct lock_class_key * ) ;
#line 211
extern int mod_timer(struct timer_list * , unsigned long  ) ;
#line 156 "include/linux/workqueue.h"
extern void __init_work(struct work_struct * , int  ) ;
#line 189 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/io.h"
extern void iounmap(void volatile   * ) ;
#line 99 "include/linux/module.h"
extern struct module __this_module ;
#line 705 "include/linux/device.h"
extern void *dev_get_drvdata(struct device  const  * ) ;
#line 706
extern int dev_set_drvdata(struct device * , void * ) ;
#line 803
extern int _dev_info(struct device  const  * , char const   *  , ...) ;
#line 678 "include/linux/pci.h"
extern struct pci_dev *pci_dev_get(struct pci_dev * ) ;
#line 679
extern void pci_dev_put(struct pci_dev * ) ;
#line 698
extern int pci_find_capability(struct pci_dev * , int  ) ;
#line 731
extern int pci_bus_write_config_word(struct pci_bus * , unsigned int  , int  , u16  ) ;
#line 754 "include/linux/pci.h"
__inline static int pci_write_config_word(struct pci_dev *dev , int where , u16 val ) 
{ int tmp ;
  struct pci_bus *__cil_tmp5 ;
  unsigned int __cil_tmp6 ;
  int __cil_tmp7 ;
  u16 __cil_tmp8 ;

  {
  {
#line 756
  __cil_tmp5 = dev->bus;
#line 756
  __cil_tmp6 = dev->devfn;
#line 756
  __cil_tmp7 = (int )val;
#line 756
  __cil_tmp8 = (u16 )__cil_tmp7;
#line 756
  tmp = pci_bus_write_config_word(__cil_tmp5, __cil_tmp6, where, __cil_tmp8);
  }
#line 756
  return (tmp);
}
}
#line 764
extern int pci_enable_device(struct pci_dev * ) ;
#line 781
extern void pci_disable_device(struct pci_dev * ) ;
#line 782
extern void pci_set_master(struct pci_dev * ) ;
#line 813
extern int pci_save_state(struct pci_dev * ) ;
#line 884
extern int pci_request_regions(struct pci_dev * , char const   * ) ;
#line 886
extern void pci_release_regions(struct pci_dev * ) ;
#line 916
extern int __pci_register_driver(struct pci_driver * , struct module * , char const   * ) ;
#line 925
extern void pci_unregister_driver(struct pci_driver * ) ;
#line 58 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/dma-mapping.h"
extern int dma_supported(struct device * , u64  ) ;
#line 59
extern int dma_set_mask(struct device * , u64  ) ;
#line 108 "include/linux/dma-mapping.h"
__inline static int dma_set_coherent_mask(struct device *dev , u64 mask ) 
{ int tmp ;

  {
  {
#line 110
  tmp = dma_supported(dev, mask);
  }
#line 110
  if (tmp == 0) {
#line 111
    return (-5);
  } else {

  }
#line 112
  dev->coherent_dma_mask = mask;
#line 113
  return (0);
}
}
#line 105 "include/asm-generic/pci-dma-compat.h"
__inline static int pci_set_dma_mask(struct pci_dev *dev , u64 mask ) 
{ int tmp ;
  struct device *__cil_tmp4 ;

  {
  {
#line 107
  __cil_tmp4 = & dev->dev;
#line 107
  tmp = dma_set_mask(__cil_tmp4, mask);
  }
#line 107
  return (tmp);
}
}
#line 110 "include/asm-generic/pci-dma-compat.h"
__inline static int pci_set_consistent_dma_mask(struct pci_dev *dev , u64 mask ) 
{ int tmp ;
  struct device *__cil_tmp4 ;

  {
  {
#line 112
  __cil_tmp4 = & dev->dev;
#line 112
  tmp = dma_set_coherent_mask(__cil_tmp4, mask);
  }
#line 112
  return (tmp);
}
}
#line 1316 "include/linux/pci.h"
__inline static void *pci_get_drvdata(struct pci_dev *pdev ) 
{ void *tmp ;
  struct device *__cil_tmp3 ;
  struct device  const  *__cil_tmp4 ;

  {
  {
#line 1318
  __cil_tmp3 = & pdev->dev;
#line 1318
  __cil_tmp4 = (struct device  const  *)__cil_tmp3;
#line 1318
  tmp = dev_get_drvdata(__cil_tmp4);
  }
#line 1318
  return (tmp);
}
}
#line 1321 "include/linux/pci.h"
__inline static void pci_set_drvdata(struct pci_dev *pdev , void *data ) 
{ struct device *__cil_tmp3 ;

  {
  {
#line 1323
  __cil_tmp3 = & pdev->dev;
#line 1323
  dev_set_drvdata(__cil_tmp3, data);
  }
#line 1324
  return;
}
}
#line 1444
extern void *pci_ioremap_bar(struct pci_dev * , int  ) ;
#line 57 "include/linux/random.h"
extern void get_random_bytes(void * , int  ) ;
#line 1643 "include/linux/netdevice.h"
extern void free_netdev(struct net_device * ) ;
#line 2458
extern int register_netdev(struct net_device * ) ;
#line 2459
extern void unregister_netdev(struct net_device * ) ;
#line 55 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
void ConfigGlobalRegs(struct et131x_adapter *etdev ) ;
#line 57
void et131x_enable_interrupts(struct et131x_adapter *adapter ) ;
#line 58
void et131x_disable_interrupts(struct et131x_adapter *adapter ) ;
#line 64
int et131x_adapter_memory_alloc(struct et131x_adapter *adapter ) ;
#line 65
void et131x_adapter_memory_free(struct et131x_adapter *adapter ) ;
#line 66
void et131x_hwaddr_init(struct et131x_adapter *adapter ) ;
#line 71
void et131x_isr_handler(struct work_struct *work ) ;
#line 86
struct net_device *et131x_device_alloc(void) ;
#line 121 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static u32 et131x_speed_set  ;
#line 136 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_hwaddr_init(struct et131x_adapter *adapter ) 
{ size_t __len ;
  void *__ret ;
  size_t __len___0 ;
  void *__ret___0 ;
  u8 __cil_tmp6 ;
  unsigned int __cil_tmp7 ;
  u8 __cil_tmp8 ;
  unsigned int __cil_tmp9 ;
  u8 __cil_tmp10 ;
  unsigned int __cil_tmp11 ;
  u8 __cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  u8 __cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  u8 __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  u8 (*__cil_tmp18)[6U] ;
  void *__cil_tmp19 ;
  void *__cil_tmp20 ;
  u8 (*__cil_tmp21)[6U] ;
  void *__cil_tmp22 ;
  u8 (*__cil_tmp23)[6U] ;
  void const   *__cil_tmp24 ;
  u8 (*__cil_tmp25)[6U] ;
  void *__cil_tmp26 ;
  u8 (*__cil_tmp27)[6U] ;
  void const   *__cil_tmp28 ;
  u8 (*__cil_tmp29)[6U] ;
  void *__cil_tmp30 ;
  u8 (*__cil_tmp31)[6U] ;
  void const   *__cil_tmp32 ;
  u8 (*__cil_tmp33)[6U] ;
  void *__cil_tmp34 ;
  u8 (*__cil_tmp35)[6U] ;
  void const   *__cil_tmp36 ;

  {
  {
#line 142
  __cil_tmp6 = adapter->rom_addr[0];
#line 142
  __cil_tmp7 = (unsigned int )__cil_tmp6;
#line 142
  if (__cil_tmp7 == 0U) {
    {
#line 142
    __cil_tmp8 = adapter->rom_addr[1];
#line 142
    __cil_tmp9 = (unsigned int )__cil_tmp8;
#line 142
    if (__cil_tmp9 == 0U) {
      {
#line 142
      __cil_tmp10 = adapter->rom_addr[2];
#line 142
      __cil_tmp11 = (unsigned int )__cil_tmp10;
#line 142
      if (__cil_tmp11 == 0U) {
        {
#line 142
        __cil_tmp12 = adapter->rom_addr[3];
#line 142
        __cil_tmp13 = (unsigned int )__cil_tmp12;
#line 142
        if (__cil_tmp13 == 0U) {
          {
#line 142
          __cil_tmp14 = adapter->rom_addr[4];
#line 142
          __cil_tmp15 = (unsigned int )__cil_tmp14;
#line 142
          if (__cil_tmp15 == 0U) {
            {
#line 142
            __cil_tmp16 = adapter->rom_addr[5];
#line 142
            __cil_tmp17 = (unsigned int )__cil_tmp16;
#line 142
            if (__cil_tmp17 == 0U) {
              {
#line 153
              __cil_tmp18 = & adapter->addr;
#line 153
              __cil_tmp19 = (void *)__cil_tmp18;
#line 153
              __cil_tmp20 = __cil_tmp19 + 5U;
#line 153
              get_random_bytes(__cil_tmp20, 1);
#line 159
              __len = 6UL;
              }
#line 159
              if (__len > 63UL) {
                {
#line 159
                __cil_tmp21 = & adapter->rom_addr;
#line 159
                __cil_tmp22 = (void *)__cil_tmp21;
#line 159
                __cil_tmp23 = & adapter->addr;
#line 159
                __cil_tmp24 = (void const   *)__cil_tmp23;
#line 159
                __ret = __memcpy(__cil_tmp22, __cil_tmp24, __len);
                }
              } else {
                {
#line 159
                __cil_tmp25 = & adapter->rom_addr;
#line 159
                __cil_tmp26 = (void *)__cil_tmp25;
#line 159
                __cil_tmp27 = & adapter->addr;
#line 159
                __cil_tmp28 = (void const   *)__cil_tmp27;
#line 159
                __ret = __builtin_memcpy(__cil_tmp26, __cil_tmp28, __len);
                }
              }
            } else {
#line 142
              goto _L___3;
            }
            }
          } else {
#line 142
            goto _L___3;
          }
          }
        } else {
#line 142
          goto _L___3;
        }
        }
      } else {
#line 142
        goto _L___3;
      }
      }
    } else {
#line 142
      goto _L___3;
    }
    }
  } else {
    _L___3: 
#line 166
    __len___0 = 6UL;
#line 166
    if (__len___0 > 63UL) {
      {
#line 166
      __cil_tmp29 = & adapter->addr;
#line 166
      __cil_tmp30 = (void *)__cil_tmp29;
#line 166
      __cil_tmp31 = & adapter->rom_addr;
#line 166
      __cil_tmp32 = (void const   *)__cil_tmp31;
#line 166
      __ret___0 = __memcpy(__cil_tmp30, __cil_tmp32, __len___0);
      }
    } else {
      {
#line 166
      __cil_tmp33 = & adapter->addr;
#line 166
      __cil_tmp34 = (void *)__cil_tmp33;
#line 166
      __cil_tmp35 = & adapter->rom_addr;
#line 166
      __cil_tmp36 = (void const   *)__cil_tmp35;
#line 166
      __ret___0 = __builtin_memcpy(__cil_tmp34, __cil_tmp36, __len___0);
      }
    }
  }
  }
#line 168
  return;
}
}
#line 181 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static int et131x_pci_init(struct et131x_adapter *adapter , struct pci_dev *pdev ) 
{ int i ;
  u8 max_payload ;
  u8 read_size_reg ;
  int tmp ;
  int tmp___0 ;
  u16 acknak[2U] ;
  u16 replay[2U] ;
  int tmp___1 ;
  int tmp___2 ;
  int tmp___3 ;
  int tmp___4 ;
  int tmp___5 ;
  int tmp___6 ;
  size_t __len ;
  void *__ret ;
  struct device *__cil_tmp18 ;
  struct device  const  *__cil_tmp19 ;
  unsigned int __cil_tmp20 ;
  unsigned int __cil_tmp21 ;
  unsigned int __cil_tmp22 ;
  int __cil_tmp23 ;
  u16 __cil_tmp24 ;
  struct device *__cil_tmp25 ;
  struct device  const  *__cil_tmp26 ;
  int __cil_tmp27 ;
  u16 __cil_tmp28 ;
  struct device *__cil_tmp29 ;
  struct device  const  *__cil_tmp30 ;
  u8 __cil_tmp31 ;
  struct device *__cil_tmp32 ;
  struct device  const  *__cil_tmp33 ;
  struct device *__cil_tmp34 ;
  struct device  const  *__cil_tmp35 ;
  unsigned int __cil_tmp36 ;
  unsigned int __cil_tmp37 ;
  unsigned int __cil_tmp38 ;
  unsigned int __cil_tmp39 ;
  int __cil_tmp40 ;
  u8 __cil_tmp41 ;
  struct device *__cil_tmp42 ;
  struct device  const  *__cil_tmp43 ;
  bool __cil_tmp44 ;
  int __cil_tmp45 ;
  unsigned long __cil_tmp46 ;
  u8 (*__cil_tmp47)[6U] ;
  u8 *__cil_tmp48 ;
  u8 *__cil_tmp49 ;
  struct device *__cil_tmp50 ;
  struct device  const  *__cil_tmp51 ;
  u8 (*__cil_tmp52)[6U] ;
  void *__cil_tmp53 ;
  u8 (*__cil_tmp54)[6U] ;
  void const   *__cil_tmp55 ;
  u8 (*__cil_tmp56)[6U] ;
  void *__cil_tmp57 ;
  u8 (*__cil_tmp58)[6U] ;
  void const   *__cil_tmp59 ;

  {
  {
#line 188
  tmp = et131x_init_eeprom(adapter);
  }
#line 188
  if (tmp < 0) {
#line 189
    return (-5);
  } else {

  }
  {
#line 194
  tmp___0 = pci_read_config_byte(pdev, 76, & max_payload);
  }
#line 194
  if (tmp___0 != 0) {
    {
#line 195
    __cil_tmp18 = & pdev->dev;
#line 195
    __cil_tmp19 = (struct device  const  *)__cil_tmp18;
#line 195
    dev_err(__cil_tmp19, "Could not read PCI config space for Max Payload Size\n");
    }
#line 197
    return (-5);
  } else {

  }
#line 201
  __cil_tmp20 = (unsigned int )max_payload;
#line 201
  __cil_tmp21 = __cil_tmp20 & 7U;
#line 201
  max_payload = (u8 )__cil_tmp21;
  {
#line 203
  __cil_tmp22 = (unsigned int )max_payload;
#line 203
  if (__cil_tmp22 <= 1U) {
    {
#line 204
    acknak[0] = (u16 )118U;
#line 204
    acknak[1] = (u16 )208U;
#line 205
    replay[0] = (u16 )480U;
#line 205
    replay[1] = (u16 )749U;
#line 207
    __cil_tmp23 = (int )acknak[(int )max_payload];
#line 207
    __cil_tmp24 = (u16 )__cil_tmp23;
#line 207
    tmp___1 = pci_write_config_word(pdev, 192, __cil_tmp24);
    }
#line 207
    if (tmp___1 != 0) {
      {
#line 209
      __cil_tmp25 = & pdev->dev;
#line 209
      __cil_tmp26 = (struct device  const  *)__cil_tmp25;
#line 209
      dev_err(__cil_tmp26, "Could not write PCI config space for ACK/NAK\n");
      }
#line 211
      return (-5);
    } else {

    }
    {
#line 213
    __cil_tmp27 = (int )replay[(int )max_payload];
#line 213
    __cil_tmp28 = (u16 )__cil_tmp27;
#line 213
    tmp___2 = pci_write_config_word(pdev, 194, __cil_tmp28);
    }
#line 213
    if (tmp___2 != 0) {
      {
#line 215
      __cil_tmp29 = & pdev->dev;
#line 215
      __cil_tmp30 = (struct device  const  *)__cil_tmp29;
#line 215
      dev_err(__cil_tmp30, "Could not write PCI config space for Replay Timer\n");
      }
#line 217
      return (-5);
    } else {

    }
  } else {

  }
  }
  {
#line 224
  __cil_tmp31 = (u8 )17;
#line 224
  tmp___3 = pci_write_config_byte(pdev, 207, __cil_tmp31);
  }
#line 224
  if (tmp___3 != 0) {
    {
#line 225
    __cil_tmp32 = & pdev->dev;
#line 225
    __cil_tmp33 = (struct device  const  *)__cil_tmp32;
#line 225
    dev_err(__cil_tmp33, "Could not write PCI config space for Latency Timers\n");
    }
#line 227
    return (-5);
  } else {

  }
  {
#line 231
  tmp___4 = pci_read_config_byte(pdev, 81, & read_size_reg);
  }
#line 231
  if (tmp___4 != 0) {
    {
#line 232
    __cil_tmp34 = & pdev->dev;
#line 232
    __cil_tmp35 = (struct device  const  *)__cil_tmp34;
#line 232
    dev_err(__cil_tmp35, "Could not read PCI config space for Max read size\n");
    }
#line 234
    return (-5);
  } else {

  }
  {
#line 237
  __cil_tmp36 = (unsigned int )read_size_reg;
#line 237
  __cil_tmp37 = __cil_tmp36 & 143U;
#line 237
  read_size_reg = (u8 )__cil_tmp37;
#line 238
  __cil_tmp38 = (unsigned int )read_size_reg;
#line 238
  __cil_tmp39 = __cil_tmp38 | 64U;
#line 238
  read_size_reg = (u8 )__cil_tmp39;
#line 240
  __cil_tmp40 = (int )read_size_reg;
#line 240
  __cil_tmp41 = (u8 )__cil_tmp40;
#line 240
  tmp___5 = pci_write_config_byte(pdev, 81, __cil_tmp41);
  }
#line 240
  if (tmp___5 != 0) {
    {
#line 241
    __cil_tmp42 = & pdev->dev;
#line 241
    __cil_tmp43 = (struct device  const  *)__cil_tmp42;
#line 241
    dev_err(__cil_tmp43, "Could not write PCI config space for Max read size\n");
    }
#line 243
    return (-5);
  } else {

  }
  {
#line 249
  __cil_tmp44 = adapter->has_eeprom;
#line 249
  if (! __cil_tmp44) {
    {
#line 250
    et131x_hwaddr_init(adapter);
    }
#line 251
    return (0);
  } else {

  }
  }
#line 254
  i = 0;
#line 254
  goto ldv_35689;
  ldv_35688: 
  {
#line 255
  __cil_tmp45 = i + 164;
#line 255
  __cil_tmp46 = (unsigned long )i;
#line 255
  __cil_tmp47 = & adapter->rom_addr;
#line 255
  __cil_tmp48 = (u8 *)__cil_tmp47;
#line 255
  __cil_tmp49 = __cil_tmp48 + __cil_tmp46;
#line 255
  tmp___6 = pci_read_config_byte(pdev, __cil_tmp45, __cil_tmp49);
  }
#line 255
  if (tmp___6 != 0) {
    {
#line 257
    __cil_tmp50 = & pdev->dev;
#line 257
    __cil_tmp51 = (struct device  const  *)__cil_tmp50;
#line 257
    dev_err(__cil_tmp51, "Could not read PCI config space for MAC address\n");
    }
#line 258
    return (-5);
  } else {

  }
#line 254
  i = i + 1;
  ldv_35689: ;
#line 254
  if (i <= 5) {
#line 255
    goto ldv_35688;
  } else {
#line 257
    goto ldv_35690;
  }
  ldv_35690: 
#line 261
  __len = 6UL;
#line 261
  if (__len > 63UL) {
    {
#line 261
    __cil_tmp52 = & adapter->addr;
#line 261
    __cil_tmp53 = (void *)__cil_tmp52;
#line 261
    __cil_tmp54 = & adapter->rom_addr;
#line 261
    __cil_tmp55 = (void const   *)__cil_tmp54;
#line 261
    __ret = __memcpy(__cil_tmp53, __cil_tmp55, __len);
    }
  } else {
    {
#line 261
    __cil_tmp56 = & adapter->addr;
#line 261
    __cil_tmp57 = (void *)__cil_tmp56;
#line 261
    __cil_tmp58 = & adapter->rom_addr;
#line 261
    __cil_tmp59 = (void const   *)__cil_tmp58;
#line 261
    __ret = __builtin_memcpy(__cil_tmp57, __cil_tmp59, __len);
    }
  }
#line 262
  return (0);
}
}
#line 272 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_error_timer_handler(unsigned long data ) 
{ struct et131x_adapter *etdev ;
  u32 pm_csr ;
  ADDRESS_MAP_t *__cil_tmp4 ;
  u32 *__cil_tmp5 ;
  void const volatile   *__cil_tmp6 ;
  unsigned int __cil_tmp7 ;
  struct pci_dev *__cil_tmp8 ;
  struct device *__cil_tmp9 ;
  struct device  const  *__cil_tmp10 ;
  unsigned char *__cil_tmp11 ;
  unsigned char *__cil_tmp12 ;
  unsigned char __cil_tmp13 ;
  unsigned int __cil_tmp14 ;
  u8 __cil_tmp15 ;
  unsigned int __cil_tmp16 ;
  u8 __cil_tmp17 ;
  unsigned int __cil_tmp18 ;
  u8 __cil_tmp19 ;
  int __cil_tmp20 ;
  int __cil_tmp21 ;
  u8 __cil_tmp22 ;
  unsigned int __cil_tmp23 ;
  unsigned char *__cil_tmp24 ;
  unsigned char *__cil_tmp25 ;
  unsigned char __cil_tmp26 ;
  unsigned int __cil_tmp27 ;
  u8 __cil_tmp28 ;
  unsigned int __cil_tmp29 ;
  unsigned int __cil_tmp30 ;
  struct timer_list *__cil_tmp31 ;
  unsigned long __cil_tmp32 ;
  unsigned long __cil_tmp33 ;

  {
  {
#line 274
  etdev = (struct et131x_adapter *)data;
#line 277
  __cil_tmp4 = etdev->regs;
#line 277
  __cil_tmp5 = & __cil_tmp4->global.pm_csr;
#line 277
  __cil_tmp6 = (void const volatile   *)__cil_tmp5;
#line 277
  pm_csr = readl(__cil_tmp6);
  }
  {
#line 279
  __cil_tmp7 = pm_csr & 64U;
#line 279
  if (__cil_tmp7 == 0U) {
    {
#line 280
    UpdateMacStatHostCounters(etdev);
    }
  } else {
    {
#line 282
    __cil_tmp8 = etdev->pdev;
#line 282
    __cil_tmp9 = & __cil_tmp8->dev;
#line 282
    __cil_tmp10 = (struct device  const  *)__cil_tmp9;
#line 282
    dev_err(__cil_tmp10, "No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
    }
  }
  }
  {
#line 285
  __cil_tmp11 = (unsigned char *)etdev;
#line 285
  __cil_tmp12 = __cil_tmp11 + 1652UL;
#line 285
  __cil_tmp13 = *__cil_tmp12;
#line 285
  __cil_tmp14 = (unsigned int )__cil_tmp13;
#line 285
  if (__cil_tmp14 == 0U) {
    {
#line 285
    __cil_tmp15 = etdev->RegistryPhyComa;
#line 285
    __cil_tmp16 = (unsigned int )__cil_tmp15;
#line 285
    if (__cil_tmp16 != 0U) {
      {
#line 285
      __cil_tmp17 = etdev->boot_coma;
#line 285
      __cil_tmp18 = (unsigned int )__cil_tmp17;
#line 285
      if (__cil_tmp18 <= 10U) {
#line 288
        __cil_tmp19 = etdev->boot_coma;
#line 288
        __cil_tmp20 = (int )__cil_tmp19;
#line 288
        __cil_tmp21 = __cil_tmp20 + 1;
#line 288
        etdev->boot_coma = (u8 )__cil_tmp21;
      } else {

      }
      }
    } else {

    }
    }
  } else {

  }
  }
  {
#line 291
  __cil_tmp22 = etdev->boot_coma;
#line 291
  __cil_tmp23 = (unsigned int )__cil_tmp22;
#line 291
  if (__cil_tmp23 == 10U) {
    {
#line 292
    __cil_tmp24 = (unsigned char *)etdev;
#line 292
    __cil_tmp25 = __cil_tmp24 + 1652UL;
#line 292
    __cil_tmp26 = *__cil_tmp25;
#line 292
    __cil_tmp27 = (unsigned int )__cil_tmp26;
#line 292
    if (__cil_tmp27 == 0U) {
      {
#line 292
      __cil_tmp28 = etdev->RegistryPhyComa;
#line 292
      __cil_tmp29 = (unsigned int )__cil_tmp28;
#line 292
      if (__cil_tmp29 != 0U) {
        {
#line 294
        __cil_tmp30 = pm_csr & 64U;
#line 294
        if (__cil_tmp30 == 0U) {
          {
#line 298
          et131x_enable_interrupts(etdev);
#line 299
          EnablePhyComa(etdev);
          }
        } else {

        }
        }
      } else {

      }
      }
    } else {

    }
    }
  } else {

  }
  }
  {
#line 305
  __cil_tmp31 = & etdev->ErrorTimer;
#line 305
  __cil_tmp32 = (unsigned long )jiffies;
#line 305
  __cil_tmp33 = __cil_tmp32 + 250UL;
#line 305
  mod_timer(__cil_tmp31, __cil_tmp33);
  }
#line 306
  return;
}
}
#line 314 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_link_detection_handler(unsigned long data ) 
{ struct et131x_adapter *etdev ;
  unsigned long flags ;
  raw_spinlock_t *tmp ;
  enum ldv_25441 __cil_tmp5 ;
  unsigned int __cil_tmp6 ;
  spinlock_t *__cil_tmp7 ;
  u32 __cil_tmp8 ;
  spinlock_t *__cil_tmp9 ;
  struct net_device *__cil_tmp10 ;

  {
#line 316
  etdev = (struct et131x_adapter *)data;
  {
#line 319
  __cil_tmp5 = etdev->MediaState;
#line 319
  __cil_tmp6 = (unsigned int )__cil_tmp5;
#line 319
  if (__cil_tmp6 == 0U) {
    {
#line 320
    __cil_tmp7 = & etdev->Lock;
#line 320
    tmp = spinlock_check(__cil_tmp7);
#line 320
    flags = _raw_spin_lock_irqsave(tmp);
#line 322
    etdev->MediaState = (enum ldv_25441 )2;
#line 323
    __cil_tmp8 = etdev->Flags;
#line 323
    etdev->Flags = __cil_tmp8 & 3758096383U;
#line 325
    __cil_tmp9 = & etdev->Lock;
#line 325
    spin_unlock_irqrestore(__cil_tmp9, flags);
#line 327
    __cil_tmp10 = etdev->netdev;
#line 327
    netif_carrier_off(__cil_tmp10);
    }
  } else {

  }
  }
#line 329
  return;
}
}
#line 337 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void ConfigGlobalRegs(struct et131x_adapter *etdev ) 
{ struct global_regs *regs ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  u32 *__cil_tmp4 ;
  void volatile   *__cil_tmp5 ;
  u32 *__cil_tmp6 ;
  void volatile   *__cil_tmp7 ;
  u32 __cil_tmp8 ;
  u32 *__cil_tmp9 ;
  void volatile   *__cil_tmp10 ;
  u32 *__cil_tmp11 ;
  void volatile   *__cil_tmp12 ;
  u32 __cil_tmp13 ;
  u32 *__cil_tmp14 ;
  void volatile   *__cil_tmp15 ;
  u32 *__cil_tmp16 ;
  void volatile   *__cil_tmp17 ;
  u32 *__cil_tmp18 ;
  void volatile   *__cil_tmp19 ;
  u32 *__cil_tmp20 ;
  void volatile   *__cil_tmp21 ;
  u32 *__cil_tmp22 ;
  void volatile   *__cil_tmp23 ;
  u32 *__cil_tmp24 ;
  void volatile   *__cil_tmp25 ;
  u32 *__cil_tmp26 ;
  void volatile   *__cil_tmp27 ;

  {
  {
#line 339
  __cil_tmp3 = etdev->regs;
#line 339
  regs = & __cil_tmp3->global;
#line 341
  __cil_tmp4 = & regs->rxq_start_addr;
#line 341
  __cil_tmp5 = (void volatile   *)__cil_tmp4;
#line 341
  writel(0U, __cil_tmp5);
#line 342
  __cil_tmp6 = & regs->txq_end_addr;
#line 342
  __cil_tmp7 = (void volatile   *)__cil_tmp6;
#line 342
  writel(1023U, __cil_tmp7);
  }
  {
#line 344
  __cil_tmp8 = etdev->RegistryJumboPacket;
#line 344
  if (__cil_tmp8 <= 2047U) {
    {
#line 350
    __cil_tmp9 = & regs->rxq_end_addr;
#line 350
    __cil_tmp10 = (void volatile   *)__cil_tmp9;
#line 350
    writel(700U, __cil_tmp10);
#line 351
    __cil_tmp11 = & regs->txq_start_addr;
#line 351
    __cil_tmp12 = (void volatile   *)__cil_tmp11;
#line 351
    writel(701U, __cil_tmp12);
    }
  } else {
    {
#line 352
    __cil_tmp13 = etdev->RegistryJumboPacket;
#line 352
    if (__cil_tmp13 <= 8191U) {
      {
#line 354
      __cil_tmp14 = & regs->rxq_end_addr;
#line 354
      __cil_tmp15 = (void volatile   *)__cil_tmp14;
#line 354
      writel(511U, __cil_tmp15);
#line 355
      __cil_tmp16 = & regs->txq_start_addr;
#line 355
      __cil_tmp17 = (void volatile   *)__cil_tmp16;
#line 355
      writel(512U, __cil_tmp17);
      }
    } else {
      {
#line 362
      __cil_tmp18 = & regs->rxq_end_addr;
#line 362
      __cil_tmp19 = (void volatile   *)__cil_tmp18;
#line 362
      writel(435U, __cil_tmp19);
#line 363
      __cil_tmp20 = & regs->txq_start_addr;
#line 363
      __cil_tmp21 = (void volatile   *)__cil_tmp20;
#line 363
      writel(436U, __cil_tmp21);
      }
    }
    }
  }
  }
  {
#line 367
  __cil_tmp22 = & regs->loopback;
#line 367
  __cil_tmp23 = (void volatile   *)__cil_tmp22;
#line 367
  writel(0U, __cil_tmp23);
#line 370
  __cil_tmp24 = & regs->msi_config;
#line 370
  __cil_tmp25 = (void volatile   *)__cil_tmp24;
#line 370
  writel(0U, __cil_tmp25);
#line 375
  __cil_tmp26 = & regs->watchdog_timer;
#line 375
  __cil_tmp27 = (void volatile   *)__cil_tmp26;
#line 375
  writel(0U, __cil_tmp27);
  }
#line 376
  return;
}
}
#line 385 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
int et131x_adapter_setup(struct et131x_adapter *etdev ) 
{ int status ;
  ADDRESS_MAP_t *__cil_tmp3 ;
  u32 *__cil_tmp4 ;
  void volatile   *__cil_tmp5 ;
  struct pci_dev *__cil_tmp6 ;
  struct device *__cil_tmp7 ;
  struct device  const  *__cil_tmp8 ;
  bool __cil_tmp9 ;
  struct pci_dev *__cil_tmp10 ;
  unsigned short __cil_tmp11 ;
  unsigned int __cil_tmp12 ;
  u16 __cil_tmp13 ;
  u16 __cil_tmp14 ;
  bool __cil_tmp15 ;

  {
  {
#line 387
  status = 0;
#line 390
  ConfigGlobalRegs(etdev);
#line 392
  ConfigMACRegs1(etdev);
#line 396
  __cil_tmp3 = etdev->regs;
#line 396
  __cil_tmp4 = & __cil_tmp3->mmc.mmc_ctrl;
#line 396
  __cil_tmp5 = (void volatile   *)__cil_tmp4;
#line 396
  writel(1U, __cil_tmp5);
#line 398
  ConfigRxMacRegs(etdev);
#line 399
  ConfigTxMacRegs(etdev);
#line 401
  ConfigRxDmaRegs(etdev);
#line 402
  ConfigTxDmaRegs(etdev);
#line 404
  ConfigMacStatRegs(etdev);
#line 407
  status = et131x_xcvr_find(etdev);
  }
#line 409
  if (status != 0) {
    {
#line 410
    __cil_tmp6 = etdev->pdev;
#line 410
    __cil_tmp7 = & __cil_tmp6->dev;
#line 410
    __cil_tmp8 = (struct device  const  *)__cil_tmp7;
#line 410
    dev_warn(__cil_tmp8, "Could not find the xcvr\n");
    }
  } else {

  }
  {
#line 413
  ET1310_PhyInit(etdev);
#line 416
  ET1310_PhyReset(etdev);
#line 419
  __cil_tmp9 = (bool )1;
#line 419
  ET1310_PhyPowerDown(etdev, __cil_tmp9);
  }
  {
#line 425
  __cil_tmp10 = etdev->pdev;
#line 425
  __cil_tmp11 = __cil_tmp10->device;
#line 425
  __cil_tmp12 = (unsigned int )__cil_tmp11;
#line 425
  if (__cil_tmp12 != 60673U) {
    {
#line 426
    __cil_tmp13 = (u16 )1;
#line 426
    ET1310_PhyAdvertise1000BaseT(etdev, __cil_tmp13);
    }
  } else {
    {
#line 428
    __cil_tmp14 = (u16 )0;
#line 428
    ET1310_PhyAdvertise1000BaseT(etdev, __cil_tmp14);
    }
  }
  }
  {
#line 431
  __cil_tmp15 = (bool )0;
#line 431
  ET1310_PhyPowerDown(etdev, __cil_tmp15);
#line 433
  et131x_setphy_normal(etdev);
  }
#line 434
  return (status);
}
}
#line 441 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_soft_reset(struct et131x_adapter *adapter ) 
{ ADDRESS_MAP_t *__cil_tmp2 ;
  u32 *__cil_tmp3 ;
  void volatile   *__cil_tmp4 ;
  ADDRESS_MAP_t *__cil_tmp5 ;
  u32 *__cil_tmp6 ;
  void volatile   *__cil_tmp7 ;
  ADDRESS_MAP_t *__cil_tmp8 ;
  u32 *__cil_tmp9 ;
  void volatile   *__cil_tmp10 ;
  ADDRESS_MAP_t *__cil_tmp11 ;
  u32 *__cil_tmp12 ;
  void volatile   *__cil_tmp13 ;

  {
  {
#line 444
  __cil_tmp2 = adapter->regs;
#line 444
  __cil_tmp3 = & __cil_tmp2->mac.cfg1;
#line 444
  __cil_tmp4 = (void volatile   *)__cil_tmp3;
#line 444
  writel(3222208512U, __cil_tmp4);
#line 447
  __cil_tmp5 = adapter->regs;
#line 447
  __cil_tmp6 = & __cil_tmp5->global.sw_reset;
#line 447
  __cil_tmp7 = (void volatile   *)__cil_tmp6;
#line 447
  writel(127U, __cil_tmp7);
#line 448
  __cil_tmp8 = adapter->regs;
#line 448
  __cil_tmp9 = & __cil_tmp8->mac.cfg1;
#line 448
  __cil_tmp10 = (void volatile   *)__cil_tmp9;
#line 448
  writel(983040U, __cil_tmp10);
#line 449
  __cil_tmp11 = adapter->regs;
#line 449
  __cil_tmp12 = & __cil_tmp11->mac.cfg1;
#line 449
  __cil_tmp13 = (void volatile   *)__cil_tmp12;
#line 449
  writel(0U, __cil_tmp13);
  }
#line 450
  return;
}
}
#line 459 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_align_allocated_memory(struct et131x_adapter *adapter , unsigned long long *phys_addr ,
                                   unsigned long long *offset , unsigned long long mask ) 
{ uint64_t new_addr ;
  unsigned long long __cil_tmp6 ;
  unsigned long long __cil_tmp7 ;
  unsigned long long __cil_tmp8 ;
  unsigned long long __cil_tmp9 ;
  unsigned long long __cil_tmp10 ;

  {
#line 465
  *offset = 0ULL;
#line 467
  __cil_tmp6 = ~ mask;
#line 467
  __cil_tmp7 = *phys_addr;
#line 467
  new_addr = __cil_tmp7 & __cil_tmp6;
  {
#line 469
  __cil_tmp8 = *phys_addr;
#line 469
  if (__cil_tmp8 != new_addr) {
#line 471
    __cil_tmp9 = mask + new_addr;
#line 471
    new_addr = __cil_tmp9 + 1ULL;
#line 473
    __cil_tmp10 = *phys_addr;
#line 473
    *offset = new_addr - __cil_tmp10;
#line 475
    *phys_addr = new_addr;
  } else {

  }
  }
#line 477
  return;
}
}
#line 487 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
int et131x_adapter_memory_alloc(struct et131x_adapter *adapter ) 
{ int status ;
  struct pci_dev *__cil_tmp3 ;
  struct device *__cil_tmp4 ;
  struct device  const  *__cil_tmp5 ;
  struct pci_dev *__cil_tmp6 ;
  struct device *__cil_tmp7 ;
  struct device  const  *__cil_tmp8 ;
  struct pci_dev *__cil_tmp9 ;
  struct device *__cil_tmp10 ;
  struct device  const  *__cil_tmp11 ;

  {
  {
#line 492
  status = et131x_tx_dma_memory_alloc(adapter);
  }
#line 493
  if (status != 0) {
    {
#line 494
    __cil_tmp3 = adapter->pdev;
#line 494
    __cil_tmp4 = & __cil_tmp3->dev;
#line 494
    __cil_tmp5 = (struct device  const  *)__cil_tmp4;
#line 494
    dev_err(__cil_tmp5, "et131x_tx_dma_memory_alloc FAILED\n");
    }
#line 496
    return (status);
  } else {

  }
  {
#line 499
  status = et131x_rx_dma_memory_alloc(adapter);
  }
#line 500
  if (status != 0) {
    {
#line 501
    __cil_tmp6 = adapter->pdev;
#line 501
    __cil_tmp7 = & __cil_tmp6->dev;
#line 501
    __cil_tmp8 = (struct device  const  *)__cil_tmp7;
#line 501
    dev_err(__cil_tmp8, "et131x_rx_dma_memory_alloc FAILED\n");
#line 503
    et131x_tx_dma_memory_free(adapter);
    }
#line 504
    return (status);
  } else {

  }
  {
#line 508
  status = et131x_init_recv(adapter);
  }
#line 509
  if (status != 0) {
    {
#line 510
    __cil_tmp9 = adapter->pdev;
#line 510
    __cil_tmp10 = & __cil_tmp9->dev;
#line 510
    __cil_tmp11 = (struct device  const  *)__cil_tmp10;
#line 510
    dev_err(__cil_tmp11, "et131x_init_recv FAILED\n");
#line 512
    et131x_tx_dma_memory_free(adapter);
#line 513
    et131x_rx_dma_memory_free(adapter);
    }
  } else {

  }
#line 515
  return (status);
}
}
#line 522 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void et131x_adapter_memory_free(struct et131x_adapter *adapter ) 
{ 

  {
  {
#line 525
  et131x_tx_dma_memory_free(adapter);
#line 526
  et131x_rx_dma_memory_free(adapter);
  }
#line 527
  return;
}
}
#line 541 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev , struct pci_dev *pdev ) 
{ u8 default_mac[6U] ;
  u8 duplex[6U] ;
  u16 speed[6U] ;
  struct et131x_adapter *etdev ;
  void *tmp ;
  struct lock_class_key __key ;
  struct lock_class_key __key___0 ;
  struct lock_class_key __key___1 ;
  struct lock_class_key __key___2 ;
  struct lock_class_key __key___3 ;
  struct lock_class_key __key___4 ;
  struct lock_class_key __key___5 ;
  struct lock_class_key __key___6 ;
  size_t __len ;
  void *__ret ;
  struct net_device  const  *__cil_tmp18 ;
  resource_size_t __cil_tmp19 ;
  spinlock_t *__cil_tmp20 ;
  struct raw_spinlock *__cil_tmp21 ;
  spinlock_t *__cil_tmp22 ;
  struct raw_spinlock *__cil_tmp23 ;
  spinlock_t *__cil_tmp24 ;
  struct raw_spinlock *__cil_tmp25 ;
  spinlock_t *__cil_tmp26 ;
  struct raw_spinlock *__cil_tmp27 ;
  spinlock_t *__cil_tmp28 ;
  struct raw_spinlock *__cil_tmp29 ;
  spinlock_t *__cil_tmp30 ;
  struct raw_spinlock *__cil_tmp31 ;
  spinlock_t *__cil_tmp32 ;
  struct raw_spinlock *__cil_tmp33 ;
  spinlock_t *__cil_tmp34 ;
  struct raw_spinlock *__cil_tmp35 ;
  struct pci_dev *__cil_tmp36 ;
  struct device *__cil_tmp37 ;
  struct device  const  *__cil_tmp38 ;
  u8 (*__cil_tmp39)[6U] ;
  void *__cil_tmp40 ;
  void const   *__cil_tmp41 ;
  u8 (*__cil_tmp42)[6U] ;
  void *__cil_tmp43 ;
  void const   *__cil_tmp44 ;
  struct pci_dev *__cil_tmp45 ;
  unsigned short __cil_tmp46 ;
  unsigned int __cil_tmp47 ;
  u8 __cil_tmp48 ;
  unsigned int __cil_tmp49 ;

  {
  {
#line 544
  default_mac[0] = (u8 )0U;
#line 544
  default_mac[1] = (u8 )5U;
#line 544
  default_mac[2] = (u8 )61U;
#line 544
  default_mac[3] = (u8 )0U;
#line 544
  default_mac[4] = (u8 )2U;
#line 544
  default_mac[5] = (u8 )0U;
#line 545
  duplex[0] = (u8 )0U;
#line 545
  duplex[1] = (u8 )1U;
#line 545
  duplex[2] = (u8 )2U;
#line 545
  duplex[3] = (u8 )1U;
#line 545
  duplex[4] = (u8 )2U;
#line 545
  duplex[5] = (u8 )2U;
#line 546
  speed[0] = (u16 )0U;
#line 546
  speed[1] = (u16 )10U;
#line 546
  speed[2] = (u16 )10U;
#line 546
  speed[3] = (u16 )100U;
#line 546
  speed[4] = (u16 )100U;
#line 546
  speed[5] = (u16 )1000U;
#line 551
  netdev->dev.parent = & pdev->dev;
#line 554
  __cil_tmp18 = (struct net_device  const  *)netdev;
#line 554
  tmp = netdev_priv(__cil_tmp18);
#line 554
  etdev = (struct et131x_adapter *)tmp;
#line 555
  etdev->pdev = pci_dev_get(pdev);
#line 556
  etdev->netdev = netdev;
#line 559
  netdev->irq = pdev->irq;
#line 560
  __cil_tmp19 = pdev->resource[0].start;
#line 560
  netdev->base_addr = (unsigned long )__cil_tmp19;
#line 563
  __cil_tmp20 = & etdev->Lock;
#line 563
  spinlock_check(__cil_tmp20);
#line 563
  __cil_tmp21 = & etdev->Lock.ldv_6060.rlock;
#line 563
  __raw_spin_lock_init(__cil_tmp21, "&(&etdev->Lock)->rlock", & __key);
#line 564
  __cil_tmp22 = & etdev->TCBSendQLock;
#line 564
  spinlock_check(__cil_tmp22);
#line 564
  __cil_tmp23 = & etdev->TCBSendQLock.ldv_6060.rlock;
#line 564
  __raw_spin_lock_init(__cil_tmp23, "&(&etdev->TCBSendQLock)->rlock", & __key___0);
#line 565
  __cil_tmp24 = & etdev->TCBReadyQLock;
#line 565
  spinlock_check(__cil_tmp24);
#line 565
  __cil_tmp25 = & etdev->TCBReadyQLock.ldv_6060.rlock;
#line 565
  __raw_spin_lock_init(__cil_tmp25, "&(&etdev->TCBReadyQLock)->rlock", & __key___1);
#line 566
  __cil_tmp26 = & etdev->send_hw_lock;
#line 566
  spinlock_check(__cil_tmp26);
#line 566
  __cil_tmp27 = & etdev->send_hw_lock.ldv_6060.rlock;
#line 566
  __raw_spin_lock_init(__cil_tmp27, "&(&etdev->send_hw_lock)->rlock", & __key___2);
#line 567
  __cil_tmp28 = & etdev->rcv_lock;
#line 567
  spinlock_check(__cil_tmp28);
#line 567
  __cil_tmp29 = & etdev->rcv_lock.ldv_6060.rlock;
#line 567
  __raw_spin_lock_init(__cil_tmp29, "&(&etdev->rcv_lock)->rlock", & __key___3);
#line 568
  __cil_tmp30 = & etdev->RcvPendLock;
#line 568
  spinlock_check(__cil_tmp30);
#line 568
  __cil_tmp31 = & etdev->RcvPendLock.ldv_6060.rlock;
#line 568
  __raw_spin_lock_init(__cil_tmp31, "&(&etdev->RcvPendLock)->rlock", & __key___4);
#line 569
  __cil_tmp32 = & etdev->FbrLock;
#line 569
  spinlock_check(__cil_tmp32);
#line 569
  __cil_tmp33 = & etdev->FbrLock.ldv_6060.rlock;
#line 569
  __raw_spin_lock_init(__cil_tmp33, "&(&etdev->FbrLock)->rlock", & __key___5);
#line 570
  __cil_tmp34 = & etdev->PHYLock;
#line 570
  spinlock_check(__cil_tmp34);
#line 570
  __cil_tmp35 = & etdev->PHYLock.ldv_6060.rlock;
#line 570
  __raw_spin_lock_init(__cil_tmp35, "&(&etdev->PHYLock)->rlock", & __key___6);
  }
#line 573
  if (et131x_speed_set != 0U) {
    {
#line 574
    __cil_tmp36 = etdev->pdev;
#line 574
    __cil_tmp37 = & __cil_tmp36->dev;
#line 574
    __cil_tmp38 = (struct device  const  *)__cil_tmp37;
#line 574
    _dev_info(__cil_tmp38, "Speed set manually to : %d\n", et131x_speed_set);
    }
  } else {

  }
#line 577
  etdev->SpeedDuplex = (u8 )et131x_speed_set;
#line 578
  etdev->RegistryJumboPacket = 1514U;
#line 581
  __len = 6UL;
#line 581
  if (__len > 63UL) {
    {
#line 581
    __cil_tmp39 = & etdev->addr;
#line 581
    __cil_tmp40 = (void *)__cil_tmp39;
#line 581
    __cil_tmp41 = (void const   *)(& default_mac);
#line 581
    __ret = __memcpy(__cil_tmp40, __cil_tmp41, __len);
    }
  } else {
    {
#line 581
    __cil_tmp42 = & etdev->addr;
#line 581
    __cil_tmp43 = (void *)__cil_tmp42;
#line 581
    __cil_tmp44 = (void const   *)(& default_mac);
#line 581
    __ret = __builtin_memcpy(__cil_tmp43, __cil_tmp44, __len);
    }
  }
  {
#line 591
  __cil_tmp45 = etdev->pdev;
#line 591
  __cil_tmp46 = __cil_tmp45->device;
#line 591
  __cil_tmp47 = (unsigned int )__cil_tmp46;
#line 591
  if (__cil_tmp47 == 60673U) {
    {
#line 591
    __cil_tmp48 = etdev->SpeedDuplex;
#line 591
    __cil_tmp49 = (unsigned int )__cil_tmp48;
#line 591
    if (__cil_tmp49 == 5U) {
#line 593
      etdev->SpeedDuplex = (u8 )4U;
    } else {

    }
    }
  } else {

  }
  }
#line 595
  etdev->AiForceSpeed = speed[(int )etdev->SpeedDuplex];
#line 596
  etdev->AiForceDpx = duplex[(int )etdev->SpeedDuplex];
#line 598
  return (etdev);
}
}
#line 614 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static int et131x_pci_setup(struct pci_dev *pdev , struct pci_device_id  const  *ent ) 
{ int result ;
  int pm_cap ;
  bool pci_using_dac ;
  struct net_device *netdev ;
  struct et131x_adapter *adapter ;
  int tmp ;
  int tmp___0 ;
  int tmp___1 ;
  int tmp___2 ;
  void *tmp___3 ;
  struct lock_class_key __key ;
  atomic_long_t __constr_expr_0 ;
  size_t __len ;
  void *__ret ;
  struct lock_class_key __key___0 ;
  struct device *__cil_tmp18 ;
  struct device  const  *__cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  unsigned long __cil_tmp21 ;
  struct device *__cil_tmp22 ;
  struct device  const  *__cil_tmp23 ;
  struct device *__cil_tmp24 ;
  struct device  const  *__cil_tmp25 ;
  struct device *__cil_tmp26 ;
  struct device  const  *__cil_tmp27 ;
  struct device *__cil_tmp28 ;
  struct device  const  *__cil_tmp29 ;
  struct device *__cil_tmp30 ;
  struct device  const  *__cil_tmp31 ;
  struct net_device *__cil_tmp32 ;
  unsigned long __cil_tmp33 ;
  unsigned long __cil_tmp34 ;
  struct device *__cil_tmp35 ;
  struct device  const  *__cil_tmp36 ;
  ADDRESS_MAP_t *__cil_tmp37 ;
  unsigned long __cil_tmp38 ;
  ADDRESS_MAP_t *__cil_tmp39 ;
  unsigned long __cil_tmp40 ;
  struct device *__cil_tmp41 ;
  struct device  const  *__cil_tmp42 ;
  ADDRESS_MAP_t *__cil_tmp43 ;
  u32 *__cil_tmp44 ;
  void volatile   *__cil_tmp45 ;
  struct device *__cil_tmp46 ;
  struct device  const  *__cil_tmp47 ;
  struct work_struct *__cil_tmp48 ;
  struct lockdep_map *__cil_tmp49 ;
  struct list_head *__cil_tmp50 ;
  unsigned char *__cil_tmp51 ;
  void *__cil_tmp52 ;
  u8 (*__cil_tmp53)[6U] ;
  void const   *__cil_tmp54 ;
  unsigned char *__cil_tmp55 ;
  void *__cil_tmp56 ;
  u8 (*__cil_tmp57)[6U] ;
  void const   *__cil_tmp58 ;
  struct timer_list *__cil_tmp59 ;
  unsigned long __cil_tmp60 ;
  unsigned long __cil_tmp61 ;
  struct device *__cil_tmp62 ;
  struct device  const  *__cil_tmp63 ;
  void *__cil_tmp64 ;
  struct pci_dev *__cil_tmp65 ;
  ADDRESS_MAP_t *__cil_tmp66 ;
  void volatile   *__cil_tmp67 ;

  {
  {
#line 617
  result = -16;
#line 624
  tmp = pci_enable_device(pdev);
  }
#line 624
  if (tmp != 0) {
    {
#line 625
    __cil_tmp18 = & pdev->dev;
#line 625
    __cil_tmp19 = (struct device  const  *)__cil_tmp18;
#line 625
    dev_err(__cil_tmp19, "pci_enable_device() failed\n");
    }
#line 627
    return (-5);
  } else {

  }
  {
#line 631
  __cil_tmp20 = pdev->resource[0].flags;
#line 631
  __cil_tmp21 = __cil_tmp20 & 512UL;
#line 631
  if (__cil_tmp21 == 0UL) {
    {
#line 632
    __cil_tmp22 = & pdev->dev;
#line 632
    __cil_tmp23 = (struct device  const  *)__cil_tmp22;
#line 632
    dev_err(__cil_tmp23, "Can\'t find PCI device\'s base address\n");
    }
#line 634
    goto err_disable;
  } else {

  }
  }
  {
#line 637
  tmp___0 = pci_request_regions(pdev, "et131x");
  }
#line 637
  if (tmp___0 != 0) {
    {
#line 638
    __cil_tmp24 = & pdev->dev;
#line 638
    __cil_tmp25 = (struct device  const  *)__cil_tmp24;
#line 638
    dev_err(__cil_tmp25, "Can\'t get PCI resources\n");
    }
#line 640
    goto err_disable;
  } else {

  }
  {
#line 644
  pci_set_master(pdev);
#line 651
  pm_cap = pci_find_capability(pdev, 1);
  }
#line 652
  if (pm_cap == 0) {
    {
#line 653
    __cil_tmp26 = & pdev->dev;
#line 653
    __cil_tmp27 = (struct device  const  *)__cil_tmp26;
#line 653
    dev_err(__cil_tmp27, "Cannot find Power Management capabilities\n");
#line 655
    result = -5;
    }
#line 656
    goto err_release_res;
  } else {

  }
  {
#line 660
  tmp___2 = pci_set_dma_mask(pdev, 1152921504606846975ULL);
  }
#line 660
  if (tmp___2 == 0) {
    {
#line 661
    pci_using_dac = (bool )1;
#line 663
    result = pci_set_consistent_dma_mask(pdev, 1152921504606846975ULL);
    }
#line 664
    if (result != 0) {
      {
#line 665
      __cil_tmp28 = & pdev->dev;
#line 665
      __cil_tmp29 = (struct device  const  *)__cil_tmp28;
#line 665
      dev_err(__cil_tmp29, "Unable to obtain 64 bit DMA for consistent allocations\n");
      }
#line 667
      goto err_release_res;
    } else {

    }
  } else {
    {
#line 669
    tmp___1 = pci_set_dma_mask(pdev, 4294967295ULL);
    }
#line 669
    if (tmp___1 == 0) {
#line 670
      pci_using_dac = (bool )0;
    } else {
      {
#line 672
      __cil_tmp30 = & pdev->dev;
#line 672
      __cil_tmp31 = (struct device  const  *)__cil_tmp30;
#line 672
      dev_err(__cil_tmp31, "No usable DMA addressing method\n");
#line 674
      result = -5;
      }
#line 675
      goto err_release_res;
    }
  }
  {
#line 679
  netdev = et131x_device_alloc();
  }
  {
#line 680
  __cil_tmp32 = (struct net_device *)0;
#line 680
  __cil_tmp33 = (unsigned long )__cil_tmp32;
#line 680
  __cil_tmp34 = (unsigned long )netdev;
#line 680
  if (__cil_tmp34 == __cil_tmp33) {
    {
#line 681
    __cil_tmp35 = & pdev->dev;
#line 681
    __cil_tmp36 = (struct device  const  *)__cil_tmp35;
#line 681
    dev_err(__cil_tmp36, "Couldn\'t alloc netdev struct\n");
#line 682
    result = -12;
    }
#line 683
    goto err_release_res;
  } else {

  }
  }
  {
#line 685
  adapter = et131x_adapter_init(netdev, pdev);
#line 687
  et131x_pci_init(adapter, pdev);
#line 690
  tmp___3 = pci_ioremap_bar(pdev, 0);
#line 690
  adapter->regs = (ADDRESS_MAP_t *)tmp___3;
  }
  {
#line 691
  __cil_tmp37 = (ADDRESS_MAP_t *)0;
#line 691
  __cil_tmp38 = (unsigned long )__cil_tmp37;
#line 691
  __cil_tmp39 = adapter->regs;
#line 691
  __cil_tmp40 = (unsigned long )__cil_tmp39;
#line 691
  if (__cil_tmp40 == __cil_tmp38) {
    {
#line 692
    __cil_tmp41 = & pdev->dev;
#line 692
    __cil_tmp42 = (struct device  const  *)__cil_tmp41;
#line 692
    dev_err(__cil_tmp42, "Cannot map device registers\n");
#line 693
    result = -12;
    }
#line 694
    goto err_free_dev;
  } else {

  }
  }
  {
#line 698
  __cil_tmp43 = adapter->regs;
#line 698
  __cil_tmp44 = & __cil_tmp43->global.pm_csr;
#line 698
  __cil_tmp45 = (void volatile   *)__cil_tmp44;
#line 698
  writel(56U, __cil_tmp45);
#line 701
  et131x_soft_reset(adapter);
#line 704
  et131x_disable_interrupts(adapter);
#line 707
  result = et131x_adapter_memory_alloc(adapter);
  }
#line 708
  if (result != 0) {
    {
#line 709
    __cil_tmp46 = & pdev->dev;
#line 709
    __cil_tmp47 = (struct device  const  *)__cil_tmp46;
#line 709
    dev_err(__cil_tmp47, "Could not alloc adapater memory (DMA)\n");
    }
#line 710
    goto err_iounmap;
  } else {

  }
  {
#line 714
  et131x_init_send(adapter);
#line 719
  __cil_tmp48 = & adapter->task;
#line 719
  __init_work(__cil_tmp48, 0);
#line 719
  __constr_expr_0.counter = 2097664L;
#line 719
  adapter->task.data = __constr_expr_0;
#line 719
  __cil_tmp49 = & adapter->task.lockdep_map;
#line 719
  lockdep_init_map(__cil_tmp49, "(&adapter->task)", & __key, 0);
#line 719
  __cil_tmp50 = & adapter->task.entry;
#line 719
  INIT_LIST_HEAD(__cil_tmp50);
#line 719
  adapter->task.func = & et131x_isr_handler;
#line 722
  __len = 6UL;
  }
#line 722
  if (__len > 63UL) {
    {
#line 722
    __cil_tmp51 = netdev->dev_addr;
#line 722
    __cil_tmp52 = (void *)__cil_tmp51;
#line 722
    __cil_tmp53 = & adapter->addr;
#line 722
    __cil_tmp54 = (void const   *)__cil_tmp53;
#line 722
    __ret = __memcpy(__cil_tmp52, __cil_tmp54, __len);
    }
  } else {
    {
#line 722
    __cil_tmp55 = netdev->dev_addr;
#line 722
    __cil_tmp56 = (void *)__cil_tmp55;
#line 722
    __cil_tmp57 = & adapter->addr;
#line 722
    __cil_tmp58 = (void const   *)__cil_tmp57;
#line 722
    __ret = __builtin_memcpy(__cil_tmp56, __cil_tmp58, __len);
    }
  }
  {
#line 725
  et131x_adapter_setup(adapter);
#line 728
  __cil_tmp59 = & adapter->ErrorTimer;
#line 728
  init_timer_key(__cil_tmp59, "&adapter->ErrorTimer", & __key___0);
#line 730
  __cil_tmp60 = (unsigned long )jiffies;
#line 730
  adapter->ErrorTimer.expires = __cil_tmp60 + 250UL;
#line 731
  adapter->ErrorTimer.function = & et131x_error_timer_handler;
#line 732
  adapter->ErrorTimer.data = (unsigned long )adapter;
#line 735
  __cil_tmp61 = (unsigned long )adapter;
#line 735
  et131x_link_detection_handler(__cil_tmp61);
#line 739
  adapter->boot_coma = (u8 )0U;
#line 749
  result = register_netdev(netdev);
  }
#line 750
  if (result != 0) {
    {
#line 751
    __cil_tmp62 = & pdev->dev;
#line 751
    __cil_tmp63 = (struct device  const  *)__cil_tmp62;
#line 751
    dev_err(__cil_tmp63, "register_netdev() failed\n");
    }
#line 752
    goto err_mem_free;
  } else {

  }
  {
#line 759
  __cil_tmp64 = (void *)netdev;
#line 759
  pci_set_drvdata(pdev, __cil_tmp64);
#line 760
  __cil_tmp65 = adapter->pdev;
#line 760
  pci_save_state(__cil_tmp65);
  }
#line 761
  return (result);
  err_mem_free: 
  {
#line 764
  et131x_adapter_memory_free(adapter);
  }
  err_iounmap: 
  {
#line 766
  __cil_tmp66 = adapter->regs;
#line 766
  __cil_tmp67 = (void volatile   *)__cil_tmp66;
#line 766
  iounmap(__cil_tmp67);
  }
  err_free_dev: 
  {
#line 768
  pci_dev_put(pdev);
#line 769
  free_netdev(netdev);
  }
  err_release_res: 
  {
#line 771
  pci_release_regions(pdev);
  }
  err_disable: 
  {
#line 773
  pci_disable_device(pdev);
  }
#line 774
  return (result);
}
}
#line 786 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static void et131x_pci_remove(struct pci_dev *pdev ) 
{ struct net_device *netdev ;
  struct et131x_adapter *adapter ;
  void *tmp ;
  void *tmp___0 ;
  struct net_device  const  *__cil_tmp6 ;
  ADDRESS_MAP_t *__cil_tmp7 ;
  void volatile   *__cil_tmp8 ;
  struct pci_dev *__cil_tmp9 ;

  {
  {
#line 794
  tmp = pci_get_drvdata(pdev);
#line 794
  netdev = (struct net_device *)tmp;
#line 795
  __cil_tmp6 = (struct net_device  const  *)netdev;
#line 795
  tmp___0 = netdev_priv(__cil_tmp6);
#line 795
  adapter = (struct et131x_adapter *)tmp___0;
#line 798
  unregister_netdev(netdev);
#line 799
  et131x_adapter_memory_free(adapter);
#line 800
  __cil_tmp7 = adapter->regs;
#line 800
  __cil_tmp8 = (void volatile   *)__cil_tmp7;
#line 800
  iounmap(__cil_tmp8);
#line 801
  __cil_tmp9 = adapter->pdev;
#line 801
  pci_dev_put(__cil_tmp9);
#line 802
  free_netdev(netdev);
#line 803
  pci_release_regions(pdev);
#line 804
  pci_disable_device(pdev);
  }
#line 805
  return;
}
}
#line 807 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static struct pci_device_id et131x_pci_table[3U]  = {      {4545U, 60672U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, 
        {4545U, 60673U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, 
        {0U, 0U, 0U, 0U, 0U, 0U, 0UL}};
#line 815 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
struct pci_device_id  const  __mod_pci_device_table  ;
#line 817 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static struct pci_driver et131x_driver  = 
#line 817
     {{(struct list_head *)0, (struct list_head *)0}, "et131x", (struct pci_device_id  const  *)(& et131x_pci_table),
    & et131x_pci_setup, & et131x_pci_remove, (int (*)(struct pci_dev * , pm_message_t  ))0,
    (int (*)(struct pci_dev * , pm_message_t  ))0, (int (*)(struct pci_dev * ))0,
    (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0,
    {(char const   *)0, (struct bus_type *)0, (struct module *)0, (char const   *)0,
     (_Bool)0, (struct of_device_id  const  *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0,
     (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t  ))0,
     (int (*)(struct device * ))0, (struct attribute_group  const  **)0, (struct dev_pm_ops  const  *)0,
     (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0,
                                                                {(struct lock_class *)0,
                                                                 (struct lock_class *)0},
                                                                (char const   *)0,
                                                                0, 0UL}}}}, {(struct list_head *)0,
                                                                             (struct list_head *)0}}};
#line 832 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static int et131x_init_module(void) 
{ int tmp ;

  {
#line 834
  if (et131x_speed_set > 5U) {
    {
#line 836
    printk("<4>et131x: invalid speed setting ignored.\n");
#line 837
    et131x_speed_set = 0U;
    }
  } else {

  }
  {
#line 839
  tmp = __pci_register_driver(& et131x_driver, & __this_module, "et131x");
  }
#line 839
  return (tmp);
}
}
#line 845 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
static void et131x_cleanup_module(void) 
{ 

  {
  {
#line 847
  pci_unregister_driver(& et131x_driver);
  }
#line 848
  return;
}
}
#line 877
extern void ldv_check_return_value(int  ) ;
#line 880
extern void ldv_initialize(void) ;
#line 883
extern int nondet_int(void) ;
#line 886 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
int LDV_IN_INTERRUPT  ;
#line 889 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_initpci.c.p"
void main(void) 
{ struct pci_dev *var_group1 ;
  struct pci_device_id  const  *var_et131x_pci_setup_11_p1 ;
  int res_et131x_pci_setup_11 ;
  unsigned long var_et131x_error_timer_handler_2_p0 ;
  int ldv_s_et131x_driver_pci_driver ;
  int tmp ;
  int tmp___0 ;
  int tmp___1 ;

  {
  {
#line 949
  ldv_s_et131x_driver_pci_driver = 0;
#line 927
  LDV_IN_INTERRUPT = 1;
#line 936
  ldv_initialize();
#line 947
  tmp = et131x_init_module();
  }
#line 947
  if (tmp != 0) {
#line 948
    goto ldv_final;
  } else {

  }
#line 954
  goto ldv_35822;
  ldv_35821: 
  {
#line 958
  tmp___0 = nondet_int();
  }
#line 960
  if (tmp___0 == 0) {
#line 960
    goto case_0;
  } else
#line 984
  if (tmp___0 == 1) {
#line 984
    goto case_1;
  } else {
#line 1005
    goto switch_default;
#line 958
    if (0) {
      case_0: ;
#line 963
      if (ldv_s_et131x_driver_pci_driver == 0) {
        {
#line 973
        res_et131x_pci_setup_11 = et131x_pci_setup(var_group1, var_et131x_pci_setup_11_p1);
#line 974
        ldv_check_return_value(res_et131x_pci_setup_11);
        }
#line 975
        if (res_et131x_pci_setup_11 != 0) {
#line 976
          goto ldv_module_exit;
        } else {

        }
#line 977
        ldv_s_et131x_driver_pci_driver = 0;
      } else {

      }
#line 983
      goto ldv_35818;
      case_1: 
      {
#line 997
      et131x_error_timer_handler(var_et131x_error_timer_handler_2_p0);
      }
#line 1004
      goto ldv_35818;
      switch_default: ;
#line 1005
      goto ldv_35818;
    } else {

    }
  }
  ldv_35818: ;
  ldv_35822: 
  {
#line 954
  tmp___1 = nondet_int();
  }
#line 954
  if (tmp___1 != 0) {
#line 956
    goto ldv_35821;
  } else
#line 954
  if (ldv_s_et131x_driver_pci_driver != 0) {
#line 956
    goto ldv_35821;
  } else {
#line 958
    goto ldv_35823;
  }
  ldv_35823: ;
  ldv_module_exit: 
  {
#line 1022
  et131x_cleanup_module();
  }
  ldv_final: 
  {
#line 1025
  ldv_check_final_state();
  }
#line 1028
  return;
}
}
#line 360 "include/linux/workqueue.h"
extern int schedule_work(struct work_struct * ) ;
#line 2234 "include/linux/netdevice.h"
__inline static int netif_device_present(struct net_device *dev ) 
{ int tmp ;
  unsigned long *__cil_tmp3 ;
  unsigned long const volatile   *__cil_tmp4 ;

  {
  {
#line 2236
  __cil_tmp3 = & dev->state;
#line 2236
  __cil_tmp4 = (unsigned long const volatile   *)__cil_tmp3;
#line 2236
  tmp = constant_test_bit(1U, __cil_tmp4);
  }
#line 2236
  return (tmp);
}
}
#line 70 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/drivers/staging/et131x/et131x.h"
irqreturn_t et131x_isr(int irq , void *dev_id ) ;
#line 124 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_isr.c.p"
void et131x_enable_interrupts(struct et131x_adapter *adapter ) 
{ u32 mask ;
  u8 __cil_tmp3 ;
  unsigned int __cil_tmp4 ;
  u8 __cil_tmp5 ;
  unsigned int __cil_tmp6 ;
  ADDRESS_MAP_t *__cil_tmp7 ;
  u32 *__cil_tmp8 ;
  void volatile   *__cil_tmp9 ;

  {
  {
#line 129
  __cil_tmp3 = adapter->flowcontrol;
#line 129
  __cil_tmp4 = (unsigned int )__cil_tmp3;
#line 129
  if (__cil_tmp4 == 1U) {
#line 130
    mask = 4294885143U;
  } else {
    {
#line 129
    __cil_tmp5 = adapter->flowcontrol;
#line 129
    __cil_tmp6 = (unsigned int )__cil_tmp5;
#line 129
    if (__cil_tmp6 == 0U) {
#line 130
      mask = 4294885143U;
    } else {
#line 132
      mask = 4294885335U;
    }
    }
  }
  }
  {
#line 134
  adapter->CachedMaskValue = mask;
#line 135
  __cil_tmp7 = adapter->regs;
#line 135
  __cil_tmp8 = & __cil_tmp7->global.int_mask;
#line 135
  __cil_tmp9 = (void volatile   *)__cil_tmp8;
#line 135
  writel(mask, __cil_tmp9);
  }
#line 136
  return;
}
}
#line 145 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_isr.c.p"
void et131x_disable_interrupts(struct et131x_adapter *adapter ) 
{ ADDRESS_MAP_t *__cil_tmp2 ;
  u32 *__cil_tmp3 ;
  void volatile   *__cil_tmp4 ;

  {
  {
#line 148
  adapter->CachedMaskValue = 4294967295U;
#line 149
  __cil_tmp2 = adapter->regs;
#line 149
  __cil_tmp3 = & __cil_tmp2->global.int_mask;
#line 149
  __cil_tmp4 = (void volatile   *)__cil_tmp3;
#line 149
  writel(4294967295U, __cil_tmp4);
  }
#line 150
  return;
}
}
#line 161 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_isr.c.p"
irqreturn_t et131x_isr(int irq , void *dev_id ) 
{ bool handled ;
  struct net_device *netdev ;
  struct et131x_adapter *adapter ;
  u32 status ;
  int tmp ;
  void *tmp___0 ;
  struct tcb *tcb ;
  struct net_device  const  *__cil_tmp10 ;
  ADDRESS_MAP_t *__cil_tmp11 ;
  u32 *__cil_tmp12 ;
  void const volatile   *__cil_tmp13 ;
  u8 __cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  u8 __cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  unsigned int __cil_tmp18 ;
  struct tcb *__cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  unsigned long __cil_tmp21 ;
  u32 __cil_tmp22 ;
  u32 __cil_tmp23 ;
  bool __cil_tmp24 ;
  struct tcb *__cil_tmp25 ;
  unsigned long __cil_tmp26 ;
  unsigned long __cil_tmp27 ;
  ADDRESS_MAP_t *__cil_tmp28 ;
  u32 *__cil_tmp29 ;
  void volatile   *__cil_tmp30 ;
  struct work_struct *__cil_tmp31 ;

  {
  {
#line 163
  handled = (bool )1;
#line 164
  netdev = (struct net_device *)dev_id;
#line 165
  adapter = (struct et131x_adapter *)0;
#line 168
  tmp = netif_device_present(netdev);
  }
#line 168
  if (tmp == 0) {
#line 169
    handled = (bool )0;
#line 170
    goto out;
  } else {

  }
  {
#line 173
  __cil_tmp10 = (struct net_device  const  *)netdev;
#line 173
  tmp___0 = netdev_priv(__cil_tmp10);
#line 173
  adapter = (struct et131x_adapter *)tmp___0;
#line 180
  et131x_disable_interrupts(adapter);
#line 185
  __cil_tmp11 = adapter->regs;
#line 185
  __cil_tmp12 = & __cil_tmp11->global.int_status;
#line 185
  __cil_tmp13 = (void const volatile   *)__cil_tmp12;
#line 185
  status = readl(__cil_tmp13);
  }
  {
#line 187
  __cil_tmp14 = adapter->flowcontrol;
#line 187
  __cil_tmp15 = (unsigned int )__cil_tmp14;
#line 187
  if (__cil_tmp15 == 1U) {
#line 189
    status = status & 82152U;
  } else {
    {
#line 187
    __cil_tmp16 = adapter->flowcontrol;
#line 187
    __cil_tmp17 = (unsigned int )__cil_tmp16;
#line 187
    if (__cil_tmp17 == 0U) {
#line 189
      status = status & 82152U;
    } else {
#line 191
      status = status & 81960U;
    }
    }
  }
  }
#line 195
  if (status == 0U) {
    {
#line 196
    handled = (bool )0;
#line 197
    et131x_enable_interrupts(adapter);
    }
#line 198
    goto out;
  } else {

  }
  {
#line 203
  __cil_tmp18 = status & 16384U;
#line 203
  if (__cil_tmp18 != 0U) {
#line 204
    tcb = adapter->tx_ring.send_head;
    {
#line 206
    __cil_tmp19 = (struct tcb *)0;
#line 206
    __cil_tmp20 = (unsigned long )__cil_tmp19;
#line 206
    __cil_tmp21 = (unsigned long )tcb;
#line 206
    if (__cil_tmp21 != __cil_tmp20) {
#line 207
      __cil_tmp22 = tcb->stale;
#line 207
      tcb->stale = __cil_tmp22 + 1U;
      {
#line 207
      __cil_tmp23 = tcb->stale;
#line 207
      if (__cil_tmp23 > 1U) {
#line 208
        status = status | 8U;
      } else {

      }
      }
    } else {

    }
    }
    {
#line 210
    __cil_tmp24 = adapter->rx_ring.UnfinishedReceives;
#line 210
    if ((int )__cil_tmp24) {
#line 211
      status = status | 32U;
    } else {
      {
#line 212
      __cil_tmp25 = (struct tcb *)0;
#line 212
      __cil_tmp26 = (unsigned long )__cil_tmp25;
#line 212
      __cil_tmp27 = (unsigned long )tcb;
#line 212
      if (__cil_tmp27 == __cil_tmp26) {
        {
#line 213
        __cil_tmp28 = adapter->regs;
#line 213
        __cil_tmp29 = & __cil_tmp28->global.watchdog_timer;
#line 213
        __cil_tmp30 = (void volatile   *)__cil_tmp29;
#line 213
        writel(0U, __cil_tmp30);
        }
      } else {

      }
      }
    }
    }
#line 215
    status = status & 4294950911U;
  } else {

  }
  }
#line 218
  if (status == 0U) {
    {
#line 224
    et131x_enable_interrupts(adapter);
    }
#line 225
    goto out;
  } else {

  }
  {
#line 232
  adapter->Stats.InterruptStatus = status;
#line 238
  __cil_tmp31 = & adapter->task;
#line 238
  schedule_work(__cil_tmp31);
  }
  out: ;
#line 240
  return ((irqreturn_t )handled);
}
}
#line 250 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_isr.c.p"
void et131x_isr_handler(struct work_struct *work ) 
{ struct et131x_adapter *etdev ;
  struct work_struct  const  *__mptr ;
  u32 status ;
  ADDRESS_MAP_t *iomem ;
  u32 txdma_err ;
  u32 pm_csr ;
  unsigned int tmp ;
  u32 pm_csr___0 ;
  MI_BMSR_t BmsrInts ;
  MI_BMSR_t BmsrData ;
  u16 myisr ;
  u32 err ;
  unsigned int tmp___0 ;
  unsigned int tmp___1 ;
  unsigned int tmp___2 ;
  unsigned int tmp___3 ;
  struct et131x_adapter *__cil_tmp18 ;
  unsigned int __cil_tmp19 ;
  unsigned int __cil_tmp20 ;
  unsigned int __cil_tmp21 ;
  u32 *__cil_tmp22 ;
  void const volatile   *__cil_tmp23 ;
  struct pci_dev *__cil_tmp24 ;
  struct device *__cil_tmp25 ;
  struct device  const  *__cil_tmp26 ;
  unsigned int __cil_tmp27 ;
  u8 __cil_tmp28 ;
  unsigned int __cil_tmp29 ;
  u8 __cil_tmp30 ;
  unsigned int __cil_tmp31 ;
  u32 *__cil_tmp32 ;
  void const volatile   *__cil_tmp33 ;
  unsigned int __cil_tmp34 ;
  u32 *__cil_tmp35 ;
  void volatile   *__cil_tmp36 ;
  unsigned int __cil_tmp37 ;
  u32 *__cil_tmp38 ;
  void const volatile   *__cil_tmp39 ;
  struct pci_dev *__cil_tmp40 ;
  struct device *__cil_tmp41 ;
  struct device  const  *__cil_tmp42 ;
  unsigned int __cil_tmp43 ;
  struct pci_dev *__cil_tmp44 ;
  struct device *__cil_tmp45 ;
  struct device  const  *__cil_tmp46 ;
  unsigned int __cil_tmp47 ;
  u32 *__cil_tmp48 ;
  void const volatile   *__cil_tmp49 ;
  unsigned int __cil_tmp50 ;
  u8 __cil_tmp51 ;
  int __cil_tmp52 ;
  u8 __cil_tmp53 ;
  u8 __cil_tmp54 ;
  u8 __cil_tmp55 ;
  unsigned int __cil_tmp56 ;
  u8 __cil_tmp57 ;
  int __cil_tmp58 ;
  u8 __cil_tmp59 ;
  u8 __cil_tmp60 ;
  u16 *__cil_tmp61 ;
  int __cil_tmp62 ;
  u16 __cil_tmp63 ;
  int __cil_tmp64 ;
  int __cil_tmp65 ;
  unsigned int __cil_tmp66 ;
  u32 *__cil_tmp67 ;
  void const volatile   *__cil_tmp68 ;
  struct pci_dev *__cil_tmp69 ;
  struct device *__cil_tmp70 ;
  struct device  const  *__cil_tmp71 ;
  unsigned int __cil_tmp72 ;
  u32 *__cil_tmp73 ;
  void const volatile   *__cil_tmp74 ;
  struct pci_dev *__cil_tmp75 ;
  struct device *__cil_tmp76 ;
  struct device  const  *__cil_tmp77 ;
  u32 *__cil_tmp78 ;
  void const volatile   *__cil_tmp79 ;
  u32 *__cil_tmp80 ;
  void const volatile   *__cil_tmp81 ;
  struct pci_dev *__cil_tmp82 ;
  struct device *__cil_tmp83 ;
  struct device  const  *__cil_tmp84 ;
  unsigned int __cil_tmp85 ;

  {
#line 253
  __mptr = (struct work_struct  const  *)work;
#line 253
  __cil_tmp18 = (struct et131x_adapter *)__mptr;
#line 253
  etdev = __cil_tmp18 + 1152921504606846960UL;
#line 254
  status = etdev->Stats.InterruptStatus;
#line 255
  iomem = etdev->regs;
  {
#line 263
  __cil_tmp19 = status & 8U;
#line 263
  if (__cil_tmp19 != 0U) {
    {
#line 264
    et131x_handle_send_interrupt(etdev);
    }
  } else {

  }
  }
  {
#line 267
  __cil_tmp20 = status & 32U;
#line 267
  if (__cil_tmp20 != 0U) {
    {
#line 268
    et131x_handle_recv_interrupt(etdev);
    }
  } else {

  }
  }
#line 270
  status = status & 4294967255U;
#line 272
  if (status != 0U) {
    {
#line 274
    __cil_tmp21 = status & 16U;
#line 274
    if (__cil_tmp21 != 0U) {
      {
#line 278
      __cil_tmp22 = & iomem->txdma.TxDmaError;
#line 278
      __cil_tmp23 = (void const volatile   *)__cil_tmp22;
#line 278
      txdma_err = readl(__cil_tmp23);
#line 280
      __cil_tmp24 = etdev->pdev;
#line 280
      __cil_tmp25 = & __cil_tmp24->dev;
#line 280
      __cil_tmp26 = (struct device  const  *)__cil_tmp25;
#line 280
      dev_warn(__cil_tmp26, "TXDMA_ERR interrupt, error = %d\n", txdma_err);
      }
    } else {

    }
    }
    {
#line 286
    __cil_tmp27 = status & 192U;
#line 286
    if (__cil_tmp27 != 0U) {
      {
#line 305
      __cil_tmp28 = etdev->flowcontrol;
#line 305
      __cil_tmp29 = (unsigned int )__cil_tmp28;
#line 305
      if (__cil_tmp29 == 1U) {
#line 305
        goto _L;
      } else {
        {
#line 305
        __cil_tmp30 = etdev->flowcontrol;
#line 305
        __cil_tmp31 = (unsigned int )__cil_tmp30;
#line 305
        if (__cil_tmp31 == 0U) {
          _L: 
          {
#line 313
          __cil_tmp32 = & iomem->global.pm_csr;
#line 313
          __cil_tmp33 = (void const volatile   *)__cil_tmp32;
#line 313
          pm_csr = readl(__cil_tmp33);
          }
          {
#line 314
          __cil_tmp34 = pm_csr & 64U;
#line 314
          if (__cil_tmp34 == 0U) {
            {
#line 315
            __cil_tmp35 = & iomem->txmac.bp_ctrl;
#line 315
            __cil_tmp36 = (void volatile   *)__cil_tmp35;
#line 315
            writel(3U, __cil_tmp36);
            }
          } else {

          }
          }
        } else {

        }
        }
      }
      }
    } else {

    }
    }
    {
#line 334
    __cil_tmp37 = status & 512U;
#line 334
    if (__cil_tmp37 != 0U) {
      {
#line 355
      __cil_tmp38 = & iomem->txmac.tx_test;
#line 355
      __cil_tmp39 = (void const volatile   *)__cil_tmp38;
#line 355
      tmp = readl(__cil_tmp39);
#line 355
      __cil_tmp40 = etdev->pdev;
#line 355
      __cil_tmp41 = & __cil_tmp40->dev;
#line 355
      __cil_tmp42 = (struct device  const  *)__cil_tmp41;
#line 355
      dev_warn(__cil_tmp42, "RxDMA_ERR interrupt, error %x\n", tmp);
      }
    } else {

    }
    }
    {
#line 361
    __cil_tmp43 = status & 32768U;
#line 361
    if (__cil_tmp43 != 0U) {
      {
#line 369
      __cil_tmp44 = etdev->pdev;
#line 369
      __cil_tmp45 = & __cil_tmp44->dev;
#line 369
      __cil_tmp46 = (struct device  const  *)__cil_tmp45;
#line 369
      dev_err(__cil_tmp46, "WAKE_ON_LAN interrupt\n");
      }
    } else {

    }
    }
    {
#line 373
    __cil_tmp47 = status & 65536U;
#line 373
    if (__cil_tmp47 != 0U) {
      {
#line 381
      __cil_tmp48 = & iomem->global.pm_csr;
#line 381
      __cil_tmp49 = (void const volatile   *)__cil_tmp48;
#line 381
      pm_csr___0 = readl(__cil_tmp49);
      }
      {
#line 382
      __cil_tmp50 = pm_csr___0 & 64U;
#line 382
      if (__cil_tmp50 != 0U) {
        {
#line 388
        DisablePhyComa(etdev);
        }
      } else {

      }
      }
      {
#line 394
      __cil_tmp51 = etdev->Stats.xcvr_addr;
#line 394
      __cil_tmp52 = (int )__cil_tmp51;
#line 394
      __cil_tmp53 = (u8 )__cil_tmp52;
#line 394
      __cil_tmp54 = (u8 )25;
#line 394
      PhyMiRead(etdev, __cil_tmp53, __cil_tmp54, & myisr);
      }
      {
#line 397
      __cil_tmp55 = etdev->ReplicaPhyLoopbk;
#line 397
      __cil_tmp56 = (unsigned int )__cil_tmp55;
#line 397
      if (__cil_tmp56 == 0U) {
        {
#line 398
        __cil_tmp57 = etdev->Stats.xcvr_addr;
#line 398
        __cil_tmp58 = (int )__cil_tmp57;
#line 398
        __cil_tmp59 = (u8 )__cil_tmp58;
#line 398
        __cil_tmp60 = (u8 )1;
#line 398
        __cil_tmp61 = & BmsrData.value;
#line 398
        PhyMiRead(etdev, __cil_tmp59, __cil_tmp60, __cil_tmp61);
#line 402
        __cil_tmp62 = (int )BmsrData.value;
#line 402
        __cil_tmp63 = etdev->Bmsr.value;
#line 402
        __cil_tmp64 = (int )__cil_tmp63;
#line 402
        __cil_tmp65 = __cil_tmp64 ^ __cil_tmp62;
#line 402
        BmsrInts.value = (u16 )__cil_tmp65;
#line 404
        etdev->Bmsr.value = BmsrData.value;
#line 407
        et131x_Mii_check(etdev, BmsrData, BmsrInts);
        }
      } else {

      }
      }
    } else {

    }
    }
    {
#line 412
    __cil_tmp66 = status & 131072U;
#line 412
    if (__cil_tmp66 != 0U) {
      {
#line 413
      __cil_tmp67 = & iomem->txmac.err;
#line 413
      __cil_tmp68 = (void const volatile   *)__cil_tmp67;
#line 413
      tmp___0 = readl(__cil_tmp68);
#line 413
      err = tmp___0;
#line 425
      __cil_tmp69 = etdev->pdev;
#line 425
      __cil_tmp70 = & __cil_tmp69->dev;
#line 425
      __cil_tmp71 = (struct device  const  *)__cil_tmp70;
#line 425
      dev_warn(__cil_tmp71, "TXMAC interrupt, error 0x%08x\n", err);
      }
    } else {

    }
    }
    {
#line 436
    __cil_tmp72 = status & 262144U;
#line 436
    if (__cil_tmp72 != 0U) {
      {
#line 446
      __cil_tmp73 = & iomem->rxmac.err_reg;
#line 446
      __cil_tmp74 = (void const volatile   *)__cil_tmp73;
#line 446
      tmp___1 = readl(__cil_tmp74);
#line 446
      __cil_tmp75 = etdev->pdev;
#line 446
      __cil_tmp76 = & __cil_tmp75->dev;
#line 446
      __cil_tmp77 = (struct device  const  *)__cil_tmp76;
#line 446
      dev_warn(__cil_tmp77, "RXMAC interrupt, error 0x%08x.  Requesting reset\n",
               tmp___1);
#line 450
      __cil_tmp78 = & iomem->rxmac.rxq_diag;
#line 450
      __cil_tmp79 = (void const volatile   *)__cil_tmp78;
#line 450
      tmp___2 = readl(__cil_tmp79);
#line 450
      __cil_tmp80 = & iomem->rxmac.ctrl;
#line 450
      __cil_tmp81 = (void const volatile   *)__cil_tmp80;
#line 450
      tmp___3 = readl(__cil_tmp81);
#line 450
      __cil_tmp82 = etdev->pdev;
#line 450
      __cil_tmp83 = & __cil_tmp82->dev;
#line 450
      __cil_tmp84 = (struct device  const  *)__cil_tmp83;
#line 450
      dev_warn(__cil_tmp84, "Enable 0x%08x, Diag 0x%08x\n", tmp___3, tmp___2);
      }
    } else {

    }
    }
    {
#line 463
    __cil_tmp85 = status & 524288U;
#line 463
    if (__cil_tmp85 != 0U) {
      {
#line 470
      HandleMacStatInterrupt(etdev);
      }
    } else {

    }
    }
  } else {

  }
  {
#line 486
  et131x_enable_interrupts(etdev);
  }
#line 487
  return;
}
}
#line 60 "/anthill/stuff/tacas-comp/inst/current/envs/linux-3.0.1/linux-3.0.1/arch/x86/include/asm/bitops.h"
__inline static void set_bit(unsigned int nr , unsigned long volatile   *addr ) 
{ long volatile   *__cil_tmp3 ;

  {
#line 68
  __cil_tmp3 = (long volatile   *)addr;
#line 68
  __asm__  volatile   (".section .smp_locks,\"a\"\n.balign 4\n.long 671f - .\n.previous\n671:\n\tlock; bts %1,%0": "+m" (*__cil_tmp3): "Ir" (nr): "memory");
#line 70
  return;
}
}
#line 275 "include/linux/timer.h"
extern void add_timer(struct timer_list * ) ;
#line 280
extern int del_timer_sync(struct timer_list * ) ;
#line 546 "include/linux/capability.h"
extern bool capable(int  ) ;
#line 124 "include/linux/interrupt.h"
extern int request_threaded_irq(unsigned int  , irqreturn_t (*)(int  , void * ) ,
                                irqreturn_t (*)(int  , void * ) , unsigned long  ,
                                char const   * , void * ) ;
#line 129 "include/linux/interrupt.h"
__inline static int request_irq(unsigned int irq , irqreturn_t (*handler)(int  , void * ) ,
                                unsigned long flags , char const   *name , void *dev ) 
{ int tmp ;
  irqreturn_t (*__cil_tmp7)(int  , void * ) ;

  {
  {
#line 132
  __cil_tmp7 = (irqreturn_t (*)(int  , void * ))0;
#line 132
  tmp = request_threaded_irq(irq, handler, __cil_tmp7, flags, name, dev);
  }
#line 132
  return (tmp);
}
}
#line 170
extern void free_irq(unsigned int  , void * ) ;
#line 185 "include/linux/mii.h"
__inline static struct mii_ioctl_data *if_mii(struct ifreq *rq ) 
{ union __anonunion_ifr_ifru_166 *__cil_tmp2 ;

  {
  {
#line 187
  __cil_tmp2 = & rq->ifr_ifru;
#line 187
  return ((struct mii_ioctl_data *)__cil_tmp2);
  }
}
}
#line 1815 "include/linux/netdevice.h"
__inline static void netif_start_queue(struct net_device *dev ) 
{ struct netdev_queue *tmp ;
  struct net_device  const  *__cil_tmp3 ;

  {
  {
#line 1817
  __cil_tmp3 = (struct net_device  const  *)dev;
#line 1817
  tmp = netdev_get_tx_queue(__cil_tmp3, 0U);
#line 1817
  netif_tx_start_queue(tmp);
  }
#line 1818
  return;
}
}
#line 1864 "include/linux/netdevice.h"
__inline static void netif_tx_stop_queue(struct netdev_queue *dev_queue ) 
{ int __ret_warn_on ;
  long tmp ;
  long tmp___0 ;
  struct netdev_queue *__cil_tmp5 ;
  unsigned long __cil_tmp6 ;
  unsigned long __cil_tmp7 ;
  int __cil_tmp8 ;
  long __cil_tmp9 ;
  int __cil_tmp10 ;
  int __cil_tmp11 ;
  int __cil_tmp12 ;
  long __cil_tmp13 ;
  unsigned long *__cil_tmp14 ;
  unsigned long volatile   *__cil_tmp15 ;

  {
  {
#line 1866
  __cil_tmp5 = (struct netdev_queue *)0;
#line 1866
  __cil_tmp6 = (unsigned long )__cil_tmp5;
#line 1866
  __cil_tmp7 = (unsigned long )dev_queue;
#line 1866
  __ret_warn_on = __cil_tmp7 == __cil_tmp6;
#line 1866
  __cil_tmp8 = __ret_warn_on != 0;
#line 1866
  __cil_tmp9 = (long )__cil_tmp8;
#line 1866
  tmp = __builtin_expect(__cil_tmp9, 0L);
  }
#line 1866
  if (tmp != 0L) {
    {
#line 1866
    __cil_tmp10 = (int const   )1866;
#line 1866
    __cil_tmp11 = (int )__cil_tmp10;
#line 1866
    warn_slowpath_null("include/linux/netdevice.h", __cil_tmp11);
    }
  } else {

  }
  {
#line 1866
  __cil_tmp12 = __ret_warn_on != 0;
#line 1866
  __cil_tmp13 = (long )__cil_tmp12;
#line 1866
  tmp___0 = __builtin_expect(__cil_tmp13, 0L);
  }
#line 1866
  if (tmp___0 != 0L) {
    {
#line 1867
    printk("<6>netif_stop_queue() cannot be called before register_netdev()\n");
    }
#line 1868
    return;
  } else {

  }
  {
#line 1870
  __cil_tmp14 = & dev_queue->state;
#line 1870
  __cil_tmp15 = (unsigned long volatile   *)__cil_tmp14;
#line 1870
  set_bit(0U, __cil_tmp15);
  }
#line 1871
  return;
}
}
#line 1880 "include/linux/netdevice.h"
__inline static void netif_stop_queue(struct net_device *dev ) 
{ struct netdev_queue *tmp ;
  struct net_device  const  *__cil_tmp3 ;

  {
  {
#line 1882
  __cil_tmp3 = (struct net_device  const  *)dev;
#line 1882
  tmp = netdev_get_tx_queue(__cil_tmp3, 0U);
#line 1882
  netif_tx_stop_queue(tmp);
  }
#line 1883
  return;
}
}
#line 47 "include/linux/etherdevice.h"
extern int eth_validate_addr(struct net_device * ) ;
#line 51
extern struct net_device *alloc_etherdev_mqs(int  , unsigned int  , unsigned int  ) ;
#line 62 "include/linux/etherdevice.h"
__inline static int is_zero_ether_addr(u8 const   *addr ) 
{ u8 const   *__cil_tmp2 ;
  u8 __cil_tmp3 ;
  unsigned char __cil_tmp4 ;
  int __cil_tmp5 ;
  u8 const   *__cil_tmp6 ;
  u8 __cil_tmp7 ;
  unsigned char __cil_tmp8 ;
  int __cil_tmp9 ;
  u8 const   *__cil_tmp10 ;
  u8 __cil_tmp11 ;
  unsigned char __cil_tmp12 ;
  int __cil_tmp13 ;
  u8 const   *__cil_tmp14 ;
  u8 __cil_tmp15 ;
  unsigned char __cil_tmp16 ;
  int __cil_tmp17 ;
  u8 const   *__cil_tmp18 ;
  u8 __cil_tmp19 ;
  unsigned char __cil_tmp20 ;
  int __cil_tmp21 ;
  u8 __cil_tmp22 ;
  unsigned char __cil_tmp23 ;
  int __cil_tmp24 ;
  int __cil_tmp25 ;
  int __cil_tmp26 ;
  int __cil_tmp27 ;
  int __cil_tmp28 ;
  int __cil_tmp29 ;
  unsigned int __cil_tmp30 ;

  {
  {
#line 64
  __cil_tmp2 = addr + 5UL;
#line 64
  __cil_tmp3 = *__cil_tmp2;
#line 64
  __cil_tmp4 = (unsigned char )__cil_tmp3;
#line 64
  __cil_tmp5 = (int )__cil_tmp4;
#line 64
  __cil_tmp6 = addr + 4UL;
#line 64
  __cil_tmp7 = *__cil_tmp6;
#line 64
  __cil_tmp8 = (unsigned char )__cil_tmp7;
#line 64
  __cil_tmp9 = (int )__cil_tmp8;
#line 64
  __cil_tmp10 = addr + 3UL;
#line 64
  __cil_tmp11 = *__cil_tmp10;
#line 64
  __cil_tmp12 = (unsigned char )__cil_tmp11;
#line 64
  __cil_tmp13 = (int )__cil_tmp12;
#line 64
  __cil_tmp14 = addr + 2UL;
#line 64
  __cil_tmp15 = *__cil_tmp14;
#line 64
  __cil_tmp16 = (unsigned char )__cil_tmp15;
#line 64
  __cil_tmp17 = (int )__cil_tmp16;
#line 64
  __cil_tmp18 = addr + 1UL;
#line 64
  __cil_tmp19 = *__cil_tmp18;
#line 64
  __cil_tmp20 = (unsigned char )__cil_tmp19;
#line 64
  __cil_tmp21 = (int )__cil_tmp20;
#line 64
  __cil_tmp22 = *addr;
#line 64
  __cil_tmp23 = (unsigned char )__cil_tmp22;
#line 64
  __cil_tmp24 = (int )__cil_tmp23;
#line 64
  __cil_tmp25 = __cil_tmp24 | __cil_tmp21;
#line 64
  __cil_tmp26 = __cil_tmp25 | __cil_tmp17;
#line 64
  __cil_tmp27 = __cil_tmp26 | __cil_tmp13;
#line 64
  __cil_tmp28 = __cil_tmp27 | __cil_tmp9;
#line 64
  __cil_tmp29 = __cil_tmp28 | __cil_tmp5;
#line 64
  __cil_tmp30 = (unsigned int )__cil_tmp29;
#line 64
  return (__cil_tmp30 == 0U);
  }
}
}
#line 74 "include/linux/etherdevice.h"
__inline static int is_multicast_ether_addr(u8 const   *addr ) 
{ u8 __cil_tmp2 ;
  int __cil_tmp3 ;

  {
  {
#line 76
  __cil_tmp2 = *addr;
#line 76
  __cil_tmp3 = (int )__cil_tmp2;
#line 76
  return (__cil_tmp3 & 1);
  }
}
}
#line 121 "include/linux/etherdevice.h"
__inline static int is_valid_ether_addr(u8 const   *addr ) 
{ int tmp ;
  int tmp___0 ;
  int tmp___1 ;

  {
  {
#line 125
  tmp = is_multicast_ether_addr(addr);
  }
#line 125
  if (tmp == 0) {
    {
#line 125
    tmp___0 = is_zero_ether_addr(addr);
    }
#line 125
    if (tmp___0 == 0) {
#line 125
      tmp___1 = 1;
    } else {
#line 125
      tmp___1 = 0;
    }
  } else {
#line 125
    tmp___1 = 0;
  }
#line 125
  return (tmp___1);
}
}
#line 99 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
struct net_device_stats *et131x_stats(struct net_device *netdev ) ;
#line 100
int et131x_open(struct net_device *netdev ) ;
#line 101
int et131x_close(struct net_device *netdev ) ;
#line 102
int et131x_ioctl(struct net_device *netdev , struct ifreq *reqbuf , int cmd ) ;
#line 103
void et131x_multicast(struct net_device *netdev ) ;
#line 104
int et131x_tx(struct sk_buff *skb , struct net_device *netdev ) ;
#line 105
void et131x_tx_timeout(struct net_device *netdev ) ;
#line 106
int et131x_change_mtu(struct net_device *netdev , int new_mtu ) ;
#line 107
int et131x_set_mac_addr(struct net_device *netdev , void *new_mac ) ;
#line 112 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
static struct net_device_ops  const  et131x_netdev_ops  = 
#line 112
     {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & et131x_open,
    & et131x_close, (netdev_tx_t (*)(struct sk_buff * , struct net_device * ))(& et131x_tx),
    (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * ,
                                                                   int  ))0, (void (*)(struct net_device * ))0,
    & et131x_multicast, & et131x_set_mac_addr, & eth_validate_addr, & et131x_ioctl,
    (int (*)(struct net_device * , struct ifmap * ))0, & et131x_change_mtu, (int (*)(struct net_device * ,
                                                                                     struct neigh_parms * ))0,
    & et131x_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0,
    & et131x_stats, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * ,
                                                                                       unsigned short  ))0,
    (void (*)(struct net_device * , unsigned short  ))0, (void (*)(struct net_device * ))0,
    (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0,
    (int (*)(struct net_device * , int  , u8 * ))0, (int (*)(struct net_device * ,
                                                             int  , u16  , u8  ))0,
    (int (*)(struct net_device * , int  , int  ))0, (int (*)(struct net_device * ,
                                                             int  , struct ifla_vf_info * ))0,
    (int (*)(struct net_device * , int  , struct nlattr ** ))0, (int (*)(struct net_device * ,
                                                                         int  , struct sk_buff * ))0,
    (int (*)(struct net_device * , u8  ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0,
    (int (*)(struct net_device * , u16  , struct scatterlist * , unsigned int  ))0,
    (int (*)(struct net_device * , u16  ))0, (int (*)(struct net_device * , u16  ,
                                                      struct scatterlist * , unsigned int  ))0,
    (int (*)(struct net_device * , u64 * , int  ))0, (int (*)(struct net_device * ,
                                                              struct sk_buff  const  * ,
                                                              u16  , u32  ))0, (int (*)(struct net_device * ,
                                                                                        struct net_device * ))0,
    (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * ,
                                                                     u32  ))0, (int (*)(struct net_device * ,
                                                                                        u32  ))0};
#line 134 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
struct net_device *et131x_device_alloc(void) 
{ struct net_device *netdev ;
  struct net_device *__cil_tmp2 ;
  unsigned long __cil_tmp3 ;
  unsigned long __cil_tmp4 ;

  {
  {
#line 139
  netdev = alloc_etherdev_mqs(3496, 1U, 1U);
  }
  {
#line 141
  __cil_tmp2 = (struct net_device *)0;
#line 141
  __cil_tmp3 = (unsigned long )__cil_tmp2;
#line 141
  __cil_tmp4 = (unsigned long )netdev;
#line 141
  if (__cil_tmp4 == __cil_tmp3) {
    {
#line 142
    printk("<3>et131x: Alloc of net_device struct failed\n");
    }
#line 143
    return ((struct net_device *)0);
  } else {

  }
  }
#line 151
  netdev->watchdog_timeo = 250;
#line 152
  netdev->netdev_ops = & et131x_netdev_ops;
#line 159
  return (netdev);
}
}
#line 168 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
struct net_device_stats *et131x_stats(struct net_device *netdev ) 
{ struct et131x_adapter *adapter ;
  void *tmp ;
  struct net_device_stats *stats ;
  CE_STATS_t *devstat ;
  struct net_device  const  *__cil_tmp6 ;
  uint64_t __cil_tmp7 ;
  uint64_t __cil_tmp8 ;
  u32 __cil_tmp9 ;
  u32 __cil_tmp10 ;
  u32 __cil_tmp11 ;
  u32 __cil_tmp12 ;
  u32 __cil_tmp13 ;
  u32 __cil_tmp14 ;
  u32 __cil_tmp15 ;
  u32 __cil_tmp16 ;
  u32 __cil_tmp17 ;
  u32 __cil_tmp18 ;
  u32 __cil_tmp19 ;
  u32 __cil_tmp20 ;
  u32 __cil_tmp21 ;
  u32 __cil_tmp22 ;
  u32 __cil_tmp23 ;

  {
  {
#line 170
  __cil_tmp6 = (struct net_device  const  *)netdev;
#line 170
  tmp = netdev_priv(__cil_tmp6);
#line 170
  adapter = (struct et131x_adapter *)tmp;
#line 171
  stats = & adapter->net_stats;
#line 172
  devstat = & adapter->Stats;
#line 174
  __cil_tmp7 = devstat->ipackets;
#line 174
  stats->rx_packets = (unsigned long )__cil_tmp7;
#line 175
  __cil_tmp8 = devstat->opackets;
#line 175
  stats->tx_packets = (unsigned long )__cil_tmp8;
#line 176
  __cil_tmp9 = devstat->other_errors;
#line 176
  __cil_tmp10 = devstat->code_violations;
#line 176
  __cil_tmp11 = devstat->crc_err;
#line 176
  __cil_tmp12 = devstat->alignment_err;
#line 176
  __cil_tmp13 = devstat->length_err;
#line 176
  __cil_tmp14 = __cil_tmp13 + __cil_tmp12;
#line 176
  __cil_tmp15 = __cil_tmp14 + __cil_tmp11;
#line 176
  __cil_tmp16 = __cil_tmp15 + __cil_tmp10;
#line 176
  __cil_tmp17 = __cil_tmp16 + __cil_tmp9;
#line 176
  stats->rx_errors = (unsigned long )__cil_tmp17;
#line 178
  __cil_tmp18 = devstat->max_pkt_error;
#line 178
  stats->tx_errors = (unsigned long )__cil_tmp18;
#line 179
  __cil_tmp19 = devstat->multircv;
#line 179
  stats->multicast = (unsigned long )__cil_tmp19;
#line 180
  __cil_tmp20 = devstat->collisions;
#line 180
  stats->collisions = (unsigned long )__cil_tmp20;
#line 182
  __cil_tmp21 = devstat->length_err;
#line 182
  stats->rx_length_errors = (unsigned long )__cil_tmp21;
#line 183
  __cil_tmp22 = devstat->rx_ov_flow;
#line 183
  stats->rx_over_errors = (unsigned long )__cil_tmp22;
#line 184
  __cil_tmp23 = devstat->crc_err;
#line 184
  stats->rx_crc_errors = (unsigned long )__cil_tmp23;
  }
#line 205
  return (stats);
}
}
#line 214 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_open(struct net_device *netdev ) 
{ int result ;
  struct et131x_adapter *adapter ;
  void *tmp ;
  struct net_device  const  *__cil_tmp5 ;
  struct timer_list *__cil_tmp6 ;
  unsigned int __cil_tmp7 ;
  char (*__cil_tmp8)[16U] ;
  char const   *__cil_tmp9 ;
  void *__cil_tmp10 ;
  struct pci_dev *__cil_tmp11 ;
  struct device *__cil_tmp12 ;
  struct device  const  *__cil_tmp13 ;
  unsigned int __cil_tmp14 ;
  u32 __cil_tmp15 ;

  {
  {
#line 216
  result = 0;
#line 217
  __cil_tmp5 = (struct net_device  const  *)netdev;
#line 217
  tmp = netdev_priv(__cil_tmp5);
#line 217
  adapter = (struct et131x_adapter *)tmp;
#line 220
  __cil_tmp6 = & adapter->ErrorTimer;
#line 220
  add_timer(__cil_tmp6);
#line 223
  __cil_tmp7 = netdev->irq;
#line 223
  __cil_tmp8 = & netdev->name;
#line 223
  __cil_tmp9 = (char const   *)__cil_tmp8;
#line 223
  __cil_tmp10 = (void *)netdev;
#line 223
  result = request_irq(__cil_tmp7, & et131x_isr, 128UL, __cil_tmp9, __cil_tmp10);
  }
#line 225
  if (result != 0) {
    {
#line 226
    __cil_tmp11 = adapter->pdev;
#line 226
    __cil_tmp12 = & __cil_tmp11->dev;
#line 226
    __cil_tmp13 = (struct device  const  *)__cil_tmp12;
#line 226
    __cil_tmp14 = netdev->irq;
#line 226
    dev_err(__cil_tmp13, "c ould not register IRQ %d\n", __cil_tmp14);
    }
#line 228
    return (result);
  } else {

  }
  {
#line 232
  et131x_rx_dma_enable(adapter);
#line 233
  et131x_tx_dma_enable(adapter);
#line 236
  et131x_enable_interrupts(adapter);
#line 238
  __cil_tmp15 = adapter->Flags;
#line 238
  adapter->Flags = __cil_tmp15 | 8U;
#line 241
  netif_start_queue(netdev);
  }
#line 242
  return (result);
}
}
#line 251 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_close(struct net_device *netdev ) 
{ struct et131x_adapter *adapter ;
  void *tmp ;
  struct net_device  const  *__cil_tmp4 ;
  u32 __cil_tmp5 ;
  unsigned int __cil_tmp6 ;
  void *__cil_tmp7 ;
  struct timer_list *__cil_tmp8 ;

  {
  {
#line 253
  __cil_tmp4 = (struct net_device  const  *)netdev;
#line 253
  tmp = netdev_priv(__cil_tmp4);
#line 253
  adapter = (struct et131x_adapter *)tmp;
#line 256
  netif_stop_queue(netdev);
#line 259
  et131x_rx_dma_disable(adapter);
#line 260
  et131x_tx_dma_disable(adapter);
#line 263
  et131x_disable_interrupts(adapter);
#line 266
  __cil_tmp5 = adapter->Flags;
#line 266
  adapter->Flags = __cil_tmp5 & 4294967287U;
#line 267
  __cil_tmp6 = netdev->irq;
#line 267
  __cil_tmp7 = (void *)netdev;
#line 267
  free_irq(__cil_tmp6, __cil_tmp7);
#line 270
  __cil_tmp8 = & adapter->ErrorTimer;
#line 270
  del_timer_sync(__cil_tmp8);
  }
#line 271
  return (0);
}
}
#line 282 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_ioctl_mii(struct net_device *netdev , struct ifreq *reqbuf , int cmd ) 
{ int status ;
  struct et131x_adapter *etdev ;
  void *tmp ;
  struct mii_ioctl_data *data ;
  struct mii_ioctl_data *tmp___0 ;
  bool tmp___1 ;
  int tmp___2 ;
  bool tmp___3 ;
  int tmp___4 ;
  struct net_device  const  *__cil_tmp13 ;
  u8 __cil_tmp14 ;
  u8 __cil_tmp15 ;
  int __cil_tmp16 ;
  u8 __cil_tmp17 ;
  __u16 __cil_tmp18 ;
  u8 __cil_tmp19 ;
  int __cil_tmp20 ;
  u8 __cil_tmp21 ;
  __u16 *__cil_tmp22 ;
  __u16 __cil_tmp23 ;
  u8 __cil_tmp24 ;
  int __cil_tmp25 ;
  u8 __cil_tmp26 ;
  __u16 __cil_tmp27 ;
  int __cil_tmp28 ;
  u16 __cil_tmp29 ;

  {
  {
#line 284
  status = 0;
#line 285
  __cil_tmp13 = (struct net_device  const  *)netdev;
#line 285
  tmp = netdev_priv(__cil_tmp13);
#line 285
  etdev = (struct et131x_adapter *)tmp;
#line 286
  tmp___0 = if_mii(reqbuf);
#line 286
  data = tmp___0;
  }
#line 289
  if (cmd == 35143) {
#line 289
    goto case_35143;
  } else
#line 293
  if (cmd == 35144) {
#line 293
    goto case_35144;
  } else
#line 301
  if (cmd == 35145) {
#line 301
    goto case_35145;
  } else {
#line 309
    goto switch_default;
#line 288
    if (0) {
      case_35143: 
#line 290
      __cil_tmp14 = etdev->Stats.xcvr_addr;
#line 290
      data->phy_id = (__u16 )__cil_tmp14;
#line 291
      goto ldv_35784;
      case_35144: 
      {
#line 294
      tmp___1 = capable(12);
      }
#line 294
      if (tmp___1) {
#line 294
        tmp___2 = 0;
      } else {
#line 294
        tmp___2 = 1;
      }
#line 294
      if (tmp___2) {
#line 295
        status = -1;
      } else {
        {
#line 297
        __cil_tmp15 = etdev->Stats.xcvr_addr;
#line 297
        __cil_tmp16 = (int )__cil_tmp15;
#line 297
        __cil_tmp17 = (u8 )__cil_tmp16;
#line 297
        __cil_tmp18 = data->reg_num;
#line 297
        __cil_tmp19 = (u8 )__cil_tmp18;
#line 297
        __cil_tmp20 = (int )__cil_tmp19;
#line 297
        __cil_tmp21 = (u8 )__cil_tmp20;
#line 297
        __cil_tmp22 = & data->val_out;
#line 297
        status = PhyMiRead(etdev, __cil_tmp17, __cil_tmp21, __cil_tmp22);
        }
      }
#line 299
      goto ldv_35784;
      case_35145: 
      {
#line 302
      tmp___3 = capable(12);
      }
#line 302
      if (tmp___3) {
#line 302
        tmp___4 = 0;
      } else {
#line 302
        tmp___4 = 1;
      }
#line 302
      if (tmp___4) {
#line 303
        status = -1;
      } else {
        {
#line 305
        __cil_tmp23 = data->reg_num;
#line 305
        __cil_tmp24 = (u8 )__cil_tmp23;
#line 305
        __cil_tmp25 = (int )__cil_tmp24;
#line 305
        __cil_tmp26 = (u8 )__cil_tmp25;
#line 305
        __cil_tmp27 = data->val_in;
#line 305
        __cil_tmp28 = (int )__cil_tmp27;
#line 305
        __cil_tmp29 = (u16 )__cil_tmp28;
#line 305
        status = MiWrite(etdev, __cil_tmp26, __cil_tmp29);
        }
      }
#line 307
      goto ldv_35784;
      switch_default: 
#line 310
      status = -95;
    } else {

    }
  }
  ldv_35784: ;
#line 312
  return (status);
}
}
#line 323 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_ioctl(struct net_device *netdev , struct ifreq *reqbuf , int cmd ) 
{ int status ;

  {
#line 325
  status = 0;
#line 328
  if (cmd == 35143) {
#line 328
    goto case_35143;
  } else
#line 329
  if (cmd == 35144) {
#line 329
    goto case_35144;
  } else
#line 330
  if (cmd == 35145) {
#line 330
    goto case_35145;
  } else {
#line 334
    goto switch_default;
#line 327
    if (0) {
      case_35143: ;
      case_35144: ;
      case_35145: 
      {
#line 331
      status = et131x_ioctl_mii(netdev, reqbuf, cmd);
      }
#line 332
      goto ldv_35797;
      switch_default: 
#line 335
      status = -95;
    } else {

    }
  }
  ldv_35797: ;
#line 337
  return (status);
}
}
#line 348 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_set_packet_filter(struct et131x_adapter *adapter ) 
{ int status ;
  uint32_t filter ;
  u32 ctrl ;
  u32 pf_ctrl ;
  ADDRESS_MAP_t *__cil_tmp6 ;
  u32 *__cil_tmp7 ;
  void const volatile   *__cil_tmp8 ;
  ADDRESS_MAP_t *__cil_tmp9 ;
  u32 *__cil_tmp10 ;
  void const volatile   *__cil_tmp11 ;
  unsigned int __cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  int __cil_tmp14 ;
  unsigned int __cil_tmp15 ;
  ADDRESS_MAP_t *__cil_tmp16 ;
  u32 *__cil_tmp17 ;
  void volatile   *__cil_tmp18 ;
  ADDRESS_MAP_t *__cil_tmp19 ;
  u32 *__cil_tmp20 ;
  void volatile   *__cil_tmp21 ;

  {
  {
#line 350
  status = 0;
#line 351
  filter = adapter->PacketFilter;
#line 355
  __cil_tmp6 = adapter->regs;
#line 355
  __cil_tmp7 = & __cil_tmp6->rxmac.ctrl;
#line 355
  __cil_tmp8 = (void const volatile   *)__cil_tmp7;
#line 355
  ctrl = readl(__cil_tmp8);
#line 356
  __cil_tmp9 = adapter->regs;
#line 356
  __cil_tmp10 = & __cil_tmp9->rxmac.pf_ctrl;
#line 356
  __cil_tmp11 = (void const volatile   *)__cil_tmp10;
#line 356
  pf_ctrl = readl(__cil_tmp11);
#line 361
  ctrl = ctrl | 4U;
  }
  {
#line 366
  __cil_tmp12 = filter & 8U;
#line 366
  if (__cil_tmp12 != 0U) {
#line 367
    pf_ctrl = pf_ctrl & 4294967288U;
  } else
#line 366
  if (filter == 0U) {
#line 367
    pf_ctrl = pf_ctrl & 4294967288U;
  } else {
    {
#line 374
    __cil_tmp13 = filter & 16U;
#line 374
    if (__cil_tmp13 != 0U) {
#line 375
      pf_ctrl = pf_ctrl & 4294967293U;
    } else {
      {
#line 377
      SetupDeviceForMulticast(adapter);
#line 378
      pf_ctrl = pf_ctrl | 2U;
#line 379
      ctrl = ctrl & 4294967291U;
      }
    }
    }
    {
#line 383
    __cil_tmp14 = (int )filter;
#line 383
    if (__cil_tmp14 & 1) {
      {
#line 384
      SetupDeviceForUnicast(adapter);
#line 385
      pf_ctrl = pf_ctrl | 4U;
#line 386
      ctrl = ctrl & 4294967291U;
      }
    } else {

    }
    }
    {
#line 390
    __cil_tmp15 = filter & 4U;
#line 390
    if (__cil_tmp15 != 0U) {
#line 391
      pf_ctrl = pf_ctrl | 1U;
#line 392
      ctrl = ctrl & 4294967291U;
    } else {
#line 394
      pf_ctrl = pf_ctrl & 4294967294U;
    }
    }
    {
#line 400
    __cil_tmp16 = adapter->regs;
#line 400
    __cil_tmp17 = & __cil_tmp16->rxmac.pf_ctrl;
#line 400
    __cil_tmp18 = (void volatile   *)__cil_tmp17;
#line 400
    writel(pf_ctrl, __cil_tmp18);
#line 401
    __cil_tmp19 = adapter->regs;
#line 401
    __cil_tmp20 = & __cil_tmp19->rxmac.ctrl;
#line 401
    __cil_tmp21 = (void volatile   *)__cil_tmp20;
#line 401
    writel(ctrl, __cil_tmp21);
    }
  }
  }
#line 403
  return (status);
}
}
#line 410 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
void et131x_multicast(struct net_device *netdev ) 
{ struct et131x_adapter *adapter ;
  void *tmp ;
  uint32_t PacketFilter ;
  unsigned long flags ;
  struct netdev_hw_addr *ha ;
  int i ;
  raw_spinlock_t *tmp___0 ;
  struct list_head  const  *__mptr ;
  size_t __len ;
  void *__ret ;
  int tmp___1 ;
  int tmp___2 ;
  struct list_head  const  *__mptr___0 ;
  struct net_device  const  *__cil_tmp15 ;
  spinlock_t *__cil_tmp16 ;
  unsigned int __cil_tmp17 ;
  unsigned int __cil_tmp18 ;
  u32 __cil_tmp19 ;
  u32 __cil_tmp20 ;
  unsigned int __cil_tmp21 ;
  unsigned int __cil_tmp22 ;
  u32 __cil_tmp23 ;
  int __cil_tmp24 ;
  u32 __cil_tmp25 ;
  int __cil_tmp26 ;
  u32 __cil_tmp27 ;
  u32 __cil_tmp28 ;
  u32 __cil_tmp29 ;
  struct list_head *__cil_tmp30 ;
  unsigned long __cil_tmp31 ;
  u8 (*__cil_tmp32)[128U][6U] ;
  void *__cil_tmp33 ;
  void *__cil_tmp34 ;
  unsigned char (*__cil_tmp35)[32U] ;
  void const   *__cil_tmp36 ;
  unsigned long __cil_tmp37 ;
  u8 (*__cil_tmp38)[128U][6U] ;
  void *__cil_tmp39 ;
  void *__cil_tmp40 ;
  unsigned char (*__cil_tmp41)[32U] ;
  void const   *__cil_tmp42 ;
  struct list_head *__cil_tmp43 ;
  struct list_head *__cil_tmp44 ;
  unsigned long __cil_tmp45 ;
  struct list_head *__cil_tmp46 ;
  unsigned long __cil_tmp47 ;
  u32 __cil_tmp48 ;
  spinlock_t *__cil_tmp49 ;

  {
  {
#line 412
  __cil_tmp15 = (struct net_device  const  *)netdev;
#line 412
  tmp = netdev_priv(__cil_tmp15);
#line 412
  adapter = (struct et131x_adapter *)tmp;
#line 413
  PacketFilter = 0U;
#line 418
  __cil_tmp16 = & adapter->Lock;
#line 418
  tmp___0 = spinlock_check(__cil_tmp16);
#line 418
  flags = _raw_spin_lock_irqsave(tmp___0);
#line 424
  PacketFilter = adapter->PacketFilter;
#line 431
  PacketFilter = PacketFilter & 4294967293U;
  }
  {
#line 437
  __cil_tmp17 = netdev->flags;
#line 437
  __cil_tmp18 = __cil_tmp17 & 256U;
#line 437
  if (__cil_tmp18 != 0U) {
#line 438
    __cil_tmp19 = adapter->PacketFilter;
#line 438
    adapter->PacketFilter = __cil_tmp19 | 8U;
  } else {
#line 440
    __cil_tmp20 = adapter->PacketFilter;
#line 440
    adapter->PacketFilter = __cil_tmp20 & 4294967287U;
  }
  }
  {
#line 442
  __cil_tmp21 = netdev->flags;
#line 442
  __cil_tmp22 = __cil_tmp21 & 512U;
#line 442
  if (__cil_tmp22 != 0U) {
#line 443
    __cil_tmp23 = adapter->PacketFilter;
#line 443
    adapter->PacketFilter = __cil_tmp23 | 16U;
  } else {

  }
  }
  {
#line 445
  __cil_tmp24 = netdev->mc.count;
#line 445
  if (__cil_tmp24 > 128) {
#line 446
    __cil_tmp25 = adapter->PacketFilter;
#line 446
    adapter->PacketFilter = __cil_tmp25 | 16U;
  } else {

  }
  }
  {
#line 448
  __cil_tmp26 = netdev->mc.count;
#line 448
  if (__cil_tmp26 <= 0) {
#line 449
    __cil_tmp27 = adapter->PacketFilter;
#line 449
    adapter->PacketFilter = __cil_tmp27 & 4294967279U;
#line 450
    __cil_tmp28 = adapter->PacketFilter;
#line 450
    adapter->PacketFilter = __cil_tmp28 & 4294967293U;
  } else {
#line 452
    __cil_tmp29 = adapter->PacketFilter;
#line 452
    adapter->PacketFilter = __cil_tmp29 | 2U;
  }
  }
#line 455
  i = 0;
#line 456
  __cil_tmp30 = netdev->mc.list.next;
#line 456
  __mptr = (struct list_head  const  *)__cil_tmp30;
#line 456
  ha = (struct netdev_hw_addr *)__mptr;
#line 456
  goto ldv_35826;
  ldv_35825: ;
#line 457
  if (i == 128) {
#line 458
    goto ldv_35821;
  } else {

  }
#line 459
  __len = 6UL;
#line 459
  if (__len > 63UL) {
    {
#line 459
    tmp___1 = i;
#line 459
    i = i + 1;
#line 459
    __cil_tmp31 = (unsigned long )tmp___1;
#line 459
    __cil_tmp32 = & adapter->MCList;
#line 459
    __cil_tmp33 = (void *)__cil_tmp32;
#line 459
    __cil_tmp34 = __cil_tmp33 + __cil_tmp31;
#line 459
    __cil_tmp35 = & ha->addr;
#line 459
    __cil_tmp36 = (void const   *)__cil_tmp35;
#line 459
    __ret = __memcpy(__cil_tmp34, __cil_tmp36, __len);
    }
  } else {
    {
#line 459
    tmp___2 = i;
#line 459
    i = i + 1;
#line 459
    __cil_tmp37 = (unsigned long )tmp___2;
#line 459
    __cil_tmp38 = & adapter->MCList;
#line 459
    __cil_tmp39 = (void *)__cil_tmp38;
#line 459
    __cil_tmp40 = __cil_tmp39 + __cil_tmp37;
#line 459
    __cil_tmp41 = & ha->addr;
#line 459
    __cil_tmp42 = (void const   *)__cil_tmp41;
#line 459
    __ret = __builtin_memcpy(__cil_tmp40, __cil_tmp42, __len);
    }
  }
#line 456
  __cil_tmp43 = ha->list.next;
#line 456
  __mptr___0 = (struct list_head  const  *)__cil_tmp43;
#line 456
  ha = (struct netdev_hw_addr *)__mptr___0;
  ldv_35826: ;
  {
#line 456
  __cil_tmp44 = & netdev->mc.list;
#line 456
  __cil_tmp45 = (unsigned long )__cil_tmp44;
#line 456
  __cil_tmp46 = & ha->list;
#line 456
  __cil_tmp47 = (unsigned long )__cil_tmp46;
#line 456
  if (__cil_tmp47 != __cil_tmp45) {
#line 457
    goto ldv_35825;
  } else {
#line 459
    goto ldv_35821;
  }
  }
  ldv_35821: 
#line 461
  adapter->MCAddressCount = (u32 )i;
  {
#line 469
  __cil_tmp48 = adapter->PacketFilter;
#line 469
  if (__cil_tmp48 != PacketFilter) {
    {
#line 471
    et131x_set_packet_filter(adapter);
    }
  } else {

  }
  }
  {
#line 473
  __cil_tmp49 = & adapter->Lock;
#line 473
  spin_unlock_irqrestore(__cil_tmp49, flags);
  }
#line 474
  return;
}
}
#line 483 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_tx(struct sk_buff *skb , struct net_device *netdev ) 
{ int status ;

  {
  {
#line 485
  status = 0;
#line 488
  netdev->trans_start = (unsigned long )jiffies;
#line 491
  status = et131x_send_packets(skb, netdev);
  }
#line 494
  if (status != 0) {
#line 495
    if (status == -12) {
      {
#line 499
      netif_stop_queue(netdev);
#line 500
      status = 16;
      }
    } else {
#line 502
      status = 0;
    }
  } else {

  }
#line 505
  return (status);
}
}
#line 516 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
void et131x_tx_timeout(struct net_device *netdev ) 
{ struct et131x_adapter *etdev ;
  void *tmp ;
  struct tcb *tcb ;
  unsigned long flags ;
  raw_spinlock_t *tmp___0 ;
  struct net_device  const  *__cil_tmp7 ;
  u32 __cil_tmp8 ;
  unsigned int __cil_tmp9 ;
  u32 __cil_tmp10 ;
  unsigned int __cil_tmp11 ;
  u32 __cil_tmp12 ;
  unsigned int __cil_tmp13 ;
  struct pci_dev *__cil_tmp14 ;
  struct device *__cil_tmp15 ;
  struct device  const  *__cil_tmp16 ;
  spinlock_t *__cil_tmp17 ;
  struct tcb *__cil_tmp18 ;
  unsigned long __cil_tmp19 ;
  unsigned long __cil_tmp20 ;
  u32 __cil_tmp21 ;
  u32 __cil_tmp22 ;
  spinlock_t *__cil_tmp23 ;
  struct pci_dev *__cil_tmp24 ;
  struct device *__cil_tmp25 ;
  struct device  const  *__cil_tmp26 ;
  u32 __cil_tmp27 ;
  u32 __cil_tmp28 ;
  spinlock_t *__cil_tmp29 ;

  {
  {
#line 518
  __cil_tmp7 = (struct net_device  const  *)netdev;
#line 518
  tmp = netdev_priv(__cil_tmp7);
#line 518
  etdev = (struct et131x_adapter *)tmp;
  }
  {
#line 523
  __cil_tmp8 = etdev->Flags;
#line 523
  __cil_tmp9 = __cil_tmp8 & 536870912U;
#line 523
  if (__cil_tmp9 != 0U) {
#line 524
    return;
  } else {

  }
  }
  {
#line 529
  __cil_tmp10 = etdev->Flags;
#line 529
  __cil_tmp11 = __cil_tmp10 & 8388608U;
#line 529
  if (__cil_tmp11 != 0U) {
#line 530
    return;
  } else {

  }
  }
  {
#line 533
  __cil_tmp12 = etdev->Flags;
#line 533
  __cil_tmp13 = __cil_tmp12 & 67108864U;
#line 533
  if (__cil_tmp13 != 0U) {
    {
#line 534
    __cil_tmp14 = etdev->pdev;
#line 534
    __cil_tmp15 = & __cil_tmp14->dev;
#line 534
    __cil_tmp16 = (struct device  const  *)__cil_tmp15;
#line 534
    dev_err(__cil_tmp16, "hardware error - reset\n");
    }
#line 535
    return;
  } else {

  }
  }
  {
#line 539
  __cil_tmp17 = & etdev->TCBSendQLock;
#line 539
  tmp___0 = spinlock_check(__cil_tmp17);
#line 539
  flags = _raw_spin_lock_irqsave(tmp___0);
#line 541
  tcb = etdev->tx_ring.send_head;
  }
  {
#line 543
  __cil_tmp18 = (struct tcb *)0;
#line 543
  __cil_tmp19 = (unsigned long )__cil_tmp18;
#line 543
  __cil_tmp20 = (unsigned long )tcb;
#line 543
  if (__cil_tmp20 != __cil_tmp19) {
#line 544
    __cil_tmp21 = tcb->count;
#line 544
    tcb->count = __cil_tmp21 + 1U;
    {
#line 546
    __cil_tmp22 = tcb->count;
#line 546
    if (__cil_tmp22 != 0U) {
      {
#line 547
      __cil_tmp23 = & etdev->TCBSendQLock;
#line 547
      spin_unlock_irqrestore(__cil_tmp23, flags);
#line 550
      __cil_tmp24 = etdev->pdev;
#line 550
      __cil_tmp25 = & __cil_tmp24->dev;
#line 550
      __cil_tmp26 = (struct device  const  *)__cil_tmp25;
#line 550
      __cil_tmp27 = tcb->index;
#line 550
      __cil_tmp28 = tcb->flags;
#line 550
      dev_warn(__cil_tmp26, "Send stuck - reset.  tcb->WrIndex %x, Flags 0x%08x\n",
               __cil_tmp27, __cil_tmp28);
#line 555
      et131x_close(netdev);
#line 556
      et131x_open(netdev);
      }
#line 558
      return;
    } else {

    }
    }
  } else {

  }
  }
  {
#line 562
  __cil_tmp29 = & etdev->TCBSendQLock;
#line 562
  spin_unlock_irqrestore(__cil_tmp29, flags);
  }
#line 563
  return;
}
}
#line 572 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_change_mtu(struct net_device *netdev , int new_mtu ) 
{ int result ;
  struct et131x_adapter *adapter ;
  void *tmp ;
  size_t __len ;
  void *__ret ;
  struct net_device  const  *__cil_tmp8 ;
  int __cil_tmp9 ;
  struct pci_dev *__cil_tmp10 ;
  struct device *__cil_tmp11 ;
  struct device  const  *__cil_tmp12 ;
  unsigned char *__cil_tmp13 ;
  void *__cil_tmp14 ;
  u8 (*__cil_tmp15)[6U] ;
  void const   *__cil_tmp16 ;
  unsigned char *__cil_tmp17 ;
  void *__cil_tmp18 ;
  u8 (*__cil_tmp19)[6U] ;
  void const   *__cil_tmp20 ;
  u32 __cil_tmp21 ;
  unsigned int __cil_tmp22 ;

  {
  {
#line 574
  result = 0;
#line 575
  __cil_tmp8 = (struct net_device  const  *)netdev;
#line 575
  tmp = netdev_priv(__cil_tmp8);
#line 575
  adapter = (struct et131x_adapter *)tmp;
  }
#line 578
  if (new_mtu <= 63) {
#line 579
    return (-22);
  } else
#line 578
  if (new_mtu > 9216) {
#line 579
    return (-22);
  } else {

  }
  {
#line 582
  netif_stop_queue(netdev);
#line 585
  et131x_rx_dma_disable(adapter);
#line 586
  et131x_tx_dma_disable(adapter);
#line 589
  et131x_disable_interrupts(adapter);
#line 590
  et131x_handle_send_interrupt(adapter);
#line 591
  et131x_handle_recv_interrupt(adapter);
#line 594
  netdev->mtu = (unsigned int )new_mtu;
#line 597
  et131x_adapter_memory_free(adapter);
#line 600
  __cil_tmp9 = new_mtu + 14;
#line 600
  adapter->RegistryJumboPacket = (u32 )__cil_tmp9;
#line 601
  et131x_soft_reset(adapter);
#line 604
  result = et131x_adapter_memory_alloc(adapter);
  }
#line 605
  if (result != 0) {
    {
#line 606
    __cil_tmp10 = adapter->pdev;
#line 606
    __cil_tmp11 = & __cil_tmp10->dev;
#line 606
    __cil_tmp12 = (struct device  const  *)__cil_tmp11;
#line 606
    dev_warn(__cil_tmp12, "Change MTU failed; couldn\'t re-alloc DMA memory\n");
    }
#line 608
    return (result);
  } else {

  }
  {
#line 611
  et131x_init_send(adapter);
#line 613
  et131x_hwaddr_init(adapter);
#line 614
  __len = 6UL;
  }
#line 614
  if (__len > 63UL) {
    {
#line 614
    __cil_tmp13 = netdev->dev_addr;
#line 614
    __cil_tmp14 = (void *)__cil_tmp13;
#line 614
    __cil_tmp15 = & adapter->addr;
#line 614
    __cil_tmp16 = (void const   *)__cil_tmp15;
#line 614
    __ret = __memcpy(__cil_tmp14, __cil_tmp16, __len);
    }
  } else {
    {
#line 614
    __cil_tmp17 = netdev->dev_addr;
#line 614
    __cil_tmp18 = (void *)__cil_tmp17;
#line 614
    __cil_tmp19 = & adapter->addr;
#line 614
    __cil_tmp20 = (void const   *)__cil_tmp19;
#line 614
    __ret = __builtin_memcpy(__cil_tmp18, __cil_tmp20, __len);
    }
  }
  {
#line 617
  et131x_adapter_setup(adapter);
  }
  {
#line 620
  __cil_tmp21 = adapter->Flags;
#line 620
  __cil_tmp22 = __cil_tmp21 & 8U;
#line 620
  if (__cil_tmp22 != 0U) {
    {
#line 621
    et131x_enable_interrupts(adapter);
    }
  } else {

  }
  }
  {
#line 624
  et131x_rx_dma_enable(adapter);
#line 625
  et131x_tx_dma_enable(adapter);
#line 628
  netif_wake_queue(netdev);
  }
#line 629
  return (result);
}
}
#line 641 "/anthill/stuff/tacas-comp/work/current--X--drivers/staging/et131x/et131x.ko--X--bulklinux-3.0.1--X--08_1/linux-3.0.1/csd_deg_dscv/19/dscv_tempdir/dscv/ri/08_1/drivers/staging/et131x/et131x_netdev.c.p"
int et131x_set_mac_addr(struct net_device *netdev , void *new_mac ) 
{ int result ;
  struct et131x_adapter *adapter ;
  void *tmp ;
  struct sockaddr *address ;
  int tmp___0 ;
  size_t __len ;
  void *__ret ;
  struct net_device  const  *__cil_tmp10 ;
  struct et131x_adapter *__cil_tmp11 ;
  unsigned long __cil_tmp12 ;
  unsigned long __cil_tmp13 ;
  char (*__cil_tmp14)[14U] ;
  u8 const   *__cil_tmp15 ;
  unsigned char __cil_tmp16 ;
  unsigned char *__cil_tmp17 ;
  void *__cil_tmp18 ;
  char (*__cil_tmp19)[14U] ;
  void const   *__cil_tmp20 ;
  char (*__cil_tmp21)[16U] ;
  char *__cil_tmp22 ;
  unsigned char *__cil_tmp23 ;
  struct pci_dev *__cil_tmp24 ;
  struct device *__cil_tmp25 ;
  struct device  const  *__cil_tmp26 ;
  u32 __cil_tmp27 ;
  unsigned int __cil_tmp28 ;

  {
  {
#line 643
  result = 0;
#line 644
  __cil_tmp10 = (struct net_device  const  *)netdev;
#line 644
  tmp = netdev_priv(__cil_tmp10);
#line 644
  adapter = (struct et131x_adapter *)tmp;
#line 645
  address = (struct sockaddr *)new_mac;
  }
  {
#line 649
  __cil_tmp11 = (struct et131x_adapter *)0;
#line 649
  __cil_tmp12 = (unsigned long )__cil_tmp11;
#line 649
  __cil_tmp13 = (unsigned long )adapter;
#line 649
  if (__cil_tmp13 == __cil_tmp12) {
#line 650
    return (-19);
  } else {

  }
  }
  {
#line 653
  __cil_tmp14 = & address->sa_data;
#line 653
  __cil_tmp15 = (u8 const   *)__cil_tmp14;
#line 653
  tmp___0 = is_valid_ether_addr(__cil_tmp15);
  }
#line 653
  if (tmp___0 == 0) {
#line 654
    return (-22);
  } else {

  }
  {
#line 657
  netif_stop_queue(netdev);
#line 660
  et131x_rx_dma_disable(adapter);
#line 661
  et131x_tx_dma_disable(adapter);
#line 664
  et131x_disable_interrupts(adapter);
#line 665
  et131x_handle_send_interrupt(adapter);
#line 666
  et131x_handle_recv_interrupt(adapter);
#line 672
  __cil_tmp16 = netdev->addr_len;
#line 672
  __len = (size_t )__cil_tmp16;
#line 672
  __cil_tmp17 = netdev->dev_addr;
#line 672
  __cil_tmp18 = (void *)__cil_tmp17;
#line 672
  __cil_tmp19 = & address->sa_data;
#line 672
  __cil_tmp20 = (void const   *)__cil_tmp19;
#line 672
  __ret = __builtin_memcpy(__cil_tmp18, __cil_tmp20, __len);
#line 674
  __cil_tmp21 = & netdev->name;
#line 674
  __cil_tmp22 = (char *)__cil_tmp21;
#line 674
  __cil_tmp23 = netdev->dev_addr;
#line 674
  printk("<6>%s: Setting MAC address to %pM\n", __cil_tmp22, __cil_tmp23);
#line 678
  et131x_adapter_memory_free(adapter);
#line 684
  et131x_soft_reset(adapter);
#line 687
  result = et131x_adapter_memory_alloc(adapter);
  }
#line 688
  if (result != 0) {
    {
#line 689
    __cil_tmp24 = adapter->pdev;
#line 689
    __cil_tmp25 = & __cil_tmp24->dev;
#line 689
    __cil_tmp26 = (struct device  const  *)__cil_tmp25;
#line 689
    dev_err(__cil_tmp26, "Change MAC failed; couldn\'t re-alloc DMA memory\n");
    }
#line 691
    return (result);
  } else {

  }
  {
#line 694
  et131x_init_send(adapter);
#line 696
  et131x_hwaddr_init(adapter);
#line 699
  et131x_adapter_setup(adapter);
  }
  {
#line 702
  __cil_tmp27 = adapter->Flags;
#line 702
  __cil_tmp28 = __cil_tmp27 & 8U;
#line 702
  if (__cil_tmp28 != 0U) {
    {
#line 703
    et131x_enable_interrupts(adapter);
    }
  } else {

  }
  }
  {
#line 706
  et131x_rx_dma_enable(adapter);
#line 707
  et131x_tx_dma_enable(adapter);
#line 710
  netif_wake_queue(netdev);
  }
#line 711
  return (result);
}
}