ClabureDB: Classified Bug-Reports Database

        } while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);

        return ret_val;
}

/**
 *  e1000_write_nvm_ich8lan - Write word(s) to the NVM
 *  @hw: pointer to the HW structure
 *  @offset: The offset (in bytes) of the word(s) to write.
 *  @words: Size of data to write in words
 *  @data: Pointer to the word(s) to write at offset.
 *
 *  Writes a byte or word to the NVM using the flash access registers.
 **/
static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
                                   u16 *data)
{
        struct e1000_nvm_info *nvm = &hw->nvm;
        struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
        s32 ret_val;
        u16 i;

        if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
            (words == 0)) {
                hw_dbg(hw, "nvm parameter(s) out of bounds\n");
                return -E1000_ERR_NVM;
        }

        ret_val = e1000_acquire_swflag_ich8lan(hw);
        if (ret_val)
                return ret_val;

        for (i = 0; i < words; i++) {
                dev_spec->shadow_ram[offset+i].modified = 1;
                dev_spec->shadow_ram[offset+i].value = data[i];
        }

        e1000_release_swflag_ich8lan(hw);

        return 0;
}