413 enuscr= httfea+ (size * 1024 * 1024) - 1;
414 pci_write_config_dword(dev1, ULI_X86_64_HTT_FEA_REG, httfea);
415 pci_write_config_dword(dev1, ULI_X86_64_ENU_SCR_REG, enuscr);
416
417 pci_dev_put(dev1);
418 return 0;
419}
420
421
422static const struct aper_size_info_32 nforce3_sizes[5] =
423{
424 {512, 131072, 7, 0x00000000 },
425 {256, 65536, 6, 0x00000008 },
426 {128, 32768, 5, 0x0000000C },
427 {64, 16384, 4, 0x0000000E },
428 {32, 8192, 3, 0x0000000F }
429};
430
431
432
433static int nforce3_agp_init(struct pci_dev *pdev)
434{
435 u32 tmp, apbase, apbar, aplimit;
436 struct pci_dev *dev1;
437 int i;
438 unsigned size = amd64_fetch_size();
439
440 dev_info(&pdev->dev, "setting up Nforce3 AGP\n");
441
442 dev1 = pci_get_slot(pdev->bus, PCI_DEVFN(11, 0));
443 if (dev1 == NULL) {
444 dev_info(&pdev->dev, "can't find Nforce3 secondary device\n");
445 return -ENODEV;
446 }
447
448 for (i = 0; i < ARRAY_SIZE(nforce3_sizes); i++)
449 if (nforce3_sizes[i].size == size)
450 break;
451
452 if (i == ARRAY_SIZE(nforce3_sizes)) {
453 dev_info(&pdev->dev, "no NForce3 size found for %d\n", size);