2796 cx_write(MO_GP1_IO, 0x00000001);
2797 break;
2798 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
2799
2800
2801 cx_write(MO_GP0_IO, 0x00111100);
2802 msleep(1);
2803 cx_write(MO_GP0_IO, 0x00111111);
2804 break;
2805 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
2806
2807 cx_set(MO_GP0_IO, 0x00004040);
2808 cx_clear(MO_GP0_IO, 0x00000040);
2809 msleep(1000);
2810 cx_set(MO_GP0_IO, 0x00004040);
2811
2812 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
2813 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
2814 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
2815
2816 cx_set(MO_GP0_IO, 0x00000101);
2817 cx_clear(MO_GP0_IO, 0x00000001);
2818 msleep(1);
2819 cx_set(MO_GP0_IO, 0x00000101);
2820 if (0 == core->i2c_rc &&
2821 core->boardnr == CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID)
2822 dvico_fusionhdtv_hybrid_init(core);
2823 break;
2824 case CX88_BOARD_KWORLD_DVB_T:
2825 case CX88_BOARD_DNTV_LIVE_DVB_T:
2826 cx_set(MO_GP0_IO, 0x00000707);
2827 cx_set(MO_GP2_IO, 0x00000101);
2828 cx_clear(MO_GP2_IO, 0x00000001);
2829 msleep(1);
2830 cx_clear(MO_GP0_IO, 0x00000007);
2831 cx_set(MO_GP2_IO, 0x00000101);
2832 break;
2833 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
2834 cx_write(MO_GP0_IO, 0x00080808);
2835 break;
2836 case CX88_BOARD_ATI_HDTVWONDER: