Showing error 596

User: Jiri Slaby
Error type: Double Resource Put
Error type description: There is a try to return some resource to the system twice
File location: drivers/ide/via82cxxx.c
Line in file: 419
Project: Linux Kernel
Project version: 2.6.28
Tools: Stanse (1.2)
Entered: 2011-11-07 22:20:28 UTC

Source: 

  1/*
  2 * VIA IDE driver for Linux. Supported southbridges:
  3 *
  4 *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  5 *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  6 *   vt8235, vt8237, vt8237a
  7 *
  8 * Copyright (c) 2000-2002 Vojtech Pavlik
  9 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
 10 *
 11 * Based on the work of:
 12 *        Michel Aubry
 13 *        Jeff Garzik
 14 *        Andre Hedrick
 15 *
 16 * Documentation:
 17 *        Obsolete device documentation publically available from via.com.tw
 18 *        Current device documentation available under NDA only
 19 */
 20
 21/*
 22 * This program is free software; you can redistribute it and/or modify it
 23 * under the terms of the GNU General Public License version 2 as published by
 24 * the Free Software Foundation.
 25 */
 26
 27#include <linux/module.h>
 28#include <linux/kernel.h>
 29#include <linux/pci.h>
 30#include <linux/init.h>
 31#include <linux/ide.h>
 32#include <linux/dmi.h>
 33
 34#ifdef CONFIG_PPC_CHRP
 35#include <asm/processor.h>
 36#endif
 37
 38#define DRV_NAME "via82cxxx"
 39
 40#define VIA_IDE_ENABLE                0x40
 41#define VIA_IDE_CONFIG                0x41
 42#define VIA_FIFO_CONFIG                0x43
 43#define VIA_MISC_1                0x44
 44#define VIA_MISC_2                0x45
 45#define VIA_MISC_3                0x46
 46#define VIA_DRIVE_TIMING        0x48
 47#define VIA_8BIT_TIMING                0x4e
 48#define VIA_ADDRESS_SETUP        0x4c
 49#define VIA_UDMA_TIMING                0x50
 50
 51#define VIA_BAD_PREQ                0x01 /* Crashes if PREQ# till DDACK# set */
 52#define VIA_BAD_CLK66                0x02 /* 66 MHz clock doesn't work correctly */
 53#define VIA_SET_FIFO                0x04 /* Needs to have FIFO split set */
 54#define VIA_NO_UNMASK                0x08 /* Doesn't work with IRQ unmasking on */
 55#define VIA_BAD_ID                0x10 /* Has wrong vendor ID (0x1107) */
 56#define VIA_BAD_AST                0x20 /* Don't touch Address Setup Timing */
 57
 58/*
 59 * VIA SouthBridge chips.
 60 */
 61
 62static struct via_isa_bridge {
 63        char *name;
 64        u16 id;
 65        u8 rev_min;
 66        u8 rev_max;
 67        u8 udma_mask;
 68        u8 flags;
 69} via_isa_bridges[] = {
 70        { "vx800",        PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 71        { "cx700",        PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 72        { "vt8237s",        PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 73        { "vt6410",        PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 74        { "vt8251",        PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 75        { "vt8237",        PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 76        { "vt8237a",        PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 77        { "vt8235",        PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 78        { "vt8233a",        PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 79        { "vt8233c",        PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
 80        { "vt8233",        PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
 81        { "vt8231",        PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
 82        { "vt82c686b",        PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
 83        { "vt82c686a",        PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
 84        { "vt82c686",        PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 85        { "vt82c596b",        PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
 86        { "vt82c596a",        PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 87        { "vt82c586b",        PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
 88        { "vt82c586b",        PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
 89        { "vt82c586b",        PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
 90        { "vt82c586a",        PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
 91        { "vt82c586",        PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
 92        { "vt82c576",        PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
 93        { "vt82c576",        PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 94        { NULL }
 95};
 96
 97static unsigned int via_clock;
 98static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
 99
100struct via82cxxx_dev
101{
102        struct via_isa_bridge *via_config;
103        unsigned int via_80w;
104};
105
106/**
107 *        via_set_speed                        -        write timing registers
108 *        @dev: PCI device
109 *        @dn: device
110 *        @timing: IDE timing data to use
111 *
112 *        via_set_speed writes timing values to the chipset registers
113 */
114
115static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
116{
117        struct pci_dev *dev = to_pci_dev(hwif->dev);
118        struct ide_host *host = pci_get_drvdata(dev);
119        struct via82cxxx_dev *vdev = host->host_priv;
120        u8 t;
121
122        if (~vdev->via_config->flags & VIA_BAD_AST) {
123                pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
124                t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
125                pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
126        }
127
128        pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
129                ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
130
131        pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
132                ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
133
134        switch (vdev->via_config->udma_mask) {
135        case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
136        case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
137        case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
138        case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
139        default: return;
140        }
141
142        pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
143}
144
145/**
146 *        via_set_drive                -        configure transfer mode
147 *        @drive: Drive to set up
148 *        @speed: desired speed
149 *
150 *        via_set_drive() computes timing values configures the chipset to
151 *        a desired transfer mode.  It also can be called by upper layers.
152 */
153
154static void via_set_drive(ide_drive_t *drive, const u8 speed)
155{
156        ide_hwif_t *hwif = drive->hwif;
157        ide_drive_t *peer = ide_get_pair_dev(drive);
158        struct pci_dev *dev = to_pci_dev(hwif->dev);
159        struct ide_host *host = pci_get_drvdata(dev);
160        struct via82cxxx_dev *vdev = host->host_priv;
161        struct ide_timing t, p;
162        unsigned int T, UT;
163
164        T = 1000000000 / via_clock;
165
166        switch (vdev->via_config->udma_mask) {
167        case ATA_UDMA2: UT = T;   break;
168        case ATA_UDMA4: UT = T/2; break;
169        case ATA_UDMA5: UT = T/3; break;
170        case ATA_UDMA6: UT = T/4; break;
171        default:        UT = T;
172        }
173
174        ide_timing_compute(drive, speed, &t, T, UT);
175
176        if (peer) {
177                ide_timing_compute(peer, peer->current_speed, &p, T, UT);
178                ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
179        }
180
181        via_set_speed(HWIF(drive), drive->dn, &t);
182}
183
184/**
185 *        via_set_pio_mode        -        set host controller for PIO mode
186 *        @drive: drive
187 *        @pio: PIO mode number
188 *
189 *        A callback from the upper layers for PIO-only tuning.
190 */
191
192static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
193{
194        via_set_drive(drive, XFER_PIO_0 + pio);
195}
196
197static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
198{
199        struct via_isa_bridge *via_config;
200
201        for (via_config = via_isa_bridges; via_config->id; via_config++)
202                if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
203                        !!(via_config->flags & VIA_BAD_ID),
204                        via_config->id, NULL))) {
205
206                        if ((*isa)->revision >= via_config->rev_min &&
207                            (*isa)->revision <= via_config->rev_max)
208                                break;
209                        pci_dev_put(*isa);
210                }
211
212        return via_config;
213}
214
215/*
216 * Check and handle 80-wire cable presence
217 */
218static void via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
219{
220        int i;
221
222        switch (vdev->via_config->udma_mask) {
223                case ATA_UDMA4:
224                        for (i = 24; i >= 0; i -= 8)
225                                if (((u >> (i & 16)) & 8) &&
226                                    ((u >> i) & 0x20) &&
227                                     (((u >> i) & 7) < 2)) {
228                                        /*
229                                         * 2x PCI clock and
230                                         * UDMA w/ < 3T/cycle
231                                         */
232                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
233                                }
234                        break;
235
236                case ATA_UDMA5:
237                        for (i = 24; i >= 0; i -= 8)
238                                if (((u >> i) & 0x10) ||
239                                    (((u >> i) & 0x20) &&
240                                     (((u >> i) & 7) < 4))) {
241                                        /* BIOS 80-wire bit or
242                                         * UDMA w/ < 60ns/cycle
243                                         */
244                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
245                                }
246                        break;
247
248                case ATA_UDMA6:
249                        for (i = 24; i >= 0; i -= 8)
250                                if (((u >> i) & 0x10) ||
251                                    (((u >> i) & 0x20) &&
252                                     (((u >> i) & 7) < 6))) {
253                                        /* BIOS 80-wire bit or
254                                         * UDMA w/ < 60ns/cycle
255                                         */
256                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
257                                }
258                        break;
259        }
260}
261
262/**
263 *        init_chipset_via82cxxx        -        initialization handler
264 *        @dev: PCI device
265 *
266 *        The initialization callback. Here we determine the IDE chip type
267 *        and initialize its drive independent registers.
268 */
269
270static unsigned int init_chipset_via82cxxx(struct pci_dev *dev)
271{
272        struct ide_host *host = pci_get_drvdata(dev);
273        struct via82cxxx_dev *vdev = host->host_priv;
274        struct via_isa_bridge *via_config = vdev->via_config;
275        u8 t, v;
276        u32 u;
277
278        /*
279         * Detect cable and configure Clk66
280         */
281        pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
282
283        via_cable_detect(vdev, u);
284
285        if (via_config->udma_mask == ATA_UDMA4) {
286                /* Enable Clk66 */
287                pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
288        } else if (via_config->flags & VIA_BAD_CLK66) {
289                /* Would cause trouble on 596a and 686 */
290                pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
291        }
292
293        /*
294         * Check whether interfaces are enabled.
295         */
296
297        pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
298
299        /*
300         * Set up FIFO sizes and thresholds.
301         */
302
303        pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
304
305        /* Disable PREQ# till DDACK# */
306        if (via_config->flags & VIA_BAD_PREQ) {
307                /* Would crash on 586b rev 41 */
308                t &= 0x7f;
309        }
310
311        /* Fix FIFO split between channels */
312        if (via_config->flags & VIA_SET_FIFO) {
313                t &= (t & 0x9f);
314                switch (v & 3) {
315                        case 2: t |= 0x00; break;        /* 16 on primary */
316                        case 1: t |= 0x60; break;        /* 16 on secondary */
317                        case 3: t |= 0x20; break;        /* 8 pri 8 sec */
318                }
319        }
320
321        pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
322
323        return 0;
324}
325
326/*
327 *        Cable special cases
328 */
329
330static const struct dmi_system_id cable_dmi_table[] = {
331        {
332                .ident = "Acer Ferrari 3400",
333                .matches = {
334                        DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
335                        DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
336                },
337        },
338        { }
339};
340
341static int via_cable_override(struct pci_dev *pdev)
342{
343        /* Systems by DMI */
344        if (dmi_check_system(cable_dmi_table))
345                return 1;
346
347        /* Arima W730-K8/Targa Visionary 811/... */
348        if (pdev->subsystem_vendor == 0x161F &&
349            pdev->subsystem_device == 0x2032)
350                return 1;
351
352        return 0;
353}
354
355static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
356{
357        struct pci_dev *pdev = to_pci_dev(hwif->dev);
358        struct ide_host *host = pci_get_drvdata(pdev);
359        struct via82cxxx_dev *vdev = host->host_priv;
360
361        if (via_cable_override(pdev))
362                return ATA_CBL_PATA40_SHORT;
363
364        if ((vdev->via_80w >> hwif->channel) & 1)
365                return ATA_CBL_PATA80;
366        else
367                return ATA_CBL_PATA40;
368}
369
370static const struct ide_port_ops via_port_ops = {
371        .set_pio_mode                = via_set_pio_mode,
372        .set_dma_mode                = via_set_drive,
373        .cable_detect                = via82cxxx_cable_detect,
374};
375
376static const struct ide_port_info via82cxxx_chipset __devinitdata = {
377        .name                = DRV_NAME,
378        .init_chipset        = init_chipset_via82cxxx,
379        .enablebits        = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
380        .port_ops        = &via_port_ops,
381        .host_flags        = IDE_HFLAG_PIO_NO_BLACKLIST |
382                          IDE_HFLAG_POST_SET_MODE |
383                          IDE_HFLAG_IO_32BIT,
384        .pio_mask        = ATA_PIO5,
385        .swdma_mask        = ATA_SWDMA2,
386        .mwdma_mask        = ATA_MWDMA2,
387};
388
389static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
390{
391        struct pci_dev *isa = NULL;
392        struct via_isa_bridge *via_config;
393        struct via82cxxx_dev *vdev;
394        int rc;
395        u8 idx = id->driver_data;
396        struct ide_port_info d;
397
398        d = via82cxxx_chipset;
399
400        /*
401         * Find the ISA bridge and check we know what it is.
402         */
403        via_config = via_config_find(&isa);
404        if (!via_config->id) {
405                printk(KERN_WARNING DRV_NAME " %s: unknown chipset, skipping\n",
406                        pci_name(dev));
407                return -ENODEV;
408        }
409
410        /*
411         * Print the boot message.
412         */
413        printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
414                pci_name(dev), via_config->name, isa->revision,
415                via_config->udma_mask ? "U" : "MW",
416                via_dma[via_config->udma_mask ?
417                        (fls(via_config->udma_mask) - 1) : 0]);
418
419        pci_dev_put(isa);
420
421        /*
422         * Determine system bus clock.
423         */
424        via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
425
426        switch (via_clock) {
427        case 33000: via_clock = 33333; break;
428        case 37000: via_clock = 37500; break;
429        case 41000: via_clock = 41666; break;
430        }
431
432        if (via_clock < 20000 || via_clock > 50000) {
433                printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
434                        "impossible (%d), using 33 MHz instead.\n", via_clock);
435                printk(KERN_WARNING DRV_NAME ": Use ide0=ata66 if you want "
436                        "to assume 80-wire cable.\n");
437                via_clock = 33333;
438        }
439
440        if (idx == 0)
441                d.host_flags |= IDE_HFLAG_NO_AUTODMA;
442        else
443                d.enablebits[1].reg = d.enablebits[0].reg = 0;
444
445        if ((via_config->flags & VIA_NO_UNMASK) == 0)
446                d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
447
448#ifdef CONFIG_PPC_CHRP
449        if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
450                d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
451#endif
452
453        d.udma_mask = via_config->udma_mask;
454
455        vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
456        if (!vdev) {
457                printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
458                        pci_name(dev));
459                return -ENOMEM;
460        }
461
462        vdev->via_config = via_config;
463
464        rc = ide_pci_init_one(dev, &d, vdev);
465        if (rc)
466                kfree(vdev);
467
468        return rc;
469}
470
471static void __devexit via_remove(struct pci_dev *dev)
472{
473        struct ide_host *host = pci_get_drvdata(dev);
474        struct via82cxxx_dev *vdev = host->host_priv;
475
476        ide_pci_remove(dev);
477        kfree(vdev);
478}
479
480static const struct pci_device_id via_pci_tbl[] = {
481        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1),  0 },
482        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1),  0 },
483        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
484        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410),      1 },
485        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
486        { 0, },
487};
488MODULE_DEVICE_TABLE(pci, via_pci_tbl);
489
490static struct pci_driver via_pci_driver = {
491        .name                 = "VIA_IDE",
492        .id_table         = via_pci_tbl,
493        .probe                 = via_init_one,
494        .remove                = __devexit_p(via_remove),
495        .suspend        = ide_pci_suspend,
496        .resume                = ide_pci_resume,
497};
498
499static int __init via_ide_init(void)
500{
501        return ide_pci_register_driver(&via_pci_driver);
502}
503
504static void __exit via_ide_exit(void)
505{
506        pci_unregister_driver(&via_pci_driver);
507}
508
509module_init(via_ide_init);
510module_exit(via_ide_exit);
511
512MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
513MODULE_DESCRIPTION("PCI driver module for VIA IDE");
514MODULE_LICENSE("GPL");
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