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16#include <linux/init.h>
17#include <linux/firmware.h>
18#include <linux/etherdevice.h>
19
20#include <net/mac80211.h>
21
22#include "p54.h"
23#include "p54common.h"
24
25MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26MODULE_DESCRIPTION("Softmac Prism54 common code");
27MODULE_LICENSE("GPL");
28MODULE_ALIAS("prism54common");
29
30static struct ieee80211_rate p54_bgrates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
43};
44
45static struct ieee80211_channel p54_bgchannels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
60};
61
62static struct ieee80211_supported_band band_2GHz = {
63 .channels = p54_bgchannels,
64 .n_channels = ARRAY_SIZE(p54_bgchannels),
65 .bitrates = p54_bgrates,
66 .n_bitrates = ARRAY_SIZE(p54_bgrates),
67};
68
69static struct ieee80211_rate p54_arates[] = {
70 { .bitrate = 60, .hw_value = 4, },
71 { .bitrate = 90, .hw_value = 5, },
72 { .bitrate = 120, .hw_value = 6, },
73 { .bitrate = 180, .hw_value = 7, },
74 { .bitrate = 240, .hw_value = 8, },
75 { .bitrate = 360, .hw_value = 9, },
76 { .bitrate = 480, .hw_value = 10, },
77 { .bitrate = 540, .hw_value = 11, },
78};
79
80static struct ieee80211_channel p54_achannels[] = {
81 { .center_freq = 4920 },
82 { .center_freq = 4940 },
83 { .center_freq = 4960 },
84 { .center_freq = 4980 },
85 { .center_freq = 5040 },
86 { .center_freq = 5060 },
87 { .center_freq = 5080 },
88 { .center_freq = 5170 },
89 { .center_freq = 5180 },
90 { .center_freq = 5190 },
91 { .center_freq = 5200 },
92 { .center_freq = 5210 },
93 { .center_freq = 5220 },
94 { .center_freq = 5230 },
95 { .center_freq = 5240 },
96 { .center_freq = 5260 },
97 { .center_freq = 5280 },
98 { .center_freq = 5300 },
99 { .center_freq = 5320 },
100 { .center_freq = 5500 },
101 { .center_freq = 5520 },
102 { .center_freq = 5540 },
103 { .center_freq = 5560 },
104 { .center_freq = 5580 },
105 { .center_freq = 5600 },
106 { .center_freq = 5620 },
107 { .center_freq = 5640 },
108 { .center_freq = 5660 },
109 { .center_freq = 5680 },
110 { .center_freq = 5700 },
111 { .center_freq = 5745 },
112 { .center_freq = 5765 },
113 { .center_freq = 5785 },
114 { .center_freq = 5805 },
115 { .center_freq = 5825 },
116};
117
118static struct ieee80211_supported_band band_5GHz = {
119 .channels = p54_achannels,
120 .n_channels = ARRAY_SIZE(p54_achannels),
121 .bitrates = p54_arates,
122 .n_bitrates = ARRAY_SIZE(p54_arates),
123};
124
125int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
126{
127 struct p54_common *priv = dev->priv;
128 struct bootrec_exp_if *exp_if;
129 struct bootrec *bootrec;
130 u32 *data = (u32 *)fw->data;
131 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
132 u8 *fw_version = NULL;
133 size_t len;
134 int i;
135
136 if (priv->rx_start)
137 return 0;
138
139 while (data < end_data && *data)
140 data++;
141
142 while (data < end_data && !*data)
143 data++;
144
145 bootrec = (struct bootrec *) data;
146
147 while (bootrec->data <= end_data &&
148 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
149 u32 code = le32_to_cpu(bootrec->code);
150 switch (code) {
151 case BR_CODE_COMPONENT_ID:
152 priv->fw_interface = be32_to_cpup((__be32 *)
153 bootrec->data);
154 switch (priv->fw_interface) {
155 case FW_FMAC:
156 printk(KERN_INFO "p54: FreeMAC firmware\n");
157 break;
158 case FW_LM20:
159 printk(KERN_INFO "p54: LM20 firmware\n");
160 break;
161 case FW_LM86:
162 printk(KERN_INFO "p54: LM86 firmware\n");
163 break;
164 case FW_LM87:
165 printk(KERN_INFO "p54: LM87 firmware\n");
166 break;
167 default:
168 printk(KERN_INFO "p54: unknown firmware\n");
169 break;
170 }
171 break;
172 case BR_CODE_COMPONENT_VERSION:
173
174 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
175 fw_version = (unsigned char*)bootrec->data;
176 break;
177 case BR_CODE_DESCR: {
178 struct bootrec_desc *desc =
179 (struct bootrec_desc *)bootrec->data;
180 priv->rx_start = le32_to_cpu(desc->rx_start);
181
182 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
183 priv->headroom = desc->headroom;
184 priv->tailroom = desc->tailroom;
185 if (le32_to_cpu(bootrec->len) == 11)
186 priv->rx_mtu = le16_to_cpu(bootrec->rx_mtu);
187 else
188 priv->rx_mtu = (size_t)
189 0x620 - priv->tx_hdr_len;
190 break;
191 }
192 case BR_CODE_EXPOSED_IF:
193 exp_if = (struct bootrec_exp_if *) bootrec->data;
194 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
195 if (exp_if[i].if_id == cpu_to_le16(0x1a))
196 priv->fw_var = le16_to_cpu(exp_if[i].variant);
197 break;
198 case BR_CODE_DEPENDENT_IF:
199 break;
200 case BR_CODE_END_OF_BRA:
201 case LEGACY_BR_CODE_END_OF_BRA:
202 end_data = NULL;
203 break;
204 default:
205 break;
206 }
207 bootrec = (struct bootrec *)&bootrec->data[len];
208 }
209
210 if (fw_version)
211 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
212 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
213
214 if (priv->fw_var >= 0x300) {
215
216 priv->tx_stats[4].limit = 3;
217 priv->tx_stats[5].limit = 4;
218 priv->tx_stats[6].limit = 3;
219 priv->tx_stats[7].limit = 1;
220 dev->queues = 4;
221 }
222
223 return 0;
224}
225EXPORT_SYMBOL_GPL(p54_parse_firmware);
226
227static int p54_convert_rev0(struct ieee80211_hw *dev,
228 struct pda_pa_curve_data *curve_data)
229{
230 struct p54_common *priv = dev->priv;
231 struct p54_pa_curve_data_sample *dst;
232 struct pda_pa_curve_data_sample_rev0 *src;
233 size_t cd_len = sizeof(*curve_data) +
234 (curve_data->points_per_channel*sizeof(*dst) + 2) *
235 curve_data->channels;
236 unsigned int i, j;
237 void *source, *target;
238
239 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
240 if (!priv->curve_data)
241 return -ENOMEM;
242
243 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
244 source = curve_data->data;
245 target = priv->curve_data->data;
246 for (i = 0; i < curve_data->channels; i++) {
247 __le16 *freq = source;
248 source += sizeof(__le16);
249 *((__le16 *)target) = *freq;
250 target += sizeof(__le16);
251 for (j = 0; j < curve_data->points_per_channel; j++) {
252 dst = target;
253 src = source;
254
255 dst->rf_power = src->rf_power;
256 dst->pa_detector = src->pa_detector;
257 dst->data_64qam = src->pcv;
258
259#define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
260 dst->data_16qam = SUB(src->pcv, 12);
261 dst->data_qpsk = SUB(dst->data_16qam, 12);
262 dst->data_bpsk = SUB(dst->data_qpsk, 12);
263 dst->data_barker = SUB(dst->data_bpsk, 14);
264#undef SUB
265 target += sizeof(*dst);
266 source += sizeof(*src);
267 }
268 }
269
270 return 0;
271}
272
273static int p54_convert_rev1(struct ieee80211_hw *dev,
274 struct pda_pa_curve_data *curve_data)
275{
276 struct p54_common *priv = dev->priv;
277 struct p54_pa_curve_data_sample *dst;
278 struct pda_pa_curve_data_sample_rev1 *src;
279 size_t cd_len = sizeof(*curve_data) +
280 (curve_data->points_per_channel*sizeof(*dst) + 2) *
281 curve_data->channels;
282 unsigned int i, j;
283 void *source, *target;
284
285 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
286 if (!priv->curve_data)
287 return -ENOMEM;
288
289 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
290 source = curve_data->data;
291 target = priv->curve_data->data;
292 for (i = 0; i < curve_data->channels; i++) {
293 __le16 *freq = source;
294 source += sizeof(__le16);
295 *((__le16 *)target) = *freq;
296 target += sizeof(__le16);
297 for (j = 0; j < curve_data->points_per_channel; j++) {
298 memcpy(target, source, sizeof(*src));
299
300 target += sizeof(*dst);
301 source += sizeof(*src);
302 }
303 source++;
304 }
305
306 return 0;
307}
308
309static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
310 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
311static int p54_init_xbow_synth(struct ieee80211_hw *dev);
312
313static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
314{
315 struct p54_common *priv = dev->priv;
316 struct eeprom_pda_wrap *wrap = NULL;
317 struct pda_entry *entry;
318 unsigned int data_len, entry_len;
319 void *tmp;
320 int err;
321 u8 *end = (u8 *)eeprom + len;
322 u16 synth = 0;
323 DECLARE_MAC_BUF(mac);
324
325 wrap = (struct eeprom_pda_wrap *) eeprom;
326 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
327
328
329 while ((u8 *)entry <= end - sizeof(*entry)) {
330 entry_len = le16_to_cpu(entry->len);
331 data_len = ((entry_len - 1) << 1);
332
333
334 if ((u8 *)entry + sizeof(*entry) + data_len > end)
335 break;
336
337 switch (le16_to_cpu(entry->code)) {
338 case PDR_MAC_ADDRESS:
339 SET_IEEE80211_PERM_ADDR(dev, entry->data);
340 break;
341 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
342 if (data_len < 2) {
343 err = -EINVAL;
344 goto err;
345 }
346
347 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
348 err = -EINVAL;
349 goto err;
350 }
351
352 priv->output_limit = kmalloc(entry->data[1] *
353 sizeof(*priv->output_limit), GFP_KERNEL);
354
355 if (!priv->output_limit) {
356 err = -ENOMEM;
357 goto err;
358 }
359
360 memcpy(priv->output_limit, &entry->data[2],
361 entry->data[1]*sizeof(*priv->output_limit));
362 priv->output_limit_len = entry->data[1];
363 break;
364 case PDR_PRISM_PA_CAL_CURVE_DATA: {
365 struct pda_pa_curve_data *curve_data =
366 (struct pda_pa_curve_data *)entry->data;
367 if (data_len < sizeof(*curve_data)) {
368 err = -EINVAL;
369 goto err;
370 }
371
372 switch (curve_data->cal_method_rev) {
373 case 0:
374 err = p54_convert_rev0(dev, curve_data);
375 break;
376 case 1:
377 err = p54_convert_rev1(dev, curve_data);
378 break;
379 default:
380 printk(KERN_ERR "p54: unknown curve data "
381 "revision %d\n",
382 curve_data->cal_method_rev);
383 err = -ENODEV;
384 break;
385 }
386 if (err)
387 goto err;
388
389 }
390 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
391 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
392 if (!priv->iq_autocal) {
393 err = -ENOMEM;
394 goto err;
395 }
396
397 memcpy(priv->iq_autocal, entry->data, data_len);
398 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
399 break;
400 case PDR_INTERFACE_LIST:
401 tmp = entry->data;
402 while ((u8 *)tmp < entry->data + data_len) {
403 struct bootrec_exp_if *exp_if = tmp;
404 if (le16_to_cpu(exp_if->if_id) == 0xf)
405 synth = le16_to_cpu(exp_if->variant);
406 tmp += sizeof(struct bootrec_exp_if);
407 }
408 break;
409 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
410 priv->version = *(u8 *)(entry->data + 1);
411 break;
412 case PDR_END:
413
414 entry_len = len;
415 break;
416 default:
417 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
418 le16_to_cpu(entry->code));
419 break;
420 }
421
422 entry = (void *)entry + (entry_len + 1)*2;
423 }
424
425 if (!synth || !priv->iq_autocal || !priv->output_limit ||
426 !priv->curve_data) {
427 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
428 err = -EINVAL;
429 goto err;
430 }
431
432 priv->rxhw = synth & 0x07;
433 if (priv->rxhw == 4)
434 p54_init_xbow_synth(dev);
435 if (!(synth & 0x40))
436 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
437 if (!(synth & 0x80))
438 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
439
440 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
441 u8 perm_addr[ETH_ALEN];
442
443 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
444 wiphy_name(dev->wiphy));
445 random_ether_addr(perm_addr);
446 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
447 }
448
449 printk(KERN_INFO "%s: hwaddr %s, MAC:isl38%02x RF:%s\n",
450 wiphy_name(dev->wiphy),
451 print_mac(mac, dev->wiphy->perm_addr),
452 priv->version, p54_rf_chips[priv->rxhw]);
453
454 return 0;
455
456 err:
457 if (priv->iq_autocal) {
458 kfree(priv->iq_autocal);
459 priv->iq_autocal = NULL;
460 }
461
462 if (priv->output_limit) {
463 kfree(priv->output_limit);
464 priv->output_limit = NULL;
465 }
466
467 if (priv->curve_data) {
468 kfree(priv->curve_data);
469 priv->curve_data = NULL;
470 }
471
472 printk(KERN_ERR "p54: eeprom parse failed!\n");
473 return err;
474}
475
476static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
477{
478
479 return ((rssi * 0x83) / 64 - 400) / 4;
480}
481
482static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
483{
484 struct p54_common *priv = dev->priv;
485 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
486 struct ieee80211_rx_status rx_status = {0};
487 u16 freq = le16_to_cpu(hdr->freq);
488 size_t header_len = sizeof(*hdr);
489 u32 tsf32;
490
491 if (!(hdr->magic & cpu_to_le16(0x0001))) {
492 if (priv->filter_flags & FIF_FCSFAIL)
493 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
494 else
495 return 0;
496 }
497
498 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
499 rx_status.noise = priv->noise;
500
501 rx_status.qual = (100 * hdr->rssi) / 127;
502 rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
503 hdr->rate : (hdr->rate - 4)) & 0xf;
504 rx_status.freq = freq;
505 rx_status.band = dev->conf.channel->band;
506 rx_status.antenna = hdr->antenna;
507
508 tsf32 = le32_to_cpu(hdr->tsf32);
509 if (tsf32 < priv->tsf_low32)
510 priv->tsf_high32++;
511 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
512 priv->tsf_low32 = tsf32;
513
514 rx_status.flag |= RX_FLAG_TSFT;
515
516 if (hdr->magic & cpu_to_le16(0x4000))
517 header_len += hdr->align[0];
518
519 skb_pull(skb, header_len);
520 skb_trim(skb, le16_to_cpu(hdr->len));
521
522 ieee80211_rx_irqsafe(dev, skb, &rx_status);
523
524 return -1;
525}
526
527static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
528{
529 struct p54_common *priv = dev->priv;
530 int i;
531
532 for (i = 0; i < dev->queues; i++)
533 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
534 ieee80211_wake_queue(dev, i);
535}
536
537static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
538{
539 struct p54_common *priv = dev->priv;
540 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
541 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
542 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
543 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
544 struct memrecord *range = NULL;
545 u32 freed = 0;
546 u32 last_addr = priv->rx_start;
547 unsigned long flags;
548
549 spin_lock_irqsave(&priv->tx_queue.lock, flags);
550 while (entry != (struct sk_buff *)&priv->tx_queue) {
551 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
552 range = (void *)info->driver_data;
553 if (range->start_addr == addr) {
554 struct p54_control_hdr *entry_hdr;
555 struct p54_tx_control_allocdata *entry_data;
556 int pad = 0;
557
558 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
559 struct ieee80211_tx_info *ni;
560 struct memrecord *mr;
561
562 ni = IEEE80211_SKB_CB(entry->next);
563 mr = (struct memrecord *)ni->driver_data;
564 freed = mr->start_addr - last_addr;
565 } else
566 freed = priv->rx_end - last_addr;
567
568 last_addr = range->end_addr;
569 __skb_unlink(entry, &priv->tx_queue);
570 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
571
572 memset(&info->status, 0, sizeof(info->status));
573 entry_hdr = (struct p54_control_hdr *) entry->data;
574 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
575 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
576 pad = entry_data->align[0];
577
578 priv->tx_stats[entry_data->hw_queue].len--;
579 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
580 if (!(payload->status & 0x01))
581 info->flags |= IEEE80211_TX_STAT_ACK;
582 else
583 info->status.excessive_retries = 1;
584 }
585 info->status.retry_count = payload->retries - 1;
586 info->status.ack_signal = p54_rssi_to_dbm(dev,
587 le16_to_cpu(payload->ack_rssi));
588 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
589 ieee80211_tx_status_irqsafe(dev, entry);
590 goto out;
591 } else
592 last_addr = range->end_addr;
593 entry = entry->next;
594 }
595 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
596
597out:
598 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
599 sizeof(struct p54_control_hdr))
600 p54_wake_free_queues(dev);
601}
602
603static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
604 struct sk_buff *skb)
605{
606 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
607 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
608 struct p54_common *priv = dev->priv;
609
610 if (!priv->eeprom)
611 return ;
612
613 memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
614
615 complete(&priv->eeprom_comp);
616}
617
618static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
619{
620 struct p54_common *priv = dev->priv;
621 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
622 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
623 u32 tsf32 = le32_to_cpu(stats->tsf32);
624
625 if (tsf32 < priv->tsf_low32)
626 priv->tsf_high32++;
627 priv->tsf_low32 = tsf32;
628
629 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
630 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
631 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
632
633 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
634 complete(&priv->stats_comp);
635
636 mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
637}
638
639static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
640{
641 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
642
643 switch (le16_to_cpu(hdr->type)) {
644 case P54_CONTROL_TYPE_TXDONE:
645 p54_rx_frame_sent(dev, skb);
646 break;
647 case P54_CONTROL_TYPE_BBP:
648 break;
649 case P54_CONTROL_TYPE_STAT_READBACK:
650 p54_rx_stats(dev, skb);
651 break;
652 case P54_CONTROL_TYPE_EEPROM_READBACK:
653 p54_rx_eeprom_readback(dev, skb);
654 break;
655 default:
656 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
657 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
658 break;
659 }
660
661 return 0;
662}
663
664
665int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
666{
667 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
668
669 if (type == 0x80)
670 return p54_rx_control(dev, skb);
671 else
672 return p54_rx_data(dev, skb);
673}
674EXPORT_SYMBOL_GPL(p54_rx);
675
676
677
678
679
680
681
682
683
684
685static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
686 struct p54_control_hdr *data, u32 len)
687{
688 struct p54_common *priv = dev->priv;
689 struct sk_buff *entry = priv->tx_queue.next;
690 struct sk_buff *target_skb = NULL;
691 u32 last_addr = priv->rx_start;
692 u32 largest_hole = 0;
693 u32 target_addr = priv->rx_start;
694 unsigned long flags;
695 unsigned int left;
696 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
697
698 spin_lock_irqsave(&priv->tx_queue.lock, flags);
699 left = skb_queue_len(&priv->tx_queue);
700 while (left--) {
701 u32 hole_size;
702 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
703 struct memrecord *range = (void *)info->driver_data;
704 hole_size = range->start_addr - last_addr;
705 if (!target_skb && hole_size >= len) {
706 target_skb = entry->prev;
707 hole_size -= len;
708 target_addr = last_addr;
709 }
710 largest_hole = max(largest_hole, hole_size);
711 last_addr = range->end_addr;
712 entry = entry->next;
713 }
714 if (!target_skb && priv->rx_end - last_addr >= len) {
715 target_skb = priv->tx_queue.prev;
716 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
717 if (!skb_queue_empty(&priv->tx_queue)) {
718 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
719 struct memrecord *range = (void *)info->driver_data;
720 target_addr = range->end_addr;
721 }
722 } else
723 largest_hole = max(largest_hole, priv->rx_end - last_addr);
724
725 if (skb) {
726 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
727 struct memrecord *range = (void *)info->driver_data;
728 range->start_addr = target_addr;
729 range->end_addr = target_addr + len;
730 __skb_queue_after(&priv->tx_queue, target_skb, skb);
731 if (largest_hole < priv->rx_mtu + priv->headroom +
732 priv->tailroom +
733 sizeof(struct p54_control_hdr))
734 ieee80211_stop_queues(dev);
735 }
736 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
737
738 data->req_id = cpu_to_le32(target_addr + priv->headroom);
739}
740
741int p54_read_eeprom(struct ieee80211_hw *dev)
742{
743 struct p54_common *priv = dev->priv;
744 struct p54_control_hdr *hdr = NULL;
745 struct p54_eeprom_lm86 *eeprom_hdr;
746 size_t eeprom_size = 0x2020, offset = 0, blocksize;
747 int ret = -ENOMEM;
748 void *eeprom = NULL;
749
750 hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
751 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
752 if (!hdr)
753 goto free;
754
755 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
756 if (!priv->eeprom)
757 goto free;
758
759 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
760 if (!eeprom)
761 goto free;
762
763 hdr->magic1 = cpu_to_le16(0x8000);
764 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
765 hdr->retry1 = hdr->retry2 = 0;
766 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
767
768 while (eeprom_size) {
769 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
770 hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
771 eeprom_hdr->offset = cpu_to_le16(offset);
772 eeprom_hdr->len = cpu_to_le16(blocksize);
773 p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
774 sizeof(*hdr));
775 priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
776
777 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
778 printk(KERN_ERR "%s: device does not respond!\n",
779 wiphy_name(dev->wiphy));
780 ret = -EBUSY;
781 goto free;
782 }
783
784 memcpy(eeprom + offset, priv->eeprom, blocksize);
785 offset += blocksize;
786 eeprom_size -= blocksize;
787 }
788
789 ret = p54_parse_eeprom(dev, eeprom, offset);
790free:
791 kfree(priv->eeprom);
792 priv->eeprom = NULL;
793 kfree(hdr);
794 kfree(eeprom);
795
796 return ret;
797}
798EXPORT_SYMBOL_GPL(p54_read_eeprom);
799
800static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
801{
802 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
803 struct ieee80211_tx_queue_stats *current_queue;
804 struct p54_common *priv = dev->priv;
805 struct p54_control_hdr *hdr;
806 struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
807 struct p54_tx_control_allocdata *txhdr;
808 size_t padding, len;
809 u8 rate;
810 u8 cts_rate = 0x20;
811
812 current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
813 if (unlikely(current_queue->len > current_queue->limit))
814 return NETDEV_TX_BUSY;
815 current_queue->len++;
816 current_queue->count++;
817 if (current_queue->len == current_queue->limit)
818 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
819
820 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
821 len = skb->len;
822
823 txhdr = (struct p54_tx_control_allocdata *)
824 skb_push(skb, sizeof(*txhdr) + padding);
825 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
826
827 if (padding)
828 hdr->magic1 = cpu_to_le16(0x4010);
829 else
830 hdr->magic1 = cpu_to_le16(0x0010);
831 hdr->len = cpu_to_le16(len);
832 hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
833 hdr->retry1 = hdr->retry2 = info->control.retry_limit;
834
835
836 rate = ieee80211_get_tx_rate(dev, info)->hw_value;
837 if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
838 rate |= 0x10;
839 cts_rate |= 0x10;
840 }
841 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
842 rate |= 0x40;
843 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
844 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
845 rate |= 0x20;
846 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
847 }
848 memset(txhdr->rateset, rate, 8);
849 txhdr->key_type = 0;
850 txhdr->key_len = 0;
851 txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
852 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
853 2 : info->antenna_sel_tx - 1;
854 txhdr->output_power = priv->output_power;
855 txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
856 0 : cts_rate;
857 if (padding)
858 txhdr->align[0] = padding;
859
860
861
862
863
864
865
866
867 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
868 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
869 priv->seqno += 0x10;
870 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
871 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
872 }
873
874 p54_assign_address(dev, skb, hdr, skb->len);
875
876 priv->tx(dev, hdr, skb->len, 0);
877 return 0;
878}
879
880static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
881 const u8 *bssid)
882{
883 struct p54_common *priv = dev->priv;
884 struct p54_control_hdr *hdr;
885 struct p54_tx_control_filter *filter;
886 size_t data_len;
887
888 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
889 priv->tx_hdr_len, GFP_ATOMIC);
890 if (!hdr)
891 return -ENOMEM;
892
893 hdr = (void *)hdr + priv->tx_hdr_len;
894
895 filter = (struct p54_tx_control_filter *) hdr->data;
896 hdr->magic1 = cpu_to_le16(0x8001);
897 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
898
899 priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
900 memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
901 if (!bssid)
902 memset(filter->bssid, ~0, ETH_ALEN);
903 else
904 memcpy(filter->bssid, bssid, ETH_ALEN);
905
906 filter->rx_antenna = priv->rx_antenna;
907
908 if (priv->fw_var < 0x500) {
909 data_len = P54_TX_CONTROL_FILTER_V1_LEN;
910 filter->v1.basic_rate_mask = cpu_to_le32(0x15F);
911 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
912 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
913 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
914 filter->v1.wakeup_timer = cpu_to_le16(500);
915 } else {
916 data_len = P54_TX_CONTROL_FILTER_V2_LEN;
917 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
918 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
919 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
920 filter->v2.timer = cpu_to_le16(1000);
921 }
922
923 hdr->len = cpu_to_le16(data_len);
924 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
925 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
926 return 0;
927}
928
929static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
930{
931 struct p54_common *priv = dev->priv;
932 struct p54_control_hdr *hdr;
933 struct p54_tx_control_channel *chan;
934 unsigned int i;
935 size_t data_len;
936 void *entry;
937
938 hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
939 priv->tx_hdr_len, GFP_KERNEL);
940 if (!hdr)
941 return -ENOMEM;
942
943 hdr = (void *)hdr + priv->tx_hdr_len;
944
945 chan = (struct p54_tx_control_channel *) hdr->data;
946
947 hdr->magic1 = cpu_to_le16(0x8001);
948
949 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
950
951 chan->flags = cpu_to_le16(0x1);
952 chan->dwell = cpu_to_le16(0x0);
953
954 for (i = 0; i < priv->iq_autocal_len; i++) {
955 if (priv->iq_autocal[i].freq != freq)
956 continue;
957
958 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
959 sizeof(*priv->iq_autocal));
960 break;
961 }
962 if (i == priv->iq_autocal_len)
963 goto err;
964
965 for (i = 0; i < priv->output_limit_len; i++) {
966 if (priv->output_limit[i].freq != freq)
967 continue;
968
969 chan->val_barker = 0x38;
970 chan->val_bpsk = chan->dup_bpsk =
971 priv->output_limit[i].val_bpsk;
972 chan->val_qpsk = chan->dup_qpsk =
973 priv->output_limit[i].val_qpsk;
974 chan->val_16qam = chan->dup_16qam =
975 priv->output_limit[i].val_16qam;
976 chan->val_64qam = chan->dup_64qam =
977 priv->output_limit[i].val_64qam;
978 break;
979 }
980 if (i == priv->output_limit_len)
981 goto err;
982
983 entry = priv->curve_data->data;
984 for (i = 0; i < priv->curve_data->channels; i++) {
985 if (*((__le16 *)entry) != freq) {
986 entry += sizeof(__le16);
987 entry += sizeof(struct p54_pa_curve_data_sample) *
988 priv->curve_data->points_per_channel;
989 continue;
990 }
991
992 entry += sizeof(__le16);
993 chan->pa_points_per_curve =
994 min(priv->curve_data->points_per_channel, (u8) 8);
995
996 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
997 chan->pa_points_per_curve);
998 break;
999 }
1000
1001 if (priv->fw_var < 0x500) {
1002 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
1003 chan->v1.rssical_mul = cpu_to_le16(130);
1004 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1005 } else {
1006 data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
1007 chan->v2.rssical_mul = cpu_to_le16(130);
1008 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1009 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1010 }
1011
1012 hdr->len = cpu_to_le16(data_len);
1013 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
1014 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
1015 return 0;
1016
1017 err:
1018 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1019 kfree(hdr);
1020 return -EINVAL;
1021}
1022
1023static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1024{
1025 struct p54_common *priv = dev->priv;
1026 struct p54_control_hdr *hdr;
1027 struct p54_tx_control_led *led;
1028
1029 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
1030 priv->tx_hdr_len, GFP_KERNEL);
1031 if (!hdr)
1032 return -ENOMEM;
1033
1034 hdr = (void *)hdr + priv->tx_hdr_len;
1035 hdr->magic1 = cpu_to_le16(0x8001);
1036 hdr->len = cpu_to_le16(sizeof(*led));
1037 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
1038 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
1039
1040 led = (struct p54_tx_control_led *) hdr->data;
1041 led->mode = cpu_to_le16(mode);
1042 led->led_permanent = cpu_to_le16(link);
1043 led->led_temporary = cpu_to_le16(act);
1044 led->duration = cpu_to_le16(1000);
1045
1046 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
1047
1048 return 0;
1049}
1050
1051#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1052do { \
1053 queue.aifs = cpu_to_le16(ai_fs); \
1054 queue.cwmin = cpu_to_le16(cw_min); \
1055 queue.cwmax = cpu_to_le16(cw_max); \
1056 queue.txop = cpu_to_le16(_txop); \
1057} while(0)
1058
1059static void p54_init_vdcf(struct ieee80211_hw *dev)
1060{
1061 struct p54_common *priv = dev->priv;
1062 struct p54_control_hdr *hdr;
1063 struct p54_tx_control_vdcf *vdcf;
1064
1065
1066 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1067 hdr->magic1 = cpu_to_le16(0x8001);
1068 hdr->len = cpu_to_le16(sizeof(*vdcf));
1069 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
1070 hdr->req_id = cpu_to_le32(priv->rx_start);
1071
1072 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1073
1074 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
1075 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
1076 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
1077 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
1078}
1079
1080static void p54_set_vdcf(struct ieee80211_hw *dev)
1081{
1082 struct p54_common *priv = dev->priv;
1083 struct p54_control_hdr *hdr;
1084 struct p54_tx_control_vdcf *vdcf;
1085
1086 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1087
1088 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
1089
1090 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1091
1092 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
1093 vdcf->slottime = 9;
1094 vdcf->magic1 = 0x10;
1095 vdcf->magic2 = 0x00;
1096 } else {
1097 vdcf->slottime = 20;
1098 vdcf->magic1 = 0x0a;
1099 vdcf->magic2 = 0x06;
1100 }
1101
1102
1103 vdcf->frameburst = cpu_to_le16(0);
1104
1105 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
1106}
1107
1108static int p54_start(struct ieee80211_hw *dev)
1109{
1110 struct p54_common *priv = dev->priv;
1111 int err;
1112
1113 if (!priv->cached_vdcf) {
1114 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
1115 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1116 GFP_KERNEL);
1117
1118 if (!priv->cached_vdcf)
1119 return -ENOMEM;
1120 }
1121
1122 if (!priv->cached_stats) {
1123 priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
1124 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1125 GFP_KERNEL);
1126
1127 if (!priv->cached_stats) {
1128 kfree(priv->cached_vdcf);
1129 priv->cached_vdcf = NULL;
1130 return -ENOMEM;
1131 }
1132 }
1133
1134 err = priv->open(dev);
1135 if (!err)
1136 priv->mode = NL80211_IFTYPE_MONITOR;
1137
1138 p54_init_vdcf(dev);
1139
1140 mod_timer(&priv->stats_timer, jiffies + HZ);
1141 return err;
1142}
1143
1144static void p54_stop(struct ieee80211_hw *dev)
1145{
1146 struct p54_common *priv = dev->priv;
1147 struct sk_buff *skb;
1148
1149 del_timer(&priv->stats_timer);
1150 while ((skb = skb_dequeue(&priv->tx_queue)))
1151 kfree_skb(skb);
1152 priv->stop(dev);
1153 priv->tsf_high32 = priv->tsf_low32 = 0;
1154 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1155}
1156
1157static int p54_add_interface(struct ieee80211_hw *dev,
1158 struct ieee80211_if_init_conf *conf)
1159{
1160 struct p54_common *priv = dev->priv;
1161
1162 if (priv->mode != NL80211_IFTYPE_MONITOR)
1163 return -EOPNOTSUPP;
1164
1165 switch (conf->type) {
1166 case NL80211_IFTYPE_STATION:
1167 priv->mode = conf->type;
1168 break;
1169 default:
1170 return -EOPNOTSUPP;
1171 }
1172
1173 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1174
1175 p54_set_filter(dev, 0, NULL);
1176
1177 switch (conf->type) {
1178 case NL80211_IFTYPE_STATION:
1179 p54_set_filter(dev, 1, NULL);
1180 break;
1181 default:
1182 BUG();
1183 break;
1184 }
1185
1186 p54_set_leds(dev, 1, 0, 0);
1187
1188 return 0;
1189}
1190
1191static void p54_remove_interface(struct ieee80211_hw *dev,
1192 struct ieee80211_if_init_conf *conf)
1193{
1194 struct p54_common *priv = dev->priv;
1195 priv->mode = NL80211_IFTYPE_MONITOR;
1196 memset(priv->mac_addr, 0, ETH_ALEN);
1197 p54_set_filter(dev, 0, NULL);
1198}
1199
1200static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
1201{
1202 int ret;
1203 struct p54_common *priv = dev->priv;
1204
1205 mutex_lock(&priv->conf_mutex);
1206 priv->rx_antenna = (conf->antenna_sel_rx == 0) ?
1207 2 : conf->antenna_sel_tx - 1;
1208 priv->output_power = conf->power_level << 2;
1209 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1210 p54_set_vdcf(dev);
1211 mutex_unlock(&priv->conf_mutex);
1212 return ret;
1213}
1214
1215static int p54_config_interface(struct ieee80211_hw *dev,
1216 struct ieee80211_vif *vif,
1217 struct ieee80211_if_conf *conf)
1218{
1219 struct p54_common *priv = dev->priv;
1220
1221 mutex_lock(&priv->conf_mutex);
1222 p54_set_filter(dev, 0, conf->bssid);
1223 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1224 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1225 mutex_unlock(&priv->conf_mutex);
1226 return 0;
1227}
1228
1229static void p54_configure_filter(struct ieee80211_hw *dev,
1230 unsigned int changed_flags,
1231 unsigned int *total_flags,
1232 int mc_count, struct dev_mc_list *mclist)
1233{
1234 struct p54_common *priv = dev->priv;
1235
1236 *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1237 FIF_PROMISC_IN_BSS |
1238 FIF_FCSFAIL;
1239
1240 priv->filter_flags = *total_flags;
1241
1242 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1243 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1244 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1245 NULL);
1246 else
1247 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1248 priv->bssid);
1249 }
1250
1251 if (changed_flags & FIF_PROMISC_IN_BSS) {
1252 if (*total_flags & FIF_PROMISC_IN_BSS)
1253 p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1254 0x8, NULL);
1255 else
1256 p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1257 ~0x8, priv->bssid);
1258 }
1259}
1260
1261static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1262 const struct ieee80211_tx_queue_params *params)
1263{
1264 struct p54_common *priv = dev->priv;
1265 struct p54_tx_control_vdcf *vdcf;
1266
1267 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
1268 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
1269
1270 if ((params) && !(queue > 4)) {
1271 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
1272 params->cw_min, params->cw_max, params->txop);
1273 } else
1274 return -EINVAL;
1275
1276 p54_set_vdcf(dev);
1277
1278 return 0;
1279}
1280
1281static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1282{
1283 struct p54_common *priv = dev->priv;
1284 struct p54_control_hdr *hdr;
1285 struct p54_tx_control_xbow_synth *xbow;
1286
1287 hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
1288 priv->tx_hdr_len, GFP_KERNEL);
1289 if (!hdr)
1290 return -ENOMEM;
1291
1292 hdr = (void *)hdr + priv->tx_hdr_len;
1293 hdr->magic1 = cpu_to_le16(0x8001);
1294 hdr->len = cpu_to_le16(sizeof(*xbow));
1295 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
1296 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
1297
1298 xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
1299 xbow->magic1 = cpu_to_le16(0x1);
1300 xbow->magic2 = cpu_to_le16(0x2);
1301 xbow->freq = cpu_to_le16(5390);
1302
1303 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
1304
1305 return 0;
1306}
1307
1308static void p54_statistics_timer(unsigned long data)
1309{
1310 struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1311 struct p54_common *priv = dev->priv;
1312 struct p54_control_hdr *hdr;
1313 struct p54_statistics *stats;
1314
1315 BUG_ON(!priv->cached_stats);
1316
1317 hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
1318 hdr->magic1 = cpu_to_le16(0x8000);
1319 hdr->len = cpu_to_le16(sizeof(*stats));
1320 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
1321 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
1322
1323 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
1324}
1325
1326static int p54_get_stats(struct ieee80211_hw *dev,
1327 struct ieee80211_low_level_stats *stats)
1328{
1329 struct p54_common *priv = dev->priv;
1330
1331 del_timer(&priv->stats_timer);
1332 p54_statistics_timer((unsigned long)dev);
1333
1334 if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1335 printk(KERN_ERR "%s: device does not respond!\n",
1336 wiphy_name(dev->wiphy));
1337 return -EBUSY;
1338 }
1339
1340 memcpy(stats, &priv->stats, sizeof(*stats));
1341
1342 return 0;
1343}
1344
1345static int p54_get_tx_stats(struct ieee80211_hw *dev,
1346 struct ieee80211_tx_queue_stats *stats)
1347{
1348 struct p54_common *priv = dev->priv;
1349
1350 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1351
1352 return 0;
1353}
1354
1355static const struct ieee80211_ops p54_ops = {
1356 .tx = p54_tx,
1357 .start = p54_start,
1358 .stop = p54_stop,
1359 .add_interface = p54_add_interface,
1360 .remove_interface = p54_remove_interface,
1361 .config = p54_config,
1362 .config_interface = p54_config_interface,
1363 .configure_filter = p54_configure_filter,
1364 .conf_tx = p54_conf_tx,
1365 .get_stats = p54_get_stats,
1366 .get_tx_stats = p54_get_tx_stats
1367};
1368
1369struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1370{
1371 struct ieee80211_hw *dev;
1372 struct p54_common *priv;
1373
1374 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1375 if (!dev)
1376 return NULL;
1377
1378 priv = dev->priv;
1379 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1380 skb_queue_head_init(&priv->tx_queue);
1381 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1382 IEEE80211_HW_RX_INCLUDES_FCS |
1383 IEEE80211_HW_SIGNAL_DBM |
1384 IEEE80211_HW_NOISE_DBM;
1385
1386 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1387
1388 dev->channel_change_time = 1000;
1389
1390 priv->tx_stats[0].limit = 1;
1391 priv->tx_stats[1].limit = 1;
1392 priv->tx_stats[2].limit = 1;
1393 priv->tx_stats[3].limit = 1;
1394 priv->tx_stats[4].limit = 5;
1395 dev->queues = 1;
1396 priv->noise = -94;
1397 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1398 sizeof(struct p54_tx_control_allocdata);
1399
1400 mutex_init(&priv->conf_mutex);
1401 init_completion(&priv->eeprom_comp);
1402 init_completion(&priv->stats_comp);
1403 setup_timer(&priv->stats_timer, p54_statistics_timer,
1404 (unsigned long)dev);
1405
1406 return dev;
1407}
1408EXPORT_SYMBOL_GPL(p54_init_common);
1409
1410void p54_free_common(struct ieee80211_hw *dev)
1411{
1412 struct p54_common *priv = dev->priv;
1413 kfree(priv->cached_stats);
1414 kfree(priv->iq_autocal);
1415 kfree(priv->output_limit);
1416 kfree(priv->curve_data);
1417 kfree(priv->cached_vdcf);
1418}
1419EXPORT_SYMBOL_GPL(p54_free_common);
1420
1421static int __init p54_init(void)
1422{
1423 return 0;
1424}
1425
1426static void __exit p54_exit(void)
1427{
1428}
1429
1430module_init(p54_init);
1431module_exit(p54_exit);