392 break;
393
394 case 4:
395 inb(RBR(dev->base_addr));
396 break;
397
398 case 2:
399
400
401
402 if (hdlcdrv_ptt(&bc->hdrv))
403 ser12_tx(dev, bc);
404 else {
405 ser12_rx(dev, bc);
406 bc->modem.arb_divider--;
407 }
408 outb(0x00, THR(dev->base_addr));
409 break;
410
411 default:
412 inb(MSR(dev->base_addr));
413 break;
414 }
415 iir = inb(IIR(dev->base_addr));
416 } while (!(iir & 1));
417 if (bc->modem.arb_divider <= 0) {
418 bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
419 local_irq_enable();
420 hdlcdrv_arbitrate(dev, &bc->hdrv);
421 }
422 local_irq_enable();
423 hdlcdrv_transmitter(dev, &bc->hdrv);
424 hdlcdrv_receiver(dev, &bc->hdrv);
425 local_irq_disable();
426 return IRQ_HANDLED;
427}
428
429
430
431enum uart { c_uart_unknown, c_uart_8250,
432 c_uart_16450, c_uart_16550, c_uart_16550A};