Unreachable code

|extern int atom_debug;
|
|
|bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
|    struct drm_display_mode *mode);
|
|static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_encoder *clone_encoder;
| uint32_t index_mask = 0;
| int count;
|
|
| if (rdev->family >= CHIP_R600)
|  return index_mask;
|
| if (radeon_encoder->devices & ((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))
|  return index_mask;
|
| if (radeon_encoder->devices & (0x1L << 0x00000007 ))
|  return index_mask;
|
| count = -1;
| for (clone_encoder = ({ const typeof( ((typeof(*clone_encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*clone_encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(clone_encoder->head.next), &clone_encoder->head != (&dev->mode_config.encoder_list); clone_encoder = ({ const typeof( ((typeof(*clone_encoder) *)0)->head ) *__mptr = (clone_encoder->head.next); (typeof(*clone_encoder) *)( (char *)__mptr - 1 );})) {
|  struct radeon_encoder *radeon_clone = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (clone_encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|  count++;
|
|  if (clone_encoder == encoder)
|   continue;
|  if (radeon_clone->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 ))))
|   continue;
|  if (radeon_clone->devices & (0x1L << 0x00000007 ))
|   continue;
|  else
|   index_mask |= (1 << count);
| }
| return index_mask;
|}
|
|void radeon_setup_encoder_clones(struct drm_device *dev)
|{
| struct drm_encoder *encoder;
|
| for (encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(encoder->head.next), &encoder->head != (&dev->mode_config.encoder_list); encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = (encoder->head.next); (typeof(*encoder) *)( (char *)__mptr - 1 );})) {
|  encoder->possible_clones = radeon_encoder_clones(encoder);
| }
|}
|
|uint32_t
|radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
|{
| struct radeon_device *rdev = dev->dev_private;
| uint32_t ret = 0;
|
| switch (supported_device) {
| case (0x1L << 0x00000000 ):
| case (0x1L << 0x00000002 ):
| case (0x1L << 0x00000006):
| case (0x1L << 0x00000004 ):
| case (0x1L << 0x00000008 ):
|  switch (dac) {
|  case 1:
|   if ((rdev->family == CHIP_RS300) ||
|       (rdev->family == CHIP_RS400) ||
|       (rdev->family == CHIP_RS480))
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x05 << 0x00);
|   else if (((rdev->family >= CHIP_RS600)))
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x15 << 0x00);
|   else
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x04 << 0x00);
|   break;
|  case 2:
|   if (((rdev->family >= CHIP_RS600)))
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x16 << 0x00);
|   else {
|
|
|
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x05 << 0x00);
|   }
|   break;
|  case 3:
|   if (((rdev->family >= CHIP_RS600)))
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x14 << 0x00);
|   else
|    ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x0B << 0x00);
|   break;
|  }
|  break;
| case (0x1L << 0x00000001 ):
|  if (((rdev->family >= CHIP_RS600)))
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x0F << 0x00);
|  else
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x01 << 0x00);
|  break;
| case (0x1L << 0x00000003 ):
|  if ((rdev->family == CHIP_RS300) ||
|      (rdev->family == CHIP_RS400) ||
|      (rdev->family == CHIP_RS480))
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x0B << 0x00);
|  else if (((rdev->family >= CHIP_RS600)))
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x13 << 0x00);
|  else
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x02 << 0x00);
|  break;
| case (0x1L << 0x00000005 ):
| case (0x1L << 0x00000007 ):
|  if ((rdev->family == CHIP_RS600) ||
|      (rdev->family == CHIP_RS690) ||
|      (rdev->family == CHIP_RS740))
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x19 << 0x00);
|  else if (((rdev->family >= CHIP_RS600)))
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x14 << 0x00);
|  else
|   ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x0B << 0x00);
|  break;
| case (0x1L << 0x00000009 ):
|  ret = ( 0x2 << 0x0C | 0x01 << 0x08 | 0x0F << 0x00);
|  break;
| }
|
| return ret;
|}
|
|static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder)
|{
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| switch (radeon_encoder->encoder_id) {
| case 0x01:
| case 0x02:
| case 0x13:
| case 0x0F:
| case 0x0B:
| case 0x14:
| case 0x19:
| case 0x1E:
| case 0x1F:
| case 0x20:
| case 0x21:
|  return true;
| default:
|  return false;
| }
|}
|void
|radeon_link_encoder_connector(struct drm_device *dev)
|{
| struct drm_connector *connector;
| struct radeon_connector *radeon_connector;
| struct drm_encoder *encoder;
| struct radeon_encoder *radeon_encoder;
|
|
| for (connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = ((&dev->mode_config.connector_list)->next); (typeof(*connector) *)( (char *)__mptr - 1 );}); __builtin_prefetch(connector->head.next), &connector->head != (&dev->mode_config.connector_list); connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = (connector->head.next); (typeof(*connector) *)( (char *)__mptr - 1 );})) {
|  radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|  for (encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(encoder->head.next), &encoder->head != (&dev->mode_config.encoder_list); encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = (encoder->head.next); (typeof(*encoder) *)( (char *)__mptr - 1 );})) {
|   radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|   if (radeon_encoder->devices & radeon_connector->devices)
|    drm_mode_connector_attach_encoder(connector, encoder);
|  }
| }
|}
|
|void radeon_encoder_set_active_device(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_connector *connector;
|
| for (connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = ((&dev->mode_config.connector_list)->next); (typeof(*connector) *)( (char *)__mptr - 1 );}); __builtin_prefetch(connector->head.next), &connector->head != (&dev->mode_config.connector_list); connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = (connector->head.next); (typeof(*connector) *)( (char *)__mptr - 1 );})) {
|  if (connector->encoder == encoder) {
|   struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|   radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
|   do { drm_ut_debug_printk(0x04, "drm", __func__, "setting active device to %08x from %08x %08x for encoder %d\n", radeon_encoder->active_device, radeon_encoder->devices, radeon_connector->devices, encoder->encoder_type); } while (0)
|
|                                                       ;
|  }
| }
|}
|
|struct drm_connector *
|radeon_get_connector_for_encoder(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_connector *connector;
| struct radeon_connector *radeon_connector;
|
| for (connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = ((&dev->mode_config.connector_list)->next); (typeof(*connector) *)( (char *)__mptr - 1 );}); __builtin_prefetch(connector->head.next), &connector->head != (&dev->mode_config.connector_list); connector = ({ const typeof( ((typeof(*connector) *)0)->head ) *__mptr = (connector->head.next); (typeof(*connector) *)( (char *)__mptr - 1 );})) {
|  radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|  if (radeon_encoder->active_device & radeon_connector->devices)
|   return connector;
| }
| return ((void *)0);
|}
|
|void radeon_panel_mode_fixup(struct drm_encoder *encoder,
|        struct drm_display_mode *adjusted_mode)
|{
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
| unsigned hblank = native_mode->htotal - native_mode->hdisplay;
| unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
| unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
| unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
| unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
| unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
|
| adjusted_mode->clock = native_mode->clock;
| adjusted_mode->flags = native_mode->flags;
|
| if (((rdev->family >= CHIP_RS600))) {
|  adjusted_mode->hdisplay = native_mode->hdisplay;
|  adjusted_mode->vdisplay = native_mode->vdisplay;
| }
|
| adjusted_mode->htotal = native_mode->hdisplay + hblank;
| adjusted_mode->hsync_start = native_mode->hdisplay + hover;
| adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
|
| adjusted_mode->vtotal = native_mode->vdisplay + vblank;
| adjusted_mode->vsync_start = native_mode->vdisplay + vover;
| adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
|
| drm_mode_set_crtcinfo(adjusted_mode, 0x1);
|
| if (((rdev->family >= CHIP_RS600))) {
|  adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
|  adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
| }
|
| adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
| adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
| adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
|
| adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
| adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
| adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
|
|}
|
|static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
|       struct drm_display_mode *mode,
|       struct drm_display_mode *adjusted_mode)
|{
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
|
|
| radeon_encoder_set_active_device(encoder);
| drm_mode_set_crtcinfo(adjusted_mode, 0);
|
|
| if ((mode->flags & (1<<4))
|     && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
|  adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
|
|
| if (radeon_encoder->active_device & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 ))))
|  radeon_panel_mode_fixup(encoder, adjusted_mode);
|
|
| if (radeon_encoder->active_device & (((0x1L << 0x00000002 )))) {
|  struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
|  if (tv_dac) {
|   if (tv_dac->tv_std == TV_STD_NTSC ||
|       tv_dac->tv_std == TV_STD_NTSC_J ||
|       tv_dac->tv_std == TV_STD_PAL_M)
|    radeon_atom_get_tv_timings(rdev, 0, adjusted_mode);
|   else
|    radeon_atom_get_tv_timings(rdev, 1, adjusted_mode);
|  }
| }
|
| if (((rdev->family >= CHIP_RV620)) &&
|     (radeon_encoder->active_device & (((0x1L << 0x00000003 ) | (0x1L << 0x00000007 ) | (0x1L << 0x00000009 ) | (0x1L << 0x0000000A ) | (0x1L << 0x0000000B ) | (0x1L << 0x00000006 )) | ((0x1L << 0x00000001 ) | (0x1L << 0x00000005 ))))) {
|  struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|  radeon_dp_set_link_config(connector, mode);
| }
|
| return true;
|}
|
|static void
|atombios_dac_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| DAC_ENCODER_CONTROL_PARAMETERS args;
| int index = 0;
| struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| switch (radeon_encoder->encoder_id) {
| case 0x04:
| case 0x15:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DAC1EncoderControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x05:
| case 0x16:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DAC2EncoderControl)-(char*)0)/sizeof(USHORT));
|  break;
| }
|
| args.ucAction = action;
|
| if (radeon_encoder->active_device & (((0x1L << 0x00000000 ) | (0x1L << 0x00000004 ))))
|  args.ucDacStandard = 1;
| else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|  args.ucDacStandard = 2;
| else {
|  switch (dac_info->tv_std) {
|  case TV_STD_PAL:
|  case TV_STD_PAL_M:
|  case TV_STD_SCART_PAL:
|  case TV_STD_SECAM:
|  case TV_STD_PAL_CN:
|   args.ucDacStandard = 4;
|   break;
|  case TV_STD_NTSC:
|  case TV_STD_NTSC_J:
|  case TV_STD_PAL_60:
|  default:
|   args.ucDacStandard = 3;
|   break;
|  }
| }
| args.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|}
|
|static void
|atombios_tv_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| TV_ENCODER_CONTROL_PS_ALLOCATION args;
| int index = 0;
| struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->TVEncoderControl)-(char*)0)/sizeof(USHORT));
|
| args.sTVEncoder.ucAction = action;
|
| if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|  args.sTVEncoder.ucTvStandard = 16;
| else {
|  switch (dac_info->tv_std) {
|  case TV_STD_NTSC:
|   args.sTVEncoder.ucTvStandard = 1;
|   break;
|  case TV_STD_PAL:
|   args.sTVEncoder.ucTvStandard = 3;
|   break;
|  case TV_STD_PAL_M:
|   args.sTVEncoder.ucTvStandard = 4;
|   break;
|  case TV_STD_PAL_60:
|   args.sTVEncoder.ucTvStandard = 7;
|   break;
|  case TV_STD_NTSC_J:
|   args.sTVEncoder.ucTvStandard = 2;
|   break;
|  case TV_STD_SCART_PAL:
|   args.sTVEncoder.ucTvStandard = 3;
|   break;
|  case TV_STD_SECAM:
|   args.sTVEncoder.ucTvStandard = 8;
|   break;
|  case TV_STD_PAL_CN:
|   args.sTVEncoder.ucTvStandard = 5;
|   break;
|  default:
|   args.sTVEncoder.ucTvStandard = 1;
|   break;
|  }
| }
|
| args.sTVEncoder.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|}
|
|void
|atombios_external_tmds_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION args;
| int index = 0;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DVOEncoderControl)-(char*)0)/sizeof(USHORT));
|
| args.sXTmdsEncoder.ucEnable = action;
|
| if (radeon_encoder->pixel_clock > 165000)
|  args.sXTmdsEncoder.ucMisc = 0x01;
|
|
| args.sXTmdsEncoder.ucMisc |= (1 << 1);
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|}
|
|static void
|atombios_ddia_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| DVO_ENCODER_CONTROL_PS_ALLOCATION args;
| int index = 0;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DVOEncoderControl)-(char*)0)/sizeof(USHORT));
|
| args.sDVOEncoder.ucAction = action;
| args.sDVOEncoder.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
|
| if (radeon_encoder->pixel_clock > 165000)
|  args.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute = 0x01;
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|}
|
|union lvds_encoder_control {
| LVDS_ENCODER_CONTROL_PARAMETERS v1;
| LVDS_ENCODER_CONTROL_PARAMETERS_V2 v2;
|};
|
|void
|atombios_digital_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
| union lvds_encoder_control args;
| int index = 0;
| int hdmi_detected = 0;
| uint8_t frev, crev;
|
| if (!dig)
|  return;
|
| if (atombios_get_encoder_mode(encoder) == 3)
|  hdmi_detected = 1;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| switch (radeon_encoder->encoder_id) {
| case 0x01:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LVDSEncoderControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x02:
| case 0x13:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->TMDSAEncoderControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x0F:
|  if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 ))))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LVDSEncoderControl)-(char*)0)/sizeof(USHORT));
|  else
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LVTMAEncoderControl)-(char*)0)/sizeof(USHORT));
|  break;
| }
|
| if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|  return;
|
| switch (frev) {
| case 1:
| case 2:
|  switch (crev) {
|  case 1:
|   args.v1.ucMisc = 0;
|   args.v1.ucAction = action;
|   if (hdmi_detected)
|    args.v1.ucMisc |= 0x08;
|   args.v1.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
|   if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
|    if (dig->lcd_misc & 0x00000001)
|     args.v1.ucMisc |= 0x01;
|    if (dig->lcd_misc & 0x00000002)
|     args.v1.ucMisc |= (1 << 1);
|   } else {
|    if (dig->linkb)
|     args.v1.ucMisc |= 0x04;
|    if (radeon_encoder->pixel_clock > 165000)
|     args.v1.ucMisc |= 0x01;
|
|    args.v1.ucMisc |= (1 << 1);
|   }
|   break;
|  case 2:
|  case 3:
|   args.v2.ucMisc = 0;
|   args.v2.ucAction = action;
|   if (crev == 3) {
|    if (dig->coherent_mode)
|     args.v2.ucMisc |= 0x02;
|   }
|   if (hdmi_detected)
|    args.v2.ucMisc |= 0x08;
|   args.v2.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
|   args.v2.ucTruncate = 0;
|   args.v2.ucSpatial = 0;
|   args.v2.ucTemporal = 0;
|   args.v2.ucFRC = 0;
|   if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
|    if (dig->lcd_misc & 0x00000001)
|     args.v2.ucMisc |= 0x01;
|    if (dig->lcd_misc & 0x00000020) {
|     args.v2.ucSpatial = 0x01;
|     if (dig->lcd_misc & 0x00000002)
|      args.v2.ucSpatial |= 0x10;
|    }
|    if (dig->lcd_misc & 0x00000040) {
|     args.v2.ucTemporal = 0x01;
|     if (dig->lcd_misc & 0x00000002)
|      args.v2.ucTemporal |= 0x10;
|     if (((dig->lcd_misc >> 2) & 0x3) == 2)
|      args.v2.ucTemporal |= 0x20;
|    }
|   } else {
|    if (dig->linkb)
|     args.v2.ucMisc |= 0x04;
|    if (radeon_encoder->pixel_clock > 165000)
|     args.v2.ucMisc |= 0x01;
|   }
|   break;
|  default:
|   printk("<3>" "[" "drm" ":%s] *ERROR* " "Unknown table version %d, %d\n" , __func__ , frev, crev);
|   break;
|  }
|  break;
| default:
|  printk("<3>" "[" "drm" ":%s] *ERROR* " "Unknown table version %d, %d\n" , __func__ , frev, crev);
|  break;
| }
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|}
|
|int
|atombios_get_encoder_mode(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct drm_connector *connector;
| struct radeon_connector *radeon_connector;
| struct radeon_connector_atom_dig *dig_connector;
|
| connector = radeon_get_connector_for_encoder(encoder);
| if (!connector)
|  return 0;
|
| radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|
| switch (connector->connector_type) {
| case 2:
| case 12:
|  if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
|   if (((rdev->family >= CHIP_CEDAR)))
|    return 2;
|   else
|    return 3;
|  } else if (radeon_connector->use_digital)
|   return 2;
|  else
|   return 15;
|  break;
| case 3:
| case 11:
| default:
|  if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
|   if (((rdev->family >= CHIP_CEDAR)))
|    return 2;
|   else
|    return 3;
|  } else
|   return 2;
|  break;
| case 7:
|  return 1;
|  break;
     |This node is unreachable prev next
| case 10:
| case 14:
|  dig_connector = radeon_connector->con_priv;
|  if ((dig_connector->dp_sink_type == 0x13) ||
|      (dig_connector->dp_sink_type == 0x14))
|   return 0;
|  else if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
|   if (((rdev->family >= CHIP_CEDAR)))
|    return 2;
|   else
|    return 3;
|  } else
|   return 2;
|  break;
| case 4:
| case 1:
|  return 15;
|  break;
| case 5:
| case 6:
| case 9:
|
|  return 13;
|
|  break;
| }
|}
|union dig_encoder_control {
| DIG_ENCODER_CONTROL_PARAMETERS v1;
| DIG_ENCODER_CONTROL_PARAMETERS_V2 v2;
| DIG_ENCODER_CONTROL_PARAMETERS_V3 v3;
|};
|
|void
|atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
| struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
| union dig_encoder_control args;
| int index = 0;
| uint8_t frev, crev;
| int dp_clock = 0;
| int dp_lane_count = 0;
|
| if (connector) {
|  struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|  struct radeon_connector_atom_dig *dig_connector =
|   radeon_connector->con_priv;
|
|  dp_clock = dig_connector->dp_clock;
|  dp_lane_count = dig_connector->dp_lane_count;
| }
|
|
| if (dig->dig_encoder == -1)
|  return;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| if (((rdev->family >= CHIP_CEDAR)))
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DIGxEncoderControl)-(char*)0)/sizeof(USHORT));
| else {
|  if (dig->dig_encoder)
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DIG2EncoderControl)-(char*)0)/sizeof(USHORT));
|  else
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DIG1EncoderControl)-(char*)0)/sizeof(USHORT));
| }
|
| if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|  return;
|
| args.v1.ucAction = action;
| args.v1.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
| args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
|
| if (args.v1.ucEncoderMode == 0) {
|  if (dp_clock == 270000)
|   args.v1.ucConfig |= 0x01;
|  args.v1.ucLaneNum = dp_lane_count;
| } else if (radeon_encoder->pixel_clock > 165000)
|  args.v1.ucLaneNum = 8;
| else
|  args.v1.ucLaneNum = 4;
|
| if (((rdev->family >= CHIP_CEDAR))) {
|  args.v3.acConfig.ucDigSel = dig->dig_encoder;
|  args.v3.ucBitPerColor = 0x02;
| } else {
|  switch (radeon_encoder->encoder_id) {
|  case 0x1E:
|   args.v1.ucConfig = 0x00;
|   break;
|  case 0x20:
|  case 0x1F:
|   args.v1.ucConfig = 0x08;
|   break;
|  case 0x21:
|   args.v1.ucConfig = 0x10;
|   break;
|  }
|  if (dig->linkb)
|   args.v1.ucConfig |= 0x04;
|  else
|   args.v1.ucConfig |= 0x00;
| }
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|}
|
|union dig_transmitter_control {
| DIG_TRANSMITTER_CONTROL_PARAMETERS v1;
| DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
| DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3;
|};
|
|void
|atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
| struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
| union dig_transmitter_control args;
| int index = 0;
| uint8_t frev, crev;
| bool is_dp = false;
| int pll_id = 0;
| int dp_clock = 0;
| int dp_lane_count = 0;
| int connector_object_id = 0;
| int igp_lane_info = 0;
|
| if (connector) {
|  struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|  struct radeon_connector_atom_dig *dig_connector =
|   radeon_connector->con_priv;
|
|  dp_clock = dig_connector->dp_clock;
|  dp_lane_count = dig_connector->dp_lane_count;
|  connector_object_id =
|   (radeon_connector->connector_object_id & 0x00FF) >> 0x00;
|  igp_lane_info = dig_connector->igp_lane_info;
| }
|
|
| if (dig->dig_encoder == -1)
|  return;
|
| if (atombios_get_encoder_mode(encoder) == 0)
|  is_dp = true;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| switch (radeon_encoder->encoder_id) {
| case 0x1E:
| case 0x20:
| case 0x21:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DIG1TransmitterControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x1F:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DIG2TransmitterControl)-(char*)0)/sizeof(USHORT));
|  break;
| }
|
| if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|  return;
|
| args.v1.ucAction = action;
| if (action == 7) {
|  args.v1.usInitInfo = connector_object_id;
| } else if (action == 11) {
|  args.v1.asMode.ucLaneSel = lane_num;
|  args.v1.asMode.ucLaneSet = lane_set;
| } else {
|  if (is_dp)
|   args.v1.usPixelClock =
|    (( __le16)(__u16)(dp_clock / 10));
|  else if (radeon_encoder->pixel_clock > 165000)
|   args.v1.usPixelClock = (( __le16)(__u16)((radeon_encoder->pixel_clock / 2) / 10));
|  else
|   args.v1.usPixelClock = (( __le16)(__u16)(radeon_encoder->pixel_clock / 10));
| }
| if (((rdev->family >= CHIP_CEDAR))) {
|  if (is_dp)
|   args.v3.ucLaneNum = dp_lane_count;
|  else if (radeon_encoder->pixel_clock > 165000)
|   args.v3.ucLaneNum = 8;
|  else
|   args.v3.ucLaneNum = 4;
|
|  if (dig->linkb) {
|   args.v3.acConfig.ucLinkSel = 1;
|   args.v3.acConfig.ucEncoderSel = 1;
|  }
|
|
|
|
|
|  if (encoder->crtc) {
|   struct radeon_crtc *radeon_crtc = ({ const typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (encoder->crtc); (struct radeon_crtc *)( (char *)__mptr - 1 );});
|   pll_id = radeon_crtc->pll_id;
|  }
|  if (is_dp && rdev->clock.dp_extclk)
|   args.v3.acConfig.ucRefClkSource = 2;
|  else
|   args.v3.acConfig.ucRefClkSource = pll_id;
|
|  switch (radeon_encoder->encoder_id) {
|  case 0x1E:
|   args.v3.acConfig.ucTransmitterSel = 0;
|   break;
|  case 0x20:
|   args.v3.acConfig.ucTransmitterSel = 1;
|   break;
|  case 0x21:
|   args.v3.acConfig.ucTransmitterSel = 2;
|   break;
|  }
|
|  if (is_dp)
|   args.v3.acConfig.fCoherentMode = 1;
|  else if (radeon_encoder->devices & (((0x1L << 0x00000003 ) | (0x1L << 0x00000007 ) | (0x1L << 0x00000009 ) | (0x1L << 0x0000000A ) | (0x1L << 0x0000000B ) | (0x1L << 0x00000006 )))) {
|   if (dig->coherent_mode)
|    args.v3.acConfig.fCoherentMode = 1;
|   if (radeon_encoder->pixel_clock > 165000)
|    args.v3.acConfig.fDualLinkConnector = 1;
|  }
| } else if (((rdev->family >= CHIP_RV730))) {
|  args.v2.acConfig.ucEncoderSel = dig->dig_encoder;
|  if (dig->linkb)
|   args.v2.acConfig.ucLinkSel = 1;
|
|  switch (radeon_encoder->encoder_id) {
|  case 0x1E:
|   args.v2.acConfig.ucTransmitterSel = 0;
|   break;
|  case 0x20:
|   args.v2.acConfig.ucTransmitterSel = 1;
|   break;
|  case 0x21:
|   args.v2.acConfig.ucTransmitterSel = 2;
|   break;
|  }
|
|  if (is_dp)
|   args.v2.acConfig.fCoherentMode = 1;
|  else if (radeon_encoder->devices & (((0x1L << 0x00000003 ) | (0x1L << 0x00000007 ) | (0x1L << 0x00000009 ) | (0x1L << 0x0000000A ) | (0x1L << 0x0000000B ) | (0x1L << 0x00000006 )))) {
|   if (dig->coherent_mode)
|    args.v2.acConfig.fCoherentMode = 1;
|   if (radeon_encoder->pixel_clock > 165000)
|    args.v2.acConfig.fDualLinkConnector = 1;
|  }
| } else {
|  args.v1.ucConfig = 0x00;
|
|  if (dig->dig_encoder)
|   args.v1.ucConfig |= 0x08;
|  else
|   args.v1.ucConfig |= 0x00;
|
|  if ((rdev->flags & RADEON_IS_IGP) &&
|      (radeon_encoder->encoder_id == 0x1E)) {
|   if (is_dp || (radeon_encoder->pixel_clock <= 165000)) {
|    if (igp_lane_info & 0x1)
|     args.v1.ucConfig |= 0x00;
|    else if (igp_lane_info & 0x2)
|     args.v1.ucConfig |= 0x40;
|    else if (igp_lane_info & 0x4)
|     args.v1.ucConfig |= 0x80;
|    else if (igp_lane_info & 0x8)
|     args.v1.ucConfig |= 0xc0;
|   } else {
|    if (igp_lane_info & 0x3)
|     args.v1.ucConfig |= 0x00;
|    else if (igp_lane_info & 0xc)
|     args.v1.ucConfig |= 0x80;
|   }
|  }
|
|  if (dig->linkb)
|   args.v1.ucConfig |= 0x04;
|  else
|   args.v1.ucConfig |= 0x00;
|
|  if (is_dp)
|   args.v1.ucConfig |= 0x02;
|  else if (radeon_encoder->devices & (((0x1L << 0x00000003 ) | (0x1L << 0x00000007 ) | (0x1L << 0x00000009 ) | (0x1L << 0x0000000A ) | (0x1L << 0x0000000B ) | (0x1L << 0x00000006 )))) {
|   if (dig->coherent_mode)
|    args.v1.ucConfig |= 0x02;
|   if (radeon_encoder->pixel_clock > 165000)
|    args.v1.ucConfig |= 0x01;
|  }
| }
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|}
|
|static void
|atombios_yuv_setup(struct drm_encoder *encoder, bool enable)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_crtc *radeon_crtc = ({ const typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (encoder->crtc); (struct radeon_crtc *)( (char *)__mptr - 1 );});
| ENABLE_YUV_PARAMETERS args;
| int index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->EnableYUV)-(char*)0)/sizeof(USHORT));
| uint32_t temp, reg;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| if (rdev->family >= CHIP_R600)
|  reg = 0x1730;
| else
|  reg = 0x001c;
|
|
| temp = r100_mm_rreg(rdev, (reg));
| if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|  r100_mm_wreg(rdev, (reg), ((0x00000004L | (radeon_crtc->crtc_id << 18))))
|                                      ;
| else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|  r100_mm_wreg(rdev, (reg), ((0x00000100L | (radeon_crtc->crtc_id << 24))));
| else
|  r100_mm_wreg(rdev, (reg), (0));
|
| if (enable)
|  args.ucEnable = 1;
| args.ucCRTC = radeon_crtc->crtc_id;
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
| r100_mm_wreg(rdev, (reg), (temp));
|}
|
|static void
|radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| DISPLAY_DEVICE_OUTPUT_CONTROL_PARAMETERS args;
| int index = 0;
| bool is_dig = false;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| do { drm_ut_debug_printk(0x04, "drm", __func__, "encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", radeon_encoder->encoder_id, mode, radeon_encoder->devices, radeon_encoder->active_device); } while (0)
|
|                                  ;
| switch (radeon_encoder->encoder_id) {
| case 0x02:
| case 0x13:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->TMDSAOutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x1E:
| case 0x20:
| case 0x21:
| case 0x1F:
|  is_dig = true;
|  break;
| case 0x0B:
| case 0x19:
| case 0x14:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DVOOutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x01:
|  index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LCD1OutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x0F:
|  if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 ))))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LCD1OutputControl)-(char*)0)/sizeof(USHORT));
|  else
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->LVTMAOutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x04:
| case 0x15:
|  if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->TV1OutputControl)-(char*)0)/sizeof(USHORT));
|  else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->CV1OutputControl)-(char*)0)/sizeof(USHORT));
|  else
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DAC1OutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| case 0x05:
| case 0x16:
|  if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->TV1OutputControl)-(char*)0)/sizeof(USHORT));
|  else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->CV1OutputControl)-(char*)0)/sizeof(USHORT));
|  else
|   index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DAC2OutputControl)-(char*)0)/sizeof(USHORT));
|  break;
| }
|
| if (is_dig) {
|  switch (mode) {
|  case 0:
|   atombios_dig_transmitter_setup(encoder, 9, 0, 0);
|   if (atombios_get_encoder_mode(encoder) == 0) {
|    struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|    dp_link_train(encoder, connector);
|    if (((rdev->family >= CHIP_CEDAR)))
|     atombios_dig_encoder_setup(encoder, 0x0d);
|   }
|   break;
|  case 1:
|  case 2:
|  case 3:
|   atombios_dig_transmitter_setup(encoder, 8, 0, 0);
|   if (atombios_get_encoder_mode(encoder) == 0) {
|    if (((rdev->family >= CHIP_CEDAR)))
|     atombios_dig_encoder_setup(encoder, 0x0c);
|   }
|   break;
|  }
| } else {
|  switch (mode) {
|  case 0:
|   args.ucAction = 1;
|   break;
|  case 1:
|  case 2:
|  case 3:
|   args.ucAction = 0;
|   break;
|  }
|  atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
| }
| radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == 0) ? true : false);
|
|}
|
|union crtc_source_param {
| SELECT_CRTC_SOURCE_PARAMETERS v1;
| SELECT_CRTC_SOURCE_PARAMETERS_V2 v2;
|};
|
|static void
|atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_crtc *radeon_crtc = ({ const typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (encoder->crtc); (struct radeon_crtc *)( (char *)__mptr - 1 );});
| union crtc_source_param args;
| int index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->SelectCRTC_Source)-(char*)0)/sizeof(USHORT));
| uint8_t frev, crev;
| struct radeon_encoder_atom_dig *dig;
|
| __st_memset_st__(&args, 0, sizeof(args));
|
| if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|  return;
|
| switch (frev) {
| case 1:
|  switch (crev) {
|  case 1:
|  default:
|   if (((rdev->family >= CHIP_RS600)))
|    args.v1.ucCRTC = radeon_crtc->crtc_id;
|   else {
|    if (radeon_encoder->encoder_id == 0x04) {
|     args.v1.ucCRTC = radeon_crtc->crtc_id;
|    } else {
|     args.v1.ucCRTC = radeon_crtc->crtc_id << 2;
|    }
|   }
|   switch (radeon_encoder->encoder_id) {
|   case 0x02:
|   case 0x13:
|    args.v1.ucDevice = 0x00000003;
|    break;
|   case 0x01:
|   case 0x0F:
|    if (radeon_encoder->devices & (0x1L << 0x00000001 ))
|     args.v1.ucDevice = 0x00000001;
|    else
|     args.v1.ucDevice = 0x00000009;
|    break;
|   case 0x0B:
|   case 0x19:
|   case 0x14:
|    args.v1.ucDevice = 0x00000007;
|    break;
|   case 0x04:
|   case 0x15:
|    if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|     args.v1.ucDevice = 0x00000002;
|    else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|     args.v1.ucDevice = 0x00000008;
|    else
|     args.v1.ucDevice = 0x00000000;
|    break;
|   case 0x05:
|   case 0x16:
|    if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|     args.v1.ucDevice = 0x00000002;
|    else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|     args.v1.ucDevice = 0x00000008;
|    else
|     args.v1.ucDevice = 0x00000004;
|    break;
|   }
|   break;
|  case 2:
|   args.v2.ucCRTC = radeon_crtc->crtc_id;
|   args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
|   switch (radeon_encoder->encoder_id) {
|   case 0x1E:
|   case 0x20:
|   case 0x21:
|   case 0x1F:
|    dig = radeon_encoder->enc_priv;
|    switch (dig->dig_encoder) {
|    case 0:
|     args.v2.ucEncoderID = 0x03;
|     break;
|    case 1:
|     args.v2.ucEncoderID = 0x09;
|     break;
|    case 2:
|     args.v2.ucEncoderID = 0x0a;
|     break;
|    case 3:
|     args.v2.ucEncoderID = 0x0b;
|     break;
|    case 4:
|     args.v2.ucEncoderID = 0x0c;
|     break;
|    case 5:
|     args.v2.ucEncoderID = 0x0d;
|     break;
|    }
|    break;
|   case 0x14:
|    args.v2.ucEncoderID = 0x07;
|    break;
|   case 0x15:
|    if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|     args.v2.ucEncoderID = 0x02;
|    else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|     args.v2.ucEncoderID = 0x02;
|    else
|     args.v2.ucEncoderID = 0x00;
|    break;
|   case 0x16:
|    if (radeon_encoder->active_device & (((0x1L << 0x00000002 ))))
|     args.v2.ucEncoderID = 0x02;
|    else if (radeon_encoder->active_device & ((0x1L << 0x00000008 )))
|     args.v2.ucEncoderID = 0x02;
|    else
|     args.v2.ucEncoderID = 0x04;
|    break;
|   }
|   break;
|  }
|  break;
| default:
|  printk("<3>" "[" "drm" ":%s] *ERROR* " "Unknown table version: %d, %d\n" , __func__ , frev, crev);
|  break;
| }
|
| atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|
| radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
|}
|
|static void
|atombios_apply_encoder_quirks(struct drm_encoder *encoder,
|         struct drm_display_mode *mode)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_crtc *radeon_crtc = ({ const typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (encoder->crtc); (struct radeon_crtc *)( (char *)__mptr - 1 );});
|
|
| if ((dev->pdev->device == 0x71C5) &&
|     (dev->pdev->subsystem_vendor == 0x106b) &&
|     (dev->pdev->subsystem_device == 0x0080)) {
|  if (radeon_encoder->devices & (0x1L << 0x00000001 )) {
|   uint32_t lvtma_bit_depth_control = r100_mm_rreg(rdev, (0x7a94));
|
|   lvtma_bit_depth_control &= ~(1 << 0);
|   lvtma_bit_depth_control &= ~(1 << 8);
|
|   r100_mm_wreg(rdev, (0x7a94), (lvtma_bit_depth_control));
|  }
| }
|
|
|
| if (!(radeon_encoder->active_device & (((0x1L << 0x00000002 ))))) {
|  if (((rdev->family >= CHIP_RS600)) && (mode->flags & (1<<4)))
|   r100_mm_wreg(rdev, (0x6528 + radeon_crtc->crtc_offset), ((1 << 0)))
|                                     ;
| }
|}
|
|static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_crtc *radeon_crtc = ({ const typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (encoder->crtc); (struct radeon_crtc *)( (char *)__mptr - 1 );});
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_encoder *test_encoder;
| struct radeon_encoder_atom_dig *dig;
| uint32_t dig_enc_in_use = 0;
|
| if (((rdev->family >= CHIP_CEDAR))) {
|  dig = radeon_encoder->enc_priv;
|  switch (radeon_encoder->encoder_id) {
|  case 0x1E:
|   if (dig->linkb)
|    return 1;
|   else
|    return 0;
|   break;
|  case 0x20:
|   if (dig->linkb)
|    return 3;
|   else
|    return 2;
|   break;
|  case 0x21:
|   if (dig->linkb)
|    return 5;
|   else
|    return 4;
|   break;
|  }
| }
|
|
| if (((rdev->family >= CHIP_RV730))) {
|  return radeon_crtc->crtc_id;
| }
|
|
| for (test_encoder = ({ const typeof( ((typeof(*test_encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*test_encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(test_encoder->head.next), &test_encoder->head != (&dev->mode_config.encoder_list); test_encoder = ({ const typeof( ((typeof(*test_encoder) *)0)->head ) *__mptr = (test_encoder->head.next); (typeof(*test_encoder) *)( (char *)__mptr - 1 );})) {
|  struct radeon_encoder *radeon_test_encoder;
|
|  if (encoder == test_encoder)
|   continue;
|
|  if (!radeon_encoder_is_digital(test_encoder))
|   continue;
|
|  radeon_test_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (test_encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|  dig = radeon_test_encoder->enc_priv;
|
|  if (dig->dig_encoder >= 0)
|   dig_enc_in_use |= (1 << dig->dig_encoder);
| }
|
| if (radeon_encoder->encoder_id == 0x1F) {
|  if (dig_enc_in_use & 0x2)
|   printk("<3>" "[" "drm" ":%s] *ERROR* " "LVDS required digital encoder 2 but it was in use - stealing\n" , __func__);
|  return 1;
| }
| if (!(dig_enc_in_use & 1))
|  return 0;
| return 1;
|}
|
|static void
|radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
|        struct drm_display_mode *mode,
|        struct drm_display_mode *adjusted_mode)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|
| radeon_encoder->pixel_clock = adjusted_mode->clock;
|
| if (((rdev->family >= CHIP_RS600)) && !((rdev->family >= CHIP_CEDAR))) {
|  if (radeon_encoder->active_device & ((0x1L << 0x00000008 ) | ((0x1L << 0x00000002 ))))
|   atombios_yuv_setup(encoder, true);
|  else
|   atombios_yuv_setup(encoder, false);
| }
|
| switch (radeon_encoder->encoder_id) {
| case 0x02:
| case 0x13:
| case 0x01:
| case 0x0F:
|  atombios_digital_setup(encoder, 1);
|  break;
| case 0x1E:
| case 0x20:
| case 0x21:
| case 0x1F:
|  if (((rdev->family >= CHIP_CEDAR))) {
|
|   atombios_dig_transmitter_setup(encoder, 0, 0, 0);
|
|   atombios_dig_encoder_setup(encoder, 0x0f);
|
|
|   atombios_dig_transmitter_setup(encoder, 7, 0, 0);
|   atombios_dig_transmitter_setup(encoder, 1, 0, 0);
|  } else {
|
|   atombios_dig_transmitter_setup(encoder, 0, 0, 0);
|   atombios_dig_encoder_setup(encoder, 0);
|
|
|   atombios_dig_encoder_setup(encoder, 1);
|   atombios_dig_transmitter_setup(encoder, 7, 0, 0);
|   atombios_dig_transmitter_setup(encoder, 10, 0, 0);
|   atombios_dig_transmitter_setup(encoder, 1, 0, 0);
|  }
|  break;
| case 0x19:
|  atombios_ddia_setup(encoder, 1);
|  break;
| case 0x0B:
| case 0x14:
|  atombios_external_tmds_setup(encoder, 1);
|  break;
| case 0x04:
| case 0x15:
| case 0x05:
| case 0x16:
|  atombios_dac_setup(encoder, 1);
|  if (radeon_encoder->devices & (((0x1L << 0x00000002 )) | (0x1L << 0x00000008 ))) {
|   if (radeon_encoder->active_device & (((0x1L << 0x00000002 )) | (0x1L << 0x00000008 )))
|    atombios_tv_setup(encoder, 1);
|   else
|    atombios_tv_setup(encoder, 0);
|  }
|  break;
| }
| atombios_apply_encoder_quirks(encoder, adjusted_mode);
|
| if (atombios_get_encoder_mode(encoder) == 3) {
|  r600_hdmi_enable(encoder);
|  r600_hdmi_setmode(encoder, adjusted_mode);
| }
|}
|
|static bool
|atombios_dac_load_detect(struct drm_encoder *encoder, struct drm_connector *connector)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|
| if (radeon_encoder->devices & (((0x1L << 0x00000002 )) |
|           (0x1L << 0x00000008 ) |
|           ((0x1L << 0x00000000 ) | (0x1L << 0x00000004 )))) {
|  DAC_LOAD_DETECTION_PS_ALLOCATION args;
|  int index = (((char*)(&((ATOM_MASTER_LIST_OF_COMMAND_TABLES*)0)->DAC_LoadDetection)-(char*)0)/sizeof(USHORT));
|  uint8_t frev, crev;
|
|  __st_memset_st__(&args, 0, sizeof(args));
|
|  if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|   return false;
|
|  args.sDacload.ucMisc = 0;
|
|  if ((radeon_encoder->encoder_id == 0x04) ||
|      (radeon_encoder->encoder_id == 0x15))
|   args.sDacload.ucDacType = 0;
|  else
|   args.sDacload.ucDacType = 1;
|
|  if (radeon_connector->devices & (0x1L << 0x00000000 ))
|   args.sDacload.usDeviceID = (( __le16)(__u16)((0x1L << 0x00000000 )));
|  else if (radeon_connector->devices & (0x1L << 0x00000004 ))
|   args.sDacload.usDeviceID = (( __le16)(__u16)((0x1L << 0x00000004 )));
|  else if (radeon_connector->devices & (0x1L << 0x00000008 )) {
|   args.sDacload.usDeviceID = (( __le16)(__u16)((0x1L << 0x00000008 )));
|   if (crev >= 3)
|    args.sDacload.ucMisc = 0x01;
|  } else if (radeon_connector->devices & (0x1L << 0x00000002 )) {
|   args.sDacload.usDeviceID = (( __le16)(__u16)((0x1L << 0x00000002 )));
|   if (crev >= 3)
|    args.sDacload.ucMisc = 0x01;
|  }
|
|  atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
|  return true;
| } else
|  return false;
|}
|
|static enum drm_connector_status
|radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
| uint32_t bios_0_scratch;
|
| if (!atombios_dac_load_detect(encoder, connector)) {
|  do { drm_ut_debug_printk(0x04, "drm", __func__, "detect returned false \n"); } while (0);
|  return connector_status_unknown;
| }
|
| if (rdev->family >= CHIP_R600)
|  bios_0_scratch = r100_mm_rreg(rdev, (0x1724));
| else
|  bios_0_scratch = r100_mm_rreg(rdev, (0x0010));
|
| do { drm_ut_debug_printk(0x04, "drm", __func__, "Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices); } while (0);
| if (radeon_connector->devices & (0x1L << 0x00000000 )) {
|  if (bios_0_scratch & (0x00000001L +0x00000002L))
|   return connector_status_connected;
| }
| if (radeon_connector->devices & (0x1L << 0x00000004 )) {
|  if (bios_0_scratch & (0x00000100L +0x00000200L))
|   return connector_status_connected;
| }
| if (radeon_connector->devices & (0x1L << 0x00000008 )) {
|  if (bios_0_scratch & ((0x00001000L +0x00002000L)|(0x00000010L +0x00000020L)))
|   return connector_status_connected;
| }
| if (radeon_connector->devices & (0x1L << 0x00000002 )) {
|  if (bios_0_scratch & (0x00000400L | 0x00000004L))
|   return connector_status_connected;
|  else if (bios_0_scratch & (0x00000800L | 0x00000008L))
|   return connector_status_connected;
| }
| return connector_status_disconnected;
|}
|
|static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
|{
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
| if (radeon_encoder->active_device &
|     (((0x1L << 0x00000003 ) | (0x1L << 0x00000007 ) | (0x1L << 0x00000009 ) | (0x1L << 0x0000000A ) | (0x1L << 0x0000000B ) | (0x1L << 0x00000006 )) | ((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
|  struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|  if (dig)
|   dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
| }
|
| radeon_atom_output_lock(encoder, true);
| radeon_atom_encoder_dpms(encoder, 3);
|
|
| if (connector) {
|  struct radeon_connector *radeon_connector = ({ const typeof( ((struct radeon_connector *)0)->base ) *__mptr = (connector); (struct radeon_connector *)( (char *)__mptr - 1 );});
|  if (radeon_connector->router.cd_valid)
|   radeon_router_select_cd_port(radeon_connector);
| }
|
|
| atombios_set_encoder_crtc_source(encoder);
|}
|
|static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
|{
| radeon_atom_encoder_dpms(encoder, 0);
| radeon_atom_output_lock(encoder, false);
|}
|
|static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
|{
| struct drm_device *dev = encoder->dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| struct radeon_encoder_atom_dig *dig;
|
|
|
|
|
| if (!((rdev->family >= CHIP_RV620))) {
|  struct drm_encoder *other_encoder;
|  struct radeon_encoder *other_radeon_encoder;
|
|  for (other_encoder = ({ const typeof( ((typeof(*other_encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*other_encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(other_encoder->head.next), &other_encoder->head != (&dev->mode_config.encoder_list); other_encoder = ({ const typeof( ((typeof(*other_encoder) *)0)->head ) *__mptr = (other_encoder->head.next); (typeof(*other_encoder) *)( (char *)__mptr - 1 );})) {
|   other_radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (other_encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|   if ((radeon_encoder->encoder_id == other_radeon_encoder->encoder_id) &&
|       drm_helper_encoder_in_use(other_encoder))
|    goto disable_done;
|  }
| }
|
| radeon_atom_encoder_dpms(encoder, 3);
|
| switch (radeon_encoder->encoder_id) {
| case 0x02:
| case 0x13:
| case 0x01:
| case 0x0F:
|  atombios_digital_setup(encoder, 0);
|  break;
| case 0x1E:
| case 0x20:
| case 0x21:
| case 0x1F:
|  if (((rdev->family >= CHIP_CEDAR)))
|
|   atombios_dig_transmitter_setup(encoder, 0, 0, 0);
|  else {
|
|   atombios_dig_transmitter_setup(encoder, 0, 0, 0);
|   atombios_dig_encoder_setup(encoder, 0);
|  }
|  break;
| case 0x19:
|  atombios_ddia_setup(encoder, 0);
|  break;
| case 0x0B:
| case 0x14:
|  atombios_external_tmds_setup(encoder, 0);
|  break;
| case 0x04:
| case 0x15:
| case 0x05:
| case 0x16:
|  atombios_dac_setup(encoder, 0);
|  if (radeon_encoder->devices & (((0x1L << 0x00000002 )) | (0x1L << 0x00000008 )))
|   atombios_tv_setup(encoder, 0);
|  break;
| }
|
|disable_done:
| if (radeon_encoder_is_digital(encoder)) {
|  if (atombios_get_encoder_mode(encoder) == 3)
|   r600_hdmi_disable(encoder);
|  dig = radeon_encoder->enc_priv;
|  dig->dig_encoder = -1;
| }
| radeon_encoder->active_device = 0;
|}
|
|static const struct drm_encoder_helper_funcs radeon_atom_dig_helper_funcs = {
| .dpms = radeon_atom_encoder_dpms,
| .mode_fixup = radeon_atom_mode_fixup,
| .prepare = radeon_atom_encoder_prepare,
| .mode_set = radeon_atom_encoder_mode_set,
| .commit = radeon_atom_encoder_commit,
| .disable = radeon_atom_encoder_disable,
|
|};
|
|static const struct drm_encoder_helper_funcs radeon_atom_dac_helper_funcs = {
| .dpms = radeon_atom_encoder_dpms,
| .mode_fixup = radeon_atom_mode_fixup,
| .prepare = radeon_atom_encoder_prepare,
| .mode_set = radeon_atom_encoder_mode_set,
| .commit = radeon_atom_encoder_commit,
| .detect = radeon_atom_dac_detect,
|};
|
|void radeon_enc_destroy(struct drm_encoder *encoder)
|{
| struct radeon_encoder *radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
| kfree(radeon_encoder->enc_priv);
| drm_encoder_cleanup(encoder);
| kfree(radeon_encoder);
|}
|
|static const struct drm_encoder_funcs radeon_atom_enc_funcs = {
| .destroy = radeon_enc_destroy,
|};
|
|struct radeon_encoder_atom_dac *
|radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder)
|{
| struct drm_device *dev = radeon_encoder->base.dev;
| struct radeon_device *rdev = dev->dev_private;
| struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), __st_GFP_KERNEL_st__);
|
| if (!dac)
|  return ((void *)0);
|
| dac->tv_std = radeon_atombios_get_tv_info(rdev);
| return dac;
|}
|
|struct radeon_encoder_atom_dig *
|radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
|{
| int encoder_enum = (radeon_encoder->encoder_enum & 0x0700) >> 0x08;
| struct radeon_encoder_atom_dig *dig = kzalloc(sizeof(struct radeon_encoder_atom_dig), __st_GFP_KERNEL_st__);
|
| if (!dig)
|  return ((void *)0);
|
|
| dig->coherent_mode = true;
| dig->dig_encoder = -1;
|
| if (encoder_enum == 2)
|  dig->linkb = true;
| else
|  dig->linkb = false;
|
| return dig;
|}
|
|void
|radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device)
|{
| struct radeon_device *rdev = dev->dev_private;
| struct drm_encoder *encoder;
| struct radeon_encoder *radeon_encoder;
|
|
| for (encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = ((&dev->mode_config.encoder_list)->next); (typeof(*encoder) *)( (char *)__mptr - 1 );}); __builtin_prefetch(encoder->head.next), &encoder->head != (&dev->mode_config.encoder_list); encoder = ({ const typeof( ((typeof(*encoder) *)0)->head ) *__mptr = (encoder->head.next); (typeof(*encoder) *)( (char *)__mptr - 1 );})) {
|  radeon_encoder = ({ const typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - 1 );});
|  if (radeon_encoder->encoder_enum == encoder_enum) {
|   radeon_encoder->devices |= supported_device;
|   return;
|  }
|
| }
|
|
| radeon_encoder = kzalloc(sizeof(struct radeon_encoder), __st_GFP_KERNEL_st__);
| if (!radeon_encoder)
|  return;
|
| encoder = &radeon_encoder->base;
| switch (rdev->num_crtc) {
| case 1:
|  encoder->possible_crtcs = 0x1;
|  break;
| case 2:
| default:
|  encoder->possible_crtcs = 0x3;
|  break;
| case 6:
|  encoder->possible_crtcs = 0x3f;
|  break;
| }
|
| radeon_encoder->enc_priv = ((void *)0);
|
| radeon_encoder->encoder_enum = encoder_enum;
| radeon_encoder->encoder_id = (encoder_enum & 0x00FF) >> 0x00;
| radeon_encoder->devices = supported_device;
| radeon_encoder->rmx_type = RMX_OFF;
| radeon_encoder->underscan_type = UNDERSCAN_OFF;
|
| switch (radeon_encoder->encoder_id) {
| case 0x01:
| case 0x02:
| case 0x13:
| case 0x0F:
|  if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
|   radeon_encoder->rmx_type = RMX_FULL;
|   drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 3);
|   radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|  } else {
|   drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 2);
|   radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|   if (((rdev->family >= CHIP_RS600)))
|    radeon_encoder->underscan_type = UNDERSCAN_AUTO;
|  }
|  drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
|  break;
| case 0x04:
|  drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 1);
|  radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
|  drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
|  break;
| case 0x05:
| case 0x15:
| case 0x16:
|  drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 4);
|  radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
|  drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
|  break;
| case 0x0B:
| case 0x14:
| case 0x19:
| case 0x1E:
| case 0x1F:
| case 0x20:
| case 0x21:
|  if (radeon_encoder->devices & (((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
|   radeon_encoder->rmx_type = RMX_FULL;
|   drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 3);
|   radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|  } else {
|   drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, 2);
|   radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|   if (((rdev->family >= CHIP_RS600)))
|    radeon_encoder->underscan_type = UNDERSCAN_AUTO;
|  }
|  drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
|  break;
| }
|}